drivers/ieee1394/dv1394.c

   1 /*
   2  * dv1394.c - DV input/output over IEEE 1394 on OHCI chips
   3  *   Copyright (C)2001 Daniel Maas <dmaas@dcine.com>
   4  *     receive by Dan Dennedy <dan@dennedy.org>
   5  *
   6  * based on:
   7  *  video1394.c - video driver for OHCI 1394 boards
   8  *  Copyright (C)1999,2000 Sebastien Rougeaux <sebastien.rougeaux@anu.edu.au>
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as published by
  12  * the Free Software Foundation; either version 2 of the License, or
  13  * (at your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  * GNU General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software Foundation,
  22  * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  23  */
  24
  25 /*
  26   OVERVIEW
  27
  28   I designed dv1394 as a "pipe" that you can use to shoot DV onto a
  29   FireWire bus. In transmission mode, dv1394 does the following:
  30
  31    1. accepts contiguous frames of DV data from user-space, via write()
  32       or mmap() (see dv1394.h for the complete API)
  33    2. wraps IEC 61883 packets around the DV data, inserting
  34       empty synchronization packets as necessary
  35    3. assigns accurate SYT timestamps to the outgoing packets
  36    4. shoots them out using the OHCI card's IT DMA engine
  37
  38    Thanks to Dan Dennedy, we now have a receive mode that does the following:
  39
  40    1. accepts raw IEC 61883 packets from the OHCI card
  41    2. re-assembles the DV data payloads into contiguous frames,
  42       discarding empty packets
  43    3. sends the DV data to user-space via read() or mmap()
  44 */
  45
  46 /*
  47   TODO:
  48
  49   - tunable frame-drop behavior: either loop last frame, or halt transmission
  50
  51   - use a scatter/gather buffer for DMA programs (f->descriptor_pool)
  52     so that we don't rely on allocating 64KB of contiguous kernel memory
  53     via pci_alloc_consistent()
  54
  55   DONE:
  56   - during reception, better handling of dropped frames and continuity errors
  57   - during reception, prevent DMA from bypassing the irq tasklets
  58   - reduce irq rate during reception (1/250 packets).
  59   - add many more internal buffers during reception with scatter/gather dma.
  60   - add dbc (continuity) checking on receive, increment status.dropped_frames
  61     if not continuous.
  62   - restart IT DMA after a bus reset
  63   - safely obtain and release ISO Tx channels in cooperation with OHCI driver
  64   - map received DIF blocks to their proper location in DV frame (ensure
  65     recovery if dropped packet)
  66   - handle bus resets gracefully (OHCI card seems to take care of this itself(!))
  67   - do not allow resizing the user_buf once allocated; eliminate nuke_buffer_mappings
  68   - eliminated #ifdef DV1394_DEBUG_LEVEL by inventing macros debug_printk and irq_printk
  69   - added wmb() and mb() to places where PCI read/write ordering needs to be enforced
  70   - set video->id correctly
  71   - store video_cards in an array indexed by OHCI card ID, rather than a list
  72   - implement DMA context allocation to cooperate with other users of the OHCI
  73   - fix all XXX showstoppers
  74   - disable IR/IT DMA interrupts on shutdown
  75   - flush pci writes to the card by issuing a read
  76   - character device dispatching
  77   - switch over to the new kernel DMA API (pci_map_*()) (* needs testing on platforms with IOMMU!)
  78   - keep all video_cards in a list (for open() via chardev), set file->private_data = video
  79   - dv1394_poll should indicate POLLIN when receiving buffers are available
  80   - add proc fs interface to set cip_n, cip_d, syt_offset, and video signal
  81   - expose xmit and recv as separate devices (not exclusive)
  82   - expose NTSC and PAL as separate devices (can be overridden)
  83
  84 */
  85
  86 #include <linux/kernel.h>
  87 #include <linux/list.h>
  88 #include <linux/slab.h>
  89 #include <linux/interrupt.h>
  90 #include <linux/wait.h>
  91 #include <linux/errno.h>
  92 #include <linux/module.h>
  93 #include <linux/init.h>
  94 #include <linux/pci.h>
  95 #include <linux/fs.h>
  96 #include <linux/poll.h>
  97 #include <linux/smp_lock.h>
  98 #include <linux/mutex.h>
  99 #include <linux/bitops.h>
 100 #include <asm/byteorder.h>
 101 #include <asm/atomic.h>
 102 #include <asm/io.h>
 103 #include <asm/uaccess.h>
 104 #include <linux/delay.h>
 105 #include <asm/pgtable.h>
 106 #include <asm/page.h>
 107 #include <linux/sched.h>
 108 #include <linux/types.h>
 109 #include <linux/vmalloc.h>
 110 #include <linux/string.h>
 111 #include <linux/compat.h>
 112 #include <linux/cdev.h>
 113
 114 #include "dv1394.h"
 115 #include "dv1394-private.h"
 116 #include "highlevel.h"
 117 #include "hosts.h"
 118 #include "ieee1394.h"
 119 #include "ieee1394_core.h"
 120 #include "ieee1394_hotplug.h"
 121 #include "ieee1394_types.h"
 122 #include "nodemgr.h"
 123 #include "ohci1394.h"
 124
 125 /* DEBUG LEVELS:
 126    0 - no debugging messages
 127    1 - some debugging messages, but none during DMA frame transmission
 128    2 - lots of messages, including during DMA frame transmission
 129        (will cause undeflows if your machine is too slow!)
 130 */
 131
 132 #define DV1394_DEBUG_LEVEL 0
 133
 134 /* for debugging use ONLY: allow more than one open() of the device */
 135 /* #define DV1394_ALLOW_MORE_THAN_ONE_OPEN 1 */
 136
 137 #if DV1394_DEBUG_LEVEL >= 2
 138 #define irq_printk( args... ) printk( args )
 139 #else
 140 #define irq_printk( args... ) do {} while (0)
 141 #endif
 142
 143 #if DV1394_DEBUG_LEVEL >= 1
 144 #define debug_printk( args... ) printk( args)
 145 #else
 146 #define debug_printk( args... ) do {} while (0)
 147 #endif
 148
 149 /* issue a dummy PCI read to force the preceding write
 150    to be posted to the PCI bus immediately */
 151
 152 static inline void flush_pci_write(struct ti_ohci *ohci)
 153 {
 154         mb();
 155         reg_read(ohci, OHCI1394_IsochronousCycleTimer);
 156 }
 157
 158 static void it_tasklet_func(unsigned long data);
 159 static void ir_tasklet_func(unsigned long data);
 160
 161 #ifdef CONFIG_COMPAT
 162 static long dv1394_compat_ioctl(struct file *file, unsigned int cmd,
 163                                unsigned long arg);
 164 #endif
 165
 166 /* GLOBAL DATA */
 167
 168 /* list of all video_cards */
 169 static LIST_HEAD(dv1394_cards);
 170 static DEFINE_SPINLOCK(dv1394_cards_lock);
 171
 172 /* translate from a struct file* to the corresponding struct video_card* */
 173
 174 static inline struct video_card* file_to_video_card(struct file *file)
 175 {
 176         return (struct video_card*) file->private_data;
 177 }
 178
 179 /*** FRAME METHODS *********************************************************/
 180
 181 static void frame_reset(struct frame *f)
 182 {
 183         f->state = FRAME_CLEAR;
 184         f->done = 0;
 185         f->n_packets = 0;
 186         f->frame_begin_timestamp = NULL;
 187         f->assigned_timestamp = 0;
 188         f->cip_syt1 = NULL;
 189         f->cip_syt2 = NULL;
 190         f->mid_frame_timestamp = NULL;
 191         f->frame_end_timestamp = NULL;
 192         f->frame_end_branch = NULL;
 193 }
 194
 195 static struct frame* frame_new(unsigned int frame_num, struct video_card *video)
 196 {
 197         struct frame *f = kmalloc(sizeof(*f), GFP_KERNEL);
 198         if (!f)
 199                 return NULL;
 200
 201         f->video = video;
 202         f->frame_num = frame_num;
 203
 204         f->header_pool = pci_alloc_consistent(f->video->ohci->dev, PAGE_SIZE, &f->header_pool_dma);
 205         if (!f->header_pool) {
 206                 printk(KERN_ERR "dv1394: failed to allocate CIP header pool\n");
 207                 kfree(f);
 208                 return NULL;
 209         }
 210
 211         debug_printk("dv1394: frame_new: allocated CIP header pool at virt 0x%08lx (contig) dma 0x%08lx size %ld\n",
 212                      (unsigned long) f->header_pool, (unsigned long) f->header_pool_dma, PAGE_SIZE);
 213
 214         f->descriptor_pool_size = MAX_PACKETS * sizeof(struct DMA_descriptor_block);
 215         /* make it an even # of pages */
 216         f->descriptor_pool_size += PAGE_SIZE - (f->descriptor_pool_size%PAGE_SIZE);
 217
 218         f->descriptor_pool = pci_alloc_consistent(f->video->ohci->dev,
 219                                                   f->descriptor_pool_size,
 220                                                   &f->descriptor_pool_dma);
 221         if (!f->descriptor_pool) {
 222                 pci_free_consistent(f->video->ohci->dev, PAGE_SIZE, f->header_pool, f->header_pool_dma);
 223                 kfree(f);
 224                 return NULL;
 225         }
 226
 227         debug_printk("dv1394: frame_new: allocated DMA program memory at virt 0x%08lx (contig) dma 0x%08lx size %ld\n",
 228                      (unsigned long) f->descriptor_pool, (unsigned long) f->descriptor_pool_dma, f->descriptor_pool_size);
 229
 230         f->data = 0;
 231         frame_reset(f);
 232
 233         return f;
 234 }
 235
 236 static void frame_delete(struct frame *f)
 237 {
 238         pci_free_consistent(f->video->ohci->dev, PAGE_SIZE, f->header_pool, f->header_pool_dma);
 239         pci_free_consistent(f->video->ohci->dev, f->descriptor_pool_size, f->descriptor_pool, f->descriptor_pool_dma);
 240         kfree(f);
 241 }
 242
 243
 244
 245
 246 /*
 247    frame_prepare() - build the DMA program for transmitting
 248
 249    Frame_prepare() must be called OUTSIDE the video->spinlock.
 250    However, frame_prepare() must still be serialized, so
 251    it should be called WITH the video->mtx taken.
 252  */
 253
 254 static void frame_prepare(struct video_card *video, unsigned int this_frame)
 255 {
 256         struct frame *f = video->frames[this_frame];
 257         int last_frame;
 258
 259         struct DMA_descriptor_block *block;
 260         dma_addr_t block_dma;
 261         struct CIP_header *cip;
 262         dma_addr_t cip_dma;
 263
 264         unsigned int n_descriptors, full_packets, packets_per_frame, payload_size;
 265
 266         /* these flags denote packets that need special attention */
 267         int empty_packet, first_packet, last_packet, mid_packet;
 268
 269         u32 *branch_address, *last_branch_address = NULL;
 270         unsigned long data_p;
 271         int first_packet_empty = 0;
 272         u32 cycleTimer, ct_sec, ct_cyc, ct_off;
 273         unsigned long irq_flags;
 274
 275         irq_printk("frame_prepare( %d ) ---------------------\n", this_frame);
 276
 277         full_packets = 0;
 278
 279
 280
 281         if (video->pal_or_ntsc == DV1394_PAL)
 282                 packets_per_frame = DV1394_PAL_PACKETS_PER_FRAME;
 283         else
 284                 packets_per_frame = DV1394_NTSC_PACKETS_PER_FRAME;
 285
 286         while ( full_packets < packets_per_frame ) {
 287                 empty_packet = first_packet = last_packet = mid_packet = 0;
 288
 289                 data_p = f->data + full_packets * 480;
 290
 291                 /************************************************/
 292                 /* allocate a descriptor block and a CIP header */
 293                 /************************************************/
 294
 295                 /* note: these should NOT cross a page boundary (DMA restriction) */
 296
 297                 if (f->n_packets >= MAX_PACKETS) {
 298                         printk(KERN_ERR "dv1394: FATAL ERROR: max packet count exceeded\n");
 299                         return;
 300                 }
 301
 302                 /* the block surely won't cross a page boundary,
 303                    since an even number of descriptor_blocks fit on a page */
 304                 block = &(f->descriptor_pool[f->n_packets]);
 305
 306                 /* DMA address of the block = offset of block relative
 307                     to the kernel base address of the descriptor pool
 308                     + DMA base address of the descriptor pool */
 309                 block_dma = ((unsigned long) block - (unsigned long) f->descriptor_pool) + f->descriptor_pool_dma;
 310
 311
 312                 /* the whole CIP pool fits on one page, so no worries about boundaries */
 313                 if ( ((unsigned long) &(f->header_pool[f->n_packets]) - (unsigned long) f->header_pool)
 314                     > PAGE_SIZE) {
 315                         printk(KERN_ERR "dv1394: FATAL ERROR: no room to allocate CIP header\n");
 316                         return;
 317                 }
 318
 319                 cip = &(f->header_pool[f->n_packets]);
 320
 321                 /* DMA address of the CIP header = offset of cip
 322                    relative to kernel base address of the header pool
 323                    + DMA base address of the header pool */
 324                 cip_dma = (unsigned long) cip % PAGE_SIZE + f->header_pool_dma;
 325
 326                 /* is this an empty packet? */
 327
 328                 if (video->cip_accum > (video->cip_d - video->cip_n)) {
 329                         empty_packet = 1;
 330                         payload_size = 8;
 331                         video->cip_accum -= (video->cip_d - video->cip_n);
 332                 } else {
 333                         payload_size = 488;
 334                         video->cip_accum += video->cip_n;
 335                 }
 336
 337                 /* there are three important packets each frame:
 338
 339                    the first packet in the frame - we ask the card to record the timestamp when
 340                                                    this packet is actually sent, so we can monitor
 341                                                    how accurate our timestamps are. Also, the first
 342                                                    packet serves as a semaphore to let us know that
 343                                                    it's OK to free the *previous* frame's DMA buffer
 344
 345                    the last packet in the frame -  this packet is used to detect buffer underflows.
 346                                                    if this is the last ready frame, the last DMA block
 347                                                    will have a branch back to the beginning of the frame
 348                                                    (so that the card will re-send the frame on underflow).
 349                                                    if this branch gets taken, we know that at least one
 350                                                    frame has been dropped. When the next frame is ready,
 351                                                    the branch is pointed to its first packet, and the
 352                                                    semaphore is disabled.
 353
 354                    a "mid" packet slightly before the end of the frame - this packet should trigger
 355                                    an interrupt so we can go and assign a timestamp to the first packet
 356                                    in the next frame. We don't use the very last packet in the frame
 357                                    for this purpose, because that would leave very little time to set
 358                                    the timestamp before DMA starts on the next frame.
 359                 */
 360
 361                 if (f->n_packets == 0) {
 362                         first_packet = 1;
 363                 } else if ( full_packets == (packets_per_frame-1) ) {
 364                         last_packet = 1;
 365                 } else if (f->n_packets == packets_per_frame) {
 366                         mid_packet = 1;
 367                 }
 368
 369
 370                 /********************/
 371                 /* setup CIP header */
 372                 /********************/
 373
 374                 /* the timestamp will be written later from the
 375                    mid-frame interrupt handler. For now we just
 376                    store the address of the CIP header(s) that
 377                    need a timestamp. */
 378
 379                 /* first packet in the frame needs a timestamp */
 380                 if (first_packet) {
 381                         f->cip_syt1 = cip;
 382                         if (empty_packet)
 383                                 first_packet_empty = 1;
 384
 385                 } else if (first_packet_empty && (f->n_packets == 1) ) {
 386                         /* if the first packet was empty, the second
 387                            packet's CIP header also needs a timestamp */
 388                         f->cip_syt2 = cip;
 389                 }
 390
 391                 fill_cip_header(cip,
 392                                 /* the node ID number of the OHCI card */
 393                                 reg_read(video->ohci, OHCI1394_NodeID) & 0x3F,
 394                                 video->continuity_counter,
 395                                 video->pal_or_ntsc,
 396                                 0xFFFF /* the timestamp is filled in later */);
 397
 398                 /* advance counter, only for full packets */
 399                 if ( ! empty_packet )
 400                         video->continuity_counter++;
 401
 402                 /******************************/
 403                 /* setup DMA descriptor block */
 404                 /******************************/
 405
 406                 /* first descriptor - OUTPUT_MORE_IMMEDIATE, for the controller's IT header */
 407                 fill_output_more_immediate( &(block->u.out.omi), 1, video->channel, 0, payload_size);
 408
 409                 if (empty_packet) {
 410                         /* second descriptor - OUTPUT_LAST for CIP header */
 411                         fill_output_last( &(block->u.out.u.empty.ol),
 412
 413                                           /* want completion status on all interesting packets */
 414                                           (first_packet || mid_packet || last_packet) ? 1 : 0,
 415
 416                                           /* want interrupts on all interesting packets */
 417                                           (first_packet || mid_packet || last_packet) ? 1 : 0,
 418
 419                                           sizeof(struct CIP_header), /* data size */
 420                                           cip_dma);
 421
 422                         if (first_packet)
 423                                 f->frame_begin_timestamp = &(block->u.out.u.empty.ol.q[3]);
 424                         else if (mid_packet)
 425                                 f->mid_frame_timestamp = &(block->u.out.u.empty.ol.q[3]);
 426                         else if (last_packet) {
 427                                 f->frame_end_timestamp = &(block->u.out.u.empty.ol.q[3]);
 428                                 f->frame_end_branch = &(block->u.out.u.empty.ol.q[2]);
 429                         }
 430
 431                         branch_address = &(block->u.out.u.empty.ol.q[2]);
 432                         n_descriptors = 3;
 433                         if (first_packet)
 434                                 f->first_n_descriptors = n_descriptors;
 435
 436                 } else { /* full packet */
 437
 438                         /* second descriptor - OUTPUT_MORE for CIP header */
 439                         fill_output_more( &(block->u.out.u.full.om),
 440                                           sizeof(struct CIP_header), /* data size */
 441                                           cip_dma);
 442
 443
 444                         /* third (and possibly fourth) descriptor - for DV data */
 445                         /* the 480-byte payload can cross a page boundary; if so,
 446                            we need to split it into two DMA descriptors */
 447
 448                         /* does the 480-byte data payload cross a page boundary? */
 449                         if ( (PAGE_SIZE- ((unsigned long)data_p % PAGE_SIZE) ) < 480 ) {
 450
 451                                 /* page boundary crossed */
 452
 453                                 fill_output_more( &(block->u.out.u.full.u.cross.om),
 454                                                   /* data size - how much of data_p fits on the first page */
 455                                                   PAGE_SIZE - (data_p % PAGE_SIZE),
 456
 457                                                   /* DMA address of data_p */
 458                                                   dma_region_offset_to_bus(&video->dv_buf,
 459                                                                            data_p - (unsigned long) video->dv_buf.kvirt));
 460
 461                                 fill_output_last( &(block->u.out.u.full.u.cross.ol),
 462
 463                                                   /* want completion status on all interesting packets */
 464                                                   (first_packet || mid_packet || last_packet) ? 1 : 0,
 465
 466                                                   /* want interrupt on all interesting packets */
 467                                                   (first_packet || mid_packet || last_packet) ? 1 : 0,
 468
 469                                                   /* data size - remaining portion of data_p */
 470                                                   480 - (PAGE_SIZE - (data_p % PAGE_SIZE)),
 471
 472                                                   /* DMA address of data_p + PAGE_SIZE - (data_p % PAGE_SIZE) */
 473                                                   dma_region_offset_to_bus(&video->dv_buf,
 474                                                                            data_p + PAGE_SIZE - (data_p % PAGE_SIZE) - (unsigned long) video->dv_buf.kvirt));
 475
 476                                 if (first_packet)
 477                                         f->frame_begin_timestamp = &(block->u.out.u.full.u.cross.ol.q[3]);
 478                                 else if (mid_packet)
 479                                         f->mid_frame_timestamp = &(block->u.out.u.full.u.cross.ol.q[3]);
 480                                 else if (last_packet) {
 481                                         f->frame_end_timestamp = &(block->u.out.u.full.u.cross.ol.q[3]);
 482                                         f->frame_end_branch = &(block->u.out.u.full.u.cross.ol.q[2]);
 483                                 }
 484
 485                                 branch_address = &(block->u.out.u.full.u.cross.ol.q[2]);
 486
 487                                 n_descriptors = 5;
 488                                 if (first_packet)
 489                                         f->first_n_descriptors = n_descriptors;
 490
 491                                 full_packets++;
 492
 493                         } else {
 494                                 /* fits on one page */
 495
 496                                 fill_output_last( &(block->u.out.u.full.u.nocross.ol),
 497
 498                                                   /* want completion status on all interesting packets */
 499                                                   (first_packet || mid_packet || last_packet) ? 1 : 0,
 500
 501                                                   /* want interrupt on all interesting packets */
 502                                                   (first_packet || mid_packet || last_packet) ? 1 : 0,
 503
 504                                                   480, /* data size (480 bytes of DV data) */
 505
 506
 507                                                   /* DMA address of data_p */
 508                                                   dma_region_offset_to_bus(&video->dv_buf,
 509                                                                            data_p - (unsigned long) video->dv_buf.kvirt));
 510
 511                                 if (first_packet)
 512                                         f->frame_begin_timestamp = &(block->u.out.u.full.u.nocross.ol.q[3]);
 513                                 else if (mid_packet)
 514                                         f->mid_frame_timestamp = &(block->u.out.u.full.u.nocross.ol.q[3]);
 515                                 else if (last_packet) {
 516                                         f->frame_end_timestamp = &(block->u.out.u.full.u.nocross.ol.q[3]);
 517                                         f->frame_end_branch = &(block->u.out.u.full.u.nocross.ol.q[2]);
 518                                 }
 519
 520                                 branch_address = &(block->u.out.u.full.u.nocross.ol.q[2]);
 521
 522                                 n_descriptors = 4;
 523                                 if (first_packet)
 524                                         f->first_n_descriptors = n_descriptors;
 525
 526                                 full_packets++;
 527                         }
 528                 }
 529
 530                 /* link this descriptor block into the DMA program by filling in
 531                    the branch address of the previous block */
 532
 533                 /* note: we are not linked into the active DMA chain yet */
 534
 535                 if (last_branch_address) {
 536                         *(last_branch_address) = cpu_to_le32(block_dma | n_descriptors);
 537                 }
 538
 539                 last_branch_address = branch_address;
 540
 541
 542                 f->n_packets++;
 543
 544         }
 545
 546         /* when we first assemble a new frame, set the final branch
 547            to loop back up to the top */
 548         *(f->frame_end_branch) = cpu_to_le32(f->descriptor_pool_dma | f->first_n_descriptors);
 549
 550         /* make the latest version of this frame visible to the PCI card */
 551         dma_region_sync_for_device(&video->dv_buf, f->data - (unsigned long) video->dv_buf.kvirt, video->frame_size);
 552
 553         /* lock against DMA interrupt */
 554         spin_lock_irqsave(&video->spinlock, irq_flags);
 555
 556         f->state = FRAME_READY;
 557
 558         video->n_clear_frames--;
 559
 560         last_frame = video->first_clear_frame - 1;
 561         if (last_frame == -1)
 562                 last_frame = video->n_frames-1;
 563
 564         video->first_clear_frame = (video->first_clear_frame + 1) % video->n_frames;
 565
 566         irq_printk("   frame %d prepared, active_frame = %d, n_clear_frames = %d, first_clear_frame = %d\n last=%d\n",
 567                    this_frame, video->active_frame, video->n_clear_frames, video->first_clear_frame, last_frame);
 568
 569         irq_printk("   begin_ts %08lx mid_ts %08lx end_ts %08lx end_br %08lx\n",
 570                    (unsigned long) f->frame_begin_timestamp,
 571                    (unsigned long) f->mid_frame_timestamp,
 572                    (unsigned long) f->frame_end_timestamp,
 573                    (unsigned long) f->frame_end_branch);
 574
 575         if (video->active_frame != -1) {
 576
 577                 /* if DMA is already active, we are almost done */
 578                 /* just link us onto the active DMA chain */
 579                 if (video->frames[last_frame]->frame_end_branch) {
 580                         u32 temp;
 581
 582                         /* point the previous frame's tail to this frame's head */
 583                         *(video->frames[last_frame]->frame_end_branch) = cpu_to_le32(f->descriptor_pool_dma | f->first_n_descriptors);
 584
 585                         /* this write MUST precede the next one, or we could silently drop frames */
 586                         wmb();
 587
 588                         /* disable the want_status semaphore on the last packet */
 589                         temp = le32_to_cpu(*(video->frames[last_frame]->frame_end_branch - 2));
 590                         temp &= 0xF7CFFFFF;
 591                         *(video->frames[last_frame]->frame_end_branch - 2) = cpu_to_le32(temp);
 592
 593                         /* flush these writes to memory ASAP */
 594                         flush_pci_write(video->ohci);
 595
 596                         /* NOTE:
 597                            ideally the writes should be "atomic": if
 598                            the OHCI card reads the want_status flag in
 599                            between them, we'll falsely report a
 600                            dropped frame. Hopefully this window is too
 601                            small to really matter, and the consequence
 602                            is rather harmless. */
 603
 604
 605                         irq_printk("     new frame %d linked onto DMA chain\n", this_frame);
 606
 607                 } else {
 608                         printk(KERN_ERR "dv1394: last frame not ready???\n");
 609                 }
 610
 611         } else {
 612
 613                 u32 transmit_sec, transmit_cyc;
 614                 u32 ts_cyc, ts_off;
 615
 616                 /* DMA is stopped, so this is the very first frame */
 617                 video->active_frame = this_frame;
 618
 619                 /* set CommandPtr to address and size of first descriptor block */
 620                 reg_write(video->ohci, video->ohci_IsoXmitCommandPtr,
 621                           video->frames[video->active_frame]->descriptor_pool_dma |
 622                           f->first_n_descriptors);
 623
 624                 /* assign a timestamp based on the current cycle time...
 625                    We'll tell the card to begin DMA 100 cycles from now,
 626                    and assign a timestamp 103 cycles from now */
 627
 628                 cycleTimer = reg_read(video->ohci, OHCI1394_IsochronousCycleTimer);
 629
 630                 ct_sec = cycleTimer >> 25;
 631                 ct_cyc = (cycleTimer >> 12) & 0x1FFF;
 632                 ct_off = cycleTimer & 0xFFF;
 633
 634                 transmit_sec = ct_sec;
 635                 transmit_cyc = ct_cyc + 100;
 636
 637                 transmit_sec += transmit_cyc/8000;
 638                 transmit_cyc %= 8000;
 639
 640                 ts_off = ct_off;
 641                 ts_cyc = transmit_cyc + 3;
 642                 ts_cyc %= 8000;
 643
 644                 f->assigned_timestamp = (ts_cyc&0xF) << 12;
 645
 646                 /* now actually write the timestamp into the appropriate CIP headers */
 647                 if (f->cip_syt1) {
 648                         f->cip_syt1->b[6] = f->assigned_timestamp >> 8;
 649                         f->cip_syt1->b[7] = f->assigned_timestamp & 0xFF;
 650                 }
 651                 if (f->cip_syt2) {
 652                         f->cip_syt2->b[6] = f->assigned_timestamp >> 8;
 653                         f->cip_syt2->b[7] = f->assigned_timestamp & 0xFF;
 654                 }
 655
 656                 /* --- start DMA --- */
 657
 658                 /* clear all bits in ContextControl register */
 659
 660                 reg_write(video->ohci, video->ohci_IsoXmitContextControlClear, 0xFFFFFFFF);
 661                 wmb();
 662
 663                 /* the OHCI card has the ability to start ISO transmission on a
 664                    particular cycle (start-on-cycle). This way we can ensure that
 665                    the first DV frame will have an accurate timestamp.
 666
 667                    However, start-on-cycle only appears to work if the OHCI card
 668                    is cycle master! Since the consequences of messing up the first
 669                    timestamp are minimal*, just disable start-on-cycle for now.
 670
 671                    * my DV deck drops the first few frames before it "locks in;"
 672                      so the first frame having an incorrect timestamp is inconsequential.
 673                 */
 674
 675 #if 0
 676                 reg_write(video->ohci, video->ohci_IsoXmitContextControlSet,
 677                           (1 << 31) /* enable start-on-cycle */
 678                           | ( (transmit_sec & 0x3) << 29)
 679                           | (transmit_cyc << 16));
 680                 wmb();
 681 #endif
 682
 683                 video->dma_running = 1;
 684
 685                 /* set the 'run' bit */
 686                 reg_write(video->ohci, video->ohci_IsoXmitContextControlSet, 0x8000);
 687                 flush_pci_write(video->ohci);
 688
 689                 /* --- DMA should be running now --- */
 690
 691                 debug_printk("    Cycle = %4u ContextControl = %08x CmdPtr = %08x\n",
 692                              (reg_read(video->ohci, OHCI1394_IsochronousCycleTimer) >> 12) & 0x1FFF,
 693                              reg_read(video->ohci, video->ohci_IsoXmitContextControlSet),
 694                              reg_read(video->ohci, video->ohci_IsoXmitCommandPtr));
 695
 696                 debug_printk("    DMA start - current cycle %4u, transmit cycle %4u (%2u), assigning ts cycle %2u\n",
 697                              ct_cyc, transmit_cyc, transmit_cyc & 0xF, ts_cyc & 0xF);
 698
 699 #if DV1394_DEBUG_LEVEL >= 2
 700                 {
 701                         /* check if DMA is really running */
 702                         int i = 0;
 703                         while (i < 20) {
 704                                 mb();
 705                                 mdelay(1);
 706                                 if (reg_read(video->ohci, video->ohci_IsoXmitContextControlSet) & (1 << 10)) {
 707                                         printk("DMA ACTIVE after %d msec\n", i);
 708                                         break;
 709                                 }
 710                                 i++;
 711                         }
 712
 713                         printk("set = %08x, cmdPtr = %08x\n",
 714                                reg_read(video->ohci, video->ohci_IsoXmitContextControlSet),
 715                                reg_read(video->ohci, video->ohci_IsoXmitCommandPtr)
 716                                );
 717
 718                         if ( ! (reg_read(video->ohci, video->ohci_IsoXmitContextControlSet) &  (1 << 10)) ) {
 719                                 printk("DMA did NOT go active after 20ms, event = %x\n",
 720                                        reg_read(video->ohci, video->ohci_IsoXmitContextControlSet) & 0x1F);
 721                         } else
 722                                 printk("DMA is RUNNING!\n");
 723                 }
 724 #endif
 725
 726         }
 727
 728
 729         spin_unlock_irqrestore(&video->spinlock, irq_flags);
 730 }
 731
 732
 733
 734 /*** RECEIVE FUNCTIONS *****************************************************/
 735
 736 /*
 737         frame method put_packet
 738
 739         map and copy the packet data to its location in the frame
 740         based upon DIF section and sequence
 741 */
 742
 743 static void inline
 744 frame_put_packet (struct frame *f, struct packet *p)
 745 {
 746         int section_type = p->data[0] >> 5;           /* section type is in bits 5 - 7 */
 747         int dif_sequence = p->data[1] >> 4;           /* dif sequence number is in bits 4 - 7 */
 748         int dif_block = p->data[2];
 749
 750         /* sanity check */
 751         if (dif_sequence > 11 || dif_block > 149) return;
 752
 753         switch (section_type) {
 754         case 0:           /* 1 Header block */
 755                 memcpy( (void *) f->data + dif_sequence * 150 * 80, p->data, 480);
 756                 break;
 757
 758         case 1:           /* 2 Subcode blocks */
 759                 memcpy( (void *) f->data + dif_sequence * 150 * 80 + (1 + dif_block) * 80, p->data, 480);
 760                 break;
 761
 762         case 2:           /* 3 VAUX blocks */
 763                 memcpy( (void *) f->data + dif_sequence * 150 * 80 + (3 + dif_block) * 80, p->data, 480);
 764                 break;
 765
 766         case 3:           /* 9 Audio blocks interleaved with video */
 767                 memcpy( (void *) f->data + dif_sequence * 150 * 80 + (6 + dif_block * 16) * 80, p->data, 480);
 768                 break;
 769
 770         case 4:           /* 135 Video blocks interleaved with audio */
 771                 memcpy( (void *) f->data + dif_sequence * 150 * 80 + (7 + (dif_block / 15) + dif_block) * 80, p->data, 480);
 772                 break;
 773
 774         default:           /* we can not handle any other data */
 775                 break;
 776         }
 777 }
 778
 779
 780 static void start_dma_receive(struct video_card *video)
 781 {
 782         if (video->first_run == 1) {
 783                 video->first_run = 0;
 784
 785                 /* start DMA once all of the frames are READY */
 786                 video->n_clear_frames = 0;
 787                 video->first_clear_frame = -1;
 788                 video->current_packet = 0;
 789                 video->active_frame = 0;
 790
 791                 /* reset iso recv control register */
 792                 reg_write(video->ohci, video->ohci_IsoRcvContextControlClear, 0xFFFFFFFF);
 793                 wmb();
 794
 795                 /* clear bufferFill, set isochHeader and speed (0=100) */
 796                 reg_write(video->ohci, video->ohci_IsoRcvContextControlSet, 0x40000000);
 797
 798                 /* match on all tags, listen on channel */
 799                 reg_write(video->ohci, video->ohci_IsoRcvContextMatch, 0xf0000000 | video->channel);
 800
 801                 /* address and first descriptor block + Z=1 */
 802                 reg_write(video->ohci, video->ohci_IsoRcvCommandPtr,
 803                           video->frames[0]->descriptor_pool_dma | 1); /* Z=1 */
 804                 wmb();
 805
 806                 video->dma_running = 1;
 807
 808                 /* run */
 809                 reg_write(video->ohci, video->ohci_IsoRcvContextControlSet, 0x8000);
 810                 flush_pci_write(video->ohci);
 811
 812                 debug_printk("dv1394: DMA started\n");
 813
 814 #if DV1394_DEBUG_LEVEL >= 2
 815                 {
 816                         int i;
 817
 818                         for (i = 0; i < 1000; ++i) {
 819                                 mdelay(1);
 820                                 if (reg_read(video->ohci, video->ohci_IsoRcvContextControlSet) & (1 << 10)) {
 821                                         printk("DMA ACTIVE after %d msec\n", i);
 822                                         break;
 823                                 }
 824                         }
 825                         if ( reg_read(video->ohci, video->ohci_IsoRcvContextControlSet) &  (1 << 11) ) {
 826                                 printk("DEAD, event = %x\n",
 827                                            reg_read(video->ohci, video->ohci_IsoRcvContextControlSet) & 0x1F);
 828                         } else
 829                                 printk("RUNNING!\n");
 830                 }
 831 #endif
 832         } else if ( reg_read(video->ohci, video->ohci_IsoRcvContextControlSet) &  (1 << 11) ) {
 833                 debug_printk("DEAD, event = %x\n",
 834                              reg_read(video->ohci, video->ohci_IsoRcvContextControlSet) & 0x1F);
 835
 836                 /* wake */
 837                 reg_write(video->ohci, video->ohci_IsoRcvContextControlSet, (1 << 12));
 838         }
 839 }
 840
 841
 842 /*
 843    receive_packets() - build the DMA program for receiving
 844 */
 845
 846 static void receive_packets(struct video_card *video)
 847 {
 848         struct DMA_descriptor_block *block = NULL;
 849         dma_addr_t block_dma = 0;
 850         struct packet *data = NULL;
 851         dma_addr_t data_dma = 0;
 852         u32 *last_branch_address = NULL;
 853         unsigned long irq_flags;
 854         int want_interrupt = 0;
 855         struct frame *f = NULL;
 856         int i, j;
 857
 858         spin_lock_irqsave(&video->spinlock, irq_flags);
 859
 860         for (j = 0; j < video->n_frames; j++) {
 861
 862                 /* connect frames */
 863                 if (j > 0 && f != NULL && f->frame_end_branch != NULL)
 864                         *(f->frame_end_branch) = cpu_to_le32(video->frames[j]->descriptor_pool_dma | 1); /* set Z=1 */
 865
 866                 f = video->frames[j];
 867
 868                 for (i = 0; i < MAX_PACKETS; i++) {
 869                         /* locate a descriptor block and packet from the buffer */
 870                         block = &(f->descriptor_pool[i]);
 871                         block_dma = ((unsigned long) block - (unsigned long) f->descriptor_pool) + f->descriptor_pool_dma;
 872
 873                         data = ((struct packet*)video->packet_buf.kvirt) + f->frame_num * MAX_PACKETS + i;
 874                         data_dma = dma_region_offset_to_bus( &video->packet_buf,
 875                                                              ((unsigned long) data - (unsigned long) video->packet_buf.kvirt) );
 876
 877                         /* setup DMA descriptor block */
 878                         want_interrupt = ((i % (MAX_PACKETS/2)) == 0 || i == (MAX_PACKETS-1));
 879                         fill_input_last( &(block->u.in.il), want_interrupt, 512, data_dma);
 880
 881                         /* link descriptors */
 882                         last_branch_address = f->frame_end_branch;
 883
 884                         if (last_branch_address != NULL)
 885                                 *(last_branch_address) = cpu_to_le32(block_dma | 1); /* set Z=1 */
 886
 887                         f->frame_end_branch = &(block->u.in.il.q[2]);
 888                 }
 889
 890         } /* next j */
 891
 892         spin_unlock_irqrestore(&video->spinlock, irq_flags);
 893
 894 }
 895
 896
 897
 898 /*** MANAGEMENT FUNCTIONS **************************************************/
 899
 900 static int do_dv1394_init(struct video_card *video, struct dv1394_init *init)
 901 {
 902         unsigned long flags, new_buf_size;
 903         int i;
 904         u64 chan_mask;
 905         int retval = -EINVAL;
 906
 907         debug_printk("dv1394: initialising %d\n", video->id);
 908         if (init->api_version != DV1394_API_VERSION)
 909                 return -EINVAL;
 910
 911         /* first sanitize all the parameters */
 912         if ( (init->n_frames < 2) || (init->n_frames > DV1394_MAX_FRAMES) )
 913                 return -EINVAL;
 914
 915         if ( (init->format != DV1394_NTSC) && (init->format != DV1394_PAL) )
 916                 return -EINVAL;
 917
 918         if ( (init->syt_offset == 0) || (init->syt_offset > 50) )
 919                 /* default SYT offset is 3 cycles */
 920                 init->syt_offset = 3;
 921
 922         if ( (init->channel > 63) || (init->channel < 0) )
 923                 init->channel = 63;
 924
 925         chan_mask = (u64)1 << init->channel;
 926
 927         /* calculate what size DMA buffer is needed */
 928         if (init->format == DV1394_NTSC)
 929                 new_buf_size = DV1394_NTSC_FRAME_SIZE * init->n_frames;
 930         else
 931                 new_buf_size = DV1394_PAL_FRAME_SIZE * init->n_frames;
 932
 933         /* round up to PAGE_SIZE */
 934         if (new_buf_size % PAGE_SIZE) new_buf_size += PAGE_SIZE - (new_buf_size % PAGE_SIZE);
 935
 936         /* don't allow the user to allocate the DMA buffer more than once */
 937         if (video->dv_buf.kvirt && video->dv_buf_size != new_buf_size) {
 938                 printk("dv1394: re-sizing the DMA buffer is not allowed\n");
 939                 return -EINVAL;
 940         }
 941
 942         /* shutdown the card if it's currently active */
 943         /* (the card should not be reset if the parameters are screwy) */
 944
 945         do_dv1394_shutdown(video, 0);
 946
 947         /* try to claim the ISO channel */
 948         spin_lock_irqsave(&video->ohci->IR_channel_lock, flags);
 949         if (video->ohci->ISO_channel_usage & chan_mask) {
 950                 spin_unlock_irqrestore(&video->ohci->IR_channel_lock, flags);
 951                 retval = -EBUSY;
 952                 goto err;
 953         }
 954         video->ohci->ISO_channel_usage |= chan_mask;
 955         spin_unlock_irqrestore(&video->ohci->IR_channel_lock, flags);
 956
 957         video->channel = init->channel;
 958
 959         /* initialize misc. fields of video */
 960         video->n_frames = init->n_frames;
 961         video->pal_or_ntsc = init->format;
 962
 963         video->cip_accum = 0;
 964         video->continuity_counter = 0;
 965
 966         video->active_frame = -1;
 967         video->first_clear_frame = 0;
 968         video->n_clear_frames = video->n_frames;
 969         video->dropped_frames = 0;
 970
 971         video->write_off = 0;
 972
 973         video->first_run = 1;
 974         video->current_packet = -1;
 975         video->first_frame = 0;
 976
 977         if (video->pal_or_ntsc == DV1394_NTSC) {
 978                 video->cip_n = init->cip_n != 0 ? init->cip_n : CIP_N_NTSC;
 979                 video->cip_d = init->cip_d != 0 ? init->cip_d : CIP_D_NTSC;
 980                 video->frame_size = DV1394_NTSC_FRAME_SIZE;
 981         } else {
 982                 video->cip_n = init->cip_n != 0 ? init->cip_n : CIP_N_PAL;
 983                 video->cip_d = init->cip_d != 0 ? init->cip_d : CIP_D_PAL;
 984                 video->frame_size = DV1394_PAL_FRAME_SIZE;
 985         }
 986
 987         video->syt_offset = init->syt_offset;
 988
 989         /* find and claim DMA contexts on the OHCI card */
 990
 991         if (video->ohci_it_ctx == -1) {
 992                 ohci1394_init_iso_tasklet(&video->it_tasklet, OHCI_ISO_TRANSMIT,
 993                                           it_tasklet_func, (unsigned long) video);
 994
 995                 if (ohci1394_register_iso_tasklet(video->ohci, &video->it_tasklet) < 0) {
 996                         printk(KERN_ERR "dv1394: could not find an available IT DMA context\n");
 997                         retval = -EBUSY;
 998                         goto err;
 999                 }
1000
1001                 video->ohci_it_ctx = video->it_tasklet.context;
1002                 debug_printk("dv1394: claimed IT DMA context %d\n", video->ohci_it_ctx);
1003         }
1004
1005         if (video->ohci_ir_ctx == -1) {
1006                 ohci1394_init_iso_tasklet(&video->ir_tasklet, OHCI_ISO_RECEIVE,
1007                                           ir_tasklet_func, (unsigned long) video);
1008
1009                 if (ohci1394_register_iso_tasklet(video->ohci, &video->ir_tasklet) < 0) {
1010                         printk(KERN_ERR "dv1394: could not find an available IR DMA context\n");
1011                         retval = -EBUSY;
1012                         goto err;
1013                 }
1014                 video->ohci_ir_ctx = video->ir_tasklet.context;
1015                 debug_printk("dv1394: claimed IR DMA context %d\n", video->ohci_ir_ctx);
1016         }
1017
1018         /* allocate struct frames */
1019         for (i = 0; i < init->n_frames; i++) {
1020                 video->frames[i] = frame_new(i, video);
1021
1022                 if (!video->frames[i]) {
1023                         printk(KERN_ERR "dv1394: Cannot allocate frame structs\n");
1024                         retval = -ENOMEM;
1025                         goto err;
1026                 }
1027         }
1028
1029         if (!video->dv_buf.kvirt) {
1030                 /* allocate the ringbuffer */
1031                 retval = dma_region_alloc(&video->dv_buf, new_buf_size, video->ohci->dev, PCI_DMA_TODEVICE);
1032                 if (retval)
1033                         goto err;
1034
1035                 video->dv_buf_size = new_buf_size;
1036
1037                 debug_printk("dv1394: Allocated %d frame buffers, total %u pages (%u DMA pages), %lu bytes\n",
1038                              video->n_frames, video->dv_buf.n_pages,
1039                              video->dv_buf.n_dma_pages, video->dv_buf_size);
1040         }
1041
1042         /* set up the frame->data pointers */
1043         for (i = 0; i < video->n_frames; i++)
1044                 video->frames[i]->data = (unsigned long) video->dv_buf.kvirt + i * video->frame_size;
1045
1046         if (!video->packet_buf.kvirt) {
1047                 /* allocate packet buffer */
1048                 video->packet_buf_size = sizeof(struct packet) * video->n_frames * MAX_PACKETS;
1049                 if (video->packet_buf_size % PAGE_SIZE)
1050                         video->packet_buf_size += PAGE_SIZE - (video->packet_buf_size % PAGE_SIZE);
1051
1052                 retval = dma_region_alloc(&video->packet_buf, video->packet_buf_size,
1053                                           video->ohci->dev, PCI_DMA_FROMDEVICE);
1054                 if (retval)
1055                         goto err;
1056
1057                 debug_printk("dv1394: Allocated %d packets in buffer, total %u pages (%u DMA pages), %lu bytes\n",
1058                                  video->n_frames*MAX_PACKETS, video->packet_buf.n_pages,
1059                                  video->packet_buf.n_dma_pages, video->packet_buf_size);
1060         }
1061
1062         /* set up register offsets for IT context */
1063         /* IT DMA context registers are spaced 16 bytes apart */
1064         video->ohci_IsoXmitContextControlSet = OHCI1394_IsoXmitContextControlSet+16*video->ohci_it_ctx;
1065         video->ohci_IsoXmitContextControlClear = OHCI1394_IsoXmitContextControlClear+16*video->ohci_it_ctx;
1066         video->ohci_IsoXmitCommandPtr = OHCI1394_IsoXmitCommandPtr+16*video->ohci_it_ctx;
1067
1068         /* enable interrupts for IT context */
1069         reg_write(video->ohci, OHCI1394_IsoXmitIntMaskSet, (1 << video->ohci_it_ctx));
1070         debug_printk("dv1394: interrupts enabled for IT context %d\n", video->ohci_it_ctx);
1071
1072         /* set up register offsets for IR context */
1073         /* IR DMA context registers are spaced 32 bytes apart */
1074         video->ohci_IsoRcvContextControlSet = OHCI1394_IsoRcvContextControlSet+32*video->ohci_ir_ctx;
1075         video->ohci_IsoRcvContextControlClear = OHCI1394_IsoRcvContextControlClear+32*video->ohci_ir_ctx;
1076         video->ohci_IsoRcvCommandPtr = OHCI1394_IsoRcvCommandPtr+32*video->ohci_ir_ctx;
1077         video->ohci_IsoRcvContextMatch = OHCI1394_IsoRcvContextMatch+32*video->ohci_ir_ctx;
1078
1079         /* enable interrupts for IR context */
1080         reg_write(video->ohci, OHCI1394_IsoRecvIntMaskSet, (1 << video->ohci_ir_ctx) );
1081         debug_printk("dv1394: interrupts enabled for IR context %d\n", video->ohci_ir_ctx);
1082
1083         return 0;
1084
1085 err:
1086         do_dv1394_shutdown(video, 1);
1087         return retval;
1088 }
1089
1090 /* if the user doesn't bother to call ioctl(INIT) before starting
1091    mmap() or read()/write(), just give him some default values */
1092
1093 static int do_dv1394_init_default(struct video_card *video)
1094 {
1095         struct dv1394_init init;
1096
1097         init.api_version = DV1394_API_VERSION;
1098         init.n_frames = DV1394_MAX_FRAMES / 4;
1099         init.channel = video->channel;
1100         init.format = video->pal_or_ntsc;
1101         init.cip_n = video->cip_n;
1102         init.cip_d = video->cip_d;
1103         init.syt_offset = video->syt_offset;
1104
1105         return do_dv1394_init(video, &init);
1106 }
1107
1108 /* do NOT call from interrupt context */
1109 static void stop_dma(struct video_card *video)
1110 {
1111         unsigned long flags;
1112         int i;
1113
1114         /* no interrupts */
1115         spin_lock_irqsave(&video->spinlock, flags);
1116
1117         video->dma_running = 0;
1118
1119         if ( (video->ohci_it_ctx == -1) && (video->ohci_ir_ctx == -1) )
1120                 goto out;
1121
1122         /* stop DMA if in progress */
1123         if ( (video->active_frame != -1) ||
1124             (reg_read(video->ohci, video->ohci_IsoXmitContextControlClear) & (1 << 10)) ||
1125             (reg_read(video->ohci, video->ohci_IsoRcvContextControlClear) &  (1 << 10)) ) {
1126
1127                 /* clear the .run bits */
1128                 reg_write(video->ohci, video->ohci_IsoXmitContextControlClear, (1 << 15));
1129                 reg_write(video->ohci, video->ohci_IsoRcvContextControlClear, (1 << 15));
1130                 flush_pci_write(video->ohci);
1131
1132                 video->active_frame = -1;
1133                 video->first_run = 1;
1134
1135                 /* wait until DMA really stops */
1136                 i = 0;
1137                 while (i < 1000) {
1138
1139                         /* wait 0.1 millisecond */
1140                         udelay(100);
1141
1142                         if ( (reg_read(video->ohci, video->ohci_IsoXmitContextControlClear) & (1 << 10)) ||
1143                             (reg_read(video->ohci, video->ohci_IsoRcvContextControlClear)  & (1 << 10)) ) {
1144                                 /* still active */
1145                                 debug_printk("dv1394: stop_dma: DMA not stopped yet\n" );
1146                                 mb();
1147                         } else {
1148                                 debug_printk("dv1394: stop_dma: DMA stopped safely after %d ms\n", i/10);
1149                                 break;
1150                         }
1151
1152                         i++;
1153                 }
1154
1155                 if (i == 1000) {
1156                         printk(KERN_ERR "dv1394: stop_dma: DMA still going after %d ms!\n", i/10);
1157                 }
1158         }
1159         else
1160                 debug_printk("dv1394: stop_dma: already stopped.\n");
1161
1162 out:
1163         spin_unlock_irqrestore(&video->spinlock, flags);
1164 }
1165
1166
1167
1168 static void do_dv1394_shutdown(struct video_card *video, int free_dv_buf)
1169 {
1170         int i;
1171
1172         debug_printk("dv1394: shutdown...\n");
1173
1174         /* stop DMA if in progress */
1175         stop_dma(video);
1176
1177         /* release the DMA contexts */
1178         if (video->ohci_it_ctx != -1) {
1179                 video->ohci_IsoXmitContextControlSet = 0;
1180                 video->ohci_IsoXmitContextControlClear = 0;
1181                 video->ohci_IsoXmitCommandPtr = 0;
1182
1183                 /* disable interrupts for IT context */
1184                 reg_write(video->ohci, OHCI1394_IsoXmitIntMaskClear, (1 << video->ohci_it_ctx));
1185
1186                 /* remove tasklet */
1187                 ohci1394_unregister_iso_tasklet(video->ohci, &video->it_tasklet);
1188                 debug_printk("dv1394: IT context %d released\n", video->ohci_it_ctx);
1189                 video->ohci_it_ctx = -1;
1190         }
1191
1192         if (video->ohci_ir_ctx != -1) {
1193                 video->ohci_IsoRcvContextControlSet = 0;
1194                 video->ohci_IsoRcvContextControlClear = 0;
1195                 video->ohci_IsoRcvCommandPtr = 0;
1196                 video->ohci_IsoRcvContextMatch = 0;
1197
1198                 /* disable interrupts for IR context */
1199                 reg_write(video->ohci, OHCI1394_IsoRecvIntMaskClear, (1 << video->ohci_ir_ctx));
1200
1201                 /* remove tasklet */
1202                 ohci1394_unregister_iso_tasklet(video->ohci, &video->ir_tasklet);
1203                 debug_printk("dv1394: IR context %d released\n", video->ohci_ir_ctx);
1204                 video->ohci_ir_ctx = -1;
1205         }
1206
1207         /* release the ISO channel */
1208         if (video->channel != -1) {
1209                 u64 chan_mask;
1210                 unsigned long flags;
1211
1212                 chan_mask = (u64)1 << video->channel;
1213
1214                 spin_lock_irqsave(&video->ohci->IR_channel_lock, flags);
1215                 video->ohci->ISO_channel_usage &= ~(chan_mask);
1216                 spin_unlock_irqrestore(&video->ohci->IR_channel_lock, flags);
1217
1218                 video->channel = -1;
1219         }
1220
1221         /* free the frame structs */
1222         for (i = 0; i < DV1394_MAX_FRAMES; i++) {
1223                 if (video->frames[i])
1224                         frame_delete(video->frames[i]);
1225                 video->frames[i] = NULL;
1226         }
1227
1228         video->n_frames = 0;
1229
1230         /* we can't free the DMA buffer unless it is guaranteed that
1231            no more user-space mappings exist */
1232
1233         if (free_dv_buf) {
1234                 dma_region_free(&video->dv_buf);
1235                 video->dv_buf_size = 0;
1236         }
1237
1238         /* free packet buffer */
1239         dma_region_free(&video->packet_buf);
1240         video->packet_buf_size = 0;
1241
1242         debug_printk("dv1394: shutdown OK\n");
1243 }
1244
1245 /*
1246        **********************************
1247        *** MMAP() THEORY OF OPERATION ***
1248        **********************************
1249
1250         The ringbuffer cannot be re-allocated or freed while
1251         a user program maintains a mapping of it. (note that a mapping
1252         can persist even after the device fd is closed!)
1253
1254         So, only let the user process allocate the DMA buffer once.
1255         To resize or deallocate it, you must close the device file
1256         and open it again.
1257
1258         Previously Dan M. hacked out a scheme that allowed the DMA
1259         buffer to change by forcefully unmapping it from the user's
1260         address space. It was prone to error because it's very hard to
1261         track all the places the buffer could have been mapped (we
1262         would have had to walk the vma list of every process in the
1263         system to be sure we found all the mappings!). Instead, we
1264         force the user to choose one buffer size and stick with
1265         it. This small sacrifice is worth the huge reduction in
1266         error-prone code in dv1394.
1267 */
1268
1269 static int dv1394_mmap(struct file *file, struct vm_area_struct *vma)
1270 {
1271         struct video_card *video = file_to_video_card(file);
1272         int retval = -EINVAL;
1273
1274         /* serialize mmap */
1275         mutex_lock(&video->mtx);
1276
1277         if ( ! video_card_initialized(video) ) {
1278                 retval = do_dv1394_init_default(video);
1279                 if (retval)
1280                         goto out;
1281         }
1282
1283         retval = dma_region_mmap(&video->dv_buf, file, vma);
1284 out:
1285         mutex_unlock(&video->mtx);
1286         return retval;
1287 }
1288
1289 /*** DEVICE FILE INTERFACE *************************************************/
1290
1291 /* no need to serialize, multiple threads OK */
1292 static unsigned int dv1394_poll(struct file *file, struct poll_table_struct *wait)
1293 {
1294         struct video_card *video = file_to_video_card(file);
1295         unsigned int mask = 0;
1296         unsigned long flags;
1297
1298         poll_wait(file, &video->waitq, wait);
1299
1300         spin_lock_irqsave(&video->spinlock, flags);
1301         if ( video->n_frames == 0 ) {
1302
1303         } else if ( video->active_frame == -1 ) {
1304                 /* nothing going on */
1305                 mask |= POLLOUT;
1306         } else {
1307                 /* any clear/ready buffers? */
1308                 if (video->n_clear_frames >0)
1309                         mask |= POLLOUT | POLLIN;
1310         }
1311         spin_unlock_irqrestore(&video->spinlock, flags);
1312
1313         return mask;
1314 }
1315
1316 static int dv1394_fasync(int fd, struct file *file, int on)
1317 {
1318         /* I just copied this code verbatim from Alan Cox's mouse driver example
1319            (Documentation/DocBook/) */
1320
1321         struct video_card *video = file_to_video_card(file);
1322
1323         int retval = fasync_helper(fd, file, on, &video->fasync);
1324
1325         if (retval < 0)
1326                 return retval;
1327         return 0;
1328 }
1329
1330 static ssize_t dv1394_write(struct file *file, const char __user *buffer, size_t count, loff_t *ppos)
1331 {
1332         struct video_card *video = file_to_video_card(file);
1333         DECLARE_WAITQUEUE(wait, current);
1334         ssize_t ret;
1335         size_t cnt;
1336         unsigned long flags;
1337         int target_frame;
1338
1339         /* serialize this to prevent multi-threaded mayhem */
1340         if (file->f_flags & O_NONBLOCK) {
1341                 if (!mutex_trylock(&video->mtx))
1342                         return -EAGAIN;
1343         } else {
1344                 if (mutex_lock_interruptible(&video->mtx))
1345                         return -ERESTARTSYS;
1346         }
1347
1348         if ( !video_card_initialized(video) ) {
1349                 ret = do_dv1394_init_default(video);
1350                 if (ret) {
1351                         mutex_unlock(&video->mtx);
1352                         return ret;
1353                 }
1354         }
1355
1356         ret = 0;
1357         add_wait_queue(&video->waitq, &wait);
1358
1359         while (count > 0) {
1360
1361                 /* must set TASK_INTERRUPTIBLE *before* checking for free
1362                    buffers; otherwise we could miss a wakeup if the interrupt
1363                    fires between the check and the schedule() */
1364
1365                 set_current_state(TASK_INTERRUPTIBLE);
1366
1367                 spin_lock_irqsave(&video->spinlock, flags);
1368
1369                 target_frame = video->first_clear_frame;
1370
1371                 spin_unlock_irqrestore(&video->spinlock, flags);
1372
1373                 if (video->frames[target_frame]->state == FRAME_CLEAR) {
1374
1375                         /* how much room is left in the target frame buffer */
1376                         cnt = video->frame_size - (video->write_off - target_frame * video->frame_size);
1377
1378                 } else {
1379                         /* buffer is already used */
1380                         cnt = 0;
1381                 }
1382
1383                 if (cnt > count)
1384                         cnt = count;
1385
1386                 if (cnt <= 0) {
1387                         /* no room left, gotta wait */
1388                         if (file->f_flags & O_NONBLOCK) {
1389                                 if (!ret)
1390                                         ret = -EAGAIN;
1391                                 break;
1392                         }
1393                         if (signal_pending(current)) {
1394                                 if (!ret)
1395                                         ret = -ERESTARTSYS;
1396                                 break;
1397                         }
1398
1399                         schedule();
1400
1401                         continue; /* start over from 'while(count > 0)...' */
1402                 }
1403
1404                 if (copy_from_user(video->dv_buf.kvirt + video->write_off, buffer, cnt)) {
1405                         if (!ret)
1406                                 ret = -EFAULT;
1407                         break;
1408                 }
1409
1410                 video->write_off = (video->write_off + cnt) % (video->n_frames * video->frame_size);
1411
1412                 count -= cnt;
1413                 buffer += cnt;
1414                 ret += cnt;
1415
1416                 if (video->write_off == video->frame_size * ((target_frame + 1) % video->n_frames))
1417                                 frame_prepare(video, target_frame);
1418         }
1419
1420         remove_wait_queue(&video->waitq, &wait);
1421         set_current_state(TASK_RUNNING);
1422         mutex_unlock(&video->mtx);
1423         return ret;
1424 }
1425
1426
1427 static ssize_t dv1394_read(struct file *file,  char __user *buffer, size_t count, loff_t *ppos)
1428 {
1429         struct video_card *video = file_to_video_card(file);
1430         DECLARE_WAITQUEUE(wait, current);
1431         ssize_t ret;
1432         size_t cnt;
1433         unsigned long flags;
1434         int target_frame;
1435
1436         /* serialize this to prevent multi-threaded mayhem */
1437         if (file->f_flags & O_NONBLOCK) {
1438                 if (!mutex_trylock(&video->mtx))
1439                         return -EAGAIN;
1440         } else {
1441                 if (mutex_lock_interruptible(&video->mtx))
1442                         return -ERESTARTSYS;
1443         }
1444
1445         if ( !video_card_initialized(video) ) {
1446                 ret = do_dv1394_init_default(video);
1447                 if (ret) {
1448                         mutex_unlock(&video->mtx);
1449                         return ret;
1450                 }
1451                 video->continuity_counter = -1;
1452
1453                 receive_packets(video);
1454
1455                 start_dma_receive(video);
1456         }
1457
1458         ret = 0;
1459         add_wait_queue(&video->waitq, &wait);
1460
1461         while (count > 0) {
1462
1463                 /* must set TASK_INTERRUPTIBLE *before* checking for free
1464                    buffers; otherwise we could miss a wakeup if the interrupt
1465                    fires between the check and the schedule() */
1466
1467                 set_current_state(TASK_INTERRUPTIBLE);
1468
1469                 spin_lock_irqsave(&video->spinlock, flags);
1470
1471                 target_frame = video->first_clear_frame;
1472
1473                 spin_unlock_irqrestore(&video->spinlock, flags);
1474
1475                 if (target_frame >= 0 &&
1476                         video->n_clear_frames > 0 &&
1477                         video->frames[target_frame]->state == FRAME_CLEAR) {
1478
1479                         /* how much room is left in the target frame buffer */
1480                         cnt = video->frame_size - (video->write_off - target_frame * video->frame_size);
1481
1482                 } else {
1483                         /* buffer is already used */
1484                         cnt = 0;
1485                 }
1486
1487                 if (cnt > count)
1488                         cnt = count;
1489
1490                 if (cnt <= 0) {
1491                         /* no room left, gotta wait */
1492                         if (file->f_flags & O_NONBLOCK) {
1493                                 if (!ret)
1494                                         ret = -EAGAIN;
1495                                 break;
1496                         }
1497                         if (signal_pending(current)) {
1498                                 if (!ret)
1499                                         ret = -ERESTARTSYS;
1500                                 break;
1501                         }
1502
1503                         schedule();
1504
1505                         continue; /* start over from 'while(count > 0)...' */
1506                 }
1507
1508                 if (copy_to_user(buffer, video->dv_buf.kvirt + video->write_off, cnt)) {
1509                                 if (!ret)
1510                                         ret = -EFAULT;
1511                                 break;
1512                 }
1513
1514                 video->write_off = (video->write_off + cnt) % (video->n_frames * video->frame_size);
1515
1516                 count -= cnt;
1517                 buffer += cnt;
1518                 ret += cnt;
1519
1520                 if (video->write_off == video->frame_size * ((target_frame + 1) % video->n_frames)) {
1521                         spin_lock_irqsave(&video->spinlock, flags);
1522                         video->n_clear_frames--;
1523                         video->first_clear_frame = (video->first_clear_frame + 1) % video->n_frames;
1524                         spin_unlock_irqrestore(&video->spinlock, flags);
1525                 }
1526         }
1527
1528         remove_wait_queue(&video->waitq, &wait);
1529         set_current_state(TASK_RUNNING);
1530         mutex_unlock(&video->mtx);
1531         return ret;
1532 }
1533
1534
1535 /*** DEVICE IOCTL INTERFACE ************************************************/
1536
1537 static long dv1394_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
1538 {
1539         struct video_card *video = file_to_video_card(file);
1540         unsigned long flags;
1541         int ret = -EINVAL;
1542         void __user *argp = (void __user *)arg;
1543
1544         DECLARE_WAITQUEUE(wait, current);
1545
1546         /* serialize this to prevent multi-threaded mayhem */
1547         if (file->f_flags & O_NONBLOCK) {
1548                 if (!mutex_trylock(&video->mtx))
1549                         return -EAGAIN;
1550         } else {
1551                 if (mutex_lock_interruptible(&video->mtx))
1552                         return -ERESTARTSYS;
1553         }
1554
1555         switch(cmd)
1556         {
1557         case DV1394_IOC_SUBMIT_FRAMES: {
1558                 unsigned int n_submit;
1559
1560                 if ( !video_card_initialized(video) ) {
1561                         ret = do_dv1394_init_default(video);
1562                         if (ret)
1563                                 goto out;
1564                 }
1565
1566                 n_submit = (unsigned int) arg;
1567
1568                 if (n_submit > video->n_frames) {
1569                         ret = -EINVAL;
1570                         goto out;
1571                 }
1572
1573                 while (n_submit > 0) {
1574
1575                         add_wait_queue(&video->waitq, &wait);
1576                         set_current_state(TASK_INTERRUPTIBLE);
1577
1578                         spin_lock_irqsave(&video->spinlock, flags);
1579
1580                         /* wait until video->first_clear_frame is really CLEAR */
1581                         while (video->frames[video->first_clear_frame]->state != FRAME_CLEAR) {
1582
1583                                 spin_unlock_irqrestore(&video->spinlock, flags);
1584
1585                                 if (signal_pending(current)) {
1586                                         remove_wait_queue(&video->waitq, &wait);
1587                                         set_current_state(TASK_RUNNING);
1588                                         ret = -EINTR;
1589                                         goto out;
1590                                 }
1591
1592                                 schedule();
1593                                 set_current_state(TASK_INTERRUPTIBLE);
1594
1595                                 spin_lock_irqsave(&video->spinlock, flags);
1596                         }
1597                         spin_unlock_irqrestore(&video->spinlock, flags);
1598
1599                         remove_wait_queue(&video->waitq, &wait);
1600                         set_current_state(TASK_RUNNING);
1601
1602                         frame_prepare(video, video->first_clear_frame);
1603
1604                         n_submit--;
1605                 }
1606
1607                 ret = 0;
1608                 break;
1609         }
1610
1611         case DV1394_IOC_WAIT_FRAMES: {
1612                 unsigned int n_wait;
1613
1614                 if ( !video_card_initialized(video) ) {
1615                         ret = -EINVAL;
1616                         goto out;
1617                 }
1618
1619                 n_wait = (unsigned int) arg;
1620
1621                 /* since we re-run the last frame on underflow, we will
1622                    never actually have n_frames clear frames; at most only
1623                    n_frames - 1 */
1624
1625                 if (n_wait > (video->n_frames-1) ) {
1626                         ret = -EINVAL;
1627                         goto out;
1628                 }
1629
1630                 add_wait_queue(&video->waitq, &wait);
1631                 set_current_state(TASK_INTERRUPTIBLE);
1632
1633                 spin_lock_irqsave(&video->spinlock, flags);
1634
1635                 while (video->n_clear_frames < n_wait) {
1636
1637                         spin_unlock_irqrestore(&video->spinlock, flags);
1638
1639                         if (signal_pending(current)) {
1640                                 remove_wait_queue(&video->waitq, &wait);
1641                                 set_current_state(TASK_RUNNING);
1642                                 ret = -EINTR;
1643                                 goto out;
1644                         }
1645
1646                         schedule();
1647                         set_current_state(TASK_INTERRUPTIBLE);
1648
1649                         spin_lock_irqsave(&video->spinlock, flags);
1650                 }
1651
1652                 spin_unlock_irqrestore(&video->spinlock, flags);
1653
1654                 remove_wait_queue(&video->waitq, &wait);
1655                 set_current_state(TASK_RUNNING);
1656                 ret = 0;
1657                 break;
1658         }
1659
1660         case DV1394_IOC_RECEIVE_FRAMES: {
1661                 unsigned int n_recv;
1662
1663                 if ( !video_card_initialized(video) ) {
1664                         ret = -EINVAL;
1665                         goto out;
1666                 }
1667
1668                 n_recv = (unsigned int) arg;
1669
1670                 /* at least one frame must be active */
1671                 if (n_recv > (video->n_frames-1) ) {
1672                         ret = -EINVAL;
1673                         goto out;
1674                 }
1675
1676                 spin_lock_irqsave(&video->spinlock, flags);
1677
1678                 /* release the clear frames */
1679                 video->n_clear_frames -= n_recv;
1680
1681                 /* advance the clear frame cursor */
1682                 video->first_clear_frame = (video->first_clear_frame + n_recv) % video->n_frames;
1683
1684                 /* reset dropped_frames */
1685                 video->dropped_frames = 0;
1686
1687                 spin_unlock_irqrestore(&video->spinlock, flags);
1688
1689                 ret = 0;
1690                 break;
1691         }
1692
1693         case DV1394_IOC_START_RECEIVE: {
1694                 if ( !video_card_initialized(video) ) {
1695                         ret = do_dv1394_init_default(video);
1696                         if (ret)
1697                                 goto out;
1698                 }
1699
1700                 video->continuity_counter = -1;
1701
1702                 receive_packets(video);
1703
1704                 start_dma_receive(video);
1705
1706                 ret = 0;
1707                 break;
1708         }
1709
1710         case DV1394_IOC_INIT: {
1711                 struct dv1394_init init;
1712                 if (!argp) {
1713                         ret = do_dv1394_init_default(video);
1714                 } else {
1715                         if (copy_from_user(&init, argp, sizeof(init))) {
1716                                 ret = -EFAULT;
1717                                 goto out;
1718                         }
1719                         ret = do_dv1394_init(video, &init);
1720                 }
1721                 break;
1722         }
1723
1724         case DV1394_IOC_SHUTDOWN:
1725                 do_dv1394_shutdown(video, 0);
1726                 ret = 0;
1727                 break;
1728
1729
1730         case DV1394_IOC_GET_STATUS: {
1731                 struct dv1394_status status;
1732
1733                 if ( !video_card_initialized(video) ) {
1734                         ret = -EINVAL;
1735                         goto out;
1736                 }
1737
1738                 status.init.api_version = DV1394_API_VERSION;
1739                 status.init.channel = video->channel;
1740                 status.init.n_frames = video->n_frames;
1741                 status.init.format = video->pal_or_ntsc;
1742                 status.init.cip_n = video->cip_n;
1743                 status.init.cip_d = video->cip_d;
1744                 status.init.syt_offset = video->syt_offset;
1745
1746                 status.first_clear_frame = video->first_clear_frame;
1747
1748                 /* the rest of the fields need to be locked against the interrupt */
1749                 spin_lock_irqsave(&video->spinlock, flags);
1750
1751                 status.active_frame = video->active_frame;
1752                 status.n_clear_frames = video->n_clear_frames;
1753
1754                 status.dropped_frames = video->dropped_frames;
1755
1756                 /* reset dropped_frames */
1757                 video->dropped_frames = 0;
1758
1759                 spin_unlock_irqrestore(&video->spinlock, flags);
1760
1761                 if (copy_to_user(argp, &status, sizeof(status))) {
1762                         ret = -EFAULT;
1763                         goto out;
1764                 }
1765
1766                 ret = 0;
1767                 break;
1768         }
1769
1770         default:
1771                 break;
1772         }
1773
1774  out:
1775         mutex_unlock(&video->mtx);
1776         return ret;
1777 }
1778
1779 /*** DEVICE FILE INTERFACE CONTINUED ***************************************/
1780
1781 static int dv1394_open(struct inode *inode, struct file *file)
1782 {
1783         struct video_card *video = NULL;
1784
1785         if (file->private_data) {
1786                 video = (struct video_card*) file->private_data;
1787
1788         } else {
1789                 /* look up the card by ID */
1790                 unsigned long flags;
1791
1792                 spin_lock_irqsave(&dv1394_cards_lock, flags);
1793                 if (!list_empty(&dv1394_cards)) {
1794                         struct video_card *p;
1795                         list_for_each_entry(p, &dv1394_cards, list) {
1796                                 if ((p->id) == ieee1394_file_to_instance(file)) {
1797                                         video = p;
1798                                         break;
1799                                 }
1800                         }
1801                 }
1802                 spin_unlock_irqrestore(&dv1394_cards_lock, flags);
1803
1804                 if (!video) {
1805                         debug_printk("dv1394: OHCI card %d not found", ieee1394_file_to_instance(file));
1806                         return -ENODEV;
1807                 }
1808
1809                 file->private_data = (void*) video;
1810         }
1811
1812 #ifndef DV1394_ALLOW_MORE_THAN_ONE_OPEN
1813
1814         if ( test_and_set_bit(0, &video->open) ) {
1815                 /* video is already open by someone else */
1816                 return -EBUSY;
1817         }
1818
1819 #endif
1820
1821         return 0;
1822 }
1823
1824
1825 static int dv1394_release(struct inode *inode, struct file *file)
1826 {
1827         struct video_card *video = file_to_video_card(file);
1828
1829         /* OK to free the DMA buffer, no more mappings can exist */
1830         do_dv1394_shutdown(video, 1);
1831
1832         /* clean up async I/O users */
1833         dv1394_fasync(-1, file, 0);
1834
1835         /* give someone else a turn */
1836         clear_bit(0, &video->open);
1837
1838         return 0;
1839 }
1840
1841
1842 /*** DEVICE DRIVER HANDLERS ************************************************/
1843
1844 static void it_tasklet_func(unsigned long data)
1845 {
1846         int wake = 0;
1847         struct video_card *video = (struct video_card*) data;
1848
1849         spin_lock(&video->spinlock);
1850
1851         if (!video->dma_running)
1852                 goto out;
1853
1854         irq_printk("ContextControl = %08x, CommandPtr = %08x\n",
1855                reg_read(video->ohci, video->ohci_IsoXmitContextControlSet),
1856                reg_read(video->ohci, video->ohci_IsoXmitCommandPtr)
1857                );
1858
1859
1860         if ( (video->ohci_it_ctx != -1) &&
1861             (reg_read(video->ohci, video->ohci_IsoXmitContextControlSet) & (1 << 10)) ) {
1862
1863                 struct frame *f;
1864                 unsigned int frame, i;
1865
1866
1867                 if (video->active_frame == -1)
1868                         frame = 0;
1869                 else
1870                         frame = video->active_frame;
1871
1872                 /* check all the DMA-able frames */
1873                 for (i = 0; i < video->n_frames; i++, frame = (frame+1) % video->n_frames) {
1874
1875                         irq_printk("IRQ checking frame %d...", frame);
1876                         f = video->frames[frame];
1877                         if (f->state != FRAME_READY) {
1878                                 irq_printk("clear, skipping\n");
1879                                 /* we don't own this frame */
1880                                 continue;
1881                         }
1882
1883                         irq_printk("DMA\n");
1884
1885                         /* check the frame begin semaphore to see if we can free the previous frame */
1886                         if ( *(f->frame_begin_timestamp) ) {
1887                                 int prev_frame;
1888                                 struct frame *prev_f;
1889
1890
1891
1892                                 /* don't reset, need this later *(f->frame_begin_timestamp) = 0; */
1893                                 irq_printk("  BEGIN\n");
1894
1895                                 prev_frame = frame - 1;
1896                                 if (prev_frame == -1)
1897                                         prev_frame += video->n_frames;
1898                                 prev_f = video->frames[prev_frame];
1899
1900                                 /* make sure we can actually garbage collect
1901                                    this frame */
1902                                 if ( (prev_f->state == FRAME_READY) &&
1903                                     prev_f->done && (!f->done) )
1904                                 {
1905                                         frame_reset(prev_f);
1906                                         video->n_clear_frames++;
1907                                         wake = 1;
1908                                         video->active_frame = frame;
1909
1910                                         irq_printk("  BEGIN - freeing previous frame %d, new active frame is %d\n", prev_frame, frame);
1911                                 } else {
1912                                         irq_printk("  BEGIN - can't free yet\n");
1913                                 }
1914
1915                                 f->done = 1;
1916                         }
1917
1918
1919                         /* see if we need to set the timestamp for the next frame */
1920                         if ( *(f->mid_frame_timestamp) ) {
1921                                 struct frame *next_frame;
1922                                 u32 begin_ts, ts_cyc, ts_off;
1923
1924                                 *(f->mid_frame_timestamp) = 0;
1925
1926                                 begin_ts = le32_to_cpu(*(f->frame_begin_timestamp));
1927
1928                                 irq_printk("  MIDDLE - first packet was sent at cycle %4u (%2u), assigned timestamp was (%2u) %4u\n",
1929                                            begin_ts & 0x1FFF, begin_ts & 0xF,
1930                                            f->assigned_timestamp >> 12, f->assigned_timestamp & 0xFFF);
1931
1932                                 /* prepare next frame and assign timestamp */
1933                                 next_frame = video->frames[ (frame+1) % video->n_frames ];
1934
1935                                 if (next_frame->state == FRAME_READY) {
1936                                         irq_printk("  MIDDLE - next frame is ready, good\n");
1937                                 } else {
1938                                         debug_printk("dv1394: Underflow! At least one frame has been dropped.\n");
1939                                         next_frame = f;
1940                                 }
1941
1942                                 /* set the timestamp to the timestamp of the last frame sent,
1943                                    plus the length of the last frame sent, plus the syt latency */
1944                                 ts_cyc = begin_ts & 0xF;
1945                                 /* advance one frame, plus syt latency (typically 2-3) */
1946                                 ts_cyc += f->n_packets + video->syt_offset ;
1947
1948                                 ts_off = 0;
1949
1950                                 ts_cyc += ts_off/3072;
1951                                 ts_off %= 3072;
1952
1953                                 next_frame->assigned_timestamp = ((ts_cyc&0xF) << 12) + ts_off;
1954                                 if (next_frame->cip_syt1) {
1955                                         next_frame->cip_syt1->b[6] = next_frame->assigned_timestamp >> 8;
1956                                         next_frame->cip_syt1->b[7] = next_frame->assigned_timestamp & 0xFF;
1957                                 }
1958                                 if (next_frame->cip_syt2) {
1959                                         next_frame->cip_syt2->b[6] = next_frame->assigned_timestamp >> 8;
1960                                         next_frame->cip_syt2->b[7] = next_frame->assigned_timestamp & 0xFF;
1961                                 }
1962
1963                         }
1964
1965                         /* see if the frame looped */
1966                         if ( *(f->frame_end_timestamp) ) {
1967
1968                                 *(f->frame_end_timestamp) = 0;
1969
1970                                 debug_printk("  END - the frame looped at least once\n");
1971
1972                                 video->dropped_frames++;
1973                         }
1974
1975                 } /* for (each frame) */
1976         }
1977
1978         if (wake) {
1979                 kill_fasync(&video->fasync, SIGIO, POLL_OUT);
1980
1981                 /* wake readers/writers/ioctl'ers */
1982                 wake_up_interruptible(&video->waitq);
1983         }
1984
1985 out:
1986         spin_unlock(&video->spinlock);
1987 }
1988
1989 static void ir_tasklet_func(unsigned long data)
1990 {
1991         int wake = 0;
1992         struct video_card *video = (struct video_card*) data;
1993
1994         spin_lock(&video->spinlock);
1995
1996         if (!video->dma_running)
1997                 goto out;
1998
1999         if ( (video->ohci_ir_ctx != -1) &&
2000             (reg_read(video->ohci, video->ohci_IsoRcvContextControlSet) & (1 << 10)) ) {
2001
2002                 int sof=0; /* start-of-frame flag */
2003                 struct frame *f;
2004                 u16 packet_length, packet_time;
2005                 int i, dbc=0;
2006                 struct DMA_descriptor_block *block = NULL;
2007                 u16 xferstatus;
2008
2009                 int next_i, prev_i;
2010                 struct DMA_descriptor_block *next = NULL;
2011                 dma_addr_t next_dma = 0;
2012                 struct DMA_descriptor_block *prev = NULL;
2013
2014                 /* loop over all descriptors in all frames */
2015                 for (i = 0; i < video->n_frames*MAX_PACKETS; i++) {
2016                         struct packet *p = dma_region_i(&video->packet_buf, struct packet, video->current_packet);
2017
2018                         /* make sure we are seeing the latest changes to p */
2019                         dma_region_sync_for_cpu(&video->packet_buf,
2020                                                 (unsigned long) p - (unsigned long) video->packet_buf.kvirt,
2021                                                 sizeof(struct packet));
2022
2023                         packet_length = le16_to_cpu(p->data_length);
2024                         packet_time   = le16_to_cpu(p->timestamp);
2025
2026                         irq_printk("received packet %02d, timestamp=%04x, length=%04x, sof=%02x%02x\n", video->current_packet,
2027                                    packet_time, packet_length,
2028                                    p->data[0], p->data[1]);
2029
2030                         /* get the descriptor based on packet_buffer cursor */
2031                         f = video->frames[video->current_packet / MAX_PACKETS];
2032                         block = &(f->descriptor_pool[video->current_packet % MAX_PACKETS]);
2033                         xferstatus = le32_to_cpu(block->u.in.il.q[3]) >> 16;
2034                         xferstatus &= 0x1F;
2035                         irq_printk("ir_tasklet_func: xferStatus/resCount [%d] = 0x%08x\n", i, le32_to_cpu(block->u.in.il.q[3]) );
2036
2037                         /* get the current frame */
2038                         f = video->frames[video->active_frame];
2039
2040                         /* exclude empty packet */
2041                         if (packet_length > 8 && xferstatus == 0x11) {
2042                                 /* check for start of frame */
2043                                 /* DRD> Changed to check section type ([0]>>5==0)
2044                                    and dif sequence ([1]>>4==0) */
2045                                 sof = ( (p->data[0] >> 5) == 0 && (p->data[1] >> 4) == 0);
2046
2047                                 dbc = (int) (p->cip_h1 >> 24);
2048                                 if ( video->continuity_counter != -1 && dbc > ((video->continuity_counter + 1) % 256) )
2049                                 {
2050                                         printk(KERN_WARNING "dv1394: discontinuity detected, dropping all frames\n" );
2051                                         video->dropped_frames += video->n_clear_frames + 1;
2052                                         video->first_frame = 0;
2053                                         video->n_clear_frames = 0;
2054                                         video->first_clear_frame = -1;
2055                                 }
2056                                 video->continuity_counter = dbc;
2057
2058                                 if (!video->first_frame) {
2059                                         if (sof) {
2060                                                 video->first_frame = 1;
2061                                         }
2062
2063                                 } else if (sof) {
2064                                         /* close current frame */
2065                                         frame_reset(f);  /* f->state = STATE_CLEAR */
2066                                         video->n_clear_frames++;
2067                                         if (video->n_clear_frames > video->n_frames) {
2068                                                 video->dropped_frames++;
2069                                                 printk(KERN_WARNING "dv1394: dropped a frame during reception\n" );
2070                                                 video->n_clear_frames = video->n_frames-1;
2071                                                 video->first_clear_frame = (video->first_clear_frame + 1) % video->n_frames;
2072                                         }
2073                                         if (video->first_clear_frame == -1)
2074                                                 video->first_clear_frame = video->active_frame;
2075
2076                                         /* get the next frame */
2077                                         video->active_frame = (video->active_frame + 1) % video->n_frames;
2078                                         f = video->frames[video->active_frame];
2079                                         irq_printk("   frame received, active_frame = %d, n_clear_frames = %d, first_clear_frame = %d\n",
2080                                                    video->active_frame, video->n_clear_frames, video->first_clear_frame);
2081                                 }
2082                                 if (video->first_frame) {
2083                                         if (sof) {
2084                                                 /* open next frame */
2085                                                 f->state = FRAME_READY;
2086                                         }
2087
2088                                         /* copy to buffer */
2089                                         if (f->n_packets > (video->frame_size / 480)) {
2090                                                 printk(KERN_ERR "frame buffer overflow during receive\n");
2091                                         }
2092
2093                                         frame_put_packet(f, p);
2094
2095                                 } /* first_frame */
2096                         }
2097
2098                         /* stop, end of ready packets */
2099                         else if (xferstatus == 0) {
2100                                 break;
2101                         }
2102
2103                         /* reset xferStatus & resCount */
2104                         block->u.in.il.q[3] = cpu_to_le32(512);
2105
2106                         /* terminate dma chain at this (next) packet */
2107                         next_i = video->current_packet;
2108                         f = video->frames[next_i / MAX_PACKETS];
2109                         next = &(f->descriptor_pool[next_i % MAX_PACKETS]);
2110                         next_dma = ((unsigned long) block - (unsigned long) f->descriptor_pool) + f->descriptor_pool_dma;
2111                         next->u.in.il.q[0] |= 3 << 20; /* enable interrupt */
2112                         next->u.in.il.q[2] = 0; /* disable branch */
2113
2114                         /* link previous to next */
2115                         prev_i = (next_i == 0) ? (MAX_PACKETS * video->n_frames - 1) : (next_i - 1);
2116                         f = video->frames[prev_i / MAX_PACKETS];
2117                         prev = &(f->descriptor_pool[prev_i % MAX_PACKETS]);
2118                         if (prev_i % (MAX_PACKETS/2)) {
2119                                 prev->u.in.il.q[0] &= ~(3 << 20); /* no interrupt */
2120                         } else {
2121                                 prev->u.in.il.q[0] |= 3 << 20; /* enable interrupt */
2122                         }
2123                         prev->u.in.il.q[2] = cpu_to_le32(next_dma | 1); /* set Z=1 */
2124                         wmb();
2125
2126                         /* wake up DMA in case it fell asleep */
2127                         reg_write(video->ohci, video->ohci_IsoRcvContextControlSet, (1 << 12));
2128
2129                         /* advance packet_buffer cursor */
2130                         video->current_packet = (video->current_packet + 1) % (MAX_PACKETS * video->n_frames);
2131
2132                 } /* for all packets */
2133
2134                 wake = 1; /* why the hell not? */
2135
2136         } /* receive interrupt */
2137
2138         if (wake) {
2139                 kill_fasync(&video->fasync, SIGIO, POLL_IN);
2140
2141                 /* wake readers/writers/ioctl'ers */
2142                 wake_up_interruptible(&video->waitq);
2143         }
2144
2145 out:
2146         spin_unlock(&video->spinlock);
2147 }
2148
2149 static struct cdev dv1394_cdev;
2150 static const struct file_operations dv1394_fops=
2151 {
2152         .owner =        THIS_MODULE,
2153         .poll =         dv1394_poll,
2154         .unlocked_ioctl = dv1394_ioctl,
2155 #ifdef CONFIG_COMPAT
2156         .compat_ioctl = dv1394_compat_ioctl,
2157 #endif
2158         .mmap =         dv1394_mmap,
2159         .open =         dv1394_open,
2160         .write =        dv1394_write,
2161         .read =         dv1394_read,
2162         .release =      dv1394_release,
2163         .fasync =       dv1394_fasync,
2164 };
2165
2166
2167 /*** HOTPLUG STUFF **********************************************************/
2168 /*
2169  * Export information about protocols/devices supported by this driver.
2170  */
2171 static struct ieee1394_device_id dv1394_id_table[] = {
2172         {
2173                 .match_flags    = IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION,
2174                 .specifier_id   = AVC_UNIT_SPEC_ID_ENTRY & 0xffffff,
2175                 .version        = AVC_SW_VERSION_ENTRY & 0xffffff
2176         },
2177         { }
2178 };
2179
2180 MODULE_DEVICE_TABLE(ieee1394, dv1394_id_table);
2181
2182 static struct hpsb_protocol_driver dv1394_driver = {
2183         .name           = "dv1394",
2184         .id_table       = dv1394_id_table,
2185 };
2186
2187
2188 /*** IEEE1394 HPSB CALLBACKS ***********************************************/
2189
2190 static int dv1394_init(struct ti_ohci *ohci, enum pal_or_ntsc format, enum modes mode)
2191 {
2192         struct video_card *video;
2193         unsigned long flags;
2194         int i;
2195
2196         video = kzalloc(sizeof(*video), GFP_KERNEL);
2197         if (!video) {
2198                 printk(KERN_ERR "dv1394: cannot allocate video_card\n");
2199                 return -1;
2200         }
2201
2202         video->ohci = ohci;
2203         /* lower 2 bits of id indicate which of four "plugs"
2204            per host */
2205         video->id = ohci->host->id << 2;
2206         if (format == DV1394_NTSC)
2207                 video->id |= mode;
2208         else
2209                 video->id |= 2 + mode;
2210
2211         video->ohci_it_ctx = -1;
2212         video->ohci_ir_ctx = -1;
2213
2214         video->ohci_IsoXmitContextControlSet = 0;
2215         video->ohci_IsoXmitContextControlClear = 0;
2216         video->ohci_IsoXmitCommandPtr = 0;
2217
2218         video->ohci_IsoRcvContextControlSet = 0;
2219         video->ohci_IsoRcvContextControlClear = 0;
2220         video->ohci_IsoRcvCommandPtr = 0;
2221         video->ohci_IsoRcvContextMatch = 0;
2222
2223         video->n_frames = 0; /* flag that video is not initialized */
2224         video->channel = 63; /* default to broadcast channel */
2225         video->active_frame = -1;
2226
2227         /* initialize the following */
2228         video->pal_or_ntsc = format;
2229         video->cip_n = 0; /* 0 = use builtin default */
2230         video->cip_d = 0;
2231         video->syt_offset = 0;
2232         video->mode = mode;
2233
2234         for (i = 0; i < DV1394_MAX_FRAMES; i++)
2235                 video->frames[i] = NULL;
2236
2237         dma_region_init(&video->dv_buf);
2238         video->dv_buf_size = 0;
2239         dma_region_init(&video->packet_buf);
2240         video->packet_buf_size = 0;
2241
2242         clear_bit(0, &video->open);
2243         spin_lock_init(&video->spinlock);
2244         video->dma_running = 0;
2245         mutex_init(&video->mtx);
2246         init_waitqueue_head(&video->waitq);
2247         video->fasync = NULL;
2248
2249         spin_lock_irqsave(&dv1394_cards_lock, flags);
2250         INIT_LIST_HEAD(&video->list);
2251         list_add_tail(&video->list, &dv1394_cards);
2252         spin_unlock_irqrestore(&dv1394_cards_lock, flags);
2253
2254         debug_printk("dv1394: dv1394_init() OK on ID %d\n", video->id);
2255         return 0;
2256 }
2257
2258 static void dv1394_remove_host(struct hpsb_host *host)
2259 {
2260         struct video_card *video, *tmp_video;
2261         unsigned long flags;
2262         int found_ohci_card = 0;
2263
2264         do {
2265                 video = NULL;
2266                 spin_lock_irqsave(&dv1394_cards_lock, flags);
2267                 list_for_each_entry(tmp_video, &dv1394_cards, list) {
2268                         if ((tmp_video->id >> 2) == host->id) {
2269                                 list_del(&tmp_video->list);
2270                                 video = tmp_video;
2271                                 found_ohci_card = 1;
2272                                 break;
2273                         }
2274                 }
2275                 spin_unlock_irqrestore(&dv1394_cards_lock, flags);
2276
2277                 if (video) {
2278                         do_dv1394_shutdown(video, 1);
2279                         kfree(video);
2280                 }
2281         } while (video);
2282
2283         if (found_ohci_card)
2284                 class_device_destroy(hpsb_protocol_class, MKDEV(IEEE1394_MAJOR,
2285                            IEEE1394_MINOR_BLOCK_DV1394 * 16 + (host->id << 2)));
2286 }
2287
2288 static void dv1394_add_host(struct hpsb_host *host)
2289 {
2290         struct ti_ohci *ohci;
2291         int id = host->id;
2292
2293         /* We only work with the OHCI-1394 driver */
2294         if (strcmp(host->driver->name, OHCI1394_DRIVER_NAME))
2295                 return;
2296
2297         ohci = (struct ti_ohci *)host->hostdata;
2298
2299         class_device_create(hpsb_protocol_class, NULL, MKDEV(
2300                 IEEE1394_MAJOR, IEEE1394_MINOR_BLOCK_DV1394 * 16 + (id<<2)),
2301                 NULL, "dv1394-%d", id);
2302
2303         dv1394_init(ohci, DV1394_NTSC, MODE_RECEIVE);
2304         dv1394_init(ohci, DV1394_NTSC, MODE_TRANSMIT);
2305         dv1394_init(ohci, DV1394_PAL, MODE_RECEIVE);
2306         dv1394_init(ohci, DV1394_PAL, MODE_TRANSMIT);
2307 }
2308
2309
2310 /* Bus reset handler. In the event of a bus reset, we may need to
2311    re-start the DMA contexts - otherwise the user program would
2312    end up waiting forever.
2313 */
2314
2315 static void dv1394_host_reset(struct hpsb_host *host)
2316 {
2317         struct ti_ohci *ohci;
2318         struct video_card *video = NULL, *tmp_vid;
2319         unsigned long flags;
2320
2321         /* We only work with the OHCI-1394 driver */
2322         if (strcmp(host->driver->name, OHCI1394_DRIVER_NAME))
2323                 return;
2324
2325         ohci = (struct ti_ohci *)host->hostdata;
2326
2327
2328         /* find the corresponding video_cards */
2329         spin_lock_irqsave(&dv1394_cards_lock, flags);
2330         list_for_each_entry(tmp_vid, &dv1394_cards, list) {
2331                 if ((tmp_vid->id >> 2) == host->id) {
2332                         video = tmp_vid;
2333                         break;
2334                 }
2335         }
2336         spin_unlock_irqrestore(&dv1394_cards_lock, flags);
2337
2338         if (!video)
2339                 return;
2340
2341
2342         spin_lock_irqsave(&video->spinlock, flags);
2343
2344         if (!video->dma_running)
2345                 goto out;
2346
2347         /* check IT context */
2348         if (video->ohci_it_ctx != -1) {
2349                 u32 ctx;
2350
2351                 ctx = reg_read(video->ohci, video->ohci_IsoXmitContextControlSet);
2352
2353                 /* if (RUN but not ACTIVE) */
2354                 if ( (ctx & (1<<15)) &&
2355                     !(ctx & (1<<10)) ) {
2356
2357                         debug_printk("dv1394: IT context stopped due to bus reset; waking it up\n");
2358
2359                         /* to be safe, assume a frame has been dropped. User-space programs
2360                            should handle this condition like an underflow. */
2361                         video->dropped_frames++;
2362
2363                         /* for some reason you must clear, then re-set the RUN bit to restart DMA */
2364
2365                         /* clear RUN */
2366                         reg_write(video->ohci, video->ohci_IsoXmitContextControlClear, (1 << 15));
2367                         flush_pci_write(video->ohci);
2368
2369                         /* set RUN */
2370                         reg_write(video->ohci, video->ohci_IsoXmitContextControlSet, (1 << 15));
2371                         flush_pci_write(video->ohci);
2372
2373                         /* set the WAKE bit (just in case; this isn't strictly necessary) */
2374                         reg_write(video->ohci, video->ohci_IsoXmitContextControlSet, (1 << 12));
2375                         flush_pci_write(video->ohci);
2376
2377                         irq_printk("dv1394: AFTER IT restart ctx 0x%08x ptr 0x%08x\n",
2378                                    reg_read(video->ohci, video->ohci_IsoXmitContextControlSet),
2379                                    reg_read(video->ohci, video->ohci_IsoXmitCommandPtr));
2380                 }
2381         }
2382
2383         /* check IR context */
2384         if (video->ohci_ir_ctx != -1) {
2385                 u32 ctx;
2386
2387                 ctx = reg_read(video->ohci, video->ohci_IsoRcvContextControlSet);
2388
2389                 /* if (RUN but not ACTIVE) */
2390                 if ( (ctx & (1<<15)) &&
2391                     !(ctx & (1<<10)) ) {
2392
2393                         debug_printk("dv1394: IR context stopped due to bus reset; waking it up\n");
2394
2395                         /* to be safe, assume a frame has been dropped. User-space programs
2396                            should handle this condition like an overflow. */
2397                         video->dropped_frames++;
2398
2399                         /* for some reason you must clear, then re-set the RUN bit to restart DMA */
2400                         /* XXX this doesn't work for me, I can't get IR DMA to restart :[ */
2401
2402                         /* clear RUN */
2403                         reg_write(video->ohci, video->ohci_IsoRcvContextControlClear, (1 << 15));
2404                         flush_pci_write(video->ohci);
2405
2406                         /* set RUN */
2407                         reg_write(video->ohci, video->ohci_IsoRcvContextControlSet, (1 << 15));
2408                         flush_pci_write(video->ohci);
2409
2410                         /* set the WAKE bit (just in case; this isn't strictly necessary) */
2411                         reg_write(video->ohci, video->ohci_IsoRcvContextControlSet, (1 << 12));
2412                         flush_pci_write(video->ohci);
2413
2414                         irq_printk("dv1394: AFTER IR restart ctx 0x%08x ptr 0x%08x\n",
2415                                    reg_read(video->ohci, video->ohci_IsoRcvContextControlSet),
2416                                    reg_read(video->ohci, video->ohci_IsoRcvCommandPtr));
2417                 }
2418         }
2419
2420 out:
2421         spin_unlock_irqrestore(&video->spinlock, flags);
2422
2423         /* wake readers/writers/ioctl'ers */
2424         wake_up_interruptible(&video->waitq);
2425 }
2426
2427 static struct hpsb_highlevel dv1394_highlevel = {
2428         .name =         "dv1394",
2429         .add_host =     dv1394_add_host,
2430         .remove_host =  dv1394_remove_host,
2431         .host_reset =   dv1394_host_reset,
2432 };
2433
2434 #ifdef CONFIG_COMPAT
2435
2436 #define DV1394_IOC32_INIT       _IOW('#', 0x06, struct dv1394_init32)
2437 #define DV1394_IOC32_GET_STATUS _IOR('#', 0x0c, struct dv1394_status32)
2438
2439 struct dv1394_init32 {
2440         u32 api_version;
2441         u32 channel;
2442         u32 n_frames;
2443         u32 format;
2444         u32 cip_n;
2445         u32 cip_d;
2446         u32 syt_offset;
2447 };
2448
2449 struct dv1394_status32 {
2450         struct dv1394_init32 init;
2451         s32 active_frame;
2452         u32 first_clear_frame;
2453         u32 n_clear_frames;
2454         u32 dropped_frames;
2455 };
2456
2457 /* RED-PEN: this should use compat_alloc_userspace instead */
2458
2459 static int handle_dv1394_init(struct file *file, unsigned int cmd, unsigned long arg)
2460 {
2461         struct dv1394_init32 dv32;
2462         struct dv1394_init dv;
2463         mm_segment_t old_fs;
2464         int ret;
2465
2466         if (file->f_op->unlocked_ioctl != dv1394_ioctl)
2467                 return -EFAULT;
2468
2469         if (copy_from_user(&dv32, (void __user *)arg, sizeof(dv32)))
2470                 return -EFAULT;
2471
2472         dv.api_version = dv32.api_version;
2473         dv.channel = dv32.channel;
2474         dv.n_frames = dv32.n_frames;
2475         dv.format = dv32.format;
2476         dv.cip_n = (unsigned long)dv32.cip_n;
2477         dv.cip_d = (unsigned long)dv32.cip_d;
2478         dv.syt_offset = dv32.syt_offset;
2479
2480         old_fs = get_fs();
2481         set_fs(KERNEL_DS);
2482         ret = dv1394_ioctl(file, DV1394_IOC_INIT, (unsigned long)&dv);
2483         set_fs(old_fs);
2484
2485         return ret;
2486 }
2487
2488 static int handle_dv1394_get_status(struct file *file, unsigned int cmd, unsigned long arg)
2489 {
2490         struct dv1394_status32 dv32;
2491         struct dv1394_status dv;
2492         mm_segment_t old_fs;
2493         int ret;
2494
2495         if (file->f_op->unlocked_ioctl != dv1394_ioctl)
2496                 return -EFAULT;
2497
2498         old_fs = get_fs();
2499         set_fs(KERNEL_DS);
2500         ret = dv1394_ioctl(file, DV1394_IOC_GET_STATUS, (unsigned long)&dv);
2501         set_fs(old_fs);
2502
2503         if (!ret) {
2504                 dv32.init.api_version = dv.init.api_version;
2505                 dv32.init.channel = dv.init.channel;
2506                 dv32.init.n_frames = dv.init.n_frames;
2507                 dv32.init.format = dv.init.format;
2508                 dv32.init.cip_n = (u32)dv.init.cip_n;
2509                 dv32.init.cip_d = (u32)dv.init.cip_d;
2510                 dv32.init.syt_offset = dv.init.syt_offset;
2511                 dv32.active_frame = dv.active_frame;
2512                 dv32.first_clear_frame = dv.first_clear_frame;
2513                 dv32.n_clear_frames = dv.n_clear_frames;
2514                 dv32.dropped_frames = dv.dropped_frames;
2515
2516                 if (copy_to_user((struct dv1394_status32 __user *)arg, &dv32, sizeof(dv32)))
2517                         ret = -EFAULT;
2518         }
2519
2520         return ret;
2521 }
2522
2523
2524
2525 static long dv1394_compat_ioctl(struct file *file, unsigned int cmd,
2526                                unsigned long arg)
2527 {
2528         switch (cmd) {
2529         case DV1394_IOC_SHUTDOWN:
2530         case DV1394_IOC_SUBMIT_FRAMES:
2531         case DV1394_IOC_WAIT_FRAMES:
2532         case DV1394_IOC_RECEIVE_FRAMES:
2533         case DV1394_IOC_START_RECEIVE:
2534                 return dv1394_ioctl(file, cmd, arg);
2535
2536         case DV1394_IOC32_INIT:
2537                 return handle_dv1394_init(file, cmd, arg);
2538         case DV1394_IOC32_GET_STATUS:
2539                 return handle_dv1394_get_status(file, cmd, arg);
2540         default:
2541                 return -ENOIOCTLCMD;
2542         }
2543 }
2544
2545 #endif /* CONFIG_COMPAT */
2546
2547
2548 /*** KERNEL MODULE HANDLERS ************************************************/
2549
2550 MODULE_AUTHOR("Dan Maas <dmaas@dcine.com>, Dan Dennedy <dan@dennedy.org>");
2551 MODULE_DESCRIPTION("driver for DV input/output on OHCI board");
2552 MODULE_SUPPORTED_DEVICE("dv1394");
2553 MODULE_LICENSE("GPL");
2554
2555 static void __exit dv1394_exit_module(void)
2556 {
2557         hpsb_unregister_protocol(&dv1394_driver);
2558         hpsb_unregister_highlevel(&dv1394_highlevel);
2559         cdev_del(&dv1394_cdev);
2560 }
2561
2562 static int __init dv1394_init_module(void)
2563 {
2564         int ret;
2565
2566         printk(KERN_WARNING
2567                "NOTE: The dv1394 driver is unsupported and may be removed in a "
2568                "future Linux release. Use raw1394 instead.\n");
2569
2570         cdev_init(&dv1394_cdev, &dv1394_fops);
2571         dv1394_cdev.owner = THIS_MODULE;
2572         kobject_set_name(&dv1394_cdev.kobj, "dv1394");
2573         ret = cdev_add(&dv1394_cdev, IEEE1394_DV1394_DEV, 16);
2574         if (ret) {
2575                 printk(KERN_ERR "dv1394: unable to register character device\n");
2576                 return ret;
2577         }
2578
2579         hpsb_register_highlevel(&dv1394_highlevel);
2580
2581         ret = hpsb_register_protocol(&dv1394_driver);
2582         if (ret) {
2583                 printk(KERN_ERR "dv1394: failed to register protocol\n");
2584                 hpsb_unregister_highlevel(&dv1394_highlevel);
2585                 cdev_del(&dv1394_cdev);
2586                 return ret;
2587         }
2588
2589         return 0;
2590 }
2591
2592 module_init(dv1394_init_module);
2593 module_exit(dv1394_exit_module);