drivers/infiniband/hw/ipath/ipath_intr.c

   1 /*
   2  * Copyright (c) 2006, 2007 QLogic Corporation. All rights reserved.
   3  * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
   4  *
   5  * This software is available to you under a choice of one of two
   6  * licenses.  You may choose to be licensed under the terms of the GNU
   7  * General Public License (GPL) Version 2, available from the file
   8  * COPYING in the main directory of this source tree, or the
   9  * OpenIB.org BSD license below:
  10  *
  11  *     Redistribution and use in source and binary forms, with or
  12  *     without modification, are permitted provided that the following
  13  *     conditions are met:
  14  *
  15  *      - Redistributions of source code must retain the above
  16  *        copyright notice, this list of conditions and the following
  17  *        disclaimer.
  18  *
  19  *      - Redistributions in binary form must reproduce the above
  20  *        copyright notice, this list of conditions and the following
  21  *        disclaimer in the documentation and/or other materials
  22  *        provided with the distribution.
  23  *
  24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31  * SOFTWARE.
  32  */
  33
  34 #include <linux/pci.h>
  35 #include <linux/delay.h>
  36
  37 #include "ipath_kernel.h"
  38 #include "ipath_verbs.h"
  39 #include "ipath_common.h"
  40
  41 /*
  42  * clear (write) a pio buffer, to clear a parity error.   This routine
  43  * should only be called when in freeze mode, and the buffer should be
  44  * canceled afterwards.
  45  */
  46 static void ipath_clrpiobuf(struct ipath_devdata *dd, u32 pnum)
  47 {
  48         u32 __iomem *pbuf;
  49         u32 dwcnt; /* dword count to write */
  50         if (pnum < dd->ipath_piobcnt2k) {
  51                 pbuf = (u32 __iomem *) (dd->ipath_pio2kbase + pnum *
  52                         dd->ipath_palign);
  53                 dwcnt = dd->ipath_piosize2k >> 2;
  54         }
  55         else {
  56                 pbuf = (u32 __iomem *) (dd->ipath_pio4kbase +
  57                         (pnum - dd->ipath_piobcnt2k) * dd->ipath_4kalign);
  58                 dwcnt = dd->ipath_piosize4k >> 2;
  59         }
  60         dev_info(&dd->pcidev->dev,
  61                 "Rewrite PIO buffer %u, to recover from parity error\n",
  62                 pnum);
  63
  64         /* no flush required, since already in freeze */
  65         writel(dwcnt + 1, pbuf);
  66         while (--dwcnt)
  67                 writel(0, pbuf++);
  68 }
  69
  70 /*
  71  * Called when we might have an error that is specific to a particular
  72  * PIO buffer, and may need to cancel that buffer, so it can be re-used.
  73  * If rewrite is true, and bits are set in the sendbufferror registers,
  74  * we'll write to the buffer, for error recovery on parity errors.
  75  */
  76 static void ipath_disarm_senderrbufs(struct ipath_devdata *dd, int rewrite)
  77 {
  78         u32 piobcnt;
  79         unsigned long sbuf[4];
  80         /*
  81          * it's possible that sendbuffererror could have bits set; might
  82          * have already done this as a result of hardware error handling
  83          */
  84         piobcnt = dd->ipath_piobcnt2k + dd->ipath_piobcnt4k;
  85         /* read these before writing errorclear */
  86         sbuf[0] = ipath_read_kreg64(
  87                 dd, dd->ipath_kregs->kr_sendbuffererror);
  88         sbuf[1] = ipath_read_kreg64(
  89                 dd, dd->ipath_kregs->kr_sendbuffererror + 1);
  90         if (piobcnt > 128) {
  91                 sbuf[2] = ipath_read_kreg64(
  92                         dd, dd->ipath_kregs->kr_sendbuffererror + 2);
  93                 sbuf[3] = ipath_read_kreg64(
  94                         dd, dd->ipath_kregs->kr_sendbuffererror + 3);
  95         }
  96
  97         if (sbuf[0] || sbuf[1] || (piobcnt > 128 && (sbuf[2] || sbuf[3]))) {
  98                 int i;
  99                 if (ipath_debug & (__IPATH_PKTDBG|__IPATH_DBG) &&
 100                         dd->ipath_lastcancel > jiffies) {
 101                         __IPATH_DBG_WHICH(__IPATH_PKTDBG|__IPATH_DBG,
 102                                           "SendbufErrs %lx %lx", sbuf[0],
 103                                           sbuf[1]);
 104                         if (ipath_debug & __IPATH_PKTDBG && piobcnt > 128)
 105                                 printk(" %lx %lx ", sbuf[2], sbuf[3]);
 106                         printk("\n");
 107                 }
 108
 109                 for (i = 0; i < piobcnt; i++)
 110                         if (test_bit(i, sbuf)) {
 111                                 if (rewrite)
 112                                         ipath_clrpiobuf(dd, i);
 113                                 ipath_disarm_piobufs(dd, i, 1);
 114                         }
 115                 /* ignore armlaunch errs for a bit */
 116                 dd->ipath_lastcancel = jiffies+3;
 117         }
 118 }
 119
 120
 121 /* These are all rcv-related errors which we want to count for stats */
 122 #define E_SUM_PKTERRS \
 123         (INFINIPATH_E_RHDRLEN | INFINIPATH_E_RBADTID | \
 124          INFINIPATH_E_RBADVERSION | INFINIPATH_E_RHDR | \
 125          INFINIPATH_E_RLONGPKTLEN | INFINIPATH_E_RSHORTPKTLEN | \
 126          INFINIPATH_E_RMAXPKTLEN | INFINIPATH_E_RMINPKTLEN | \
 127          INFINIPATH_E_RFORMATERR | INFINIPATH_E_RUNSUPVL | \
 128          INFINIPATH_E_RUNEXPCHAR | INFINIPATH_E_REBP)
 129
 130 /* These are all send-related errors which we want to count for stats */
 131 #define E_SUM_ERRS \
 132         (INFINIPATH_E_SPIOARMLAUNCH | INFINIPATH_E_SUNEXPERRPKTNUM | \
 133          INFINIPATH_E_SDROPPEDDATAPKT | INFINIPATH_E_SDROPPEDSMPPKT | \
 134          INFINIPATH_E_SMAXPKTLEN | INFINIPATH_E_SUNSUPVL | \
 135          INFINIPATH_E_SMINPKTLEN | INFINIPATH_E_SPKTLEN | \
 136          INFINIPATH_E_INVALIDADDR)
 137
 138 /*
 139  * this is similar to E_SUM_ERRS, but can't ignore armlaunch, don't ignore
 140  * errors not related to freeze and cancelling buffers.  Can't ignore
 141  * armlaunch because could get more while still cleaning up, and need
 142  * to cancel those as they happen.
 143  */
 144 #define E_SPKT_ERRS_IGNORE \
 145          (INFINIPATH_E_SDROPPEDDATAPKT | INFINIPATH_E_SDROPPEDSMPPKT | \
 146          INFINIPATH_E_SMAXPKTLEN | INFINIPATH_E_SMINPKTLEN | \
 147          INFINIPATH_E_SPKTLEN)
 148
 149 /*
 150  * these are errors that can occur when the link changes state while
 151  * a packet is being sent or received.  This doesn't cover things
 152  * like EBP or VCRC that can be the result of a sending having the
 153  * link change state, so we receive a "known bad" packet.
 154  */
 155 #define E_SUM_LINK_PKTERRS \
 156         (INFINIPATH_E_SDROPPEDDATAPKT | INFINIPATH_E_SDROPPEDSMPPKT | \
 157          INFINIPATH_E_SMINPKTLEN | INFINIPATH_E_SPKTLEN | \
 158          INFINIPATH_E_RSHORTPKTLEN | INFINIPATH_E_RMINPKTLEN | \
 159          INFINIPATH_E_RUNEXPCHAR)
 160
 161 static u64 handle_e_sum_errs(struct ipath_devdata *dd, ipath_err_t errs)
 162 {
 163         u64 ignore_this_time = 0;
 164
 165         ipath_disarm_senderrbufs(dd, 0);
 166         if ((errs & E_SUM_LINK_PKTERRS) &&
 167             !(dd->ipath_flags & IPATH_LINKACTIVE)) {
 168                 /*
 169                  * This can happen when SMA is trying to bring the link
 170                  * up, but the IB link changes state at the "wrong" time.
 171                  * The IB logic then complains that the packet isn't
 172                  * valid.  We don't want to confuse people, so we just
 173                  * don't print them, except at debug
 174                  */
 175                 ipath_dbg("Ignoring packet errors %llx, because link not "
 176                           "ACTIVE\n", (unsigned long long) errs);
 177                 ignore_this_time = errs & E_SUM_LINK_PKTERRS;
 178         }
 179
 180         return ignore_this_time;
 181 }
 182
 183 /* generic hw error messages... */
 184 #define INFINIPATH_HWE_TXEMEMPARITYERR_MSG(a) \
 185         { \
 186                 .mask = ( INFINIPATH_HWE_TXEMEMPARITYERR_##a <<    \
 187                           INFINIPATH_HWE_TXEMEMPARITYERR_SHIFT ),   \
 188                 .msg = "TXE " #a " Memory Parity"            \
 189         }
 190 #define INFINIPATH_HWE_RXEMEMPARITYERR_MSG(a) \
 191         { \
 192                 .mask = ( INFINIPATH_HWE_RXEMEMPARITYERR_##a <<    \
 193                           INFINIPATH_HWE_RXEMEMPARITYERR_SHIFT ),   \
 194                 .msg = "RXE " #a " Memory Parity"            \
 195         }
 196
 197 static const struct ipath_hwerror_msgs ipath_generic_hwerror_msgs[] = {
 198         INFINIPATH_HWE_MSG(IBCBUSFRSPCPARITYERR, "IPATH2IB Parity"),
 199         INFINIPATH_HWE_MSG(IBCBUSTOSPCPARITYERR, "IB2IPATH Parity"),
 200
 201         INFINIPATH_HWE_TXEMEMPARITYERR_MSG(PIOBUF),
 202         INFINIPATH_HWE_TXEMEMPARITYERR_MSG(PIOPBC),
 203         INFINIPATH_HWE_TXEMEMPARITYERR_MSG(PIOLAUNCHFIFO),
 204
 205         INFINIPATH_HWE_RXEMEMPARITYERR_MSG(RCVBUF),
 206         INFINIPATH_HWE_RXEMEMPARITYERR_MSG(LOOKUPQ),
 207         INFINIPATH_HWE_RXEMEMPARITYERR_MSG(EAGERTID),
 208         INFINIPATH_HWE_RXEMEMPARITYERR_MSG(EXPTID),
 209         INFINIPATH_HWE_RXEMEMPARITYERR_MSG(FLAGBUF),
 210         INFINIPATH_HWE_RXEMEMPARITYERR_MSG(DATAINFO),
 211         INFINIPATH_HWE_RXEMEMPARITYERR_MSG(HDRINFO),
 212 };
 213
 214 /**
 215  * ipath_format_hwmsg - format a single hwerror message
 216  * @msg message buffer
 217  * @msgl length of message buffer
 218  * @hwmsg message to add to message buffer
 219  */
 220 static void ipath_format_hwmsg(char *msg, size_t msgl, const char *hwmsg)
 221 {
 222         strlcat(msg, "[", msgl);
 223         strlcat(msg, hwmsg, msgl);
 224         strlcat(msg, "]", msgl);
 225 }
 226
 227 /**
 228  * ipath_format_hwerrors - format hardware error messages for display
 229  * @hwerrs hardware errors bit vector
 230  * @hwerrmsgs hardware error descriptions
 231  * @nhwerrmsgs number of hwerrmsgs
 232  * @msg message buffer
 233  * @msgl message buffer length
 234  */
 235 void ipath_format_hwerrors(u64 hwerrs,
 236                            const struct ipath_hwerror_msgs *hwerrmsgs,
 237                            size_t nhwerrmsgs,
 238                            char *msg, size_t msgl)
 239 {
 240         int i;
 241         const int glen =
 242             sizeof(ipath_generic_hwerror_msgs) /
 243             sizeof(ipath_generic_hwerror_msgs[0]);
 244
 245         for (i=0; i<glen; i++) {
 246                 if (hwerrs & ipath_generic_hwerror_msgs[i].mask) {
 247                         ipath_format_hwmsg(msg, msgl,
 248                                            ipath_generic_hwerror_msgs[i].msg);
 249                 }
 250         }
 251
 252         for (i=0; i<nhwerrmsgs; i++) {
 253                 if (hwerrs & hwerrmsgs[i].mask) {
 254                         ipath_format_hwmsg(msg, msgl, hwerrmsgs[i].msg);
 255                 }
 256         }
 257 }
 258
 259 /* return the strings for the most common link states */
 260 static char *ib_linkstate(struct ipath_devdata *dd, u64 ibcs)
 261 {
 262         char *ret;
 263         u32 state;
 264
 265         state = ipath_ib_state(dd, ibcs);
 266         if (state == dd->ib_init)
 267                 ret = "Init";
 268         else if (state == dd->ib_arm)
 269                 ret = "Arm";
 270         else if (state == dd->ib_active)
 271                 ret = "Active";
 272         else
 273                 ret = "Down";
 274         return ret;
 275 }
 276
 277 void signal_ib_event(struct ipath_devdata *dd, enum ib_event_type ev)
 278 {
 279         struct ib_event event;
 280
 281         event.device = &dd->verbs_dev->ibdev;
 282         event.element.port_num = 1;
 283         event.event = ev;
 284         ib_dispatch_event(&event);
 285 }
 286
 287 static void handle_e_ibstatuschanged(struct ipath_devdata *dd,
 288                                      ipath_err_t errs)
 289 {
 290         u32 ltstate, lstate, ibstate, lastlstate;
 291         u32 init = dd->ib_init;
 292         u32 arm = dd->ib_arm;
 293         u32 active = dd->ib_active;
 294         const u64 ibcs = ipath_read_kreg64(dd, dd->ipath_kregs->kr_ibcstatus);
 295
 296         lstate = ipath_ib_linkstate(dd, ibcs); /* linkstate */
 297         ibstate = ipath_ib_state(dd, ibcs);
 298         /* linkstate at last interrupt */
 299         lastlstate = ipath_ib_linkstate(dd, dd->ipath_lastibcstat);
 300         ltstate = ipath_ib_linktrstate(dd, ibcs); /* linktrainingtate */
 301
 302         /*
 303          * if linkstate transitions into INIT from any of the various down
 304          * states, or if it transitions from any of the up (INIT or better)
 305          * states into any of the down states (except link recovery), then
 306          * call the chip-specific code to take appropriate actions.
 307          */
 308         if (lstate >= INFINIPATH_IBCS_L_STATE_INIT &&
 309                 lastlstate == INFINIPATH_IBCS_L_STATE_DOWN) {
 310                 /* transitioned to UP */
 311                 if (dd->ipath_f_ib_updown(dd, 1, ibcs)) {
 312                         ipath_cdbg(LINKVERB, "LinkUp handled, skipped\n");
 313                         goto skip_ibchange; /* chip-code handled */
 314                 }
 315         } else if ((lastlstate >= INFINIPATH_IBCS_L_STATE_INIT ||
 316                 (dd->ipath_flags & IPATH_IB_FORCE_NOTIFY)) &&
 317                 ltstate <= INFINIPATH_IBCS_LT_STATE_CFGDEBOUNCE &&
 318                 ltstate != INFINIPATH_IBCS_LT_STATE_LINKUP) {
 319                 int handled;
 320                 handled = dd->ipath_f_ib_updown(dd, 0, ibcs);
 321                 dd->ipath_flags &= ~IPATH_IB_FORCE_NOTIFY;
 322                 if (handled) {
 323                         ipath_cdbg(LINKVERB, "LinkDown handled, skipped\n");
 324                         goto skip_ibchange; /* chip-code handled */
 325                 }
 326         }
 327
 328         /*
 329          * Significant enough to always print and get into logs, if it was
 330          * unexpected.  If it was a requested state change, we'll have
 331          * already cleared the flags, so we won't print this warning
 332          */
 333         if ((ibstate != arm && ibstate != active) &&
 334             (dd->ipath_flags & (IPATH_LINKARMED | IPATH_LINKACTIVE))) {
 335                 dev_info(&dd->pcidev->dev, "Link state changed from %s "
 336                          "to %s\n", (dd->ipath_flags & IPATH_LINKARMED) ?
 337                          "ARM" : "ACTIVE", ib_linkstate(dd, ibcs));
 338         }
 339
 340         if (ltstate == INFINIPATH_IBCS_LT_STATE_POLLACTIVE ||
 341             ltstate == INFINIPATH_IBCS_LT_STATE_POLLQUIET) {
 342                 u32 lastlts;
 343                 lastlts = ipath_ib_linktrstate(dd, dd->ipath_lastibcstat);
 344                 /*
 345                  * Ignore cycling back and forth from Polling.Active to
 346                  * Polling.Quiet while waiting for the other end of the link
 347                  * to come up, except to try and decide if we are connected
 348                  * to a live IB device or not.  We will cycle back and
 349                  * forth between them if no cable is plugged in, the other
 350                  * device is powered off or disabled, etc.
 351                  */
 352                 if (lastlts == INFINIPATH_IBCS_LT_STATE_POLLACTIVE ||
 353                     lastlts == INFINIPATH_IBCS_LT_STATE_POLLQUIET) {
 354                         if (++dd->ipath_ibpollcnt == 40) {
 355                                 dd->ipath_flags |= IPATH_NOCABLE;
 356                                 *dd->ipath_statusp |=
 357                                         IPATH_STATUS_IB_NOCABLE;
 358                                 ipath_cdbg(LINKVERB, "Set NOCABLE\n");
 359                         }
 360                         ipath_cdbg(LINKVERB, "POLL change to %s (%x)\n",
 361                                 ipath_ibcstatus_str[ltstate], ibstate);
 362                         goto skip_ibchange;
 363                 }
 364         }
 365
 366         dd->ipath_ibpollcnt = 0; /* not poll*, now */
 367         ipath_stats.sps_iblink++;
 368
 369         if (ibstate == init || ibstate == arm || ibstate == active) {
 370                 *dd->ipath_statusp &= ~IPATH_STATUS_IB_NOCABLE;
 371                 if (ibstate == init || ibstate == arm) {
 372                         *dd->ipath_statusp &= ~IPATH_STATUS_IB_READY;
 373                         if (dd->ipath_flags & IPATH_LINKACTIVE)
 374                                 signal_ib_event(dd, IB_EVENT_PORT_ERR);
 375                 }
 376                 if (ibstate == arm) {
 377                         dd->ipath_flags |= IPATH_LINKARMED;
 378                         dd->ipath_flags &= ~(IPATH_LINKUNK |
 379                                 IPATH_LINKINIT | IPATH_LINKDOWN |
 380                                 IPATH_LINKACTIVE | IPATH_NOCABLE);
 381                         ipath_hol_down(dd);
 382                 } else  if (ibstate == init) {
 383                         /*
 384                          * set INIT and DOWN.  Down is checked by
 385                          * most of the other code, but INIT is
 386                          * useful to know in a few places.
 387                          */
 388                         dd->ipath_flags |= IPATH_LINKINIT |
 389                                 IPATH_LINKDOWN;
 390                         dd->ipath_flags &= ~(IPATH_LINKUNK |
 391                                 IPATH_LINKARMED | IPATH_LINKACTIVE |
 392                                 IPATH_NOCABLE);
 393                         ipath_hol_down(dd);
 394                 } else {  /* active */
 395                         *dd->ipath_statusp |=
 396                                 IPATH_STATUS_IB_READY | IPATH_STATUS_IB_CONF;
 397                         dd->ipath_flags |= IPATH_LINKACTIVE;
 398                         dd->ipath_flags &= ~(IPATH_LINKUNK | IPATH_LINKINIT
 399                                 | IPATH_LINKDOWN | IPATH_LINKARMED |
 400                                 IPATH_NOCABLE);
 401                         signal_ib_event(dd, IB_EVENT_PORT_ACTIVE);
 402                         /* LED active not handled in chip _f_updown */
 403                         dd->ipath_f_setextled(dd, lstate, ltstate);
 404                         ipath_hol_up(dd);
 405                 }
 406
 407                 /*
 408                  * print after we've already done the work, so as not to
 409                  * delay the state changes and notifications, for debugging
 410                  */
 411                 if (lstate == lastlstate)
 412                         ipath_cdbg(LINKVERB, "Unchanged from last: %s "
 413                                 "(%x)\n", ib_linkstate(dd, ibcs), ibstate);
 414                 else
 415                         ipath_cdbg(VERBOSE, "Unit %u: link up to %s %s (%x)\n",
 416                                   dd->ipath_unit, ib_linkstate(dd, ibcs),
 417                                   ipath_ibcstatus_str[ltstate],  ibstate);
 418         } else { /* down */
 419                 if (dd->ipath_flags & IPATH_LINKACTIVE)
 420                         signal_ib_event(dd, IB_EVENT_PORT_ERR);
 421                 dd->ipath_flags |= IPATH_LINKDOWN;
 422                 dd->ipath_flags &= ~(IPATH_LINKUNK | IPATH_LINKINIT
 423                                      | IPATH_LINKACTIVE |
 424                                      IPATH_LINKARMED);
 425                 *dd->ipath_statusp &= ~IPATH_STATUS_IB_READY;
 426                 dd->ipath_lli_counter = 0;
 427
 428                 if (lastlstate != INFINIPATH_IBCS_L_STATE_DOWN)
 429                         ipath_cdbg(VERBOSE, "Unit %u link state down "
 430                                    "(state 0x%x), from %s\n",
 431                                    dd->ipath_unit, lstate,
 432                                    ib_linkstate(dd, dd->ipath_lastibcstat));
 433                 else
 434                         ipath_cdbg(LINKVERB, "Unit %u link state changed "
 435                                    "to %s (0x%x) from down (%x)\n",
 436                                    dd->ipath_unit,
 437                                    ipath_ibcstatus_str[ltstate],
 438                                    ibstate, lastlstate);
 439         }
 440
 441 skip_ibchange:
 442         dd->ipath_lastibcstat = ibcs;
 443 }
 444
 445 static void handle_supp_msgs(struct ipath_devdata *dd,
 446                              unsigned supp_msgs, char *msg, int msgsz)
 447 {
 448         /*
 449          * Print the message unless it's ibc status change only, which
 450          * happens so often we never want to count it.
 451          */
 452         if (dd->ipath_lasterror & ~INFINIPATH_E_IBSTATUSCHANGED) {
 453                 int iserr;
 454                 iserr = ipath_decode_err(msg, msgsz,
 455                                          dd->ipath_lasterror &
 456                                          ~INFINIPATH_E_IBSTATUSCHANGED);
 457                 if (dd->ipath_lasterror &
 458                         ~(INFINIPATH_E_RRCVEGRFULL |
 459                         INFINIPATH_E_RRCVHDRFULL | INFINIPATH_E_PKTERRS))
 460                         ipath_dev_err(dd, "Suppressed %u messages for "
 461                                       "fast-repeating errors (%s) (%llx)\n",
 462                                       supp_msgs, msg,
 463                                       (unsigned long long)
 464                                       dd->ipath_lasterror);
 465                 else {
 466                         /*
 467                          * rcvegrfull and rcvhdrqfull are "normal", for some
 468                          * types of processes (mostly benchmarks) that send
 469                          * huge numbers of messages, while not processing
 470                          * them. So only complain about these at debug
 471                          * level.
 472                          */
 473                         if (iserr)
 474                                 ipath_dbg("Suppressed %u messages for %s\n",
 475                                           supp_msgs, msg);
 476                         else
 477                                 ipath_cdbg(ERRPKT,
 478                                         "Suppressed %u messages for %s\n",
 479                                           supp_msgs, msg);
 480                 }
 481         }
 482 }
 483
 484 static unsigned handle_frequent_errors(struct ipath_devdata *dd,
 485                                        ipath_err_t errs, char *msg,
 486                                        int msgsz, int *noprint)
 487 {
 488         unsigned long nc;
 489         static unsigned long nextmsg_time;
 490         static unsigned nmsgs, supp_msgs;
 491
 492         /*
 493          * Throttle back "fast" messages to no more than 10 per 5 seconds.
 494          * This isn't perfect, but it's a reasonable heuristic. If we get
 495          * more than 10, give a 6x longer delay.
 496          */
 497         nc = jiffies;
 498         if (nmsgs > 10) {
 499                 if (time_before(nc, nextmsg_time)) {
 500                         *noprint = 1;
 501                         if (!supp_msgs++)
 502                                 nextmsg_time = nc + HZ * 3;
 503                 }
 504                 else if (supp_msgs) {
 505                         handle_supp_msgs(dd, supp_msgs, msg, msgsz);
 506                         supp_msgs = 0;
 507                         nmsgs = 0;
 508                 }
 509         }
 510         else if (!nmsgs++ || time_after(nc, nextmsg_time))
 511                 nextmsg_time = nc + HZ / 2;
 512
 513         return supp_msgs;
 514 }
 515
 516 static int handle_errors(struct ipath_devdata *dd, ipath_err_t errs)
 517 {
 518         char msg[128];
 519         u64 ignore_this_time = 0;
 520         int i, iserr = 0;
 521         int chkerrpkts = 0, noprint = 0;
 522         unsigned supp_msgs;
 523         int log_idx;
 524
 525         supp_msgs = handle_frequent_errors(dd, errs, msg, sizeof msg, &noprint);
 526
 527         /* don't report errors that are masked */
 528         errs &= ~dd->ipath_maskederrs;
 529
 530         /* do these first, they are most important */
 531         if (errs & INFINIPATH_E_HARDWARE) {
 532                 /* reuse same msg buf */
 533                 dd->ipath_f_handle_hwerrors(dd, msg, sizeof msg);
 534         } else {
 535                 u64 mask;
 536                 for (log_idx = 0; log_idx < IPATH_EEP_LOG_CNT; ++log_idx) {
 537                         mask = dd->ipath_eep_st_masks[log_idx].errs_to_log;
 538                         if (errs & mask)
 539                                 ipath_inc_eeprom_err(dd, log_idx, 1);
 540                 }
 541         }
 542
 543         if (!noprint && (errs & ~dd->ipath_e_bitsextant))
 544                 ipath_dev_err(dd, "error interrupt with unknown errors "
 545                               "%llx set\n", (unsigned long long)
 546                               (errs & ~dd->ipath_e_bitsextant));
 547
 548         if (errs & E_SUM_ERRS)
 549                 ignore_this_time = handle_e_sum_errs(dd, errs);
 550         else if ((errs & E_SUM_LINK_PKTERRS) &&
 551             !(dd->ipath_flags & IPATH_LINKACTIVE)) {
 552                 /*
 553                  * This can happen when SMA is trying to bring the link
 554                  * up, but the IB link changes state at the "wrong" time.
 555                  * The IB logic then complains that the packet isn't
 556                  * valid.  We don't want to confuse people, so we just
 557                  * don't print them, except at debug
 558                  */
 559                 ipath_dbg("Ignoring packet errors %llx, because link not "
 560                           "ACTIVE\n", (unsigned long long) errs);
 561                 ignore_this_time = errs & E_SUM_LINK_PKTERRS;
 562         }
 563
 564         if (supp_msgs == 250000) {
 565                 int s_iserr;
 566                 /*
 567                  * It's not entirely reasonable assuming that the errors set
 568                  * in the last clear period are all responsible for the
 569                  * problem, but the alternative is to assume it's the only
 570                  * ones on this particular interrupt, which also isn't great
 571                  */
 572                 dd->ipath_maskederrs |= dd->ipath_lasterror | errs;
 573                 dd->ipath_errormask &= ~dd->ipath_maskederrs;
 574                 ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask,
 575                         dd->ipath_errormask);
 576                 s_iserr = ipath_decode_err(msg, sizeof msg,
 577                         dd->ipath_maskederrs);
 578
 579                 if (dd->ipath_maskederrs &
 580                         ~(INFINIPATH_E_RRCVEGRFULL |
 581                         INFINIPATH_E_RRCVHDRFULL | INFINIPATH_E_PKTERRS))
 582                         ipath_dev_err(dd, "Temporarily disabling "
 583                             "error(s) %llx reporting; too frequent (%s)\n",
 584                                 (unsigned long long)dd->ipath_maskederrs,
 585                                 msg);
 586                 else {
 587                         /*
 588                          * rcvegrfull and rcvhdrqfull are "normal",
 589                          * for some types of processes (mostly benchmarks)
 590                          * that send huge numbers of messages, while not
 591                          * processing them.  So only complain about
 592                          * these at debug level.
 593                          */
 594                         if (s_iserr)
 595                                 ipath_dbg("Temporarily disabling reporting "
 596                                     "too frequent queue full errors (%s)\n",
 597                                     msg);
 598                         else
 599                                 ipath_cdbg(ERRPKT,
 600                                     "Temporarily disabling reporting too"
 601                                     " frequent packet errors (%s)\n",
 602                                     msg);
 603                 }
 604
 605                 /*
 606                  * Re-enable the masked errors after around 3 minutes.  in
 607                  * ipath_get_faststats().  If we have a series of fast
 608                  * repeating but different errors, the interval will keep
 609                  * stretching out, but that's OK, as that's pretty
 610                  * catastrophic.
 611                  */
 612                 dd->ipath_unmasktime = jiffies + HZ * 180;
 613         }
 614
 615         ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear, errs);
 616         if (ignore_this_time)
 617                 errs &= ~ignore_this_time;
 618         if (errs & ~dd->ipath_lasterror) {
 619                 errs &= ~dd->ipath_lasterror;
 620                 /* never suppress duplicate hwerrors or ibstatuschange */
 621                 dd->ipath_lasterror |= errs &
 622                         ~(INFINIPATH_E_HARDWARE |
 623                           INFINIPATH_E_IBSTATUSCHANGED);
 624         }
 625
 626         /* likely due to cancel, so suppress */
 627         if ((errs & (INFINIPATH_E_SPKTLEN | INFINIPATH_E_SPIOARMLAUNCH)) &&
 628                 dd->ipath_lastcancel > jiffies) {
 629                 ipath_dbg("Suppressed armlaunch/spktlen after error send cancel\n");
 630                 errs &= ~(INFINIPATH_E_SPIOARMLAUNCH | INFINIPATH_E_SPKTLEN);
 631         }
 632
 633         if (!errs)
 634                 return 0;
 635
 636         if (!noprint)
 637                 /*
 638                  * the ones we mask off are handled specially below or above
 639                  */
 640                 ipath_decode_err(msg, sizeof msg,
 641                                  errs & ~(INFINIPATH_E_IBSTATUSCHANGED |
 642                                           INFINIPATH_E_RRCVEGRFULL |
 643                                           INFINIPATH_E_RRCVHDRFULL |
 644                                           INFINIPATH_E_HARDWARE));
 645         else
 646                 /* so we don't need if (!noprint) at strlcat's below */
 647                 *msg = 0;
 648
 649         if (errs & E_SUM_PKTERRS) {
 650                 ipath_stats.sps_pkterrs++;
 651                 chkerrpkts = 1;
 652         }
 653         if (errs & E_SUM_ERRS)
 654                 ipath_stats.sps_errs++;
 655
 656         if (errs & (INFINIPATH_E_RICRC | INFINIPATH_E_RVCRC)) {
 657                 ipath_stats.sps_crcerrs++;
 658                 chkerrpkts = 1;
 659         }
 660         iserr = errs & ~(E_SUM_PKTERRS | INFINIPATH_E_PKTERRS);
 661
 662
 663         /*
 664          * We don't want to print these two as they happen, or we can make
 665          * the situation even worse, because it takes so long to print
 666          * messages to serial consoles.  Kernel ports get printed from
 667          * fast_stats, no more than every 5 seconds, user ports get printed
 668          * on close
 669          */
 670         if (errs & INFINIPATH_E_RRCVHDRFULL) {
 671                 u32 hd, tl;
 672                 ipath_stats.sps_hdrqfull++;
 673                 for (i = 0; i < dd->ipath_cfgports; i++) {
 674                         struct ipath_portdata *pd = dd->ipath_pd[i];
 675                         if (i == 0) {
 676                                 hd = pd->port_head;
 677                                 tl = (u32) le64_to_cpu(
 678                                         *dd->ipath_hdrqtailptr);
 679                         } else if (pd && pd->port_cnt &&
 680                                    pd->port_rcvhdrtail_kvaddr) {
 681                                 /*
 682                                  * don't report same point multiple times,
 683                                  * except kernel
 684                                  */
 685                                 tl = *(u64 *) pd->port_rcvhdrtail_kvaddr;
 686                                 if (tl == pd->port_lastrcvhdrqtail)
 687                                         continue;
 688                                 hd = ipath_read_ureg32(dd, ur_rcvhdrhead,
 689                                                        i);
 690                         } else
 691                                 continue;
 692                         if (hd == (tl + 1) ||
 693                             (!hd && tl == dd->ipath_hdrqlast)) {
 694                                 if (i == 0)
 695                                         chkerrpkts = 1;
 696                                 pd->port_lastrcvhdrqtail = tl;
 697                                 pd->port_hdrqfull++;
 698                                 /* flush hdrqfull so that poll() sees it */
 699                                 wmb();
 700                                 wake_up_interruptible(&pd->port_wait);
 701                         }
 702                 }
 703         }
 704         if (errs & INFINIPATH_E_RRCVEGRFULL) {
 705                 struct ipath_portdata *pd = dd->ipath_pd[0];
 706
 707                 /*
 708                  * since this is of less importance and not likely to
 709                  * happen without also getting hdrfull, only count
 710                  * occurrences; don't check each port (or even the kernel
 711                  * vs user)
 712                  */
 713                 ipath_stats.sps_etidfull++;
 714                 if (pd->port_head !=
 715                     (u32) le64_to_cpu(*dd->ipath_hdrqtailptr))
 716                         chkerrpkts = 1;
 717         }
 718
 719         /*
 720          * do this before IBSTATUSCHANGED, in case both bits set in a single
 721          * interrupt; we want the STATUSCHANGE to "win", so we do our
 722          * internal copy of state machine correctly
 723          */
 724         if (errs & INFINIPATH_E_RIBLOSTLINK) {
 725                 /*
 726                  * force through block below
 727                  */
 728                 errs |= INFINIPATH_E_IBSTATUSCHANGED;
 729                 ipath_stats.sps_iblink++;
 730                 dd->ipath_flags |= IPATH_LINKDOWN;
 731                 dd->ipath_flags &= ~(IPATH_LINKUNK | IPATH_LINKINIT
 732                                      | IPATH_LINKARMED | IPATH_LINKACTIVE);
 733                 *dd->ipath_statusp &= ~IPATH_STATUS_IB_READY;
 734
 735                 ipath_dbg("Lost link, link now down (%s)\n",
 736                         ipath_ibcstatus_str[ipath_read_kreg64(dd,
 737                         dd->ipath_kregs->kr_ibcstatus) & 0xf]);
 738         }
 739         if (errs & INFINIPATH_E_IBSTATUSCHANGED)
 740                 handle_e_ibstatuschanged(dd, errs);
 741
 742         if (errs & INFINIPATH_E_RESET) {
 743                 if (!noprint)
 744                         ipath_dev_err(dd, "Got reset, requires re-init "
 745                                       "(unload and reload driver)\n");
 746                 dd->ipath_flags &= ~IPATH_INITTED;      /* needs re-init */
 747                 /* mark as having had error */
 748                 *dd->ipath_statusp |= IPATH_STATUS_HWERROR;
 749                 *dd->ipath_statusp &= ~IPATH_STATUS_IB_CONF;
 750         }
 751
 752         if (!noprint && *msg) {
 753                 if (iserr)
 754                         ipath_dev_err(dd, "%s error\n", msg);
 755                 else
 756                         dev_info(&dd->pcidev->dev, "%s packet problems\n",
 757                                 msg);
 758         }
 759         if (dd->ipath_state_wanted & dd->ipath_flags) {
 760                 ipath_cdbg(VERBOSE, "driver wanted state %x, iflags now %x, "
 761                            "waking\n", dd->ipath_state_wanted,
 762                            dd->ipath_flags);
 763                 wake_up_interruptible(&ipath_state_wait);
 764         }
 765
 766         return chkerrpkts;
 767 }
 768
 769
 770 /*
 771  * try to cleanup as much as possible for anything that might have gone
 772  * wrong while in freeze mode, such as pio buffers being written by user
 773  * processes (causing armlaunch), send errors due to going into freeze mode,
 774  * etc., and try to avoid causing extra interrupts while doing so.
 775  * Forcibly update the in-memory pioavail register copies after cleanup
 776  * because the chip won't do it for anything changing while in freeze mode
 777  * (we don't want to wait for the next pio buffer state change).
 778  * Make sure that we don't lose any important interrupts by using the chip
 779  * feature that says that writing 0 to a bit in *clear that is set in
 780  * *status will cause an interrupt to be generated again (if allowed by
 781  * the *mask value).
 782  */
 783 void ipath_clear_freeze(struct ipath_devdata *dd)
 784 {
 785         int i, im;
 786         u64 val;
 787         unsigned long flags;
 788
 789         /* disable error interrupts, to avoid confusion */
 790         ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask, 0ULL);
 791
 792         /* also disable interrupts; errormask is sometimes overwriten */
 793         ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask, 0ULL);
 794
 795         /*
 796          * clear all sends, because they have may been
 797          * completed by usercode while in freeze mode, and
 798          * therefore would not be sent, and eventually
 799          * might cause the process to run out of bufs
 800          */
 801         ipath_cancel_sends(dd, 0);
 802         ipath_write_kreg(dd, dd->ipath_kregs->kr_control,
 803                          dd->ipath_control);
 804
 805         /* ensure pio avail updates continue */
 806         spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
 807         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
 808                  dd->ipath_sendctrl & ~INFINIPATH_S_PIOBUFAVAILUPD);
 809         ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
 810         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
 811                          dd->ipath_sendctrl);
 812         ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
 813         spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
 814
 815         /*
 816          * We just enabled pioavailupdate, so dma copy is almost certainly
 817          * not yet right, so read the registers directly.  Similar to init
 818          */
 819         for (i = 0; i < dd->ipath_pioavregs; i++) {
 820                 /* deal with 6110 chip bug */
 821                 im = (i > 3 && (dd->ipath_flags & IPATH_SWAP_PIOBUFS)) ?
 822                         i ^ 1 : i;
 823                 val = ipath_read_kreg64(dd, (0x1000 / sizeof(u64)) + im);
 824                 dd->ipath_pioavailregs_dma[i] = cpu_to_le64(val);
 825                 dd->ipath_pioavailshadow[i] = val;
 826         }
 827
 828         /*
 829          * force new interrupt if any hwerr, error or interrupt bits are
 830          * still set, and clear "safe" send packet errors related to freeze
 831          * and cancelling sends.  Re-enable error interrupts before possible
 832          * force of re-interrupt on pending interrupts.
 833          */
 834         ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrclear, 0ULL);
 835         ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear,
 836                 E_SPKT_ERRS_IGNORE);
 837         ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask,
 838                 dd->ipath_errormask);
 839         ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask, -1LL);
 840         ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, 0ULL);
 841 }
 842
 843
 844 /* this is separate to allow for better optimization of ipath_intr() */
 845
 846 static noinline void ipath_bad_intr(struct ipath_devdata *dd, u32 *unexpectp)
 847 {
 848         /*
 849          * sometimes happen during driver init and unload, don't want
 850          * to process any interrupts at that point
 851          */
 852
 853         /* this is just a bandaid, not a fix, if something goes badly
 854          * wrong */
 855         if (++*unexpectp > 100) {
 856                 if (++*unexpectp > 105) {
 857                         /*
 858                          * ok, we must be taking somebody else's interrupts,
 859                          * due to a messed up mptable and/or PIRQ table, so
 860                          * unregister the interrupt.  We've seen this during
 861                          * linuxbios development work, and it may happen in
 862                          * the future again.
 863                          */
 864                         if (dd->pcidev && dd->ipath_irq) {
 865                                 ipath_dev_err(dd, "Now %u unexpected "
 866                                               "interrupts, unregistering "
 867                                               "interrupt handler\n",
 868                                               *unexpectp);
 869                                 ipath_dbg("free_irq of irq %d\n",
 870                                           dd->ipath_irq);
 871                                 dd->ipath_f_free_irq(dd);
 872                         }
 873                 }
 874                 if (ipath_read_ireg(dd, dd->ipath_kregs->kr_intmask)) {
 875                         ipath_dev_err(dd, "%u unexpected interrupts, "
 876                                       "disabling interrupts completely\n",
 877                                       *unexpectp);
 878                         /*
 879                          * disable all interrupts, something is very wrong
 880                          */
 881                         ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask,
 882                                          0ULL);
 883                 }
 884         } else if (*unexpectp > 1)
 885                 ipath_dbg("Interrupt when not ready, should not happen, "
 886                           "ignoring\n");
 887 }
 888
 889 static noinline void ipath_bad_regread(struct ipath_devdata *dd)
 890 {
 891         static int allbits;
 892
 893         /* separate routine, for better optimization of ipath_intr() */
 894
 895         /*
 896          * We print the message and disable interrupts, in hope of
 897          * having a better chance of debugging the problem.
 898          */
 899         ipath_dev_err(dd,
 900                       "Read of interrupt status failed (all bits set)\n");
 901         if (allbits++) {
 902                 /* disable all interrupts, something is very wrong */
 903                 ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask, 0ULL);
 904                 if (allbits == 2) {
 905                         ipath_dev_err(dd, "Still bad interrupt status, "
 906                                       "unregistering interrupt\n");
 907                         dd->ipath_f_free_irq(dd);
 908                 } else if (allbits > 2) {
 909                         if ((allbits % 10000) == 0)
 910                                 printk(".");
 911                 } else
 912                         ipath_dev_err(dd, "Disabling interrupts, "
 913                                       "multiple errors\n");
 914         }
 915 }
 916
 917 static void handle_layer_pioavail(struct ipath_devdata *dd)
 918 {
 919         unsigned long flags;
 920         int ret;
 921
 922         ret = ipath_ib_piobufavail(dd->verbs_dev);
 923         if (ret > 0)
 924                 goto set;
 925
 926         return;
 927 set:
 928         spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
 929         dd->ipath_sendctrl |= INFINIPATH_S_PIOINTBUFAVAIL;
 930         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
 931                          dd->ipath_sendctrl);
 932         ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
 933         spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
 934 }
 935
 936 /*
 937  * Handle receive interrupts for user ports; this means a user
 938  * process was waiting for a packet to arrive, and didn't want
 939  * to poll
 940  */
 941 static void handle_urcv(struct ipath_devdata *dd, u32 istat)
 942 {
 943         u64 portr;
 944         int i;
 945         int rcvdint = 0;
 946
 947         /*
 948          * test_and_clear_bit(IPATH_PORT_WAITING_RCV) and
 949          * test_and_clear_bit(IPATH_PORT_WAITING_URG) below
 950          * would both like timely updates of the bits so that
 951          * we don't pass them by unnecessarily.  the rmb()
 952          * here ensures that we see them promptly -- the
 953          * corresponding wmb()'s are in ipath_poll_urgent()
 954          * and ipath_poll_next()...
 955          */
 956         rmb();
 957         portr = ((istat >> INFINIPATH_I_RCVAVAIL_SHIFT) &
 958                  dd->ipath_i_rcvavail_mask)
 959                 | ((istat >> INFINIPATH_I_RCVURG_SHIFT) &
 960                    dd->ipath_i_rcvurg_mask);
 961         for (i = 1; i < dd->ipath_cfgports; i++) {
 962                 struct ipath_portdata *pd = dd->ipath_pd[i];
 963                 if (portr & (1 << i) && pd && pd->port_cnt) {
 964                         if (test_and_clear_bit(IPATH_PORT_WAITING_RCV,
 965                                                &pd->port_flag)) {
 966                                 clear_bit(i + dd->ipath_r_intravail_shift,
 967                                           &dd->ipath_rcvctrl);
 968                                 wake_up_interruptible(&pd->port_wait);
 969                                 rcvdint = 1;
 970                         } else if (test_and_clear_bit(IPATH_PORT_WAITING_URG,
 971                                                       &pd->port_flag)) {
 972                                 pd->port_urgent++;
 973                                 wake_up_interruptible(&pd->port_wait);
 974                         }
 975                 }
 976         }
 977         if (rcvdint) {
 978                 /* only want to take one interrupt, so turn off the rcv
 979                  * interrupt for all the ports that we did the wakeup on
 980                  * (but never for kernel port)
 981                  */
 982                 ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl,
 983                                  dd->ipath_rcvctrl);
 984         }
 985 }
 986
 987 irqreturn_t ipath_intr(int irq, void *data)
 988 {
 989         struct ipath_devdata *dd = data;
 990         u32 istat, chk0rcv = 0;
 991         ipath_err_t estat = 0;
 992         irqreturn_t ret;
 993         static unsigned unexpected = 0;
 994         static const u32 port0rbits = (1U<<INFINIPATH_I_RCVAVAIL_SHIFT) |
 995                  (1U<<INFINIPATH_I_RCVURG_SHIFT);
 996
 997         ipath_stats.sps_ints++;
 998
 999         if (dd->ipath_int_counter != (u32) -1)
1000                 dd->ipath_int_counter++;
1001
1002         if (!(dd->ipath_flags & IPATH_PRESENT)) {
1003                 /*
1004                  * This return value is not great, but we do not want the
1005                  * interrupt core code to remove our interrupt handler
1006                  * because we don't appear to be handling an interrupt
1007                  * during a chip reset.
1008                  */
1009                 return IRQ_HANDLED;
1010         }
1011
1012         /*
1013          * this needs to be flags&initted, not statusp, so we keep
1014          * taking interrupts even after link goes down, etc.
1015          * Also, we *must* clear the interrupt at some point, or we won't
1016          * take it again, which can be real bad for errors, etc...
1017          */
1018
1019         if (!(dd->ipath_flags & IPATH_INITTED)) {
1020                 ipath_bad_intr(dd, &unexpected);
1021                 ret = IRQ_NONE;
1022                 goto bail;
1023         }
1024
1025         istat = ipath_read_ireg(dd, dd->ipath_kregs->kr_intstatus);
1026
1027         if (unlikely(!istat)) {
1028                 ipath_stats.sps_nullintr++;
1029                 ret = IRQ_NONE; /* not our interrupt, or already handled */
1030                 goto bail;
1031         }
1032         if (unlikely(istat == -1)) {
1033                 ipath_bad_regread(dd);
1034                 /* don't know if it was our interrupt or not */
1035                 ret = IRQ_NONE;
1036                 goto bail;
1037         }
1038
1039         if (unexpected)
1040                 unexpected = 0;
1041
1042         if (unlikely(istat & ~dd->ipath_i_bitsextant))
1043                 ipath_dev_err(dd,
1044                               "interrupt with unknown interrupts %x set\n",
1045                               istat & (u32) ~ dd->ipath_i_bitsextant);
1046         else
1047                 ipath_cdbg(VERBOSE, "intr stat=0x%x\n", istat);
1048
1049         if (unlikely(istat & INFINIPATH_I_ERROR)) {
1050                 ipath_stats.sps_errints++;
1051                 estat = ipath_read_kreg64(dd,
1052                                           dd->ipath_kregs->kr_errorstatus);
1053                 if (!estat)
1054                         dev_info(&dd->pcidev->dev, "error interrupt (%x), "
1055                                  "but no error bits set!\n", istat);
1056                 else if (estat == -1LL)
1057                         /*
1058                          * should we try clearing all, or hope next read
1059                          * works?
1060                          */
1061                         ipath_dev_err(dd, "Read of error status failed "
1062                                       "(all bits set); ignoring\n");
1063                 else
1064                         if (handle_errors(dd, estat))
1065                                 /* force calling ipath_kreceive() */
1066                                 chk0rcv = 1;
1067         }
1068
1069         if (istat & INFINIPATH_I_GPIO) {
1070                 /*
1071                  * GPIO interrupts fall in two broad classes:
1072                  * GPIO_2 indicates (on some HT4xx boards) that a packet
1073                  *        has arrived for Port 0. Checking for this
1074                  *        is controlled by flag IPATH_GPIO_INTR.
1075                  * GPIO_3..5 on IBA6120 Rev2 and IBA6110 Rev4 chips indicate
1076                  *        errors that we need to count. Checking for this
1077                  *        is controlled by flag IPATH_GPIO_ERRINTRS.
1078                  */
1079                 u32 gpiostatus;
1080                 u32 to_clear = 0;
1081
1082                 gpiostatus = ipath_read_kreg32(
1083                         dd, dd->ipath_kregs->kr_gpio_status);
1084                 /* First the error-counter case.
1085                  */
1086                 if ((gpiostatus & IPATH_GPIO_ERRINTR_MASK) &&
1087                     (dd->ipath_flags & IPATH_GPIO_ERRINTRS)) {
1088                         /* want to clear the bits we see asserted. */
1089                         to_clear |= (gpiostatus & IPATH_GPIO_ERRINTR_MASK);
1090
1091                         /*
1092                          * Count appropriately, clear bits out of our copy,
1093                          * as they have been "handled".
1094                          */
1095                         if (gpiostatus & (1 << IPATH_GPIO_RXUVL_BIT)) {
1096                                 ipath_dbg("FlowCtl on UnsupVL\n");
1097                                 dd->ipath_rxfc_unsupvl_errs++;
1098                         }
1099                         if (gpiostatus & (1 << IPATH_GPIO_OVRUN_BIT)) {
1100                                 ipath_dbg("Overrun Threshold exceeded\n");
1101                                 dd->ipath_overrun_thresh_errs++;
1102                         }
1103                         if (gpiostatus & (1 << IPATH_GPIO_LLI_BIT)) {
1104                                 ipath_dbg("Local Link Integrity error\n");
1105                                 dd->ipath_lli_errs++;
1106                         }
1107                         gpiostatus &= ~IPATH_GPIO_ERRINTR_MASK;
1108                 }
1109                 /* Now the Port0 Receive case */
1110                 if ((gpiostatus & (1 << IPATH_GPIO_PORT0_BIT)) &&
1111                     (dd->ipath_flags & IPATH_GPIO_INTR)) {
1112                         /*
1113                          * GPIO status bit 2 is set, and we expected it.
1114                          * clear it and indicate in p0bits.
1115                          * This probably only happens if a Port0 pkt
1116                          * arrives at _just_ the wrong time, and we
1117                          * handle that by seting chk0rcv;
1118                          */
1119                         to_clear |= (1 << IPATH_GPIO_PORT0_BIT);
1120                         gpiostatus &= ~(1 << IPATH_GPIO_PORT0_BIT);
1121                         chk0rcv = 1;
1122                 }
1123                 if (gpiostatus) {
1124                         /*
1125                          * Some unexpected bits remain. If they could have
1126                          * caused the interrupt, complain and clear.
1127                          * To avoid repetition of this condition, also clear
1128                          * the mask. It is almost certainly due to error.
1129                          */
1130                         const u32 mask = (u32) dd->ipath_gpio_mask;
1131
1132                         if (mask & gpiostatus) {
1133                                 ipath_dbg("Unexpected GPIO IRQ bits %x\n",
1134                                   gpiostatus & mask);
1135                                 to_clear |= (gpiostatus & mask);
1136                                 dd->ipath_gpio_mask &= ~(gpiostatus & mask);
1137                                 ipath_write_kreg(dd,
1138                                         dd->ipath_kregs->kr_gpio_mask,
1139                                         dd->ipath_gpio_mask);
1140                         }
1141                 }
1142                 if (to_clear) {
1143                         ipath_write_kreg(dd, dd->ipath_kregs->kr_gpio_clear,
1144                                         (u64) to_clear);
1145                 }
1146         }
1147         chk0rcv |= istat & port0rbits;
1148
1149         /*
1150          * Clear the interrupt bits we found set, unless they are receive
1151          * related, in which case we already cleared them above, and don't
1152          * want to clear them again, because we might lose an interrupt.
1153          * Clear it early, so we "know" know the chip will have seen this by
1154          * the time we process the queue, and will re-interrupt if necessary.
1155          * The processor itself won't take the interrupt again until we return.
1156          */
1157         ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, istat);
1158
1159         /*
1160          * handle port0 receive  before checking for pio buffers available,
1161          * since receives can overflow; piobuf waiters can afford a few
1162          * extra cycles, since they were waiting anyway, and user's waiting
1163          * for receive are at the bottom.
1164          */
1165         if (chk0rcv) {
1166                 ipath_kreceive(dd->ipath_pd[0]);
1167                 istat &= ~port0rbits;
1168         }
1169
1170         if (istat & ((dd->ipath_i_rcvavail_mask <<
1171                       INFINIPATH_I_RCVAVAIL_SHIFT)
1172                      | (dd->ipath_i_rcvurg_mask <<
1173                         INFINIPATH_I_RCVURG_SHIFT)))
1174                 handle_urcv(dd, istat);
1175
1176         if (istat & INFINIPATH_I_SPIOBUFAVAIL) {
1177                 unsigned long flags;
1178
1179                 spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
1180                 dd->ipath_sendctrl &= ~INFINIPATH_S_PIOINTBUFAVAIL;
1181                 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
1182                                  dd->ipath_sendctrl);
1183                 ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
1184                 spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
1185
1186                 handle_layer_pioavail(dd);
1187         }
1188
1189         ret = IRQ_HANDLED;
1190
1191 bail:
1192         return ret;
1193 }