drivers/infiniband/hw/mthca/mthca_srq.c

   1 /*
   2  * Copyright (c) 2005 Cisco Systems. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  *
  32  * $Id: mthca_srq.c 3047 2005-08-10 03:59:35Z roland $
  33  */
  34
  35 #include "mthca_dev.h"
  36 #include "mthca_cmd.h"
  37 #include "mthca_memfree.h"
  38 #include "mthca_wqe.h"
  39
  40 enum {
  41         MTHCA_MAX_DIRECT_SRQ_SIZE = 4 * PAGE_SIZE
  42 };
  43
  44 struct mthca_tavor_srq_context {
  45         __be64 wqe_base_ds;     /* low 6 bits is descriptor size */
  46         __be32 state_pd;
  47         __be32 lkey;
  48         __be32 uar;
  49         __be32 wqe_cnt;
  50         u32    reserved[2];
  51 };
  52
  53 struct mthca_arbel_srq_context {
  54         __be32 state_logsize_srqn;
  55         __be32 lkey;
  56         __be32 db_index;
  57         __be32 logstride_usrpage;
  58         __be64 wqe_base;
  59         __be32 eq_pd;
  60         __be16 limit_watermark;
  61         __be16 wqe_cnt;
  62         u16    reserved1;
  63         __be16 wqe_counter;
  64         u32    reserved2[3];
  65 };
  66
  67 static void *get_wqe(struct mthca_srq *srq, int n)
  68 {
  69         if (srq->is_direct)
  70                 return srq->queue.direct.buf + (n << srq->wqe_shift);
  71         else
  72                 return srq->queue.page_list[(n << srq->wqe_shift) >> PAGE_SHIFT].buf +
  73                         ((n << srq->wqe_shift) & (PAGE_SIZE - 1));
  74 }
  75
  76 /*
  77  * Return a pointer to the location within a WQE that we're using as a
  78  * link when the WQE is in the free list.  We use the imm field
  79  * because in the Tavor case, posting a WQE may overwrite the next
  80  * segment of the previous WQE, but a receive WQE will never touch the
  81  * imm field.  This avoids corrupting our free list if the previous
  82  * WQE has already completed and been put on the free list when we
  83  * post the next WQE.
  84  */
  85 static inline int *wqe_to_link(void *wqe)
  86 {
  87         return (int *) (wqe + offsetof(struct mthca_next_seg, imm));
  88 }
  89
  90 static void mthca_tavor_init_srq_context(struct mthca_dev *dev,
  91                                          struct mthca_pd *pd,
  92                                          struct mthca_srq *srq,
  93                                          struct mthca_tavor_srq_context *context)
  94 {
  95         memset(context, 0, sizeof *context);
  96
  97         context->wqe_base_ds = cpu_to_be64(1 << (srq->wqe_shift - 4));
  98         context->state_pd    = cpu_to_be32(pd->pd_num);
  99         context->lkey        = cpu_to_be32(srq->mr.ibmr.lkey);
 100
 101         if (pd->ibpd.uobject)
 102                 context->uar =
 103                         cpu_to_be32(to_mucontext(pd->ibpd.uobject->context)->uar.index);
 104         else
 105                 context->uar = cpu_to_be32(dev->driver_uar.index);
 106 }
 107
 108 static void mthca_arbel_init_srq_context(struct mthca_dev *dev,
 109                                          struct mthca_pd *pd,
 110                                          struct mthca_srq *srq,
 111                                          struct mthca_arbel_srq_context *context)
 112 {
 113         int logsize;
 114
 115         memset(context, 0, sizeof *context);
 116
 117         logsize = long_log2(srq->max) + srq->wqe_shift;
 118         context->state_logsize_srqn = cpu_to_be32(logsize << 24 | srq->srqn);
 119         context->lkey = cpu_to_be32(srq->mr.ibmr.lkey);
 120         context->db_index = cpu_to_be32(srq->db_index);
 121         context->logstride_usrpage = cpu_to_be32((srq->wqe_shift - 4) << 29);
 122         if (pd->ibpd.uobject)
 123                 context->logstride_usrpage |=
 124                         cpu_to_be32(to_mucontext(pd->ibpd.uobject->context)->uar.index);
 125         else
 126                 context->logstride_usrpage |= cpu_to_be32(dev->driver_uar.index);
 127         context->eq_pd = cpu_to_be32(MTHCA_EQ_ASYNC << 24 | pd->pd_num);
 128 }
 129
 130 static void mthca_free_srq_buf(struct mthca_dev *dev, struct mthca_srq *srq)
 131 {
 132         mthca_buf_free(dev, srq->max << srq->wqe_shift, &srq->queue,
 133                        srq->is_direct, &srq->mr);
 134         kfree(srq->wrid);
 135 }
 136
 137 static int mthca_alloc_srq_buf(struct mthca_dev *dev, struct mthca_pd *pd,
 138                                struct mthca_srq *srq)
 139 {
 140         struct mthca_data_seg *scatter;
 141         void *wqe;
 142         int err;
 143         int i;
 144
 145         if (pd->ibpd.uobject)
 146                 return 0;
 147
 148         srq->wrid = kmalloc(srq->max * sizeof (u64), GFP_KERNEL);
 149         if (!srq->wrid)
 150                 return -ENOMEM;
 151
 152         err = mthca_buf_alloc(dev, srq->max << srq->wqe_shift,
 153                               MTHCA_MAX_DIRECT_SRQ_SIZE,
 154                               &srq->queue, &srq->is_direct, pd, 1, &srq->mr);
 155         if (err) {
 156                 kfree(srq->wrid);
 157                 return err;
 158         }
 159
 160         /*
 161          * Now initialize the SRQ buffer so that all of the WQEs are
 162          * linked into the list of free WQEs.  In addition, set the
 163          * scatter list L_Keys to the sentry value of 0x100.
 164          */
 165         for (i = 0; i < srq->max; ++i) {
 166                 wqe = get_wqe(srq, i);
 167
 168                 *wqe_to_link(wqe) = i < srq->max - 1 ? i + 1 : -1;
 169
 170                 for (scatter = wqe + sizeof (struct mthca_next_seg);
 171                      (void *) scatter < wqe + (1 << srq->wqe_shift);
 172                      ++scatter)
 173                         scatter->lkey = cpu_to_be32(MTHCA_INVAL_LKEY);
 174         }
 175
 176         srq->last = get_wqe(srq, srq->max - 1);
 177
 178         return 0;
 179 }
 180
 181 int mthca_alloc_srq(struct mthca_dev *dev, struct mthca_pd *pd,
 182                     struct ib_srq_attr *attr, struct mthca_srq *srq)
 183 {
 184         struct mthca_mailbox *mailbox;
 185         u8 status;
 186         int ds;
 187         int err;
 188
 189         /* Sanity check SRQ size before proceeding */
 190         if (attr->max_wr  > dev->limits.max_srq_wqes ||
 191             attr->max_sge > dev->limits.max_sg)
 192                 return -EINVAL;
 193
 194         srq->max      = attr->max_wr;
 195         srq->max_gs   = attr->max_sge;
 196         srq->counter  = 0;
 197
 198         if (mthca_is_memfree(dev))
 199                 srq->max = roundup_pow_of_two(srq->max + 1);
 200
 201         ds = min(64UL,
 202                  roundup_pow_of_two(sizeof (struct mthca_next_seg) +
 203                                     srq->max_gs * sizeof (struct mthca_data_seg)));
 204         srq->wqe_shift = long_log2(ds);
 205
 206         srq->srqn = mthca_alloc(&dev->srq_table.alloc);
 207         if (srq->srqn == -1)
 208                 return -ENOMEM;
 209
 210         if (mthca_is_memfree(dev)) {
 211                 err = mthca_table_get(dev, dev->srq_table.table, srq->srqn);
 212                 if (err)
 213                         goto err_out;
 214
 215                 if (!pd->ibpd.uobject) {
 216                         srq->db_index = mthca_alloc_db(dev, MTHCA_DB_TYPE_SRQ,
 217                                                        srq->srqn, &srq->db);
 218                         if (srq->db_index < 0) {
 219                                 err = -ENOMEM;
 220                                 goto err_out_icm;
 221                         }
 222                 }
 223         }
 224
 225         mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL);
 226         if (IS_ERR(mailbox)) {
 227                 err = PTR_ERR(mailbox);
 228                 goto err_out_db;
 229         }
 230
 231         err = mthca_alloc_srq_buf(dev, pd, srq);
 232         if (err)
 233                 goto err_out_mailbox;
 234
 235         spin_lock_init(&srq->lock);
 236         atomic_set(&srq->refcount, 1);
 237         init_waitqueue_head(&srq->wait);
 238
 239         if (mthca_is_memfree(dev))
 240                 mthca_arbel_init_srq_context(dev, pd, srq, mailbox->buf);
 241         else
 242                 mthca_tavor_init_srq_context(dev, pd, srq, mailbox->buf);
 243
 244         err = mthca_SW2HW_SRQ(dev, mailbox, srq->srqn, &status);
 245
 246         if (err) {
 247                 mthca_warn(dev, "SW2HW_SRQ failed (%d)\n", err);
 248                 goto err_out_free_buf;
 249         }
 250         if (status) {
 251                 mthca_warn(dev, "SW2HW_SRQ returned status 0x%02x\n",
 252                            status);
 253                 err = -EINVAL;
 254                 goto err_out_free_buf;
 255         }
 256
 257         spin_lock_irq(&dev->srq_table.lock);
 258         if (mthca_array_set(&dev->srq_table.srq,
 259                             srq->srqn & (dev->limits.num_srqs - 1),
 260                             srq)) {
 261                 spin_unlock_irq(&dev->srq_table.lock);
 262                 goto err_out_free_srq;
 263         }
 264         spin_unlock_irq(&dev->srq_table.lock);
 265
 266         mthca_free_mailbox(dev, mailbox);
 267
 268         srq->first_free = 0;
 269         srq->last_free  = srq->max - 1;
 270
 271         return 0;
 272
 273 err_out_free_srq:
 274         err = mthca_HW2SW_SRQ(dev, mailbox, srq->srqn, &status);
 275         if (err)
 276                 mthca_warn(dev, "HW2SW_SRQ failed (%d)\n", err);
 277         else if (status)
 278                 mthca_warn(dev, "HW2SW_SRQ returned status 0x%02x\n", status);
 279
 280 err_out_free_buf:
 281         if (!pd->ibpd.uobject)
 282                 mthca_free_srq_buf(dev, srq);
 283
 284 err_out_mailbox:
 285         mthca_free_mailbox(dev, mailbox);
 286
 287 err_out_db:
 288         if (!pd->ibpd.uobject && mthca_is_memfree(dev))
 289                 mthca_free_db(dev, MTHCA_DB_TYPE_SRQ, srq->db_index);
 290
 291 err_out_icm:
 292         mthca_table_put(dev, dev->srq_table.table, srq->srqn);
 293
 294 err_out:
 295         mthca_free(&dev->srq_table.alloc, srq->srqn);
 296
 297         return err;
 298 }
 299
 300 void mthca_free_srq(struct mthca_dev *dev, struct mthca_srq *srq)
 301 {
 302         struct mthca_mailbox *mailbox;
 303         int err;
 304         u8 status;
 305
 306         mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL);
 307         if (IS_ERR(mailbox)) {
 308                 mthca_warn(dev, "No memory for mailbox to free SRQ.\n");
 309                 return;
 310         }
 311
 312         err = mthca_HW2SW_SRQ(dev, mailbox, srq->srqn, &status);
 313         if (err)
 314                 mthca_warn(dev, "HW2SW_SRQ failed (%d)\n", err);
 315         else if (status)
 316                 mthca_warn(dev, "HW2SW_SRQ returned status 0x%02x\n", status);
 317
 318         spin_lock_irq(&dev->srq_table.lock);
 319         mthca_array_clear(&dev->srq_table.srq,
 320                           srq->srqn & (dev->limits.num_srqs - 1));
 321         spin_unlock_irq(&dev->srq_table.lock);
 322
 323         atomic_dec(&srq->refcount);
 324         wait_event(srq->wait, !atomic_read(&srq->refcount));
 325
 326         if (!srq->ibsrq.uobject) {
 327                 mthca_free_srq_buf(dev, srq);
 328                 if (mthca_is_memfree(dev))
 329                         mthca_free_db(dev, MTHCA_DB_TYPE_SRQ, srq->db_index);
 330         }
 331
 332         mthca_table_put(dev, dev->srq_table.table, srq->srqn);
 333         mthca_free(&dev->srq_table.alloc, srq->srqn);
 334         mthca_free_mailbox(dev, mailbox);
 335 }
 336
 337 int mthca_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr,
 338                      enum ib_srq_attr_mask attr_mask)
 339 {
 340         struct mthca_dev *dev = to_mdev(ibsrq->device);
 341         struct mthca_srq *srq = to_msrq(ibsrq);
 342         int ret;
 343         u8 status;
 344
 345         /* We don't support resizing SRQs (yet?) */
 346         if (attr_mask & IB_SRQ_MAX_WR)
 347                 return -EINVAL;
 348
 349         if (attr_mask & IB_SRQ_LIMIT) {
 350                 ret = mthca_ARM_SRQ(dev, srq->srqn, attr->srq_limit, &status);
 351                 if (ret)
 352                         return ret;
 353                 if (status)
 354                         return -EINVAL;
 355         }
 356
 357         return 0;
 358 }
 359
 360 void mthca_srq_event(struct mthca_dev *dev, u32 srqn,
 361                      enum ib_event_type event_type)
 362 {
 363         struct mthca_srq *srq;
 364         struct ib_event event;
 365
 366         spin_lock(&dev->srq_table.lock);
 367         srq = mthca_array_get(&dev->srq_table.srq, srqn & (dev->limits.num_srqs - 1));
 368         if (srq)
 369                 atomic_inc(&srq->refcount);
 370         spin_unlock(&dev->srq_table.lock);
 371
 372         if (!srq) {
 373                 mthca_warn(dev, "Async event for bogus SRQ %08x\n", srqn);
 374                 return;
 375         }
 376
 377         if (!srq->ibsrq.event_handler)
 378                 goto out;
 379
 380         event.device      = &dev->ib_dev;
 381         event.event       = event_type;
 382         event.element.srq = &srq->ibsrq;
 383         srq->ibsrq.event_handler(&event, srq->ibsrq.srq_context);
 384
 385 out:
 386         if (atomic_dec_and_test(&srq->refcount))
 387                 wake_up(&srq->wait);
 388 }
 389
 390 /*
 391  * This function must be called with IRQs disabled.
 392  */
 393 void mthca_free_srq_wqe(struct mthca_srq *srq, u32 wqe_addr)
 394 {
 395         int ind;
 396
 397         ind = wqe_addr >> srq->wqe_shift;
 398
 399         spin_lock(&srq->lock);
 400
 401         if (likely(srq->first_free >= 0))
 402                 *wqe_to_link(get_wqe(srq, srq->last_free)) = ind;
 403         else
 404                 srq->first_free = ind;
 405
 406         *wqe_to_link(get_wqe(srq, ind)) = -1;
 407         srq->last_free = ind;
 408
 409         spin_unlock(&srq->lock);
 410 }
 411
 412 int mthca_tavor_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr,
 413                               struct ib_recv_wr **bad_wr)
 414 {
 415         struct mthca_dev *dev = to_mdev(ibsrq->device);
 416         struct mthca_srq *srq = to_msrq(ibsrq);
 417         unsigned long flags;
 418         int err = 0;
 419         int first_ind;
 420         int ind;
 421         int next_ind;
 422         int nreq;
 423         int i;
 424         void *wqe;
 425         void *prev_wqe;
 426
 427         spin_lock_irqsave(&srq->lock, flags);
 428
 429         first_ind = srq->first_free;
 430
 431         for (nreq = 0; wr; ++nreq, wr = wr->next) {
 432                 ind = srq->first_free;
 433
 434                 if (ind < 0) {
 435                         mthca_err(dev, "SRQ %06x full\n", srq->srqn);
 436                         err = -ENOMEM;
 437                         *bad_wr = wr;
 438                         break;
 439                 }
 440
 441                 wqe       = get_wqe(srq, ind);
 442                 next_ind  = *wqe_to_link(wqe);
 443
 444                 if (next_ind < 0) {
 445                         mthca_err(dev, "SRQ %06x full\n", srq->srqn);
 446                         err = -ENOMEM;
 447                         *bad_wr = wr;
 448                         break;
 449                 }
 450
 451                 prev_wqe  = srq->last;
 452                 srq->last = wqe;
 453
 454                 ((struct mthca_next_seg *) wqe)->nda_op = 0;
 455                 ((struct mthca_next_seg *) wqe)->ee_nds = 0;
 456                 /* flags field will always remain 0 */
 457
 458                 wqe += sizeof (struct mthca_next_seg);
 459
 460                 if (unlikely(wr->num_sge > srq->max_gs)) {
 461                         err = -EINVAL;
 462                         *bad_wr = wr;
 463                         srq->last = prev_wqe;
 464                         break;
 465                 }
 466
 467                 for (i = 0; i < wr->num_sge; ++i) {
 468                         ((struct mthca_data_seg *) wqe)->byte_count =
 469                                 cpu_to_be32(wr->sg_list[i].length);
 470                         ((struct mthca_data_seg *) wqe)->lkey =
 471                                 cpu_to_be32(wr->sg_list[i].lkey);
 472                         ((struct mthca_data_seg *) wqe)->addr =
 473                                 cpu_to_be64(wr->sg_list[i].addr);
 474                         wqe += sizeof (struct mthca_data_seg);
 475                 }
 476
 477                 if (i < srq->max_gs) {
 478                         ((struct mthca_data_seg *) wqe)->byte_count = 0;
 479                         ((struct mthca_data_seg *) wqe)->lkey = cpu_to_be32(MTHCA_INVAL_LKEY);
 480                         ((struct mthca_data_seg *) wqe)->addr = 0;
 481                 }
 482
 483                 ((struct mthca_next_seg *) prev_wqe)->nda_op =
 484                         cpu_to_be32((ind << srq->wqe_shift) | 1);
 485                 wmb();
 486                 ((struct mthca_next_seg *) prev_wqe)->ee_nds =
 487                         cpu_to_be32(MTHCA_NEXT_DBD);
 488
 489                 srq->wrid[ind]  = wr->wr_id;
 490                 srq->first_free = next_ind;
 491         }
 492
 493         if (likely(nreq)) {
 494                 __be32 doorbell[2];
 495
 496                 doorbell[0] = cpu_to_be32(first_ind << srq->wqe_shift);
 497                 doorbell[1] = cpu_to_be32((srq->srqn << 8) | nreq);
 498
 499                 /*
 500                  * Make sure that descriptors are written before
 501                  * doorbell is rung.
 502                  */
 503                 wmb();
 504
 505                 mthca_write64(doorbell,
 506                               dev->kar + MTHCA_RECEIVE_DOORBELL,
 507                               MTHCA_GET_DOORBELL_LOCK(&dev->doorbell_lock));
 508         }
 509
 510         spin_unlock_irqrestore(&srq->lock, flags);
 511         return err;
 512 }
 513
 514 int mthca_arbel_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr,
 515                               struct ib_recv_wr **bad_wr)
 516 {
 517         struct mthca_dev *dev = to_mdev(ibsrq->device);
 518         struct mthca_srq *srq = to_msrq(ibsrq);
 519         unsigned long flags;
 520         int err = 0;
 521         int ind;
 522         int next_ind;
 523         int nreq;
 524         int i;
 525         void *wqe;
 526
 527         spin_lock_irqsave(&srq->lock, flags);
 528
 529         for (nreq = 0; wr; ++nreq, wr = wr->next) {
 530                 ind = srq->first_free;
 531
 532                 if (ind < 0) {
 533                         mthca_err(dev, "SRQ %06x full\n", srq->srqn);
 534                         err = -ENOMEM;
 535                         *bad_wr = wr;
 536                         break;
 537                 }
 538
 539                 wqe       = get_wqe(srq, ind);
 540                 next_ind  = *wqe_to_link(wqe);
 541
 542                 if (next_ind < 0) {
 543                         mthca_err(dev, "SRQ %06x full\n", srq->srqn);
 544                         err = -ENOMEM;
 545                         *bad_wr = wr;
 546                         break;
 547                 }
 548
 549                 ((struct mthca_next_seg *) wqe)->nda_op =
 550                         cpu_to_be32((next_ind << srq->wqe_shift) | 1);
 551                 ((struct mthca_next_seg *) wqe)->ee_nds = 0;
 552                 /* flags field will always remain 0 */
 553
 554                 wqe += sizeof (struct mthca_next_seg);
 555
 556                 if (unlikely(wr->num_sge > srq->max_gs)) {
 557                         err = -EINVAL;
 558                         *bad_wr = wr;
 559                         break;
 560                 }
 561
 562                 for (i = 0; i < wr->num_sge; ++i) {
 563                         ((struct mthca_data_seg *) wqe)->byte_count =
 564                                 cpu_to_be32(wr->sg_list[i].length);
 565                         ((struct mthca_data_seg *) wqe)->lkey =
 566                                 cpu_to_be32(wr->sg_list[i].lkey);
 567                         ((struct mthca_data_seg *) wqe)->addr =
 568                                 cpu_to_be64(wr->sg_list[i].addr);
 569                         wqe += sizeof (struct mthca_data_seg);
 570                 }
 571
 572                 if (i < srq->max_gs) {
 573                         ((struct mthca_data_seg *) wqe)->byte_count = 0;
 574                         ((struct mthca_data_seg *) wqe)->lkey = cpu_to_be32(MTHCA_INVAL_LKEY);
 575                         ((struct mthca_data_seg *) wqe)->addr = 0;
 576                 }
 577
 578                 srq->wrid[ind]  = wr->wr_id;
 579                 srq->first_free = next_ind;
 580         }
 581
 582         if (likely(nreq)) {
 583                 srq->counter += nreq;
 584
 585                 /*
 586                  * Make sure that descriptors are written before
 587                  * we write doorbell record.
 588                  */
 589                 wmb();
 590                 *srq->db = cpu_to_be32(srq->counter);
 591         }
 592
 593         spin_unlock_irqrestore(&srq->lock, flags);
 594         return err;
 595 }
 596
 597 int __devinit mthca_init_srq_table(struct mthca_dev *dev)
 598 {
 599         int err;
 600
 601         if (!(dev->mthca_flags & MTHCA_FLAG_SRQ))
 602                 return 0;
 603
 604         spin_lock_init(&dev->srq_table.lock);
 605
 606         err = mthca_alloc_init(&dev->srq_table.alloc,
 607                                dev->limits.num_srqs,
 608                                dev->limits.num_srqs - 1,
 609                                dev->limits.reserved_srqs);
 610         if (err)
 611                 return err;
 612
 613         err = mthca_array_init(&dev->srq_table.srq,
 614                                dev->limits.num_srqs);
 615         if (err)
 616                 mthca_alloc_cleanup(&dev->srq_table.alloc);
 617
 618         return err;
 619 }
 620
 621 void __devexit mthca_cleanup_srq_table(struct mthca_dev *dev)
 622 {
 623         if (!(dev->mthca_flags & MTHCA_FLAG_SRQ))
 624                 return;
 625
 626         mthca_array_cleanup(&dev->srq_table.srq, dev->limits.num_srqs);
 627         mthca_alloc_cleanup(&dev->srq_table.alloc);
 628 }