2 * i8042 keyboard and mouse controller driver for Linux
4 * Copyright (c) 1999-2004 Vojtech Pavlik
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published by
10 * the Free Software Foundation.
13 #include <linux/delay.h>
14 #include <linux/module.h>
15 #include <linux/moduleparam.h>
16 #include <linux/interrupt.h>
17 #include <linux/ioport.h>
18 #include <linux/init.h>
19 #include <linux/serio.h>
20 #include <linux/err.h>
21 #include <linux/rcupdate.h>
22 #include <linux/platform_device.h>
23 #include <linux/i8042.h>
27 MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>");
28 MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver");
29 MODULE_LICENSE("GPL");
31 static unsigned int i8042_nokbd;
32 module_param_named(nokbd, i8042_nokbd, bool, 0);
33 MODULE_PARM_DESC(nokbd, "Do not probe or use KBD port.");
35 static unsigned int i8042_noaux;
36 module_param_named(noaux, i8042_noaux, bool, 0);
37 MODULE_PARM_DESC(noaux, "Do not probe or use AUX (mouse) port.");
39 static unsigned int i8042_nomux;
40 module_param_named(nomux, i8042_nomux, bool, 0);
41 MODULE_PARM_DESC(nomux, "Do not check whether an active multiplexing conrtoller is present.");
43 static unsigned int i8042_unlock;
44 module_param_named(unlock, i8042_unlock, bool, 0);
45 MODULE_PARM_DESC(unlock, "Ignore keyboard lock.");
47 static unsigned int i8042_reset;
48 module_param_named(reset, i8042_reset, bool, 0);
49 MODULE_PARM_DESC(reset, "Reset controller during init and cleanup.");
51 static unsigned int i8042_direct;
52 module_param_named(direct, i8042_direct, bool, 0);
53 MODULE_PARM_DESC(direct, "Put keyboard port into non-translated mode.");
55 static unsigned int i8042_dumbkbd;
56 module_param_named(dumbkbd, i8042_dumbkbd, bool, 0);
57 MODULE_PARM_DESC(dumbkbd, "Pretend that controller can only read data from keyboard");
59 static unsigned int i8042_noloop;
60 module_param_named(noloop, i8042_noloop, bool, 0);
61 MODULE_PARM_DESC(noloop, "Disable the AUX Loopback command while probing for the AUX port");
63 static unsigned int i8042_blink_frequency = 500;
64 module_param_named(panicblink, i8042_blink_frequency, uint, 0600);
65 MODULE_PARM_DESC(panicblink, "Frequency with which keyboard LEDs should blink when kernel panics");
68 static int i8042_nopnp;
69 module_param_named(nopnp, i8042_nopnp, bool, 0);
70 MODULE_PARM_DESC(nopnp, "Do not use PNP to detect controller settings");
75 static int i8042_debug;
76 module_param_named(debug, i8042_debug, bool, 0600);
77 MODULE_PARM_DESC(debug, "Turn i8042 debugging mode on and off");
82 static DEFINE_SPINLOCK(i8042_lock);
91 #define I8042_KBD_PORT_NO 0
92 #define I8042_AUX_PORT_NO 1
93 #define I8042_MUX_PORT_NO 2
94 #define I8042_NUM_PORTS (I8042_NUM_MUX_PORTS + 2)
96 static struct i8042_port i8042_ports[I8042_NUM_PORTS];
98 static unsigned char i8042_initial_ctr;
99 static unsigned char i8042_ctr;
100 static unsigned char i8042_mux_present;
101 static unsigned char i8042_kbd_irq_registered;
102 static unsigned char i8042_aux_irq_registered;
103 static unsigned char i8042_suppress_kbd_ack;
104 static struct platform_device *i8042_platform_device;
106 static irqreturn_t i8042_interrupt(int irq, void *dev_id);
109 * The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to
110 * be ready for reading values from it / writing values to it.
111 * Called always with i8042_lock held.
114 static int i8042_wait_read(void)
118 while ((~i8042_read_status() & I8042_STR_OBF) && (i < I8042_CTL_TIMEOUT)) {
122 return -(i == I8042_CTL_TIMEOUT);
125 static int i8042_wait_write(void)
129 while ((i8042_read_status() & I8042_STR_IBF) && (i < I8042_CTL_TIMEOUT)) {
133 return -(i == I8042_CTL_TIMEOUT);
137 * i8042_flush() flushes all data that may be in the keyboard and mouse buffers
138 * of the i8042 down the toilet.
141 static int i8042_flush(void)
144 unsigned char data, str;
147 spin_lock_irqsave(&i8042_lock, flags);
149 while (((str = i8042_read_status()) & I8042_STR_OBF) && (i < I8042_BUFFER_SIZE)) {
151 data = i8042_read_data();
153 dbg("%02x <- i8042 (flush, %s)", data,
154 str & I8042_STR_AUXDATA ? "aux" : "kbd");
157 spin_unlock_irqrestore(&i8042_lock, flags);
163 * i8042_command() executes a command on the i8042. It also sends the input
164 * parameter(s) of the commands to it, and receives the output value(s). The
165 * parameters are to be stored in the param array, and the output is placed
166 * into the same array. The number of the parameters and output values is
167 * encoded in bits 8-11 of the command number.
170 static int __i8042_command(unsigned char *param, int command)
174 if (i8042_noloop && command == I8042_CMD_AUX_LOOP)
177 error = i8042_wait_write();
181 dbg("%02x -> i8042 (command)", command & 0xff);
182 i8042_write_command(command & 0xff);
184 for (i = 0; i < ((command >> 12) & 0xf); i++) {
185 error = i8042_wait_write();
188 dbg("%02x -> i8042 (parameter)", param[i]);
189 i8042_write_data(param[i]);
192 for (i = 0; i < ((command >> 8) & 0xf); i++) {
193 error = i8042_wait_read();
195 dbg(" -- i8042 (timeout)");
199 if (command == I8042_CMD_AUX_LOOP &&
200 !(i8042_read_status() & I8042_STR_AUXDATA)) {
201 dbg(" -- i8042 (auxerr)");
205 param[i] = i8042_read_data();
206 dbg("%02x <- i8042 (return)", param[i]);
212 int i8042_command(unsigned char *param, int command)
217 spin_lock_irqsave(&i8042_lock, flags);
218 retval = __i8042_command(param, command);
219 spin_unlock_irqrestore(&i8042_lock, flags);
223 EXPORT_SYMBOL(i8042_command);
226 * i8042_kbd_write() sends a byte out through the keyboard interface.
229 static int i8042_kbd_write(struct serio *port, unsigned char c)
234 spin_lock_irqsave(&i8042_lock, flags);
236 if (!(retval = i8042_wait_write())) {
237 dbg("%02x -> i8042 (kbd-data)", c);
241 spin_unlock_irqrestore(&i8042_lock, flags);
247 * i8042_aux_write() sends a byte out through the aux interface.
250 static int i8042_aux_write(struct serio *serio, unsigned char c)
252 struct i8042_port *port = serio->port_data;
254 return i8042_command(&c, port->mux == -1 ?
256 I8042_CMD_MUX_SEND + port->mux);
260 * i8042_start() is called by serio core when port is about to finish
261 * registering. It will mark port as existing so i8042_interrupt can
262 * start sending data through it.
264 static int i8042_start(struct serio *serio)
266 struct i8042_port *port = serio->port_data;
274 * i8042_stop() marks serio port as non-existing so i8042_interrupt
275 * will not try to send data to the port that is about to go away.
276 * The function is called by serio core as part of unregister procedure.
278 static void i8042_stop(struct serio *serio)
280 struct i8042_port *port = serio->port_data;
285 * We synchronize with both AUX and KBD IRQs because there is
286 * a (very unlikely) chance that AUX IRQ is raised for KBD port
289 synchronize_irq(I8042_AUX_IRQ);
290 synchronize_irq(I8042_KBD_IRQ);
295 * i8042_interrupt() is the most important function in this driver -
296 * it handles the interrupts from the i8042, and sends incoming bytes
297 * to the upper layers.
300 static irqreturn_t i8042_interrupt(int irq, void *dev_id)
302 struct i8042_port *port;
304 unsigned char str, data;
306 unsigned int port_no;
309 spin_lock_irqsave(&i8042_lock, flags);
310 str = i8042_read_status();
311 if (unlikely(~str & I8042_STR_OBF)) {
312 spin_unlock_irqrestore(&i8042_lock, flags);
313 if (irq) dbg("Interrupt %d, without any data", irq);
317 data = i8042_read_data();
318 spin_unlock_irqrestore(&i8042_lock, flags);
320 if (i8042_mux_present && (str & I8042_STR_AUXDATA)) {
321 static unsigned long last_transmit;
322 static unsigned char last_str;
325 if (str & I8042_STR_MUXERR) {
326 dbg("MUX error, status is %02x, data is %02x", str, data);
328 * When MUXERR condition is signalled the data register can only contain
329 * 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately
330 * it is not always the case. Some KBCs also report 0xfc when there is
331 * nothing connected to the port while others sometimes get confused which
332 * port the data came from and signal error leaving the data intact. They
333 * _do not_ revert to legacy mode (actually I've never seen KBC reverting
334 * to legacy mode yet, when we see one we'll add proper handling).
335 * Anyway, we process 0xfc, 0xfd, 0xfe and 0xff as timeouts, and for the
336 * rest assume that the data came from the same serio last byte
337 * was transmitted (if transmission happened not too long ago).
342 if (time_before(jiffies, last_transmit + HZ/10)) {
346 /* fall through - report timeout */
349 case 0xfe: dfl = SERIO_TIMEOUT; data = 0xfe; break;
350 case 0xff: dfl = SERIO_PARITY; data = 0xfe; break;
354 port_no = I8042_MUX_PORT_NO + ((str >> 6) & 3);
356 last_transmit = jiffies;
359 dfl = ((str & I8042_STR_PARITY) ? SERIO_PARITY : 0) |
360 ((str & I8042_STR_TIMEOUT) ? SERIO_TIMEOUT : 0);
362 port_no = (str & I8042_STR_AUXDATA) ?
363 I8042_AUX_PORT_NO : I8042_KBD_PORT_NO;
366 port = &i8042_ports[port_no];
368 dbg("%02x <- i8042 (interrupt, %d, %d%s%s)",
370 dfl & SERIO_PARITY ? ", bad parity" : "",
371 dfl & SERIO_TIMEOUT ? ", timeout" : "");
373 if (unlikely(i8042_suppress_kbd_ack))
374 if (port_no == I8042_KBD_PORT_NO &&
375 (data == 0xfa || data == 0xfe)) {
376 i8042_suppress_kbd_ack--;
380 if (likely(port->exists))
381 serio_interrupt(port->serio, data, dfl);
384 return IRQ_RETVAL(ret);
388 * i8042_enable_kbd_port enables keybaord port on chip
391 static int i8042_enable_kbd_port(void)
393 i8042_ctr &= ~I8042_CTR_KBDDIS;
394 i8042_ctr |= I8042_CTR_KBDINT;
396 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
397 i8042_ctr &= ~I8042_CTR_KBDINT;
398 i8042_ctr |= I8042_CTR_KBDDIS;
399 printk(KERN_ERR "i8042.c: Failed to enable KBD port.\n");
407 * i8042_enable_aux_port enables AUX (mouse) port on chip
410 static int i8042_enable_aux_port(void)
412 i8042_ctr &= ~I8042_CTR_AUXDIS;
413 i8042_ctr |= I8042_CTR_AUXINT;
415 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
416 i8042_ctr &= ~I8042_CTR_AUXINT;
417 i8042_ctr |= I8042_CTR_AUXDIS;
418 printk(KERN_ERR "i8042.c: Failed to enable AUX port.\n");
426 * i8042_enable_mux_ports enables 4 individual AUX ports after
427 * the controller has been switched into Multiplexed mode
430 static int i8042_enable_mux_ports(void)
435 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
436 i8042_command(¶m, I8042_CMD_MUX_PFX + i);
437 i8042_command(¶m, I8042_CMD_AUX_ENABLE);
440 return i8042_enable_aux_port();
444 * i8042_set_mux_mode checks whether the controller has an active
445 * multiplexor and puts the chip into Multiplexed (1) or Legacy (0) mode.
448 static int i8042_set_mux_mode(unsigned int mode, unsigned char *mux_version)
453 * Get rid of bytes in the queue.
459 * Internal loopback test - send three bytes, they should come back from the
460 * mouse interface, the last should be version.
464 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != 0xf0)
466 param = mode ? 0x56 : 0xf6;
467 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != (mode ? 0x56 : 0xf6))
469 param = mode ? 0xa4 : 0xa5;
470 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param == (mode ? 0xa4 : 0xa5))
474 *mux_version = param;
480 * i8042_check_mux() checks whether the controller supports the PS/2 Active
481 * Multiplexing specification by Synaptics, Phoenix, Insyde and
485 static int __devinit i8042_check_mux(void)
487 unsigned char mux_version;
489 if (i8042_set_mux_mode(1, &mux_version))
493 * Workaround for interference with USB Legacy emulation
494 * that causes a v10.12 MUX to be found.
496 if (mux_version == 0xAC)
499 printk(KERN_INFO "i8042.c: Detected active multiplexing controller, rev %d.%d.\n",
500 (mux_version >> 4) & 0xf, mux_version & 0xf);
503 * Disable all muxed ports by disabling AUX.
505 i8042_ctr |= I8042_CTR_AUXDIS;
506 i8042_ctr &= ~I8042_CTR_AUXINT;
508 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
509 printk(KERN_ERR "i8042.c: Failed to disable AUX port, can't use MUX.\n");
513 i8042_mux_present = 1;
519 * The following is used to test AUX IRQ delivery.
521 static struct completion i8042_aux_irq_delivered __devinitdata;
522 static int i8042_irq_being_tested __devinitdata;
524 static irqreturn_t __devinit i8042_aux_test_irq(int irq, void *dev_id)
527 unsigned char str, data;
530 spin_lock_irqsave(&i8042_lock, flags);
531 str = i8042_read_status();
532 if (str & I8042_STR_OBF) {
533 data = i8042_read_data();
534 if (i8042_irq_being_tested &&
535 data == 0xa5 && (str & I8042_STR_AUXDATA))
536 complete(&i8042_aux_irq_delivered);
539 spin_unlock_irqrestore(&i8042_lock, flags);
541 return IRQ_RETVAL(ret);
545 * i8042_toggle_aux - enables or disables AUX port on i8042 via command and
546 * verifies success by readinng CTR. Used when testing for presence of AUX
549 static int __devinit i8042_toggle_aux(int on)
554 if (i8042_command(¶m,
555 on ? I8042_CMD_AUX_ENABLE : I8042_CMD_AUX_DISABLE))
558 /* some chips need some time to set the I8042_CTR_AUXDIS bit */
559 for (i = 0; i < 100; i++) {
562 if (i8042_command(¶m, I8042_CMD_CTL_RCTR))
565 if (!(param & I8042_CTR_AUXDIS) == on)
573 * i8042_check_aux() applies as much paranoia as it can at detecting
574 * the presence of an AUX interface.
577 static int __devinit i8042_check_aux(void)
580 int irq_registered = 0;
581 int aux_loop_broken = 0;
586 * Get rid of bytes in the queue.
592 * Internal loopback test - filters out AT-type i8042's. Unfortunately
593 * SiS screwed up and their 5597 doesn't support the LOOP command even
594 * though it has an AUX port.
598 retval = i8042_command(¶m, I8042_CMD_AUX_LOOP);
599 if (retval || param != 0x5a) {
602 * External connection test - filters out AT-soldered PS/2 i8042's
603 * 0x00 - no error, 0x01-0x03 - clock/data stuck, 0xff - general error
604 * 0xfa - no error on some notebooks which ignore the spec
605 * Because it's common for chipsets to return error on perfectly functioning
606 * AUX ports, we test for this only when the LOOP command failed.
609 if (i8042_command(¶m, I8042_CMD_AUX_TEST) ||
610 (param && param != 0xfa && param != 0xff))
614 * If AUX_LOOP completed without error but returned unexpected data
622 * Bit assignment test - filters out PS/2 i8042's in AT mode
625 if (i8042_toggle_aux(0)) {
626 printk(KERN_WARNING "Failed to disable AUX port, but continuing anyway... Is this a SiS?\n");
627 printk(KERN_WARNING "If AUX port is really absent please use the 'i8042.noaux' option.\n");
630 if (i8042_toggle_aux(1))
634 * Test AUX IRQ delivery to make sure BIOS did not grab the IRQ and
635 * used it for a PCI card or somethig else.
638 if (i8042_noloop || aux_loop_broken) {
640 * Without LOOP command we can't test AUX IRQ delivery. Assume the port
641 * is working and hope we are right.
647 if (request_irq(I8042_AUX_IRQ, i8042_aux_test_irq, IRQF_SHARED,
648 "i8042", i8042_platform_device))
653 if (i8042_enable_aux_port())
656 spin_lock_irqsave(&i8042_lock, flags);
658 init_completion(&i8042_aux_irq_delivered);
659 i8042_irq_being_tested = 1;
662 retval = __i8042_command(¶m, I8042_CMD_AUX_LOOP & 0xf0ff);
664 spin_unlock_irqrestore(&i8042_lock, flags);
669 if (wait_for_completion_timeout(&i8042_aux_irq_delivered,
670 msecs_to_jiffies(250)) == 0) {
672 * AUX IRQ was never delivered so we need to flush the controller to
673 * get rid of the byte we put there; otherwise keyboard may not work.
682 * Disable the interface.
685 i8042_ctr |= I8042_CTR_AUXDIS;
686 i8042_ctr &= ~I8042_CTR_AUXINT;
688 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
692 free_irq(I8042_AUX_IRQ, i8042_platform_device);
697 static int i8042_controller_check(void)
699 if (i8042_flush() == I8042_BUFFER_SIZE) {
700 printk(KERN_ERR "i8042.c: No controller found.\n");
707 static int i8042_controller_selftest(void)
714 if (i8042_command(¶m, I8042_CMD_CTL_TEST)) {
715 printk(KERN_ERR "i8042.c: i8042 controller self test timeout.\n");
719 if (param != I8042_RET_CTL_TEST) {
720 printk(KERN_ERR "i8042.c: i8042 controller selftest failed. (%#x != %#x)\n",
721 param, I8042_RET_CTL_TEST);
729 * i8042_controller init initializes the i8042 controller, and,
730 * most importantly, sets it into non-xlated mode if that's
734 static int i8042_controller_init(void)
739 * Save the CTR for restoral on unload / reboot.
742 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_RCTR)) {
743 printk(KERN_ERR "i8042.c: Can't read CTR while initializing i8042.\n");
747 i8042_initial_ctr = i8042_ctr;
750 * Disable the keyboard interface and interrupt.
753 i8042_ctr |= I8042_CTR_KBDDIS;
754 i8042_ctr &= ~I8042_CTR_KBDINT;
760 spin_lock_irqsave(&i8042_lock, flags);
761 if (~i8042_read_status() & I8042_STR_KEYLOCK) {
763 i8042_ctr |= I8042_CTR_IGNKEYLOCK;
765 printk(KERN_WARNING "i8042.c: Warning: Keylock active.\n");
767 spin_unlock_irqrestore(&i8042_lock, flags);
770 * If the chip is configured into nontranslated mode by the BIOS, don't
771 * bother enabling translating and be happy.
774 if (~i8042_ctr & I8042_CTR_XLATE)
778 * Set nontranslated mode for the kbd interface if requested by an option.
779 * After this the kbd interface becomes a simple serial in/out, like the aux
780 * interface is. We don't do this by default, since it can confuse notebook
785 i8042_ctr &= ~I8042_CTR_XLATE;
791 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
792 printk(KERN_ERR "i8042.c: Can't write CTR while initializing i8042.\n");
801 * Reset the controller and reset CRT to the original value set by BIOS.
804 static void i8042_controller_reset(void)
809 * Disable both KBD and AUX interfaces so they don't get in the way
812 i8042_ctr |= I8042_CTR_KBDDIS | I8042_CTR_AUXDIS;
813 i8042_ctr &= ~(I8042_CTR_KBDINT | I8042_CTR_AUXINT);
816 * Disable MUX mode if present.
819 if (i8042_mux_present)
820 i8042_set_mux_mode(0, NULL);
823 * Reset the controller if requested.
826 i8042_controller_selftest();
829 * Restore the original control register setting.
832 if (i8042_command(&i8042_initial_ctr, I8042_CMD_CTL_WCTR))
833 printk(KERN_WARNING "i8042.c: Can't restore CTR.\n");
838 * i8042_panic_blink() will flash the keyboard LEDs and is called when
839 * kernel panics. Flashing LEDs is useful for users running X who may
840 * not see the console and will help distingushing panics from "real"
843 * Note that DELAY has a limit of 10ms so we will not get stuck here
844 * waiting for KBC to free up even if KBD interrupt is off
847 #define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0)
849 static long i8042_panic_blink(long count)
852 static long last_blink;
856 * We expect frequency to be about 1/2s. KDB uses about 1s.
857 * Make sure they are different.
859 if (!i8042_blink_frequency)
861 if (count - last_blink < i8042_blink_frequency)
865 while (i8042_read_status() & I8042_STR_IBF)
867 dbg("%02x -> i8042 (panic blink)", 0xed);
868 i8042_suppress_kbd_ack = 2;
869 i8042_write_data(0xed); /* set leds */
871 while (i8042_read_status() & I8042_STR_IBF)
874 dbg("%02x -> i8042 (panic blink)", led);
875 i8042_write_data(led);
885 * Here we try to restore the original BIOS settings. We only want to
886 * do that once, when we really suspend, not when we taking memory
887 * snapshot for swsusp (in this case we'll perform required cleanup
888 * as part of shutdown process).
891 static int i8042_suspend(struct platform_device *dev, pm_message_t state)
893 if (dev->dev.power.power_state.event != state.event) {
894 if (state.event == PM_EVENT_SUSPEND)
895 i8042_controller_reset();
897 dev->dev.power.power_state = state;
905 * Here we try to reset everything back to a state in which suspended
908 static int i8042_resume(struct platform_device *dev)
913 * Do not bother with restoring state if we haven't suspened yet
915 if (dev->dev.power.power_state.event == PM_EVENT_ON)
918 error = i8042_controller_check();
922 error = i8042_controller_selftest();
927 * Restore original CTR value and disable all ports
930 i8042_ctr = i8042_initial_ctr;
932 i8042_ctr &= ~I8042_CTR_XLATE;
933 i8042_ctr |= I8042_CTR_AUXDIS | I8042_CTR_KBDDIS;
934 i8042_ctr &= ~(I8042_CTR_AUXINT | I8042_CTR_KBDINT);
935 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
936 printk(KERN_ERR "i8042: Can't write CTR to resume\n");
940 if (i8042_mux_present) {
941 if (i8042_set_mux_mode(1, NULL) || i8042_enable_mux_ports())
943 "i8042: failed to resume active multiplexor, "
944 "mouse won't work.\n");
945 } else if (i8042_ports[I8042_AUX_PORT_NO].serio)
946 i8042_enable_aux_port();
948 if (i8042_ports[I8042_KBD_PORT_NO].serio)
949 i8042_enable_kbd_port();
951 i8042_interrupt(0, NULL);
953 dev->dev.power.power_state = PMSG_ON;
957 #endif /* CONFIG_PM */
960 * We need to reset the 8042 back to original mode on system shutdown,
961 * because otherwise BIOSes will be confused.
964 static void i8042_shutdown(struct platform_device *dev)
966 i8042_controller_reset();
969 static int __devinit i8042_create_kbd_port(void)
972 struct i8042_port *port = &i8042_ports[I8042_KBD_PORT_NO];
974 serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
978 serio->id.type = i8042_direct ? SERIO_8042 : SERIO_8042_XL;
979 serio->write = i8042_dumbkbd ? NULL : i8042_kbd_write;
980 serio->start = i8042_start;
981 serio->stop = i8042_stop;
982 serio->port_data = port;
983 serio->dev.parent = &i8042_platform_device->dev;
984 strlcpy(serio->name, "i8042 KBD port", sizeof(serio->name));
985 strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys));
988 port->irq = I8042_KBD_IRQ;
993 static int __devinit i8042_create_aux_port(int idx)
996 int port_no = idx < 0 ? I8042_AUX_PORT_NO : I8042_MUX_PORT_NO + idx;
997 struct i8042_port *port = &i8042_ports[port_no];
999 serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
1003 serio->id.type = SERIO_8042;
1004 serio->write = i8042_aux_write;
1005 serio->start = i8042_start;
1006 serio->stop = i8042_stop;
1007 serio->port_data = port;
1008 serio->dev.parent = &i8042_platform_device->dev;
1010 strlcpy(serio->name, "i8042 AUX port", sizeof(serio->name));
1011 strlcpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys));
1013 snprintf(serio->name, sizeof(serio->name), "i8042 AUX%d port", idx);
1014 snprintf(serio->phys, sizeof(serio->phys), I8042_MUX_PHYS_DESC, idx + 1);
1017 port->serio = serio;
1019 port->irq = I8042_AUX_IRQ;
1024 static void __devinit i8042_free_kbd_port(void)
1026 kfree(i8042_ports[I8042_KBD_PORT_NO].serio);
1027 i8042_ports[I8042_KBD_PORT_NO].serio = NULL;
1030 static void __devinit i8042_free_aux_ports(void)
1034 for (i = I8042_AUX_PORT_NO; i < I8042_NUM_PORTS; i++) {
1035 kfree(i8042_ports[i].serio);
1036 i8042_ports[i].serio = NULL;
1040 static void __devinit i8042_register_ports(void)
1044 for (i = 0; i < I8042_NUM_PORTS; i++) {
1045 if (i8042_ports[i].serio) {
1046 printk(KERN_INFO "serio: %s at %#lx,%#lx irq %d\n",
1047 i8042_ports[i].serio->name,
1048 (unsigned long) I8042_DATA_REG,
1049 (unsigned long) I8042_COMMAND_REG,
1050 i8042_ports[i].irq);
1051 serio_register_port(i8042_ports[i].serio);
1056 static void __devexit i8042_unregister_ports(void)
1060 for (i = 0; i < I8042_NUM_PORTS; i++) {
1061 if (i8042_ports[i].serio) {
1062 serio_unregister_port(i8042_ports[i].serio);
1063 i8042_ports[i].serio = NULL;
1068 static void i8042_free_irqs(void)
1070 if (i8042_aux_irq_registered)
1071 free_irq(I8042_AUX_IRQ, i8042_platform_device);
1072 if (i8042_kbd_irq_registered)
1073 free_irq(I8042_KBD_IRQ, i8042_platform_device);
1075 i8042_aux_irq_registered = i8042_kbd_irq_registered = 0;
1078 static int __devinit i8042_setup_aux(void)
1080 int (*aux_enable)(void);
1084 if (i8042_check_aux())
1087 if (i8042_nomux || i8042_check_mux()) {
1088 error = i8042_create_aux_port(-1);
1090 goto err_free_ports;
1091 aux_enable = i8042_enable_aux_port;
1093 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
1094 error = i8042_create_aux_port(i);
1096 goto err_free_ports;
1098 aux_enable = i8042_enable_mux_ports;
1101 error = request_irq(I8042_AUX_IRQ, i8042_interrupt, IRQF_SHARED,
1102 "i8042", i8042_platform_device);
1104 goto err_free_ports;
1109 i8042_aux_irq_registered = 1;
1113 free_irq(I8042_AUX_IRQ, i8042_platform_device);
1115 i8042_free_aux_ports();
1119 static int __devinit i8042_setup_kbd(void)
1123 error = i8042_create_kbd_port();
1127 error = request_irq(I8042_KBD_IRQ, i8042_interrupt, IRQF_SHARED,
1128 "i8042", i8042_platform_device);
1132 error = i8042_enable_kbd_port();
1136 i8042_kbd_irq_registered = 1;
1140 free_irq(I8042_KBD_IRQ, i8042_platform_device);
1142 i8042_free_kbd_port();
1146 static int __devinit i8042_probe(struct platform_device *dev)
1150 error = i8042_controller_selftest();
1154 error = i8042_controller_init();
1159 error = i8042_setup_aux();
1160 if (error && error != -ENODEV && error != -EBUSY)
1165 error = i8042_setup_kbd();
1171 * Ok, everything is ready, let's register all serio ports
1173 i8042_register_ports();
1178 i8042_free_aux_ports(); /* in case KBD failed but AUX not */
1180 i8042_controller_reset();
1185 static int __devexit i8042_remove(struct platform_device *dev)
1187 i8042_unregister_ports();
1189 i8042_controller_reset();
1194 static struct platform_driver i8042_driver = {
1197 .owner = THIS_MODULE,
1199 .probe = i8042_probe,
1200 .remove = __devexit_p(i8042_remove),
1201 .shutdown = i8042_shutdown,
1203 .suspend = i8042_suspend,
1204 .resume = i8042_resume,
1208 static int __init i8042_init(void)
1214 err = i8042_platform_init();
1218 err = i8042_controller_check();
1220 goto err_platform_exit;
1222 err = platform_driver_register(&i8042_driver);
1224 goto err_platform_exit;
1226 i8042_platform_device = platform_device_alloc("i8042", -1);
1227 if (!i8042_platform_device) {
1229 goto err_unregister_driver;
1232 err = platform_device_add(i8042_platform_device);
1234 goto err_free_device;
1236 panic_blink = i8042_panic_blink;
1241 platform_device_put(i8042_platform_device);
1242 err_unregister_driver:
1243 platform_driver_unregister(&i8042_driver);
1245 i8042_platform_exit();
1250 static void __exit i8042_exit(void)
1252 platform_device_unregister(i8042_platform_device);
1253 platform_driver_unregister(&i8042_driver);
1254 i8042_platform_exit();
1259 module_init(i8042_init);
1260 module_exit(i8042_exit);