drivers/kvm/vmx.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * This module enables machines with Intel VT-x extensions to run virtual
   5  * machines without emulation or binary translation.
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  *
   9  * Authors:
  10  *   Avi Kivity   <avi@qumranet.com>
  11  *   Yaniv Kamay  <yaniv@qumranet.com>
  12  *
  13  * This work is licensed under the terms of the GNU GPL, version 2.  See
  14  * the COPYING file in the top-level directory.
  15  *
  16  */
  17
  18 #include "kvm.h"
  19 #include "x86_emulate.h"
  20 #include "irq.h"
  21 #include "vmx.h"
  22 #include "segment_descriptor.h"
  23
  24 #include <linux/module.h>
  25 #include <linux/kernel.h>
  26 #include <linux/mm.h>
  27 #include <linux/highmem.h>
  28 #include <linux/sched.h>
  29 #include <linux/moduleparam.h>
  30
  31 #include <asm/io.h>
  32 #include <asm/desc.h>
  33
  34 MODULE_AUTHOR("Qumranet");
  35 MODULE_LICENSE("GPL");
  36
  37 static int bypass_guest_pf = 1;
  38 module_param(bypass_guest_pf, bool, 0);
  39
  40 struct vmcs {
  41         u32 revision_id;
  42         u32 abort;
  43         char data[0];
  44 };
  45
  46 struct vcpu_vmx {
  47         struct kvm_vcpu       vcpu;
  48         int                   launched;
  49         u8                    fail;
  50         struct kvm_msr_entry *guest_msrs;
  51         struct kvm_msr_entry *host_msrs;
  52         int                   nmsrs;
  53         int                   save_nmsrs;
  54         int                   msr_offset_efer;
  55 #ifdef CONFIG_X86_64
  56         int                   msr_offset_kernel_gs_base;
  57 #endif
  58         struct vmcs          *vmcs;
  59         struct {
  60                 int           loaded;
  61                 u16           fs_sel, gs_sel, ldt_sel;
  62                 int           gs_ldt_reload_needed;
  63                 int           fs_reload_needed;
  64                 int           guest_efer_loaded;
  65         }host_state;
  66
  67 };
  68
  69 static inline struct vcpu_vmx *to_vmx(struct kvm_vcpu *vcpu)
  70 {
  71         return container_of(vcpu, struct vcpu_vmx, vcpu);
  72 }
  73
  74 static int init_rmode_tss(struct kvm *kvm);
  75
  76 static DEFINE_PER_CPU(struct vmcs *, vmxarea);
  77 static DEFINE_PER_CPU(struct vmcs *, current_vmcs);
  78
  79 static struct page *vmx_io_bitmap_a;
  80 static struct page *vmx_io_bitmap_b;
  81
  82 static struct vmcs_config {
  83         int size;
  84         int order;
  85         u32 revision_id;
  86         u32 pin_based_exec_ctrl;
  87         u32 cpu_based_exec_ctrl;
  88         u32 vmexit_ctrl;
  89         u32 vmentry_ctrl;
  90 } vmcs_config;
  91
  92 #define VMX_SEGMENT_FIELD(seg)                                  \
  93         [VCPU_SREG_##seg] = {                                   \
  94                 .selector = GUEST_##seg##_SELECTOR,             \
  95                 .base = GUEST_##seg##_BASE,                     \
  96                 .limit = GUEST_##seg##_LIMIT,                   \
  97                 .ar_bytes = GUEST_##seg##_AR_BYTES,             \
  98         }
  99
 100 static struct kvm_vmx_segment_field {
 101         unsigned selector;
 102         unsigned base;
 103         unsigned limit;
 104         unsigned ar_bytes;
 105 } kvm_vmx_segment_fields[] = {
 106         VMX_SEGMENT_FIELD(CS),
 107         VMX_SEGMENT_FIELD(DS),
 108         VMX_SEGMENT_FIELD(ES),
 109         VMX_SEGMENT_FIELD(FS),
 110         VMX_SEGMENT_FIELD(GS),
 111         VMX_SEGMENT_FIELD(SS),
 112         VMX_SEGMENT_FIELD(TR),
 113         VMX_SEGMENT_FIELD(LDTR),
 114 };
 115
 116 /*
 117  * Keep MSR_K6_STAR at the end, as setup_msrs() will try to optimize it
 118  * away by decrementing the array size.
 119  */
 120 static const u32 vmx_msr_index[] = {
 121 #ifdef CONFIG_X86_64
 122         MSR_SYSCALL_MASK, MSR_LSTAR, MSR_CSTAR, MSR_KERNEL_GS_BASE,
 123 #endif
 124         MSR_EFER, MSR_K6_STAR,
 125 };
 126 #define NR_VMX_MSR ARRAY_SIZE(vmx_msr_index)
 127
 128 static void load_msrs(struct kvm_msr_entry *e, int n)
 129 {
 130         int i;
 131
 132         for (i = 0; i < n; ++i)
 133                 wrmsrl(e[i].index, e[i].data);
 134 }
 135
 136 static void save_msrs(struct kvm_msr_entry *e, int n)
 137 {
 138         int i;
 139
 140         for (i = 0; i < n; ++i)
 141                 rdmsrl(e[i].index, e[i].data);
 142 }
 143
 144 static inline int is_page_fault(u32 intr_info)
 145 {
 146         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
 147                              INTR_INFO_VALID_MASK)) ==
 148                 (INTR_TYPE_EXCEPTION | PF_VECTOR | INTR_INFO_VALID_MASK);
 149 }
 150
 151 static inline int is_no_device(u32 intr_info)
 152 {
 153         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
 154                              INTR_INFO_VALID_MASK)) ==
 155                 (INTR_TYPE_EXCEPTION | NM_VECTOR | INTR_INFO_VALID_MASK);
 156 }
 157
 158 static inline int is_invalid_opcode(u32 intr_info)
 159 {
 160         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
 161                              INTR_INFO_VALID_MASK)) ==
 162                 (INTR_TYPE_EXCEPTION | UD_VECTOR | INTR_INFO_VALID_MASK);
 163 }
 164
 165 static inline int is_external_interrupt(u32 intr_info)
 166 {
 167         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VALID_MASK))
 168                 == (INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
 169 }
 170
 171 static inline int cpu_has_vmx_tpr_shadow(void)
 172 {
 173         return (vmcs_config.cpu_based_exec_ctrl & CPU_BASED_TPR_SHADOW);
 174 }
 175
 176 static inline int vm_need_tpr_shadow(struct kvm *kvm)
 177 {
 178         return ((cpu_has_vmx_tpr_shadow()) && (irqchip_in_kernel(kvm)));
 179 }
 180
 181 static int __find_msr_index(struct vcpu_vmx *vmx, u32 msr)
 182 {
 183         int i;
 184
 185         for (i = 0; i < vmx->nmsrs; ++i)
 186                 if (vmx->guest_msrs[i].index == msr)
 187                         return i;
 188         return -1;
 189 }
 190
 191 static struct kvm_msr_entry *find_msr_entry(struct vcpu_vmx *vmx, u32 msr)
 192 {
 193         int i;
 194
 195         i = __find_msr_index(vmx, msr);
 196         if (i >= 0)
 197                 return &vmx->guest_msrs[i];
 198         return NULL;
 199 }
 200
 201 static void vmcs_clear(struct vmcs *vmcs)
 202 {
 203         u64 phys_addr = __pa(vmcs);
 204         u8 error;
 205
 206         asm volatile (ASM_VMX_VMCLEAR_RAX "; setna %0"
 207                       : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
 208                       : "cc", "memory");
 209         if (error)
 210                 printk(KERN_ERR "kvm: vmclear fail: %p/%llx\n",
 211                        vmcs, phys_addr);
 212 }
 213
 214 static void __vcpu_clear(void *arg)
 215 {
 216         struct vcpu_vmx *vmx = arg;
 217         int cpu = raw_smp_processor_id();
 218
 219         if (vmx->vcpu.cpu == cpu)
 220                 vmcs_clear(vmx->vmcs);
 221         if (per_cpu(current_vmcs, cpu) == vmx->vmcs)
 222                 per_cpu(current_vmcs, cpu) = NULL;
 223         rdtscll(vmx->vcpu.host_tsc);
 224 }
 225
 226 static void vcpu_clear(struct vcpu_vmx *vmx)
 227 {
 228         if (vmx->vcpu.cpu != raw_smp_processor_id() && vmx->vcpu.cpu != -1)
 229                 smp_call_function_single(vmx->vcpu.cpu, __vcpu_clear,
 230                                          vmx, 0, 1);
 231         else
 232                 __vcpu_clear(vmx);
 233         vmx->launched = 0;
 234 }
 235
 236 static unsigned long vmcs_readl(unsigned long field)
 237 {
 238         unsigned long value;
 239
 240         asm volatile (ASM_VMX_VMREAD_RDX_RAX
 241                       : "=a"(value) : "d"(field) : "cc");
 242         return value;
 243 }
 244
 245 static u16 vmcs_read16(unsigned long field)
 246 {
 247         return vmcs_readl(field);
 248 }
 249
 250 static u32 vmcs_read32(unsigned long field)
 251 {
 252         return vmcs_readl(field);
 253 }
 254
 255 static u64 vmcs_read64(unsigned long field)
 256 {
 257 #ifdef CONFIG_X86_64
 258         return vmcs_readl(field);
 259 #else
 260         return vmcs_readl(field) | ((u64)vmcs_readl(field+1) << 32);
 261 #endif
 262 }
 263
 264 static noinline void vmwrite_error(unsigned long field, unsigned long value)
 265 {
 266         printk(KERN_ERR "vmwrite error: reg %lx value %lx (err %d)\n",
 267                field, value, vmcs_read32(VM_INSTRUCTION_ERROR));
 268         dump_stack();
 269 }
 270
 271 static void vmcs_writel(unsigned long field, unsigned long value)
 272 {
 273         u8 error;
 274
 275         asm volatile (ASM_VMX_VMWRITE_RAX_RDX "; setna %0"
 276                        : "=q"(error) : "a"(value), "d"(field) : "cc" );
 277         if (unlikely(error))
 278                 vmwrite_error(field, value);
 279 }
 280
 281 static void vmcs_write16(unsigned long field, u16 value)
 282 {
 283         vmcs_writel(field, value);
 284 }
 285
 286 static void vmcs_write32(unsigned long field, u32 value)
 287 {
 288         vmcs_writel(field, value);
 289 }
 290
 291 static void vmcs_write64(unsigned long field, u64 value)
 292 {
 293 #ifdef CONFIG_X86_64
 294         vmcs_writel(field, value);
 295 #else
 296         vmcs_writel(field, value);
 297         asm volatile ("");
 298         vmcs_writel(field+1, value >> 32);
 299 #endif
 300 }
 301
 302 static void vmcs_clear_bits(unsigned long field, u32 mask)
 303 {
 304         vmcs_writel(field, vmcs_readl(field) & ~mask);
 305 }
 306
 307 static void vmcs_set_bits(unsigned long field, u32 mask)
 308 {
 309         vmcs_writel(field, vmcs_readl(field) | mask);
 310 }
 311
 312 static void update_exception_bitmap(struct kvm_vcpu *vcpu)
 313 {
 314         u32 eb;
 315
 316         eb = (1u << PF_VECTOR) | (1u << UD_VECTOR);
 317         if (!vcpu->fpu_active)
 318                 eb |= 1u << NM_VECTOR;
 319         if (vcpu->guest_debug.enabled)
 320                 eb |= 1u << 1;
 321         if (vcpu->rmode.active)
 322                 eb = ~0;
 323         vmcs_write32(EXCEPTION_BITMAP, eb);
 324 }
 325
 326 static void reload_tss(void)
 327 {
 328 #ifndef CONFIG_X86_64
 329
 330         /*
 331          * VT restores TR but not its size.  Useless.
 332          */
 333         struct descriptor_table gdt;
 334         struct segment_descriptor *descs;
 335
 336         get_gdt(&gdt);
 337         descs = (void *)gdt.base;
 338         descs[GDT_ENTRY_TSS].type = 9; /* available TSS */
 339         load_TR_desc();
 340 #endif
 341 }
 342
 343 static void load_transition_efer(struct vcpu_vmx *vmx)
 344 {
 345         int efer_offset = vmx->msr_offset_efer;
 346         u64 host_efer = vmx->host_msrs[efer_offset].data;
 347         u64 guest_efer = vmx->guest_msrs[efer_offset].data;
 348         u64 ignore_bits;
 349
 350         if (efer_offset < 0)
 351                 return;
 352         /*
 353          * NX is emulated; LMA and LME handled by hardware; SCE meaninless
 354          * outside long mode
 355          */
 356         ignore_bits = EFER_NX | EFER_SCE;
 357 #ifdef CONFIG_X86_64
 358         ignore_bits |= EFER_LMA | EFER_LME;
 359         /* SCE is meaningful only in long mode on Intel */
 360         if (guest_efer & EFER_LMA)
 361                 ignore_bits &= ~(u64)EFER_SCE;
 362 #endif
 363         if ((guest_efer & ~ignore_bits) == (host_efer & ~ignore_bits))
 364                 return;
 365
 366         vmx->host_state.guest_efer_loaded = 1;
 367         guest_efer &= ~ignore_bits;
 368         guest_efer |= host_efer & ignore_bits;
 369         wrmsrl(MSR_EFER, guest_efer);
 370         vmx->vcpu.stat.efer_reload++;
 371 }
 372
 373 static void reload_host_efer(struct vcpu_vmx *vmx)
 374 {
 375         if (vmx->host_state.guest_efer_loaded) {
 376                 vmx->host_state.guest_efer_loaded = 0;
 377                 load_msrs(vmx->host_msrs + vmx->msr_offset_efer, 1);
 378         }
 379 }
 380
 381 static void vmx_save_host_state(struct kvm_vcpu *vcpu)
 382 {
 383         struct vcpu_vmx *vmx = to_vmx(vcpu);
 384
 385         if (vmx->host_state.loaded)
 386                 return;
 387
 388         vmx->host_state.loaded = 1;
 389         /*
 390          * Set host fs and gs selectors.  Unfortunately, 22.2.3 does not
 391          * allow segment selectors with cpl > 0 or ti == 1.
 392          */
 393         vmx->host_state.ldt_sel = read_ldt();
 394         vmx->host_state.gs_ldt_reload_needed = vmx->host_state.ldt_sel;
 395         vmx->host_state.fs_sel = read_fs();
 396         if (!(vmx->host_state.fs_sel & 7)) {
 397                 vmcs_write16(HOST_FS_SELECTOR, vmx->host_state.fs_sel);
 398                 vmx->host_state.fs_reload_needed = 0;
 399         } else {
 400                 vmcs_write16(HOST_FS_SELECTOR, 0);
 401                 vmx->host_state.fs_reload_needed = 1;
 402         }
 403         vmx->host_state.gs_sel = read_gs();
 404         if (!(vmx->host_state.gs_sel & 7))
 405                 vmcs_write16(HOST_GS_SELECTOR, vmx->host_state.gs_sel);
 406         else {
 407                 vmcs_write16(HOST_GS_SELECTOR, 0);
 408                 vmx->host_state.gs_ldt_reload_needed = 1;
 409         }
 410
 411 #ifdef CONFIG_X86_64
 412         vmcs_writel(HOST_FS_BASE, read_msr(MSR_FS_BASE));
 413         vmcs_writel(HOST_GS_BASE, read_msr(MSR_GS_BASE));
 414 #else
 415         vmcs_writel(HOST_FS_BASE, segment_base(vmx->host_state.fs_sel));
 416         vmcs_writel(HOST_GS_BASE, segment_base(vmx->host_state.gs_sel));
 417 #endif
 418
 419 #ifdef CONFIG_X86_64
 420         if (is_long_mode(&vmx->vcpu)) {
 421                 save_msrs(vmx->host_msrs +
 422                           vmx->msr_offset_kernel_gs_base, 1);
 423         }
 424 #endif
 425         load_msrs(vmx->guest_msrs, vmx->save_nmsrs);
 426         load_transition_efer(vmx);
 427 }
 428
 429 static void vmx_load_host_state(struct vcpu_vmx *vmx)
 430 {
 431         unsigned long flags;
 432
 433         if (!vmx->host_state.loaded)
 434                 return;
 435
 436         vmx->host_state.loaded = 0;
 437         if (vmx->host_state.fs_reload_needed)
 438                 load_fs(vmx->host_state.fs_sel);
 439         if (vmx->host_state.gs_ldt_reload_needed) {
 440                 load_ldt(vmx->host_state.ldt_sel);
 441                 /*
 442                  * If we have to reload gs, we must take care to
 443                  * preserve our gs base.
 444                  */
 445                 local_irq_save(flags);
 446                 load_gs(vmx->host_state.gs_sel);
 447 #ifdef CONFIG_X86_64
 448                 wrmsrl(MSR_GS_BASE, vmcs_readl(HOST_GS_BASE));
 449 #endif
 450                 local_irq_restore(flags);
 451         }
 452         reload_tss();
 453         save_msrs(vmx->guest_msrs, vmx->save_nmsrs);
 454         load_msrs(vmx->host_msrs, vmx->save_nmsrs);
 455         reload_host_efer(vmx);
 456 }
 457
 458 /*
 459  * Switches to specified vcpu, until a matching vcpu_put(), but assumes
 460  * vcpu mutex is already taken.
 461  */
 462 static void vmx_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
 463 {
 464         struct vcpu_vmx *vmx = to_vmx(vcpu);
 465         u64 phys_addr = __pa(vmx->vmcs);
 466         u64 tsc_this, delta;
 467
 468         if (vcpu->cpu != cpu) {
 469                 vcpu_clear(vmx);
 470                 kvm_migrate_apic_timer(vcpu);
 471         }
 472
 473         if (per_cpu(current_vmcs, cpu) != vmx->vmcs) {
 474                 u8 error;
 475
 476                 per_cpu(current_vmcs, cpu) = vmx->vmcs;
 477                 asm volatile (ASM_VMX_VMPTRLD_RAX "; setna %0"
 478                               : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
 479                               : "cc");
 480                 if (error)
 481                         printk(KERN_ERR "kvm: vmptrld %p/%llx fail\n",
 482                                vmx->vmcs, phys_addr);
 483         }
 484
 485         if (vcpu->cpu != cpu) {
 486                 struct descriptor_table dt;
 487                 unsigned long sysenter_esp;
 488
 489                 vcpu->cpu = cpu;
 490                 /*
 491                  * Linux uses per-cpu TSS and GDT, so set these when switching
 492                  * processors.
 493                  */
 494                 vmcs_writel(HOST_TR_BASE, read_tr_base()); /* 22.2.4 */
 495                 get_gdt(&dt);
 496                 vmcs_writel(HOST_GDTR_BASE, dt.base);   /* 22.2.4 */
 497
 498                 rdmsrl(MSR_IA32_SYSENTER_ESP, sysenter_esp);
 499                 vmcs_writel(HOST_IA32_SYSENTER_ESP, sysenter_esp); /* 22.2.3 */
 500
 501                 /*
 502                  * Make sure the time stamp counter is monotonous.
 503                  */
 504                 rdtscll(tsc_this);
 505                 delta = vcpu->host_tsc - tsc_this;
 506                 vmcs_write64(TSC_OFFSET, vmcs_read64(TSC_OFFSET) + delta);
 507         }
 508 }
 509
 510 static void vmx_vcpu_put(struct kvm_vcpu *vcpu)
 511 {
 512         vmx_load_host_state(to_vmx(vcpu));
 513         kvm_put_guest_fpu(vcpu);
 514 }
 515
 516 static void vmx_fpu_activate(struct kvm_vcpu *vcpu)
 517 {
 518         if (vcpu->fpu_active)
 519                 return;
 520         vcpu->fpu_active = 1;
 521         vmcs_clear_bits(GUEST_CR0, X86_CR0_TS);
 522         if (vcpu->cr0 & X86_CR0_TS)
 523                 vmcs_set_bits(GUEST_CR0, X86_CR0_TS);
 524         update_exception_bitmap(vcpu);
 525 }
 526
 527 static void vmx_fpu_deactivate(struct kvm_vcpu *vcpu)
 528 {
 529         if (!vcpu->fpu_active)
 530                 return;
 531         vcpu->fpu_active = 0;
 532         vmcs_set_bits(GUEST_CR0, X86_CR0_TS);
 533         update_exception_bitmap(vcpu);
 534 }
 535
 536 static void vmx_vcpu_decache(struct kvm_vcpu *vcpu)
 537 {
 538         vcpu_clear(to_vmx(vcpu));
 539 }
 540
 541 static unsigned long vmx_get_rflags(struct kvm_vcpu *vcpu)
 542 {
 543         return vmcs_readl(GUEST_RFLAGS);
 544 }
 545
 546 static void vmx_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
 547 {
 548         if (vcpu->rmode.active)
 549                 rflags |= X86_EFLAGS_IOPL | X86_EFLAGS_VM;
 550         vmcs_writel(GUEST_RFLAGS, rflags);
 551 }
 552
 553 static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
 554 {
 555         unsigned long rip;
 556         u32 interruptibility;
 557
 558         rip = vmcs_readl(GUEST_RIP);
 559         rip += vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
 560         vmcs_writel(GUEST_RIP, rip);
 561
 562         /*
 563          * We emulated an instruction, so temporary interrupt blocking
 564          * should be removed, if set.
 565          */
 566         interruptibility = vmcs_read32(GUEST_INTERRUPTIBILITY_INFO);
 567         if (interruptibility & 3)
 568                 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO,
 569                              interruptibility & ~3);
 570         vcpu->interrupt_window_open = 1;
 571 }
 572
 573 static void vmx_inject_gp(struct kvm_vcpu *vcpu, unsigned error_code)
 574 {
 575         printk(KERN_DEBUG "inject_general_protection: rip 0x%lx\n",
 576                vmcs_readl(GUEST_RIP));
 577         vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, error_code);
 578         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
 579                      GP_VECTOR |
 580                      INTR_TYPE_EXCEPTION |
 581                      INTR_INFO_DELIEVER_CODE_MASK |
 582                      INTR_INFO_VALID_MASK);
 583 }
 584
 585 static void vmx_inject_ud(struct kvm_vcpu *vcpu)
 586 {
 587         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
 588                      UD_VECTOR |
 589                      INTR_TYPE_EXCEPTION |
 590                      INTR_INFO_VALID_MASK);
 591 }
 592
 593 /*
 594  * Swap MSR entry in host/guest MSR entry array.
 595  */
 596 #ifdef CONFIG_X86_64
 597 static void move_msr_up(struct vcpu_vmx *vmx, int from, int to)
 598 {
 599         struct kvm_msr_entry tmp;
 600
 601         tmp = vmx->guest_msrs[to];
 602         vmx->guest_msrs[to] = vmx->guest_msrs[from];
 603         vmx->guest_msrs[from] = tmp;
 604         tmp = vmx->host_msrs[to];
 605         vmx->host_msrs[to] = vmx->host_msrs[from];
 606         vmx->host_msrs[from] = tmp;
 607 }
 608 #endif
 609
 610 /*
 611  * Set up the vmcs to automatically save and restore system
 612  * msrs.  Don't touch the 64-bit msrs if the guest is in legacy
 613  * mode, as fiddling with msrs is very expensive.
 614  */
 615 static void setup_msrs(struct vcpu_vmx *vmx)
 616 {
 617         int save_nmsrs;
 618
 619         save_nmsrs = 0;
 620 #ifdef CONFIG_X86_64
 621         if (is_long_mode(&vmx->vcpu)) {
 622                 int index;
 623
 624                 index = __find_msr_index(vmx, MSR_SYSCALL_MASK);
 625                 if (index >= 0)
 626                         move_msr_up(vmx, index, save_nmsrs++);
 627                 index = __find_msr_index(vmx, MSR_LSTAR);
 628                 if (index >= 0)
 629                         move_msr_up(vmx, index, save_nmsrs++);
 630                 index = __find_msr_index(vmx, MSR_CSTAR);
 631                 if (index >= 0)
 632                         move_msr_up(vmx, index, save_nmsrs++);
 633                 index = __find_msr_index(vmx, MSR_KERNEL_GS_BASE);
 634                 if (index >= 0)
 635                         move_msr_up(vmx, index, save_nmsrs++);
 636                 /*
 637                  * MSR_K6_STAR is only needed on long mode guests, and only
 638                  * if efer.sce is enabled.
 639                  */
 640                 index = __find_msr_index(vmx, MSR_K6_STAR);
 641                 if ((index >= 0) && (vmx->vcpu.shadow_efer & EFER_SCE))
 642                         move_msr_up(vmx, index, save_nmsrs++);
 643         }
 644 #endif
 645         vmx->save_nmsrs = save_nmsrs;
 646
 647 #ifdef CONFIG_X86_64
 648         vmx->msr_offset_kernel_gs_base =
 649                 __find_msr_index(vmx, MSR_KERNEL_GS_BASE);
 650 #endif
 651         vmx->msr_offset_efer = __find_msr_index(vmx, MSR_EFER);
 652 }
 653
 654 /*
 655  * reads and returns guest's timestamp counter "register"
 656  * guest_tsc = host_tsc + tsc_offset    -- 21.3
 657  */
 658 static u64 guest_read_tsc(void)
 659 {
 660         u64 host_tsc, tsc_offset;
 661
 662         rdtscll(host_tsc);
 663         tsc_offset = vmcs_read64(TSC_OFFSET);
 664         return host_tsc + tsc_offset;
 665 }
 666
 667 /*
 668  * writes 'guest_tsc' into guest's timestamp counter "register"
 669  * guest_tsc = host_tsc + tsc_offset ==> tsc_offset = guest_tsc - host_tsc
 670  */
 671 static void guest_write_tsc(u64 guest_tsc)
 672 {
 673         u64 host_tsc;
 674
 675         rdtscll(host_tsc);
 676         vmcs_write64(TSC_OFFSET, guest_tsc - host_tsc);
 677 }
 678
 679 /*
 680  * Reads an msr value (of 'msr_index') into 'pdata'.
 681  * Returns 0 on success, non-0 otherwise.
 682  * Assumes vcpu_load() was already called.
 683  */
 684 static int vmx_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
 685 {
 686         u64 data;
 687         struct kvm_msr_entry *msr;
 688
 689         if (!pdata) {
 690                 printk(KERN_ERR "BUG: get_msr called with NULL pdata\n");
 691                 return -EINVAL;
 692         }
 693
 694         switch (msr_index) {
 695 #ifdef CONFIG_X86_64
 696         case MSR_FS_BASE:
 697                 data = vmcs_readl(GUEST_FS_BASE);
 698                 break;
 699         case MSR_GS_BASE:
 700                 data = vmcs_readl(GUEST_GS_BASE);
 701                 break;
 702         case MSR_EFER:
 703                 return kvm_get_msr_common(vcpu, msr_index, pdata);
 704 #endif
 705         case MSR_IA32_TIME_STAMP_COUNTER:
 706                 data = guest_read_tsc();
 707                 break;
 708         case MSR_IA32_SYSENTER_CS:
 709                 data = vmcs_read32(GUEST_SYSENTER_CS);
 710                 break;
 711         case MSR_IA32_SYSENTER_EIP:
 712                 data = vmcs_readl(GUEST_SYSENTER_EIP);
 713                 break;
 714         case MSR_IA32_SYSENTER_ESP:
 715                 data = vmcs_readl(GUEST_SYSENTER_ESP);
 716                 break;
 717         default:
 718                 msr = find_msr_entry(to_vmx(vcpu), msr_index);
 719                 if (msr) {
 720                         data = msr->data;
 721                         break;
 722                 }
 723                 return kvm_get_msr_common(vcpu, msr_index, pdata);
 724         }
 725
 726         *pdata = data;
 727         return 0;
 728 }
 729
 730 /*
 731  * Writes msr value into into the appropriate "register".
 732  * Returns 0 on success, non-0 otherwise.
 733  * Assumes vcpu_load() was already called.
 734  */
 735 static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 736 {
 737         struct vcpu_vmx *vmx = to_vmx(vcpu);
 738         struct kvm_msr_entry *msr;
 739         int ret = 0;
 740
 741         switch (msr_index) {
 742 #ifdef CONFIG_X86_64
 743         case MSR_EFER:
 744                 ret = kvm_set_msr_common(vcpu, msr_index, data);
 745                 if (vmx->host_state.loaded) {
 746                         reload_host_efer(vmx);
 747                         load_transition_efer(vmx);
 748                 }
 749                 break;
 750         case MSR_FS_BASE:
 751                 vmcs_writel(GUEST_FS_BASE, data);
 752                 break;
 753         case MSR_GS_BASE:
 754                 vmcs_writel(GUEST_GS_BASE, data);
 755                 break;
 756 #endif
 757         case MSR_IA32_SYSENTER_CS:
 758                 vmcs_write32(GUEST_SYSENTER_CS, data);
 759                 break;
 760         case MSR_IA32_SYSENTER_EIP:
 761                 vmcs_writel(GUEST_SYSENTER_EIP, data);
 762                 break;
 763         case MSR_IA32_SYSENTER_ESP:
 764                 vmcs_writel(GUEST_SYSENTER_ESP, data);
 765                 break;
 766         case MSR_IA32_TIME_STAMP_COUNTER:
 767                 guest_write_tsc(data);
 768                 break;
 769         default:
 770                 msr = find_msr_entry(vmx, msr_index);
 771                 if (msr) {
 772                         msr->data = data;
 773                         if (vmx->host_state.loaded)
 774                                 load_msrs(vmx->guest_msrs, vmx->save_nmsrs);
 775                         break;
 776                 }
 777                 ret = kvm_set_msr_common(vcpu, msr_index, data);
 778         }
 779
 780         return ret;
 781 }
 782
 783 /*
 784  * Sync the rsp and rip registers into the vcpu structure.  This allows
 785  * registers to be accessed by indexing vcpu->regs.
 786  */
 787 static void vcpu_load_rsp_rip(struct kvm_vcpu *vcpu)
 788 {
 789         vcpu->regs[VCPU_REGS_RSP] = vmcs_readl(GUEST_RSP);
 790         vcpu->rip = vmcs_readl(GUEST_RIP);
 791 }
 792
 793 /*
 794  * Syncs rsp and rip back into the vmcs.  Should be called after possible
 795  * modification.
 796  */
 797 static void vcpu_put_rsp_rip(struct kvm_vcpu *vcpu)
 798 {
 799         vmcs_writel(GUEST_RSP, vcpu->regs[VCPU_REGS_RSP]);
 800         vmcs_writel(GUEST_RIP, vcpu->rip);
 801 }
 802
 803 static int set_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
 804 {
 805         unsigned long dr7 = 0x400;
 806         int old_singlestep;
 807
 808         old_singlestep = vcpu->guest_debug.singlestep;
 809
 810         vcpu->guest_debug.enabled = dbg->enabled;
 811         if (vcpu->guest_debug.enabled) {
 812                 int i;
 813
 814                 dr7 |= 0x200;  /* exact */
 815                 for (i = 0; i < 4; ++i) {
 816                         if (!dbg->breakpoints[i].enabled)
 817                                 continue;
 818                         vcpu->guest_debug.bp[i] = dbg->breakpoints[i].address;
 819                         dr7 |= 2 << (i*2);    /* global enable */
 820                         dr7 |= 0 << (i*4+16); /* execution breakpoint */
 821                 }
 822
 823                 vcpu->guest_debug.singlestep = dbg->singlestep;
 824         } else
 825                 vcpu->guest_debug.singlestep = 0;
 826
 827         if (old_singlestep && !vcpu->guest_debug.singlestep) {
 828                 unsigned long flags;
 829
 830                 flags = vmcs_readl(GUEST_RFLAGS);
 831                 flags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
 832                 vmcs_writel(GUEST_RFLAGS, flags);
 833         }
 834
 835         update_exception_bitmap(vcpu);
 836         vmcs_writel(GUEST_DR7, dr7);
 837
 838         return 0;
 839 }
 840
 841 static int vmx_get_irq(struct kvm_vcpu *vcpu)
 842 {
 843         u32 idtv_info_field;
 844
 845         idtv_info_field = vmcs_read32(IDT_VECTORING_INFO_FIELD);
 846         if (idtv_info_field & INTR_INFO_VALID_MASK) {
 847                 if (is_external_interrupt(idtv_info_field))
 848                         return idtv_info_field & VECTORING_INFO_VECTOR_MASK;
 849                 else
 850                         printk("pending exception: not handled yet\n");
 851         }
 852         return -1;
 853 }
 854
 855 static __init int cpu_has_kvm_support(void)
 856 {
 857         unsigned long ecx = cpuid_ecx(1);
 858         return test_bit(5, &ecx); /* CPUID.1:ECX.VMX[bit 5] -> VT */
 859 }
 860
 861 static __init int vmx_disabled_by_bios(void)
 862 {
 863         u64 msr;
 864
 865         rdmsrl(MSR_IA32_FEATURE_CONTROL, msr);
 866         return (msr & (MSR_IA32_FEATURE_CONTROL_LOCKED |
 867                        MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED))
 868             == MSR_IA32_FEATURE_CONTROL_LOCKED;
 869         /* locked but not enabled */
 870 }
 871
 872 static void hardware_enable(void *garbage)
 873 {
 874         int cpu = raw_smp_processor_id();
 875         u64 phys_addr = __pa(per_cpu(vmxarea, cpu));
 876         u64 old;
 877
 878         rdmsrl(MSR_IA32_FEATURE_CONTROL, old);
 879         if ((old & (MSR_IA32_FEATURE_CONTROL_LOCKED |
 880                     MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED))
 881             != (MSR_IA32_FEATURE_CONTROL_LOCKED |
 882                 MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED))
 883                 /* enable and lock */
 884                 wrmsrl(MSR_IA32_FEATURE_CONTROL, old |
 885                        MSR_IA32_FEATURE_CONTROL_LOCKED |
 886                        MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED);
 887         write_cr4(read_cr4() | X86_CR4_VMXE); /* FIXME: not cpu hotplug safe */
 888         asm volatile (ASM_VMX_VMXON_RAX : : "a"(&phys_addr), "m"(phys_addr)
 889                       : "memory", "cc");
 890 }
 891
 892 static void hardware_disable(void *garbage)
 893 {
 894         asm volatile (ASM_VMX_VMXOFF : : : "cc");
 895 }
 896
 897 static __init int adjust_vmx_controls(u32 ctl_min, u32 ctl_opt,
 898                                       u32 msr, u32* result)
 899 {
 900         u32 vmx_msr_low, vmx_msr_high;
 901         u32 ctl = ctl_min | ctl_opt;
 902
 903         rdmsr(msr, vmx_msr_low, vmx_msr_high);
 904
 905         ctl &= vmx_msr_high; /* bit == 0 in high word ==> must be zero */
 906         ctl |= vmx_msr_low;  /* bit == 1 in low word  ==> must be one  */
 907
 908         /* Ensure minimum (required) set of control bits are supported. */
 909         if (ctl_min & ~ctl)
 910                 return -EIO;
 911
 912         *result = ctl;
 913         return 0;
 914 }
 915
 916 static __init int setup_vmcs_config(struct vmcs_config *vmcs_conf)
 917 {
 918         u32 vmx_msr_low, vmx_msr_high;
 919         u32 min, opt;
 920         u32 _pin_based_exec_control = 0;
 921         u32 _cpu_based_exec_control = 0;
 922         u32 _vmexit_control = 0;
 923         u32 _vmentry_control = 0;
 924
 925         min = PIN_BASED_EXT_INTR_MASK | PIN_BASED_NMI_EXITING;
 926         opt = 0;
 927         if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_PINBASED_CTLS,
 928                                 &_pin_based_exec_control) < 0)
 929                 return -EIO;
 930
 931         min = CPU_BASED_HLT_EXITING |
 932 #ifdef CONFIG_X86_64
 933               CPU_BASED_CR8_LOAD_EXITING |
 934               CPU_BASED_CR8_STORE_EXITING |
 935 #endif
 936               CPU_BASED_USE_IO_BITMAPS |
 937               CPU_BASED_MOV_DR_EXITING |
 938               CPU_BASED_USE_TSC_OFFSETING;
 939 #ifdef CONFIG_X86_64
 940         opt = CPU_BASED_TPR_SHADOW;
 941 #else
 942         opt = 0;
 943 #endif
 944         if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_PROCBASED_CTLS,
 945                                 &_cpu_based_exec_control) < 0)
 946                 return -EIO;
 947 #ifdef CONFIG_X86_64
 948         if ((_cpu_based_exec_control & CPU_BASED_TPR_SHADOW))
 949                 _cpu_based_exec_control &= ~CPU_BASED_CR8_LOAD_EXITING &
 950                                            ~CPU_BASED_CR8_STORE_EXITING;
 951 #endif
 952
 953         min = 0;
 954 #ifdef CONFIG_X86_64
 955         min |= VM_EXIT_HOST_ADDR_SPACE_SIZE;
 956 #endif
 957         opt = 0;
 958         if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_EXIT_CTLS,
 959                                 &_vmexit_control) < 0)
 960                 return -EIO;
 961
 962         min = opt = 0;
 963         if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_ENTRY_CTLS,
 964                                 &_vmentry_control) < 0)
 965                 return -EIO;
 966
 967         rdmsr(MSR_IA32_VMX_BASIC, vmx_msr_low, vmx_msr_high);
 968
 969         /* IA-32 SDM Vol 3B: VMCS size is never greater than 4kB. */
 970         if ((vmx_msr_high & 0x1fff) > PAGE_SIZE)
 971                 return -EIO;
 972
 973 #ifdef CONFIG_X86_64
 974         /* IA-32 SDM Vol 3B: 64-bit CPUs always have VMX_BASIC_MSR[48]==0. */
 975         if (vmx_msr_high & (1u<<16))
 976                 return -EIO;
 977 #endif
 978
 979         /* Require Write-Back (WB) memory type for VMCS accesses. */
 980         if (((vmx_msr_high >> 18) & 15) != 6)
 981                 return -EIO;
 982
 983         vmcs_conf->size = vmx_msr_high & 0x1fff;
 984         vmcs_conf->order = get_order(vmcs_config.size);
 985         vmcs_conf->revision_id = vmx_msr_low;
 986
 987         vmcs_conf->pin_based_exec_ctrl = _pin_based_exec_control;
 988         vmcs_conf->cpu_based_exec_ctrl = _cpu_based_exec_control;
 989         vmcs_conf->vmexit_ctrl         = _vmexit_control;
 990         vmcs_conf->vmentry_ctrl        = _vmentry_control;
 991
 992         return 0;
 993 }
 994
 995 static struct vmcs *alloc_vmcs_cpu(int cpu)
 996 {
 997         int node = cpu_to_node(cpu);
 998         struct page *pages;
 999         struct vmcs *vmcs;
1000
1001         pages = alloc_pages_node(node, GFP_KERNEL, vmcs_config.order);
1002         if (!pages)
1003                 return NULL;
1004         vmcs = page_address(pages);
1005         memset(vmcs, 0, vmcs_config.size);
1006         vmcs->revision_id = vmcs_config.revision_id; /* vmcs revision id */
1007         return vmcs;
1008 }
1009
1010 static struct vmcs *alloc_vmcs(void)
1011 {
1012         return alloc_vmcs_cpu(raw_smp_processor_id());
1013 }
1014
1015 static void free_vmcs(struct vmcs *vmcs)
1016 {
1017         free_pages((unsigned long)vmcs, vmcs_config.order);
1018 }
1019
1020 static void free_kvm_area(void)
1021 {
1022         int cpu;
1023
1024         for_each_online_cpu(cpu)
1025                 free_vmcs(per_cpu(vmxarea, cpu));
1026 }
1027
1028 static __init int alloc_kvm_area(void)
1029 {
1030         int cpu;
1031
1032         for_each_online_cpu(cpu) {
1033                 struct vmcs *vmcs;
1034
1035                 vmcs = alloc_vmcs_cpu(cpu);
1036                 if (!vmcs) {
1037                         free_kvm_area();
1038                         return -ENOMEM;
1039                 }
1040
1041                 per_cpu(vmxarea, cpu) = vmcs;
1042         }
1043         return 0;
1044 }
1045
1046 static __init int hardware_setup(void)
1047 {
1048         if (setup_vmcs_config(&vmcs_config) < 0)
1049                 return -EIO;
1050         return alloc_kvm_area();
1051 }
1052
1053 static __exit void hardware_unsetup(void)
1054 {
1055         free_kvm_area();
1056 }
1057
1058 static void fix_pmode_dataseg(int seg, struct kvm_save_segment *save)
1059 {
1060         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1061
1062         if (vmcs_readl(sf->base) == save->base && (save->base & AR_S_MASK)) {
1063                 vmcs_write16(sf->selector, save->selector);
1064                 vmcs_writel(sf->base, save->base);
1065                 vmcs_write32(sf->limit, save->limit);
1066                 vmcs_write32(sf->ar_bytes, save->ar);
1067         } else {
1068                 u32 dpl = (vmcs_read16(sf->selector) & SELECTOR_RPL_MASK)
1069                         << AR_DPL_SHIFT;
1070                 vmcs_write32(sf->ar_bytes, 0x93 | dpl);
1071         }
1072 }
1073
1074 static void enter_pmode(struct kvm_vcpu *vcpu)
1075 {
1076         unsigned long flags;
1077
1078         vcpu->rmode.active = 0;
1079
1080         vmcs_writel(GUEST_TR_BASE, vcpu->rmode.tr.base);
1081         vmcs_write32(GUEST_TR_LIMIT, vcpu->rmode.tr.limit);
1082         vmcs_write32(GUEST_TR_AR_BYTES, vcpu->rmode.tr.ar);
1083
1084         flags = vmcs_readl(GUEST_RFLAGS);
1085         flags &= ~(X86_EFLAGS_IOPL | X86_EFLAGS_VM);
1086         flags |= (vcpu->rmode.save_iopl << IOPL_SHIFT);
1087         vmcs_writel(GUEST_RFLAGS, flags);
1088
1089         vmcs_writel(GUEST_CR4, (vmcs_readl(GUEST_CR4) & ~X86_CR4_VME) |
1090                         (vmcs_readl(CR4_READ_SHADOW) & X86_CR4_VME));
1091
1092         update_exception_bitmap(vcpu);
1093
1094         fix_pmode_dataseg(VCPU_SREG_ES, &vcpu->rmode.es);
1095         fix_pmode_dataseg(VCPU_SREG_DS, &vcpu->rmode.ds);
1096         fix_pmode_dataseg(VCPU_SREG_GS, &vcpu->rmode.gs);
1097         fix_pmode_dataseg(VCPU_SREG_FS, &vcpu->rmode.fs);
1098
1099         vmcs_write16(GUEST_SS_SELECTOR, 0);
1100         vmcs_write32(GUEST_SS_AR_BYTES, 0x93);
1101
1102         vmcs_write16(GUEST_CS_SELECTOR,
1103                      vmcs_read16(GUEST_CS_SELECTOR) & ~SELECTOR_RPL_MASK);
1104         vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
1105 }
1106
1107 static gva_t rmode_tss_base(struct kvm* kvm)
1108 {
1109         gfn_t base_gfn = kvm->memslots[0].base_gfn + kvm->memslots[0].npages - 3;
1110         return base_gfn << PAGE_SHIFT;
1111 }
1112
1113 static void fix_rmode_seg(int seg, struct kvm_save_segment *save)
1114 {
1115         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1116
1117         save->selector = vmcs_read16(sf->selector);
1118         save->base = vmcs_readl(sf->base);
1119         save->limit = vmcs_read32(sf->limit);
1120         save->ar = vmcs_read32(sf->ar_bytes);
1121         vmcs_write16(sf->selector, vmcs_readl(sf->base) >> 4);
1122         vmcs_write32(sf->limit, 0xffff);
1123         vmcs_write32(sf->ar_bytes, 0xf3);
1124 }
1125
1126 static void enter_rmode(struct kvm_vcpu *vcpu)
1127 {
1128         unsigned long flags;
1129
1130         vcpu->rmode.active = 1;
1131
1132         vcpu->rmode.tr.base = vmcs_readl(GUEST_TR_BASE);
1133         vmcs_writel(GUEST_TR_BASE, rmode_tss_base(vcpu->kvm));
1134
1135         vcpu->rmode.tr.limit = vmcs_read32(GUEST_TR_LIMIT);
1136         vmcs_write32(GUEST_TR_LIMIT, RMODE_TSS_SIZE - 1);
1137
1138         vcpu->rmode.tr.ar = vmcs_read32(GUEST_TR_AR_BYTES);
1139         vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
1140
1141         flags = vmcs_readl(GUEST_RFLAGS);
1142         vcpu->rmode.save_iopl = (flags & X86_EFLAGS_IOPL) >> IOPL_SHIFT;
1143
1144         flags |= X86_EFLAGS_IOPL | X86_EFLAGS_VM;
1145
1146         vmcs_writel(GUEST_RFLAGS, flags);
1147         vmcs_writel(GUEST_CR4, vmcs_readl(GUEST_CR4) | X86_CR4_VME);
1148         update_exception_bitmap(vcpu);
1149
1150         vmcs_write16(GUEST_SS_SELECTOR, vmcs_readl(GUEST_SS_BASE) >> 4);
1151         vmcs_write32(GUEST_SS_LIMIT, 0xffff);
1152         vmcs_write32(GUEST_SS_AR_BYTES, 0xf3);
1153
1154         vmcs_write32(GUEST_CS_AR_BYTES, 0xf3);
1155         vmcs_write32(GUEST_CS_LIMIT, 0xffff);
1156         if (vmcs_readl(GUEST_CS_BASE) == 0xffff0000)
1157                 vmcs_writel(GUEST_CS_BASE, 0xf0000);
1158         vmcs_write16(GUEST_CS_SELECTOR, vmcs_readl(GUEST_CS_BASE) >> 4);
1159
1160         fix_rmode_seg(VCPU_SREG_ES, &vcpu->rmode.es);
1161         fix_rmode_seg(VCPU_SREG_DS, &vcpu->rmode.ds);
1162         fix_rmode_seg(VCPU_SREG_GS, &vcpu->rmode.gs);
1163         fix_rmode_seg(VCPU_SREG_FS, &vcpu->rmode.fs);
1164
1165         kvm_mmu_reset_context(vcpu);
1166         init_rmode_tss(vcpu->kvm);
1167 }
1168
1169 #ifdef CONFIG_X86_64
1170
1171 static void enter_lmode(struct kvm_vcpu *vcpu)
1172 {
1173         u32 guest_tr_ar;
1174
1175         guest_tr_ar = vmcs_read32(GUEST_TR_AR_BYTES);
1176         if ((guest_tr_ar & AR_TYPE_MASK) != AR_TYPE_BUSY_64_TSS) {
1177                 printk(KERN_DEBUG "%s: tss fixup for long mode. \n",
1178                        __FUNCTION__);
1179                 vmcs_write32(GUEST_TR_AR_BYTES,
1180                              (guest_tr_ar & ~AR_TYPE_MASK)
1181                              | AR_TYPE_BUSY_64_TSS);
1182         }
1183
1184         vcpu->shadow_efer |= EFER_LMA;
1185
1186         find_msr_entry(to_vmx(vcpu), MSR_EFER)->data |= EFER_LMA | EFER_LME;
1187         vmcs_write32(VM_ENTRY_CONTROLS,
1188                      vmcs_read32(VM_ENTRY_CONTROLS)
1189                      | VM_ENTRY_IA32E_MODE);
1190 }
1191
1192 static void exit_lmode(struct kvm_vcpu *vcpu)
1193 {
1194         vcpu->shadow_efer &= ~EFER_LMA;
1195
1196         vmcs_write32(VM_ENTRY_CONTROLS,
1197                      vmcs_read32(VM_ENTRY_CONTROLS)
1198                      & ~VM_ENTRY_IA32E_MODE);
1199 }
1200
1201 #endif
1202
1203 static void vmx_decache_cr4_guest_bits(struct kvm_vcpu *vcpu)
1204 {
1205         vcpu->cr4 &= KVM_GUEST_CR4_MASK;
1206         vcpu->cr4 |= vmcs_readl(GUEST_CR4) & ~KVM_GUEST_CR4_MASK;
1207 }
1208
1209 static void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
1210 {
1211         vmx_fpu_deactivate(vcpu);
1212
1213         if (vcpu->rmode.active && (cr0 & X86_CR0_PE))
1214                 enter_pmode(vcpu);
1215
1216         if (!vcpu->rmode.active && !(cr0 & X86_CR0_PE))
1217                 enter_rmode(vcpu);
1218
1219 #ifdef CONFIG_X86_64
1220         if (vcpu->shadow_efer & EFER_LME) {
1221                 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG))
1222                         enter_lmode(vcpu);
1223                 if (is_paging(vcpu) && !(cr0 & X86_CR0_PG))
1224                         exit_lmode(vcpu);
1225         }
1226 #endif
1227
1228         vmcs_writel(CR0_READ_SHADOW, cr0);
1229         vmcs_writel(GUEST_CR0,
1230                     (cr0 & ~KVM_GUEST_CR0_MASK) | KVM_VM_CR0_ALWAYS_ON);
1231         vcpu->cr0 = cr0;
1232
1233         if (!(cr0 & X86_CR0_TS) || !(cr0 & X86_CR0_PE))
1234                 vmx_fpu_activate(vcpu);
1235 }
1236
1237 static void vmx_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1238 {
1239         vmcs_writel(GUEST_CR3, cr3);
1240         if (vcpu->cr0 & X86_CR0_PE)
1241                 vmx_fpu_deactivate(vcpu);
1242 }
1243
1244 static void vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1245 {
1246         vmcs_writel(CR4_READ_SHADOW, cr4);
1247         vmcs_writel(GUEST_CR4, cr4 | (vcpu->rmode.active ?
1248                     KVM_RMODE_VM_CR4_ALWAYS_ON : KVM_PMODE_VM_CR4_ALWAYS_ON));
1249         vcpu->cr4 = cr4;
1250 }
1251
1252 #ifdef CONFIG_X86_64
1253
1254 static void vmx_set_efer(struct kvm_vcpu *vcpu, u64 efer)
1255 {
1256         struct vcpu_vmx *vmx = to_vmx(vcpu);
1257         struct kvm_msr_entry *msr = find_msr_entry(vmx, MSR_EFER);
1258
1259         vcpu->shadow_efer = efer;
1260         if (efer & EFER_LMA) {
1261                 vmcs_write32(VM_ENTRY_CONTROLS,
1262                                      vmcs_read32(VM_ENTRY_CONTROLS) |
1263                                      VM_ENTRY_IA32E_MODE);
1264                 msr->data = efer;
1265
1266         } else {
1267                 vmcs_write32(VM_ENTRY_CONTROLS,
1268                                      vmcs_read32(VM_ENTRY_CONTROLS) &
1269                                      ~VM_ENTRY_IA32E_MODE);
1270
1271                 msr->data = efer & ~EFER_LME;
1272         }
1273         setup_msrs(vmx);
1274 }
1275
1276 #endif
1277
1278 static u64 vmx_get_segment_base(struct kvm_vcpu *vcpu, int seg)
1279 {
1280         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1281
1282         return vmcs_readl(sf->base);
1283 }
1284
1285 static void vmx_get_segment(struct kvm_vcpu *vcpu,
1286                             struct kvm_segment *var, int seg)
1287 {
1288         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1289         u32 ar;
1290
1291         var->base = vmcs_readl(sf->base);
1292         var->limit = vmcs_read32(sf->limit);
1293         var->selector = vmcs_read16(sf->selector);
1294         ar = vmcs_read32(sf->ar_bytes);
1295         if (ar & AR_UNUSABLE_MASK)
1296                 ar = 0;
1297         var->type = ar & 15;
1298         var->s = (ar >> 4) & 1;
1299         var->dpl = (ar >> 5) & 3;
1300         var->present = (ar >> 7) & 1;
1301         var->avl = (ar >> 12) & 1;
1302         var->l = (ar >> 13) & 1;
1303         var->db = (ar >> 14) & 1;
1304         var->g = (ar >> 15) & 1;
1305         var->unusable = (ar >> 16) & 1;
1306 }
1307
1308 static u32 vmx_segment_access_rights(struct kvm_segment *var)
1309 {
1310         u32 ar;
1311
1312         if (var->unusable)
1313                 ar = 1 << 16;
1314         else {
1315                 ar = var->type & 15;
1316                 ar |= (var->s & 1) << 4;
1317                 ar |= (var->dpl & 3) << 5;
1318                 ar |= (var->present & 1) << 7;
1319                 ar |= (var->avl & 1) << 12;
1320                 ar |= (var->l & 1) << 13;
1321                 ar |= (var->db & 1) << 14;
1322                 ar |= (var->g & 1) << 15;
1323         }
1324         if (ar == 0) /* a 0 value means unusable */
1325                 ar = AR_UNUSABLE_MASK;
1326
1327         return ar;
1328 }
1329
1330 static void vmx_set_segment(struct kvm_vcpu *vcpu,
1331                             struct kvm_segment *var, int seg)
1332 {
1333         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1334         u32 ar;
1335
1336         if (vcpu->rmode.active && seg == VCPU_SREG_TR) {
1337                 vcpu->rmode.tr.selector = var->selector;
1338                 vcpu->rmode.tr.base = var->base;
1339                 vcpu->rmode.tr.limit = var->limit;
1340                 vcpu->rmode.tr.ar = vmx_segment_access_rights(var);
1341                 return;
1342         }
1343         vmcs_writel(sf->base, var->base);
1344         vmcs_write32(sf->limit, var->limit);
1345         vmcs_write16(sf->selector, var->selector);
1346         if (vcpu->rmode.active && var->s) {
1347                 /*
1348                  * Hack real-mode segments into vm86 compatibility.
1349                  */
1350                 if (var->base == 0xffff0000 && var->selector == 0xf000)
1351                         vmcs_writel(sf->base, 0xf0000);
1352                 ar = 0xf3;
1353         } else
1354                 ar = vmx_segment_access_rights(var);
1355         vmcs_write32(sf->ar_bytes, ar);
1356 }
1357
1358 static void vmx_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
1359 {
1360         u32 ar = vmcs_read32(GUEST_CS_AR_BYTES);
1361
1362         *db = (ar >> 14) & 1;
1363         *l = (ar >> 13) & 1;
1364 }
1365
1366 static void vmx_get_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1367 {
1368         dt->limit = vmcs_read32(GUEST_IDTR_LIMIT);
1369         dt->base = vmcs_readl(GUEST_IDTR_BASE);
1370 }
1371
1372 static void vmx_set_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1373 {
1374         vmcs_write32(GUEST_IDTR_LIMIT, dt->limit);
1375         vmcs_writel(GUEST_IDTR_BASE, dt->base);
1376 }
1377
1378 static void vmx_get_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1379 {
1380         dt->limit = vmcs_read32(GUEST_GDTR_LIMIT);
1381         dt->base = vmcs_readl(GUEST_GDTR_BASE);
1382 }
1383
1384 static void vmx_set_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1385 {
1386         vmcs_write32(GUEST_GDTR_LIMIT, dt->limit);
1387         vmcs_writel(GUEST_GDTR_BASE, dt->base);
1388 }
1389
1390 static int init_rmode_tss(struct kvm* kvm)
1391 {
1392         struct page *p1, *p2, *p3;
1393         gfn_t fn = rmode_tss_base(kvm) >> PAGE_SHIFT;
1394         char *page;
1395
1396         p1 = gfn_to_page(kvm, fn++);
1397         p2 = gfn_to_page(kvm, fn++);
1398         p3 = gfn_to_page(kvm, fn);
1399
1400         if (!p1 || !p2 || !p3) {
1401                 kvm_printf(kvm,"%s: gfn_to_page failed\n", __FUNCTION__);
1402                 return 0;
1403         }
1404
1405         page = kmap_atomic(p1, KM_USER0);
1406         clear_page(page);
1407         *(u16*)(page + 0x66) = TSS_BASE_SIZE + TSS_REDIRECTION_SIZE;
1408         kunmap_atomic(page, KM_USER0);
1409
1410         page = kmap_atomic(p2, KM_USER0);
1411         clear_page(page);
1412         kunmap_atomic(page, KM_USER0);
1413
1414         page = kmap_atomic(p3, KM_USER0);
1415         clear_page(page);
1416         *(page + RMODE_TSS_SIZE - 2 * PAGE_SIZE - 1) = ~0;
1417         kunmap_atomic(page, KM_USER0);
1418
1419         return 1;
1420 }
1421
1422 static void seg_setup(int seg)
1423 {
1424         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1425
1426         vmcs_write16(sf->selector, 0);
1427         vmcs_writel(sf->base, 0);
1428         vmcs_write32(sf->limit, 0xffff);
1429         vmcs_write32(sf->ar_bytes, 0x93);
1430 }
1431
1432 /*
1433  * Sets up the vmcs for emulated real mode.
1434  */
1435 static int vmx_vcpu_setup(struct vcpu_vmx *vmx)
1436 {
1437         u32 host_sysenter_cs;
1438         u32 junk;
1439         unsigned long a;
1440         struct descriptor_table dt;
1441         int i;
1442         int ret = 0;
1443         unsigned long kvm_vmx_return;
1444         u64 msr;
1445         u32 exec_control;
1446
1447         if (!init_rmode_tss(vmx->vcpu.kvm)) {
1448                 ret = -ENOMEM;
1449                 goto out;
1450         }
1451
1452         vmx->vcpu.rmode.active = 0;
1453
1454         vmx->vcpu.regs[VCPU_REGS_RDX] = get_rdx_init_val();
1455         set_cr8(&vmx->vcpu, 0);
1456         msr = 0xfee00000 | MSR_IA32_APICBASE_ENABLE;
1457         if (vmx->vcpu.vcpu_id == 0)
1458                 msr |= MSR_IA32_APICBASE_BSP;
1459         kvm_set_apic_base(&vmx->vcpu, msr);
1460
1461         fx_init(&vmx->vcpu);
1462
1463         /*
1464          * GUEST_CS_BASE should really be 0xffff0000, but VT vm86 mode
1465          * insists on having GUEST_CS_BASE == GUEST_CS_SELECTOR << 4.  Sigh.
1466          */
1467         if (vmx->vcpu.vcpu_id == 0) {
1468                 vmcs_write16(GUEST_CS_SELECTOR, 0xf000);
1469                 vmcs_writel(GUEST_CS_BASE, 0x000f0000);
1470         } else {
1471                 vmcs_write16(GUEST_CS_SELECTOR, vmx->vcpu.sipi_vector << 8);
1472                 vmcs_writel(GUEST_CS_BASE, vmx->vcpu.sipi_vector << 12);
1473         }
1474         vmcs_write32(GUEST_CS_LIMIT, 0xffff);
1475         vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
1476
1477         seg_setup(VCPU_SREG_DS);
1478         seg_setup(VCPU_SREG_ES);
1479         seg_setup(VCPU_SREG_FS);
1480         seg_setup(VCPU_SREG_GS);
1481         seg_setup(VCPU_SREG_SS);
1482
1483         vmcs_write16(GUEST_TR_SELECTOR, 0);
1484         vmcs_writel(GUEST_TR_BASE, 0);
1485         vmcs_write32(GUEST_TR_LIMIT, 0xffff);
1486         vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
1487
1488         vmcs_write16(GUEST_LDTR_SELECTOR, 0);
1489         vmcs_writel(GUEST_LDTR_BASE, 0);
1490         vmcs_write32(GUEST_LDTR_LIMIT, 0xffff);
1491         vmcs_write32(GUEST_LDTR_AR_BYTES, 0x00082);
1492
1493         vmcs_write32(GUEST_SYSENTER_CS, 0);
1494         vmcs_writel(GUEST_SYSENTER_ESP, 0);
1495         vmcs_writel(GUEST_SYSENTER_EIP, 0);
1496
1497         vmcs_writel(GUEST_RFLAGS, 0x02);
1498         if (vmx->vcpu.vcpu_id == 0)
1499                 vmcs_writel(GUEST_RIP, 0xfff0);
1500         else
1501                 vmcs_writel(GUEST_RIP, 0);
1502         vmcs_writel(GUEST_RSP, 0);
1503
1504         //todo: dr0 = dr1 = dr2 = dr3 = 0; dr6 = 0xffff0ff0
1505         vmcs_writel(GUEST_DR7, 0x400);
1506
1507         vmcs_writel(GUEST_GDTR_BASE, 0);
1508         vmcs_write32(GUEST_GDTR_LIMIT, 0xffff);
1509
1510         vmcs_writel(GUEST_IDTR_BASE, 0);
1511         vmcs_write32(GUEST_IDTR_LIMIT, 0xffff);
1512
1513         vmcs_write32(GUEST_ACTIVITY_STATE, 0);
1514         vmcs_write32(GUEST_INTERRUPTIBILITY_INFO, 0);
1515         vmcs_write32(GUEST_PENDING_DBG_EXCEPTIONS, 0);
1516
1517         /* I/O */
1518         vmcs_write64(IO_BITMAP_A, page_to_phys(vmx_io_bitmap_a));
1519         vmcs_write64(IO_BITMAP_B, page_to_phys(vmx_io_bitmap_b));
1520
1521         guest_write_tsc(0);
1522
1523         vmcs_write64(VMCS_LINK_POINTER, -1ull); /* 22.3.1.5 */
1524
1525         /* Special registers */
1526         vmcs_write64(GUEST_IA32_DEBUGCTL, 0);
1527
1528         /* Control */
1529         vmcs_write32(PIN_BASED_VM_EXEC_CONTROL,
1530                 vmcs_config.pin_based_exec_ctrl);
1531
1532         exec_control = vmcs_config.cpu_based_exec_ctrl;
1533         if (!vm_need_tpr_shadow(vmx->vcpu.kvm)) {
1534                 exec_control &= ~CPU_BASED_TPR_SHADOW;
1535 #ifdef CONFIG_X86_64
1536                 exec_control |= CPU_BASED_CR8_STORE_EXITING |
1537                                 CPU_BASED_CR8_LOAD_EXITING;
1538 #endif
1539         }
1540         vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, exec_control);
1541
1542         vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK, !!bypass_guest_pf);
1543         vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH, !!bypass_guest_pf);
1544         vmcs_write32(CR3_TARGET_COUNT, 0);           /* 22.2.1 */
1545
1546         vmcs_writel(HOST_CR0, read_cr0());  /* 22.2.3 */
1547         vmcs_writel(HOST_CR4, read_cr4());  /* 22.2.3, 22.2.5 */
1548         vmcs_writel(HOST_CR3, read_cr3());  /* 22.2.3  FIXME: shadow tables */
1549
1550         vmcs_write16(HOST_CS_SELECTOR, __KERNEL_CS);  /* 22.2.4 */
1551         vmcs_write16(HOST_DS_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1552         vmcs_write16(HOST_ES_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1553         vmcs_write16(HOST_FS_SELECTOR, read_fs());    /* 22.2.4 */
1554         vmcs_write16(HOST_GS_SELECTOR, read_gs());    /* 22.2.4 */
1555         vmcs_write16(HOST_SS_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1556 #ifdef CONFIG_X86_64
1557         rdmsrl(MSR_FS_BASE, a);
1558         vmcs_writel(HOST_FS_BASE, a); /* 22.2.4 */
1559         rdmsrl(MSR_GS_BASE, a);
1560         vmcs_writel(HOST_GS_BASE, a); /* 22.2.4 */
1561 #else
1562         vmcs_writel(HOST_FS_BASE, 0); /* 22.2.4 */
1563         vmcs_writel(HOST_GS_BASE, 0); /* 22.2.4 */
1564 #endif
1565
1566         vmcs_write16(HOST_TR_SELECTOR, GDT_ENTRY_TSS*8);  /* 22.2.4 */
1567
1568         get_idt(&dt);
1569         vmcs_writel(HOST_IDTR_BASE, dt.base);   /* 22.2.4 */
1570
1571         asm ("mov $.Lkvm_vmx_return, %0" : "=r"(kvm_vmx_return));
1572         vmcs_writel(HOST_RIP, kvm_vmx_return); /* 22.2.5 */
1573         vmcs_write32(VM_EXIT_MSR_STORE_COUNT, 0);
1574         vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, 0);
1575         vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, 0);
1576
1577         rdmsr(MSR_IA32_SYSENTER_CS, host_sysenter_cs, junk);
1578         vmcs_write32(HOST_IA32_SYSENTER_CS, host_sysenter_cs);
1579         rdmsrl(MSR_IA32_SYSENTER_ESP, a);
1580         vmcs_writel(HOST_IA32_SYSENTER_ESP, a);   /* 22.2.3 */
1581         rdmsrl(MSR_IA32_SYSENTER_EIP, a);
1582         vmcs_writel(HOST_IA32_SYSENTER_EIP, a);   /* 22.2.3 */
1583
1584         for (i = 0; i < NR_VMX_MSR; ++i) {
1585                 u32 index = vmx_msr_index[i];
1586                 u32 data_low, data_high;
1587                 u64 data;
1588                 int j = vmx->nmsrs;
1589
1590                 if (rdmsr_safe(index, &data_low, &data_high) < 0)
1591                         continue;
1592                 if (wrmsr_safe(index, data_low, data_high) < 0)
1593                         continue;
1594                 data = data_low | ((u64)data_high << 32);
1595                 vmx->host_msrs[j].index = index;
1596                 vmx->host_msrs[j].reserved = 0;
1597                 vmx->host_msrs[j].data = data;
1598                 vmx->guest_msrs[j] = vmx->host_msrs[j];
1599                 ++vmx->nmsrs;
1600         }
1601
1602         setup_msrs(vmx);
1603
1604         vmcs_write32(VM_EXIT_CONTROLS, vmcs_config.vmexit_ctrl);
1605
1606         /* 22.2.1, 20.8.1 */
1607         vmcs_write32(VM_ENTRY_CONTROLS, vmcs_config.vmentry_ctrl);
1608
1609         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, 0);  /* 22.2.1 */
1610
1611 #ifdef CONFIG_X86_64
1612         vmcs_write64(VIRTUAL_APIC_PAGE_ADDR, 0);
1613         if (vm_need_tpr_shadow(vmx->vcpu.kvm))
1614                 vmcs_write64(VIRTUAL_APIC_PAGE_ADDR,
1615                              page_to_phys(vmx->vcpu.apic->regs_page));
1616         vmcs_write32(TPR_THRESHOLD, 0);
1617 #endif
1618
1619         vmcs_writel(CR0_GUEST_HOST_MASK, ~0UL);
1620         vmcs_writel(CR4_GUEST_HOST_MASK, KVM_GUEST_CR4_MASK);
1621
1622         vmx->vcpu.cr0 = 0x60000010;
1623         vmx_set_cr0(&vmx->vcpu, vmx->vcpu.cr0); // enter rmode
1624         vmx_set_cr4(&vmx->vcpu, 0);
1625 #ifdef CONFIG_X86_64
1626         vmx_set_efer(&vmx->vcpu, 0);
1627 #endif
1628         vmx_fpu_activate(&vmx->vcpu);
1629         update_exception_bitmap(&vmx->vcpu);
1630
1631         return 0;
1632
1633 out:
1634         return ret;
1635 }
1636
1637 static void vmx_vcpu_reset(struct kvm_vcpu *vcpu)
1638 {
1639         struct vcpu_vmx *vmx = to_vmx(vcpu);
1640
1641         vmx_vcpu_setup(vmx);
1642 }
1643
1644 static void inject_rmode_irq(struct kvm_vcpu *vcpu, int irq)
1645 {
1646         u16 ent[2];
1647         u16 cs;
1648         u16 ip;
1649         unsigned long flags;
1650         unsigned long ss_base = vmcs_readl(GUEST_SS_BASE);
1651         u16 sp =  vmcs_readl(GUEST_RSP);
1652         u32 ss_limit = vmcs_read32(GUEST_SS_LIMIT);
1653
1654         if (sp > ss_limit || sp < 6 ) {
1655                 vcpu_printf(vcpu, "%s: #SS, rsp 0x%lx ss 0x%lx limit 0x%x\n",
1656                             __FUNCTION__,
1657                             vmcs_readl(GUEST_RSP),
1658                             vmcs_readl(GUEST_SS_BASE),
1659                             vmcs_read32(GUEST_SS_LIMIT));
1660                 return;
1661         }
1662
1663         if (emulator_read_std(irq * sizeof(ent), &ent, sizeof(ent), vcpu) !=
1664                                                         X86EMUL_CONTINUE) {
1665                 vcpu_printf(vcpu, "%s: read guest err\n", __FUNCTION__);
1666                 return;
1667         }
1668
1669         flags =  vmcs_readl(GUEST_RFLAGS);
1670         cs =  vmcs_readl(GUEST_CS_BASE) >> 4;
1671         ip =  vmcs_readl(GUEST_RIP);
1672
1673
1674         if (emulator_write_emulated(ss_base + sp - 2, &flags, 2, vcpu) != X86EMUL_CONTINUE ||
1675             emulator_write_emulated(ss_base + sp - 4, &cs, 2, vcpu) != X86EMUL_CONTINUE ||
1676             emulator_write_emulated(ss_base + sp - 6, &ip, 2, vcpu) != X86EMUL_CONTINUE) {
1677                 vcpu_printf(vcpu, "%s: write guest err\n", __FUNCTION__);
1678                 return;
1679         }
1680
1681         vmcs_writel(GUEST_RFLAGS, flags &
1682                     ~( X86_EFLAGS_IF | X86_EFLAGS_AC | X86_EFLAGS_TF));
1683         vmcs_write16(GUEST_CS_SELECTOR, ent[1]) ;
1684         vmcs_writel(GUEST_CS_BASE, ent[1] << 4);
1685         vmcs_writel(GUEST_RIP, ent[0]);
1686         vmcs_writel(GUEST_RSP, (vmcs_readl(GUEST_RSP) & ~0xffff) | (sp - 6));
1687 }
1688
1689 static void vmx_inject_irq(struct kvm_vcpu *vcpu, int irq)
1690 {
1691         if (vcpu->rmode.active) {
1692                 inject_rmode_irq(vcpu, irq);
1693                 return;
1694         }
1695         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
1696                         irq | INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
1697 }
1698
1699 static void kvm_do_inject_irq(struct kvm_vcpu *vcpu)
1700 {
1701         int word_index = __ffs(vcpu->irq_summary);
1702         int bit_index = __ffs(vcpu->irq_pending[word_index]);
1703         int irq = word_index * BITS_PER_LONG + bit_index;
1704
1705         clear_bit(bit_index, &vcpu->irq_pending[word_index]);
1706         if (!vcpu->irq_pending[word_index])
1707                 clear_bit(word_index, &vcpu->irq_summary);
1708         vmx_inject_irq(vcpu, irq);
1709 }
1710
1711
1712 static void do_interrupt_requests(struct kvm_vcpu *vcpu,
1713                                        struct kvm_run *kvm_run)
1714 {
1715         u32 cpu_based_vm_exec_control;
1716
1717         vcpu->interrupt_window_open =
1718                 ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) &&
1719                  (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0);
1720
1721         if (vcpu->interrupt_window_open &&
1722             vcpu->irq_summary &&
1723             !(vmcs_read32(VM_ENTRY_INTR_INFO_FIELD) & INTR_INFO_VALID_MASK))
1724                 /*
1725                  * If interrupts enabled, and not blocked by sti or mov ss. Good.
1726                  */
1727                 kvm_do_inject_irq(vcpu);
1728
1729         cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
1730         if (!vcpu->interrupt_window_open &&
1731             (vcpu->irq_summary || kvm_run->request_interrupt_window))
1732                 /*
1733                  * Interrupts blocked.  Wait for unblock.
1734                  */
1735                 cpu_based_vm_exec_control |= CPU_BASED_VIRTUAL_INTR_PENDING;
1736         else
1737                 cpu_based_vm_exec_control &= ~CPU_BASED_VIRTUAL_INTR_PENDING;
1738         vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
1739 }
1740
1741 static void kvm_guest_debug_pre(struct kvm_vcpu *vcpu)
1742 {
1743         struct kvm_guest_debug *dbg = &vcpu->guest_debug;
1744
1745         set_debugreg(dbg->bp[0], 0);
1746         set_debugreg(dbg->bp[1], 1);
1747         set_debugreg(dbg->bp[2], 2);
1748         set_debugreg(dbg->bp[3], 3);
1749
1750         if (dbg->singlestep) {
1751                 unsigned long flags;
1752
1753                 flags = vmcs_readl(GUEST_RFLAGS);
1754                 flags |= X86_EFLAGS_TF | X86_EFLAGS_RF;
1755                 vmcs_writel(GUEST_RFLAGS, flags);
1756         }
1757 }
1758
1759 static int handle_rmode_exception(struct kvm_vcpu *vcpu,
1760                                   int vec, u32 err_code)
1761 {
1762         if (!vcpu->rmode.active)
1763                 return 0;
1764
1765         /*
1766          * Instruction with address size override prefix opcode 0x67
1767          * Cause the #SS fault with 0 error code in VM86 mode.
1768          */
1769         if (((vec == GP_VECTOR) || (vec == SS_VECTOR)) && err_code == 0)
1770                 if (emulate_instruction(vcpu, NULL, 0, 0, 0) == EMULATE_DONE)
1771                         return 1;
1772         return 0;
1773 }
1774
1775 static int handle_exception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1776 {
1777         u32 intr_info, error_code;
1778         unsigned long cr2, rip;
1779         u32 vect_info;
1780         enum emulation_result er;
1781         int r;
1782
1783         vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1784         intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
1785
1786         if ((vect_info & VECTORING_INFO_VALID_MASK) &&
1787                                                 !is_page_fault(intr_info)) {
1788                 printk(KERN_ERR "%s: unexpected, vectoring info 0x%x "
1789                        "intr info 0x%x\n", __FUNCTION__, vect_info, intr_info);
1790         }
1791
1792         if (!irqchip_in_kernel(vcpu->kvm) && is_external_interrupt(vect_info)) {
1793                 int irq = vect_info & VECTORING_INFO_VECTOR_MASK;
1794                 set_bit(irq, vcpu->irq_pending);
1795                 set_bit(irq / BITS_PER_LONG, &vcpu->irq_summary);
1796         }
1797
1798         if ((intr_info & INTR_INFO_INTR_TYPE_MASK) == 0x200) /* nmi */
1799                 return 1;  /* already handled by vmx_vcpu_run() */
1800
1801         if (is_no_device(intr_info)) {
1802                 vmx_fpu_activate(vcpu);
1803                 return 1;
1804         }
1805
1806         if (is_invalid_opcode(intr_info)) {
1807                 er = emulate_instruction(vcpu, kvm_run, 0, 0, 0);
1808                 if (er != EMULATE_DONE)
1809                         vmx_inject_ud(vcpu);
1810
1811                 return 1;
1812         }
1813
1814         error_code = 0;
1815         rip = vmcs_readl(GUEST_RIP);
1816         if (intr_info & INTR_INFO_DELIEVER_CODE_MASK)
1817                 error_code = vmcs_read32(VM_EXIT_INTR_ERROR_CODE);
1818         if (is_page_fault(intr_info)) {
1819                 cr2 = vmcs_readl(EXIT_QUALIFICATION);
1820
1821                 mutex_lock(&vcpu->kvm->lock);
1822                 r = kvm_mmu_page_fault(vcpu, cr2, error_code);
1823                 if (r < 0) {
1824                         mutex_unlock(&vcpu->kvm->lock);
1825                         return r;
1826                 }
1827                 if (!r) {
1828                         mutex_unlock(&vcpu->kvm->lock);
1829                         return 1;
1830                 }
1831
1832                 er = emulate_instruction(vcpu, kvm_run, cr2, error_code, 0);
1833                 mutex_unlock(&vcpu->kvm->lock);
1834
1835                 switch (er) {
1836                 case EMULATE_DONE:
1837                         return 1;
1838                 case EMULATE_DO_MMIO:
1839                         ++vcpu->stat.mmio_exits;
1840                         return 0;
1841                  case EMULATE_FAIL:
1842                         kvm_report_emulation_failure(vcpu, "pagetable");
1843                         break;
1844                 default:
1845                         BUG();
1846                 }
1847         }
1848
1849         if (vcpu->rmode.active &&
1850             handle_rmode_exception(vcpu, intr_info & INTR_INFO_VECTOR_MASK,
1851                                                                 error_code)) {
1852                 if (vcpu->halt_request) {
1853                         vcpu->halt_request = 0;
1854                         return kvm_emulate_halt(vcpu);
1855                 }
1856                 return 1;
1857         }
1858
1859         if ((intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK)) == (INTR_TYPE_EXCEPTION | 1)) {
1860                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
1861                 return 0;
1862         }
1863         kvm_run->exit_reason = KVM_EXIT_EXCEPTION;
1864         kvm_run->ex.exception = intr_info & INTR_INFO_VECTOR_MASK;
1865         kvm_run->ex.error_code = error_code;
1866         return 0;
1867 }
1868
1869 static int handle_external_interrupt(struct kvm_vcpu *vcpu,
1870                                      struct kvm_run *kvm_run)
1871 {
1872         ++vcpu->stat.irq_exits;
1873         return 1;
1874 }
1875
1876 static int handle_triple_fault(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1877 {
1878         kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
1879         return 0;
1880 }
1881
1882 static int handle_io(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1883 {
1884         unsigned long exit_qualification;
1885         int size, down, in, string, rep;
1886         unsigned port;
1887
1888         ++vcpu->stat.io_exits;
1889         exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
1890         string = (exit_qualification & 16) != 0;
1891
1892         if (string) {
1893                 if (emulate_instruction(vcpu,
1894                                         kvm_run, 0, 0, 0) == EMULATE_DO_MMIO)
1895                         return 0;
1896                 return 1;
1897         }
1898
1899         size = (exit_qualification & 7) + 1;
1900         in = (exit_qualification & 8) != 0;
1901         down = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_DF) != 0;
1902         rep = (exit_qualification & 32) != 0;
1903         port = exit_qualification >> 16;
1904
1905         return kvm_emulate_pio(vcpu, kvm_run, in, size, port);
1906 }
1907
1908 static void
1909 vmx_patch_hypercall(struct kvm_vcpu *vcpu, unsigned char *hypercall)
1910 {
1911         /*
1912          * Patch in the VMCALL instruction:
1913          */
1914         hypercall[0] = 0x0f;
1915         hypercall[1] = 0x01;
1916         hypercall[2] = 0xc1;
1917 }
1918
1919 static int handle_cr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1920 {
1921         unsigned long exit_qualification;
1922         int cr;
1923         int reg;
1924
1925         exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
1926         cr = exit_qualification & 15;
1927         reg = (exit_qualification >> 8) & 15;
1928         switch ((exit_qualification >> 4) & 3) {
1929         case 0: /* mov to cr */
1930                 switch (cr) {
1931                 case 0:
1932                         vcpu_load_rsp_rip(vcpu);
1933                         set_cr0(vcpu, vcpu->regs[reg]);
1934                         skip_emulated_instruction(vcpu);
1935                         return 1;
1936                 case 3:
1937                         vcpu_load_rsp_rip(vcpu);
1938                         set_cr3(vcpu, vcpu->regs[reg]);
1939                         skip_emulated_instruction(vcpu);
1940                         return 1;
1941                 case 4:
1942                         vcpu_load_rsp_rip(vcpu);
1943                         set_cr4(vcpu, vcpu->regs[reg]);
1944                         skip_emulated_instruction(vcpu);
1945                         return 1;
1946                 case 8:
1947                         vcpu_load_rsp_rip(vcpu);
1948                         set_cr8(vcpu, vcpu->regs[reg]);
1949                         skip_emulated_instruction(vcpu);
1950                         kvm_run->exit_reason = KVM_EXIT_SET_TPR;
1951                         return 0;
1952                 };
1953                 break;
1954         case 2: /* clts */
1955                 vcpu_load_rsp_rip(vcpu);
1956                 vmx_fpu_deactivate(vcpu);
1957                 vcpu->cr0 &= ~X86_CR0_TS;
1958                 vmcs_writel(CR0_READ_SHADOW, vcpu->cr0);
1959                 vmx_fpu_activate(vcpu);
1960                 skip_emulated_instruction(vcpu);
1961                 return 1;
1962         case 1: /*mov from cr*/
1963                 switch (cr) {
1964                 case 3:
1965                         vcpu_load_rsp_rip(vcpu);
1966                         vcpu->regs[reg] = vcpu->cr3;
1967                         vcpu_put_rsp_rip(vcpu);
1968                         skip_emulated_instruction(vcpu);
1969                         return 1;
1970                 case 8:
1971                         vcpu_load_rsp_rip(vcpu);
1972                         vcpu->regs[reg] = get_cr8(vcpu);
1973                         vcpu_put_rsp_rip(vcpu);
1974                         skip_emulated_instruction(vcpu);
1975                         return 1;
1976                 }
1977                 break;
1978         case 3: /* lmsw */
1979                 lmsw(vcpu, (exit_qualification >> LMSW_SOURCE_DATA_SHIFT) & 0x0f);
1980
1981                 skip_emulated_instruction(vcpu);
1982                 return 1;
1983         default:
1984                 break;
1985         }
1986         kvm_run->exit_reason = 0;
1987         pr_unimpl(vcpu, "unhandled control register: op %d cr %d\n",
1988                (int)(exit_qualification >> 4) & 3, cr);
1989         return 0;
1990 }
1991
1992 static int handle_dr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1993 {
1994         unsigned long exit_qualification;
1995         unsigned long val;
1996         int dr, reg;
1997
1998         /*
1999          * FIXME: this code assumes the host is debugging the guest.
2000          *        need to deal with guest debugging itself too.
2001          */
2002         exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
2003         dr = exit_qualification & 7;
2004         reg = (exit_qualification >> 8) & 15;
2005         vcpu_load_rsp_rip(vcpu);
2006         if (exit_qualification & 16) {
2007                 /* mov from dr */
2008                 switch (dr) {
2009                 case 6:
2010                         val = 0xffff0ff0;
2011                         break;
2012                 case 7:
2013                         val = 0x400;
2014                         break;
2015                 default:
2016                         val = 0;
2017                 }
2018                 vcpu->regs[reg] = val;
2019         } else {
2020                 /* mov to dr */
2021         }
2022         vcpu_put_rsp_rip(vcpu);
2023         skip_emulated_instruction(vcpu);
2024         return 1;
2025 }
2026
2027 static int handle_cpuid(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2028 {
2029         kvm_emulate_cpuid(vcpu);
2030         return 1;
2031 }
2032
2033 static int handle_rdmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2034 {
2035         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
2036         u64 data;
2037
2038         if (vmx_get_msr(vcpu, ecx, &data)) {
2039                 vmx_inject_gp(vcpu, 0);
2040                 return 1;
2041         }
2042
2043         /* FIXME: handling of bits 32:63 of rax, rdx */
2044         vcpu->regs[VCPU_REGS_RAX] = data & -1u;
2045         vcpu->regs[VCPU_REGS_RDX] = (data >> 32) & -1u;
2046         skip_emulated_instruction(vcpu);
2047         return 1;
2048 }
2049
2050 static int handle_wrmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2051 {
2052         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
2053         u64 data = (vcpu->regs[VCPU_REGS_RAX] & -1u)
2054                 | ((u64)(vcpu->regs[VCPU_REGS_RDX] & -1u) << 32);
2055
2056         if (vmx_set_msr(vcpu, ecx, data) != 0) {
2057                 vmx_inject_gp(vcpu, 0);
2058                 return 1;
2059         }
2060
2061         skip_emulated_instruction(vcpu);
2062         return 1;
2063 }
2064
2065 static int handle_tpr_below_threshold(struct kvm_vcpu *vcpu,
2066                                       struct kvm_run *kvm_run)
2067 {
2068         return 1;
2069 }
2070
2071 static int handle_interrupt_window(struct kvm_vcpu *vcpu,
2072                                    struct kvm_run *kvm_run)
2073 {
2074         u32 cpu_based_vm_exec_control;
2075
2076         /* clear pending irq */
2077         cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
2078         cpu_based_vm_exec_control &= ~CPU_BASED_VIRTUAL_INTR_PENDING;
2079         vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
2080         /*
2081          * If the user space waits to inject interrupts, exit as soon as
2082          * possible
2083          */
2084         if (kvm_run->request_interrupt_window &&
2085             !vcpu->irq_summary) {
2086                 kvm_run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
2087                 ++vcpu->stat.irq_window_exits;
2088                 return 0;
2089         }
2090         return 1;
2091 }
2092
2093 static int handle_halt(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2094 {
2095         skip_emulated_instruction(vcpu);
2096         return kvm_emulate_halt(vcpu);
2097 }
2098
2099 static int handle_vmcall(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2100 {
2101         skip_emulated_instruction(vcpu);
2102         kvm_emulate_hypercall(vcpu);
2103         return 1;
2104 }
2105
2106 /*
2107  * The exit handlers return 1 if the exit was handled fully and guest execution
2108  * may resume.  Otherwise they set the kvm_run parameter to indicate what needs
2109  * to be done to userspace and return 0.
2110  */
2111 static int (*kvm_vmx_exit_handlers[])(struct kvm_vcpu *vcpu,
2112                                       struct kvm_run *kvm_run) = {
2113         [EXIT_REASON_EXCEPTION_NMI]           = handle_exception,
2114         [EXIT_REASON_EXTERNAL_INTERRUPT]      = handle_external_interrupt,
2115         [EXIT_REASON_TRIPLE_FAULT]            = handle_triple_fault,
2116         [EXIT_REASON_IO_INSTRUCTION]          = handle_io,
2117         [EXIT_REASON_CR_ACCESS]               = handle_cr,
2118         [EXIT_REASON_DR_ACCESS]               = handle_dr,
2119         [EXIT_REASON_CPUID]                   = handle_cpuid,
2120         [EXIT_REASON_MSR_READ]                = handle_rdmsr,
2121         [EXIT_REASON_MSR_WRITE]               = handle_wrmsr,
2122         [EXIT_REASON_PENDING_INTERRUPT]       = handle_interrupt_window,
2123         [EXIT_REASON_HLT]                     = handle_halt,
2124         [EXIT_REASON_VMCALL]                  = handle_vmcall,
2125         [EXIT_REASON_TPR_BELOW_THRESHOLD]     = handle_tpr_below_threshold
2126 };
2127
2128 static const int kvm_vmx_max_exit_handlers =
2129         ARRAY_SIZE(kvm_vmx_exit_handlers);
2130
2131 /*
2132  * The guest has exited.  See if we can fix it or if we need userspace
2133  * assistance.
2134  */
2135 static int kvm_handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
2136 {
2137         u32 vectoring_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
2138         u32 exit_reason = vmcs_read32(VM_EXIT_REASON);
2139         struct vcpu_vmx *vmx = to_vmx(vcpu);
2140
2141         if (unlikely(vmx->fail)) {
2142                 kvm_run->exit_reason = KVM_EXIT_FAIL_ENTRY;
2143                 kvm_run->fail_entry.hardware_entry_failure_reason
2144                         = vmcs_read32(VM_INSTRUCTION_ERROR);
2145                 return 0;
2146         }
2147
2148         if ( (vectoring_info & VECTORING_INFO_VALID_MASK) &&
2149                                 exit_reason != EXIT_REASON_EXCEPTION_NMI )
2150                 printk(KERN_WARNING "%s: unexpected, valid vectoring info and "
2151                        "exit reason is 0x%x\n", __FUNCTION__, exit_reason);
2152         if (exit_reason < kvm_vmx_max_exit_handlers
2153             && kvm_vmx_exit_handlers[exit_reason])
2154                 return kvm_vmx_exit_handlers[exit_reason](vcpu, kvm_run);
2155         else {
2156                 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
2157                 kvm_run->hw.hardware_exit_reason = exit_reason;
2158         }
2159         return 0;
2160 }
2161
2162 static void vmx_flush_tlb(struct kvm_vcpu *vcpu)
2163 {
2164 }
2165
2166 static void update_tpr_threshold(struct kvm_vcpu *vcpu)
2167 {
2168         int max_irr, tpr;
2169
2170         if (!vm_need_tpr_shadow(vcpu->kvm))
2171                 return;
2172
2173         if (!kvm_lapic_enabled(vcpu) ||
2174             ((max_irr = kvm_lapic_find_highest_irr(vcpu)) == -1)) {
2175                 vmcs_write32(TPR_THRESHOLD, 0);
2176                 return;
2177         }
2178
2179         tpr = (kvm_lapic_get_cr8(vcpu) & 0x0f) << 4;
2180         vmcs_write32(TPR_THRESHOLD, (max_irr > tpr) ? tpr >> 4 : max_irr >> 4);
2181 }
2182
2183 static void enable_irq_window(struct kvm_vcpu *vcpu)
2184 {
2185         u32 cpu_based_vm_exec_control;
2186
2187         cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
2188         cpu_based_vm_exec_control |= CPU_BASED_VIRTUAL_INTR_PENDING;
2189         vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
2190 }
2191
2192 static void vmx_intr_assist(struct kvm_vcpu *vcpu)
2193 {
2194         u32 idtv_info_field, intr_info_field;
2195         int has_ext_irq, interrupt_window_open;
2196         int vector;
2197
2198         kvm_inject_pending_timer_irqs(vcpu);
2199         update_tpr_threshold(vcpu);
2200
2201         has_ext_irq = kvm_cpu_has_interrupt(vcpu);
2202         intr_info_field = vmcs_read32(VM_ENTRY_INTR_INFO_FIELD);
2203         idtv_info_field = vmcs_read32(IDT_VECTORING_INFO_FIELD);
2204         if (intr_info_field & INTR_INFO_VALID_MASK) {
2205                 if (idtv_info_field & INTR_INFO_VALID_MASK) {
2206                         /* TODO: fault when IDT_Vectoring */
2207                         printk(KERN_ERR "Fault when IDT_Vectoring\n");
2208                 }
2209                 if (has_ext_irq)
2210                         enable_irq_window(vcpu);
2211                 return;
2212         }
2213         if (unlikely(idtv_info_field & INTR_INFO_VALID_MASK)) {
2214                 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, idtv_info_field);
2215                 vmcs_write32(VM_ENTRY_INSTRUCTION_LEN,
2216                                 vmcs_read32(VM_EXIT_INSTRUCTION_LEN));
2217
2218                 if (unlikely(idtv_info_field & INTR_INFO_DELIEVER_CODE_MASK))
2219                         vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE,
2220                                 vmcs_read32(IDT_VECTORING_ERROR_CODE));
2221                 if (unlikely(has_ext_irq))
2222                         enable_irq_window(vcpu);
2223                 return;
2224         }
2225         if (!has_ext_irq)
2226                 return;
2227         interrupt_window_open =
2228                 ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) &&
2229                  (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0);
2230         if (interrupt_window_open) {
2231                 vector = kvm_cpu_get_interrupt(vcpu);
2232                 vmx_inject_irq(vcpu, vector);
2233                 kvm_timer_intr_post(vcpu, vector);
2234         } else
2235                 enable_irq_window(vcpu);
2236 }
2237
2238 static void vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2239 {
2240         struct vcpu_vmx *vmx = to_vmx(vcpu);
2241         u32 intr_info;
2242
2243         /*
2244          * Loading guest fpu may have cleared host cr0.ts
2245          */
2246         vmcs_writel(HOST_CR0, read_cr0());
2247
2248         asm (
2249                 /* Store host registers */
2250 #ifdef CONFIG_X86_64
2251                 "push %%rax; push %%rbx; push %%rdx;"
2252                 "push %%rsi; push %%rdi; push %%rbp;"
2253                 "push %%r8;  push %%r9;  push %%r10; push %%r11;"
2254                 "push %%r12; push %%r13; push %%r14; push %%r15;"
2255                 "push %%rcx \n\t"
2256                 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
2257 #else
2258                 "pusha; push %%ecx \n\t"
2259                 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
2260 #endif
2261                 /* Check if vmlaunch of vmresume is needed */
2262                 "cmp $0, %1 \n\t"
2263                 /* Load guest registers.  Don't clobber flags. */
2264 #ifdef CONFIG_X86_64
2265                 "mov %c[cr2](%3), %%rax \n\t"
2266                 "mov %%rax, %%cr2 \n\t"
2267                 "mov %c[rax](%3), %%rax \n\t"
2268                 "mov %c[rbx](%3), %%rbx \n\t"
2269                 "mov %c[rdx](%3), %%rdx \n\t"
2270                 "mov %c[rsi](%3), %%rsi \n\t"
2271                 "mov %c[rdi](%3), %%rdi \n\t"
2272                 "mov %c[rbp](%3), %%rbp \n\t"
2273                 "mov %c[r8](%3),  %%r8  \n\t"
2274                 "mov %c[r9](%3),  %%r9  \n\t"
2275                 "mov %c[r10](%3), %%r10 \n\t"
2276                 "mov %c[r11](%3), %%r11 \n\t"
2277                 "mov %c[r12](%3), %%r12 \n\t"
2278                 "mov %c[r13](%3), %%r13 \n\t"
2279                 "mov %c[r14](%3), %%r14 \n\t"
2280                 "mov %c[r15](%3), %%r15 \n\t"
2281                 "mov %c[rcx](%3), %%rcx \n\t" /* kills %3 (rcx) */
2282 #else
2283                 "mov %c[cr2](%3), %%eax \n\t"
2284                 "mov %%eax,   %%cr2 \n\t"
2285                 "mov %c[rax](%3), %%eax \n\t"
2286                 "mov %c[rbx](%3), %%ebx \n\t"
2287                 "mov %c[rdx](%3), %%edx \n\t"
2288                 "mov %c[rsi](%3), %%esi \n\t"
2289                 "mov %c[rdi](%3), %%edi \n\t"
2290                 "mov %c[rbp](%3), %%ebp \n\t"
2291                 "mov %c[rcx](%3), %%ecx \n\t" /* kills %3 (ecx) */
2292 #endif
2293                 /* Enter guest mode */
2294                 "jne .Llaunched \n\t"
2295                 ASM_VMX_VMLAUNCH "\n\t"
2296                 "jmp .Lkvm_vmx_return \n\t"
2297                 ".Llaunched: " ASM_VMX_VMRESUME "\n\t"
2298                 ".Lkvm_vmx_return: "
2299                 /* Save guest registers, load host registers, keep flags */
2300 #ifdef CONFIG_X86_64
2301                 "xchg %3,     (%%rsp) \n\t"
2302                 "mov %%rax, %c[rax](%3) \n\t"
2303                 "mov %%rbx, %c[rbx](%3) \n\t"
2304                 "pushq (%%rsp); popq %c[rcx](%3) \n\t"
2305                 "mov %%rdx, %c[rdx](%3) \n\t"
2306                 "mov %%rsi, %c[rsi](%3) \n\t"
2307                 "mov %%rdi, %c[rdi](%3) \n\t"
2308                 "mov %%rbp, %c[rbp](%3) \n\t"
2309                 "mov %%r8,  %c[r8](%3) \n\t"
2310                 "mov %%r9,  %c[r9](%3) \n\t"
2311                 "mov %%r10, %c[r10](%3) \n\t"
2312                 "mov %%r11, %c[r11](%3) \n\t"
2313                 "mov %%r12, %c[r12](%3) \n\t"
2314                 "mov %%r13, %c[r13](%3) \n\t"
2315                 "mov %%r14, %c[r14](%3) \n\t"
2316                 "mov %%r15, %c[r15](%3) \n\t"
2317                 "mov %%cr2, %%rax   \n\t"
2318                 "mov %%rax, %c[cr2](%3) \n\t"
2319                 "mov (%%rsp), %3 \n\t"
2320
2321                 "pop  %%rcx; pop  %%r15; pop  %%r14; pop  %%r13; pop  %%r12;"
2322                 "pop  %%r11; pop  %%r10; pop  %%r9;  pop  %%r8;"
2323                 "pop  %%rbp; pop  %%rdi; pop  %%rsi;"
2324                 "pop  %%rdx; pop  %%rbx; pop  %%rax \n\t"
2325 #else
2326                 "xchg %3, (%%esp) \n\t"
2327                 "mov %%eax, %c[rax](%3) \n\t"
2328                 "mov %%ebx, %c[rbx](%3) \n\t"
2329                 "pushl (%%esp); popl %c[rcx](%3) \n\t"
2330                 "mov %%edx, %c[rdx](%3) \n\t"
2331                 "mov %%esi, %c[rsi](%3) \n\t"
2332                 "mov %%edi, %c[rdi](%3) \n\t"
2333                 "mov %%ebp, %c[rbp](%3) \n\t"
2334                 "mov %%cr2, %%eax  \n\t"
2335                 "mov %%eax, %c[cr2](%3) \n\t"
2336                 "mov (%%esp), %3 \n\t"
2337
2338                 "pop %%ecx; popa \n\t"
2339 #endif
2340                 "setbe %0 \n\t"
2341               : "=q" (vmx->fail)
2342               : "r"(vmx->launched), "d"((unsigned long)HOST_RSP),
2343                 "c"(vcpu),
2344                 [rax]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RAX])),
2345                 [rbx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBX])),
2346                 [rcx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RCX])),
2347                 [rdx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDX])),
2348                 [rsi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RSI])),
2349                 [rdi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDI])),
2350                 [rbp]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBP])),
2351 #ifdef CONFIG_X86_64
2352                 [r8 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R8 ])),
2353                 [r9 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R9 ])),
2354                 [r10]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R10])),
2355                 [r11]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R11])),
2356                 [r12]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R12])),
2357                 [r13]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R13])),
2358                 [r14]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R14])),
2359                 [r15]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R15])),
2360 #endif
2361                 [cr2]"i"(offsetof(struct kvm_vcpu, cr2))
2362               : "cc", "memory" );
2363
2364         vcpu->interrupt_window_open = (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0;
2365
2366         asm ("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS));
2367         vmx->launched = 1;
2368
2369         intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
2370
2371         /* We need to handle NMIs before interrupts are enabled */
2372         if ((intr_info & INTR_INFO_INTR_TYPE_MASK) == 0x200) /* nmi */
2373                 asm("int $2");
2374 }
2375
2376 static void vmx_inject_page_fault(struct kvm_vcpu *vcpu,
2377                                   unsigned long addr,
2378                                   u32 err_code)
2379 {
2380         u32 vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
2381
2382         ++vcpu->stat.pf_guest;
2383
2384         if (is_page_fault(vect_info)) {
2385                 printk(KERN_DEBUG "inject_page_fault: "
2386                        "double fault 0x%lx @ 0x%lx\n",
2387                        addr, vmcs_readl(GUEST_RIP));
2388                 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, 0);
2389                 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
2390                              DF_VECTOR |
2391                              INTR_TYPE_EXCEPTION |
2392                              INTR_INFO_DELIEVER_CODE_MASK |
2393                              INTR_INFO_VALID_MASK);
2394                 return;
2395         }
2396         vcpu->cr2 = addr;
2397         vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, err_code);
2398         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
2399                      PF_VECTOR |
2400                      INTR_TYPE_EXCEPTION |
2401                      INTR_INFO_DELIEVER_CODE_MASK |
2402                      INTR_INFO_VALID_MASK);
2403
2404 }
2405
2406 static void vmx_free_vmcs(struct kvm_vcpu *vcpu)
2407 {
2408         struct vcpu_vmx *vmx = to_vmx(vcpu);
2409
2410         if (vmx->vmcs) {
2411                 on_each_cpu(__vcpu_clear, vmx, 0, 1);
2412                 free_vmcs(vmx->vmcs);
2413                 vmx->vmcs = NULL;
2414         }
2415 }
2416
2417 static void vmx_free_vcpu(struct kvm_vcpu *vcpu)
2418 {
2419         struct vcpu_vmx *vmx = to_vmx(vcpu);
2420
2421         vmx_free_vmcs(vcpu);
2422         kfree(vmx->host_msrs);
2423         kfree(vmx->guest_msrs);
2424         kvm_vcpu_uninit(vcpu);
2425         kmem_cache_free(kvm_vcpu_cache, vmx);
2426 }
2427
2428 static struct kvm_vcpu *vmx_create_vcpu(struct kvm *kvm, unsigned int id)
2429 {
2430         int err;
2431         struct vcpu_vmx *vmx = kmem_cache_zalloc(kvm_vcpu_cache, GFP_KERNEL);
2432         int cpu;
2433
2434         if (!vmx)
2435                 return ERR_PTR(-ENOMEM);
2436
2437         err = kvm_vcpu_init(&vmx->vcpu, kvm, id);
2438         if (err)
2439                 goto free_vcpu;
2440
2441         if (irqchip_in_kernel(kvm)) {
2442                 err = kvm_create_lapic(&vmx->vcpu);
2443                 if (err < 0)
2444                         goto free_vcpu;
2445         }
2446
2447         vmx->guest_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
2448         if (!vmx->guest_msrs) {
2449                 err = -ENOMEM;
2450                 goto uninit_vcpu;
2451         }
2452
2453         vmx->host_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
2454         if (!vmx->host_msrs)
2455                 goto free_guest_msrs;
2456
2457         vmx->vmcs = alloc_vmcs();
2458         if (!vmx->vmcs)
2459                 goto free_msrs;
2460
2461         vmcs_clear(vmx->vmcs);
2462
2463         cpu = get_cpu();
2464         vmx_vcpu_load(&vmx->vcpu, cpu);
2465         err = vmx_vcpu_setup(vmx);
2466         vmx_vcpu_put(&vmx->vcpu);
2467         put_cpu();
2468         if (err)
2469                 goto free_vmcs;
2470
2471         return &vmx->vcpu;
2472
2473 free_vmcs:
2474         free_vmcs(vmx->vmcs);
2475 free_msrs:
2476         kfree(vmx->host_msrs);
2477 free_guest_msrs:
2478         kfree(vmx->guest_msrs);
2479 uninit_vcpu:
2480         kvm_vcpu_uninit(&vmx->vcpu);
2481 free_vcpu:
2482         kmem_cache_free(kvm_vcpu_cache, vmx);
2483         return ERR_PTR(err);
2484 }
2485
2486 static void __init vmx_check_processor_compat(void *rtn)
2487 {
2488         struct vmcs_config vmcs_conf;
2489
2490         *(int *)rtn = 0;
2491         if (setup_vmcs_config(&vmcs_conf) < 0)
2492                 *(int *)rtn = -EIO;
2493         if (memcmp(&vmcs_config, &vmcs_conf, sizeof(struct vmcs_config)) != 0) {
2494                 printk(KERN_ERR "kvm: CPU %d feature inconsistency!\n",
2495                                 smp_processor_id());
2496                 *(int *)rtn = -EIO;
2497         }
2498 }
2499
2500 static struct kvm_x86_ops vmx_x86_ops = {
2501         .cpu_has_kvm_support = cpu_has_kvm_support,
2502         .disabled_by_bios = vmx_disabled_by_bios,
2503         .hardware_setup = hardware_setup,
2504         .hardware_unsetup = hardware_unsetup,
2505         .check_processor_compatibility = vmx_check_processor_compat,
2506         .hardware_enable = hardware_enable,
2507         .hardware_disable = hardware_disable,
2508
2509         .vcpu_create = vmx_create_vcpu,
2510         .vcpu_free = vmx_free_vcpu,
2511         .vcpu_reset = vmx_vcpu_reset,
2512
2513         .prepare_guest_switch = vmx_save_host_state,
2514         .vcpu_load = vmx_vcpu_load,
2515         .vcpu_put = vmx_vcpu_put,
2516         .vcpu_decache = vmx_vcpu_decache,
2517
2518         .set_guest_debug = set_guest_debug,
2519         .guest_debug_pre = kvm_guest_debug_pre,
2520         .get_msr = vmx_get_msr,
2521         .set_msr = vmx_set_msr,
2522         .get_segment_base = vmx_get_segment_base,
2523         .get_segment = vmx_get_segment,
2524         .set_segment = vmx_set_segment,
2525         .get_cs_db_l_bits = vmx_get_cs_db_l_bits,
2526         .decache_cr4_guest_bits = vmx_decache_cr4_guest_bits,
2527         .set_cr0 = vmx_set_cr0,
2528         .set_cr3 = vmx_set_cr3,
2529         .set_cr4 = vmx_set_cr4,
2530 #ifdef CONFIG_X86_64
2531         .set_efer = vmx_set_efer,
2532 #endif
2533         .get_idt = vmx_get_idt,
2534         .set_idt = vmx_set_idt,
2535         .get_gdt = vmx_get_gdt,
2536         .set_gdt = vmx_set_gdt,
2537         .cache_regs = vcpu_load_rsp_rip,
2538         .decache_regs = vcpu_put_rsp_rip,
2539         .get_rflags = vmx_get_rflags,
2540         .set_rflags = vmx_set_rflags,
2541
2542         .tlb_flush = vmx_flush_tlb,
2543         .inject_page_fault = vmx_inject_page_fault,
2544
2545         .inject_gp = vmx_inject_gp,
2546
2547         .run = vmx_vcpu_run,
2548         .handle_exit = kvm_handle_exit,
2549         .skip_emulated_instruction = skip_emulated_instruction,
2550         .patch_hypercall = vmx_patch_hypercall,
2551         .get_irq = vmx_get_irq,
2552         .set_irq = vmx_inject_irq,
2553         .inject_pending_irq = vmx_intr_assist,
2554         .inject_pending_vectors = do_interrupt_requests,
2555 };
2556
2557 static int __init vmx_init(void)
2558 {
2559         void *iova;
2560         int r;
2561
2562         vmx_io_bitmap_a = alloc_page(GFP_KERNEL | __GFP_HIGHMEM);
2563         if (!vmx_io_bitmap_a)
2564                 return -ENOMEM;
2565
2566         vmx_io_bitmap_b = alloc_page(GFP_KERNEL | __GFP_HIGHMEM);
2567         if (!vmx_io_bitmap_b) {
2568                 r = -ENOMEM;
2569                 goto out;
2570         }
2571
2572         /*
2573          * Allow direct access to the PC debug port (it is often used for I/O
2574          * delays, but the vmexits simply slow things down).
2575          */
2576         iova = kmap(vmx_io_bitmap_a);
2577         memset(iova, 0xff, PAGE_SIZE);
2578         clear_bit(0x80, iova);
2579         kunmap(vmx_io_bitmap_a);
2580
2581         iova = kmap(vmx_io_bitmap_b);
2582         memset(iova, 0xff, PAGE_SIZE);
2583         kunmap(vmx_io_bitmap_b);
2584
2585         r = kvm_init_x86(&vmx_x86_ops, sizeof(struct vcpu_vmx), THIS_MODULE);
2586         if (r)
2587                 goto out1;
2588
2589         if (bypass_guest_pf)
2590                 kvm_mmu_set_nonpresent_ptes(~0xffeull, 0ull);
2591
2592         return 0;
2593
2594 out1:
2595         __free_page(vmx_io_bitmap_b);
2596 out:
2597         __free_page(vmx_io_bitmap_a);
2598         return r;
2599 }
2600
2601 static void __exit vmx_exit(void)
2602 {
2603         __free_page(vmx_io_bitmap_b);
2604         __free_page(vmx_io_bitmap_a);
2605
2606         kvm_exit_x86();
2607 }
2608
2609 module_init(vmx_init)
2610 module_exit(vmx_exit)