2 * Support for OR51132 (pcHDTV HD-3000) - VSB/QAM
4 * Copyright (C) 2005 Kirk Lapray <kirk_lapray@bigfoot.com>
6 * Based on code from Jack Kelliher (kelliher@xmission.com)
7 * Copyright (C) 2002 & pcHDTV, inc.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 * This driver needs two external firmware files. Please copy
27 * "dvb-fe-or51132-vsb.fw" and "dvb-fe-or51132-qam.fw" to
28 * /usr/lib/hotplug/firmware/ or /lib/firmware/
29 * (depending on configuration of firmware hotplug).
31 #define OR51132_VSB_FIRMWARE "dvb-fe-or51132-vsb.fw"
32 #define OR51132_QAM_FIRMWARE "dvb-fe-or51132-qam.fw"
34 #include <linux/kernel.h>
35 #include <linux/module.h>
36 #include <linux/moduleparam.h>
37 #include <linux/init.h>
38 #include <linux/delay.h>
39 #include <linux/string.h>
40 #include <linux/slab.h>
41 #include <asm/byteorder.h>
43 #include "dvb_frontend.h"
48 #define dprintk(args...) \
50 if (debug) printk(KERN_DEBUG "or51132: " args); \
56 struct i2c_adapter* i2c;
57 struct dvb_frontend_ops ops;
59 /* Configuration settings */
60 const struct or51132_config* config;
62 struct dvb_frontend frontend;
64 /* Demodulator private data */
65 fe_modulation_t current_modulation;
67 /* Tuner private data */
68 u32 current_frequency;
71 static int i2c_writebytes (struct or51132_state* state, u8 reg, u8 *buf, int len)
80 if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
81 printk(KERN_WARNING "or51132: i2c_writebytes error (addr %02x, err == %i)\n", reg, err);
88 static u8 i2c_readbytes (struct or51132_state* state, u8 reg, u8* buf, int len)
97 if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
98 printk(KERN_WARNING "or51132: i2c_readbytes error (addr %02x, err == %i)\n", reg, err);
105 static int or51132_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
107 struct or51132_state* state = fe->demodulator_priv;
108 static u8 run_buf[] = {0x7F,0x01};
111 u32 firmwareAsize, firmwareBsize;
114 dprintk("Firmware is %Zd bytes\n",fw->size);
116 /* Get size of firmware A and B */
117 firmwareAsize = le32_to_cpu(*((u32*)fw->data));
118 dprintk("FirmwareA is %i bytes\n",firmwareAsize);
119 firmwareBsize = le32_to_cpu(*((u32*)(fw->data+4)));
120 dprintk("FirmwareB is %i bytes\n",firmwareBsize);
122 /* Upload firmware */
123 if ((ret = i2c_writebytes(state,state->config->demod_address,
124 &fw->data[8],firmwareAsize))) {
125 printk(KERN_WARNING "or51132: load_firmware error 1\n");
129 if ((ret = i2c_writebytes(state,state->config->demod_address,
130 &fw->data[8+firmwareAsize],firmwareBsize))) {
131 printk(KERN_WARNING "or51132: load_firmware error 2\n");
136 if ((ret = i2c_writebytes(state,state->config->demod_address,
138 printk(KERN_WARNING "or51132: load_firmware error 3\n");
142 /* Wait at least 5 msec */
143 msleep(20); /* 10ms */
145 if ((ret = i2c_writebytes(state,state->config->demod_address,
147 printk(KERN_WARNING "or51132: load_firmware error 4\n");
151 /* 50ms for operation to begin */
154 /* Read back ucode version to besure we loaded correctly and are really up and running */
155 /* Get uCode version */
159 msleep(20); /* 20ms */
160 if ((ret = i2c_writebytes(state,state->config->demod_address,
162 printk(KERN_WARNING "or51132: load_firmware error a\n");
168 msleep(20); /* 20ms */
169 if ((ret = i2c_writebytes(state,state->config->demod_address,
171 printk(KERN_WARNING "or51132: load_firmware error b\n");
177 msleep(20); /* 20ms */
178 if ((ret = i2c_writebytes(state,state->config->demod_address,
180 printk(KERN_WARNING "or51132: load_firmware error c\n");
185 msleep(20); /* 20ms */
186 /* Once upon a time, this command might have had something
187 to do with getting the firmware version, but it's
189 {0x04,0x00,0x30,0x00,i+1} */
190 /* Read 8 bytes, two bytes at a time */
191 if ((ret = i2c_readbytes(state,state->config->demod_address,
194 "or51132: load_firmware error d - %d\n",i);
200 "or51132: Version: %02X%02X%02X%02X-%02X%02X%02X%02X (%02X%01X-%01X-%02X%01X-%01X)\n",
201 rec_buf[1],rec_buf[0],rec_buf[3],rec_buf[2],
202 rec_buf[5],rec_buf[4],rec_buf[7],rec_buf[6],
203 rec_buf[3],rec_buf[2]>>4,rec_buf[2]&0x0f,
204 rec_buf[5],rec_buf[4]>>4,rec_buf[4]&0x0f);
209 msleep(20); /* 20ms */
210 if ((ret = i2c_writebytes(state,state->config->demod_address,
212 printk(KERN_WARNING "or51132: load_firmware error e\n");
218 static int or51132_init(struct dvb_frontend* fe)
223 static int or51132_read_ber(struct dvb_frontend* fe, u32* ber)
229 static int or51132_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
235 static int or51132_sleep(struct dvb_frontend* fe)
240 static int or51132_setmode(struct dvb_frontend* fe)
242 struct or51132_state* state = fe->demodulator_priv;
243 unsigned char cmd_buf[3];
245 dprintk("setmode %d\n",(int)state->current_modulation);
246 /* set operation mode in Receiver 1 register; */
249 switch (state->current_modulation) {
253 /* Auto-deinterleave; MPEG ser, MPEG2tr, phase noise-high*/
257 /* Auto CH, Auto NTSC rej, MPEGser, MPEG2tr, phase noise-high*/
261 printk("setmode:Modulation set to unsupported value\n");
263 if (i2c_writebytes(state,state->config->demod_address,
265 printk(KERN_WARNING "or51132: set_mode error 1\n");
268 dprintk("or51132: set #1 to %02x\n", cmd_buf[2]);
270 /* Set operation mode in Receiver 6 register */
272 switch (state->current_modulation) {
274 /* REC MODE Normal Carrier Lock */
276 /* Channel MODE Auto QAM64/256 */
280 /* REC MODE Normal Carrier Lock */
282 /* Channel MODE QAM256 */
286 /* REC MODE Normal Carrier Lock */
288 /* Channel MODE QAM64 */
292 /* REC MODE inv IF spectrum, Normal */
294 /* Channel MODE ATSC/VSB8 */
298 printk("setmode: Modulation set to unsupported value\n");
300 msleep(20); /* 20ms */
301 if (i2c_writebytes(state,state->config->demod_address,
303 printk(KERN_WARNING "or51132: set_mode error 2\n");
306 dprintk("or51132: set #6 to 0x%02x%02x\n", cmd_buf[1], cmd_buf[2]);
311 /* Some modulations use the same firmware. This classifies modulations
312 by the firmware they use. */
313 #define MOD_FWCLASS_UNKNOWN 0
314 #define MOD_FWCLASS_VSB 1
315 #define MOD_FWCLASS_QAM 2
316 static int modulation_fw_class(fe_modulation_t modulation)
320 return MOD_FWCLASS_VSB;
324 return MOD_FWCLASS_QAM;
326 return MOD_FWCLASS_UNKNOWN;
330 static int or51132_set_parameters(struct dvb_frontend* fe,
331 struct dvb_frontend_parameters *param)
335 struct or51132_state* state = fe->demodulator_priv;
336 const struct firmware *fw;
340 /* Upload new firmware only if we need a different one */
341 if (modulation_fw_class(state->current_modulation) !=
342 modulation_fw_class(param->u.vsb.modulation)) {
343 switch(modulation_fw_class(param->u.vsb.modulation)) {
344 case MOD_FWCLASS_VSB:
345 dprintk("set_parameters VSB MODE\n");
346 fwname = OR51132_VSB_FIRMWARE;
348 /* Set non-punctured clock for VSB */
351 case MOD_FWCLASS_QAM:
352 dprintk("set_parameters QAM MODE\n");
353 fwname = OR51132_QAM_FIRMWARE;
355 /* Set punctured clock for QAM */
359 printk("or51132: Modulation type(%d) UNSUPPORTED\n",
360 param->u.vsb.modulation);
363 printk("or51132: Waiting for firmware upload(%s)...\n",
365 ret = request_firmware(&fw, fwname, &state->i2c->dev);
367 printk(KERN_WARNING "or51132: No firmware up"
368 "loaded(timeout or file not found?)\n");
371 ret = or51132_load_firmware(fe, fw);
372 release_firmware(fw);
374 printk(KERN_WARNING "or51132: Writing firmware to "
378 printk("or51132: Firmware upload complete.\n");
379 state->config->set_ts_params(fe, clock_mode);
381 /* Change only if we are actually changing the modulation */
382 if (state->current_modulation != param->u.vsb.modulation) {
383 state->current_modulation = param->u.vsb.modulation;
387 dvb_pll_configure(state->config->pll_desc, buf,
388 param->frequency, 0);
389 dprintk("set_parameters tuner bytes: 0x%02x 0x%02x "
390 "0x%02x 0x%02x\n",buf[0],buf[1],buf[2],buf[3]);
391 if (i2c_writebytes(state, state->config->pll_address, buf, 4))
392 printk(KERN_WARNING "or51132: set_parameters error "
393 "writing to tuner\n");
395 /* Set to current mode */
398 /* Update current frequency */
399 state->current_frequency = param->frequency;
403 static int or51132_read_status(struct dvb_frontend* fe, fe_status_t* status)
405 struct or51132_state* state = fe->demodulator_priv;
406 unsigned char rec_buf[2];
407 unsigned char snd_buf[2];
410 /* Receiver Status */
413 msleep(30); /* 30ms */
414 if (i2c_writebytes(state,state->config->demod_address,snd_buf,2)) {
415 printk(KERN_WARNING "or51132: read_status write error\n");
418 msleep(30); /* 30ms */
419 if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
420 printk(KERN_WARNING "or51132: read_status read error\n");
423 dprintk("read_status %x %x\n",rec_buf[0],rec_buf[1]);
425 if (rec_buf[1] & 0x01) { /* Receiver Lock */
426 *status |= FE_HAS_SIGNAL;
427 *status |= FE_HAS_CARRIER;
428 *status |= FE_HAS_VITERBI;
429 *status |= FE_HAS_SYNC;
430 *status |= FE_HAS_LOCK;
435 /* log10-1 table at .5 increments from 1 to 100.5 */
436 static unsigned int i100x20log10[] = {
437 0, 352, 602, 795, 954, 1088, 1204, 1306, 1397, 1480,
438 1556, 1625, 1690, 1750, 1806, 1858, 1908, 1955, 2000, 2042,
439 2082, 2121, 2158, 2193, 2227, 2260, 2292, 2322, 2352, 2380,
440 2408, 2434, 2460, 2486, 2510, 2534, 2557, 2580, 2602, 2623,
441 2644, 2664, 2684, 2704, 2723, 2742, 2760, 2778, 2795, 2813,
442 2829, 2846, 2862, 2878, 2894, 2909, 2924, 2939, 2954, 2968,
443 2982, 2996, 3010, 3023, 3037, 3050, 3062, 3075, 3088, 3100,
444 3112, 3124, 3136, 3148, 3159, 3170, 3182, 3193, 3204, 3214,
445 3225, 3236, 3246, 3256, 3266, 3276, 3286, 3296, 3306, 3316,
446 3325, 3334, 3344, 3353, 3362, 3371, 3380, 3389, 3397, 3406,
447 3415, 3423, 3432, 3440, 3448, 3456, 3464, 3472, 3480, 3488,
448 3496, 3504, 3511, 3519, 3526, 3534, 3541, 3549, 3556, 3563,
449 3570, 3577, 3584, 3591, 3598, 3605, 3612, 3619, 3625, 3632,
450 3639, 3645, 3652, 3658, 3665, 3671, 3677, 3683, 3690, 3696,
451 3702, 3708, 3714, 3720, 3726, 3732, 3738, 3744, 3750, 3755,
452 3761, 3767, 3772, 3778, 3784, 3789, 3795, 3800, 3806, 3811,
453 3816, 3822, 3827, 3832, 3838, 3843, 3848, 3853, 3858, 3863,
454 3868, 3874, 3879, 3884, 3888, 3893, 3898, 3903, 3908, 3913,
455 3918, 3922, 3927, 3932, 3936, 3941, 3946, 3950, 3955, 3960,
456 3964, 3969, 3973, 3978, 3982, 3986, 3991, 3995, 4000, 4004,
459 static unsigned int denom[] = {1,1,100,1000,10000,100000,1000000,10000000,100000000};
461 static unsigned int i20Log10(unsigned short val)
463 unsigned int rntval = 100;
464 unsigned int tmp = val;
465 unsigned int exp = 1;
467 while(tmp > 100) {tmp /= 100; exp++;}
469 val = (2 * val)/denom[exp];
470 if (exp > 1) rntval = 2000*exp;
472 rntval += i100x20log10[val];
476 static int or51132_read_signal_strength(struct dvb_frontend* fe, u16* strength)
478 struct or51132_state* state = fe->demodulator_priv;
479 unsigned char rec_buf[2];
480 unsigned char snd_buf[2];
487 snd_buf[1]=0x02; /* SNR after Equalizer */
488 msleep(30); /* 30ms */
489 if (i2c_writebytes(state,state->config->demod_address,snd_buf,2)) {
490 printk(KERN_WARNING "or51132: read_status write error\n");
493 msleep(30); /* 30ms */
494 if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
495 printk(KERN_WARNING "or51132: read_status read error\n");
498 snr_equ = rec_buf[0] | (rec_buf[1] << 8);
499 dprintk("read_signal_strength snr_equ %x %x (%i)\n",rec_buf[0],rec_buf[1],snr_equ);
501 /* Receiver Status */
504 msleep(30); /* 30ms */
505 if (i2c_writebytes(state,state->config->demod_address,snd_buf,2)) {
506 printk(KERN_WARNING "or51132: read_signal_strength read_status write error\n");
509 msleep(30); /* 30ms */
510 if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
511 printk(KERN_WARNING "or51132: read_signal_strength read_status read error\n");
514 dprintk("read_signal_strength read_status %x %x\n",rec_buf[0],rec_buf[1]);
515 rcvr_stat = rec_buf[1];
516 usK = (rcvr_stat & 0x10) ? 3 : 0;
518 /* The value reported back from the frontend will be FFFF=100% 0000=0% */
519 signal_strength = (((8952 - i20Log10(snr_equ) - usK*100)/3+5)*65535)/1000;
520 if (signal_strength > 0xffff)
523 *strength = signal_strength;
524 dprintk("read_signal_strength %i\n",*strength);
529 static int or51132_read_snr(struct dvb_frontend* fe, u16* snr)
531 struct or51132_state* state = fe->demodulator_priv;
532 unsigned char rec_buf[2];
533 unsigned char snd_buf[2];
537 snd_buf[1]=0x02; /* SNR after Equalizer */
538 msleep(30); /* 30ms */
539 if (i2c_writebytes(state,state->config->demod_address,snd_buf,2)) {
540 printk(KERN_WARNING "or51132: read_snr write error\n");
543 msleep(30); /* 30ms */
544 if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
545 printk(KERN_WARNING "or51132: read_snr dvr read error\n");
548 snr_equ = rec_buf[0] | (rec_buf[1] << 8);
549 dprintk("read_snr snr_equ %x %x (%i)\n",rec_buf[0],rec_buf[1],snr_equ);
551 *snr = 0xFFFF - snr_equ;
552 dprintk("read_snr %i\n",*snr);
557 static int or51132_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fe_tune_settings)
559 fe_tune_settings->min_delay_ms = 500;
560 fe_tune_settings->step_size = 0;
561 fe_tune_settings->max_drift = 0;
566 static void or51132_release(struct dvb_frontend* fe)
568 struct or51132_state* state = fe->demodulator_priv;
572 static struct dvb_frontend_ops or51132_ops;
574 struct dvb_frontend* or51132_attach(const struct or51132_config* config,
575 struct i2c_adapter* i2c)
577 struct or51132_state* state = NULL;
579 /* Allocate memory for the internal state */
580 state = kmalloc(sizeof(struct or51132_state), GFP_KERNEL);
584 /* Setup the state */
585 state->config = config;
587 memcpy(&state->ops, &or51132_ops, sizeof(struct dvb_frontend_ops));
588 state->current_frequency = -1;
589 state->current_modulation = -1;
591 /* Create dvb_frontend */
592 state->frontend.ops = &state->ops;
593 state->frontend.demodulator_priv = state;
594 return &state->frontend;
601 static struct dvb_frontend_ops or51132_ops = {
604 .name = "Oren OR51132 VSB/QAM Frontend",
606 .frequency_min = 44000000,
607 .frequency_max = 958000000,
608 .frequency_stepsize = 166666,
609 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
610 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
611 FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_QAM_AUTO |
615 .release = or51132_release,
617 .init = or51132_init,
618 .sleep = or51132_sleep,
620 .set_frontend = or51132_set_parameters,
621 .get_tune_settings = or51132_get_tune_settings,
623 .read_status = or51132_read_status,
624 .read_ber = or51132_read_ber,
625 .read_signal_strength = or51132_read_signal_strength,
626 .read_snr = or51132_read_snr,
627 .read_ucblocks = or51132_read_ucblocks,
630 module_param(debug, int, 0644);
631 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
633 MODULE_DESCRIPTION("OR51132 ATSC [pcHDTV HD-3000] (8VSB & ITU J83 AnnexB FEC QAM64/256) Demodulator Driver");
634 MODULE_AUTHOR("Kirk Lapray");
635 MODULE_LICENSE("GPL");
637 EXPORT_SYMBOL(or51132_attach);