3 * device driver for Conexant 2388x based TV cards
4 * MPEG Transport Stream (DVB) routines
6 * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
7 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 #include <linux/module.h>
25 #include <linux/init.h>
26 #include <linux/device.h>
28 #include <linux/kthread.h>
29 #include <linux/file.h>
30 #include <linux/suspend.h>
34 #include <media/v4l2-common.h>
37 #include "mt352_priv.h"
38 #ifdef HAVE_VP3054_I2C
39 # include "cx88-vp3054-i2c.h"
50 MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
51 MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
52 MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
53 MODULE_LICENSE("GPL");
55 static unsigned int debug = 0;
56 module_param(debug, int, 0644);
57 MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
59 #define dprintk(level,fmt, arg...) if (debug >= level) \
60 printk(KERN_DEBUG "%s/2-dvb: " fmt, dev->core->name , ## arg)
62 /* ------------------------------------------------------------------ */
64 static int dvb_buf_setup(struct videobuf_queue *q,
65 unsigned int *count, unsigned int *size)
67 struct cx8802_dev *dev = q->priv_data;
69 dev->ts_packet_size = 188 * 4;
70 dev->ts_packet_count = 32;
72 *size = dev->ts_packet_size * dev->ts_packet_count;
77 static int dvb_buf_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
78 enum v4l2_field field)
80 struct cx8802_dev *dev = q->priv_data;
81 return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
84 static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
86 struct cx8802_dev *dev = q->priv_data;
87 cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
90 static void dvb_buf_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
92 cx88_free_buffer(q, (struct cx88_buffer*)vb);
95 static struct videobuf_queue_ops dvb_qops = {
96 .buf_setup = dvb_buf_setup,
97 .buf_prepare = dvb_buf_prepare,
98 .buf_queue = dvb_buf_queue,
99 .buf_release = dvb_buf_release,
102 /* ------------------------------------------------------------------ */
103 static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
105 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
106 static u8 reset [] = { RESET, 0x80 };
107 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
108 static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
109 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
110 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
112 mt352_write(fe, clock_config, sizeof(clock_config));
114 mt352_write(fe, reset, sizeof(reset));
115 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
117 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
118 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
119 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
123 static int dvico_dual_demod_init(struct dvb_frontend *fe)
125 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
126 static u8 reset [] = { RESET, 0x80 };
127 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
128 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
129 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
130 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
132 mt352_write(fe, clock_config, sizeof(clock_config));
134 mt352_write(fe, reset, sizeof(reset));
135 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
137 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
138 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
139 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
144 static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
146 static u8 clock_config [] = { 0x89, 0x38, 0x39 };
147 static u8 reset [] = { 0x50, 0x80 };
148 static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
149 static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
150 0x00, 0xFF, 0x00, 0x40, 0x40 };
151 static u8 dntv_extra[] = { 0xB5, 0x7A };
152 static u8 capt_range_cfg[] = { 0x75, 0x32 };
154 mt352_write(fe, clock_config, sizeof(clock_config));
156 mt352_write(fe, reset, sizeof(reset));
157 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
159 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
161 mt352_write(fe, dntv_extra, sizeof(dntv_extra));
162 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
167 static struct mt352_config dvico_fusionhdtv = {
168 .demod_address = 0x0f,
169 .demod_init = dvico_fusionhdtv_demod_init,
172 static struct mt352_config dntv_live_dvbt_config = {
173 .demod_address = 0x0f,
174 .demod_init = dntv_live_dvbt_demod_init,
177 static struct mt352_config dvico_fusionhdtv_dual = {
178 .demod_address = 0x0f,
179 .demod_init = dvico_dual_demod_init,
182 #ifdef HAVE_VP3054_I2C
183 static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
185 static u8 clock_config [] = { 0x89, 0x38, 0x38 };
186 static u8 reset [] = { 0x50, 0x80 };
187 static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
188 static u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
189 0x00, 0xFF, 0x00, 0x40, 0x40 };
190 static u8 dntv_extra[] = { 0xB5, 0x7A };
191 static u8 capt_range_cfg[] = { 0x75, 0x32 };
193 mt352_write(fe, clock_config, sizeof(clock_config));
195 mt352_write(fe, reset, sizeof(reset));
196 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
198 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
200 mt352_write(fe, dntv_extra, sizeof(dntv_extra));
201 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
206 static int philips_fmd1216_pll_init(struct dvb_frontend *fe)
208 struct cx8802_dev *dev= fe->dvb->priv;
210 /* this message is to set up ATC and ALC */
211 static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0xa0 };
213 { .addr = dev->core->pll_addr, .flags = 0,
214 .buf = fmd1216_init, .len = sizeof(fmd1216_init) };
217 if (fe->ops.i2c_gate_ctrl)
218 fe->ops.i2c_gate_ctrl(fe, 1);
219 if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
229 static int dntv_live_dvbt_pro_tuner_set_params(struct dvb_frontend* fe,
230 struct dvb_frontend_parameters* params)
232 struct cx8802_dev *dev= fe->dvb->priv;
235 { .addr = dev->core->pll_addr, .flags = 0,
236 .buf = buf, .len = 4 };
239 /* Switch PLL to DVB mode */
240 err = philips_fmd1216_pll_init(fe);
245 dvb_pll_configure(dev->core->pll_desc, buf,
247 params->u.ofdm.bandwidth);
248 if (fe->ops.i2c_gate_ctrl)
249 fe->ops.i2c_gate_ctrl(fe, 1);
250 if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
252 printk(KERN_WARNING "cx88-dvb: %s error "
253 "(addr %02x <- %02x, err = %i)\n",
254 __FUNCTION__, dev->core->pll_addr, buf[0], err);
264 static struct mt352_config dntv_live_dvbt_pro_config = {
265 .demod_address = 0x0f,
267 .demod_init = dntv_live_dvbt_pro_demod_init,
271 static int dvico_hybrid_tuner_set_params(struct dvb_frontend *fe,
272 struct dvb_frontend_parameters *params)
275 struct cx8802_dev *dev= fe->dvb->priv;
277 { .addr = dev->core->pll_addr, .flags = 0,
278 .buf = pllbuf, .len = 4 };
281 dvb_pll_configure(dev->core->pll_desc, pllbuf,
283 params->u.ofdm.bandwidth);
285 if (fe->ops.i2c_gate_ctrl)
286 fe->ops.i2c_gate_ctrl(fe, 1);
287 if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
288 printk(KERN_WARNING "cx88-dvb: %s error "
289 "(addr %02x <- %02x, err = %i)\n",
290 __FUNCTION__, pllbuf[0], pllbuf[1], err);
300 static struct zl10353_config dvico_fusionhdtv_hybrid = {
301 .demod_address = 0x0f,
305 static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
306 .demod_address = 0x0f,
309 static struct cx22702_config connexant_refboard_config = {
310 .demod_address = 0x43,
311 .output_mode = CX22702_SERIAL_OUTPUT,
314 static struct cx22702_config hauppauge_novat_config = {
315 .demod_address = 0x43,
316 .output_mode = CX22702_SERIAL_OUTPUT,
319 static struct cx22702_config hauppauge_hvr1100_config = {
320 .demod_address = 0x63,
321 .output_mode = CX22702_SERIAL_OUTPUT,
324 static struct cx22702_config hauppauge_hvr1300_config = {
325 .demod_address = 0x63,
326 .output_mode = CX22702_SERIAL_OUTPUT,
329 static struct cx22702_config hauppauge_hvr3000_config = {
330 .demod_address = 0x63,
331 .output_mode = CX22702_SERIAL_OUTPUT,
334 static int or51132_set_ts_param(struct dvb_frontend* fe,
337 struct cx8802_dev *dev= fe->dvb->priv;
338 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
342 static struct or51132_config pchdtv_hd3000 = {
343 .demod_address = 0x15,
344 .set_ts_params = or51132_set_ts_param,
347 static int lgdt3302_tuner_set_params(struct dvb_frontend* fe,
348 struct dvb_frontend_parameters* params)
350 /* FIXME make this routine use the tuner-simple code.
351 * It could probably be shared with a number of ATSC
352 * frontends. Many share the same tuner with analog TV. */
354 struct cx8802_dev *dev= fe->dvb->priv;
355 struct cx88_core *core = dev->core;
358 { .addr = dev->core->pll_addr, .flags = 0, .buf = buf, .len = 4 };
361 dvb_pll_configure(core->pll_desc, buf, params->frequency, 0);
362 dprintk(1, "%s: tuner at 0x%02x bytes: 0x%02x 0x%02x 0x%02x 0x%02x\n",
363 __FUNCTION__, msg.addr, buf[0],buf[1],buf[2],buf[3]);
365 if (fe->ops.i2c_gate_ctrl)
366 fe->ops.i2c_gate_ctrl(fe, 1);
367 if ((err = i2c_transfer(&core->i2c_adap, &msg, 1)) != 1) {
368 printk(KERN_WARNING "cx88-dvb: %s error "
369 "(addr %02x <- %02x, err = %i)\n",
370 __FUNCTION__, buf[0], buf[1], err);
379 static int lgdt3303_tuner_set_params(struct dvb_frontend* fe,
380 struct dvb_frontend_parameters* params)
382 struct cx8802_dev *dev= fe->dvb->priv;
383 struct cx88_core *core = dev->core;
385 /* Put the analog decoder in standby to keep it quiet */
386 cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
388 return lg_h06xf_pll_set(fe, &core->i2c_adap, params);
391 static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
393 struct cx8802_dev *dev= fe->dvb->priv;
394 struct cx88_core *core = dev->core;
396 dprintk(1, "%s: index = %d\n", __FUNCTION__, index);
398 cx_clear(MO_GP0_IO, 8);
400 cx_set(MO_GP0_IO, 8);
404 static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
406 struct cx8802_dev *dev= fe->dvb->priv;
408 dev->ts_gen_cntrl |= 0x04;
410 dev->ts_gen_cntrl &= ~0x04;
414 static struct lgdt330x_config fusionhdtv_3_gold = {
415 .demod_address = 0x0e,
416 .demod_chip = LGDT3302,
417 .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
418 .set_ts_params = lgdt330x_set_ts_param,
421 static struct lgdt330x_config fusionhdtv_5_gold = {
422 .demod_address = 0x0e,
423 .demod_chip = LGDT3303,
424 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
425 .set_ts_params = lgdt330x_set_ts_param,
428 static struct lgdt330x_config pchdtv_hd5500 = {
429 .demod_address = 0x59,
430 .demod_chip = LGDT3303,
431 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
432 .set_ts_params = lgdt330x_set_ts_param,
435 static int nxt200x_set_ts_param(struct dvb_frontend* fe,
438 struct cx8802_dev *dev= fe->dvb->priv;
439 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
443 static int nxt200x_set_pll_input(u8* buf, int input)
452 static struct nxt200x_config ati_hdtvwonder = {
453 .demod_address = 0x0a,
454 .set_pll_input = nxt200x_set_pll_input,
455 .set_ts_params = nxt200x_set_ts_param,
458 static int cx24123_set_ts_param(struct dvb_frontend* fe,
461 struct cx8802_dev *dev= fe->dvb->priv;
462 dev->ts_gen_cntrl = 0x02;
466 static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
467 fe_sec_voltage_t voltage)
469 struct cx8802_dev *dev= fe->dvb->priv;
470 struct cx88_core *core = dev->core;
472 if (voltage == SEC_VOLTAGE_OFF) {
473 cx_write(MO_GP0_IO, 0x000006fb);
475 cx_write(MO_GP0_IO, 0x000006f9);
478 if (core->prev_set_voltage)
479 return core->prev_set_voltage(fe, voltage);
483 static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
484 fe_sec_voltage_t voltage)
486 struct cx8802_dev *dev= fe->dvb->priv;
487 struct cx88_core *core = dev->core;
489 if (voltage == SEC_VOLTAGE_OFF) {
490 dprintk(1,"LNB Voltage OFF\n");
491 cx_write(MO_GP0_IO, 0x0000efff);
494 if (core->prev_set_voltage)
495 return core->prev_set_voltage(fe, voltage);
499 static struct cx24123_config geniatech_dvbs_config = {
500 .demod_address = 0x55,
501 .set_ts_params = cx24123_set_ts_param,
504 static struct cx24123_config hauppauge_novas_config = {
505 .demod_address = 0x55,
506 .set_ts_params = cx24123_set_ts_param,
509 static struct cx24123_config kworld_dvbs_100_config = {
510 .demod_address = 0x15,
511 .set_ts_params = cx24123_set_ts_param,
515 static int dvb_register(struct cx8802_dev *dev)
517 /* init struct videobuf_dvb */
518 dev->dvb.name = dev->core->name;
519 dev->ts_gen_cntrl = 0x0c;
522 switch (dev->core->board) {
523 case CX88_BOARD_HAUPPAUGE_DVB_T1:
524 dev->dvb.frontend = dvb_attach(cx22702_attach,
525 &hauppauge_novat_config,
526 &dev->core->i2c_adap);
527 if (dev->dvb.frontend != NULL) {
528 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
529 &dev->core->i2c_adap,
530 &dvb_pll_thomson_dtt759x);
533 case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
534 case CX88_BOARD_CONEXANT_DVB_T1:
535 case CX88_BOARD_KWORLD_DVB_T_CX22702:
536 case CX88_BOARD_WINFAST_DTV1000:
537 dev->dvb.frontend = dvb_attach(cx22702_attach,
538 &connexant_refboard_config,
539 &dev->core->i2c_adap);
540 if (dev->dvb.frontend != NULL) {
541 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
542 &dev->core->i2c_adap,
543 &dvb_pll_thomson_dtt7579);
546 case CX88_BOARD_WINFAST_DTV2000H:
547 case CX88_BOARD_HAUPPAUGE_HVR1100:
548 case CX88_BOARD_HAUPPAUGE_HVR1100LP:
549 dev->dvb.frontend = dvb_attach(cx22702_attach,
550 &hauppauge_hvr1100_config,
551 &dev->core->i2c_adap);
552 if (dev->dvb.frontend != NULL) {
553 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
554 &dev->core->i2c_adap,
558 case CX88_BOARD_HAUPPAUGE_HVR1300:
559 dev->dvb.frontend = dvb_attach(cx22702_attach,
560 &hauppauge_hvr1300_config,
561 &dev->core->i2c_adap);
562 if (dev->dvb.frontend != NULL) {
563 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
564 &dev->core->i2c_adap,
568 case CX88_BOARD_HAUPPAUGE_HVR3000:
569 dev->dvb.frontend = dvb_attach(cx22702_attach,
570 &hauppauge_hvr3000_config,
571 &dev->core->i2c_adap);
572 if (dev->dvb.frontend != NULL) {
573 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
574 &dev->core->i2c_adap,
578 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
579 dev->dvb.frontend = dvb_attach(mt352_attach,
581 &dev->core->i2c_adap);
582 if (dev->dvb.frontend != NULL) {
583 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
584 NULL, &dvb_pll_thomson_dtt7579);
587 /* ZL10353 replaces MT352 on later cards */
588 dev->dvb.frontend = dvb_attach(zl10353_attach,
589 &dvico_fusionhdtv_plus_v1_1,
590 &dev->core->i2c_adap);
591 if (dev->dvb.frontend != NULL) {
592 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
593 NULL, &dvb_pll_thomson_dtt7579);
596 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
597 /* The tin box says DEE1601, but it seems to be DTT7579
598 * compatible, with a slightly different MT352 AGC gain. */
599 dev->dvb.frontend = dvb_attach(mt352_attach,
600 &dvico_fusionhdtv_dual,
601 &dev->core->i2c_adap);
602 if (dev->dvb.frontend != NULL) {
603 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
604 NULL, &dvb_pll_thomson_dtt7579);
607 /* ZL10353 replaces MT352 on later cards */
608 dev->dvb.frontend = dvb_attach(zl10353_attach,
609 &dvico_fusionhdtv_plus_v1_1,
610 &dev->core->i2c_adap);
611 if (dev->dvb.frontend != NULL) {
612 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
613 NULL, &dvb_pll_thomson_dtt7579);
616 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
617 dev->dvb.frontend = dvb_attach(mt352_attach,
619 &dev->core->i2c_adap);
620 if (dev->dvb.frontend != NULL) {
621 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
622 NULL, &dvb_pll_lg_z201);
625 case CX88_BOARD_KWORLD_DVB_T:
626 case CX88_BOARD_DNTV_LIVE_DVB_T:
627 case CX88_BOARD_ADSTECH_DVB_T_PCI:
628 dev->dvb.frontend = dvb_attach(mt352_attach,
629 &dntv_live_dvbt_config,
630 &dev->core->i2c_adap);
631 if (dev->dvb.frontend != NULL) {
632 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
633 NULL, &dvb_pll_unknown_1);
636 case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
637 #ifdef HAVE_VP3054_I2C
638 dev->core->pll_addr = 0x61;
639 dev->core->pll_desc = &dvb_pll_fmd1216me;
640 dev->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
641 &((struct vp3054_i2c_state *)dev->card_priv)->adap);
642 if (dev->dvb.frontend != NULL) {
643 dev->dvb.frontend->ops.tuner_ops.set_params = dntv_live_dvbt_pro_tuner_set_params;
646 printk("%s: built without vp3054 support\n", dev->core->name);
649 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
650 dev->core->pll_addr = 0x61;
651 dev->core->pll_desc = &dvb_pll_thomson_fe6600;
652 dev->dvb.frontend = dvb_attach(zl10353_attach,
653 &dvico_fusionhdtv_hybrid,
654 &dev->core->i2c_adap);
655 if (dev->dvb.frontend != NULL) {
656 dev->dvb.frontend->ops.tuner_ops.set_params = dvico_hybrid_tuner_set_params;
659 case CX88_BOARD_PCHDTV_HD3000:
660 dev->dvb.frontend = dvb_attach(or51132_attach,
662 &dev->core->i2c_adap);
663 if (dev->dvb.frontend != NULL) {
664 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
665 &dev->core->i2c_adap,
666 &dvb_pll_thomson_dtt761x);
669 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
670 dev->ts_gen_cntrl = 0x08;
672 /* Do a hardware reset of chip before using it. */
673 struct cx88_core *core = dev->core;
675 cx_clear(MO_GP0_IO, 1);
677 cx_set(MO_GP0_IO, 1);
680 /* Select RF connector callback */
681 fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
682 dev->core->pll_addr = 0x61;
683 dev->core->pll_desc = &dvb_pll_microtune_4042;
684 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
686 &dev->core->i2c_adap);
687 if (dev->dvb.frontend != NULL) {
688 dev->dvb.frontend->ops.tuner_ops.set_params = lgdt3302_tuner_set_params;
692 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
693 dev->ts_gen_cntrl = 0x08;
695 /* Do a hardware reset of chip before using it. */
696 struct cx88_core *core = dev->core;
698 cx_clear(MO_GP0_IO, 1);
700 cx_set(MO_GP0_IO, 9);
702 dev->core->pll_addr = 0x61;
703 dev->core->pll_desc = &dvb_pll_thomson_dtt761x;
704 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
706 &dev->core->i2c_adap);
707 if (dev->dvb.frontend != NULL) {
708 dev->dvb.frontend->ops.tuner_ops.set_params = lgdt3302_tuner_set_params;
712 case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
713 dev->ts_gen_cntrl = 0x08;
715 /* Do a hardware reset of chip before using it. */
716 struct cx88_core *core = dev->core;
718 cx_clear(MO_GP0_IO, 1);
720 cx_set(MO_GP0_IO, 1);
722 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
724 &dev->core->i2c_adap);
725 if (dev->dvb.frontend != NULL) {
726 dev->dvb.frontend->ops.tuner_ops.set_params = lgdt3303_tuner_set_params;
730 case CX88_BOARD_PCHDTV_HD5500:
731 dev->ts_gen_cntrl = 0x08;
733 /* Do a hardware reset of chip before using it. */
734 struct cx88_core *core = dev->core;
736 cx_clear(MO_GP0_IO, 1);
738 cx_set(MO_GP0_IO, 1);
740 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
742 &dev->core->i2c_adap);
743 if (dev->dvb.frontend != NULL) {
744 dev->dvb.frontend->ops.tuner_ops.set_params = lgdt3303_tuner_set_params;
748 case CX88_BOARD_ATI_HDTVWONDER:
749 dev->dvb.frontend = dvb_attach(nxt200x_attach,
751 &dev->core->i2c_adap);
752 if (dev->dvb.frontend != NULL) {
753 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
754 NULL, &dvb_pll_tuv1236d);
757 case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
758 case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
759 dev->dvb.frontend = dvb_attach(cx24123_attach,
760 &hauppauge_novas_config,
761 &dev->core->i2c_adap);
762 if (dev->dvb.frontend) {
763 dvb_attach(isl6421_attach, dev->dvb.frontend,
764 &dev->core->i2c_adap, 0x08, 0x00, 0x00);
767 case CX88_BOARD_KWORLD_DVBS_100:
768 dev->dvb.frontend = dvb_attach(cx24123_attach,
769 &kworld_dvbs_100_config,
770 &dev->core->i2c_adap);
771 if (dev->dvb.frontend) {
772 dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
773 dev->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
776 case CX88_BOARD_GENIATECH_DVBS:
777 dev->dvb.frontend = dvb_attach(cx24123_attach,
778 &geniatech_dvbs_config,
779 &dev->core->i2c_adap);
780 if (dev->dvb.frontend) {
781 dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
782 dev->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
786 printk("%s: The frontend of your DVB/ATSC card isn't supported yet\n",
790 if (NULL == dev->dvb.frontend) {
791 printk("%s: frontend initialization failed\n",dev->core->name);
795 if (dev->core->pll_desc) {
796 dev->dvb.frontend->ops.info.frequency_min = dev->core->pll_desc->min;
797 dev->dvb.frontend->ops.info.frequency_max = dev->core->pll_desc->max;
800 /* Put the analog decoder in standby to keep it quiet */
801 cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
803 /* register everything */
804 return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev, &dev->pci->dev);
807 /* ----------------------------------------------------------- */
809 static int __devinit dvb_probe(struct pci_dev *pci_dev,
810 const struct pci_device_id *pci_id)
812 struct cx8802_dev *dev;
813 struct cx88_core *core;
817 core = cx88_core_get(pci_dev);
822 if (!(cx88_boards[core->board].mpeg & CX88_MPEG_DVB))
826 dev = kzalloc(sizeof(*dev),GFP_KERNEL);
832 err = cx8802_init_common(dev);
836 #ifdef HAVE_VP3054_I2C
837 err = vp3054_i2c_probe(dev);
843 printk("%s/2: cx2388x based dvb card\n", core->name);
844 videobuf_queue_init(&dev->dvb.dvbq, &dvb_qops,
845 dev->pci, &dev->slock,
846 V4L2_BUF_TYPE_VIDEO_CAPTURE,
848 sizeof(struct cx88_buffer),
850 err = dvb_register(dev);
854 /* Maintain a reference to cx88-video can query the 8802 device. */
859 cx8802_fini_common(dev);
863 cx88_core_put(core,pci_dev);
867 static void __devexit dvb_remove(struct pci_dev *pci_dev)
869 struct cx8802_dev *dev = pci_get_drvdata(pci_dev);
871 /* Destroy any 8802 reference. */
872 dev->core->dvbdev = NULL;
875 videobuf_dvb_unregister(&dev->dvb);
877 #ifdef HAVE_VP3054_I2C
878 vp3054_i2c_remove(dev);
882 cx8802_fini_common(dev);
883 cx88_core_put(dev->core,dev->pci);
887 static struct pci_device_id cx8802_pci_tbl[] = {
891 .subvendor = PCI_ANY_ID,
892 .subdevice = PCI_ANY_ID,
894 /* --- end of list --- */
897 MODULE_DEVICE_TABLE(pci, cx8802_pci_tbl);
899 static struct pci_driver dvb_pci_driver = {
901 .id_table = cx8802_pci_tbl,
903 .remove = __devexit_p(dvb_remove),
905 .suspend = cx8802_suspend_common,
906 .resume = cx8802_resume_common,
910 static int dvb_init(void)
912 printk(KERN_INFO "cx2388x dvb driver version %d.%d.%d loaded\n",
913 (CX88_VERSION_CODE >> 16) & 0xff,
914 (CX88_VERSION_CODE >> 8) & 0xff,
915 CX88_VERSION_CODE & 0xff);
917 printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
918 SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
920 return pci_register_driver(&dvb_pci_driver);
923 static void dvb_fini(void)
925 pci_unregister_driver(&dvb_pci_driver);
928 module_init(dvb_init);
929 module_exit(dvb_fini);
934 * compile-command: "make DVB=1"