2 ivtv driver internal defines and structures
3 Copyright (C) 2003-2004 Kevin Thayer <nufan_wfk at yahoo.com>
4 Copyright (C) 2004 Chris Kennedy <c@groovy.org>
5 Copyright (C) 2005-2007 Hans Verkuil <hverkuil@xs4all.nl>
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 /* Internal header for ivtv project:
26 * Driver for the cx23415/6 chip.
27 * Author: Kevin Thayer (nufan_wfk at yahoo.com)
29 * http://www.ivtvdriver.org
32 * MPG600/MPG160 support by T.Adachi <tadachi@tadachi-net.com>
33 * and Takeru KOMORIYA<komoriya@paken.org>
35 * AVerMedia M179 GPIO info by Chris Pinkham <cpinkham@bc2va.org>
36 * using information provided by Jiun-Kuei Jung @ AVerMedia.
39 #include <linux/version.h>
40 #include <linux/module.h>
41 #include <linux/moduleparam.h>
42 #include <linux/init.h>
43 #include <linux/delay.h>
44 #include <linux/sched.h>
46 #include <linux/pci.h>
47 #include <linux/interrupt.h>
48 #include <linux/spinlock.h>
49 #include <linux/i2c.h>
50 #include <linux/i2c-algo-bit.h>
51 #include <linux/list.h>
52 #include <linux/unistd.h>
53 #include <linux/byteorder/swab.h>
54 #include <linux/pagemap.h>
55 #include <linux/workqueue.h>
56 #include <linux/mutex.h>
57 #include <asm/uaccess.h>
58 #include <asm/system.h>
60 #include <linux/dvb/video.h>
61 #include <linux/dvb/audio.h>
62 #include <media/v4l2-common.h>
63 #include <media/tuner.h>
64 #include <media/cx2341x.h>
66 /* #define HAVE_XC3028 1 */
68 #include <media/ivtv.h>
70 #define IVTV_ENCODER_OFFSET 0x00000000
71 #define IVTV_ENCODER_SIZE 0x00800000 /* Last half isn't needed 0x01000000 */
73 #define IVTV_DECODER_OFFSET 0x01000000
74 #define IVTV_DECODER_SIZE 0x00800000 /* Last half isn't needed 0x01000000 */
76 #define IVTV_REG_OFFSET 0x02000000
77 #define IVTV_REG_SIZE 0x00010000
79 /* Buffers on hardware offsets */
80 #define IVTV_YUV_BUFFER_OFFSET 0x001a8600 /* First YUV Buffer */
81 #define IVTV_YUV_BUFFER_OFFSET_1 0x00240400 /* Second YUV Buffer */
82 #define IVTV_YUV_BUFFER_OFFSET_2 0x002d8200 /* Third YUV Buffer */
83 #define IVTV_YUV_BUFFER_OFFSET_3 0x00370000 /* Fourth YUV Buffer */
84 #define IVTV_YUV_BUFFER_UV_OFFSET 0x65400 /* Offset to UV Buffer */
86 /* Offset to filter table in firmware */
87 #define IVTV_YUV_HORIZONTAL_FILTER_OFFSET 0x025d8
88 #define IVTV_YUV_VERTICAL_FILTER_OFFSET 0x03358
90 extern const u32 yuv_offset[4];
92 /* Maximum ivtv driver instances. Some people have a huge number of
93 capture cards, so set this to a high value. */
94 #define IVTV_MAX_CARDS 32
97 #define IVTV_CARD_PVR_250 0 /* WinTV PVR 250 */
98 #define IVTV_CARD_PVR_350 1 /* encoder, decoder, tv-out */
99 #define IVTV_CARD_PVR_150 2 /* WinTV PVR 150 and PVR 500 (really just two
100 PVR150s on one PCI board) */
101 #define IVTV_CARD_M179 3 /* AVerMedia M179 (encoder only) */
102 #define IVTV_CARD_MPG600 4 /* Kuroutoshikou ITVC16-STVLP/YUAN MPG600, encoder only */
103 #define IVTV_CARD_MPG160 5 /* Kuroutoshikou ITVC15-STVLP/YUAN MPG160
104 cx23415 based, but does not have tv-out */
105 #define IVTV_CARD_PG600 6 /* YUAN PG600/DIAMONDMM PVR-550 based on the CX Falcon 2 */
106 #define IVTV_CARD_AVC2410 7 /* Adaptec AVC-2410 */
107 #define IVTV_CARD_AVC2010 8 /* Adaptec AVD-2010 (No Tuner) */
108 #define IVTV_CARD_TG5000TV 9 /* NAGASE TRANSGEAR 5000TV, encoder only */
109 #define IVTV_CARD_VA2000MAX_SNT6 10 /* VA2000MAX-STN6 */
110 #define IVTV_CARD_CX23416GYC 11 /* Kuroutoshikou CX23416GYC-STVLP (Yuan MPG600GR OEM) */
111 #define IVTV_CARD_GV_MVPRX 12 /* I/O Data GV-MVP/RX, RX2, RX2W */
112 #define IVTV_CARD_GV_MVPRX2E 13 /* I/O Data GV-MVP/RX2E */
113 #define IVTV_CARD_GOTVIEW_PCI_DVD 14 /* GotView PCI DVD */
114 #define IVTV_CARD_GOTVIEW_PCI_DVD2 15 /* GotView PCI DVD2 */
115 #define IVTV_CARD_YUAN_MPC622 16 /* Yuan MPC622 miniPCI */
116 #define IVTV_CARD_DCTMTVP1 17 /* DIGITAL COWBOY DCT-MTVP1 */
118 #define IVTV_CARD_PG600V2 18 /* Yuan PG600V2/GotView PCI DVD Lite/Club3D ZAP-TV1x01 */
119 #define IVTV_CARD_LAST 18
121 #define IVTV_CARD_LAST 17
124 /* Variants of existing cards but with the same PCI IDs. The driver
125 detects these based on other device information.
126 These cards must always come last.
127 New cards must be inserted above, and the indices of the cards below
128 must be adjusted accordingly. */
130 /* PVR-350 V1 (uses saa7114) */
131 #define IVTV_CARD_PVR_350_V1 (IVTV_CARD_LAST+1)
132 /* 2 variants of Kuroutoshikou CX23416GYC-STVLP (Yuan MPG600GR OEM) */
133 #define IVTV_CARD_CX23416GYC_NOGR (IVTV_CARD_LAST+2)
134 #define IVTV_CARD_CX23416GYC_NOGRYCS (IVTV_CARD_LAST+3)
136 #define IVTV_ENC_STREAM_TYPE_MPG 0
137 #define IVTV_ENC_STREAM_TYPE_YUV 1
138 #define IVTV_ENC_STREAM_TYPE_VBI 2
139 #define IVTV_ENC_STREAM_TYPE_PCM 3
140 #define IVTV_ENC_STREAM_TYPE_RAD 4
141 #define IVTV_DEC_STREAM_TYPE_MPG 5
142 #define IVTV_DEC_STREAM_TYPE_VBI 6
143 #define IVTV_DEC_STREAM_TYPE_VOUT 7
144 #define IVTV_DEC_STREAM_TYPE_YUV 8
145 #define IVTV_MAX_STREAMS 9
147 #define IVTV_V4L2_DEC_MPG_OFFSET 16 /* offset from 0 to register decoder mpg v4l2 minors on */
148 #define IVTV_V4L2_ENC_PCM_OFFSET 24 /* offset from 0 to register pcm v4l2 minors on */
149 #define IVTV_V4L2_ENC_YUV_OFFSET 32 /* offset from 0 to register yuv v4l2 minors on */
150 #define IVTV_V4L2_DEC_YUV_OFFSET 48 /* offset from 0 to register decoder yuv v4l2 minors on */
151 #define IVTV_V4L2_DEC_VBI_OFFSET 8 /* offset from 0 to register decoder vbi input v4l2 minors on */
152 #define IVTV_V4L2_DEC_VOUT_OFFSET 16 /* offset from 0 to register vbi output v4l2 minors on */
154 #define IVTV_ENC_MEM_START 0x00000000
155 #define IVTV_DEC_MEM_START 0x01000000
157 /* system vendor and device IDs */
158 #define PCI_VENDOR_ID_ICOMP 0x4444
159 #define PCI_DEVICE_ID_IVTV15 0x0803
160 #define PCI_DEVICE_ID_IVTV16 0x0016
162 /* subsystem vendor ID */
163 #define IVTV_PCI_ID_HAUPPAUGE 0x0070
164 #define IVTV_PCI_ID_HAUPPAUGE_ALT1 0x0270
165 #define IVTV_PCI_ID_HAUPPAUGE_ALT2 0x4070
166 #define IVTV_PCI_ID_ADAPTEC 0x9005
167 #define IVTV_PCI_ID_AVERMEDIA 0x1461
168 #define IVTV_PCI_ID_YUAN1 0x12ab
169 #define IVTV_PCI_ID_YUAN2 0xff01
170 #define IVTV_PCI_ID_YUAN3 0xffab
171 #define IVTV_PCI_ID_YUAN4 0xfbab
172 #define IVTV_PCI_ID_DIAMONDMM 0xff92
173 #define IVTV_PCI_ID_IODATA 0x10fc
174 #define IVTV_PCI_ID_MELCO 0x1154
175 #define IVTV_PCI_ID_GOTVIEW1 0xffac
176 #define IVTV_PCI_ID_GOTVIEW2 0xffad
178 /* Decoder Buffer hardware size on Chip */
179 #define IVTV_DEC_MAX_BUF 0x00100000 /* max bytes in decoder buffer */
180 #define IVTV_DEC_MIN_BUF 0x00010000 /* min bytes in dec buffer */
182 /* ======================================================================== */
183 /* ========================== START USER SETTABLE DMA VARIABLES =========== */
184 /* ======================================================================== */
186 #define IVTV_DMA_SG_OSD_ENT (2883584/PAGE_SIZE) /* sg entities */
188 /* DMA Buffers, Default size in MB allocated */
189 #define IVTV_DEFAULT_ENC_MPG_BUFFERS 4
190 #define IVTV_DEFAULT_ENC_YUV_BUFFERS 2
191 #define IVTV_DEFAULT_ENC_VBI_BUFFERS 1
192 #define IVTV_DEFAULT_ENC_PCM_BUFFERS 1
193 #define IVTV_DEFAULT_DEC_MPG_BUFFERS 1
194 #define IVTV_DEFAULT_DEC_YUV_BUFFERS 1
195 #define IVTV_DEFAULT_DEC_VBI_BUFFERS 1
197 /* ======================================================================== */
198 /* ========================== END USER SETTABLE DMA VARIABLES ============= */
199 /* ======================================================================== */
201 /* Decoder Status Register */
202 #define IVTV_DMA_ERR_LIST 0x00000010
203 #define IVTV_DMA_ERR_WRITE 0x00000008
204 #define IVTV_DMA_ERR_READ 0x00000004
205 #define IVTV_DMA_SUCCESS_WRITE 0x00000002
206 #define IVTV_DMA_SUCCESS_READ 0x00000001
207 #define IVTV_DMA_READ_ERR (IVTV_DMA_ERR_LIST | IVTV_DMA_ERR_READ)
208 #define IVTV_DMA_WRITE_ERR (IVTV_DMA_ERR_LIST | IVTV_DMA_ERR_WRITE)
209 #define IVTV_DMA_ERR (IVTV_DMA_ERR_LIST | IVTV_DMA_ERR_WRITE | IVTV_DMA_ERR_READ)
212 #define IVTV_REG_DMAXFER (0x0000)
213 #define IVTV_REG_DMASTATUS (0x0004)
214 #define IVTV_REG_DECDMAADDR (0x0008)
215 #define IVTV_REG_ENCDMAADDR (0x000c)
216 #define IVTV_REG_DMACONTROL (0x0010)
217 #define IVTV_REG_IRQSTATUS (0x0040)
218 #define IVTV_REG_IRQMASK (0x0048)
220 /* Setup Registers */
221 #define IVTV_REG_ENC_SDRAM_REFRESH (0x07F8)
222 #define IVTV_REG_ENC_SDRAM_PRECHARGE (0x07FC)
223 #define IVTV_REG_DEC_SDRAM_REFRESH (0x08F8)
224 #define IVTV_REG_DEC_SDRAM_PRECHARGE (0x08FC)
225 #define IVTV_REG_VDM (0x2800)
226 #define IVTV_REG_AO (0x2D00)
227 #define IVTV_REG_BYTEFLUSH (0x2D24)
228 #define IVTV_REG_SPU (0x9050)
229 #define IVTV_REG_HW_BLOCKS (0x9054)
230 #define IVTV_REG_VPU (0x9058)
231 #define IVTV_REG_APU (0xA064)
233 #define IVTV_IRQ_ENC_START_CAP (0x1 << 31)
234 #define IVTV_IRQ_ENC_EOS (0x1 << 30)
235 #define IVTV_IRQ_ENC_VBI_CAP (0x1 << 29)
236 #define IVTV_IRQ_ENC_VIM_RST (0x1 << 28)
237 #define IVTV_IRQ_ENC_DMA_COMPLETE (0x1 << 27)
238 #define IVTV_IRQ_ENC_PIO_COMPLETE (0x1 << 25)
239 #define IVTV_IRQ_DEC_AUD_MODE_CHG (0x1 << 24)
240 #define IVTV_IRQ_DEC_DATA_REQ (0x1 << 22)
241 #define IVTV_IRQ_DEC_DMA_COMPLETE (0x1 << 20)
242 #define IVTV_IRQ_DEC_VBI_RE_INSERT (0x1 << 19)
243 #define IVTV_IRQ_DMA_ERR (0x1 << 18)
244 #define IVTV_IRQ_DMA_WRITE (0x1 << 17)
245 #define IVTV_IRQ_DMA_READ (0x1 << 16)
246 #define IVTV_IRQ_DEC_VSYNC (0x1 << 10)
249 #define IVTV_IRQ_MASK_INIT (IVTV_IRQ_DMA_ERR|IVTV_IRQ_ENC_DMA_COMPLETE|\
250 IVTV_IRQ_DMA_READ|IVTV_IRQ_ENC_PIO_COMPLETE)
252 #define IVTV_IRQ_MASK_CAPTURE (IVTV_IRQ_ENC_START_CAP | IVTV_IRQ_ENC_EOS)
253 #define IVTV_IRQ_MASK_DECODE (IVTV_IRQ_DEC_DATA_REQ|IVTV_IRQ_DEC_AUD_MODE_CHG)
256 #define I2C_CLIENTS_MAX 16
260 #define IVTV_DBGFLG_WARN (1 << 0)
261 #define IVTV_DBGFLG_INFO (1 << 1)
262 #define IVTV_DBGFLG_API (1 << 2)
263 #define IVTV_DBGFLG_DMA (1 << 3)
264 #define IVTV_DBGFLG_IOCTL (1 << 4)
265 #define IVTV_DBGFLG_I2C (1 << 5)
266 #define IVTV_DBGFLG_IRQ (1 << 6)
267 #define IVTV_DBGFLG_DEC (1 << 7)
268 #define IVTV_DBGFLG_YUV (1 << 8)
269 /* Flag to turn on high volume debugging */
270 #define IVTV_DBGFLG_HIGHVOL (1 << 9)
272 /* NOTE: extra space before comma in 'itv->num , ## args' is required for
273 gcc-2.95, otherwise it won't compile. */
274 #define IVTV_DEBUG(x, type, fmt, args...) \
276 if ((x) & ivtv_debug) \
277 printk(KERN_INFO "ivtv%d " type ": " fmt, itv->num , ## args); \
279 #define IVTV_DEBUG_WARN(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_WARN, "warning", fmt , ## args)
280 #define IVTV_DEBUG_INFO(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_INFO, "info",fmt , ## args)
281 #define IVTV_DEBUG_API(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_API, "api", fmt , ## args)
282 #define IVTV_DEBUG_DMA(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_DMA, "dma", fmt , ## args)
283 #define IVTV_DEBUG_IOCTL(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_IOCTL, "ioctl", fmt , ## args)
284 #define IVTV_DEBUG_I2C(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_I2C, "i2c", fmt , ## args)
285 #define IVTV_DEBUG_IRQ(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_IRQ, "irq", fmt , ## args)
286 #define IVTV_DEBUG_DEC(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_DEC, "dec", fmt , ## args)
287 #define IVTV_DEBUG_YUV(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_YUV, "yuv", fmt , ## args)
289 #define IVTV_DEBUG_HIGH_VOL(x, type, fmt, args...) \
291 if (((x) & ivtv_debug) && (ivtv_debug & IVTV_DBGFLG_HIGHVOL)) \
292 printk(KERN_INFO "ivtv%d " type ": " fmt, itv->num , ## args); \
294 #define IVTV_DEBUG_HI_WARN(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_WARN, "warning", fmt , ## args)
295 #define IVTV_DEBUG_HI_INFO(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_INFO, "info",fmt , ## args)
296 #define IVTV_DEBUG_HI_API(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_API, "api", fmt , ## args)
297 #define IVTV_DEBUG_HI_DMA(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_DMA, "dma", fmt , ## args)
298 #define IVTV_DEBUG_HI_IOCTL(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_IOCTL, "ioctl", fmt , ## args)
299 #define IVTV_DEBUG_HI_I2C(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_I2C, "i2c", fmt , ## args)
300 #define IVTV_DEBUG_HI_IRQ(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_IRQ, "irq", fmt , ## args)
301 #define IVTV_DEBUG_HI_DEC(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_DEC, "dec", fmt , ## args)
302 #define IVTV_DEBUG_HI_YUV(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_YUV, "yuv", fmt , ## args)
304 /* Standard kernel messages */
305 #define IVTV_ERR(fmt, args...) printk(KERN_ERR "ivtv%d: " fmt, itv->num , ## args)
306 #define IVTV_WARN(fmt, args...) printk(KERN_WARNING "ivtv%d: " fmt, itv->num , ## args)
307 #define IVTV_INFO(fmt, args...) printk(KERN_INFO "ivtv%d: " fmt, itv->num , ## args)
309 /* Values for IVTV_API_DEC_PLAYBACK_SPEED mpeg_frame_type_mask parameter: */
310 #define MPEG_FRAME_TYPE_IFRAME 1
311 #define MPEG_FRAME_TYPE_IFRAME_PFRAME 3
312 #define MPEG_FRAME_TYPE_ALL 7
314 /* output modes (cx23415 only) */
318 #define OUT_UDMA_YUV 3
319 #define OUT_PASSTHROUGH 4
321 #define IVTV_MAX_PGM_INDEX (400)
323 extern int ivtv_debug;
326 struct ivtv_options {
327 int megabytes[IVTV_MAX_STREAMS]; /* Size in megabytes of each stream */
328 int cardtype; /* force card type on load */
329 int tuner; /* set tuner on load */
330 int radio; /* enable/disable radio */
331 int newi2c; /* New I2C algorithm */
334 #define IVTV_MBOX_DMA_START 6
335 #define IVTV_MBOX_DMA_END 8
336 #define IVTV_MBOX_DMA 9
337 #define IVTV_MBOX_FIELD_DISPLAYED 8
339 /* ivtv-specific mailbox template */
340 struct ivtv_mailbox {
345 u32 data[CX2341X_MBOX_MAX_DATA];
348 struct ivtv_api_cache {
349 unsigned long last_jiffies; /* when last command was issued */
350 u32 data[CX2341X_MBOX_MAX_DATA]; /* last sent api data */
353 struct ivtv_mailbox_data {
354 volatile struct ivtv_mailbox __iomem *mbox;
355 /* Bits 0-2 are for the encoder mailboxes, 0-1 are for the decoder mailboxes.
356 If the bit is set, then the corresponding mailbox is in use by the driver. */
361 /* per-buffer bit flags */
362 #define IVTV_F_B_NEED_BUF_SWAP 0 /* this buffer should be byte swapped */
364 /* per-stream, s_flags */
365 #define IVTV_F_S_DMA_PENDING 0 /* this stream has pending DMA */
366 #define IVTV_F_S_DMA_HAS_VBI 1 /* the current DMA request also requests VBI data */
367 #define IVTV_F_S_NEEDS_DATA 2 /* this decoding stream needs more data */
369 #define IVTV_F_S_CLAIMED 3 /* this stream is claimed */
370 #define IVTV_F_S_STREAMING 4 /* the fw is decoding/encoding this stream */
371 #define IVTV_F_S_INTERNAL_USE 5 /* this stream is used internally (sliced VBI processing) */
372 #define IVTV_F_S_PASSTHROUGH 6 /* this stream is in passthrough mode */
373 #define IVTV_F_S_STREAMOFF 7 /* signal end of stream EOS */
374 #define IVTV_F_S_APPL_IO 8 /* this stream is used read/written by an application */
376 #define IVTV_F_S_PIO_PENDING 9 /* this stream has pending PIO */
377 #define IVTV_F_S_PIO_HAS_VBI 1 /* the current PIO request also requests VBI data */
379 /* per-ivtv, i_flags */
380 #define IVTV_F_I_DMA 0 /* DMA in progress */
381 #define IVTV_F_I_UDMA 1 /* UDMA in progress */
382 #define IVTV_F_I_UDMA_PENDING 2 /* UDMA pending */
383 #define IVTV_F_I_SPEED_CHANGE 3 /* A speed change is in progress */
384 #define IVTV_F_I_EOS 4 /* End of encoder stream reached */
385 #define IVTV_F_I_RADIO_USER 5 /* The radio tuner is selected */
386 #define IVTV_F_I_DIG_RST 6 /* Reset digitizer */
387 #define IVTV_F_I_DEC_YUV 7 /* YUV instead of MPG is being decoded */
388 #define IVTV_F_I_ENC_VBI 8 /* VBI DMA */
389 #define IVTV_F_I_UPDATE_CC 9 /* CC should be updated */
390 #define IVTV_F_I_UPDATE_WSS 10 /* WSS should be updated */
391 #define IVTV_F_I_UPDATE_VPS 11 /* VPS should be updated */
392 #define IVTV_F_I_DECODING_YUV 12 /* this stream is YUV frame decoding */
393 #define IVTV_F_I_ENC_PAUSED 13 /* the encoder is paused */
394 #define IVTV_F_I_VALID_DEC_TIMINGS 14 /* last_dec_timing is valid */
395 #define IVTV_F_I_HAVE_WORK 15 /* Used in the interrupt handler: there is work to be done */
396 #define IVTV_F_I_WORK_HANDLER_VBI 16 /* there is work to be done for VBI */
397 #define IVTV_F_I_WORK_HANDLER_YUV 17 /* there is work to be done for YUV */
398 #define IVTV_F_I_WORK_HANDLER_PIO 18 /* there is work to be done for PIO */
399 #define IVTV_F_I_PIO 19 /* PIO in progress */
400 #define IVTV_F_I_DEC_PAUSED 20 /* the decoder is paused */
402 /* Event notifications */
403 #define IVTV_F_I_EV_DEC_STOPPED 28 /* decoder stopped event */
404 #define IVTV_F_I_EV_VSYNC 29 /* VSYNC event */
405 #define IVTV_F_I_EV_VSYNC_FIELD 30 /* VSYNC event field (0 = first, 1 = second field) */
406 #define IVTV_F_I_EV_VSYNC_ENABLED 31 /* VSYNC event enabled */
408 /* Scatter-Gather array element, used in DMA transfers */
409 struct ivtv_SG_element {
415 struct ivtv_user_dma {
418 struct page *map[IVTV_DMA_SG_OSD_ENT];
420 /* Base Dev SG Array for cx23415/6 */
421 struct ivtv_SG_element SGarray[IVTV_DMA_SG_OSD_ENT];
422 dma_addr_t SG_handle;
425 /* SG List of Buffers */
426 struct scatterlist SGlist[IVTV_DMA_SG_OSD_ENT];
429 struct ivtv_dma_page_info {
439 struct list_head list;
440 dma_addr_t dma_handle;
441 unsigned long b_flags;
449 struct list_head list;
455 struct ivtv; /* forward reference */
458 /* These first four fields are always set, even if the stream
459 is not actually created. */
460 struct video_device *v4l2dev; /* NULL when stream not created */
461 struct ivtv *itv; /* for ease of use */
462 const char *name; /* name of the stream */
463 int type; /* stream type */
466 spinlock_t qlock; /* locks access to the queues */
467 unsigned long s_flags; /* status flags, see above */
468 int dma; /* can be PCI_DMA_TODEVICE,
469 PCI_DMA_FROMDEVICE or
476 wait_queue_head_t waitq;
485 struct ivtv_queue q_free; /* free buffers */
486 struct ivtv_queue q_full; /* full buffers */
487 struct ivtv_queue q_io; /* waiting for I/O */
488 struct ivtv_queue q_dma; /* waiting for DMA */
489 struct ivtv_queue q_predma; /* waiting for DMA */
491 /* Base Dev SG Array for cx23415/6 */
492 struct ivtv_SG_element *SGarray;
493 struct ivtv_SG_element *PIOarray;
494 dma_addr_t SG_handle;
497 /* SG List of Buffers */
498 struct scatterlist *SGlist;
501 struct ivtv_open_id {
504 enum v4l2_priority prio;
508 #define IVTV_YUV_UPDATE_HORIZONTAL 0x01
509 #define IVTV_YUV_UPDATE_VERTICAL 0x02
511 struct yuv_frame_info
534 #define IVTV_YUV_MODE_INTERLACED 0x00
535 #define IVTV_YUV_MODE_PROGRESSIVE 0x01
536 #define IVTV_YUV_MODE_AUTO 0x02
537 #define IVTV_YUV_MODE_MASK 0x03
539 #define IVTV_YUV_SYNC_EVEN 0x00
540 #define IVTV_YUV_SYNC_ODD 0x04
541 #define IVTV_YUV_SYNC_MASK 0x04
543 struct yuv_playback_info
603 int frame_interlaced;
604 int frame_interlaced_last;
610 atomic_t next_dma_frame;
611 atomic_t next_fill_frame;
613 u32 yuv_forced_update;
615 struct yuv_frame_info new_frame_info[4];
616 struct yuv_frame_info old_frame_info;
617 struct yuv_frame_info old_frame_info_args;
620 dma_addr_t blanking_dmaptr;
623 #define IVTV_VBI_FRAMES 32
628 u32 enc_start, enc_size;
633 u8 cc_data_even[256];
641 u32 raw_decoder_line_size;
642 u8 raw_decoder_sav_odd_field;
643 u8 raw_decoder_sav_even_field;
644 u32 sliced_decoder_line_size;
645 u8 sliced_decoder_sav_odd_field;
646 u8 sliced_decoder_sav_even_field;
647 struct v4l2_format in;
648 /* convenience pointer to sliced struct in vbi_in union */
649 struct v4l2_sliced_vbi_format *sliced_in;
653 /* Buffer for the maximum of 2 * 18 * packet_size sliced VBI lines.
654 One for /dev/vbi0 and one for /dev/vbi8 */
655 struct v4l2_sliced_vbi_data sliced_data[36];
656 struct v4l2_sliced_vbi_data sliced_dec_data[36];
658 /* Buffer for VBI data inserted into MPEG stream.
659 The first byte is a dummy byte that's never used.
660 The next 16 bytes contain the MPEG header for the VBI data,
661 the remainder is the actual VBI data.
662 The max size accepted by the MPEG VBI reinsertion turns out
663 to be 1552 bytes, which happens to be 4 + (1 + 42) * (2 * 18) bytes,
664 where 4 is a four byte header, 42 is the max sliced VBI payload, 1 is
665 a single line header byte and 2 * 18 is the number of VBI lines per frame.
667 However, it seems that the data must be 1K aligned, so we have to
668 pad the data until the 1 or 2 K boundary.
670 This pointer array will allocate 2049 bytes to store each VBI frame. */
671 u8 *sliced_mpeg_data[IVTV_VBI_FRAMES];
672 u32 sliced_mpeg_size[IVTV_VBI_FRAMES];
673 struct ivtv_buffer sliced_mpeg_buf;
681 /* forward declaration of struct defined in ivtv-cards.h */
684 /* Struct to hold info about ivtv cards */
686 int num; /* board number, -1 during init! */
687 char name[8]; /* board name for printk and interrupts (e.g. 'ivtv0') */
688 struct pci_dev *dev; /* PCI device */
689 const struct ivtv_card *card; /* card information */
690 const char *card_name; /* full name of the card */
691 u8 has_cx23415; /* 1 if it is a cx23415 based card, 0 for cx23416 */
696 u8 pvr150_workaround; /* 1 if the cx25840 needs to workaround a PVR150 bug */
697 u8 nof_inputs; /* number of video inputs */
698 u8 nof_audio_inputs; /* number of audio inputs */
699 u32 v4l2_cap; /* V4L2 capabilities of card */
700 u32 hw_flags; /* Hardware description of the board */
702 /* controlling Video decoder function */
703 int (*video_dec_func)(struct ivtv *, unsigned int, void *);
705 struct ivtv_options options; /* User options */
706 int stream_buf_size[IVTV_MAX_STREAMS]; /* Stream buffer size */
707 struct ivtv_stream streams[IVTV_MAX_STREAMS]; /* Stream data */
710 unsigned long i_flags; /* global ivtv flags */
711 atomic_t capturing; /* count number of active capture streams */
712 atomic_t decoding; /* count number of active decoding streams */
713 u32 irq_rr_idx; /* Round-robin stream index */
714 int cur_dma_stream; /* index of stream doing DMA */
715 int cur_pio_stream; /* index of stream doing PIO */
716 u32 dma_data_req_offset;
717 u32 dma_data_req_size;
718 int output_mode; /* NONE, MPG, YUV, UDMA YUV, passthrough */
719 spinlock_t lock; /* lock access to this struct */
720 int search_pack_header;
722 spinlock_t dma_reg_lock; /* lock access to DMA engine registers */
723 struct mutex serialize_lock; /* lock used to serialize starting streams */
725 /* User based DMA for OSD */
726 struct ivtv_user_dma udma;
728 int open_id; /* incremented each time an open occurs, used as unique ID.
729 starts at 1, so 0 can be used as uninitialized value
730 in the stream->id. */
735 struct v4l2_prio_state prio;
736 struct workqueue_struct *irq_work_queues;
737 struct work_struct irq_work_queue;
738 struct timer_list dma_timer; /* Timer used to catch unfinished DMAs */
742 struct ivtv_mailbox_data enc_mbox;
743 struct ivtv_mailbox_data dec_mbox;
744 struct ivtv_api_cache api_cache[256]; /* Cached API Commands */
747 volatile void __iomem *enc_mem, *dec_mem, *reg_mem;
751 u32 pgm_info_write_idx;
752 u32 pgm_info_read_idx;
753 struct v4l2_enc_idx_entry pgm_info[IVTV_MAX_PGM_INDEX];
755 u64 mpg_data_received;
756 u64 vbi_data_inserted;
758 wait_queue_head_t cap_w;
759 /* when the next decoder event arrives this queue is woken up */
760 wait_queue_head_t event_waitq;
761 /* when the next decoder vsync arrives this queue is woken up */
762 wait_queue_head_t vsync_waitq;
763 /* when the current DMA is finished this queue is woken up */
764 wait_queue_head_t dma_waitq;
767 unsigned long osd_video_pbase;
768 int osd_global_alpha_state; /* 0=off : 1=on */
769 int osd_local_alpha_state; /* 0=off : 1=on */
770 int osd_color_key_state; /* 0=off : 1=on */
771 u8 osd_global_alpha; /* Current global alpha */
772 u32 osd_color_key; /* Current color key */
773 u32 osd_pixelformat; /* Current pixel format */
774 struct v4l2_rect osd_rect; /* Current OSD position and size */
775 struct v4l2_rect main_rect; /* Current Main window position and size */
777 u32 last_dec_timing[3]; /* Store last retrieved pts/scr/frame values */
780 struct i2c_adapter i2c_adap;
781 struct i2c_algo_bit_data i2c_algo;
782 struct i2c_client i2c_client;
783 struct mutex i2c_bus_lock;
785 struct i2c_client *i2c_clients[I2C_CLIENTS_MAX];
787 /* v4l2 and User settings */
790 struct cx2341x_mpeg_params params;
796 v4l2_std_id tuner_std; /* The norm of the tuner (fixed) */
797 u8 audio_stereo_mode;
798 u8 audio_bilingual_mode;
801 unsigned long dualwatch_jiffies;
802 u16 dualwatch_stereo_mode;
805 int digitizer; /* 0x00EF = saa7114 0x00FO = saa7115 0x0106 = mic */
809 struct yuv_playback_info yuv_info;
810 struct osd_info *osd_info;
814 extern struct ivtv *ivtv_cards[];
815 extern int ivtv_cards_active;
816 extern int ivtv_first_minor;
817 extern spinlock_t ivtv_cards_lock;
819 /*==============Prototypes==================*/
822 void ivtv_set_irq_mask(struct ivtv *itv, u32 mask);
823 void ivtv_clear_irq_mask(struct ivtv *itv, u32 mask);
825 /* try to set output mode, return current mode. */
826 int ivtv_set_output_mode(struct ivtv *itv, int mode);
828 /* return current output stream based on current mode */
829 struct ivtv_stream *ivtv_get_output_stream(struct ivtv *itv);
831 /* Return non-zero if a signal is pending */
832 int ivtv_msleep_timeout(unsigned int msecs, int intr);
834 /* Wait on queue, returns -EINTR if interrupted */
835 int ivtv_waitq(wait_queue_head_t *waitq);
837 /* Read Hauppauge eeprom */
838 struct tveeprom; /* forward reference */
839 void ivtv_read_eeprom(struct ivtv *itv, struct tveeprom *tv);
841 /* This is a PCI post thing, where if the pci register is not read, then
842 the write doesn't always take effect right away. By reading back the
843 register any pending PCI writes will be performed (in order), and so
844 you can be sure that the writes are guaranteed to be done.
846 Rarely needed, only in some timing sensitive cases.
847 Apparently if this is not done some motherboards seem
848 to kill the firmware and get into the broken state until computer is
850 #define write_sync(val, reg) \
851 do { writel(val, reg); readl(reg); } while (0)
853 #define read_reg(reg) readl(itv->reg_mem + (reg))
854 #define write_reg(val, reg) writel(val, itv->reg_mem + (reg))
855 #define write_reg_sync(val, reg) \
856 do { write_reg(val, reg); read_reg(reg); } while (0)
858 #define read_enc(addr) readl(itv->enc_mem + (u32)(addr))
859 #define write_enc(val, addr) writel(val, itv->enc_mem + (u32)(addr))
860 #define write_enc_sync(val, addr) \
861 do { write_enc(val, addr); read_enc(addr); } while (0)
863 #define read_dec(addr) readl(itv->dec_mem + (u32)(addr))
864 #define write_dec(val, addr) writel(val, itv->dec_mem + (u32)(addr))
865 #define write_dec_sync(val, addr) \
866 do { write_dec(val, addr); read_dec(addr); } while (0)
868 #endif /* IVTV_DRIVER_H */