2 * V4L2 Driver for PXA camera host
4 * Copyright (C) 2006, Sascha Hauer, Pengutronix
5 * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
13 #include <linux/init.h>
14 #include <linux/module.h>
16 #include <linux/delay.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/errno.h>
20 #include <linux/interrupt.h>
21 #include <linux/kernel.h>
23 #include <linux/moduleparam.h>
24 #include <linux/time.h>
25 #include <linux/version.h>
26 #include <linux/device.h>
27 #include <linux/platform_device.h>
28 #include <linux/mutex.h>
29 #include <linux/clk.h>
31 #include <media/v4l2-common.h>
32 #include <media/v4l2-dev.h>
33 #include <media/soc_camera.h>
35 #include <linux/videodev2.h>
38 #include <asm/arch/pxa-regs.h>
39 #include <asm/arch/camera.h>
41 #define PXA_CAM_VERSION_CODE KERNEL_VERSION(0, 0, 5)
42 #define PXA_CAM_DRV_NAME "pxa27x-camera"
44 #define CICR0_SIM_MP (0 << 24)
45 #define CICR0_SIM_SP (1 << 24)
46 #define CICR0_SIM_MS (2 << 24)
47 #define CICR0_SIM_EP (3 << 24)
48 #define CICR0_SIM_ES (4 << 24)
50 #define CICR1_DW_VAL(x) ((x) & CICR1_DW) /* Data bus width */
51 #define CICR1_PPL_VAL(x) (((x) << 15) & CICR1_PPL) /* Pixels per line */
53 #define CICR2_BLW_VAL(x) (((x) << 24) & CICR2_BLW) /* Beginning-of-line pixel clock wait count */
54 #define CICR2_ELW_VAL(x) (((x) << 16) & CICR2_ELW) /* End-of-line pixel clock wait count */
55 #define CICR2_HSW_VAL(x) (((x) << 10) & CICR2_HSW) /* Horizontal sync pulse width */
56 #define CICR2_BFPW_VAL(x) (((x) << 3) & CICR2_BFPW) /* Beginning-of-frame pixel clock wait count */
57 #define CICR2_FSW_VAL(x) (((x) << 0) & CICR2_FSW) /* Frame stabilization wait count */
59 #define CICR3_BFW_VAL(x) (((x) << 24) & CICR3_BFW) /* Beginning-of-frame line clock wait count */
60 #define CICR3_EFW_VAL(x) (((x) << 16) & CICR3_EFW) /* End-of-frame line clock wait count */
61 #define CICR3_VSW_VAL(x) (((x) << 11) & CICR3_VSW) /* Vertical sync pulse width */
62 #define CICR3_LPF_VAL(x) (((x) << 0) & CICR3_LPF) /* Lines per frame */
64 #define CICR0_IRQ_MASK (CICR0_TOM | CICR0_RDAVM | CICR0_FEM | CICR0_EOLM | \
65 CICR0_PERRM | CICR0_QDM | CICR0_CDM | CICR0_SOFM | \
66 CICR0_EOFM | CICR0_FOM)
68 static DEFINE_MUTEX(camera_lock);
74 /* buffer for one video frame */
76 /* common v4l buffer stuff -- must be first */
77 struct videobuf_buffer vb;
79 const struct soc_camera_data_format *fmt;
81 /* our descriptor list needed for the PXA DMA engine */
83 struct pxa_dma_desc *sg_cpu;
88 struct pxa_framebuffer_queue {
89 dma_addr_t sg_last_dma;
90 struct pxa_dma_desc *sg_last_cpu;
93 struct pxa_camera_dev {
95 /* PXA27x is only supposed to handle one camera on its Quick Capture
96 * interface. If anyone ever builds hardware to enable more than
97 * one camera, they will have to modify this driver too */
98 struct soc_camera_device *icd;
103 unsigned int dma_chan_y;
105 struct pxacamera_platform_data *pdata;
106 struct resource *res;
107 unsigned long platform_flags;
108 unsigned long platform_mclk_10khz;
110 struct list_head capture;
114 struct pxa_buffer *active;
117 static const char *pxa_cam_driver_description = "PXA_Camera";
119 static unsigned int vid_limit = 16; /* Video memory limit, in Mb */
122 * Videobuf operations
124 static int pxa_videobuf_setup(struct videobuf_queue *vq, unsigned int *count,
127 struct soc_camera_device *icd = vq->priv_data;
129 dev_dbg(&icd->dev, "count=%d, size=%d\n", *count, *size);
131 *size = icd->width * icd->height * ((icd->current_fmt->depth + 7) >> 3);
135 while (*size * *count > vid_limit * 1024 * 1024)
141 static void free_buffer(struct videobuf_queue *vq, struct pxa_buffer *buf)
143 struct soc_camera_device *icd = vq->priv_data;
144 struct soc_camera_host *ici =
145 to_soc_camera_host(icd->dev.parent);
146 struct pxa_camera_dev *pcdev = ici->priv;
147 struct videobuf_dmabuf *dma = videobuf_to_dma(&buf->vb);
149 BUG_ON(in_interrupt());
151 dev_dbg(&icd->dev, "%s (vb=0x%p) 0x%08lx %d\n", __FUNCTION__,
152 &buf->vb, buf->vb.baddr, buf->vb.bsize);
154 /* This waits until this buffer is out of danger, i.e., until it is no
155 * longer in STATE_QUEUED or STATE_ACTIVE */
156 videobuf_waiton(&buf->vb, 0, 0);
157 videobuf_dma_unmap(vq, dma);
158 videobuf_dma_free(dma);
161 dma_free_coherent(pcdev->dev, buf->sg_size, buf->sg_cpu,
165 buf->vb.state = VIDEOBUF_NEEDS_INIT;
168 static int pxa_videobuf_prepare(struct videobuf_queue *vq,
169 struct videobuf_buffer *vb, enum v4l2_field field)
171 struct soc_camera_device *icd = vq->priv_data;
172 struct soc_camera_host *ici =
173 to_soc_camera_host(icd->dev.parent);
174 struct pxa_camera_dev *pcdev = ici->priv;
175 struct pxa_buffer *buf = container_of(vb, struct pxa_buffer, vb);
178 dev_dbg(&icd->dev, "%s (vb=0x%p) 0x%08lx %d\n", __FUNCTION__,
179 vb, vb->baddr, vb->bsize);
181 /* Added list head initialization on alloc */
182 WARN_ON(!list_empty(&vb->queue));
185 /* This can be useful if you want to see if we actually fill
186 * the buffer with something */
187 memset((void *)vb->baddr, 0xaa, vb->bsize);
190 BUG_ON(NULL == icd->current_fmt);
192 /* I think, in buf_prepare you only have to protect global data,
193 * the actual buffer is yours */
196 if (buf->fmt != icd->current_fmt ||
197 vb->width != icd->width ||
198 vb->height != icd->height ||
199 vb->field != field) {
200 buf->fmt = icd->current_fmt;
201 vb->width = icd->width;
202 vb->height = icd->height;
204 vb->state = VIDEOBUF_NEEDS_INIT;
207 vb->size = vb->width * vb->height * ((buf->fmt->depth + 7) >> 3);
208 if (0 != vb->baddr && vb->bsize < vb->size) {
213 if (vb->state == VIDEOBUF_NEEDS_INIT) {
214 unsigned int size = vb->size;
215 struct videobuf_dmabuf *dma = videobuf_to_dma(vb);
217 ret = videobuf_iolock(vq, vb, NULL);
222 dma_free_coherent(pcdev->dev, buf->sg_size, buf->sg_cpu,
225 buf->sg_size = (dma->sglen + 1) * sizeof(struct pxa_dma_desc);
226 buf->sg_cpu = dma_alloc_coherent(pcdev->dev, buf->sg_size,
227 &buf->sg_dma, GFP_KERNEL);
233 dev_dbg(&icd->dev, "nents=%d size: %d sg=0x%p\n",
234 dma->sglen, size, dma->sglist);
235 for (i = 0; i < dma->sglen; i++) {
236 struct scatterlist *sg = dma->sglist;
237 unsigned int dma_len = sg_dma_len(&sg[i]), xfer_len;
240 buf->sg_cpu[i].dsadr = pcdev->res->start + 0x28;
241 buf->sg_cpu[i].dtadr = sg_dma_address(&sg[i]);
242 /* PXA270 Developer's Manual 27.4.4.1:
243 * round up to 8 bytes */
244 xfer_len = (min(dma_len, size) + 7) & ~7;
246 dev_err(&icd->dev, "Unaligned buffer: "
247 "dma_len %u, size %u\n", dma_len, size);
248 buf->sg_cpu[i].dcmd = DCMD_FLOWSRC | DCMD_BURST8 |
249 DCMD_INCTRGADDR | xfer_len;
251 buf->sg_cpu[i].ddadr = buf->sg_dma + (i + 1) *
252 sizeof(struct pxa_dma_desc);
254 buf->sg_cpu[dma->sglen - 1].ddadr = DDADR_STOP;
255 buf->sg_cpu[dma->sglen - 1].dcmd |= DCMD_ENDIRQEN;
257 vb->state = VIDEOBUF_PREPARED;
265 free_buffer(vq, buf);
271 static void pxa_videobuf_queue(struct videobuf_queue *vq,
272 struct videobuf_buffer *vb)
274 struct soc_camera_device *icd = vq->priv_data;
275 struct soc_camera_host *ici =
276 to_soc_camera_host(icd->dev.parent);
277 struct pxa_camera_dev *pcdev = ici->priv;
278 struct pxa_buffer *buf = container_of(vb, struct pxa_buffer, vb);
279 struct pxa_buffer *active;
280 struct videobuf_dmabuf *dma = videobuf_to_dma(vb);
281 int nents = dma->sglen;
284 dev_dbg(&icd->dev, "%s (vb=0x%p) 0x%08lx %d\n", __FUNCTION__,
285 vb, vb->baddr, vb->bsize);
286 spin_lock_irqsave(&pcdev->lock, flags);
288 list_add_tail(&vb->queue, &pcdev->capture);
290 vb->state = VIDEOBUF_ACTIVE;
291 active = pcdev->active;
294 CIFR |= CIFR_RESET_F;
295 DDADR(pcdev->dma_chan_y) = buf->sg_dma;
296 DCSR(pcdev->dma_chan_y) = DCSR_RUN;
300 struct videobuf_dmabuf *active_dma =
301 videobuf_to_dma(&active->vb);
302 /* Stop DMA engine */
303 DCSR(pcdev->dma_chan_y) = 0;
305 /* Add the descriptors we just initialized to the currently
308 active->sg_cpu[active_dma->sglen - 1].ddadr = buf->sg_dma;
310 /* Setup a dummy descriptor with the DMA engines current
314 buf->sg_cpu[nents].dsadr = pcdev->res->start + 0x28;
315 buf->sg_cpu[nents].dtadr = DTADR(pcdev->dma_chan_y);
316 buf->sg_cpu[nents].dcmd = DCMD(pcdev->dma_chan_y);
318 if (DDADR(pcdev->dma_chan_y) == DDADR_STOP) {
319 /* The DMA engine is on the last descriptor, set the
320 * next descriptors address to the descriptors
321 * we just initialized
323 buf->sg_cpu[nents].ddadr = buf->sg_dma;
325 buf->sg_cpu[nents].ddadr = DDADR(pcdev->dma_chan_y);
328 /* The next descriptor is the dummy descriptor */
329 DDADR(pcdev->dma_chan_y) = buf->sg_dma + nents *
330 sizeof(struct pxa_dma_desc);
333 if (CISR & CISR_IFO_0) {
334 dev_warn(pcdev->dev, "FIFO overrun\n");
335 DDADR(pcdev->dma_chan_y) = pcdev->active->sg_dma;
338 CIFR |= CIFR_RESET_F;
339 DCSR(pcdev->dma_chan_y) = DCSR_RUN;
343 DCSR(pcdev->dma_chan_y) = DCSR_RUN;
346 spin_unlock_irqrestore(&pcdev->lock, flags);
350 static void pxa_videobuf_release(struct videobuf_queue *vq,
351 struct videobuf_buffer *vb)
353 struct pxa_buffer *buf = container_of(vb, struct pxa_buffer, vb);
355 struct soc_camera_device *icd = vq->priv_data;
357 dev_dbg(&icd->dev, "%s (vb=0x%p) 0x%08lx %d\n", __FUNCTION__,
358 vb, vb->baddr, vb->bsize);
361 case VIDEOBUF_ACTIVE:
362 dev_dbg(&icd->dev, "%s (active)\n", __FUNCTION__);
364 case VIDEOBUF_QUEUED:
365 dev_dbg(&icd->dev, "%s (queued)\n", __FUNCTION__);
367 case VIDEOBUF_PREPARED:
368 dev_dbg(&icd->dev, "%s (prepared)\n", __FUNCTION__);
371 dev_dbg(&icd->dev, "%s (unknown)\n", __FUNCTION__);
376 free_buffer(vq, buf);
379 static void pxa_camera_dma_irq_y(int channel, void *data)
381 struct pxa_camera_dev *pcdev = data;
382 struct pxa_buffer *buf;
385 struct videobuf_buffer *vb;
387 spin_lock_irqsave(&pcdev->lock, flags);
389 status = DCSR(pcdev->dma_chan_y);
390 DCSR(pcdev->dma_chan_y) = status;
392 if (status & DCSR_BUSERR) {
393 dev_err(pcdev->dev, "DMA Bus Error IRQ!\n");
397 if (!(status & DCSR_ENDINTR)) {
398 dev_err(pcdev->dev, "Unknown DMA IRQ source, "
399 "status: 0x%08x\n", status);
403 if (!pcdev->active) {
404 dev_err(pcdev->dev, "DMA End IRQ with no active buffer!\n");
408 vb = &pcdev->active->vb;
409 buf = container_of(vb, struct pxa_buffer, vb);
410 WARN_ON(buf->inwork || list_empty(&vb->queue));
411 dev_dbg(pcdev->dev, "%s (vb=0x%p) 0x%08lx %d\n", __FUNCTION__,
412 vb, vb->baddr, vb->bsize);
414 /* _init is used to debug races, see comment in pxa_camera_reqbufs() */
415 list_del_init(&vb->queue);
416 vb->state = VIDEOBUF_DONE;
417 do_gettimeofday(&vb->ts);
421 if (list_empty(&pcdev->capture)) {
422 pcdev->active = NULL;
423 DCSR(pcdev->dma_chan_y) = 0;
428 pcdev->active = list_entry(pcdev->capture.next, struct pxa_buffer,
432 spin_unlock_irqrestore(&pcdev->lock, flags);
435 static struct videobuf_queue_ops pxa_videobuf_ops = {
436 .buf_setup = pxa_videobuf_setup,
437 .buf_prepare = pxa_videobuf_prepare,
438 .buf_queue = pxa_videobuf_queue,
439 .buf_release = pxa_videobuf_release,
442 static int mclk_get_divisor(struct pxa_camera_dev *pcdev)
444 unsigned int mclk_10khz = pcdev->platform_mclk_10khz;
446 unsigned long lcdclk;
448 lcdclk = clk_get_rate(pcdev->clk) / 10000;
450 /* We verify platform_mclk_10khz != 0, so if anyone breaks it, here
451 * they get a nice Oops */
452 div = (lcdclk + 2 * mclk_10khz - 1) / (2 * mclk_10khz) - 1;
454 dev_dbg(pcdev->dev, "LCD clock %lukHz, target freq %dkHz, "
455 "divisor %lu\n", lcdclk * 10, mclk_10khz * 10, div);
460 static void pxa_camera_activate(struct pxa_camera_dev *pcdev)
462 struct pxacamera_platform_data *pdata = pcdev->pdata;
465 dev_dbg(pcdev->dev, "Registered platform device at %p data %p\n",
468 if (pdata && pdata->init) {
469 dev_dbg(pcdev->dev, "%s: Init gpios\n", __FUNCTION__);
470 pdata->init(pcdev->dev);
473 if (pdata && pdata->power) {
474 dev_dbg(pcdev->dev, "%s: Power on camera\n", __FUNCTION__);
475 pdata->power(pcdev->dev, 1);
478 if (pdata && pdata->reset) {
479 dev_dbg(pcdev->dev, "%s: Releasing camera reset\n",
481 pdata->reset(pcdev->dev, 1);
484 CICR0 = 0x3FF; /* disable all interrupts */
486 if (pcdev->platform_flags & PXA_CAMERA_PCLK_EN)
487 cicr4 |= CICR4_PCLK_EN;
488 if (pcdev->platform_flags & PXA_CAMERA_MCLK_EN)
489 cicr4 |= CICR4_MCLK_EN;
490 if (pcdev->platform_flags & PXA_CAMERA_PCP)
492 if (pcdev->platform_flags & PXA_CAMERA_HSP)
494 if (pcdev->platform_flags & PXA_CAMERA_VSP)
497 CICR4 = mclk_get_divisor(pcdev) | cicr4;
499 clk_enable(pcdev->clk);
502 static void pxa_camera_deactivate(struct pxa_camera_dev *pcdev)
504 struct pxacamera_platform_data *board = pcdev->pdata;
506 clk_disable(pcdev->clk);
508 if (board && board->reset) {
509 dev_dbg(pcdev->dev, "%s: Asserting camera reset\n",
511 board->reset(pcdev->dev, 0);
514 if (board && board->power) {
515 dev_dbg(pcdev->dev, "%s: Power off camera\n", __FUNCTION__);
516 board->power(pcdev->dev, 0);
520 static irqreturn_t pxa_camera_irq(int irq, void *data)
522 struct pxa_camera_dev *pcdev = data;
523 unsigned int status = CISR;
525 dev_dbg(pcdev->dev, "Camera interrupt status 0x%x\n", status);
532 /* The following two functions absolutely depend on the fact, that
533 * there can be only one camera on PXA quick capture interface */
534 static int pxa_camera_add_device(struct soc_camera_device *icd)
536 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
537 struct pxa_camera_dev *pcdev = ici->priv;
540 mutex_lock(&camera_lock);
547 dev_info(&icd->dev, "PXA Camera driver attached to camera %d\n",
550 pxa_camera_activate(pcdev);
551 ret = icd->ops->init(icd);
557 mutex_unlock(&camera_lock);
562 static void pxa_camera_remove_device(struct soc_camera_device *icd)
564 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
565 struct pxa_camera_dev *pcdev = ici->priv;
567 BUG_ON(icd != pcdev->icd);
569 dev_info(&icd->dev, "PXA Camera driver detached from camera %d\n",
572 /* disable capture, disable interrupts */
574 /* Stop DMA engine */
575 DCSR(pcdev->dma_chan_y) = 0;
577 icd->ops->release(icd);
579 pxa_camera_deactivate(pcdev);
584 static int test_platform_param(struct pxa_camera_dev *pcdev,
585 unsigned char buswidth, unsigned long *flags)
588 * Platform specified synchronization and pixel clock polarities are
589 * only a recommendation and are only used during probing. The PXA270
590 * quick capture interface supports both.
592 *flags = (pcdev->platform_flags & PXA_CAMERA_MASTER ?
593 SOCAM_MASTER : SOCAM_SLAVE) |
594 SOCAM_HSYNC_ACTIVE_HIGH |
595 SOCAM_HSYNC_ACTIVE_LOW |
596 SOCAM_VSYNC_ACTIVE_HIGH |
597 SOCAM_VSYNC_ACTIVE_LOW |
598 SOCAM_PCLK_SAMPLE_RISING |
599 SOCAM_PCLK_SAMPLE_FALLING;
601 /* If requested data width is supported by the platform, use it */
604 if (!(pcdev->platform_flags & PXA_CAMERA_DATAWIDTH_10))
606 *flags |= SOCAM_DATAWIDTH_10;
609 if (!(pcdev->platform_flags & PXA_CAMERA_DATAWIDTH_9))
611 *flags |= SOCAM_DATAWIDTH_9;
614 if (!(pcdev->platform_flags & PXA_CAMERA_DATAWIDTH_8))
616 *flags |= SOCAM_DATAWIDTH_8;
622 static int pxa_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt)
624 struct soc_camera_host *ici =
625 to_soc_camera_host(icd->dev.parent);
626 struct pxa_camera_dev *pcdev = ici->priv;
627 unsigned long dw, bpp, bus_flags, camera_flags, common_flags;
628 u32 cicr0, cicr4 = 0;
629 int ret = test_platform_param(pcdev, icd->buswidth, &bus_flags);
634 camera_flags = icd->ops->query_bus_param(icd);
636 common_flags = soc_camera_bus_param_compatible(camera_flags, bus_flags);
640 /* Make choises, based on platform preferences */
641 if ((common_flags & SOCAM_HSYNC_ACTIVE_HIGH) &&
642 (common_flags & SOCAM_HSYNC_ACTIVE_LOW)) {
643 if (pcdev->platform_flags & PXA_CAMERA_HSP)
644 common_flags &= ~SOCAM_HSYNC_ACTIVE_HIGH;
646 common_flags &= ~SOCAM_HSYNC_ACTIVE_LOW;
649 if ((common_flags & SOCAM_VSYNC_ACTIVE_HIGH) &&
650 (common_flags & SOCAM_VSYNC_ACTIVE_LOW)) {
651 if (pcdev->platform_flags & PXA_CAMERA_VSP)
652 common_flags &= ~SOCAM_VSYNC_ACTIVE_HIGH;
654 common_flags &= ~SOCAM_VSYNC_ACTIVE_LOW;
657 if ((common_flags & SOCAM_PCLK_SAMPLE_RISING) &&
658 (common_flags & SOCAM_PCLK_SAMPLE_FALLING)) {
659 if (pcdev->platform_flags & PXA_CAMERA_PCP)
660 common_flags &= ~SOCAM_PCLK_SAMPLE_RISING;
662 common_flags &= ~SOCAM_PCLK_SAMPLE_FALLING;
665 ret = icd->ops->set_bus_param(icd, common_flags);
669 /* Datawidth is now guaranteed to be equal to one of the three values.
670 * We fix bit-per-pixel equal to data-width... */
671 switch (common_flags & SOCAM_DATAWIDTH_MASK) {
672 case SOCAM_DATAWIDTH_10:
677 case SOCAM_DATAWIDTH_9:
683 /* Actually it can only be 8 now,
684 * default is just to silence compiler warnings */
685 case SOCAM_DATAWIDTH_8:
691 if (pcdev->platform_flags & PXA_CAMERA_PCLK_EN)
692 cicr4 |= CICR4_PCLK_EN;
693 if (pcdev->platform_flags & PXA_CAMERA_MCLK_EN)
694 cicr4 |= CICR4_MCLK_EN;
695 if (common_flags & SOCAM_PCLK_SAMPLE_FALLING)
697 if (common_flags & SOCAM_HSYNC_ACTIVE_LOW)
699 if (common_flags & SOCAM_VSYNC_ACTIVE_LOW)
703 if (cicr0 & CICR0_ENB)
704 CICR0 = cicr0 & ~CICR0_ENB;
705 CICR1 = CICR1_PPL_VAL(icd->width - 1) | bpp | dw;
707 CICR3 = CICR3_LPF_VAL(icd->height - 1) |
708 CICR3_BFW_VAL(min((unsigned short)255, icd->y_skip_top));
709 CICR4 = mclk_get_divisor(pcdev) | cicr4;
711 /* CIF interrupts are not used, only DMA */
712 CICR0 = (pcdev->platform_flags & PXA_CAMERA_MASTER ?
713 CICR0_SIM_MP : (CICR0_SL_CAP_EN | CICR0_SIM_SP)) |
714 CICR0_DMAEN | CICR0_IRQ_MASK | (cicr0 & CICR0_ENB);
719 static int pxa_camera_try_bus_param(struct soc_camera_device *icd, __u32 pixfmt)
721 struct soc_camera_host *ici =
722 to_soc_camera_host(icd->dev.parent);
723 struct pxa_camera_dev *pcdev = ici->priv;
724 unsigned long bus_flags, camera_flags;
725 int ret = test_platform_param(pcdev, icd->buswidth, &bus_flags);
730 camera_flags = icd->ops->query_bus_param(icd);
732 return soc_camera_bus_param_compatible(camera_flags, bus_flags) ? 0 : -EINVAL;
735 static int pxa_camera_set_fmt_cap(struct soc_camera_device *icd,
736 __u32 pixfmt, struct v4l2_rect *rect)
738 return icd->ops->set_fmt_cap(icd, pixfmt, rect);
741 static int pxa_camera_try_fmt_cap(struct soc_camera_device *icd,
742 struct v4l2_format *f)
744 /* limit to pxa hardware capabilities */
745 if (f->fmt.pix.height < 32)
746 f->fmt.pix.height = 32;
747 if (f->fmt.pix.height > 2048)
748 f->fmt.pix.height = 2048;
749 if (f->fmt.pix.width < 48)
750 f->fmt.pix.width = 48;
751 if (f->fmt.pix.width > 2048)
752 f->fmt.pix.width = 2048;
753 f->fmt.pix.width &= ~0x01;
755 /* limit to sensor capabilities */
756 return icd->ops->try_fmt_cap(icd, f);
759 static int pxa_camera_reqbufs(struct soc_camera_file *icf,
760 struct v4l2_requestbuffers *p)
764 /* This is for locking debugging only. I removed spinlocks and now I
765 * check whether .prepare is ever called on a linked buffer, or whether
766 * a dma IRQ can occur for an in-work or unlinked buffer. Until now
767 * it hadn't triggered */
768 for (i = 0; i < p->count; i++) {
769 struct pxa_buffer *buf = container_of(icf->vb_vidq.bufs[i],
770 struct pxa_buffer, vb);
772 INIT_LIST_HEAD(&buf->vb.queue);
778 static unsigned int pxa_camera_poll(struct file *file, poll_table *pt)
780 struct soc_camera_file *icf = file->private_data;
781 struct pxa_buffer *buf;
783 buf = list_entry(icf->vb_vidq.stream.next, struct pxa_buffer,
786 poll_wait(file, &buf->vb.done, pt);
788 if (buf->vb.state == VIDEOBUF_DONE ||
789 buf->vb.state == VIDEOBUF_ERROR)
790 return POLLIN|POLLRDNORM;
795 static int pxa_camera_querycap(struct soc_camera_host *ici,
796 struct v4l2_capability *cap)
798 /* cap->name is set by the firendly caller:-> */
799 strlcpy(cap->card, pxa_cam_driver_description, sizeof(cap->card));
800 cap->version = PXA_CAM_VERSION_CODE;
801 cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
806 static struct soc_camera_host_ops pxa_soc_camera_host_ops = {
807 .owner = THIS_MODULE,
808 .add = pxa_camera_add_device,
809 .remove = pxa_camera_remove_device,
810 .set_fmt_cap = pxa_camera_set_fmt_cap,
811 .try_fmt_cap = pxa_camera_try_fmt_cap,
812 .reqbufs = pxa_camera_reqbufs,
813 .poll = pxa_camera_poll,
814 .querycap = pxa_camera_querycap,
815 .try_bus_param = pxa_camera_try_bus_param,
816 .set_bus_param = pxa_camera_set_bus_param,
819 /* Should be allocated dynamically too, but we have only one. */
820 static struct soc_camera_host pxa_soc_camera_host = {
821 .drv_name = PXA_CAM_DRV_NAME,
822 .vbq_ops = &pxa_videobuf_ops,
823 .msize = sizeof(struct pxa_buffer),
824 .ops = &pxa_soc_camera_host_ops,
827 static int pxa_camera_probe(struct platform_device *pdev)
829 struct pxa_camera_dev *pcdev;
830 struct resource *res;
835 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
836 irq = platform_get_irq(pdev, 0);
842 pcdev = kzalloc(sizeof(*pcdev), GFP_KERNEL);
844 dev_err(&pdev->dev, "Could not allocate pcdev\n");
849 pcdev->clk = clk_get(&pdev->dev, "CAMCLK");
850 if (IS_ERR(pcdev->clk)) {
851 err = PTR_ERR(pcdev->clk);
855 dev_set_drvdata(&pdev->dev, pcdev);
858 pcdev->pdata = pdev->dev.platform_data;
859 pcdev->platform_flags = pcdev->pdata->flags;
860 if (!(pcdev->platform_flags & (PXA_CAMERA_DATAWIDTH_8 |
861 PXA_CAMERA_DATAWIDTH_9 | PXA_CAMERA_DATAWIDTH_10))) {
862 /* Platform hasn't set available data widths. This is bad.
863 * Warn and use a default. */
864 dev_warn(&pdev->dev, "WARNING! Platform hasn't set available "
865 "data widths, using default 10 bit\n");
866 pcdev->platform_flags |= PXA_CAMERA_DATAWIDTH_10;
868 pcdev->platform_mclk_10khz = pcdev->pdata->mclk_10khz;
869 if (!pcdev->platform_mclk_10khz) {
871 "mclk_10khz == 0! Please, fix your platform data. "
872 "Using default 20MHz\n");
873 pcdev->platform_mclk_10khz = 2000;
876 INIT_LIST_HEAD(&pcdev->capture);
877 spin_lock_init(&pcdev->lock);
880 * Request the regions.
882 if (!request_mem_region(res->start, res->end - res->start + 1,
888 base = ioremap(res->start, res->end - res->start + 1);
895 pcdev->dev = &pdev->dev;
898 pcdev->dma_chan_y = pxa_request_dma("CI_Y", DMA_PRIO_HIGH,
899 pxa_camera_dma_irq_y, pcdev);
900 if (pcdev->dma_chan_y < 0) {
901 dev_err(pcdev->dev, "Can't request DMA for Y\n");
905 dev_dbg(pcdev->dev, "got DMA channel %d\n", pcdev->dma_chan_y);
907 DRCMR68 = pcdev->dma_chan_y | DRCMR_MAPVLD;
910 err = request_irq(pcdev->irq, pxa_camera_irq, 0, PXA_CAM_DRV_NAME,
913 dev_err(pcdev->dev, "Camera interrupt register failed \n");
917 pxa_soc_camera_host.priv = pcdev;
918 pxa_soc_camera_host.dev.parent = &pdev->dev;
919 pxa_soc_camera_host.nr = pdev->id;
920 err = soc_camera_host_register(&pxa_soc_camera_host);
927 free_irq(pcdev->irq, pcdev);
929 pxa_free_dma(pcdev->dma_chan_y);
933 release_mem_region(res->start, res->end - res->start + 1);
942 static int __devexit pxa_camera_remove(struct platform_device *pdev)
944 struct pxa_camera_dev *pcdev = platform_get_drvdata(pdev);
945 struct resource *res;
949 pxa_free_dma(pcdev->dma_chan_y);
950 free_irq(pcdev->irq, pcdev);
952 soc_camera_host_unregister(&pxa_soc_camera_host);
954 iounmap(pcdev->base);
957 release_mem_region(res->start, res->end - res->start + 1);
961 dev_info(&pdev->dev, "PXA Camera driver unloaded\n");
966 static struct platform_driver pxa_camera_driver = {
968 .name = PXA_CAM_DRV_NAME,
970 .probe = pxa_camera_probe,
971 .remove = __exit_p(pxa_camera_remove),
975 static int __devinit pxa_camera_init(void)
977 return platform_driver_register(&pxa_camera_driver);
980 static void __exit pxa_camera_exit(void)
982 return platform_driver_unregister(&pxa_camera_driver);
985 module_init(pxa_camera_init);
986 module_exit(pxa_camera_exit);
988 MODULE_DESCRIPTION("PXA27x SoC Camera Host driver");
989 MODULE_AUTHOR("Guennadi Liakhovetski <kernel@pengutronix.de>");
990 MODULE_LICENSE("GPL");