2 * linux/drivers/mmc/host/at91_mci.c - ATMEL AT91 MCI Driver
4 * Copyright (C) 2005 Cougar Creek Computing Devices Ltd, All Rights Reserved
6 * Copyright (C) 2006 Malcolm Noyes
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
14 This is the AT91 MCI driver that has been tested with both MMC cards
15 and SD-cards. Boards that support write protect are now supported.
16 The CCAT91SBC001 board does not support SD cards.
18 The three entry points are at91_mci_request, at91_mci_set_ios
22 This configures the device to put it into the correct mode and clock speed
26 MCI request processes the commands sent in the mmc_request structure. This
27 can consist of a processing command and a stop command in the case of
28 multiple block transfers.
30 There are three main types of request, commands, reads and writes.
32 Commands are straight forward. The command is submitted to the controller and
33 the request function returns. When the controller generates an interrupt to indicate
34 the command is finished, the response to the command are read and the mmc_request_done
35 function called to end the request.
37 Reads and writes work in a similar manner to normal commands but involve the PDC (DMA)
38 controller to manage the transfers.
40 A read is done from the controller directly to the scatterlist passed in from the request.
41 Due to a bug in the AT91RM9200 controller, when a read is completed, all the words are byte
42 swapped in the scatterlist buffers. AT91SAM926x are not affected by this bug.
44 The sequence of read interrupts is: ENDRX, RXBUFF, CMDRDY
46 A write is slightly different in that the bytes to write are read from the scatterlist
47 into a dma memory buffer (this is in case the source buffer should be read only). The
48 entire write buffer is then done from this single dma memory buffer.
50 The sequence of write interrupts is: ENDTX, TXBUFE, NOTBUSY, CMDRDY
53 Gets the status of the write protect pin, if available.
56 #include <linux/module.h>
57 #include <linux/moduleparam.h>
58 #include <linux/init.h>
59 #include <linux/ioport.h>
60 #include <linux/platform_device.h>
61 #include <linux/interrupt.h>
62 #include <linux/blkdev.h>
63 #include <linux/delay.h>
64 #include <linux/err.h>
65 #include <linux/dma-mapping.h>
66 #include <linux/clk.h>
67 #include <linux/atmel_pdc.h>
69 #include <linux/mmc/host.h>
75 #include <asm/mach/mmc.h>
76 #include <asm/arch/board.h>
77 #include <asm/arch/cpu.h>
78 #include <asm/arch/at91_mci.h>
80 #define DRIVER_NAME "at91_mci"
82 #define FL_SENT_COMMAND (1 << 0)
83 #define FL_SENT_STOP (1 << 1)
85 #define AT91_MCI_ERRORS (AT91_MCI_RINDE | AT91_MCI_RDIRE | AT91_MCI_RCRCE \
86 | AT91_MCI_RENDE | AT91_MCI_RTOE | AT91_MCI_DCRCE \
87 | AT91_MCI_DTOE | AT91_MCI_OVRE | AT91_MCI_UNRE)
89 #define at91_mci_read(host, reg) __raw_readl((host)->baseaddr + (reg))
90 #define at91_mci_write(host, reg, val) __raw_writel((val), (host)->baseaddr + (reg))
94 * Low level type for this driver
99 struct mmc_command *cmd;
100 struct mmc_request *request;
102 void __iomem *baseaddr;
105 struct at91_mmc_data *board;
111 * Flag indicating when the command has been sent. This is used to
112 * work out whether or not to send the stop
115 /* flag for current bus settings */
118 /* DMA buffer used for transmitting */
119 unsigned int* buffer;
120 dma_addr_t physical_address;
121 unsigned int total_length;
123 /* Latest in the scatterlist that has been enabled for transfer, but not freed */
126 /* Latest in the scatterlist that has been enabled for transfer */
129 /* Timer for timeouts */
130 struct timer_list timer;
134 * Reset the controller and restore most of the state
136 static void at91_reset_host(struct at91mci_host *host)
144 local_irq_save(flags);
145 imr = at91_mci_read(host, AT91_MCI_IMR);
147 at91_mci_write(host, AT91_MCI_IDR, 0xffffffff);
149 /* save current state */
150 mr = at91_mci_read(host, AT91_MCI_MR) & 0x7fff;
151 sdcr = at91_mci_read(host, AT91_MCI_SDCR);
152 dtor = at91_mci_read(host, AT91_MCI_DTOR);
154 /* reset the controller */
155 at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIDIS | AT91_MCI_SWRST);
158 at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIEN);
159 at91_mci_write(host, AT91_MCI_MR, mr);
160 at91_mci_write(host, AT91_MCI_SDCR, sdcr);
161 at91_mci_write(host, AT91_MCI_DTOR, dtor);
162 at91_mci_write(host, AT91_MCI_IER, imr);
164 /* make sure sdio interrupts will fire */
165 at91_mci_read(host, AT91_MCI_SR);
167 local_irq_restore(flags);
170 static void at91_timeout_timer(unsigned long data)
172 struct at91mci_host *host;
174 host = (struct at91mci_host *)data;
177 dev_err(host->mmc->parent, "Timeout waiting end of packet\n");
179 if (host->cmd && host->cmd->data) {
180 host->cmd->data->error = -ETIMEDOUT;
183 host->cmd->error = -ETIMEDOUT;
185 host->request->cmd->error = -ETIMEDOUT;
188 at91_reset_host(host);
189 mmc_request_done(host->mmc, host->request);
194 * Copy from sg to a dma block - used for transfers
196 static inline void at91_mci_sg_to_dma(struct at91mci_host *host, struct mmc_data *data)
198 unsigned int len, i, size;
199 unsigned *dmabuf = host->buffer;
201 size = data->blksz * data->blocks;
204 /* AT91SAM926[0/3] Data Write Operation and number of bytes erratum */
205 if (cpu_is_at91sam9260() || cpu_is_at91sam9263())
206 if (host->total_length == 12)
207 memset(dmabuf, 0, 12);
210 * Just loop through all entries. Size might not
211 * be the entire list though so make sure that
212 * we do not transfer too much.
214 for (i = 0; i < len; i++) {
215 struct scatterlist *sg;
217 unsigned int *sgbuffer;
221 sgbuffer = kmap_atomic(sg_page(sg), KM_BIO_SRC_IRQ) + sg->offset;
222 amount = min(size, sg->length);
225 if (cpu_is_at91rm9200()) { /* AT91RM9200 errata */
228 for (index = 0; index < (amount / 4); index++)
229 *dmabuf++ = swab32(sgbuffer[index]);
231 memcpy(dmabuf, sgbuffer, amount);
235 kunmap_atomic(sgbuffer, KM_BIO_SRC_IRQ);
242 * Check that we didn't get a request to transfer
243 * more data than can fit into the SG list.
251 static void at91_mci_pre_dma_read(struct at91mci_host *host)
254 struct scatterlist *sg;
255 struct mmc_command *cmd;
256 struct mmc_data *data;
258 pr_debug("pre dma read\n");
262 pr_debug("no command\n");
268 pr_debug("no data\n");
272 for (i = 0; i < 2; i++) {
273 /* nothing left to transfer */
274 if (host->transfer_index >= data->sg_len) {
275 pr_debug("Nothing left to transfer (index = %d)\n", host->transfer_index);
279 /* Check to see if this needs filling */
281 if (at91_mci_read(host, ATMEL_PDC_RCR) != 0) {
282 pr_debug("Transfer active in current\n");
287 if (at91_mci_read(host, ATMEL_PDC_RNCR) != 0) {
288 pr_debug("Transfer active in next\n");
293 /* Setup the next transfer */
294 pr_debug("Using transfer index %d\n", host->transfer_index);
296 sg = &data->sg[host->transfer_index++];
297 pr_debug("sg = %p\n", sg);
299 sg->dma_address = dma_map_page(NULL, sg_page(sg), sg->offset, sg->length, DMA_FROM_DEVICE);
301 pr_debug("dma address = %08X, length = %d\n", sg->dma_address, sg->length);
304 at91_mci_write(host, ATMEL_PDC_RPR, sg->dma_address);
305 at91_mci_write(host, ATMEL_PDC_RCR, (data->blksz & 0x3) ? sg->length : sg->length / 4);
308 at91_mci_write(host, ATMEL_PDC_RNPR, sg->dma_address);
309 at91_mci_write(host, ATMEL_PDC_RNCR, (data->blksz & 0x3) ? sg->length : sg->length / 4);
313 pr_debug("pre dma read done\n");
317 * Handle after a dma read
319 static void at91_mci_post_dma_read(struct at91mci_host *host)
321 struct mmc_command *cmd;
322 struct mmc_data *data;
324 pr_debug("post dma read\n");
328 pr_debug("no command\n");
334 pr_debug("no data\n");
338 while (host->in_use_index < host->transfer_index) {
339 struct scatterlist *sg;
341 pr_debug("finishing index %d\n", host->in_use_index);
343 sg = &data->sg[host->in_use_index++];
345 pr_debug("Unmapping page %08X\n", sg->dma_address);
347 dma_unmap_page(NULL, sg->dma_address, sg->length, DMA_FROM_DEVICE);
349 if (cpu_is_at91rm9200()) { /* AT91RM9200 errata */
350 unsigned int *buffer;
353 /* Swap the contents of the buffer */
354 buffer = kmap_atomic(sg_page(sg), KM_BIO_SRC_IRQ) + sg->offset;
355 pr_debug("buffer = %p, length = %d\n", buffer, sg->length);
357 for (index = 0; index < (sg->length / 4); index++)
358 buffer[index] = swab32(buffer[index]);
360 kunmap_atomic(buffer, KM_BIO_SRC_IRQ);
363 flush_dcache_page(sg_page(sg));
365 data->bytes_xfered += sg->length;
368 /* Is there another transfer to trigger? */
369 if (host->transfer_index < data->sg_len)
370 at91_mci_pre_dma_read(host);
372 at91_mci_write(host, AT91_MCI_IDR, AT91_MCI_ENDRX);
373 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_RXBUFF);
376 pr_debug("post dma read done\n");
380 * Handle transmitted data
382 static void at91_mci_handle_transmitted(struct at91mci_host *host)
384 struct mmc_command *cmd;
385 struct mmc_data *data;
387 pr_debug("Handling the transmit\n");
389 /* Disable the transfer */
390 at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
392 /* Now wait for cmd ready */
393 at91_mci_write(host, AT91_MCI_IDR, AT91_MCI_TXBUFE);
401 if (cmd->data->blocks > 1) {
402 pr_debug("multiple write : wait for BLKE...\n");
403 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_BLKE);
405 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_NOTBUSY);
409 * Update bytes tranfered count during a write operation
411 static void at91_mci_update_bytes_xfered(struct at91mci_host *host)
413 struct mmc_data *data;
415 /* always deal with the effective request (and not the current cmd) */
417 if (host->request->cmd && host->request->cmd->error != 0)
420 if (host->request->data) {
421 data = host->request->data;
422 if (data->flags & MMC_DATA_WRITE) {
423 /* card is in IDLE mode now */
424 pr_debug("-> bytes_xfered %d, total_length = %d\n",
425 data->bytes_xfered, host->total_length);
426 data->bytes_xfered = data->blksz * data->blocks;
432 /*Handle after command sent ready*/
433 static int at91_mci_handle_cmdrdy(struct at91mci_host *host)
437 else if (!host->cmd->data) {
438 if (host->flags & FL_SENT_STOP) {
439 /*After multi block write, we must wait for NOTBUSY*/
440 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_NOTBUSY);
442 } else if (host->cmd->data->flags & MMC_DATA_WRITE) {
443 /*After sendding multi-block-write command, start DMA transfer*/
444 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_TXBUFE | AT91_MCI_BLKE);
445 at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_TXTEN);
448 /* command not completed, have to wait */
454 * Enable the controller
456 static void at91_mci_enable(struct at91mci_host *host)
460 at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIEN);
461 at91_mci_write(host, AT91_MCI_IDR, 0xffffffff);
462 at91_mci_write(host, AT91_MCI_DTOR, AT91_MCI_DTOMUL_1M | AT91_MCI_DTOCYC);
463 mr = AT91_MCI_PDCMODE | 0x34a;
465 if (cpu_is_at91sam9260() || cpu_is_at91sam9263())
466 mr |= AT91_MCI_RDPROOF | AT91_MCI_WRPROOF;
468 at91_mci_write(host, AT91_MCI_MR, mr);
470 /* use Slot A or B (only one at same time) */
471 at91_mci_write(host, AT91_MCI_SDCR, host->board->slot_b);
475 * Disable the controller
477 static void at91_mci_disable(struct at91mci_host *host)
479 at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIDIS | AT91_MCI_SWRST);
485 static void at91_mci_send_command(struct at91mci_host *host, struct mmc_command *cmd)
487 unsigned int cmdr, mr;
488 unsigned int block_length;
489 struct mmc_data *data = cmd->data;
492 unsigned int ier = 0;
496 /* Needed for leaving busy state before CMD1 */
497 if ((at91_mci_read(host, AT91_MCI_SR) & AT91_MCI_RTOE) && (cmd->opcode == 1)) {
498 pr_debug("Clearing timeout\n");
499 at91_mci_write(host, AT91_MCI_ARGR, 0);
500 at91_mci_write(host, AT91_MCI_CMDR, AT91_MCI_OPDCMD);
501 while (!(at91_mci_read(host, AT91_MCI_SR) & AT91_MCI_CMDRDY)) {
503 pr_debug("Clearing: SR = %08X\n", at91_mci_read(host, AT91_MCI_SR));
509 if (mmc_resp_type(cmd) == MMC_RSP_NONE)
510 cmdr |= AT91_MCI_RSPTYP_NONE;
512 /* if a response is expected then allow maximum response latancy */
513 cmdr |= AT91_MCI_MAXLAT;
514 /* set 136 bit response for R2, 48 bit response otherwise */
515 if (mmc_resp_type(cmd) == MMC_RSP_R2)
516 cmdr |= AT91_MCI_RSPTYP_136;
518 cmdr |= AT91_MCI_RSPTYP_48;
523 if ( cpu_is_at91rm9200() && (data->blksz & 0x3) ) {
524 pr_debug("Unsupported block size\n");
525 cmd->error = -EINVAL;
526 mmc_request_done(host->mmc, host->request);
530 block_length = data->blksz;
531 blocks = data->blocks;
533 /* always set data start - also set direction flag for read */
534 if (data->flags & MMC_DATA_READ)
535 cmdr |= (AT91_MCI_TRDIR | AT91_MCI_TRCMD_START);
536 else if (data->flags & MMC_DATA_WRITE)
537 cmdr |= AT91_MCI_TRCMD_START;
539 if (data->flags & MMC_DATA_STREAM)
540 cmdr |= AT91_MCI_TRTYP_STREAM;
541 if (data->blocks > 1)
542 cmdr |= AT91_MCI_TRTYP_MULTIPLE;
549 if (host->flags & FL_SENT_STOP)
550 cmdr |= AT91_MCI_TRCMD_STOP;
552 if (host->bus_mode == MMC_BUSMODE_OPENDRAIN)
553 cmdr |= AT91_MCI_OPDCMD;
556 * Set the arguments and send the command
558 pr_debug("Sending command %d as %08X, arg = %08X, blocks = %d, length = %d (MR = %08X)\n",
559 cmd->opcode, cmdr, cmd->arg, blocks, block_length, at91_mci_read(host, AT91_MCI_MR));
562 at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_TXTDIS | ATMEL_PDC_RXTDIS);
563 at91_mci_write(host, ATMEL_PDC_RPR, 0);
564 at91_mci_write(host, ATMEL_PDC_RCR, 0);
565 at91_mci_write(host, ATMEL_PDC_RNPR, 0);
566 at91_mci_write(host, ATMEL_PDC_RNCR, 0);
567 at91_mci_write(host, ATMEL_PDC_TPR, 0);
568 at91_mci_write(host, ATMEL_PDC_TCR, 0);
569 at91_mci_write(host, ATMEL_PDC_TNPR, 0);
570 at91_mci_write(host, ATMEL_PDC_TNCR, 0);
571 ier = AT91_MCI_CMDRDY;
573 /* zero block length and PDC mode */
574 mr = at91_mci_read(host, AT91_MCI_MR) & 0x7fff;
575 mr |= (data->blksz & 0x3) ? AT91_MCI_PDCFBYTE : 0;
576 mr |= (block_length << 16);
577 mr |= AT91_MCI_PDCMODE;
578 at91_mci_write(host, AT91_MCI_MR, mr);
580 if (!cpu_is_at91rm9200())
581 at91_mci_write(host, AT91_MCI_BLKR,
582 AT91_MCI_BLKR_BCNT(blocks) |
583 AT91_MCI_BLKR_BLKLEN(block_length));
586 * Disable the PDC controller
588 at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
590 if (cmdr & AT91_MCI_TRCMD_START) {
591 data->bytes_xfered = 0;
592 host->transfer_index = 0;
593 host->in_use_index = 0;
594 if (cmdr & AT91_MCI_TRDIR) {
599 host->total_length = 0;
601 at91_mci_pre_dma_read(host);
602 ier = AT91_MCI_ENDRX /* | AT91_MCI_RXBUFF */;
608 host->total_length = block_length * blocks;
610 * AT91SAM926[0/3] Data Write Operation and
611 * number of bytes erratum
613 if (cpu_is_at91sam9260 () || cpu_is_at91sam9263())
614 if (host->total_length < 12)
615 host->total_length = 12;
616 host->buffer = dma_alloc_coherent(NULL,
618 &host->physical_address, GFP_KERNEL);
620 at91_mci_sg_to_dma(host, data);
622 pr_debug("Transmitting %d bytes\n", host->total_length);
624 at91_mci_write(host, ATMEL_PDC_TPR, host->physical_address);
625 at91_mci_write(host, ATMEL_PDC_TCR, (data->blksz & 0x3) ?
626 host->total_length : host->total_length / 4);
628 ier = AT91_MCI_CMDRDY;
634 * Send the command and then enable the PDC - not the other way round as
635 * the data sheet says
638 at91_mci_write(host, AT91_MCI_ARGR, cmd->arg);
639 at91_mci_write(host, AT91_MCI_CMDR, cmdr);
641 if (cmdr & AT91_MCI_TRCMD_START) {
642 if (cmdr & AT91_MCI_TRDIR)
643 at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTEN);
646 /* Enable selected interrupts */
647 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_ERRORS | ier);
651 * Process the next step in the request
653 static void at91_mci_process_next(struct at91mci_host *host)
655 if (!(host->flags & FL_SENT_COMMAND)) {
656 host->flags |= FL_SENT_COMMAND;
657 at91_mci_send_command(host, host->request->cmd);
659 else if ((!(host->flags & FL_SENT_STOP)) && host->request->stop) {
660 host->flags |= FL_SENT_STOP;
661 at91_mci_send_command(host, host->request->stop);
663 del_timer(&host->timer);
664 /* the at91rm9200 mci controller hangs after some transfers,
665 * and the workaround is to reset it after each transfer.
667 if (cpu_is_at91rm9200())
668 at91_reset_host(host);
669 mmc_request_done(host->mmc, host->request);
674 * Handle a command that has been completed
676 static void at91_mci_completed_command(struct at91mci_host *host, unsigned int status)
678 struct mmc_command *cmd = host->cmd;
679 struct mmc_data *data = cmd->data;
681 at91_mci_write(host, AT91_MCI_IDR, 0xffffffff & ~(AT91_MCI_SDIOIRQA | AT91_MCI_SDIOIRQB));
683 cmd->resp[0] = at91_mci_read(host, AT91_MCI_RSPR(0));
684 cmd->resp[1] = at91_mci_read(host, AT91_MCI_RSPR(1));
685 cmd->resp[2] = at91_mci_read(host, AT91_MCI_RSPR(2));
686 cmd->resp[3] = at91_mci_read(host, AT91_MCI_RSPR(3));
689 dma_free_coherent(NULL, host->total_length, host->buffer, host->physical_address);
693 pr_debug("Status = %08X/%08x [%08X %08X %08X %08X]\n",
694 status, at91_mci_read(host, AT91_MCI_SR),
695 cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3]);
697 if (status & AT91_MCI_ERRORS) {
698 if ((status & AT91_MCI_RCRCE) && !(mmc_resp_type(cmd) & MMC_RSP_CRC)) {
702 if (status & (AT91_MCI_DTOE | AT91_MCI_DCRCE)) {
704 if (status & AT91_MCI_DTOE)
705 data->error = -ETIMEDOUT;
706 else if (status & AT91_MCI_DCRCE)
707 data->error = -EILSEQ;
710 if (status & AT91_MCI_RTOE)
711 cmd->error = -ETIMEDOUT;
712 else if (status & AT91_MCI_RCRCE)
713 cmd->error = -EILSEQ;
718 pr_debug("Error detected and set to %d/%d (cmd = %d, retries = %d)\n",
719 cmd->error, data ? data->error : 0,
720 cmd->opcode, cmd->retries);
726 at91_mci_process_next(host);
730 * Handle an MMC request
732 static void at91_mci_request(struct mmc_host *mmc, struct mmc_request *mrq)
734 struct at91mci_host *host = mmc_priv(mmc);
738 mod_timer(&host->timer, jiffies + HZ);
740 at91_mci_process_next(host);
746 static void at91_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
749 struct at91mci_host *host = mmc_priv(mmc);
750 unsigned long at91_master_clock = clk_get_rate(host->mci_clk);
752 host->bus_mode = ios->bus_mode;
754 if (ios->clock == 0) {
755 /* Disable the MCI controller */
756 at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIDIS);
760 /* Enable the MCI controller */
761 at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIEN);
763 if ((at91_master_clock % (ios->clock * 2)) == 0)
764 clkdiv = ((at91_master_clock / ios->clock) / 2) - 1;
766 clkdiv = (at91_master_clock / ios->clock) / 2;
768 pr_debug("clkdiv = %d. mcck = %ld\n", clkdiv,
769 at91_master_clock / (2 * (clkdiv + 1)));
771 if (ios->bus_width == MMC_BUS_WIDTH_4 && host->board->wire4) {
772 pr_debug("MMC: Setting controller bus width to 4\n");
773 at91_mci_write(host, AT91_MCI_SDCR, at91_mci_read(host, AT91_MCI_SDCR) | AT91_MCI_SDCBUS);
776 pr_debug("MMC: Setting controller bus width to 1\n");
777 at91_mci_write(host, AT91_MCI_SDCR, at91_mci_read(host, AT91_MCI_SDCR) & ~AT91_MCI_SDCBUS);
780 /* Set the clock divider */
781 at91_mci_write(host, AT91_MCI_MR, (at91_mci_read(host, AT91_MCI_MR) & ~AT91_MCI_CLKDIV) | clkdiv);
783 /* maybe switch power to the card */
784 if (host->board->vcc_pin) {
785 switch (ios->power_mode) {
787 gpio_set_value(host->board->vcc_pin, 0);
790 gpio_set_value(host->board->vcc_pin, 1);
801 * Handle an interrupt
803 static irqreturn_t at91_mci_irq(int irq, void *devid)
805 struct at91mci_host *host = devid;
807 unsigned int int_status, int_mask;
809 int_status = at91_mci_read(host, AT91_MCI_SR);
810 int_mask = at91_mci_read(host, AT91_MCI_IMR);
812 pr_debug("MCI irq: status = %08X, %08X, %08X\n", int_status, int_mask,
813 int_status & int_mask);
815 int_status = int_status & int_mask;
817 if (int_status & AT91_MCI_ERRORS) {
820 if (int_status & AT91_MCI_UNRE)
821 pr_debug("MMC: Underrun error\n");
822 if (int_status & AT91_MCI_OVRE)
823 pr_debug("MMC: Overrun error\n");
824 if (int_status & AT91_MCI_DTOE)
825 pr_debug("MMC: Data timeout\n");
826 if (int_status & AT91_MCI_DCRCE)
827 pr_debug("MMC: CRC error in data\n");
828 if (int_status & AT91_MCI_RTOE)
829 pr_debug("MMC: Response timeout\n");
830 if (int_status & AT91_MCI_RENDE)
831 pr_debug("MMC: Response end bit error\n");
832 if (int_status & AT91_MCI_RCRCE)
833 pr_debug("MMC: Response CRC error\n");
834 if (int_status & AT91_MCI_RDIRE)
835 pr_debug("MMC: Response direction error\n");
836 if (int_status & AT91_MCI_RINDE)
837 pr_debug("MMC: Response index error\n");
839 /* Only continue processing if no errors */
841 if (int_status & AT91_MCI_TXBUFE) {
842 pr_debug("TX buffer empty\n");
843 at91_mci_handle_transmitted(host);
846 if (int_status & AT91_MCI_ENDRX) {
848 at91_mci_post_dma_read(host);
851 if (int_status & AT91_MCI_RXBUFF) {
852 pr_debug("RX buffer full\n");
853 at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
854 at91_mci_write(host, AT91_MCI_IDR, AT91_MCI_RXBUFF | AT91_MCI_ENDRX);
858 if (int_status & AT91_MCI_ENDTX)
859 pr_debug("Transmit has ended\n");
861 if (int_status & AT91_MCI_NOTBUSY) {
862 pr_debug("Card is ready\n");
863 at91_mci_update_bytes_xfered(host);
867 if (int_status & AT91_MCI_DTIP)
868 pr_debug("Data transfer in progress\n");
870 if (int_status & AT91_MCI_BLKE) {
871 pr_debug("Block transfer has ended\n");
872 if (host->request->data && host->request->data->blocks > 1) {
873 /* multi block write : complete multi write
874 * command and send stop */
877 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_NOTBUSY);
881 if (int_status & AT91_MCI_SDIOIRQA)
882 mmc_signal_sdio_irq(host->mmc);
884 if (int_status & AT91_MCI_SDIOIRQB)
885 mmc_signal_sdio_irq(host->mmc);
887 if (int_status & AT91_MCI_TXRDY)
888 pr_debug("Ready to transmit\n");
890 if (int_status & AT91_MCI_RXRDY)
891 pr_debug("Ready to receive\n");
893 if (int_status & AT91_MCI_CMDRDY) {
894 pr_debug("Command ready\n");
895 completed = at91_mci_handle_cmdrdy(host);
900 pr_debug("Completed command\n");
901 at91_mci_write(host, AT91_MCI_IDR, 0xffffffff & ~(AT91_MCI_SDIOIRQA | AT91_MCI_SDIOIRQB));
902 at91_mci_completed_command(host, int_status);
904 at91_mci_write(host, AT91_MCI_IDR, int_status & ~(AT91_MCI_SDIOIRQA | AT91_MCI_SDIOIRQB));
909 static irqreturn_t at91_mmc_det_irq(int irq, void *_host)
911 struct at91mci_host *host = _host;
912 int present = !gpio_get_value(irq_to_gpio(irq));
915 * we expect this irq on both insert and remove,
916 * and use a short delay to debounce.
918 if (present != host->present) {
919 host->present = present;
920 pr_debug("%s: card %s\n", mmc_hostname(host->mmc),
921 present ? "insert" : "remove");
923 pr_debug("****** Resetting SD-card bus width ******\n");
924 at91_mci_write(host, AT91_MCI_SDCR, at91_mci_read(host, AT91_MCI_SDCR) & ~AT91_MCI_SDCBUS);
926 mmc_detect_change(host->mmc, msecs_to_jiffies(100));
931 static int at91_mci_get_ro(struct mmc_host *mmc)
933 struct at91mci_host *host = mmc_priv(mmc);
935 if (host->board->wp_pin)
936 return !!gpio_get_value(host->board->wp_pin);
938 * Board doesn't support read only detection; let the mmc core
944 static void at91_mci_enable_sdio_irq(struct mmc_host *mmc, int enable)
946 struct at91mci_host *host = mmc_priv(mmc);
948 pr_debug("%s: sdio_irq %c : %s\n", mmc_hostname(host->mmc),
949 host->board->slot_b ? 'B':'A', enable ? "enable" : "disable");
950 at91_mci_write(host, enable ? AT91_MCI_IER : AT91_MCI_IDR,
951 host->board->slot_b ? AT91_MCI_SDIOIRQB : AT91_MCI_SDIOIRQA);
955 static const struct mmc_host_ops at91_mci_ops = {
956 .request = at91_mci_request,
957 .set_ios = at91_mci_set_ios,
958 .get_ro = at91_mci_get_ro,
959 .enable_sdio_irq = at91_mci_enable_sdio_irq,
963 * Probe for the device
965 static int __init at91_mci_probe(struct platform_device *pdev)
967 struct mmc_host *mmc;
968 struct at91mci_host *host;
969 struct resource *res;
972 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
976 if (!request_mem_region(res->start, res->end - res->start + 1, DRIVER_NAME))
979 mmc = mmc_alloc_host(sizeof(struct at91mci_host), &pdev->dev);
982 dev_dbg(&pdev->dev, "couldn't allocate mmc host\n");
986 mmc->ops = &at91_mci_ops;
988 mmc->f_max = 25000000;
989 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
990 mmc->caps = MMC_CAP_MULTIWRITE | MMC_CAP_SDIO_IRQ;
992 mmc->max_blk_size = 4095;
993 mmc->max_blk_count = mmc->max_req_size;
995 host = mmc_priv(mmc);
999 host->board = pdev->dev.platform_data;
1000 if (host->board->wire4) {
1001 if (cpu_is_at91sam9260() || cpu_is_at91sam9263())
1002 mmc->caps |= MMC_CAP_4_BIT_DATA;
1004 dev_warn(&pdev->dev, "4 wire bus mode not supported"
1005 " - using 1 wire\n");
1009 * Reserve GPIOs ... board init code makes sure these pins are set
1010 * up as GPIOs with the right direction (input, except for vcc)
1012 if (host->board->det_pin) {
1013 ret = gpio_request(host->board->det_pin, "mmc_detect");
1015 dev_dbg(&pdev->dev, "couldn't claim card detect pin\n");
1019 if (host->board->wp_pin) {
1020 ret = gpio_request(host->board->wp_pin, "mmc_wp");
1022 dev_dbg(&pdev->dev, "couldn't claim wp sense pin\n");
1026 if (host->board->vcc_pin) {
1027 ret = gpio_request(host->board->vcc_pin, "mmc_vcc");
1029 dev_dbg(&pdev->dev, "couldn't claim vcc switch pin\n");
1037 host->mci_clk = clk_get(&pdev->dev, "mci_clk");
1038 if (IS_ERR(host->mci_clk)) {
1040 dev_dbg(&pdev->dev, "no mci_clk?\n");
1047 host->baseaddr = ioremap(res->start, res->end - res->start + 1);
1048 if (!host->baseaddr) {
1056 clk_enable(host->mci_clk); /* Enable the peripheral clock */
1057 at91_mci_disable(host);
1058 at91_mci_enable(host);
1061 * Allocate the MCI interrupt
1063 host->irq = platform_get_irq(pdev, 0);
1064 ret = request_irq(host->irq, at91_mci_irq, IRQF_SHARED,
1065 mmc_hostname(mmc), host);
1067 dev_dbg(&pdev->dev, "request MCI interrupt failed\n");
1071 platform_set_drvdata(pdev, mmc);
1074 * Add host to MMC layer
1076 if (host->board->det_pin) {
1077 host->present = !gpio_get_value(host->board->det_pin);
1084 setup_timer(&host->timer, at91_timeout_timer, (unsigned long)host);
1087 * monitor card insertion/removal if we can
1089 if (host->board->det_pin) {
1090 ret = request_irq(gpio_to_irq(host->board->det_pin),
1091 at91_mmc_det_irq, 0, mmc_hostname(mmc), host);
1093 dev_warn(&pdev->dev, "request MMC detect irq failed\n");
1095 device_init_wakeup(&pdev->dev, 1);
1098 pr_debug("Added MCI driver\n");
1103 clk_disable(host->mci_clk);
1104 iounmap(host->baseaddr);
1106 clk_put(host->mci_clk);
1108 if (host->board->vcc_pin)
1109 gpio_free(host->board->vcc_pin);
1111 if (host->board->wp_pin)
1112 gpio_free(host->board->wp_pin);
1114 if (host->board->det_pin)
1115 gpio_free(host->board->det_pin);
1119 release_mem_region(res->start, res->end - res->start + 1);
1120 dev_err(&pdev->dev, "probe failed, err %d\n", ret);
1127 static int __exit at91_mci_remove(struct platform_device *pdev)
1129 struct mmc_host *mmc = platform_get_drvdata(pdev);
1130 struct at91mci_host *host;
1131 struct resource *res;
1136 host = mmc_priv(mmc);
1138 if (host->board->det_pin) {
1139 if (device_can_wakeup(&pdev->dev))
1140 free_irq(gpio_to_irq(host->board->det_pin), host);
1141 device_init_wakeup(&pdev->dev, 0);
1142 gpio_free(host->board->det_pin);
1145 at91_mci_disable(host);
1146 del_timer_sync(&host->timer);
1147 mmc_remove_host(mmc);
1148 free_irq(host->irq, host);
1150 clk_disable(host->mci_clk); /* Disable the peripheral clock */
1151 clk_put(host->mci_clk);
1153 if (host->board->vcc_pin)
1154 gpio_free(host->board->vcc_pin);
1155 if (host->board->wp_pin)
1156 gpio_free(host->board->wp_pin);
1158 iounmap(host->baseaddr);
1159 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1160 release_mem_region(res->start, res->end - res->start + 1);
1163 platform_set_drvdata(pdev, NULL);
1164 pr_debug("MCI Removed\n");
1170 static int at91_mci_suspend(struct platform_device *pdev, pm_message_t state)
1172 struct mmc_host *mmc = platform_get_drvdata(pdev);
1173 struct at91mci_host *host = mmc_priv(mmc);
1176 if (host->board->det_pin && device_may_wakeup(&pdev->dev))
1177 enable_irq_wake(host->board->det_pin);
1180 ret = mmc_suspend_host(mmc, state);
1185 static int at91_mci_resume(struct platform_device *pdev)
1187 struct mmc_host *mmc = platform_get_drvdata(pdev);
1188 struct at91mci_host *host = mmc_priv(mmc);
1191 if (host->board->det_pin && device_may_wakeup(&pdev->dev))
1192 disable_irq_wake(host->board->det_pin);
1195 ret = mmc_resume_host(mmc);
1200 #define at91_mci_suspend NULL
1201 #define at91_mci_resume NULL
1204 static struct platform_driver at91_mci_driver = {
1205 .remove = __exit_p(at91_mci_remove),
1206 .suspend = at91_mci_suspend,
1207 .resume = at91_mci_resume,
1209 .name = DRIVER_NAME,
1210 .owner = THIS_MODULE,
1214 static int __init at91_mci_init(void)
1216 return platform_driver_probe(&at91_mci_driver, at91_mci_probe);
1219 static void __exit at91_mci_exit(void)
1221 platform_driver_unregister(&at91_mci_driver);
1224 module_init(at91_mci_init);
1225 module_exit(at91_mci_exit);
1227 MODULE_DESCRIPTION("AT91 Multimedia Card Interface driver");
1228 MODULE_AUTHOR("Nick Randell");
1229 MODULE_LICENSE("GPL");
1230 MODULE_ALIAS("platform:at91_mci");