2 * linux/drivers/mmc/sdhci.c - Secure Digital Host Controller Interface driver
4 * Copyright (C) 2005-2006 Pierre Ossman, All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include <linux/delay.h>
12 #include <linux/highmem.h>
13 #include <linux/pci.h>
14 #include <linux/dma-mapping.h>
16 #include <linux/mmc/host.h>
17 #include <linux/mmc/protocol.h>
19 #include <asm/scatterlist.h>
23 #define DRIVER_NAME "sdhci"
24 #define DRIVER_VERSION "0.12"
26 #define BUGMAIL "<sdhci-devel@list.drzeus.cx>"
28 #define DBG(f, x...) \
29 pr_debug(DRIVER_NAME " [%s()]: " f, __func__,## x)
31 static unsigned int debug_nodma = 0;
32 static unsigned int debug_forcedma = 0;
33 static unsigned int debug_quirks = 0;
35 #define SDHCI_QUIRK_CLOCK_BEFORE_RESET (1<<0)
37 static const struct pci_device_id pci_ids[] __devinitdata = {
39 .vendor = PCI_VENDOR_ID_RICOH,
40 .device = PCI_DEVICE_ID_RICOH_R5C822,
41 .subvendor = PCI_VENDOR_ID_IBM,
42 .subdevice = PCI_ANY_ID,
43 .driver_data = SDHCI_QUIRK_CLOCK_BEFORE_RESET,
46 { /* Generic SD host controller */
47 PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
50 { /* end: all zeroes */ },
53 MODULE_DEVICE_TABLE(pci, pci_ids);
55 static void sdhci_prepare_data(struct sdhci_host *, struct mmc_data *);
56 static void sdhci_finish_data(struct sdhci_host *);
58 static void sdhci_send_command(struct sdhci_host *, struct mmc_command *);
59 static void sdhci_finish_command(struct sdhci_host *);
61 static void sdhci_dumpregs(struct sdhci_host *host)
63 printk(KERN_DEBUG DRIVER_NAME ": ============== REGISTER DUMP ==============\n");
65 printk(KERN_DEBUG DRIVER_NAME ": Sys addr: 0x%08x | Version: 0x%08x\n",
66 readl(host->ioaddr + SDHCI_DMA_ADDRESS),
67 readw(host->ioaddr + SDHCI_HOST_VERSION));
68 printk(KERN_DEBUG DRIVER_NAME ": Blk size: 0x%08x | Blk cnt: 0x%08x\n",
69 readw(host->ioaddr + SDHCI_BLOCK_SIZE),
70 readw(host->ioaddr + SDHCI_BLOCK_COUNT));
71 printk(KERN_DEBUG DRIVER_NAME ": Argument: 0x%08x | Trn mode: 0x%08x\n",
72 readl(host->ioaddr + SDHCI_ARGUMENT),
73 readw(host->ioaddr + SDHCI_TRANSFER_MODE));
74 printk(KERN_DEBUG DRIVER_NAME ": Present: 0x%08x | Host ctl: 0x%08x\n",
75 readl(host->ioaddr + SDHCI_PRESENT_STATE),
76 readb(host->ioaddr + SDHCI_HOST_CONTROL));
77 printk(KERN_DEBUG DRIVER_NAME ": Power: 0x%08x | Blk gap: 0x%08x\n",
78 readb(host->ioaddr + SDHCI_POWER_CONTROL),
79 readb(host->ioaddr + SDHCI_BLOCK_GAP_CONTROL));
80 printk(KERN_DEBUG DRIVER_NAME ": Wake-up: 0x%08x | Clock: 0x%08x\n",
81 readb(host->ioaddr + SDHCI_WALK_UP_CONTROL),
82 readw(host->ioaddr + SDHCI_CLOCK_CONTROL));
83 printk(KERN_DEBUG DRIVER_NAME ": Timeout: 0x%08x | Int stat: 0x%08x\n",
84 readb(host->ioaddr + SDHCI_TIMEOUT_CONTROL),
85 readl(host->ioaddr + SDHCI_INT_STATUS));
86 printk(KERN_DEBUG DRIVER_NAME ": Int enab: 0x%08x | Sig enab: 0x%08x\n",
87 readl(host->ioaddr + SDHCI_INT_ENABLE),
88 readl(host->ioaddr + SDHCI_SIGNAL_ENABLE));
89 printk(KERN_DEBUG DRIVER_NAME ": AC12 err: 0x%08x | Slot int: 0x%08x\n",
90 readw(host->ioaddr + SDHCI_ACMD12_ERR),
91 readw(host->ioaddr + SDHCI_SLOT_INT_STATUS));
92 printk(KERN_DEBUG DRIVER_NAME ": Caps: 0x%08x | Max curr: 0x%08x\n",
93 readl(host->ioaddr + SDHCI_CAPABILITIES),
94 readl(host->ioaddr + SDHCI_MAX_CURRENT));
96 printk(KERN_DEBUG DRIVER_NAME ": ===========================================\n");
99 /*****************************************************************************\
101 * Low level functions *
103 \*****************************************************************************/
105 static void sdhci_reset(struct sdhci_host *host, u8 mask)
107 unsigned long timeout;
109 writeb(mask, host->ioaddr + SDHCI_SOFTWARE_RESET);
111 if (mask & SDHCI_RESET_ALL)
114 /* Wait max 100 ms */
117 /* hw clears the bit when it's done */
118 while (readb(host->ioaddr + SDHCI_SOFTWARE_RESET) & mask) {
120 printk(KERN_ERR "%s: Reset 0x%x never completed. "
121 "Please report this to " BUGMAIL ".\n",
122 mmc_hostname(host->mmc), (int)mask);
123 sdhci_dumpregs(host);
131 static void sdhci_init(struct sdhci_host *host)
135 sdhci_reset(host, SDHCI_RESET_ALL);
137 intmask = SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT |
138 SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_INDEX |
139 SDHCI_INT_END_BIT | SDHCI_INT_CRC | SDHCI_INT_TIMEOUT |
140 SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT |
141 SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL |
142 SDHCI_INT_DMA_END | SDHCI_INT_DATA_END | SDHCI_INT_RESPONSE;
144 writel(intmask, host->ioaddr + SDHCI_INT_ENABLE);
145 writel(intmask, host->ioaddr + SDHCI_SIGNAL_ENABLE);
148 static void sdhci_activate_led(struct sdhci_host *host)
152 ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
153 ctrl |= SDHCI_CTRL_LED;
154 writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
157 static void sdhci_deactivate_led(struct sdhci_host *host)
161 ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
162 ctrl &= ~SDHCI_CTRL_LED;
163 writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
166 /*****************************************************************************\
170 \*****************************************************************************/
172 static inline char* sdhci_kmap_sg(struct sdhci_host* host)
174 host->mapped_sg = kmap_atomic(host->cur_sg->page, KM_BIO_SRC_IRQ);
175 return host->mapped_sg + host->cur_sg->offset;
178 static inline void sdhci_kunmap_sg(struct sdhci_host* host)
180 kunmap_atomic(host->mapped_sg, KM_BIO_SRC_IRQ);
183 static inline int sdhci_next_sg(struct sdhci_host* host)
186 * Skip to next SG entry.
194 if (host->num_sg > 0) {
196 host->remain = host->cur_sg->length;
202 static void sdhci_read_block_pio(struct sdhci_host *host)
204 int blksize, chunk_remain;
209 DBG("PIO reading\n");
211 blksize = host->data->blksz;
215 buffer = sdhci_kmap_sg(host) + host->offset;
218 if (chunk_remain == 0) {
219 data = readl(host->ioaddr + SDHCI_BUFFER);
220 chunk_remain = min(blksize, 4);
223 size = min(host->size, host->remain);
224 size = min(size, chunk_remain);
226 chunk_remain -= size;
228 host->offset += size;
229 host->remain -= size;
232 *buffer = data & 0xFF;
238 if (host->remain == 0) {
239 sdhci_kunmap_sg(host);
240 if (sdhci_next_sg(host) == 0) {
241 BUG_ON(blksize != 0);
244 buffer = sdhci_kmap_sg(host);
248 sdhci_kunmap_sg(host);
251 static void sdhci_write_block_pio(struct sdhci_host *host)
253 int blksize, chunk_remain;
258 DBG("PIO writing\n");
260 blksize = host->data->blksz;
265 buffer = sdhci_kmap_sg(host) + host->offset;
268 size = min(host->size, host->remain);
269 size = min(size, chunk_remain);
271 chunk_remain -= size;
273 host->offset += size;
274 host->remain -= size;
278 data |= (u32)*buffer << 24;
283 if (chunk_remain == 0) {
284 writel(data, host->ioaddr + SDHCI_BUFFER);
285 chunk_remain = min(blksize, 4);
288 if (host->remain == 0) {
289 sdhci_kunmap_sg(host);
290 if (sdhci_next_sg(host) == 0) {
291 BUG_ON(blksize != 0);
294 buffer = sdhci_kmap_sg(host);
298 sdhci_kunmap_sg(host);
301 static void sdhci_transfer_pio(struct sdhci_host *host)
310 if (host->data->flags & MMC_DATA_READ)
311 mask = SDHCI_DATA_AVAILABLE;
313 mask = SDHCI_SPACE_AVAILABLE;
315 while (readl(host->ioaddr + SDHCI_PRESENT_STATE) & mask) {
316 if (host->data->flags & MMC_DATA_READ)
317 sdhci_read_block_pio(host);
319 sdhci_write_block_pio(host);
324 BUG_ON(host->num_sg == 0);
327 DBG("PIO transfer complete.\n");
330 static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_data *data)
333 unsigned target_timeout, current_timeout;
340 DBG("blksz %04x blks %04x flags %08x\n",
341 data->blksz, data->blocks, data->flags);
342 DBG("tsac %d ms nsac %d clk\n",
343 data->timeout_ns / 1000000, data->timeout_clks);
346 BUG_ON(data->blksz * data->blocks > 524288);
347 BUG_ON(data->blksz > host->max_block);
348 BUG_ON(data->blocks > 65535);
351 target_timeout = data->timeout_ns / 1000 +
352 data->timeout_clks / host->clock;
355 * Figure out needed cycles.
356 * We do this in steps in order to fit inside a 32 bit int.
357 * The first step is the minimum timeout, which will have a
358 * minimum resolution of 6 bits:
359 * (1) 2^13*1000 > 2^22,
360 * (2) host->timeout_clk < 2^16
365 current_timeout = (1 << 13) * 1000 / host->timeout_clk;
366 while (current_timeout < target_timeout) {
368 current_timeout <<= 1;
374 printk(KERN_WARNING "%s: Too large timeout requested!\n",
375 mmc_hostname(host->mmc));
379 writeb(count, host->ioaddr + SDHCI_TIMEOUT_CONTROL);
381 if (host->flags & SDHCI_USE_DMA) {
384 count = pci_map_sg(host->chip->pdev, data->sg, data->sg_len,
385 (data->flags & MMC_DATA_READ)?PCI_DMA_FROMDEVICE:PCI_DMA_TODEVICE);
388 writel(sg_dma_address(data->sg), host->ioaddr + SDHCI_DMA_ADDRESS);
390 host->size = data->blksz * data->blocks;
392 host->cur_sg = data->sg;
393 host->num_sg = data->sg_len;
396 host->remain = host->cur_sg->length;
399 /* We do not handle DMA boundaries, so set it to max (512 KiB) */
400 writew(SDHCI_MAKE_BLKSZ(7, data->blksz),
401 host->ioaddr + SDHCI_BLOCK_SIZE);
402 writew(data->blocks, host->ioaddr + SDHCI_BLOCK_COUNT);
405 static void sdhci_set_transfer_mode(struct sdhci_host *host,
406 struct mmc_data *data)
415 mode = SDHCI_TRNS_BLK_CNT_EN;
416 if (data->blocks > 1)
417 mode |= SDHCI_TRNS_MULTI;
418 if (data->flags & MMC_DATA_READ)
419 mode |= SDHCI_TRNS_READ;
420 if (host->flags & SDHCI_USE_DMA)
421 mode |= SDHCI_TRNS_DMA;
423 writew(mode, host->ioaddr + SDHCI_TRANSFER_MODE);
426 static void sdhci_finish_data(struct sdhci_host *host)
428 struct mmc_data *data;
436 if (host->flags & SDHCI_USE_DMA) {
437 pci_unmap_sg(host->chip->pdev, data->sg, data->sg_len,
438 (data->flags & MMC_DATA_READ)?PCI_DMA_FROMDEVICE:PCI_DMA_TODEVICE);
442 * Controller doesn't count down when in single block mode.
444 if ((data->blocks == 1) && (data->error == MMC_ERR_NONE))
447 blocks = readw(host->ioaddr + SDHCI_BLOCK_COUNT);
448 data->bytes_xfered = data->blksz * (data->blocks - blocks);
450 if ((data->error == MMC_ERR_NONE) && blocks) {
451 printk(KERN_ERR "%s: Controller signalled completion even "
452 "though there were blocks left. Please report this "
453 "to " BUGMAIL ".\n", mmc_hostname(host->mmc));
454 data->error = MMC_ERR_FAILED;
457 if (host->size != 0) {
458 printk(KERN_ERR "%s: %d bytes were left untransferred. "
459 "Please report this to " BUGMAIL ".\n",
460 mmc_hostname(host->mmc), host->size);
461 data->error = MMC_ERR_FAILED;
464 DBG("Ending data transfer (%d bytes)\n", data->bytes_xfered);
468 * The controller needs a reset of internal state machines
469 * upon error conditions.
471 if (data->error != MMC_ERR_NONE) {
472 sdhci_reset(host, SDHCI_RESET_CMD);
473 sdhci_reset(host, SDHCI_RESET_DATA);
476 sdhci_send_command(host, data->stop);
478 tasklet_schedule(&host->finish_tasklet);
481 static void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd)
485 unsigned long timeout;
489 DBG("Sending cmd (%x)\n", cmd->opcode);
494 mask = SDHCI_CMD_INHIBIT;
495 if ((cmd->data != NULL) || (cmd->flags & MMC_RSP_BUSY))
496 mask |= SDHCI_DATA_INHIBIT;
498 /* We shouldn't wait for data inihibit for stop commands, even
499 though they might use busy signaling */
500 if (host->mrq->data && (cmd == host->mrq->data->stop))
501 mask &= ~SDHCI_DATA_INHIBIT;
503 while (readl(host->ioaddr + SDHCI_PRESENT_STATE) & mask) {
505 printk(KERN_ERR "%s: Controller never released "
506 "inhibit bit(s). Please report this to "
507 BUGMAIL ".\n", mmc_hostname(host->mmc));
508 sdhci_dumpregs(host);
509 cmd->error = MMC_ERR_FAILED;
510 tasklet_schedule(&host->finish_tasklet);
517 mod_timer(&host->timer, jiffies + 10 * HZ);
521 sdhci_prepare_data(host, cmd->data);
523 writel(cmd->arg, host->ioaddr + SDHCI_ARGUMENT);
525 sdhci_set_transfer_mode(host, cmd->data);
527 if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) {
528 printk(KERN_ERR "%s: Unsupported response type! "
529 "Please report this to " BUGMAIL ".\n",
530 mmc_hostname(host->mmc));
531 cmd->error = MMC_ERR_INVALID;
532 tasklet_schedule(&host->finish_tasklet);
536 if (!(cmd->flags & MMC_RSP_PRESENT))
537 flags = SDHCI_CMD_RESP_NONE;
538 else if (cmd->flags & MMC_RSP_136)
539 flags = SDHCI_CMD_RESP_LONG;
540 else if (cmd->flags & MMC_RSP_BUSY)
541 flags = SDHCI_CMD_RESP_SHORT_BUSY;
543 flags = SDHCI_CMD_RESP_SHORT;
545 if (cmd->flags & MMC_RSP_CRC)
546 flags |= SDHCI_CMD_CRC;
547 if (cmd->flags & MMC_RSP_OPCODE)
548 flags |= SDHCI_CMD_INDEX;
550 flags |= SDHCI_CMD_DATA;
552 writel(SDHCI_MAKE_CMD(cmd->opcode, flags),
553 host->ioaddr + SDHCI_COMMAND);
556 static void sdhci_finish_command(struct sdhci_host *host)
560 BUG_ON(host->cmd == NULL);
562 if (host->cmd->flags & MMC_RSP_PRESENT) {
563 if (host->cmd->flags & MMC_RSP_136) {
564 /* CRC is stripped so we need to do some shifting. */
565 for (i = 0;i < 4;i++) {
566 host->cmd->resp[i] = readl(host->ioaddr +
567 SDHCI_RESPONSE + (3-i)*4) << 8;
569 host->cmd->resp[i] |=
571 SDHCI_RESPONSE + (3-i)*4-1);
574 host->cmd->resp[0] = readl(host->ioaddr + SDHCI_RESPONSE);
578 host->cmd->error = MMC_ERR_NONE;
580 DBG("Ending cmd (%x)\n", host->cmd->opcode);
583 host->data = host->cmd->data;
585 tasklet_schedule(&host->finish_tasklet);
590 static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
594 unsigned long timeout;
596 if (clock == host->clock)
599 writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL);
604 for (div = 1;div < 256;div *= 2) {
605 if ((host->max_clk / div) <= clock)
610 clk = div << SDHCI_DIVIDER_SHIFT;
611 clk |= SDHCI_CLOCK_INT_EN;
612 writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL);
616 while (!((clk = readw(host->ioaddr + SDHCI_CLOCK_CONTROL))
617 & SDHCI_CLOCK_INT_STABLE)) {
619 printk(KERN_ERR "%s: Internal clock never stabilised. "
620 "Please report this to " BUGMAIL ".\n",
621 mmc_hostname(host->mmc));
622 sdhci_dumpregs(host);
629 clk |= SDHCI_CLOCK_CARD_EN;
630 writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL);
636 static void sdhci_set_power(struct sdhci_host *host, unsigned short power)
640 if (host->power == power)
643 writeb(0, host->ioaddr + SDHCI_POWER_CONTROL);
645 if (power == (unsigned short)-1)
648 pwr = SDHCI_POWER_ON;
654 pwr |= SDHCI_POWER_180;
659 pwr |= SDHCI_POWER_300;
664 pwr |= SDHCI_POWER_330;
670 writeb(pwr, host->ioaddr + SDHCI_POWER_CONTROL);
676 /*****************************************************************************\
680 \*****************************************************************************/
682 static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq)
684 struct sdhci_host *host;
687 host = mmc_priv(mmc);
689 spin_lock_irqsave(&host->lock, flags);
691 WARN_ON(host->mrq != NULL);
693 sdhci_activate_led(host);
697 if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
698 host->mrq->cmd->error = MMC_ERR_TIMEOUT;
699 tasklet_schedule(&host->finish_tasklet);
701 sdhci_send_command(host, mrq->cmd);
703 spin_unlock_irqrestore(&host->lock, flags);
706 static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
708 struct sdhci_host *host;
712 host = mmc_priv(mmc);
714 spin_lock_irqsave(&host->lock, flags);
717 * Reset the chip on each power off.
718 * Should clear out any weird states.
720 if (ios->power_mode == MMC_POWER_OFF) {
721 writel(0, host->ioaddr + SDHCI_SIGNAL_ENABLE);
725 sdhci_set_clock(host, ios->clock);
727 if (ios->power_mode == MMC_POWER_OFF)
728 sdhci_set_power(host, -1);
730 sdhci_set_power(host, ios->vdd);
732 ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
733 if (ios->bus_width == MMC_BUS_WIDTH_4)
734 ctrl |= SDHCI_CTRL_4BITBUS;
736 ctrl &= ~SDHCI_CTRL_4BITBUS;
737 writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
739 spin_unlock_irqrestore(&host->lock, flags);
742 static int sdhci_get_ro(struct mmc_host *mmc)
744 struct sdhci_host *host;
748 host = mmc_priv(mmc);
750 spin_lock_irqsave(&host->lock, flags);
752 present = readl(host->ioaddr + SDHCI_PRESENT_STATE);
754 spin_unlock_irqrestore(&host->lock, flags);
756 return !(present & SDHCI_WRITE_PROTECT);
759 static struct mmc_host_ops sdhci_ops = {
760 .request = sdhci_request,
761 .set_ios = sdhci_set_ios,
762 .get_ro = sdhci_get_ro,
765 /*****************************************************************************\
769 \*****************************************************************************/
771 static void sdhci_tasklet_card(unsigned long param)
773 struct sdhci_host *host;
776 host = (struct sdhci_host*)param;
778 spin_lock_irqsave(&host->lock, flags);
780 if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
782 printk(KERN_ERR "%s: Card removed during transfer!\n",
783 mmc_hostname(host->mmc));
784 printk(KERN_ERR "%s: Resetting controller.\n",
785 mmc_hostname(host->mmc));
787 sdhci_reset(host, SDHCI_RESET_CMD);
788 sdhci_reset(host, SDHCI_RESET_DATA);
790 host->mrq->cmd->error = MMC_ERR_FAILED;
791 tasklet_schedule(&host->finish_tasklet);
795 spin_unlock_irqrestore(&host->lock, flags);
797 mmc_detect_change(host->mmc, msecs_to_jiffies(500));
800 static void sdhci_tasklet_finish(unsigned long param)
802 struct sdhci_host *host;
804 struct mmc_request *mrq;
806 host = (struct sdhci_host*)param;
808 spin_lock_irqsave(&host->lock, flags);
810 del_timer(&host->timer);
814 DBG("Ending request, cmd (%x)\n", mrq->cmd->opcode);
817 * The controller needs a reset of internal state machines
818 * upon error conditions.
820 if ((mrq->cmd->error != MMC_ERR_NONE) ||
821 (mrq->data && ((mrq->data->error != MMC_ERR_NONE) ||
822 (mrq->data->stop && (mrq->data->stop->error != MMC_ERR_NONE))))) {
824 /* Some controllers need this kick or reset won't work here */
825 if (host->chip->quirks & SDHCI_QUIRK_CLOCK_BEFORE_RESET) {
828 /* This is to force an update */
831 sdhci_set_clock(host, clock);
834 /* Spec says we should do both at the same time, but Ricoh
835 controllers do not like that. */
836 sdhci_reset(host, SDHCI_RESET_CMD);
837 sdhci_reset(host, SDHCI_RESET_DATA);
844 sdhci_deactivate_led(host);
846 spin_unlock_irqrestore(&host->lock, flags);
848 mmc_request_done(host->mmc, mrq);
851 static void sdhci_timeout_timer(unsigned long data)
853 struct sdhci_host *host;
856 host = (struct sdhci_host*)data;
858 spin_lock_irqsave(&host->lock, flags);
861 printk(KERN_ERR "%s: Timeout waiting for hardware interrupt. "
862 "Please report this to " BUGMAIL ".\n",
863 mmc_hostname(host->mmc));
864 sdhci_dumpregs(host);
867 host->data->error = MMC_ERR_TIMEOUT;
868 sdhci_finish_data(host);
871 host->cmd->error = MMC_ERR_TIMEOUT;
873 host->mrq->cmd->error = MMC_ERR_TIMEOUT;
875 tasklet_schedule(&host->finish_tasklet);
879 spin_unlock_irqrestore(&host->lock, flags);
882 /*****************************************************************************\
884 * Interrupt handling *
886 \*****************************************************************************/
888 static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask)
890 BUG_ON(intmask == 0);
893 printk(KERN_ERR "%s: Got command interrupt even though no "
894 "command operation was in progress.\n",
895 mmc_hostname(host->mmc));
896 printk(KERN_ERR "%s: Please report this to " BUGMAIL ".\n",
897 mmc_hostname(host->mmc));
898 sdhci_dumpregs(host);
902 if (intmask & SDHCI_INT_RESPONSE)
903 sdhci_finish_command(host);
905 if (intmask & SDHCI_INT_TIMEOUT)
906 host->cmd->error = MMC_ERR_TIMEOUT;
907 else if (intmask & SDHCI_INT_CRC)
908 host->cmd->error = MMC_ERR_BADCRC;
909 else if (intmask & (SDHCI_INT_END_BIT | SDHCI_INT_INDEX))
910 host->cmd->error = MMC_ERR_FAILED;
912 host->cmd->error = MMC_ERR_INVALID;
914 tasklet_schedule(&host->finish_tasklet);
918 static void sdhci_data_irq(struct sdhci_host *host, u32 intmask)
920 BUG_ON(intmask == 0);
924 * A data end interrupt is sent together with the response
925 * for the stop command.
927 if (intmask & SDHCI_INT_DATA_END)
930 printk(KERN_ERR "%s: Got data interrupt even though no "
931 "data operation was in progress.\n",
932 mmc_hostname(host->mmc));
933 printk(KERN_ERR "%s: Please report this to " BUGMAIL ".\n",
934 mmc_hostname(host->mmc));
935 sdhci_dumpregs(host);
940 if (intmask & SDHCI_INT_DATA_TIMEOUT)
941 host->data->error = MMC_ERR_TIMEOUT;
942 else if (intmask & SDHCI_INT_DATA_CRC)
943 host->data->error = MMC_ERR_BADCRC;
944 else if (intmask & SDHCI_INT_DATA_END_BIT)
945 host->data->error = MMC_ERR_FAILED;
947 if (host->data->error != MMC_ERR_NONE)
948 sdhci_finish_data(host);
950 if (intmask & (SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL))
951 sdhci_transfer_pio(host);
953 if (intmask & SDHCI_INT_DATA_END)
954 sdhci_finish_data(host);
958 static irqreturn_t sdhci_irq(int irq, void *dev_id, struct pt_regs *regs)
961 struct sdhci_host* host = dev_id;
964 spin_lock(&host->lock);
966 intmask = readl(host->ioaddr + SDHCI_INT_STATUS);
973 DBG("*** %s got interrupt: 0x%08x\n", host->slot_descr, intmask);
975 if (intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE)) {
976 writel(intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE),
977 host->ioaddr + SDHCI_INT_STATUS);
978 tasklet_schedule(&host->card_tasklet);
981 intmask &= ~(SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE);
983 if (intmask & SDHCI_INT_CMD_MASK) {
984 writel(intmask & SDHCI_INT_CMD_MASK,
985 host->ioaddr + SDHCI_INT_STATUS);
986 sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK);
989 if (intmask & SDHCI_INT_DATA_MASK) {
990 writel(intmask & SDHCI_INT_DATA_MASK,
991 host->ioaddr + SDHCI_INT_STATUS);
992 sdhci_data_irq(host, intmask & SDHCI_INT_DATA_MASK);
995 intmask &= ~(SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK);
997 if (intmask & SDHCI_INT_BUS_POWER) {
998 printk(KERN_ERR "%s: Card is consuming too much power!\n",
999 mmc_hostname(host->mmc));
1000 writel(SDHCI_INT_BUS_POWER, host->ioaddr + SDHCI_INT_STATUS);
1003 intmask &= SDHCI_INT_BUS_POWER;
1006 printk(KERN_ERR "%s: Unexpected interrupt 0x%08x. Please "
1007 "report this to " BUGMAIL ".\n",
1008 mmc_hostname(host->mmc), intmask);
1009 sdhci_dumpregs(host);
1011 writel(intmask, host->ioaddr + SDHCI_INT_STATUS);
1014 result = IRQ_HANDLED;
1017 spin_unlock(&host->lock);
1022 /*****************************************************************************\
1026 \*****************************************************************************/
1030 static int sdhci_suspend (struct pci_dev *pdev, pm_message_t state)
1032 struct sdhci_chip *chip;
1035 chip = pci_get_drvdata(pdev);
1039 DBG("Suspending...\n");
1041 for (i = 0;i < chip->num_slots;i++) {
1042 if (!chip->hosts[i])
1044 ret = mmc_suspend_host(chip->hosts[i]->mmc, state);
1046 for (i--;i >= 0;i--)
1047 mmc_resume_host(chip->hosts[i]->mmc);
1052 pci_save_state(pdev);
1053 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
1054 pci_disable_device(pdev);
1055 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1060 static int sdhci_resume (struct pci_dev *pdev)
1062 struct sdhci_chip *chip;
1065 chip = pci_get_drvdata(pdev);
1069 DBG("Resuming...\n");
1071 pci_set_power_state(pdev, PCI_D0);
1072 pci_restore_state(pdev);
1073 pci_enable_device(pdev);
1075 for (i = 0;i < chip->num_slots;i++) {
1076 if (!chip->hosts[i])
1078 if (chip->hosts[i]->flags & SDHCI_USE_DMA)
1079 pci_set_master(pdev);
1080 sdhci_init(chip->hosts[i]);
1081 ret = mmc_resume_host(chip->hosts[i]->mmc);
1089 #else /* CONFIG_PM */
1091 #define sdhci_suspend NULL
1092 #define sdhci_resume NULL
1094 #endif /* CONFIG_PM */
1096 /*****************************************************************************\
1098 * Device probing/removal *
1100 \*****************************************************************************/
1102 static int __devinit sdhci_probe_slot(struct pci_dev *pdev, int slot)
1105 unsigned int version;
1106 struct sdhci_chip *chip;
1107 struct mmc_host *mmc;
1108 struct sdhci_host *host;
1113 chip = pci_get_drvdata(pdev);
1116 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
1120 first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
1122 if (first_bar > 5) {
1123 printk(KERN_ERR DRIVER_NAME ": Invalid first BAR. Aborting.\n");
1127 if (!(pci_resource_flags(pdev, first_bar + slot) & IORESOURCE_MEM)) {
1128 printk(KERN_ERR DRIVER_NAME ": BAR is not iomem. Aborting.\n");
1132 if (pci_resource_len(pdev, first_bar + slot) != 0x100) {
1133 printk(KERN_ERR DRIVER_NAME ": Invalid iomem size. Aborting.\n");
1137 if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
1138 printk(KERN_ERR DRIVER_NAME ": Vendor specific interface. Aborting.\n");
1142 if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) {
1143 printk(KERN_ERR DRIVER_NAME ": Unknown interface. Aborting.\n");
1147 mmc = mmc_alloc_host(sizeof(struct sdhci_host), &pdev->dev);
1151 host = mmc_priv(mmc);
1154 host->bar = first_bar + slot;
1156 host->addr = pci_resource_start(pdev, host->bar);
1157 host->irq = pdev->irq;
1159 DBG("slot %d at 0x%08lx, irq %d\n", slot, host->addr, host->irq);
1161 snprintf(host->slot_descr, 20, "sdhci:slot%d", slot);
1163 ret = pci_request_region(pdev, host->bar, host->slot_descr);
1167 host->ioaddr = ioremap_nocache(host->addr,
1168 pci_resource_len(pdev, host->bar));
1169 if (!host->ioaddr) {
1174 sdhci_reset(host, SDHCI_RESET_ALL);
1176 version = readw(host->ioaddr + SDHCI_HOST_VERSION);
1177 version = (version & SDHCI_SPEC_VER_MASK) >> SDHCI_SPEC_VER_SHIFT;
1179 printk(KERN_ERR "%s: Unknown controller version (%d). "
1180 "Cowardly refusing to continue.\n", host->slot_descr,
1186 caps = readl(host->ioaddr + SDHCI_CAPABILITIES);
1189 DBG("DMA forced off\n");
1190 else if (debug_forcedma) {
1191 DBG("DMA forced on\n");
1192 host->flags |= SDHCI_USE_DMA;
1193 } else if ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA)
1194 DBG("Controller doesn't have DMA interface\n");
1195 else if (!(caps & SDHCI_CAN_DO_DMA))
1196 DBG("Controller doesn't have DMA capability\n");
1198 host->flags |= SDHCI_USE_DMA;
1200 if (host->flags & SDHCI_USE_DMA) {
1201 if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
1202 printk(KERN_WARNING "%s: No suitable DMA available. "
1203 "Falling back to PIO.\n", host->slot_descr);
1204 host->flags &= ~SDHCI_USE_DMA;
1208 if (host->flags & SDHCI_USE_DMA)
1209 pci_set_master(pdev);
1210 else /* XXX: Hack to get MMC layer to avoid highmem */
1214 (caps & SDHCI_CLOCK_BASE_MASK) >> SDHCI_CLOCK_BASE_SHIFT;
1215 if (host->max_clk == 0) {
1216 printk(KERN_ERR "%s: Hardware doesn't specify base clock "
1217 "frequency.\n", host->slot_descr);
1221 host->max_clk *= 1000000;
1224 (caps & SDHCI_TIMEOUT_CLK_MASK) >> SDHCI_TIMEOUT_CLK_SHIFT;
1225 if (host->timeout_clk == 0) {
1226 printk(KERN_ERR "%s: Hardware doesn't specify timeout clock "
1227 "frequency.\n", host->slot_descr);
1231 if (caps & SDHCI_TIMEOUT_CLK_UNIT)
1232 host->timeout_clk *= 1000;
1234 host->max_block = (caps & SDHCI_MAX_BLOCK_MASK) >> SDHCI_MAX_BLOCK_SHIFT;
1235 if (host->max_block >= 3) {
1236 printk(KERN_ERR "%s: Invalid maximum block size.\n",
1241 host->max_block = 512 << host->max_block;
1244 * Set host parameters.
1246 mmc->ops = &sdhci_ops;
1247 mmc->f_min = host->max_clk / 256;
1248 mmc->f_max = host->max_clk;
1249 mmc->caps = MMC_CAP_4_BIT_DATA;
1252 if (caps & SDHCI_CAN_VDD_330)
1253 mmc->ocr_avail |= MMC_VDD_32_33|MMC_VDD_33_34;
1254 else if (caps & SDHCI_CAN_VDD_300)
1255 mmc->ocr_avail |= MMC_VDD_29_30|MMC_VDD_30_31;
1256 else if (caps & SDHCI_CAN_VDD_180)
1257 mmc->ocr_avail |= MMC_VDD_17_18|MMC_VDD_18_19;
1259 if (mmc->ocr_avail == 0) {
1260 printk(KERN_ERR "%s: Hardware doesn't report any "
1261 "support voltages.\n", host->slot_descr);
1266 spin_lock_init(&host->lock);
1269 * Maximum number of segments. Hardware cannot do scatter lists.
1271 if (host->flags & SDHCI_USE_DMA)
1272 mmc->max_hw_segs = 1;
1274 mmc->max_hw_segs = 16;
1275 mmc->max_phys_segs = 16;
1278 * Maximum number of sectors in one transfer. Limited by DMA boundary
1279 * size (512KiB), which means (512 KiB/512=) 1024 entries.
1281 mmc->max_sectors = 1024;
1284 * Maximum segment size. Could be one segment with the maximum number
1287 mmc->max_seg_size = mmc->max_sectors * 512;
1292 tasklet_init(&host->card_tasklet,
1293 sdhci_tasklet_card, (unsigned long)host);
1294 tasklet_init(&host->finish_tasklet,
1295 sdhci_tasklet_finish, (unsigned long)host);
1297 setup_timer(&host->timer, sdhci_timeout_timer, (long)host);
1299 ret = request_irq(host->irq, sdhci_irq, SA_SHIRQ,
1300 host->slot_descr, host);
1306 #ifdef CONFIG_MMC_DEBUG
1307 sdhci_dumpregs(host);
1311 chip->hosts[slot] = host;
1315 printk(KERN_INFO "%s: SDHCI at 0x%08lx irq %d %s\n", mmc_hostname(mmc),
1316 host->addr, host->irq,
1317 (host->flags & SDHCI_USE_DMA)?"DMA":"PIO");
1322 tasklet_kill(&host->card_tasklet);
1323 tasklet_kill(&host->finish_tasklet);
1325 iounmap(host->ioaddr);
1327 pci_release_region(pdev, host->bar);
1334 static void sdhci_remove_slot(struct pci_dev *pdev, int slot)
1336 struct sdhci_chip *chip;
1337 struct mmc_host *mmc;
1338 struct sdhci_host *host;
1340 chip = pci_get_drvdata(pdev);
1341 host = chip->hosts[slot];
1344 chip->hosts[slot] = NULL;
1346 mmc_remove_host(mmc);
1348 sdhci_reset(host, SDHCI_RESET_ALL);
1350 free_irq(host->irq, host);
1352 del_timer_sync(&host->timer);
1354 tasklet_kill(&host->card_tasklet);
1355 tasklet_kill(&host->finish_tasklet);
1357 iounmap(host->ioaddr);
1359 pci_release_region(pdev, host->bar);
1364 static int __devinit sdhci_probe(struct pci_dev *pdev,
1365 const struct pci_device_id *ent)
1369 struct sdhci_chip *chip;
1371 BUG_ON(pdev == NULL);
1372 BUG_ON(ent == NULL);
1374 pci_read_config_byte(pdev, PCI_CLASS_REVISION, &rev);
1376 printk(KERN_INFO DRIVER_NAME
1377 ": SDHCI controller found at %s [%04x:%04x] (rev %x)\n",
1378 pci_name(pdev), (int)pdev->vendor, (int)pdev->device,
1381 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
1385 slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
1386 DBG("found %d slot(s)\n", slots);
1390 ret = pci_enable_device(pdev);
1394 chip = kzalloc(sizeof(struct sdhci_chip) +
1395 sizeof(struct sdhci_host*) * slots, GFP_KERNEL);
1402 chip->quirks = ent->driver_data;
1405 chip->quirks = debug_quirks;
1407 chip->num_slots = slots;
1408 pci_set_drvdata(pdev, chip);
1410 for (i = 0;i < slots;i++) {
1411 ret = sdhci_probe_slot(pdev, i);
1413 for (i--;i >= 0;i--)
1414 sdhci_remove_slot(pdev, i);
1422 pci_set_drvdata(pdev, NULL);
1426 pci_disable_device(pdev);
1430 static void __devexit sdhci_remove(struct pci_dev *pdev)
1433 struct sdhci_chip *chip;
1435 chip = pci_get_drvdata(pdev);
1438 for (i = 0;i < chip->num_slots;i++)
1439 sdhci_remove_slot(pdev, i);
1441 pci_set_drvdata(pdev, NULL);
1446 pci_disable_device(pdev);
1449 static struct pci_driver sdhci_driver = {
1450 .name = DRIVER_NAME,
1451 .id_table = pci_ids,
1452 .probe = sdhci_probe,
1453 .remove = __devexit_p(sdhci_remove),
1454 .suspend = sdhci_suspend,
1455 .resume = sdhci_resume,
1458 /*****************************************************************************\
1460 * Driver init/exit *
1462 \*****************************************************************************/
1464 static int __init sdhci_drv_init(void)
1466 printk(KERN_INFO DRIVER_NAME
1467 ": Secure Digital Host Controller Interface driver, "
1468 DRIVER_VERSION "\n");
1469 printk(KERN_INFO DRIVER_NAME ": Copyright(c) Pierre Ossman\n");
1471 return pci_register_driver(&sdhci_driver);
1474 static void __exit sdhci_drv_exit(void)
1478 pci_unregister_driver(&sdhci_driver);
1481 module_init(sdhci_drv_init);
1482 module_exit(sdhci_drv_exit);
1484 module_param(debug_nodma, uint, 0444);
1485 module_param(debug_forcedma, uint, 0444);
1486 module_param(debug_quirks, uint, 0444);
1488 MODULE_AUTHOR("Pierre Ossman <drzeus@drzeus.cx>");
1489 MODULE_DESCRIPTION("Secure Digital Host Controller Interface driver");
1490 MODULE_VERSION(DRIVER_VERSION);
1491 MODULE_LICENSE("GPL");
1493 MODULE_PARM_DESC(debug_nodma, "Forcefully disable DMA transfers. (default 0)");
1494 MODULE_PARM_DESC(debug_forcedma, "Forcefully enable DMA transfers. (default 0)");
1495 MODULE_PARM_DESC(debug_quirks, "Force certain quirks.");