2 * linux/drivers/mtd/onenand/onenand_base.c
4 * Copyright (C) 2005-2007 Samsung Electronics
5 * Kyungmin Park <kyungmin.park@samsung.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/sched.h>
16 #include <linux/interrupt.h>
17 #include <linux/jiffies.h>
18 #include <linux/mtd/mtd.h>
19 #include <linux/mtd/onenand.h>
20 #include <linux/mtd/partitions.h>
25 * onenand_oob_64 - oob info for large (2KB) page
27 static struct nand_ecclayout onenand_oob_64 = {
36 {2, 3}, {14, 2}, {18, 3}, {30, 2},
37 {34, 3}, {46, 2}, {50, 3}, {62, 2}
42 * onenand_oob_32 - oob info for middle (1KB) page
44 static struct nand_ecclayout onenand_oob_32 = {
50 .oobfree = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
53 static const unsigned char ffchars[] = {
54 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
55 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
56 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
57 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
58 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
59 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
60 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
61 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
65 * onenand_readw - [OneNAND Interface] Read OneNAND register
66 * @param addr address to read
68 * Read OneNAND register
70 static unsigned short onenand_readw(void __iomem *addr)
76 * onenand_writew - [OneNAND Interface] Write OneNAND register with value
77 * @param value value to write
78 * @param addr address to write
80 * Write OneNAND register with value
82 static void onenand_writew(unsigned short value, void __iomem *addr)
88 * onenand_block_address - [DEFAULT] Get block address
89 * @param this onenand chip data structure
90 * @param block the block
91 * @return translated block address if DDP, otherwise same
93 * Setup Start Address 1 Register (F100h)
95 static int onenand_block_address(struct onenand_chip *this, int block)
97 /* Device Flash Core select, NAND Flash Block Address */
98 if (block & this->density_mask)
99 return ONENAND_DDP_CHIP1 | (block ^ this->density_mask);
105 * onenand_bufferram_address - [DEFAULT] Get bufferram address
106 * @param this onenand chip data structure
107 * @param block the block
108 * @return set DBS value if DDP, otherwise 0
110 * Setup Start Address 2 Register (F101h) for DDP
112 static int onenand_bufferram_address(struct onenand_chip *this, int block)
114 /* Device BufferRAM Select */
115 if (block & this->density_mask)
116 return ONENAND_DDP_CHIP1;
118 return ONENAND_DDP_CHIP0;
122 * onenand_page_address - [DEFAULT] Get page address
123 * @param page the page address
124 * @param sector the sector address
125 * @return combined page and sector address
127 * Setup Start Address 8 Register (F107h)
129 static int onenand_page_address(int page, int sector)
131 /* Flash Page Address, Flash Sector Address */
134 fpa = page & ONENAND_FPA_MASK;
135 fsa = sector & ONENAND_FSA_MASK;
137 return ((fpa << ONENAND_FPA_SHIFT) | fsa);
141 * onenand_buffer_address - [DEFAULT] Get buffer address
142 * @param dataram1 DataRAM index
143 * @param sectors the sector address
144 * @param count the number of sectors
145 * @return the start buffer value
147 * Setup Start Buffer Register (F200h)
149 static int onenand_buffer_address(int dataram1, int sectors, int count)
153 /* BufferRAM Sector Address */
154 bsa = sectors & ONENAND_BSA_MASK;
157 bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */
159 bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */
161 /* BufferRAM Sector Count */
162 bsc = count & ONENAND_BSC_MASK;
164 return ((bsa << ONENAND_BSA_SHIFT) | bsc);
168 * onenand_command - [DEFAULT] Send command to OneNAND device
169 * @param mtd MTD device structure
170 * @param cmd the command to be sent
171 * @param addr offset to read from or write to
172 * @param len number of bytes to read or write
174 * Send command to OneNAND device. This function is used for middle/large page
175 * devices (1KB/2KB Bytes per page)
177 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
179 struct onenand_chip *this = mtd->priv;
180 int value, readcmd = 0, block_cmd = 0;
183 /* Address translation */
185 case ONENAND_CMD_UNLOCK:
186 case ONENAND_CMD_LOCK:
187 case ONENAND_CMD_LOCK_TIGHT:
188 case ONENAND_CMD_UNLOCK_ALL:
193 case ONENAND_CMD_ERASE:
194 case ONENAND_CMD_BUFFERRAM:
195 case ONENAND_CMD_OTP_ACCESS:
197 block = (int) (addr >> this->erase_shift);
202 block = (int) (addr >> this->erase_shift);
203 page = (int) (addr >> this->page_shift);
204 page &= this->page_mask;
208 /* NOTE: The setting order of the registers is very important! */
209 if (cmd == ONENAND_CMD_BUFFERRAM) {
210 /* Select DataRAM for DDP */
211 value = onenand_bufferram_address(this, block);
212 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
214 /* Switch to the next data buffer */
215 ONENAND_SET_NEXT_BUFFERRAM(this);
221 /* Write 'DFS, FBA' of Flash */
222 value = onenand_block_address(this, block);
223 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
226 /* Select DataRAM for DDP */
227 value = onenand_bufferram_address(this, block);
228 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
233 /* Now we use page size operation */
234 int sectors = 4, count = 4;
238 case ONENAND_CMD_READ:
239 case ONENAND_CMD_READOOB:
240 dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
245 dataram = ONENAND_CURRENT_BUFFERRAM(this);
249 /* Write 'FPA, FSA' of Flash */
250 value = onenand_page_address(page, sectors);
251 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
253 /* Write 'BSA, BSC' of DataRAM */
254 value = onenand_buffer_address(dataram, sectors, count);
255 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
258 /* Select DataRAM for DDP */
259 value = onenand_bufferram_address(this, block);
260 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
264 /* Interrupt clear */
265 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
268 this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
274 * onenand_wait - [DEFAULT] wait until the command is done
275 * @param mtd MTD device structure
276 * @param state state to select the max. timeout value
278 * Wait for command done. This applies to all OneNAND command
279 * Read can take up to 30us, erase up to 2ms and program up to 350us
280 * according to general OneNAND specs
282 static int onenand_wait(struct mtd_info *mtd, int state)
284 struct onenand_chip * this = mtd->priv;
285 unsigned long timeout;
286 unsigned int flags = ONENAND_INT_MASTER;
287 unsigned int interrupt = 0;
290 /* The 20 msec is enough */
291 timeout = jiffies + msecs_to_jiffies(20);
292 while (time_before(jiffies, timeout)) {
293 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
295 if (interrupt & flags)
298 if (state != FL_READING)
301 /* To get correct interrupt status in timeout case */
302 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
304 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
306 if (ctrl & ONENAND_CTRL_ERROR) {
307 printk(KERN_ERR "onenand_wait: controller error = 0x%04x\n", ctrl);
308 if (ctrl & ONENAND_CTRL_LOCK)
309 printk(KERN_ERR "onenand_wait: it's locked error.\n");
313 if (interrupt & ONENAND_INT_READ) {
314 int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
316 printk(KERN_ERR "onenand_wait: ECC error = 0x%04x\n", ecc);
317 if (ecc & ONENAND_ECC_2BIT_ALL) {
318 mtd->ecc_stats.failed++;
320 } else if (ecc & ONENAND_ECC_1BIT_ALL)
321 mtd->ecc_stats.corrected++;
323 } else if (state == FL_READING) {
324 printk(KERN_ERR "onenand_wait: read timeout! ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
332 * onenand_interrupt - [DEFAULT] onenand interrupt handler
333 * @param irq onenand interrupt number
334 * @param dev_id interrupt data
338 static irqreturn_t onenand_interrupt(int irq, void *data)
340 struct onenand_chip *this = (struct onenand_chip *) data;
342 /* To handle shared interrupt */
343 if (!this->complete.done)
344 complete(&this->complete);
350 * onenand_interrupt_wait - [DEFAULT] wait until the command is done
351 * @param mtd MTD device structure
352 * @param state state to select the max. timeout value
354 * Wait for command done.
356 static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
358 struct onenand_chip *this = mtd->priv;
360 wait_for_completion(&this->complete);
362 return onenand_wait(mtd, state);
366 * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
367 * @param mtd MTD device structure
368 * @param state state to select the max. timeout value
370 * Try interrupt based wait (It is used one-time)
372 static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
374 struct onenand_chip *this = mtd->priv;
375 unsigned long remain, timeout;
377 /* We use interrupt wait first */
378 this->wait = onenand_interrupt_wait;
380 timeout = msecs_to_jiffies(100);
381 remain = wait_for_completion_timeout(&this->complete, timeout);
383 printk(KERN_INFO "OneNAND: There's no interrupt. "
384 "We use the normal wait\n");
386 /* Release the irq */
387 free_irq(this->irq, this);
389 this->wait = onenand_wait;
392 return onenand_wait(mtd, state);
396 * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
397 * @param mtd MTD device structure
399 * There's two method to wait onenand work
400 * 1. polling - read interrupt status register
401 * 2. interrupt - use the kernel interrupt method
403 static void onenand_setup_wait(struct mtd_info *mtd)
405 struct onenand_chip *this = mtd->priv;
408 init_completion(&this->complete);
410 if (this->irq <= 0) {
411 this->wait = onenand_wait;
415 if (request_irq(this->irq, &onenand_interrupt,
416 IRQF_SHARED, "onenand", this)) {
417 /* If we can't get irq, use the normal wait */
418 this->wait = onenand_wait;
422 /* Enable interrupt */
423 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
424 syscfg |= ONENAND_SYS_CFG1_IOBE;
425 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
427 this->wait = onenand_try_interrupt_wait;
431 * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
432 * @param mtd MTD data structure
433 * @param area BufferRAM area
434 * @return offset given area
436 * Return BufferRAM offset given area
438 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
440 struct onenand_chip *this = mtd->priv;
442 if (ONENAND_CURRENT_BUFFERRAM(this)) {
443 if (area == ONENAND_DATARAM)
444 return mtd->writesize;
445 if (area == ONENAND_SPARERAM)
453 * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
454 * @param mtd MTD data structure
455 * @param area BufferRAM area
456 * @param buffer the databuffer to put/get data
457 * @param offset offset to read from or write to
458 * @param count number of bytes to read/write
460 * Read the BufferRAM area
462 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
463 unsigned char *buffer, int offset, size_t count)
465 struct onenand_chip *this = mtd->priv;
466 void __iomem *bufferram;
468 bufferram = this->base + area;
470 bufferram += onenand_bufferram_offset(mtd, area);
472 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
475 /* Align with word(16-bit) size */
478 /* Read word and save byte */
479 word = this->read_word(bufferram + offset + count);
480 buffer[count] = (word & 0xff);
483 memcpy(buffer, bufferram + offset, count);
489 * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
490 * @param mtd MTD data structure
491 * @param area BufferRAM area
492 * @param buffer the databuffer to put/get data
493 * @param offset offset to read from or write to
494 * @param count number of bytes to read/write
496 * Read the BufferRAM area with Sync. Burst Mode
498 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
499 unsigned char *buffer, int offset, size_t count)
501 struct onenand_chip *this = mtd->priv;
502 void __iomem *bufferram;
504 bufferram = this->base + area;
506 bufferram += onenand_bufferram_offset(mtd, area);
508 this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
510 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
513 /* Align with word(16-bit) size */
516 /* Read word and save byte */
517 word = this->read_word(bufferram + offset + count);
518 buffer[count] = (word & 0xff);
521 memcpy(buffer, bufferram + offset, count);
523 this->mmcontrol(mtd, 0);
529 * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
530 * @param mtd MTD data structure
531 * @param area BufferRAM area
532 * @param buffer the databuffer to put/get data
533 * @param offset offset to read from or write to
534 * @param count number of bytes to read/write
536 * Write the BufferRAM area
538 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
539 const unsigned char *buffer, int offset, size_t count)
541 struct onenand_chip *this = mtd->priv;
542 void __iomem *bufferram;
544 bufferram = this->base + area;
546 bufferram += onenand_bufferram_offset(mtd, area);
548 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
552 /* Align with word(16-bit) size */
555 /* Calculate byte access offset */
556 byte_offset = offset + count;
558 /* Read word and save byte */
559 word = this->read_word(bufferram + byte_offset);
560 word = (word & ~0xff) | buffer[count];
561 this->write_word(word, bufferram + byte_offset);
564 memcpy(bufferram + offset, buffer, count);
570 * onenand_check_bufferram - [GENERIC] Check BufferRAM information
571 * @param mtd MTD data structure
572 * @param addr address to check
573 * @return 1 if there are valid data, otherwise 0
575 * Check bufferram if there is data we required
577 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
579 struct onenand_chip *this = mtd->priv;
580 int blockpage, found = 0;
583 blockpage = (int) (addr >> this->page_shift);
585 /* Is there valid data? */
586 i = ONENAND_CURRENT_BUFFERRAM(this);
587 if (this->bufferram[i].blockpage == blockpage)
590 /* Check another BufferRAM */
591 i = ONENAND_NEXT_BUFFERRAM(this);
592 if (this->bufferram[i].blockpage == blockpage) {
593 ONENAND_SET_NEXT_BUFFERRAM(this);
598 if (found && ONENAND_IS_DDP(this)) {
599 /* Select DataRAM for DDP */
600 int block = (int) (addr >> this->erase_shift);
601 int value = onenand_bufferram_address(this, block);
602 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
609 * onenand_update_bufferram - [GENERIC] Update BufferRAM information
610 * @param mtd MTD data structure
611 * @param addr address to update
612 * @param valid valid flag
614 * Update BufferRAM information
616 static void onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
619 struct onenand_chip *this = mtd->priv;
623 blockpage = (int) (addr >> this->page_shift);
625 /* Invalidate another BufferRAM */
626 i = ONENAND_NEXT_BUFFERRAM(this);
627 if (this->bufferram[i].blockpage == blockpage)
628 this->bufferram[i].blockpage = -1;
630 /* Update BufferRAM */
631 i = ONENAND_CURRENT_BUFFERRAM(this);
633 this->bufferram[i].blockpage = blockpage;
635 this->bufferram[i].blockpage = -1;
639 * onenand_get_device - [GENERIC] Get chip for selected access
640 * @param mtd MTD device structure
641 * @param new_state the state which is requested
643 * Get the device and lock it for exclusive access
645 static int onenand_get_device(struct mtd_info *mtd, int new_state)
647 struct onenand_chip *this = mtd->priv;
648 DECLARE_WAITQUEUE(wait, current);
651 * Grab the lock and see if the device is available
654 spin_lock(&this->chip_lock);
655 if (this->state == FL_READY) {
656 this->state = new_state;
657 spin_unlock(&this->chip_lock);
660 if (new_state == FL_PM_SUSPENDED) {
661 spin_unlock(&this->chip_lock);
662 return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
664 set_current_state(TASK_UNINTERRUPTIBLE);
665 add_wait_queue(&this->wq, &wait);
666 spin_unlock(&this->chip_lock);
668 remove_wait_queue(&this->wq, &wait);
675 * onenand_release_device - [GENERIC] release chip
676 * @param mtd MTD device structure
678 * Deselect, release chip lock and wake up anyone waiting on the device
680 static void onenand_release_device(struct mtd_info *mtd)
682 struct onenand_chip *this = mtd->priv;
684 /* Release the chip */
685 spin_lock(&this->chip_lock);
686 this->state = FL_READY;
688 spin_unlock(&this->chip_lock);
692 * onenand_read - [MTD Interface] Read data from flash
693 * @param mtd MTD device structure
694 * @param from offset to read from
695 * @param len number of bytes to read
696 * @param retlen pointer to variable to store the number of read bytes
697 * @param buf the databuffer to put data
701 static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
702 size_t *retlen, u_char *buf)
704 struct onenand_chip *this = mtd->priv;
705 struct mtd_ecc_stats stats;
706 int read = 0, column;
708 int ret = 0, boundary = 0;
710 DEBUG(MTD_DEBUG_LEVEL3, "onenand_read: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
712 /* Do not allow reads past end of device */
713 if ((from + len) > mtd->size) {
714 printk(KERN_ERR "onenand_read: Attempt read beyond end of device\n");
719 /* Grab the lock and see if the device is available */
720 onenand_get_device(mtd, FL_READING);
722 stats = mtd->ecc_stats;
724 /* Read-while-load method */
726 /* Do first load to bufferRAM */
728 if (!onenand_check_bufferram(mtd, from)) {
729 this->command(mtd, ONENAND_CMD_READ, from, mtd->writesize);
730 ret = this->wait(mtd, FL_READING);
731 onenand_update_bufferram(mtd, from, !ret);
735 thislen = min_t(int, mtd->writesize, len - read);
736 column = from & (mtd->writesize - 1);
737 if (column + thislen > mtd->writesize)
738 thislen = mtd->writesize - column;
741 /* If there is more to load then start next load */
743 if (read + thislen < len) {
744 this->command(mtd, ONENAND_CMD_READ, from, mtd->writesize);
746 * Chip boundary handling in DDP
747 * Now we issued chip 1 read and pointed chip 1
748 * bufferam so we have to point chip 0 bufferam.
750 if (ONENAND_IS_DDP(this) &&
751 unlikely(from == (this->chipsize >> 1))) {
752 this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2);
756 ONENAND_SET_PREV_BUFFERRAM(this);
758 /* While load is going, read from last bufferRAM */
759 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
760 /* See if we are done */
764 /* Set up for next read from bufferRAM */
765 if (unlikely(boundary))
766 this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2);
767 ONENAND_SET_NEXT_BUFFERRAM(this);
769 thislen = min_t(int, mtd->writesize, len - read);
772 /* Now wait for load */
773 ret = this->wait(mtd, FL_READING);
774 onenand_update_bufferram(mtd, from, !ret);
777 /* Deselect and wake up anyone waiting on the device */
778 onenand_release_device(mtd);
781 * Return success, if no ECC failures, else -EBADMSG
782 * fs driver will take care of that, because
783 * retlen == desired len and result == -EBADMSG
787 if (mtd->ecc_stats.failed - stats.failed)
793 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
797 * onenand_transfer_auto_oob - [Internal] oob auto-placement transfer
798 * @param mtd MTD device structure
799 * @param buf destination address
800 * @param column oob offset to read from
801 * @param thislen oob length to read
803 static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, int column,
806 struct onenand_chip *this = mtd->priv;
807 struct nand_oobfree *free;
808 int readcol = column;
809 int readend = column + thislen;
811 uint8_t *oob_buf = this->page_buf + mtd->writesize;
813 for (free = this->ecclayout->oobfree; free->length; ++free) {
814 if (readcol >= lastgap)
815 readcol += free->offset - lastgap;
816 if (readend >= lastgap)
817 readend += free->offset - lastgap;
818 lastgap = free->offset + free->length;
820 this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
821 for (free = this->ecclayout->oobfree; free->length; ++free) {
822 int free_end = free->offset + free->length;
823 if (free->offset < readend && free_end > readcol) {
824 int st = max_t(int,free->offset,readcol);
825 int ed = min_t(int,free_end,readend);
827 memcpy(buf, oob_buf + st, n);
835 * onenand_do_read_oob - [MTD Interface] OneNAND read out-of-band
836 * @param mtd MTD device structure
837 * @param from offset to read from
838 * @param len number of bytes to read
839 * @param retlen pointer to variable to store the number of read bytes
840 * @param buf the databuffer to put data
841 * @param mode operation mode
843 * OneNAND read out-of-band data from the spare area
845 static int onenand_do_read_oob(struct mtd_info *mtd, loff_t from, size_t len,
846 size_t *retlen, u_char *buf, mtd_oob_mode_t mode)
848 struct onenand_chip *this = mtd->priv;
849 int read = 0, thislen, column, oobsize;
852 DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
854 /* Initialize return length value */
857 if (mode == MTD_OOB_AUTO)
858 oobsize = this->ecclayout->oobavail;
860 oobsize = mtd->oobsize;
862 column = from & (mtd->oobsize - 1);
864 if (unlikely(column >= oobsize)) {
865 printk(KERN_ERR "onenand_read_oob: Attempted to start read outside oob\n");
869 /* Do not allow reads past end of device */
870 if (unlikely(from >= mtd->size ||
871 column + len > ((mtd->size >> this->page_shift) -
872 (from >> this->page_shift)) * oobsize)) {
873 printk(KERN_ERR "onenand_read_oob: Attempted to read beyond end of device\n");
877 /* Grab the lock and see if the device is available */
878 onenand_get_device(mtd, FL_READING);
883 thislen = oobsize - column;
884 thislen = min_t(int, thislen, len);
886 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
888 onenand_update_bufferram(mtd, from, 0);
890 ret = this->wait(mtd, FL_READING);
891 /* First copy data and check return value for ECC handling */
893 if (mode == MTD_OOB_AUTO)
894 onenand_transfer_auto_oob(mtd, buf, column, thislen);
896 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
899 printk(KERN_ERR "onenand_read_oob: read failed = 0x%x\n", ret);
913 from += mtd->writesize;
918 /* Deselect and wake up anyone waiting on the device */
919 onenand_release_device(mtd);
926 * onenand_read_oob - [MTD Interface] NAND write data and/or out-of-band
927 * @mtd: MTD device structure
928 * @from: offset to read from
929 * @ops: oob operation description structure
931 static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
932 struct mtd_oob_ops *ops)
939 /* Not implemented yet */
943 return onenand_do_read_oob(mtd, from + ops->ooboffs, ops->ooblen,
944 &ops->oobretlen, ops->oobbuf, ops->mode);
948 * onenand_bbt_wait - [DEFAULT] wait until the command is done
949 * @param mtd MTD device structure
950 * @param state state to select the max. timeout value
952 * Wait for command done.
954 static int onenand_bbt_wait(struct mtd_info *mtd, int state)
956 struct onenand_chip *this = mtd->priv;
957 unsigned long timeout;
958 unsigned int interrupt;
961 /* The 20 msec is enough */
962 timeout = jiffies + msecs_to_jiffies(20);
963 while (time_before(jiffies, timeout)) {
964 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
965 if (interrupt & ONENAND_INT_MASTER)
968 /* To get correct interrupt status in timeout case */
969 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
970 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
972 if (ctrl & ONENAND_CTRL_ERROR) {
973 printk(KERN_DEBUG "onenand_bbt_wait: controller error = 0x%04x\n", ctrl);
974 /* Initial bad block case */
975 if (ctrl & ONENAND_CTRL_LOAD)
976 return ONENAND_BBT_READ_ERROR;
977 return ONENAND_BBT_READ_FATAL_ERROR;
980 if (interrupt & ONENAND_INT_READ) {
981 int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
982 if (ecc & ONENAND_ECC_2BIT_ALL)
983 return ONENAND_BBT_READ_ERROR;
985 printk(KERN_ERR "onenand_bbt_wait: read timeout!"
986 "ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
987 return ONENAND_BBT_READ_FATAL_ERROR;
994 * onenand_bbt_read_oob - [MTD Interface] OneNAND read out-of-band for bbt scan
995 * @param mtd MTD device structure
996 * @param from offset to read from
997 * @param @ops oob operation description structure
999 * OneNAND read out-of-band data from the spare area for bbt scan
1001 int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from,
1002 struct mtd_oob_ops *ops)
1004 struct onenand_chip *this = mtd->priv;
1005 int read = 0, thislen, column;
1007 size_t len = ops->ooblen;
1008 u_char *buf = ops->oobbuf;
1010 DEBUG(MTD_DEBUG_LEVEL3, "onenand_bbt_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, len);
1012 /* Initialize return value */
1015 /* Do not allow reads past end of device */
1016 if (unlikely((from + len) > mtd->size)) {
1017 printk(KERN_ERR "onenand_bbt_read_oob: Attempt read beyond end of device\n");
1018 return ONENAND_BBT_READ_FATAL_ERROR;
1021 /* Grab the lock and see if the device is available */
1022 onenand_get_device(mtd, FL_READING);
1024 column = from & (mtd->oobsize - 1);
1026 while (read < len) {
1029 thislen = mtd->oobsize - column;
1030 thislen = min_t(int, thislen, len);
1032 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
1034 onenand_update_bufferram(mtd, from, 0);
1036 ret = onenand_bbt_wait(mtd, FL_READING);
1040 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
1049 /* Update Page size */
1050 from += mtd->writesize;
1055 /* Deselect and wake up anyone waiting on the device */
1056 onenand_release_device(mtd);
1058 ops->oobretlen = read;
1062 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
1064 * onenand_verify_oob - [GENERIC] verify the oob contents after a write
1065 * @param mtd MTD device structure
1066 * @param buf the databuffer to verify
1067 * @param to offset to read from
1070 static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to)
1072 struct onenand_chip *this = mtd->priv;
1073 char *readp = this->page_buf + mtd->writesize;
1076 this->command(mtd, ONENAND_CMD_READOOB, to, mtd->oobsize);
1077 onenand_update_bufferram(mtd, to, 0);
1078 status = this->wait(mtd, FL_READING);
1082 this->read_bufferram(mtd, ONENAND_SPARERAM, readp, 0, mtd->oobsize);
1083 for(i = 0; i < mtd->oobsize; i++)
1084 if (buf[i] != 0xFF && buf[i] != readp[i])
1091 * onenand_verify - [GENERIC] verify the chip contents after a write
1092 * @param mtd MTD device structure
1093 * @param buf the databuffer to verify
1094 * @param addr offset to read from
1095 * @param len number of bytes to read and compare
1098 static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len)
1100 struct onenand_chip *this = mtd->priv;
1101 void __iomem *dataram;
1103 int thislen, column;
1106 thislen = min_t(int, mtd->writesize, len);
1107 column = addr & (mtd->writesize - 1);
1108 if (column + thislen > mtd->writesize)
1109 thislen = mtd->writesize - column;
1111 this->command(mtd, ONENAND_CMD_READ, addr, mtd->writesize);
1113 onenand_update_bufferram(mtd, addr, 0);
1115 ret = this->wait(mtd, FL_READING);
1119 onenand_update_bufferram(mtd, addr, 1);
1121 dataram = this->base + ONENAND_DATARAM;
1122 dataram += onenand_bufferram_offset(mtd, ONENAND_DATARAM);
1124 if (memcmp(buf, dataram + column, thislen))
1135 #define onenand_verify(...) (0)
1136 #define onenand_verify_oob(...) (0)
1139 #define NOTALIGNED(x) ((x & (this->subpagesize - 1)) != 0)
1142 * onenand_write - [MTD Interface] write buffer to FLASH
1143 * @param mtd MTD device structure
1144 * @param to offset to write to
1145 * @param len number of bytes to write
1146 * @param retlen pointer to variable to store the number of written bytes
1147 * @param buf the data to write
1151 static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
1152 size_t *retlen, const u_char *buf)
1154 struct onenand_chip *this = mtd->priv;
1157 int column, subpage;
1159 DEBUG(MTD_DEBUG_LEVEL3, "onenand_write: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1161 /* Initialize retlen, in case of early exit */
1164 /* Do not allow writes past end of device */
1165 if (unlikely((to + len) > mtd->size)) {
1166 printk(KERN_ERR "onenand_write: Attempt write to past end of device\n");
1170 /* Reject writes, which are not page aligned */
1171 if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) {
1172 printk(KERN_ERR "onenand_write: Attempt to write not page aligned data\n");
1176 column = to & (mtd->writesize - 1);
1178 /* Grab the lock and see if the device is available */
1179 onenand_get_device(mtd, FL_WRITING);
1181 /* Loop until all data write */
1182 while (written < len) {
1183 int thislen = min_t(int, mtd->writesize - column, len - written);
1184 u_char *wbuf = (u_char *) buf;
1188 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
1190 /* Partial page write */
1191 subpage = thislen < mtd->writesize;
1193 memset(this->page_buf, 0xff, mtd->writesize);
1194 memcpy(this->page_buf + column, buf, thislen);
1195 wbuf = this->page_buf;
1198 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
1199 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
1201 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1203 ret = this->wait(mtd, FL_WRITING);
1205 /* In partial page write we don't update bufferram */
1206 onenand_update_bufferram(mtd, to, !ret && !subpage);
1209 printk(KERN_ERR "onenand_write: write filaed %d\n", ret);
1213 /* Only check verify write turn on */
1214 ret = onenand_verify(mtd, (u_char *) wbuf, to, thislen);
1216 printk(KERN_ERR "onenand_write: verify failed %d\n", ret);
1230 /* Deselect and wake up anyone waiting on the device */
1231 onenand_release_device(mtd);
1239 * onenand_fill_auto_oob - [Internal] oob auto-placement transfer
1240 * @param mtd MTD device structure
1241 * @param oob_buf oob buffer
1242 * @param buf source address
1243 * @param column oob offset to write to
1244 * @param thislen oob length to write
1246 static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf,
1247 const u_char *buf, int column, int thislen)
1249 struct onenand_chip *this = mtd->priv;
1250 struct nand_oobfree *free;
1251 int writecol = column;
1252 int writeend = column + thislen;
1255 for (free = this->ecclayout->oobfree; free->length; ++free) {
1256 if (writecol >= lastgap)
1257 writecol += free->offset - lastgap;
1258 if (writeend >= lastgap)
1259 writeend += free->offset - lastgap;
1260 lastgap = free->offset + free->length;
1262 for (free = this->ecclayout->oobfree; free->length; ++free) {
1263 int free_end = free->offset + free->length;
1264 if (free->offset < writeend && free_end > writecol) {
1265 int st = max_t(int,free->offset,writecol);
1266 int ed = min_t(int,free_end,writeend);
1268 memcpy(oob_buf + st, buf, n);
1276 * onenand_do_write_oob - [Internal] OneNAND write out-of-band
1277 * @param mtd MTD device structure
1278 * @param to offset to write to
1279 * @param len number of bytes to write
1280 * @param retlen pointer to variable to store the number of written bytes
1281 * @param buf the data to write
1282 * @param mode operation mode
1284 * OneNAND write out-of-band
1286 static int onenand_do_write_oob(struct mtd_info *mtd, loff_t to, size_t len,
1287 size_t *retlen, const u_char *buf, mtd_oob_mode_t mode)
1289 struct onenand_chip *this = mtd->priv;
1290 int column, ret = 0, oobsize;
1293 DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1295 /* Initialize retlen, in case of early exit */
1298 if (mode == MTD_OOB_AUTO)
1299 oobsize = this->ecclayout->oobavail;
1301 oobsize = mtd->oobsize;
1303 column = to & (mtd->oobsize - 1);
1305 if (unlikely(column >= oobsize)) {
1306 printk(KERN_ERR "onenand_write_oob: Attempted to start write outside oob\n");
1310 /* For compatibility with NAND: Do not allow write past end of page */
1311 if (column + len > oobsize) {
1312 printk(KERN_ERR "onenand_write_oob: "
1313 "Attempt to write past end of page\n");
1317 /* Do not allow reads past end of device */
1318 if (unlikely(to >= mtd->size ||
1319 column + len > ((mtd->size >> this->page_shift) -
1320 (to >> this->page_shift)) * oobsize)) {
1321 printk(KERN_ERR "onenand_write_oob: Attempted to write past end of device\n");
1325 /* Grab the lock and see if the device is available */
1326 onenand_get_device(mtd, FL_WRITING);
1328 /* Loop until all data write */
1329 while (written < len) {
1330 int thislen = min_t(int, oobsize, len - written);
1334 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
1336 /* We send data to spare ram with oobsize
1337 * to prevent byte access */
1338 memset(this->page_buf, 0xff, mtd->oobsize);
1339 if (mode == MTD_OOB_AUTO)
1340 onenand_fill_auto_oob(mtd, this->page_buf, buf, column, thislen);
1342 memcpy(this->page_buf + column, buf, thislen);
1343 this->write_bufferram(mtd, ONENAND_SPARERAM, this->page_buf, 0, mtd->oobsize);
1345 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
1347 onenand_update_bufferram(mtd, to, 0);
1349 ret = this->wait(mtd, FL_WRITING);
1351 printk(KERN_ERR "onenand_write_oob: write failed %d\n", ret);
1355 ret = onenand_verify_oob(mtd, this->page_buf, to);
1357 printk(KERN_ERR "onenand_write_oob: verify failed %d\n", ret);
1365 to += mtd->writesize;
1370 /* Deselect and wake up anyone waiting on the device */
1371 onenand_release_device(mtd);
1379 * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
1380 * @mtd: MTD device structure
1381 * @from: offset to read from
1382 * @ops: oob operation description structure
1384 static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
1385 struct mtd_oob_ops *ops)
1387 switch (ops->mode) {
1392 /* Not implemented yet */
1396 return onenand_do_write_oob(mtd, to + ops->ooboffs, ops->ooblen,
1397 &ops->oobretlen, ops->oobbuf, ops->mode);
1401 * onenand_block_checkbad - [GENERIC] Check if a block is marked bad
1402 * @param mtd MTD device structure
1403 * @param ofs offset from device start
1404 * @param getchip 0, if the chip is already selected
1405 * @param allowbbt 1, if its allowed to access the bbt area
1407 * Check, if the block is bad. Either by reading the bad block table or
1408 * calling of the scan function.
1410 static int onenand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt)
1412 struct onenand_chip *this = mtd->priv;
1413 struct bbm_info *bbm = this->bbm;
1415 /* Return info from the table */
1416 return bbm->isbad_bbt(mtd, ofs, allowbbt);
1420 * onenand_erase - [MTD Interface] erase block(s)
1421 * @param mtd MTD device structure
1422 * @param instr erase instruction
1424 * Erase one ore more blocks
1426 static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
1428 struct onenand_chip *this = mtd->priv;
1429 unsigned int block_size;
1434 DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
1436 block_size = (1 << this->erase_shift);
1438 /* Start address must align on block boundary */
1439 if (unlikely(instr->addr & (block_size - 1))) {
1440 printk(KERN_ERR "onenand_erase: Unaligned address\n");
1444 /* Length must align on block boundary */
1445 if (unlikely(instr->len & (block_size - 1))) {
1446 printk(KERN_ERR "onenand_erase: Length not block aligned\n");
1450 /* Do not allow erase past end of device */
1451 if (unlikely((instr->len + instr->addr) > mtd->size)) {
1452 printk(KERN_ERR "onenand_erase: Erase past end of device\n");
1456 instr->fail_addr = 0xffffffff;
1458 /* Grab the lock and see if the device is available */
1459 onenand_get_device(mtd, FL_ERASING);
1461 /* Loop throught the pages */
1465 instr->state = MTD_ERASING;
1470 /* Check if we have a bad block, we do not erase bad blocks */
1471 if (onenand_block_checkbad(mtd, addr, 0, 0)) {
1472 printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%08x\n", (unsigned int) addr);
1473 instr->state = MTD_ERASE_FAILED;
1477 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
1479 ret = this->wait(mtd, FL_ERASING);
1480 /* Check, if it is write protected */
1482 printk(KERN_ERR "onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift));
1483 instr->state = MTD_ERASE_FAILED;
1484 instr->fail_addr = addr;
1492 instr->state = MTD_ERASE_DONE;
1496 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
1497 /* Do call back function */
1499 mtd_erase_callback(instr);
1501 /* Deselect and wake up anyone waiting on the device */
1502 onenand_release_device(mtd);
1508 * onenand_sync - [MTD Interface] sync
1509 * @param mtd MTD device structure
1511 * Sync is actually a wait for chip ready function
1513 static void onenand_sync(struct mtd_info *mtd)
1515 DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
1517 /* Grab the lock and see if the device is available */
1518 onenand_get_device(mtd, FL_SYNCING);
1520 /* Release it and go back */
1521 onenand_release_device(mtd);
1525 * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1526 * @param mtd MTD device structure
1527 * @param ofs offset relative to mtd start
1529 * Check whether the block is bad
1531 static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1533 /* Check for invalid offset */
1534 if (ofs > mtd->size)
1537 return onenand_block_checkbad(mtd, ofs, 1, 0);
1541 * onenand_default_block_markbad - [DEFAULT] mark a block bad
1542 * @param mtd MTD device structure
1543 * @param ofs offset from device start
1545 * This is the default implementation, which can be overridden by
1546 * a hardware specific driver.
1548 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
1550 struct onenand_chip *this = mtd->priv;
1551 struct bbm_info *bbm = this->bbm;
1552 u_char buf[2] = {0, 0};
1556 /* Get block number */
1557 block = ((int) ofs) >> bbm->bbt_erase_shift;
1559 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
1561 /* We write two bytes, so we dont have to mess with 16 bit access */
1562 ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
1563 return onenand_do_write_oob(mtd, ofs , 2, &retlen, buf, MTD_OOB_PLACE);
1567 * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1568 * @param mtd MTD device structure
1569 * @param ofs offset relative to mtd start
1571 * Mark the block as bad
1573 static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1575 struct onenand_chip *this = mtd->priv;
1578 ret = onenand_block_isbad(mtd, ofs);
1580 /* If it was bad already, return success and do nothing */
1586 return this->block_markbad(mtd, ofs);
1590 * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
1591 * @param mtd MTD device structure
1592 * @param ofs offset relative to mtd start
1593 * @param len number of bytes to lock or unlock
1595 * Lock or unlock one or more blocks
1597 static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
1599 struct onenand_chip *this = mtd->priv;
1600 int start, end, block, value, status;
1603 start = ofs >> this->erase_shift;
1604 end = len >> this->erase_shift;
1606 if (cmd == ONENAND_CMD_LOCK)
1607 wp_status_mask = ONENAND_WP_LS;
1609 wp_status_mask = ONENAND_WP_US;
1611 /* Continuous lock scheme */
1612 if (this->options & ONENAND_HAS_CONT_LOCK) {
1613 /* Set start block address */
1614 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1615 /* Set end block address */
1616 this->write_word(start + end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
1617 /* Write lock command */
1618 this->command(mtd, cmd, 0, 0);
1620 /* There's no return value */
1621 this->wait(mtd, FL_LOCKING);
1624 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1625 & ONENAND_CTRL_ONGO)
1628 /* Check lock status */
1629 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1630 if (!(status & wp_status_mask))
1631 printk(KERN_ERR "wp status = 0x%x\n", status);
1636 /* Block lock scheme */
1637 for (block = start; block < start + end; block++) {
1638 /* Set block address */
1639 value = onenand_block_address(this, block);
1640 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1641 /* Select DataRAM for DDP */
1642 value = onenand_bufferram_address(this, block);
1643 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1644 /* Set start block address */
1645 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1646 /* Write lock command */
1647 this->command(mtd, cmd, 0, 0);
1649 /* There's no return value */
1650 this->wait(mtd, FL_LOCKING);
1653 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1654 & ONENAND_CTRL_ONGO)
1657 /* Check lock status */
1658 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1659 if (!(status & wp_status_mask))
1660 printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1667 * onenand_lock - [MTD Interface] Lock block(s)
1668 * @param mtd MTD device structure
1669 * @param ofs offset relative to mtd start
1670 * @param len number of bytes to unlock
1672 * Lock one or more blocks
1674 static int onenand_lock(struct mtd_info *mtd, loff_t ofs, size_t len)
1676 return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
1680 * onenand_unlock - [MTD Interface] Unlock block(s)
1681 * @param mtd MTD device structure
1682 * @param ofs offset relative to mtd start
1683 * @param len number of bytes to unlock
1685 * Unlock one or more blocks
1687 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
1689 return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
1693 * onenand_check_lock_status - [OneNAND Interface] Check lock status
1694 * @param this onenand chip data structure
1698 static void onenand_check_lock_status(struct onenand_chip *this)
1700 unsigned int value, block, status;
1703 end = this->chipsize >> this->erase_shift;
1704 for (block = 0; block < end; block++) {
1705 /* Set block address */
1706 value = onenand_block_address(this, block);
1707 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1708 /* Select DataRAM for DDP */
1709 value = onenand_bufferram_address(this, block);
1710 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1711 /* Set start block address */
1712 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1714 /* Check lock status */
1715 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1716 if (!(status & ONENAND_WP_US))
1717 printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1722 * onenand_unlock_all - [OneNAND Interface] unlock all blocks
1723 * @param mtd MTD device structure
1727 static int onenand_unlock_all(struct mtd_info *mtd)
1729 struct onenand_chip *this = mtd->priv;
1731 if (this->options & ONENAND_HAS_UNLOCK_ALL) {
1732 /* Set start block address */
1733 this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1734 /* Write unlock command */
1735 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
1737 /* There's no return value */
1738 this->wait(mtd, FL_LOCKING);
1741 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1742 & ONENAND_CTRL_ONGO)
1745 /* Workaround for all block unlock in DDP */
1746 if (ONENAND_IS_DDP(this)) {
1747 /* 1st block on another chip */
1748 loff_t ofs = this->chipsize >> 1;
1749 size_t len = mtd->erasesize;
1751 onenand_unlock(mtd, ofs, len);
1754 onenand_check_lock_status(this);
1759 onenand_unlock(mtd, 0x0, this->chipsize);
1764 #ifdef CONFIG_MTD_ONENAND_OTP
1766 /* Interal OTP operation */
1767 typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
1768 size_t *retlen, u_char *buf);
1771 * do_otp_read - [DEFAULT] Read OTP block area
1772 * @param mtd MTD device structure
1773 * @param from The offset to read
1774 * @param len number of bytes to read
1775 * @param retlen pointer to variable to store the number of readbytes
1776 * @param buf the databuffer to put/get data
1778 * Read OTP block area.
1780 static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
1781 size_t *retlen, u_char *buf)
1783 struct onenand_chip *this = mtd->priv;
1786 /* Enter OTP access mode */
1787 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1788 this->wait(mtd, FL_OTPING);
1790 ret = mtd->read(mtd, from, len, retlen, buf);
1792 /* Exit OTP access mode */
1793 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1794 this->wait(mtd, FL_RESETING);
1800 * do_otp_write - [DEFAULT] Write OTP block area
1801 * @param mtd MTD device structure
1802 * @param from The offset to write
1803 * @param len number of bytes to write
1804 * @param retlen pointer to variable to store the number of write bytes
1805 * @param buf the databuffer to put/get data
1807 * Write OTP block area.
1809 static int do_otp_write(struct mtd_info *mtd, loff_t from, size_t len,
1810 size_t *retlen, u_char *buf)
1812 struct onenand_chip *this = mtd->priv;
1813 unsigned char *pbuf = buf;
1816 /* Force buffer page aligned */
1817 if (len < mtd->writesize) {
1818 memcpy(this->page_buf, buf, len);
1819 memset(this->page_buf + len, 0xff, mtd->writesize - len);
1820 pbuf = this->page_buf;
1821 len = mtd->writesize;
1824 /* Enter OTP access mode */
1825 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1826 this->wait(mtd, FL_OTPING);
1828 ret = mtd->write(mtd, from, len, retlen, pbuf);
1830 /* Exit OTP access mode */
1831 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1832 this->wait(mtd, FL_RESETING);
1838 * do_otp_lock - [DEFAULT] Lock OTP block area
1839 * @param mtd MTD device structure
1840 * @param from The offset to lock
1841 * @param len number of bytes to lock
1842 * @param retlen pointer to variable to store the number of lock bytes
1843 * @param buf the databuffer to put/get data
1845 * Lock OTP block area.
1847 static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
1848 size_t *retlen, u_char *buf)
1850 struct onenand_chip *this = mtd->priv;
1853 /* Enter OTP access mode */
1854 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1855 this->wait(mtd, FL_OTPING);
1857 ret = onenand_do_write_oob(mtd, from, len, retlen, buf, MTD_OOB_PLACE);
1859 /* Exit OTP access mode */
1860 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1861 this->wait(mtd, FL_RESETING);
1867 * onenand_otp_walk - [DEFAULT] Handle OTP operation
1868 * @param mtd MTD device structure
1869 * @param from The offset to read/write
1870 * @param len number of bytes to read/write
1871 * @param retlen pointer to variable to store the number of read bytes
1872 * @param buf the databuffer to put/get data
1873 * @param action do given action
1874 * @param mode specify user and factory
1876 * Handle OTP operation.
1878 static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
1879 size_t *retlen, u_char *buf,
1880 otp_op_t action, int mode)
1882 struct onenand_chip *this = mtd->priv;
1889 density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1890 if (density < ONENAND_DEVICE_DENSITY_512Mb)
1895 if (mode == MTD_OTP_FACTORY) {
1896 from += mtd->writesize * otp_pages;
1897 otp_pages = 64 - otp_pages;
1900 /* Check User/Factory boundary */
1901 if (((mtd->writesize * otp_pages) - (from + len)) < 0)
1904 while (len > 0 && otp_pages > 0) {
1905 if (!action) { /* OTP Info functions */
1906 struct otp_info *otpinfo;
1908 len -= sizeof(struct otp_info);
1912 otpinfo = (struct otp_info *) buf;
1913 otpinfo->start = from;
1914 otpinfo->length = mtd->writesize;
1915 otpinfo->locked = 0;
1917 from += mtd->writesize;
1918 buf += sizeof(struct otp_info);
1919 *retlen += sizeof(struct otp_info);
1924 ret = action(mtd, from, len, &tmp_retlen, buf);
1940 * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
1941 * @param mtd MTD device structure
1942 * @param buf the databuffer to put/get data
1943 * @param len number of bytes to read
1945 * Read factory OTP info.
1947 static int onenand_get_fact_prot_info(struct mtd_info *mtd,
1948 struct otp_info *buf, size_t len)
1953 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
1955 return ret ? : retlen;
1959 * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
1960 * @param mtd MTD device structure
1961 * @param from The offset to read
1962 * @param len number of bytes to read
1963 * @param retlen pointer to variable to store the number of read bytes
1964 * @param buf the databuffer to put/get data
1966 * Read factory OTP area.
1968 static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
1969 size_t len, size_t *retlen, u_char *buf)
1971 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
1975 * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
1976 * @param mtd MTD device structure
1977 * @param buf the databuffer to put/get data
1978 * @param len number of bytes to read
1980 * Read user OTP info.
1982 static int onenand_get_user_prot_info(struct mtd_info *mtd,
1983 struct otp_info *buf, size_t len)
1988 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
1990 return ret ? : retlen;
1994 * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
1995 * @param mtd MTD device structure
1996 * @param from The offset to read
1997 * @param len number of bytes to read
1998 * @param retlen pointer to variable to store the number of read bytes
1999 * @param buf the databuffer to put/get data
2001 * Read user OTP area.
2003 static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
2004 size_t len, size_t *retlen, u_char *buf)
2006 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
2010 * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
2011 * @param mtd MTD device structure
2012 * @param from The offset to write
2013 * @param len number of bytes to write
2014 * @param retlen pointer to variable to store the number of write bytes
2015 * @param buf the databuffer to put/get data
2017 * Write user OTP area.
2019 static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
2020 size_t len, size_t *retlen, u_char *buf)
2022 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
2026 * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
2027 * @param mtd MTD device structure
2028 * @param from The offset to lock
2029 * @param len number of bytes to unlock
2031 * Write lock mark on spare area in page 0 in OTP block
2033 static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
2036 unsigned char oob_buf[64];
2040 memset(oob_buf, 0xff, mtd->oobsize);
2042 * Note: OTP lock operation
2043 * OTP block : 0xXXFC
2044 * 1st block : 0xXXF3 (If chip support)
2045 * Both : 0xXXF0 (If chip support)
2047 oob_buf[ONENAND_OTP_LOCK_OFFSET] = 0xFC;
2050 * Write lock mark to 8th word of sector0 of page0 of the spare0.
2051 * We write 16 bytes spare area instead of 2 bytes.
2056 ret = onenand_otp_walk(mtd, from, len, &retlen, oob_buf, do_otp_lock, MTD_OTP_USER);
2058 return ret ? : retlen;
2060 #endif /* CONFIG_MTD_ONENAND_OTP */
2063 * onenand_check_features - Check and set OneNAND features
2064 * @param mtd MTD data structure
2066 * Check and set OneNAND features
2069 static void onenand_check_features(struct mtd_info *mtd)
2071 struct onenand_chip *this = mtd->priv;
2072 unsigned int density, process;
2074 /* Lock scheme depends on density and process */
2075 density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
2076 process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
2079 if (density >= ONENAND_DEVICE_DENSITY_1Gb) {
2080 /* A-Die has all block unlock */
2082 printk(KERN_DEBUG "Chip support all block unlock\n");
2083 this->options |= ONENAND_HAS_UNLOCK_ALL;
2086 /* Some OneNAND has continues lock scheme */
2088 printk(KERN_DEBUG "Lock scheme is Continues Lock\n");
2089 this->options |= ONENAND_HAS_CONT_LOCK;
2095 * onenand_print_device_info - Print device ID
2096 * @param device device ID
2100 static void onenand_print_device_info(int device, int version)
2102 int vcc, demuxed, ddp, density;
2104 vcc = device & ONENAND_DEVICE_VCC_MASK;
2105 demuxed = device & ONENAND_DEVICE_IS_DEMUX;
2106 ddp = device & ONENAND_DEVICE_IS_DDP;
2107 density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
2108 printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
2109 demuxed ? "" : "Muxed ",
2112 vcc ? "2.65/3.3" : "1.8",
2114 printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version);
2117 static const struct onenand_manufacturers onenand_manuf_ids[] = {
2118 {ONENAND_MFR_SAMSUNG, "Samsung"},
2122 * onenand_check_maf - Check manufacturer ID
2123 * @param manuf manufacturer ID
2125 * Check manufacturer ID
2127 static int onenand_check_maf(int manuf)
2129 int size = ARRAY_SIZE(onenand_manuf_ids);
2133 for (i = 0; i < size; i++)
2134 if (manuf == onenand_manuf_ids[i].id)
2138 name = onenand_manuf_ids[i].name;
2142 printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
2148 * onenand_probe - [OneNAND Interface] Probe the OneNAND device
2149 * @param mtd MTD device structure
2151 * OneNAND detection method:
2152 * Compare the the values from command with ones from register
2154 static int onenand_probe(struct mtd_info *mtd)
2156 struct onenand_chip *this = mtd->priv;
2157 int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id;
2161 /* Save system configuration 1 */
2162 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
2163 /* Clear Sync. Burst Read mode to read BootRAM */
2164 this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ), this->base + ONENAND_REG_SYS_CFG1);
2166 /* Send the command for reading device ID from BootRAM */
2167 this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
2169 /* Read manufacturer and device IDs from BootRAM */
2170 bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
2171 bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
2173 /* Reset OneNAND to read default register values */
2174 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
2176 this->wait(mtd, FL_RESETING);
2178 /* Restore system configuration 1 */
2179 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
2181 /* Check manufacturer ID */
2182 if (onenand_check_maf(bram_maf_id))
2185 /* Read manufacturer and device IDs from Register */
2186 maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
2187 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
2188 ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
2190 /* Check OneNAND device */
2191 if (maf_id != bram_maf_id || dev_id != bram_dev_id)
2194 /* Flash device information */
2195 onenand_print_device_info(dev_id, ver_id);
2196 this->device_id = dev_id;
2197 this->version_id = ver_id;
2199 density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
2200 this->chipsize = (16 << density) << 20;
2201 /* Set density mask. it is used for DDP */
2202 if (ONENAND_IS_DDP(this))
2203 this->density_mask = (1 << (density + 6));
2205 this->density_mask = 0;
2207 /* OneNAND page size & block size */
2208 /* The data buffer size is equal to page size */
2209 mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
2210 mtd->oobsize = mtd->writesize >> 5;
2211 /* Pages per a block are always 64 in OneNAND */
2212 mtd->erasesize = mtd->writesize << 6;
2214 this->erase_shift = ffs(mtd->erasesize) - 1;
2215 this->page_shift = ffs(mtd->writesize) - 1;
2216 this->page_mask = (1 << (this->erase_shift - this->page_shift)) - 1;
2218 /* REVIST: Multichip handling */
2220 mtd->size = this->chipsize;
2222 /* Check OneNAND features */
2223 onenand_check_features(mtd);
2229 * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
2230 * @param mtd MTD device structure
2232 static int onenand_suspend(struct mtd_info *mtd)
2234 return onenand_get_device(mtd, FL_PM_SUSPENDED);
2238 * onenand_resume - [MTD Interface] Resume the OneNAND flash
2239 * @param mtd MTD device structure
2241 static void onenand_resume(struct mtd_info *mtd)
2243 struct onenand_chip *this = mtd->priv;
2245 if (this->state == FL_PM_SUSPENDED)
2246 onenand_release_device(mtd);
2248 printk(KERN_ERR "resume() called for the chip which is not"
2249 "in suspended state\n");
2253 * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
2254 * @param mtd MTD device structure
2255 * @param maxchips Number of chips to scan for
2257 * This fills out all the not initialized function pointers
2258 * with the defaults.
2259 * The flash ID is read and the mtd/chip structures are
2260 * filled with the appropriate values.
2262 int onenand_scan(struct mtd_info *mtd, int maxchips)
2265 struct onenand_chip *this = mtd->priv;
2267 if (!this->read_word)
2268 this->read_word = onenand_readw;
2269 if (!this->write_word)
2270 this->write_word = onenand_writew;
2273 this->command = onenand_command;
2275 onenand_setup_wait(mtd);
2277 if (!this->read_bufferram)
2278 this->read_bufferram = onenand_read_bufferram;
2279 if (!this->write_bufferram)
2280 this->write_bufferram = onenand_write_bufferram;
2282 if (!this->block_markbad)
2283 this->block_markbad = onenand_default_block_markbad;
2284 if (!this->scan_bbt)
2285 this->scan_bbt = onenand_default_bbt;
2287 if (onenand_probe(mtd))
2290 /* Set Sync. Burst Read after probing */
2291 if (this->mmcontrol) {
2292 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
2293 this->read_bufferram = onenand_sync_read_bufferram;
2296 /* Allocate buffers, if necessary */
2297 if (!this->page_buf) {
2299 len = mtd->writesize + mtd->oobsize;
2300 this->page_buf = kmalloc(len, GFP_KERNEL);
2301 if (!this->page_buf) {
2302 printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n");
2305 this->options |= ONENAND_PAGEBUF_ALLOC;
2308 this->state = FL_READY;
2309 init_waitqueue_head(&this->wq);
2310 spin_lock_init(&this->chip_lock);
2313 * Allow subpage writes up to oobsize.
2315 switch (mtd->oobsize) {
2317 this->ecclayout = &onenand_oob_64;
2318 mtd->subpage_sft = 2;
2322 this->ecclayout = &onenand_oob_32;
2323 mtd->subpage_sft = 1;
2327 printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n",
2329 mtd->subpage_sft = 0;
2330 /* To prevent kernel oops */
2331 this->ecclayout = &onenand_oob_32;
2335 this->subpagesize = mtd->writesize >> mtd->subpage_sft;
2338 * The number of bytes available for a client to place data into
2339 * the out of band area
2341 this->ecclayout->oobavail = 0;
2342 for (i = 0; this->ecclayout->oobfree[i].length; i++)
2343 this->ecclayout->oobavail +=
2344 this->ecclayout->oobfree[i].length;
2346 mtd->ecclayout = this->ecclayout;
2348 /* Fill in remaining MTD driver data */
2349 mtd->type = MTD_NANDFLASH;
2350 mtd->flags = MTD_CAP_NANDFLASH;
2351 mtd->ecctype = MTD_ECC_SW;
2352 mtd->erase = onenand_erase;
2354 mtd->unpoint = NULL;
2355 mtd->read = onenand_read;
2356 mtd->write = onenand_write;
2357 mtd->read_oob = onenand_read_oob;
2358 mtd->write_oob = onenand_write_oob;
2359 #ifdef CONFIG_MTD_ONENAND_OTP
2360 mtd->get_fact_prot_info = onenand_get_fact_prot_info;
2361 mtd->read_fact_prot_reg = onenand_read_fact_prot_reg;
2362 mtd->get_user_prot_info = onenand_get_user_prot_info;
2363 mtd->read_user_prot_reg = onenand_read_user_prot_reg;
2364 mtd->write_user_prot_reg = onenand_write_user_prot_reg;
2365 mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
2367 mtd->sync = onenand_sync;
2368 mtd->lock = onenand_lock;
2369 mtd->unlock = onenand_unlock;
2370 mtd->suspend = onenand_suspend;
2371 mtd->resume = onenand_resume;
2372 mtd->block_isbad = onenand_block_isbad;
2373 mtd->block_markbad = onenand_block_markbad;
2374 mtd->owner = THIS_MODULE;
2376 /* Unlock whole block */
2377 onenand_unlock_all(mtd);
2379 return this->scan_bbt(mtd);
2383 * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
2384 * @param mtd MTD device structure
2386 void onenand_release(struct mtd_info *mtd)
2388 struct onenand_chip *this = mtd->priv;
2390 #ifdef CONFIG_MTD_PARTITIONS
2391 /* Deregister partitions */
2392 del_mtd_partitions (mtd);
2394 /* Deregister the device */
2395 del_mtd_device (mtd);
2397 /* Free bad block table memory, if allocated */
2399 struct bbm_info *bbm = this->bbm;
2403 /* Buffer allocated by onenand_scan */
2404 if (this->options & ONENAND_PAGEBUF_ALLOC)
2405 kfree(this->page_buf);
2408 EXPORT_SYMBOL_GPL(onenand_scan);
2409 EXPORT_SYMBOL_GPL(onenand_release);
2411 MODULE_LICENSE("GPL");
2412 MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
2413 MODULE_DESCRIPTION("Generic OneNAND flash driver code");