1 /*******************************************************************************
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *******************************************************************************/
30 #include <net/ip6_checksum.h>
32 char e1000_driver_name[] = "e1000";
33 static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
34 #ifndef CONFIG_E1000_NAPI
37 #define DRIVERNAPI "-NAPI"
39 #define DRV_VERSION "7.3.20-k2"DRIVERNAPI
40 char e1000_driver_version[] = DRV_VERSION;
41 static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
43 /* e1000_pci_tbl - PCI Device ID Table
45 * Last entry must be all 0s
48 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
50 static struct pci_device_id e1000_pci_tbl[] = {
51 INTEL_E1000_ETHERNET_DEVICE(0x1000),
52 INTEL_E1000_ETHERNET_DEVICE(0x1001),
53 INTEL_E1000_ETHERNET_DEVICE(0x1004),
54 INTEL_E1000_ETHERNET_DEVICE(0x1008),
55 INTEL_E1000_ETHERNET_DEVICE(0x1009),
56 INTEL_E1000_ETHERNET_DEVICE(0x100C),
57 INTEL_E1000_ETHERNET_DEVICE(0x100D),
58 INTEL_E1000_ETHERNET_DEVICE(0x100E),
59 INTEL_E1000_ETHERNET_DEVICE(0x100F),
60 INTEL_E1000_ETHERNET_DEVICE(0x1010),
61 INTEL_E1000_ETHERNET_DEVICE(0x1011),
62 INTEL_E1000_ETHERNET_DEVICE(0x1012),
63 INTEL_E1000_ETHERNET_DEVICE(0x1013),
64 INTEL_E1000_ETHERNET_DEVICE(0x1014),
65 INTEL_E1000_ETHERNET_DEVICE(0x1015),
66 INTEL_E1000_ETHERNET_DEVICE(0x1016),
67 INTEL_E1000_ETHERNET_DEVICE(0x1017),
68 INTEL_E1000_ETHERNET_DEVICE(0x1018),
69 INTEL_E1000_ETHERNET_DEVICE(0x1019),
70 INTEL_E1000_ETHERNET_DEVICE(0x101A),
71 INTEL_E1000_ETHERNET_DEVICE(0x101D),
72 INTEL_E1000_ETHERNET_DEVICE(0x101E),
73 INTEL_E1000_ETHERNET_DEVICE(0x1026),
74 INTEL_E1000_ETHERNET_DEVICE(0x1027),
75 INTEL_E1000_ETHERNET_DEVICE(0x1028),
76 INTEL_E1000_ETHERNET_DEVICE(0x1049),
77 INTEL_E1000_ETHERNET_DEVICE(0x104A),
78 INTEL_E1000_ETHERNET_DEVICE(0x104B),
79 INTEL_E1000_ETHERNET_DEVICE(0x104C),
80 INTEL_E1000_ETHERNET_DEVICE(0x104D),
81 INTEL_E1000_ETHERNET_DEVICE(0x105E),
82 INTEL_E1000_ETHERNET_DEVICE(0x105F),
83 INTEL_E1000_ETHERNET_DEVICE(0x1060),
84 INTEL_E1000_ETHERNET_DEVICE(0x1075),
85 INTEL_E1000_ETHERNET_DEVICE(0x1076),
86 INTEL_E1000_ETHERNET_DEVICE(0x1077),
87 INTEL_E1000_ETHERNET_DEVICE(0x1078),
88 INTEL_E1000_ETHERNET_DEVICE(0x1079),
89 INTEL_E1000_ETHERNET_DEVICE(0x107A),
90 INTEL_E1000_ETHERNET_DEVICE(0x107B),
91 INTEL_E1000_ETHERNET_DEVICE(0x107C),
92 INTEL_E1000_ETHERNET_DEVICE(0x107D),
93 INTEL_E1000_ETHERNET_DEVICE(0x107E),
94 INTEL_E1000_ETHERNET_DEVICE(0x107F),
95 INTEL_E1000_ETHERNET_DEVICE(0x108A),
96 INTEL_E1000_ETHERNET_DEVICE(0x108B),
97 INTEL_E1000_ETHERNET_DEVICE(0x108C),
98 INTEL_E1000_ETHERNET_DEVICE(0x1096),
99 INTEL_E1000_ETHERNET_DEVICE(0x1098),
100 INTEL_E1000_ETHERNET_DEVICE(0x1099),
101 INTEL_E1000_ETHERNET_DEVICE(0x109A),
102 INTEL_E1000_ETHERNET_DEVICE(0x10A4),
103 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
104 INTEL_E1000_ETHERNET_DEVICE(0x10B9),
105 INTEL_E1000_ETHERNET_DEVICE(0x10BA),
106 INTEL_E1000_ETHERNET_DEVICE(0x10BB),
107 INTEL_E1000_ETHERNET_DEVICE(0x10BC),
108 INTEL_E1000_ETHERNET_DEVICE(0x10C4),
109 INTEL_E1000_ETHERNET_DEVICE(0x10C5),
110 /* required last entry */
114 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
116 int e1000_up(struct e1000_adapter *adapter);
117 void e1000_down(struct e1000_adapter *adapter);
118 void e1000_reinit_locked(struct e1000_adapter *adapter);
119 void e1000_reset(struct e1000_adapter *adapter);
120 int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
121 int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
122 int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
123 void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
124 void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
125 static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
126 struct e1000_tx_ring *txdr);
127 static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
128 struct e1000_rx_ring *rxdr);
129 static void e1000_free_tx_resources(struct e1000_adapter *adapter,
130 struct e1000_tx_ring *tx_ring);
131 static void e1000_free_rx_resources(struct e1000_adapter *adapter,
132 struct e1000_rx_ring *rx_ring);
133 void e1000_update_stats(struct e1000_adapter *adapter);
135 static int e1000_init_module(void);
136 static void e1000_exit_module(void);
137 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
138 static void __devexit e1000_remove(struct pci_dev *pdev);
139 static int e1000_alloc_queues(struct e1000_adapter *adapter);
140 static int e1000_sw_init(struct e1000_adapter *adapter);
141 static int e1000_open(struct net_device *netdev);
142 static int e1000_close(struct net_device *netdev);
143 static void e1000_configure_tx(struct e1000_adapter *adapter);
144 static void e1000_configure_rx(struct e1000_adapter *adapter);
145 static void e1000_setup_rctl(struct e1000_adapter *adapter);
146 static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
147 static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
148 static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
149 struct e1000_tx_ring *tx_ring);
150 static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
151 struct e1000_rx_ring *rx_ring);
152 static void e1000_set_multi(struct net_device *netdev);
153 static void e1000_update_phy_info(unsigned long data);
154 static void e1000_watchdog(unsigned long data);
155 static void e1000_82547_tx_fifo_stall(unsigned long data);
156 static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
157 static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
158 static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
159 static int e1000_set_mac(struct net_device *netdev, void *p);
160 static irqreturn_t e1000_intr(int irq, void *data);
161 static irqreturn_t e1000_intr_msi(int irq, void *data);
162 static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
163 struct e1000_tx_ring *tx_ring);
164 #ifdef CONFIG_E1000_NAPI
165 static int e1000_clean(struct net_device *poll_dev, int *budget);
166 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
167 struct e1000_rx_ring *rx_ring,
168 int *work_done, int work_to_do);
169 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
170 struct e1000_rx_ring *rx_ring,
171 int *work_done, int work_to_do);
173 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
174 struct e1000_rx_ring *rx_ring);
175 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
176 struct e1000_rx_ring *rx_ring);
178 static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
179 struct e1000_rx_ring *rx_ring,
181 static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
182 struct e1000_rx_ring *rx_ring,
184 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
185 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
187 void e1000_set_ethtool_ops(struct net_device *netdev);
188 static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
189 static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
190 static void e1000_tx_timeout(struct net_device *dev);
191 static void e1000_reset_task(struct work_struct *work);
192 static void e1000_smartspeed(struct e1000_adapter *adapter);
193 static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
194 struct sk_buff *skb);
196 static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
197 static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
198 static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
199 static void e1000_restore_vlan(struct e1000_adapter *adapter);
201 static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
203 static int e1000_resume(struct pci_dev *pdev);
205 static void e1000_shutdown(struct pci_dev *pdev);
207 #ifdef CONFIG_NET_POLL_CONTROLLER
208 /* for netdump / net console */
209 static void e1000_netpoll (struct net_device *netdev);
212 extern void e1000_check_options(struct e1000_adapter *adapter);
214 #define COPYBREAK_DEFAULT 256
215 static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
216 module_param(copybreak, uint, 0644);
217 MODULE_PARM_DESC(copybreak,
218 "Maximum size of packet that is copied to a new buffer on receive");
220 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
221 pci_channel_state_t state);
222 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
223 static void e1000_io_resume(struct pci_dev *pdev);
225 static struct pci_error_handlers e1000_err_handler = {
226 .error_detected = e1000_io_error_detected,
227 .slot_reset = e1000_io_slot_reset,
228 .resume = e1000_io_resume,
231 static struct pci_driver e1000_driver = {
232 .name = e1000_driver_name,
233 .id_table = e1000_pci_tbl,
234 .probe = e1000_probe,
235 .remove = __devexit_p(e1000_remove),
237 /* Power Managment Hooks */
238 .suspend = e1000_suspend,
239 .resume = e1000_resume,
241 .shutdown = e1000_shutdown,
242 .err_handler = &e1000_err_handler
245 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
246 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
247 MODULE_LICENSE("GPL");
248 MODULE_VERSION(DRV_VERSION);
250 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
251 module_param(debug, int, 0);
252 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
255 * e1000_init_module - Driver Registration Routine
257 * e1000_init_module is the first routine called when the driver is
258 * loaded. All it does is register with the PCI subsystem.
262 e1000_init_module(void)
265 printk(KERN_INFO "%s - version %s\n",
266 e1000_driver_string, e1000_driver_version);
268 printk(KERN_INFO "%s\n", e1000_copyright);
270 ret = pci_register_driver(&e1000_driver);
271 if (copybreak != COPYBREAK_DEFAULT) {
273 printk(KERN_INFO "e1000: copybreak disabled\n");
275 printk(KERN_INFO "e1000: copybreak enabled for "
276 "packets <= %u bytes\n", copybreak);
281 module_init(e1000_init_module);
284 * e1000_exit_module - Driver Exit Cleanup Routine
286 * e1000_exit_module is called just before the driver is removed
291 e1000_exit_module(void)
293 pci_unregister_driver(&e1000_driver);
296 module_exit(e1000_exit_module);
298 static int e1000_request_irq(struct e1000_adapter *adapter)
300 struct net_device *netdev = adapter->netdev;
301 void (*handler) = &e1000_intr;
302 int irq_flags = IRQF_SHARED;
305 if (adapter->hw.mac_type >= e1000_82571) {
306 adapter->have_msi = !pci_enable_msi(adapter->pdev);
307 if (adapter->have_msi) {
308 handler = &e1000_intr_msi;
313 err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
316 if (adapter->have_msi)
317 pci_disable_msi(adapter->pdev);
319 "Unable to allocate interrupt Error: %d\n", err);
325 static void e1000_free_irq(struct e1000_adapter *adapter)
327 struct net_device *netdev = adapter->netdev;
329 free_irq(adapter->pdev->irq, netdev);
331 if (adapter->have_msi)
332 pci_disable_msi(adapter->pdev);
336 * e1000_irq_disable - Mask off interrupt generation on the NIC
337 * @adapter: board private structure
341 e1000_irq_disable(struct e1000_adapter *adapter)
343 atomic_inc(&adapter->irq_sem);
344 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
345 E1000_WRITE_FLUSH(&adapter->hw);
346 synchronize_irq(adapter->pdev->irq);
350 * e1000_irq_enable - Enable default interrupt generation settings
351 * @adapter: board private structure
355 e1000_irq_enable(struct e1000_adapter *adapter)
357 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
358 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
359 E1000_WRITE_FLUSH(&adapter->hw);
364 e1000_update_mng_vlan(struct e1000_adapter *adapter)
366 struct net_device *netdev = adapter->netdev;
367 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
368 uint16_t old_vid = adapter->mng_vlan_id;
369 if (adapter->vlgrp) {
370 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
371 if (adapter->hw.mng_cookie.status &
372 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
373 e1000_vlan_rx_add_vid(netdev, vid);
374 adapter->mng_vlan_id = vid;
376 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
378 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
380 !vlan_group_get_device(adapter->vlgrp, old_vid))
381 e1000_vlan_rx_kill_vid(netdev, old_vid);
383 adapter->mng_vlan_id = vid;
388 * e1000_release_hw_control - release control of the h/w to f/w
389 * @adapter: address of board private structure
391 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
392 * For ASF and Pass Through versions of f/w this means that the
393 * driver is no longer loaded. For AMT version (only with 82573) i
394 * of the f/w this means that the network i/f is closed.
399 e1000_release_hw_control(struct e1000_adapter *adapter)
404 /* Let firmware taken over control of h/w */
405 switch (adapter->hw.mac_type) {
407 swsm = E1000_READ_REG(&adapter->hw, SWSM);
408 E1000_WRITE_REG(&adapter->hw, SWSM,
409 swsm & ~E1000_SWSM_DRV_LOAD);
413 case e1000_80003es2lan:
415 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
416 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
417 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
425 * e1000_get_hw_control - get control of the h/w from f/w
426 * @adapter: address of board private structure
428 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
429 * For ASF and Pass Through versions of f/w this means that
430 * the driver is loaded. For AMT version (only with 82573)
431 * of the f/w this means that the network i/f is open.
436 e1000_get_hw_control(struct e1000_adapter *adapter)
441 /* Let firmware know the driver has taken over */
442 switch (adapter->hw.mac_type) {
444 swsm = E1000_READ_REG(&adapter->hw, SWSM);
445 E1000_WRITE_REG(&adapter->hw, SWSM,
446 swsm | E1000_SWSM_DRV_LOAD);
450 case e1000_80003es2lan:
452 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
453 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
454 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
462 e1000_init_manageability(struct e1000_adapter *adapter)
464 if (adapter->en_mng_pt) {
465 uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
467 /* disable hardware interception of ARP */
468 manc &= ~(E1000_MANC_ARP_EN);
470 /* enable receiving management packets to the host */
471 /* this will probably generate destination unreachable messages
472 * from the host OS, but the packets will be handled on SMBUS */
473 if (adapter->hw.has_manc2h) {
474 uint32_t manc2h = E1000_READ_REG(&adapter->hw, MANC2H);
476 manc |= E1000_MANC_EN_MNG2HOST;
477 #define E1000_MNG2HOST_PORT_623 (1 << 5)
478 #define E1000_MNG2HOST_PORT_664 (1 << 6)
479 manc2h |= E1000_MNG2HOST_PORT_623;
480 manc2h |= E1000_MNG2HOST_PORT_664;
481 E1000_WRITE_REG(&adapter->hw, MANC2H, manc2h);
484 E1000_WRITE_REG(&adapter->hw, MANC, manc);
489 e1000_release_manageability(struct e1000_adapter *adapter)
491 if (adapter->en_mng_pt) {
492 uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
494 /* re-enable hardware interception of ARP */
495 manc |= E1000_MANC_ARP_EN;
497 if (adapter->hw.has_manc2h)
498 manc &= ~E1000_MANC_EN_MNG2HOST;
500 /* don't explicitly have to mess with MANC2H since
501 * MANC has an enable disable that gates MANC2H */
503 E1000_WRITE_REG(&adapter->hw, MANC, manc);
508 * e1000_configure - configure the hardware for RX and TX
509 * @adapter = private board structure
511 static void e1000_configure(struct e1000_adapter *adapter)
513 struct net_device *netdev = adapter->netdev;
516 e1000_set_multi(netdev);
518 e1000_restore_vlan(adapter);
519 e1000_init_manageability(adapter);
521 e1000_configure_tx(adapter);
522 e1000_setup_rctl(adapter);
523 e1000_configure_rx(adapter);
524 /* call E1000_DESC_UNUSED which always leaves
525 * at least 1 descriptor unused to make sure
526 * next_to_use != next_to_clean */
527 for (i = 0; i < adapter->num_rx_queues; i++) {
528 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
529 adapter->alloc_rx_buf(adapter, ring,
530 E1000_DESC_UNUSED(ring));
533 adapter->tx_queue_len = netdev->tx_queue_len;
536 int e1000_up(struct e1000_adapter *adapter)
538 /* hardware has been reset, we need to reload some things */
539 e1000_configure(adapter);
541 clear_bit(__E1000_DOWN, &adapter->flags);
543 #ifdef CONFIG_E1000_NAPI
544 netif_poll_enable(adapter->netdev);
546 e1000_irq_enable(adapter);
548 /* fire a link change interrupt to start the watchdog */
549 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC);
554 * e1000_power_up_phy - restore link in case the phy was powered down
555 * @adapter: address of board private structure
557 * The phy may be powered down to save power and turn off link when the
558 * driver is unloaded and wake on lan is not enabled (among others)
559 * *** this routine MUST be followed by a call to e1000_reset ***
563 void e1000_power_up_phy(struct e1000_adapter *adapter)
565 uint16_t mii_reg = 0;
567 /* Just clear the power down bit to wake the phy back up */
568 if (adapter->hw.media_type == e1000_media_type_copper) {
569 /* according to the manual, the phy will retain its
570 * settings across a power-down/up cycle */
571 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
572 mii_reg &= ~MII_CR_POWER_DOWN;
573 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
577 static void e1000_power_down_phy(struct e1000_adapter *adapter)
579 /* Power down the PHY so no link is implied when interface is down *
580 * The PHY cannot be powered down if any of the following is TRUE *
583 * (c) SoL/IDER session is active */
584 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
585 adapter->hw.media_type == e1000_media_type_copper) {
586 uint16_t mii_reg = 0;
588 switch (adapter->hw.mac_type) {
591 case e1000_82545_rev_3:
593 case e1000_82546_rev_3:
595 case e1000_82541_rev_2:
597 case e1000_82547_rev_2:
598 if (E1000_READ_REG(&adapter->hw, MANC) &
605 case e1000_80003es2lan:
607 if (e1000_check_mng_mode(&adapter->hw) ||
608 e1000_check_phy_reset_block(&adapter->hw))
614 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
615 mii_reg |= MII_CR_POWER_DOWN;
616 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
624 e1000_down(struct e1000_adapter *adapter)
626 struct net_device *netdev = adapter->netdev;
628 /* signal that we're down so the interrupt handler does not
629 * reschedule our watchdog timer */
630 set_bit(__E1000_DOWN, &adapter->flags);
632 #ifdef CONFIG_E1000_NAPI
633 netif_poll_disable(netdev);
635 e1000_irq_disable(adapter);
637 del_timer_sync(&adapter->tx_fifo_stall_timer);
638 del_timer_sync(&adapter->watchdog_timer);
639 del_timer_sync(&adapter->phy_info_timer);
641 netdev->tx_queue_len = adapter->tx_queue_len;
642 adapter->link_speed = 0;
643 adapter->link_duplex = 0;
644 netif_carrier_off(netdev);
645 netif_stop_queue(netdev);
647 e1000_reset(adapter);
648 e1000_clean_all_tx_rings(adapter);
649 e1000_clean_all_rx_rings(adapter);
653 e1000_reinit_locked(struct e1000_adapter *adapter)
655 WARN_ON(in_interrupt());
656 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
660 clear_bit(__E1000_RESETTING, &adapter->flags);
664 e1000_reset(struct e1000_adapter *adapter)
666 uint32_t pba = 0, tx_space, min_tx_space, min_rx_space;
667 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
668 boolean_t legacy_pba_adjust = FALSE;
670 /* Repartition Pba for greater than 9k mtu
671 * To take effect CTRL.RST is required.
674 switch (adapter->hw.mac_type) {
675 case e1000_82542_rev2_0:
676 case e1000_82542_rev2_1:
681 case e1000_82541_rev_2:
682 legacy_pba_adjust = TRUE;
686 case e1000_82545_rev_3:
688 case e1000_82546_rev_3:
692 case e1000_82547_rev_2:
693 legacy_pba_adjust = TRUE;
698 case e1000_80003es2lan:
706 case e1000_undefined:
711 if (legacy_pba_adjust == TRUE) {
712 if (adapter->netdev->mtu > E1000_RXBUFFER_8192)
713 pba -= 8; /* allocate more FIFO for Tx */
715 if (adapter->hw.mac_type == e1000_82547) {
716 adapter->tx_fifo_head = 0;
717 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
718 adapter->tx_fifo_size =
719 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
720 atomic_set(&adapter->tx_fifo_stall, 0);
722 } else if (adapter->hw.max_frame_size > MAXIMUM_ETHERNET_FRAME_SIZE) {
723 /* adjust PBA for jumbo frames */
724 E1000_WRITE_REG(&adapter->hw, PBA, pba);
726 /* To maintain wire speed transmits, the Tx FIFO should be
727 * large enough to accomodate two full transmit packets,
728 * rounded up to the next 1KB and expressed in KB. Likewise,
729 * the Rx FIFO should be large enough to accomodate at least
730 * one full receive packet and is similarly rounded up and
731 * expressed in KB. */
732 pba = E1000_READ_REG(&adapter->hw, PBA);
733 /* upper 16 bits has Tx packet buffer allocation size in KB */
734 tx_space = pba >> 16;
735 /* lower 16 bits has Rx packet buffer allocation size in KB */
737 /* don't include ethernet FCS because hardware appends/strips */
738 min_rx_space = adapter->netdev->mtu + ENET_HEADER_SIZE +
740 min_tx_space = min_rx_space;
742 min_tx_space = ALIGN(min_tx_space, 1024);
744 min_rx_space = ALIGN(min_rx_space, 1024);
747 /* If current Tx allocation is less than the min Tx FIFO size,
748 * and the min Tx FIFO size is less than the current Rx FIFO
749 * allocation, take space away from current Rx allocation */
750 if (tx_space < min_tx_space &&
751 ((min_tx_space - tx_space) < pba)) {
752 pba = pba - (min_tx_space - tx_space);
754 /* PCI/PCIx hardware has PBA alignment constraints */
755 switch (adapter->hw.mac_type) {
756 case e1000_82545 ... e1000_82546_rev_3:
757 pba &= ~(E1000_PBA_8K - 1);
763 /* if short on rx space, rx wins and must trump tx
764 * adjustment or use Early Receive if available */
765 if (pba < min_rx_space) {
766 switch (adapter->hw.mac_type) {
768 /* ERT enabled in e1000_configure_rx */
778 E1000_WRITE_REG(&adapter->hw, PBA, pba);
780 /* flow control settings */
781 /* Set the FC high water mark to 90% of the FIFO size.
782 * Required to clear last 3 LSB */
783 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
784 /* We can't use 90% on small FIFOs because the remainder
785 * would be less than 1 full frame. In this case, we size
786 * it to allow at least a full frame above the high water
788 if (pba < E1000_PBA_16K)
789 fc_high_water_mark = (pba * 1024) - 1600;
791 adapter->hw.fc_high_water = fc_high_water_mark;
792 adapter->hw.fc_low_water = fc_high_water_mark - 8;
793 if (adapter->hw.mac_type == e1000_80003es2lan)
794 adapter->hw.fc_pause_time = 0xFFFF;
796 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
797 adapter->hw.fc_send_xon = 1;
798 adapter->hw.fc = adapter->hw.original_fc;
800 /* Allow time for pending master requests to run */
801 e1000_reset_hw(&adapter->hw);
802 if (adapter->hw.mac_type >= e1000_82544)
803 E1000_WRITE_REG(&adapter->hw, WUC, 0);
805 if (e1000_init_hw(&adapter->hw))
806 DPRINTK(PROBE, ERR, "Hardware Error\n");
807 e1000_update_mng_vlan(adapter);
809 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
810 if (adapter->hw.mac_type >= e1000_82544 &&
811 adapter->hw.mac_type <= e1000_82547_rev_2 &&
812 adapter->hw.autoneg == 1 &&
813 adapter->hw.autoneg_advertised == ADVERTISE_1000_FULL) {
814 uint32_t ctrl = E1000_READ_REG(&adapter->hw, CTRL);
815 /* clear phy power management bit if we are in gig only mode,
816 * which if enabled will attempt negotiation to 100Mb, which
817 * can cause a loss of link at power off or driver unload */
818 ctrl &= ~E1000_CTRL_SWDPIN3;
819 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
822 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
823 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
825 e1000_reset_adaptive(&adapter->hw);
826 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
828 if (!adapter->smart_power_down &&
829 (adapter->hw.mac_type == e1000_82571 ||
830 adapter->hw.mac_type == e1000_82572)) {
831 uint16_t phy_data = 0;
832 /* speed up time to link by disabling smart power down, ignore
833 * the return value of this function because there is nothing
834 * different we would do if it failed */
835 e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
837 phy_data &= ~IGP02E1000_PM_SPD;
838 e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
842 e1000_release_manageability(adapter);
846 * e1000_probe - Device Initialization Routine
847 * @pdev: PCI device information struct
848 * @ent: entry in e1000_pci_tbl
850 * Returns 0 on success, negative on failure
852 * e1000_probe initializes an adapter identified by a pci_dev structure.
853 * The OS initialization, configuring of the adapter private structure,
854 * and a hardware reset occur.
858 e1000_probe(struct pci_dev *pdev,
859 const struct pci_device_id *ent)
861 struct net_device *netdev;
862 struct e1000_adapter *adapter;
863 unsigned long mmio_start, mmio_len;
864 unsigned long flash_start, flash_len;
866 static int cards_found = 0;
867 static int global_quad_port_a = 0; /* global ksp3 port a indication */
868 int i, err, pci_using_dac;
869 uint16_t eeprom_data = 0;
870 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
871 if ((err = pci_enable_device(pdev)))
874 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
875 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
878 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
879 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
880 E1000_ERR("No usable DMA configuration, aborting\n");
886 if ((err = pci_request_regions(pdev, e1000_driver_name)))
889 pci_set_master(pdev);
892 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
894 goto err_alloc_etherdev;
896 SET_MODULE_OWNER(netdev);
897 SET_NETDEV_DEV(netdev, &pdev->dev);
899 pci_set_drvdata(pdev, netdev);
900 adapter = netdev_priv(netdev);
901 adapter->netdev = netdev;
902 adapter->pdev = pdev;
903 adapter->hw.back = adapter;
904 adapter->msg_enable = (1 << debug) - 1;
906 mmio_start = pci_resource_start(pdev, BAR_0);
907 mmio_len = pci_resource_len(pdev, BAR_0);
910 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
911 if (!adapter->hw.hw_addr)
914 for (i = BAR_1; i <= BAR_5; i++) {
915 if (pci_resource_len(pdev, i) == 0)
917 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
918 adapter->hw.io_base = pci_resource_start(pdev, i);
923 netdev->open = &e1000_open;
924 netdev->stop = &e1000_close;
925 netdev->hard_start_xmit = &e1000_xmit_frame;
926 netdev->get_stats = &e1000_get_stats;
927 netdev->set_multicast_list = &e1000_set_multi;
928 netdev->set_mac_address = &e1000_set_mac;
929 netdev->change_mtu = &e1000_change_mtu;
930 netdev->do_ioctl = &e1000_ioctl;
931 e1000_set_ethtool_ops(netdev);
932 netdev->tx_timeout = &e1000_tx_timeout;
933 netdev->watchdog_timeo = 5 * HZ;
934 #ifdef CONFIG_E1000_NAPI
935 netdev->poll = &e1000_clean;
938 netdev->vlan_rx_register = e1000_vlan_rx_register;
939 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
940 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
941 #ifdef CONFIG_NET_POLL_CONTROLLER
942 netdev->poll_controller = e1000_netpoll;
944 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
946 netdev->mem_start = mmio_start;
947 netdev->mem_end = mmio_start + mmio_len;
948 netdev->base_addr = adapter->hw.io_base;
950 adapter->bd_number = cards_found;
952 /* setup the private structure */
954 if ((err = e1000_sw_init(adapter)))
958 /* Flash BAR mapping must happen after e1000_sw_init
959 * because it depends on mac_type */
960 if ((adapter->hw.mac_type == e1000_ich8lan) &&
961 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
962 flash_start = pci_resource_start(pdev, 1);
963 flash_len = pci_resource_len(pdev, 1);
964 adapter->hw.flash_address = ioremap(flash_start, flash_len);
965 if (!adapter->hw.flash_address)
969 if (e1000_check_phy_reset_block(&adapter->hw))
970 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
972 if (adapter->hw.mac_type >= e1000_82543) {
973 netdev->features = NETIF_F_SG |
977 NETIF_F_HW_VLAN_FILTER;
978 if (adapter->hw.mac_type == e1000_ich8lan)
979 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
982 if ((adapter->hw.mac_type >= e1000_82544) &&
983 (adapter->hw.mac_type != e1000_82547))
984 netdev->features |= NETIF_F_TSO;
986 if (adapter->hw.mac_type > e1000_82547_rev_2)
987 netdev->features |= NETIF_F_TSO6;
989 netdev->features |= NETIF_F_HIGHDMA;
991 netdev->features |= NETIF_F_LLTX;
993 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
995 /* initialize eeprom parameters */
997 if (e1000_init_eeprom_params(&adapter->hw)) {
998 E1000_ERR("EEPROM initialization failed\n");
1002 /* before reading the EEPROM, reset the controller to
1003 * put the device in a known good starting state */
1005 e1000_reset_hw(&adapter->hw);
1007 /* make sure the EEPROM is good */
1009 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
1010 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
1014 /* copy the MAC address out of the EEPROM */
1016 if (e1000_read_mac_addr(&adapter->hw))
1017 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
1018 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
1019 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1021 if (!is_valid_ether_addr(netdev->perm_addr)) {
1022 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1026 e1000_get_bus_info(&adapter->hw);
1028 init_timer(&adapter->tx_fifo_stall_timer);
1029 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
1030 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
1032 init_timer(&adapter->watchdog_timer);
1033 adapter->watchdog_timer.function = &e1000_watchdog;
1034 adapter->watchdog_timer.data = (unsigned long) adapter;
1036 init_timer(&adapter->phy_info_timer);
1037 adapter->phy_info_timer.function = &e1000_update_phy_info;
1038 adapter->phy_info_timer.data = (unsigned long) adapter;
1040 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1042 e1000_check_options(adapter);
1044 /* Initial Wake on LAN setting
1045 * If APM wake is enabled in the EEPROM,
1046 * enable the ACPI Magic Packet filter
1049 switch (adapter->hw.mac_type) {
1050 case e1000_82542_rev2_0:
1051 case e1000_82542_rev2_1:
1055 e1000_read_eeprom(&adapter->hw,
1056 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
1057 eeprom_apme_mask = E1000_EEPROM_82544_APM;
1060 e1000_read_eeprom(&adapter->hw,
1061 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
1062 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
1065 case e1000_82546_rev_3:
1067 case e1000_80003es2lan:
1068 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
1069 e1000_read_eeprom(&adapter->hw,
1070 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1075 e1000_read_eeprom(&adapter->hw,
1076 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1079 if (eeprom_data & eeprom_apme_mask)
1080 adapter->eeprom_wol |= E1000_WUFC_MAG;
1082 /* now that we have the eeprom settings, apply the special cases
1083 * where the eeprom may be wrong or the board simply won't support
1084 * wake on lan on a particular port */
1085 switch (pdev->device) {
1086 case E1000_DEV_ID_82546GB_PCIE:
1087 adapter->eeprom_wol = 0;
1089 case E1000_DEV_ID_82546EB_FIBER:
1090 case E1000_DEV_ID_82546GB_FIBER:
1091 case E1000_DEV_ID_82571EB_FIBER:
1092 /* Wake events only supported on port A for dual fiber
1093 * regardless of eeprom setting */
1094 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
1095 adapter->eeprom_wol = 0;
1097 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1098 case E1000_DEV_ID_82571EB_QUAD_COPPER:
1099 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
1100 /* if quad port adapter, disable WoL on all but port A */
1101 if (global_quad_port_a != 0)
1102 adapter->eeprom_wol = 0;
1104 adapter->quad_port_a = 1;
1105 /* Reset for multiple quad port adapters */
1106 if (++global_quad_port_a == 4)
1107 global_quad_port_a = 0;
1111 /* initialize the wol settings based on the eeprom settings */
1112 adapter->wol = adapter->eeprom_wol;
1114 /* print bus type/speed/width info */
1116 struct e1000_hw *hw = &adapter->hw;
1117 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
1118 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
1119 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
1120 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
1121 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
1122 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
1123 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
1124 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
1125 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
1126 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
1127 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
1131 for (i = 0; i < 6; i++)
1132 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
1134 /* reset the hardware with the new settings */
1135 e1000_reset(adapter);
1137 /* If the controller is 82573 and f/w is AMT, do not set
1138 * DRV_LOAD until the interface is up. For all other cases,
1139 * let the f/w know that the h/w is now under the control
1141 if (adapter->hw.mac_type != e1000_82573 ||
1142 !e1000_check_mng_mode(&adapter->hw))
1143 e1000_get_hw_control(adapter);
1145 strcpy(netdev->name, "eth%d");
1146 if ((err = register_netdev(netdev)))
1149 /* tell the stack to leave us alone until e1000_open() is called */
1150 netif_carrier_off(netdev);
1151 netif_stop_queue(netdev);
1153 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1159 e1000_release_hw_control(adapter);
1161 if (!e1000_check_phy_reset_block(&adapter->hw))
1162 e1000_phy_hw_reset(&adapter->hw);
1164 if (adapter->hw.flash_address)
1165 iounmap(adapter->hw.flash_address);
1167 #ifdef CONFIG_E1000_NAPI
1168 for (i = 0; i < adapter->num_rx_queues; i++)
1169 dev_put(&adapter->polling_netdev[i]);
1172 kfree(adapter->tx_ring);
1173 kfree(adapter->rx_ring);
1174 #ifdef CONFIG_E1000_NAPI
1175 kfree(adapter->polling_netdev);
1178 iounmap(adapter->hw.hw_addr);
1180 free_netdev(netdev);
1182 pci_release_regions(pdev);
1185 pci_disable_device(pdev);
1190 * e1000_remove - Device Removal Routine
1191 * @pdev: PCI device information struct
1193 * e1000_remove is called by the PCI subsystem to alert the driver
1194 * that it should release a PCI device. The could be caused by a
1195 * Hot-Plug event, or because the driver is going to be removed from
1199 static void __devexit
1200 e1000_remove(struct pci_dev *pdev)
1202 struct net_device *netdev = pci_get_drvdata(pdev);
1203 struct e1000_adapter *adapter = netdev_priv(netdev);
1204 #ifdef CONFIG_E1000_NAPI
1208 cancel_work_sync(&adapter->reset_task);
1210 e1000_release_manageability(adapter);
1212 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1213 * would have already happened in close and is redundant. */
1214 e1000_release_hw_control(adapter);
1216 unregister_netdev(netdev);
1217 #ifdef CONFIG_E1000_NAPI
1218 for (i = 0; i < adapter->num_rx_queues; i++)
1219 dev_put(&adapter->polling_netdev[i]);
1222 if (!e1000_check_phy_reset_block(&adapter->hw))
1223 e1000_phy_hw_reset(&adapter->hw);
1225 kfree(adapter->tx_ring);
1226 kfree(adapter->rx_ring);
1227 #ifdef CONFIG_E1000_NAPI
1228 kfree(adapter->polling_netdev);
1231 iounmap(adapter->hw.hw_addr);
1232 if (adapter->hw.flash_address)
1233 iounmap(adapter->hw.flash_address);
1234 pci_release_regions(pdev);
1236 free_netdev(netdev);
1238 pci_disable_device(pdev);
1242 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1243 * @adapter: board private structure to initialize
1245 * e1000_sw_init initializes the Adapter private data structure.
1246 * Fields are initialized based on PCI device information and
1247 * OS network device settings (MTU size).
1250 static int __devinit
1251 e1000_sw_init(struct e1000_adapter *adapter)
1253 struct e1000_hw *hw = &adapter->hw;
1254 struct net_device *netdev = adapter->netdev;
1255 struct pci_dev *pdev = adapter->pdev;
1256 #ifdef CONFIG_E1000_NAPI
1260 /* PCI config space info */
1262 hw->vendor_id = pdev->vendor;
1263 hw->device_id = pdev->device;
1264 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1265 hw->subsystem_id = pdev->subsystem_device;
1267 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
1269 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1271 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1272 adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
1273 hw->max_frame_size = netdev->mtu +
1274 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1275 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1277 /* identify the MAC */
1279 if (e1000_set_mac_type(hw)) {
1280 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1284 switch (hw->mac_type) {
1289 case e1000_82541_rev_2:
1290 case e1000_82547_rev_2:
1291 hw->phy_init_script = 1;
1295 e1000_set_media_type(hw);
1297 hw->wait_autoneg_complete = FALSE;
1298 hw->tbi_compatibility_en = TRUE;
1299 hw->adaptive_ifs = TRUE;
1301 /* Copper options */
1303 if (hw->media_type == e1000_media_type_copper) {
1304 hw->mdix = AUTO_ALL_MODES;
1305 hw->disable_polarity_correction = FALSE;
1306 hw->master_slave = E1000_MASTER_SLAVE;
1309 adapter->num_tx_queues = 1;
1310 adapter->num_rx_queues = 1;
1312 if (e1000_alloc_queues(adapter)) {
1313 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1317 #ifdef CONFIG_E1000_NAPI
1318 for (i = 0; i < adapter->num_rx_queues; i++) {
1319 adapter->polling_netdev[i].priv = adapter;
1320 adapter->polling_netdev[i].poll = &e1000_clean;
1321 adapter->polling_netdev[i].weight = 64;
1322 dev_hold(&adapter->polling_netdev[i]);
1323 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1325 spin_lock_init(&adapter->tx_queue_lock);
1328 atomic_set(&adapter->irq_sem, 1);
1329 spin_lock_init(&adapter->stats_lock);
1331 set_bit(__E1000_DOWN, &adapter->flags);
1337 * e1000_alloc_queues - Allocate memory for all rings
1338 * @adapter: board private structure to initialize
1340 * We allocate one ring per queue at run-time since we don't know the
1341 * number of queues at compile-time. The polling_netdev array is
1342 * intended for Multiqueue, but should work fine with a single queue.
1345 static int __devinit
1346 e1000_alloc_queues(struct e1000_adapter *adapter)
1348 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1349 sizeof(struct e1000_tx_ring), GFP_KERNEL);
1350 if (!adapter->tx_ring)
1353 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1354 sizeof(struct e1000_rx_ring), GFP_KERNEL);
1355 if (!adapter->rx_ring) {
1356 kfree(adapter->tx_ring);
1360 #ifdef CONFIG_E1000_NAPI
1361 adapter->polling_netdev = kcalloc(adapter->num_rx_queues,
1362 sizeof(struct net_device),
1364 if (!adapter->polling_netdev) {
1365 kfree(adapter->tx_ring);
1366 kfree(adapter->rx_ring);
1371 return E1000_SUCCESS;
1375 * e1000_open - Called when a network interface is made active
1376 * @netdev: network interface device structure
1378 * Returns 0 on success, negative value on failure
1380 * The open entry point is called when a network interface is made
1381 * active by the system (IFF_UP). At this point all resources needed
1382 * for transmit and receive operations are allocated, the interrupt
1383 * handler is registered with the OS, the watchdog timer is started,
1384 * and the stack is notified that the interface is ready.
1388 e1000_open(struct net_device *netdev)
1390 struct e1000_adapter *adapter = netdev_priv(netdev);
1393 /* disallow open during test */
1394 if (test_bit(__E1000_TESTING, &adapter->flags))
1397 /* allocate transmit descriptors */
1398 err = e1000_setup_all_tx_resources(adapter);
1402 /* allocate receive descriptors */
1403 err = e1000_setup_all_rx_resources(adapter);
1407 e1000_power_up_phy(adapter);
1409 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1410 if ((adapter->hw.mng_cookie.status &
1411 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1412 e1000_update_mng_vlan(adapter);
1415 /* If AMT is enabled, let the firmware know that the network
1416 * interface is now open */
1417 if (adapter->hw.mac_type == e1000_82573 &&
1418 e1000_check_mng_mode(&adapter->hw))
1419 e1000_get_hw_control(adapter);
1421 /* before we allocate an interrupt, we must be ready to handle it.
1422 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1423 * as soon as we call pci_request_irq, so we have to setup our
1424 * clean_rx handler before we do so. */
1425 e1000_configure(adapter);
1427 err = e1000_request_irq(adapter);
1431 /* From here on the code is the same as e1000_up() */
1432 clear_bit(__E1000_DOWN, &adapter->flags);
1434 #ifdef CONFIG_E1000_NAPI
1435 netif_poll_enable(netdev);
1438 e1000_irq_enable(adapter);
1440 /* fire a link status change interrupt to start the watchdog */
1441 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC);
1443 return E1000_SUCCESS;
1446 e1000_release_hw_control(adapter);
1447 e1000_power_down_phy(adapter);
1448 e1000_free_all_rx_resources(adapter);
1450 e1000_free_all_tx_resources(adapter);
1452 e1000_reset(adapter);
1458 * e1000_close - Disables a network interface
1459 * @netdev: network interface device structure
1461 * Returns 0, this is not allowed to fail
1463 * The close entry point is called when an interface is de-activated
1464 * by the OS. The hardware is still under the drivers control, but
1465 * needs to be disabled. A global MAC reset is issued to stop the
1466 * hardware, and all transmit and receive resources are freed.
1470 e1000_close(struct net_device *netdev)
1472 struct e1000_adapter *adapter = netdev_priv(netdev);
1474 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1475 e1000_down(adapter);
1476 e1000_power_down_phy(adapter);
1477 e1000_free_irq(adapter);
1479 e1000_free_all_tx_resources(adapter);
1480 e1000_free_all_rx_resources(adapter);
1482 /* kill manageability vlan ID if supported, but not if a vlan with
1483 * the same ID is registered on the host OS (let 8021q kill it) */
1484 if ((adapter->hw.mng_cookie.status &
1485 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1487 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id))) {
1488 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1491 /* If AMT is enabled, let the firmware know that the network
1492 * interface is now closed */
1493 if (adapter->hw.mac_type == e1000_82573 &&
1494 e1000_check_mng_mode(&adapter->hw))
1495 e1000_release_hw_control(adapter);
1501 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1502 * @adapter: address of board private structure
1503 * @start: address of beginning of memory
1504 * @len: length of memory
1507 e1000_check_64k_bound(struct e1000_adapter *adapter,
1508 void *start, unsigned long len)
1510 unsigned long begin = (unsigned long) start;
1511 unsigned long end = begin + len;
1513 /* First rev 82545 and 82546 need to not allow any memory
1514 * write location to cross 64k boundary due to errata 23 */
1515 if (adapter->hw.mac_type == e1000_82545 ||
1516 adapter->hw.mac_type == e1000_82546) {
1517 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1524 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1525 * @adapter: board private structure
1526 * @txdr: tx descriptor ring (for a specific queue) to setup
1528 * Return 0 on success, negative on failure
1532 e1000_setup_tx_resources(struct e1000_adapter *adapter,
1533 struct e1000_tx_ring *txdr)
1535 struct pci_dev *pdev = adapter->pdev;
1538 size = sizeof(struct e1000_buffer) * txdr->count;
1539 txdr->buffer_info = vmalloc(size);
1540 if (!txdr->buffer_info) {
1542 "Unable to allocate memory for the transmit descriptor ring\n");
1545 memset(txdr->buffer_info, 0, size);
1547 /* round up to nearest 4K */
1549 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1550 txdr->size = ALIGN(txdr->size, 4096);
1552 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1555 vfree(txdr->buffer_info);
1557 "Unable to allocate memory for the transmit descriptor ring\n");
1561 /* Fix for errata 23, can't cross 64kB boundary */
1562 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1563 void *olddesc = txdr->desc;
1564 dma_addr_t olddma = txdr->dma;
1565 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1566 "at %p\n", txdr->size, txdr->desc);
1567 /* Try again, without freeing the previous */
1568 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1569 /* Failed allocation, critical failure */
1571 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1572 goto setup_tx_desc_die;
1575 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1577 pci_free_consistent(pdev, txdr->size, txdr->desc,
1579 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1581 "Unable to allocate aligned memory "
1582 "for the transmit descriptor ring\n");
1583 vfree(txdr->buffer_info);
1586 /* Free old allocation, new allocation was successful */
1587 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1590 memset(txdr->desc, 0, txdr->size);
1592 txdr->next_to_use = 0;
1593 txdr->next_to_clean = 0;
1594 spin_lock_init(&txdr->tx_lock);
1600 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1601 * (Descriptors) for all queues
1602 * @adapter: board private structure
1604 * Return 0 on success, negative on failure
1608 e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1612 for (i = 0; i < adapter->num_tx_queues; i++) {
1613 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1616 "Allocation for Tx Queue %u failed\n", i);
1617 for (i-- ; i >= 0; i--)
1618 e1000_free_tx_resources(adapter,
1619 &adapter->tx_ring[i]);
1628 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1629 * @adapter: board private structure
1631 * Configure the Tx unit of the MAC after a reset.
1635 e1000_configure_tx(struct e1000_adapter *adapter)
1638 struct e1000_hw *hw = &adapter->hw;
1639 uint32_t tdlen, tctl, tipg, tarc;
1640 uint32_t ipgr1, ipgr2;
1642 /* Setup the HW Tx Head and Tail descriptor pointers */
1644 switch (adapter->num_tx_queues) {
1647 tdba = adapter->tx_ring[0].dma;
1648 tdlen = adapter->tx_ring[0].count *
1649 sizeof(struct e1000_tx_desc);
1650 E1000_WRITE_REG(hw, TDLEN, tdlen);
1651 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1652 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
1653 E1000_WRITE_REG(hw, TDT, 0);
1654 E1000_WRITE_REG(hw, TDH, 0);
1655 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1656 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
1660 /* Set the default values for the Tx Inter Packet Gap timer */
1661 if (adapter->hw.mac_type <= e1000_82547_rev_2 &&
1662 (hw->media_type == e1000_media_type_fiber ||
1663 hw->media_type == e1000_media_type_internal_serdes))
1664 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1666 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1668 switch (hw->mac_type) {
1669 case e1000_82542_rev2_0:
1670 case e1000_82542_rev2_1:
1671 tipg = DEFAULT_82542_TIPG_IPGT;
1672 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1673 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1675 case e1000_80003es2lan:
1676 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1677 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1680 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1681 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1684 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1685 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1686 E1000_WRITE_REG(hw, TIPG, tipg);
1688 /* Set the Tx Interrupt Delay register */
1690 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1691 if (hw->mac_type >= e1000_82540)
1692 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1694 /* Program the Transmit Control Register */
1696 tctl = E1000_READ_REG(hw, TCTL);
1697 tctl &= ~E1000_TCTL_CT;
1698 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1699 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1701 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1702 tarc = E1000_READ_REG(hw, TARC0);
1703 /* set the speed mode bit, we'll clear it if we're not at
1704 * gigabit link later */
1706 E1000_WRITE_REG(hw, TARC0, tarc);
1707 } else if (hw->mac_type == e1000_80003es2lan) {
1708 tarc = E1000_READ_REG(hw, TARC0);
1710 E1000_WRITE_REG(hw, TARC0, tarc);
1711 tarc = E1000_READ_REG(hw, TARC1);
1713 E1000_WRITE_REG(hw, TARC1, tarc);
1716 e1000_config_collision_dist(hw);
1718 /* Setup Transmit Descriptor Settings for eop descriptor */
1719 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1721 /* only set IDE if we are delaying interrupts using the timers */
1722 if (adapter->tx_int_delay)
1723 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1725 if (hw->mac_type < e1000_82543)
1726 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1728 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1730 /* Cache if we're 82544 running in PCI-X because we'll
1731 * need this to apply a workaround later in the send path. */
1732 if (hw->mac_type == e1000_82544 &&
1733 hw->bus_type == e1000_bus_type_pcix)
1734 adapter->pcix_82544 = 1;
1736 E1000_WRITE_REG(hw, TCTL, tctl);
1741 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1742 * @adapter: board private structure
1743 * @rxdr: rx descriptor ring (for a specific queue) to setup
1745 * Returns 0 on success, negative on failure
1749 e1000_setup_rx_resources(struct e1000_adapter *adapter,
1750 struct e1000_rx_ring *rxdr)
1752 struct pci_dev *pdev = adapter->pdev;
1755 size = sizeof(struct e1000_buffer) * rxdr->count;
1756 rxdr->buffer_info = vmalloc(size);
1757 if (!rxdr->buffer_info) {
1759 "Unable to allocate memory for the receive descriptor ring\n");
1762 memset(rxdr->buffer_info, 0, size);
1764 rxdr->ps_page = kcalloc(rxdr->count, sizeof(struct e1000_ps_page),
1766 if (!rxdr->ps_page) {
1767 vfree(rxdr->buffer_info);
1769 "Unable to allocate memory for the receive descriptor ring\n");
1773 rxdr->ps_page_dma = kcalloc(rxdr->count,
1774 sizeof(struct e1000_ps_page_dma),
1776 if (!rxdr->ps_page_dma) {
1777 vfree(rxdr->buffer_info);
1778 kfree(rxdr->ps_page);
1780 "Unable to allocate memory for the receive descriptor ring\n");
1784 if (adapter->hw.mac_type <= e1000_82547_rev_2)
1785 desc_len = sizeof(struct e1000_rx_desc);
1787 desc_len = sizeof(union e1000_rx_desc_packet_split);
1789 /* Round up to nearest 4K */
1791 rxdr->size = rxdr->count * desc_len;
1792 rxdr->size = ALIGN(rxdr->size, 4096);
1794 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1798 "Unable to allocate memory for the receive descriptor ring\n");
1800 vfree(rxdr->buffer_info);
1801 kfree(rxdr->ps_page);
1802 kfree(rxdr->ps_page_dma);
1806 /* Fix for errata 23, can't cross 64kB boundary */
1807 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1808 void *olddesc = rxdr->desc;
1809 dma_addr_t olddma = rxdr->dma;
1810 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1811 "at %p\n", rxdr->size, rxdr->desc);
1812 /* Try again, without freeing the previous */
1813 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1814 /* Failed allocation, critical failure */
1816 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1818 "Unable to allocate memory "
1819 "for the receive descriptor ring\n");
1820 goto setup_rx_desc_die;
1823 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1825 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1827 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1829 "Unable to allocate aligned memory "
1830 "for the receive descriptor ring\n");
1831 goto setup_rx_desc_die;
1833 /* Free old allocation, new allocation was successful */
1834 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1837 memset(rxdr->desc, 0, rxdr->size);
1839 rxdr->next_to_clean = 0;
1840 rxdr->next_to_use = 0;
1846 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1847 * (Descriptors) for all queues
1848 * @adapter: board private structure
1850 * Return 0 on success, negative on failure
1854 e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1858 for (i = 0; i < adapter->num_rx_queues; i++) {
1859 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1862 "Allocation for Rx Queue %u failed\n", i);
1863 for (i-- ; i >= 0; i--)
1864 e1000_free_rx_resources(adapter,
1865 &adapter->rx_ring[i]);
1874 * e1000_setup_rctl - configure the receive control registers
1875 * @adapter: Board private structure
1877 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1878 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1880 e1000_setup_rctl(struct e1000_adapter *adapter)
1882 uint32_t rctl, rfctl;
1883 uint32_t psrctl = 0;
1884 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1888 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1890 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1892 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1893 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1894 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1896 if (adapter->hw.tbi_compatibility_on == 1)
1897 rctl |= E1000_RCTL_SBP;
1899 rctl &= ~E1000_RCTL_SBP;
1901 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1902 rctl &= ~E1000_RCTL_LPE;
1904 rctl |= E1000_RCTL_LPE;
1906 /* Setup buffer sizes */
1907 rctl &= ~E1000_RCTL_SZ_4096;
1908 rctl |= E1000_RCTL_BSEX;
1909 switch (adapter->rx_buffer_len) {
1910 case E1000_RXBUFFER_256:
1911 rctl |= E1000_RCTL_SZ_256;
1912 rctl &= ~E1000_RCTL_BSEX;
1914 case E1000_RXBUFFER_512:
1915 rctl |= E1000_RCTL_SZ_512;
1916 rctl &= ~E1000_RCTL_BSEX;
1918 case E1000_RXBUFFER_1024:
1919 rctl |= E1000_RCTL_SZ_1024;
1920 rctl &= ~E1000_RCTL_BSEX;
1922 case E1000_RXBUFFER_2048:
1924 rctl |= E1000_RCTL_SZ_2048;
1925 rctl &= ~E1000_RCTL_BSEX;
1927 case E1000_RXBUFFER_4096:
1928 rctl |= E1000_RCTL_SZ_4096;
1930 case E1000_RXBUFFER_8192:
1931 rctl |= E1000_RCTL_SZ_8192;
1933 case E1000_RXBUFFER_16384:
1934 rctl |= E1000_RCTL_SZ_16384;
1938 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1939 /* 82571 and greater support packet-split where the protocol
1940 * header is placed in skb->data and the packet data is
1941 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1942 * In the case of a non-split, skb->data is linearly filled,
1943 * followed by the page buffers. Therefore, skb->data is
1944 * sized to hold the largest protocol header.
1946 /* allocations using alloc_page take too long for regular MTU
1947 * so only enable packet split for jumbo frames */
1948 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1949 if ((adapter->hw.mac_type >= e1000_82571) && (pages <= 3) &&
1950 PAGE_SIZE <= 16384 && (rctl & E1000_RCTL_LPE))
1951 adapter->rx_ps_pages = pages;
1953 adapter->rx_ps_pages = 0;
1955 if (adapter->rx_ps_pages) {
1956 /* Configure extra packet-split registers */
1957 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1958 rfctl |= E1000_RFCTL_EXTEN;
1959 /* disable packet split support for IPv6 extension headers,
1960 * because some malformed IPv6 headers can hang the RX */
1961 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
1962 E1000_RFCTL_NEW_IPV6_EXT_DIS);
1964 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1966 rctl |= E1000_RCTL_DTYP_PS;
1968 psrctl |= adapter->rx_ps_bsize0 >>
1969 E1000_PSRCTL_BSIZE0_SHIFT;
1971 switch (adapter->rx_ps_pages) {
1973 psrctl |= PAGE_SIZE <<
1974 E1000_PSRCTL_BSIZE3_SHIFT;
1976 psrctl |= PAGE_SIZE <<
1977 E1000_PSRCTL_BSIZE2_SHIFT;
1979 psrctl |= PAGE_SIZE >>
1980 E1000_PSRCTL_BSIZE1_SHIFT;
1984 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1987 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1991 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1992 * @adapter: board private structure
1994 * Configure the Rx unit of the MAC after a reset.
1998 e1000_configure_rx(struct e1000_adapter *adapter)
2001 struct e1000_hw *hw = &adapter->hw;
2002 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
2004 if (adapter->rx_ps_pages) {
2005 /* this is a 32 byte descriptor */
2006 rdlen = adapter->rx_ring[0].count *
2007 sizeof(union e1000_rx_desc_packet_split);
2008 adapter->clean_rx = e1000_clean_rx_irq_ps;
2009 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
2011 rdlen = adapter->rx_ring[0].count *
2012 sizeof(struct e1000_rx_desc);
2013 adapter->clean_rx = e1000_clean_rx_irq;
2014 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2017 /* disable receives while setting up the descriptors */
2018 rctl = E1000_READ_REG(hw, RCTL);
2019 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
2021 /* set the Receive Delay Timer Register */
2022 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
2024 if (hw->mac_type >= e1000_82540) {
2025 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
2026 if (adapter->itr_setting != 0)
2027 E1000_WRITE_REG(hw, ITR,
2028 1000000000 / (adapter->itr * 256));
2031 if (hw->mac_type >= e1000_82571) {
2032 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
2033 /* Reset delay timers after every interrupt */
2034 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
2035 #ifdef CONFIG_E1000_NAPI
2036 /* Auto-Mask interrupts upon ICR access */
2037 ctrl_ext |= E1000_CTRL_EXT_IAME;
2038 E1000_WRITE_REG(hw, IAM, 0xffffffff);
2040 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
2041 E1000_WRITE_FLUSH(hw);
2044 /* Setup the HW Rx Head and Tail Descriptor Pointers and
2045 * the Base and Length of the Rx Descriptor Ring */
2046 switch (adapter->num_rx_queues) {
2049 rdba = adapter->rx_ring[0].dma;
2050 E1000_WRITE_REG(hw, RDLEN, rdlen);
2051 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
2052 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
2053 E1000_WRITE_REG(hw, RDT, 0);
2054 E1000_WRITE_REG(hw, RDH, 0);
2055 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
2056 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
2060 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
2061 if (hw->mac_type >= e1000_82543) {
2062 rxcsum = E1000_READ_REG(hw, RXCSUM);
2063 if (adapter->rx_csum == TRUE) {
2064 rxcsum |= E1000_RXCSUM_TUOFL;
2066 /* Enable 82571 IPv4 payload checksum for UDP fragments
2067 * Must be used in conjunction with packet-split. */
2068 if ((hw->mac_type >= e1000_82571) &&
2069 (adapter->rx_ps_pages)) {
2070 rxcsum |= E1000_RXCSUM_IPPCSE;
2073 rxcsum &= ~E1000_RXCSUM_TUOFL;
2074 /* don't need to clear IPPCSE as it defaults to 0 */
2076 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
2079 /* enable early receives on 82573, only takes effect if using > 2048
2080 * byte total frame size. for example only for jumbo frames */
2081 #define E1000_ERT_2048 0x100
2082 if (hw->mac_type == e1000_82573)
2083 E1000_WRITE_REG(hw, ERT, E1000_ERT_2048);
2085 /* Enable Receives */
2086 E1000_WRITE_REG(hw, RCTL, rctl);
2090 * e1000_free_tx_resources - Free Tx Resources per Queue
2091 * @adapter: board private structure
2092 * @tx_ring: Tx descriptor ring for a specific queue
2094 * Free all transmit software resources
2098 e1000_free_tx_resources(struct e1000_adapter *adapter,
2099 struct e1000_tx_ring *tx_ring)
2101 struct pci_dev *pdev = adapter->pdev;
2103 e1000_clean_tx_ring(adapter, tx_ring);
2105 vfree(tx_ring->buffer_info);
2106 tx_ring->buffer_info = NULL;
2108 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
2110 tx_ring->desc = NULL;
2114 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
2115 * @adapter: board private structure
2117 * Free all transmit software resources
2121 e1000_free_all_tx_resources(struct e1000_adapter *adapter)
2125 for (i = 0; i < adapter->num_tx_queues; i++)
2126 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
2130 e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
2131 struct e1000_buffer *buffer_info)
2133 if (buffer_info->dma) {
2134 pci_unmap_page(adapter->pdev,
2136 buffer_info->length,
2138 buffer_info->dma = 0;
2140 if (buffer_info->skb) {
2141 dev_kfree_skb_any(buffer_info->skb);
2142 buffer_info->skb = NULL;
2144 /* buffer_info must be completely set up in the transmit path */
2148 * e1000_clean_tx_ring - Free Tx Buffers
2149 * @adapter: board private structure
2150 * @tx_ring: ring to be cleaned
2154 e1000_clean_tx_ring(struct e1000_adapter *adapter,
2155 struct e1000_tx_ring *tx_ring)
2157 struct e1000_buffer *buffer_info;
2161 /* Free all the Tx ring sk_buffs */
2163 for (i = 0; i < tx_ring->count; i++) {
2164 buffer_info = &tx_ring->buffer_info[i];
2165 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2168 size = sizeof(struct e1000_buffer) * tx_ring->count;
2169 memset(tx_ring->buffer_info, 0, size);
2171 /* Zero out the descriptor ring */
2173 memset(tx_ring->desc, 0, tx_ring->size);
2175 tx_ring->next_to_use = 0;
2176 tx_ring->next_to_clean = 0;
2177 tx_ring->last_tx_tso = 0;
2179 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
2180 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
2184 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2185 * @adapter: board private structure
2189 e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
2193 for (i = 0; i < adapter->num_tx_queues; i++)
2194 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
2198 * e1000_free_rx_resources - Free Rx Resources
2199 * @adapter: board private structure
2200 * @rx_ring: ring to clean the resources from
2202 * Free all receive software resources
2206 e1000_free_rx_resources(struct e1000_adapter *adapter,
2207 struct e1000_rx_ring *rx_ring)
2209 struct pci_dev *pdev = adapter->pdev;
2211 e1000_clean_rx_ring(adapter, rx_ring);
2213 vfree(rx_ring->buffer_info);
2214 rx_ring->buffer_info = NULL;
2215 kfree(rx_ring->ps_page);
2216 rx_ring->ps_page = NULL;
2217 kfree(rx_ring->ps_page_dma);
2218 rx_ring->ps_page_dma = NULL;
2220 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2222 rx_ring->desc = NULL;
2226 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
2227 * @adapter: board private structure
2229 * Free all receive software resources
2233 e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2237 for (i = 0; i < adapter->num_rx_queues; i++)
2238 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2242 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2243 * @adapter: board private structure
2244 * @rx_ring: ring to free buffers from
2248 e1000_clean_rx_ring(struct e1000_adapter *adapter,
2249 struct e1000_rx_ring *rx_ring)
2251 struct e1000_buffer *buffer_info;
2252 struct e1000_ps_page *ps_page;
2253 struct e1000_ps_page_dma *ps_page_dma;
2254 struct pci_dev *pdev = adapter->pdev;
2258 /* Free all the Rx ring sk_buffs */
2259 for (i = 0; i < rx_ring->count; i++) {
2260 buffer_info = &rx_ring->buffer_info[i];
2261 if (buffer_info->skb) {
2262 pci_unmap_single(pdev,
2264 buffer_info->length,
2265 PCI_DMA_FROMDEVICE);
2267 dev_kfree_skb(buffer_info->skb);
2268 buffer_info->skb = NULL;
2270 ps_page = &rx_ring->ps_page[i];
2271 ps_page_dma = &rx_ring->ps_page_dma[i];
2272 for (j = 0; j < adapter->rx_ps_pages; j++) {
2273 if (!ps_page->ps_page[j]) break;
2274 pci_unmap_page(pdev,
2275 ps_page_dma->ps_page_dma[j],
2276 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2277 ps_page_dma->ps_page_dma[j] = 0;
2278 put_page(ps_page->ps_page[j]);
2279 ps_page->ps_page[j] = NULL;
2283 size = sizeof(struct e1000_buffer) * rx_ring->count;
2284 memset(rx_ring->buffer_info, 0, size);
2285 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2286 memset(rx_ring->ps_page, 0, size);
2287 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2288 memset(rx_ring->ps_page_dma, 0, size);
2290 /* Zero out the descriptor ring */
2292 memset(rx_ring->desc, 0, rx_ring->size);
2294 rx_ring->next_to_clean = 0;
2295 rx_ring->next_to_use = 0;
2297 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2298 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2302 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2303 * @adapter: board private structure
2307 e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2311 for (i = 0; i < adapter->num_rx_queues; i++)
2312 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2315 /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2316 * and memory write and invalidate disabled for certain operations
2319 e1000_enter_82542_rst(struct e1000_adapter *adapter)
2321 struct net_device *netdev = adapter->netdev;
2324 e1000_pci_clear_mwi(&adapter->hw);
2326 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2327 rctl |= E1000_RCTL_RST;
2328 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2329 E1000_WRITE_FLUSH(&adapter->hw);
2332 if (netif_running(netdev))
2333 e1000_clean_all_rx_rings(adapter);
2337 e1000_leave_82542_rst(struct e1000_adapter *adapter)
2339 struct net_device *netdev = adapter->netdev;
2342 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2343 rctl &= ~E1000_RCTL_RST;
2344 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2345 E1000_WRITE_FLUSH(&adapter->hw);
2348 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
2349 e1000_pci_set_mwi(&adapter->hw);
2351 if (netif_running(netdev)) {
2352 /* No need to loop, because 82542 supports only 1 queue */
2353 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
2354 e1000_configure_rx(adapter);
2355 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
2360 * e1000_set_mac - Change the Ethernet Address of the NIC
2361 * @netdev: network interface device structure
2362 * @p: pointer to an address structure
2364 * Returns 0 on success, negative on failure
2368 e1000_set_mac(struct net_device *netdev, void *p)
2370 struct e1000_adapter *adapter = netdev_priv(netdev);
2371 struct sockaddr *addr = p;
2373 if (!is_valid_ether_addr(addr->sa_data))
2374 return -EADDRNOTAVAIL;
2376 /* 82542 2.0 needs to be in reset to write receive address registers */
2378 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2379 e1000_enter_82542_rst(adapter);
2381 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2382 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2384 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2386 /* With 82571 controllers, LAA may be overwritten (with the default)
2387 * due to controller reset from the other port. */
2388 if (adapter->hw.mac_type == e1000_82571) {
2389 /* activate the work around */
2390 adapter->hw.laa_is_present = 1;
2392 /* Hold a copy of the LAA in RAR[14] This is done so that
2393 * between the time RAR[0] gets clobbered and the time it
2394 * gets fixed (in e1000_watchdog), the actual LAA is in one
2395 * of the RARs and no incoming packets directed to this port
2396 * are dropped. Eventaully the LAA will be in RAR[0] and
2398 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
2399 E1000_RAR_ENTRIES - 1);
2402 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2403 e1000_leave_82542_rst(adapter);
2409 * e1000_set_multi - Multicast and Promiscuous mode set
2410 * @netdev: network interface device structure
2412 * The set_multi entry point is called whenever the multicast address
2413 * list or the network interface flags are updated. This routine is
2414 * responsible for configuring the hardware for proper multicast,
2415 * promiscuous mode, and all-multi behavior.
2419 e1000_set_multi(struct net_device *netdev)
2421 struct e1000_adapter *adapter = netdev_priv(netdev);
2422 struct e1000_hw *hw = &adapter->hw;
2423 struct dev_mc_list *mc_ptr;
2425 uint32_t hash_value;
2426 int i, rar_entries = E1000_RAR_ENTRIES;
2427 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2428 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2429 E1000_NUM_MTA_REGISTERS;
2431 if (adapter->hw.mac_type == e1000_ich8lan)
2432 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
2434 /* reserve RAR[14] for LAA over-write work-around */
2435 if (adapter->hw.mac_type == e1000_82571)
2438 /* Check for Promiscuous and All Multicast modes */
2440 rctl = E1000_READ_REG(hw, RCTL);
2442 if (netdev->flags & IFF_PROMISC) {
2443 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2444 } else if (netdev->flags & IFF_ALLMULTI) {
2445 rctl |= E1000_RCTL_MPE;
2446 rctl &= ~E1000_RCTL_UPE;
2448 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2451 E1000_WRITE_REG(hw, RCTL, rctl);
2453 /* 82542 2.0 needs to be in reset to write receive address registers */
2455 if (hw->mac_type == e1000_82542_rev2_0)
2456 e1000_enter_82542_rst(adapter);
2458 /* load the first 14 multicast address into the exact filters 1-14
2459 * RAR 0 is used for the station MAC adddress
2460 * if there are not 14 addresses, go ahead and clear the filters
2461 * -- with 82571 controllers only 0-13 entries are filled here
2463 mc_ptr = netdev->mc_list;
2465 for (i = 1; i < rar_entries; i++) {
2467 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2468 mc_ptr = mc_ptr->next;
2470 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2471 E1000_WRITE_FLUSH(hw);
2472 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2473 E1000_WRITE_FLUSH(hw);
2477 /* clear the old settings from the multicast hash table */
2479 for (i = 0; i < mta_reg_count; i++) {
2480 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
2481 E1000_WRITE_FLUSH(hw);
2484 /* load any remaining addresses into the hash table */
2486 for (; mc_ptr; mc_ptr = mc_ptr->next) {
2487 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2488 e1000_mta_set(hw, hash_value);
2491 if (hw->mac_type == e1000_82542_rev2_0)
2492 e1000_leave_82542_rst(adapter);
2495 /* Need to wait a few seconds after link up to get diagnostic information from
2499 e1000_update_phy_info(unsigned long data)
2501 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2502 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2506 * e1000_82547_tx_fifo_stall - Timer Call-back
2507 * @data: pointer to adapter cast into an unsigned long
2511 e1000_82547_tx_fifo_stall(unsigned long data)
2513 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2514 struct net_device *netdev = adapter->netdev;
2517 if (atomic_read(&adapter->tx_fifo_stall)) {
2518 if ((E1000_READ_REG(&adapter->hw, TDT) ==
2519 E1000_READ_REG(&adapter->hw, TDH)) &&
2520 (E1000_READ_REG(&adapter->hw, TDFT) ==
2521 E1000_READ_REG(&adapter->hw, TDFH)) &&
2522 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2523 E1000_READ_REG(&adapter->hw, TDFHS))) {
2524 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2525 E1000_WRITE_REG(&adapter->hw, TCTL,
2526 tctl & ~E1000_TCTL_EN);
2527 E1000_WRITE_REG(&adapter->hw, TDFT,
2528 adapter->tx_head_addr);
2529 E1000_WRITE_REG(&adapter->hw, TDFH,
2530 adapter->tx_head_addr);
2531 E1000_WRITE_REG(&adapter->hw, TDFTS,
2532 adapter->tx_head_addr);
2533 E1000_WRITE_REG(&adapter->hw, TDFHS,
2534 adapter->tx_head_addr);
2535 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2536 E1000_WRITE_FLUSH(&adapter->hw);
2538 adapter->tx_fifo_head = 0;
2539 atomic_set(&adapter->tx_fifo_stall, 0);
2540 netif_wake_queue(netdev);
2542 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2548 * e1000_watchdog - Timer Call-back
2549 * @data: pointer to adapter cast into an unsigned long
2552 e1000_watchdog(unsigned long data)
2554 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2555 struct net_device *netdev = adapter->netdev;
2556 struct e1000_tx_ring *txdr = adapter->tx_ring;
2557 uint32_t link, tctl;
2560 ret_val = e1000_check_for_link(&adapter->hw);
2561 if ((ret_val == E1000_ERR_PHY) &&
2562 (adapter->hw.phy_type == e1000_phy_igp_3) &&
2563 (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
2564 /* See e1000_kumeran_lock_loss_workaround() */
2566 "Gigabit has been disabled, downgrading speed\n");
2569 if (adapter->hw.mac_type == e1000_82573) {
2570 e1000_enable_tx_pkt_filtering(&adapter->hw);
2571 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2572 e1000_update_mng_vlan(adapter);
2575 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
2576 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2577 link = !adapter->hw.serdes_link_down;
2579 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2582 if (!netif_carrier_ok(netdev)) {
2584 boolean_t txb2b = 1;
2585 e1000_get_speed_and_duplex(&adapter->hw,
2586 &adapter->link_speed,
2587 &adapter->link_duplex);
2589 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
2590 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s, "
2591 "Flow Control: %s\n",
2592 adapter->link_speed,
2593 adapter->link_duplex == FULL_DUPLEX ?
2594 "Full Duplex" : "Half Duplex",
2595 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2596 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2597 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2598 E1000_CTRL_TFCE) ? "TX" : "None" )));
2600 /* tweak tx_queue_len according to speed/duplex
2601 * and adjust the timeout factor */
2602 netdev->tx_queue_len = adapter->tx_queue_len;
2603 adapter->tx_timeout_factor = 1;
2604 switch (adapter->link_speed) {
2607 netdev->tx_queue_len = 10;
2608 adapter->tx_timeout_factor = 8;
2612 netdev->tx_queue_len = 100;
2613 /* maybe add some timeout factor ? */
2617 if ((adapter->hw.mac_type == e1000_82571 ||
2618 adapter->hw.mac_type == e1000_82572) &&
2621 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
2622 tarc0 &= ~(1 << 21);
2623 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2626 /* disable TSO for pcie and 10/100 speeds, to avoid
2627 * some hardware issues */
2628 if (!adapter->tso_force &&
2629 adapter->hw.bus_type == e1000_bus_type_pci_express){
2630 switch (adapter->link_speed) {
2634 "10/100 speed: disabling TSO\n");
2635 netdev->features &= ~NETIF_F_TSO;
2636 netdev->features &= ~NETIF_F_TSO6;
2639 netdev->features |= NETIF_F_TSO;
2640 netdev->features |= NETIF_F_TSO6;
2648 /* enable transmits in the hardware, need to do this
2649 * after setting TARC0 */
2650 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2651 tctl |= E1000_TCTL_EN;
2652 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2654 netif_carrier_on(netdev);
2655 netif_wake_queue(netdev);
2656 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
2657 adapter->smartspeed = 0;
2659 /* make sure the receive unit is started */
2660 if (adapter->hw.rx_needs_kicking) {
2661 struct e1000_hw *hw = &adapter->hw;
2662 uint32_t rctl = E1000_READ_REG(hw, RCTL);
2663 E1000_WRITE_REG(hw, RCTL, rctl | E1000_RCTL_EN);
2667 if (netif_carrier_ok(netdev)) {
2668 adapter->link_speed = 0;
2669 adapter->link_duplex = 0;
2670 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2671 netif_carrier_off(netdev);
2672 netif_stop_queue(netdev);
2673 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
2675 /* 80003ES2LAN workaround--
2676 * For packet buffer work-around on link down event;
2677 * disable receives in the ISR and
2678 * reset device here in the watchdog
2680 if (adapter->hw.mac_type == e1000_80003es2lan)
2682 schedule_work(&adapter->reset_task);
2685 e1000_smartspeed(adapter);
2688 e1000_update_stats(adapter);
2690 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2691 adapter->tpt_old = adapter->stats.tpt;
2692 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2693 adapter->colc_old = adapter->stats.colc;
2695 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2696 adapter->gorcl_old = adapter->stats.gorcl;
2697 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2698 adapter->gotcl_old = adapter->stats.gotcl;
2700 e1000_update_adaptive(&adapter->hw);
2702 if (!netif_carrier_ok(netdev)) {
2703 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
2704 /* We've lost link, so the controller stops DMA,
2705 * but we've got queued Tx work that's never going
2706 * to get done, so reset controller to flush Tx.
2707 * (Do the reset outside of interrupt context). */
2708 adapter->tx_timeout_count++;
2709 schedule_work(&adapter->reset_task);
2713 /* Cause software interrupt to ensure rx ring is cleaned */
2714 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2716 /* Force detection of hung controller every watchdog period */
2717 adapter->detect_tx_hung = TRUE;
2719 /* With 82571 controllers, LAA may be overwritten due to controller
2720 * reset from the other port. Set the appropriate LAA in RAR[0] */
2721 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2722 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2724 /* Reset the timer */
2725 mod_timer(&adapter->watchdog_timer, round_jiffies(jiffies + 2 * HZ));
2728 enum latency_range {
2732 latency_invalid = 255
2736 * e1000_update_itr - update the dynamic ITR value based on statistics
2737 * Stores a new ITR value based on packets and byte
2738 * counts during the last interrupt. The advantage of per interrupt
2739 * computation is faster updates and more accurate ITR for the current
2740 * traffic pattern. Constants in this function were computed
2741 * based on theoretical maximum wire speed and thresholds were set based
2742 * on testing data as well as attempting to minimize response time
2743 * while increasing bulk throughput.
2744 * this functionality is controlled by the InterruptThrottleRate module
2745 * parameter (see e1000_param.c)
2746 * @adapter: pointer to adapter
2747 * @itr_setting: current adapter->itr
2748 * @packets: the number of packets during this measurement interval
2749 * @bytes: the number of bytes during this measurement interval
2751 static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2752 uint16_t itr_setting,
2756 unsigned int retval = itr_setting;
2757 struct e1000_hw *hw = &adapter->hw;
2759 if (unlikely(hw->mac_type < e1000_82540))
2760 goto update_itr_done;
2763 goto update_itr_done;
2765 switch (itr_setting) {
2766 case lowest_latency:
2767 /* jumbo frames get bulk treatment*/
2768 if (bytes/packets > 8000)
2769 retval = bulk_latency;
2770 else if ((packets < 5) && (bytes > 512))
2771 retval = low_latency;
2773 case low_latency: /* 50 usec aka 20000 ints/s */
2774 if (bytes > 10000) {
2775 /* jumbo frames need bulk latency setting */
2776 if (bytes/packets > 8000)
2777 retval = bulk_latency;
2778 else if ((packets < 10) || ((bytes/packets) > 1200))
2779 retval = bulk_latency;
2780 else if ((packets > 35))
2781 retval = lowest_latency;
2782 } else if (bytes/packets > 2000)
2783 retval = bulk_latency;
2784 else if (packets <= 2 && bytes < 512)
2785 retval = lowest_latency;
2787 case bulk_latency: /* 250 usec aka 4000 ints/s */
2788 if (bytes > 25000) {
2790 retval = low_latency;
2791 } else if (bytes < 6000) {
2792 retval = low_latency;
2801 static void e1000_set_itr(struct e1000_adapter *adapter)
2803 struct e1000_hw *hw = &adapter->hw;
2804 uint16_t current_itr;
2805 uint32_t new_itr = adapter->itr;
2807 if (unlikely(hw->mac_type < e1000_82540))
2810 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2811 if (unlikely(adapter->link_speed != SPEED_1000)) {
2817 adapter->tx_itr = e1000_update_itr(adapter,
2819 adapter->total_tx_packets,
2820 adapter->total_tx_bytes);
2821 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2822 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2823 adapter->tx_itr = low_latency;
2825 adapter->rx_itr = e1000_update_itr(adapter,
2827 adapter->total_rx_packets,
2828 adapter->total_rx_bytes);
2829 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2830 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2831 adapter->rx_itr = low_latency;
2833 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2835 switch (current_itr) {
2836 /* counts and packets in update_itr are dependent on these numbers */
2837 case lowest_latency:
2841 new_itr = 20000; /* aka hwitr = ~200 */
2851 if (new_itr != adapter->itr) {
2852 /* this attempts to bias the interrupt rate towards Bulk
2853 * by adding intermediate steps when interrupt rate is
2855 new_itr = new_itr > adapter->itr ?
2856 min(adapter->itr + (new_itr >> 2), new_itr) :
2858 adapter->itr = new_itr;
2859 E1000_WRITE_REG(hw, ITR, 1000000000 / (new_itr * 256));
2865 #define E1000_TX_FLAGS_CSUM 0x00000001
2866 #define E1000_TX_FLAGS_VLAN 0x00000002
2867 #define E1000_TX_FLAGS_TSO 0x00000004
2868 #define E1000_TX_FLAGS_IPV4 0x00000008
2869 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2870 #define E1000_TX_FLAGS_VLAN_SHIFT 16
2873 e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2874 struct sk_buff *skb)
2876 struct e1000_context_desc *context_desc;
2877 struct e1000_buffer *buffer_info;
2879 uint32_t cmd_length = 0;
2880 uint16_t ipcse = 0, tucse, mss;
2881 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2884 if (skb_is_gso(skb)) {
2885 if (skb_header_cloned(skb)) {
2886 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2891 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
2892 mss = skb_shinfo(skb)->gso_size;
2893 if (skb->protocol == htons(ETH_P_IP)) {
2894 struct iphdr *iph = ip_hdr(skb);
2897 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2901 cmd_length = E1000_TXD_CMD_IP;
2902 ipcse = skb_transport_offset(skb) - 1;
2903 } else if (skb->protocol == htons(ETH_P_IPV6)) {
2904 ipv6_hdr(skb)->payload_len = 0;
2905 tcp_hdr(skb)->check =
2906 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2907 &ipv6_hdr(skb)->daddr,
2911 ipcss = skb_network_offset(skb);
2912 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
2913 tucss = skb_transport_offset(skb);
2914 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
2917 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2918 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
2920 i = tx_ring->next_to_use;
2921 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2922 buffer_info = &tx_ring->buffer_info[i];
2924 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2925 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2926 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2927 context_desc->upper_setup.tcp_fields.tucss = tucss;
2928 context_desc->upper_setup.tcp_fields.tucso = tucso;
2929 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2930 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2931 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2932 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2934 buffer_info->time_stamp = jiffies;
2935 buffer_info->next_to_watch = i;
2937 if (++i == tx_ring->count) i = 0;
2938 tx_ring->next_to_use = i;
2946 e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2947 struct sk_buff *skb)
2949 struct e1000_context_desc *context_desc;
2950 struct e1000_buffer *buffer_info;
2954 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2955 css = skb_transport_offset(skb);
2957 i = tx_ring->next_to_use;
2958 buffer_info = &tx_ring->buffer_info[i];
2959 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2961 context_desc->lower_setup.ip_config = 0;
2962 context_desc->upper_setup.tcp_fields.tucss = css;
2963 context_desc->upper_setup.tcp_fields.tucso =
2964 css + skb->csum_offset;
2965 context_desc->upper_setup.tcp_fields.tucse = 0;
2966 context_desc->tcp_seg_setup.data = 0;
2967 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2969 buffer_info->time_stamp = jiffies;
2970 buffer_info->next_to_watch = i;
2972 if (unlikely(++i == tx_ring->count)) i = 0;
2973 tx_ring->next_to_use = i;
2981 #define E1000_MAX_TXD_PWR 12
2982 #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2985 e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2986 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2987 unsigned int nr_frags, unsigned int mss)
2989 struct e1000_buffer *buffer_info;
2990 unsigned int len = skb->len;
2991 unsigned int offset = 0, size, count = 0, i;
2993 len -= skb->data_len;
2995 i = tx_ring->next_to_use;
2998 buffer_info = &tx_ring->buffer_info[i];
2999 size = min(len, max_per_txd);
3000 /* Workaround for Controller erratum --
3001 * descriptor for non-tso packet in a linear SKB that follows a
3002 * tso gets written back prematurely before the data is fully
3003 * DMA'd to the controller */
3004 if (!skb->data_len && tx_ring->last_tx_tso &&
3006 tx_ring->last_tx_tso = 0;
3010 /* Workaround for premature desc write-backs
3011 * in TSO mode. Append 4-byte sentinel desc */
3012 if (unlikely(mss && !nr_frags && size == len && size > 8))
3014 /* work-around for errata 10 and it applies
3015 * to all controllers in PCI-X mode
3016 * The fix is to make sure that the first descriptor of a
3017 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
3019 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
3020 (size > 2015) && count == 0))
3023 /* Workaround for potential 82544 hang in PCI-X. Avoid
3024 * terminating buffers within evenly-aligned dwords. */
3025 if (unlikely(adapter->pcix_82544 &&
3026 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
3030 buffer_info->length = size;
3032 pci_map_single(adapter->pdev,
3036 buffer_info->time_stamp = jiffies;
3037 buffer_info->next_to_watch = i;
3042 if (unlikely(++i == tx_ring->count)) i = 0;
3045 for (f = 0; f < nr_frags; f++) {
3046 struct skb_frag_struct *frag;
3048 frag = &skb_shinfo(skb)->frags[f];
3050 offset = frag->page_offset;
3053 buffer_info = &tx_ring->buffer_info[i];
3054 size = min(len, max_per_txd);
3055 /* Workaround for premature desc write-backs
3056 * in TSO mode. Append 4-byte sentinel desc */
3057 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
3059 /* Workaround for potential 82544 hang in PCI-X.
3060 * Avoid terminating buffers within evenly-aligned
3062 if (unlikely(adapter->pcix_82544 &&
3063 !((unsigned long)(frag->page+offset+size-1) & 4) &&
3067 buffer_info->length = size;
3069 pci_map_page(adapter->pdev,
3074 buffer_info->time_stamp = jiffies;
3075 buffer_info->next_to_watch = i;
3080 if (unlikely(++i == tx_ring->count)) i = 0;
3084 i = (i == 0) ? tx_ring->count - 1 : i - 1;
3085 tx_ring->buffer_info[i].skb = skb;
3086 tx_ring->buffer_info[first].next_to_watch = i;
3092 e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
3093 int tx_flags, int count)
3095 struct e1000_tx_desc *tx_desc = NULL;
3096 struct e1000_buffer *buffer_info;
3097 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
3100 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
3101 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3103 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3105 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
3106 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
3109 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
3110 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3111 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3114 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
3115 txd_lower |= E1000_TXD_CMD_VLE;
3116 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3119 i = tx_ring->next_to_use;
3122 buffer_info = &tx_ring->buffer_info[i];
3123 tx_desc = E1000_TX_DESC(*tx_ring, i);
3124 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3125 tx_desc->lower.data =
3126 cpu_to_le32(txd_lower | buffer_info->length);
3127 tx_desc->upper.data = cpu_to_le32(txd_upper);
3128 if (unlikely(++i == tx_ring->count)) i = 0;
3131 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3133 /* Force memory writes to complete before letting h/w
3134 * know there are new descriptors to fetch. (Only
3135 * applicable for weak-ordered memory model archs,
3136 * such as IA-64). */
3139 tx_ring->next_to_use = i;
3140 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
3141 /* we need this if more than one processor can write to our tail
3142 * at a time, it syncronizes IO on IA64/Altix systems */
3147 * 82547 workaround to avoid controller hang in half-duplex environment.
3148 * The workaround is to avoid queuing a large packet that would span
3149 * the internal Tx FIFO ring boundary by notifying the stack to resend
3150 * the packet at a later time. This gives the Tx FIFO an opportunity to
3151 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3152 * to the beginning of the Tx FIFO.
3155 #define E1000_FIFO_HDR 0x10
3156 #define E1000_82547_PAD_LEN 0x3E0
3159 e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
3161 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3162 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
3164 skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
3166 if (adapter->link_duplex != HALF_DUPLEX)
3167 goto no_fifo_stall_required;
3169 if (atomic_read(&adapter->tx_fifo_stall))
3172 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
3173 atomic_set(&adapter->tx_fifo_stall, 1);
3177 no_fifo_stall_required:
3178 adapter->tx_fifo_head += skb_fifo_len;
3179 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
3180 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3184 #define MINIMUM_DHCP_PACKET_SIZE 282
3186 e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
3188 struct e1000_hw *hw = &adapter->hw;
3189 uint16_t length, offset;
3190 if (vlan_tx_tag_present(skb)) {
3191 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
3192 ( adapter->hw.mng_cookie.status &
3193 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
3196 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
3197 struct ethhdr *eth = (struct ethhdr *) skb->data;
3198 if ((htons(ETH_P_IP) == eth->h_proto)) {
3199 const struct iphdr *ip =
3200 (struct iphdr *)((uint8_t *)skb->data+14);
3201 if (IPPROTO_UDP == ip->protocol) {
3202 struct udphdr *udp =
3203 (struct udphdr *)((uint8_t *)ip +
3205 if (ntohs(udp->dest) == 67) {
3206 offset = (uint8_t *)udp + 8 - skb->data;
3207 length = skb->len - offset;
3209 return e1000_mng_write_dhcp_info(hw,
3219 static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3221 struct e1000_adapter *adapter = netdev_priv(netdev);
3222 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3224 netif_stop_queue(netdev);
3225 /* Herbert's original patch had:
3226 * smp_mb__after_netif_stop_queue();
3227 * but since that doesn't exist yet, just open code it. */
3230 /* We need to check again in a case another CPU has just
3231 * made room available. */
3232 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3236 netif_start_queue(netdev);
3237 ++adapter->restart_queue;
3241 static int e1000_maybe_stop_tx(struct net_device *netdev,
3242 struct e1000_tx_ring *tx_ring, int size)
3244 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3246 return __e1000_maybe_stop_tx(netdev, size);
3249 #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3251 e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3253 struct e1000_adapter *adapter = netdev_priv(netdev);
3254 struct e1000_tx_ring *tx_ring;
3255 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3256 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3257 unsigned int tx_flags = 0;
3258 unsigned int len = skb->len;
3259 unsigned long flags;
3260 unsigned int nr_frags = 0;
3261 unsigned int mss = 0;
3265 len -= skb->data_len;
3267 /* This goes back to the question of how to logically map a tx queue
3268 * to a flow. Right now, performance is impacted slightly negatively
3269 * if using multiple tx queues. If the stack breaks away from a
3270 * single qdisc implementation, we can look at this again. */
3271 tx_ring = adapter->tx_ring;
3273 if (unlikely(skb->len <= 0)) {
3274 dev_kfree_skb_any(skb);
3275 return NETDEV_TX_OK;
3278 /* 82571 and newer doesn't need the workaround that limited descriptor
3280 if (adapter->hw.mac_type >= e1000_82571)
3283 mss = skb_shinfo(skb)->gso_size;
3284 /* The controller does a simple calculation to
3285 * make sure there is enough room in the FIFO before
3286 * initiating the DMA for each buffer. The calc is:
3287 * 4 = ceil(buffer len/mss). To make sure we don't
3288 * overrun the FIFO, adjust the max buffer len if mss
3292 max_per_txd = min(mss << 2, max_per_txd);
3293 max_txd_pwr = fls(max_per_txd) - 1;
3295 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
3296 * points to just header, pull a few bytes of payload from
3297 * frags into skb->data */
3298 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
3299 if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
3300 switch (adapter->hw.mac_type) {
3301 unsigned int pull_size;
3303 /* Make sure we have room to chop off 4 bytes,
3304 * and that the end alignment will work out to
3305 * this hardware's requirements
3306 * NOTE: this is a TSO only workaround
3307 * if end byte alignment not correct move us
3308 * into the next dword */
3309 if ((unsigned long)(skb_tail_pointer(skb) - 1) & 4)
3316 pull_size = min((unsigned int)4, skb->data_len);
3317 if (!__pskb_pull_tail(skb, pull_size)) {
3319 "__pskb_pull_tail failed.\n");
3320 dev_kfree_skb_any(skb);
3321 return NETDEV_TX_OK;
3323 len = skb->len - skb->data_len;
3332 /* reserve a descriptor for the offload context */
3333 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
3337 /* Controller Erratum workaround */
3338 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
3341 count += TXD_USE_COUNT(len, max_txd_pwr);
3343 if (adapter->pcix_82544)
3346 /* work-around for errata 10 and it applies to all controllers
3347 * in PCI-X mode, so add one more descriptor to the count
3349 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
3353 nr_frags = skb_shinfo(skb)->nr_frags;
3354 for (f = 0; f < nr_frags; f++)
3355 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3357 if (adapter->pcix_82544)
3361 if (adapter->hw.tx_pkt_filtering &&
3362 (adapter->hw.mac_type == e1000_82573))
3363 e1000_transfer_dhcp_info(adapter, skb);
3365 if (!spin_trylock_irqsave(&tx_ring->tx_lock, flags))
3366 /* Collision - tell upper layer to requeue */
3367 return NETDEV_TX_LOCKED;
3369 /* need: count + 2 desc gap to keep tail from touching
3370 * head, otherwise try next time */
3371 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) {
3372 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3373 return NETDEV_TX_BUSY;
3376 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
3377 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
3378 netif_stop_queue(netdev);
3379 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
3380 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3381 return NETDEV_TX_BUSY;
3385 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
3386 tx_flags |= E1000_TX_FLAGS_VLAN;
3387 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3390 first = tx_ring->next_to_use;
3392 tso = e1000_tso(adapter, tx_ring, skb);
3394 dev_kfree_skb_any(skb);
3395 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3396 return NETDEV_TX_OK;
3400 tx_ring->last_tx_tso = 1;
3401 tx_flags |= E1000_TX_FLAGS_TSO;
3402 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
3403 tx_flags |= E1000_TX_FLAGS_CSUM;
3405 /* Old method was to assume IPv4 packet by default if TSO was enabled.
3406 * 82571 hardware supports TSO capabilities for IPv6 as well...
3407 * no longer assume, we must. */
3408 if (likely(skb->protocol == htons(ETH_P_IP)))
3409 tx_flags |= E1000_TX_FLAGS_IPV4;
3411 e1000_tx_queue(adapter, tx_ring, tx_flags,
3412 e1000_tx_map(adapter, tx_ring, skb, first,
3413 max_per_txd, nr_frags, mss));
3415 netdev->trans_start = jiffies;
3417 /* Make sure there is space in the ring for the next send. */
3418 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
3420 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3421 return NETDEV_TX_OK;
3425 * e1000_tx_timeout - Respond to a Tx Hang
3426 * @netdev: network interface device structure
3430 e1000_tx_timeout(struct net_device *netdev)
3432 struct e1000_adapter *adapter = netdev_priv(netdev);
3434 /* Do the reset outside of interrupt context */
3435 adapter->tx_timeout_count++;
3436 schedule_work(&adapter->reset_task);
3440 e1000_reset_task(struct work_struct *work)
3442 struct e1000_adapter *adapter =
3443 container_of(work, struct e1000_adapter, reset_task);
3445 e1000_reinit_locked(adapter);
3449 * e1000_get_stats - Get System Network Statistics
3450 * @netdev: network interface device structure
3452 * Returns the address of the device statistics structure.
3453 * The statistics are actually updated from the timer callback.
3456 static struct net_device_stats *
3457 e1000_get_stats(struct net_device *netdev)
3459 struct e1000_adapter *adapter = netdev_priv(netdev);
3461 /* only return the current stats */
3462 return &adapter->net_stats;
3466 * e1000_change_mtu - Change the Maximum Transfer Unit
3467 * @netdev: network interface device structure
3468 * @new_mtu: new value for maximum frame size
3470 * Returns 0 on success, negative on failure
3474 e1000_change_mtu(struct net_device *netdev, int new_mtu)
3476 struct e1000_adapter *adapter = netdev_priv(netdev);
3477 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3478 uint16_t eeprom_data = 0;
3480 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3481 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3482 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
3486 /* Adapter-specific max frame size limits. */
3487 switch (adapter->hw.mac_type) {
3488 case e1000_undefined ... e1000_82542_rev2_1:
3490 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3491 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
3496 /* Jumbo Frames not supported if:
3497 * - this is not an 82573L device
3498 * - ASPM is enabled in any way (0x1A bits 3:2) */
3499 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3501 if ((adapter->hw.device_id != E1000_DEV_ID_82573L) ||
3502 (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
3503 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3505 "Jumbo Frames not supported.\n");
3510 /* ERT will be enabled later to enable wire speed receives */
3512 /* fall through to get support */
3515 case e1000_80003es2lan:
3516 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3517 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3518 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3523 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3527 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3528 * means we reserve 2 more, this pushes us to allocate from the next
3530 * i.e. RXBUFFER_2048 --> size-4096 slab */
3532 if (max_frame <= E1000_RXBUFFER_256)
3533 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3534 else if (max_frame <= E1000_RXBUFFER_512)
3535 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3536 else if (max_frame <= E1000_RXBUFFER_1024)
3537 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3538 else if (max_frame <= E1000_RXBUFFER_2048)
3539 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3540 else if (max_frame <= E1000_RXBUFFER_4096)
3541 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3542 else if (max_frame <= E1000_RXBUFFER_8192)
3543 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3544 else if (max_frame <= E1000_RXBUFFER_16384)
3545 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3547 /* adjust allocation if LPE protects us, and we aren't using SBP */
3548 if (!adapter->hw.tbi_compatibility_on &&
3549 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3550 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3551 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
3553 netdev->mtu = new_mtu;
3554 adapter->hw.max_frame_size = max_frame;
3556 if (netif_running(netdev))
3557 e1000_reinit_locked(adapter);
3563 * e1000_update_stats - Update the board statistics counters
3564 * @adapter: board private structure
3568 e1000_update_stats(struct e1000_adapter *adapter)
3570 struct e1000_hw *hw = &adapter->hw;
3571 struct pci_dev *pdev = adapter->pdev;
3572 unsigned long flags;
3575 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3578 * Prevent stats update while adapter is being reset, or if the pci
3579 * connection is down.
3581 if (adapter->link_speed == 0)
3583 if (pci_channel_offline(pdev))
3586 spin_lock_irqsave(&adapter->stats_lock, flags);
3588 /* these counters are modified from e1000_adjust_tbi_stats,
3589 * called from the interrupt context, so they must only
3590 * be written while holding adapter->stats_lock
3593 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3594 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3595 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3596 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3597 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3598 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3599 adapter->stats.roc += E1000_READ_REG(hw, ROC);
3601 if (adapter->hw.mac_type != e1000_ich8lan) {
3602 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3603 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3604 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3605 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3606 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3607 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
3610 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3611 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3612 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3613 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3614 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3615 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3616 adapter->stats.dc += E1000_READ_REG(hw, DC);
3617 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3618 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3619 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3620 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3621 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3622 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3623 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3624 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3625 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3626 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3627 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3628 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3629 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3630 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3631 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3632 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3633 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3634 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3635 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
3637 if (adapter->hw.mac_type != e1000_ich8lan) {
3638 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3639 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3640 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3641 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3642 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3643 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
3646 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3647 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3649 /* used for adaptive IFS */
3651 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3652 adapter->stats.tpt += hw->tx_packet_delta;
3653 hw->collision_delta = E1000_READ_REG(hw, COLC);
3654 adapter->stats.colc += hw->collision_delta;
3656 if (hw->mac_type >= e1000_82543) {
3657 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3658 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3659 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3660 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3661 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3662 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3664 if (hw->mac_type > e1000_82547_rev_2) {
3665 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3666 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
3668 if (adapter->hw.mac_type != e1000_ich8lan) {
3669 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3670 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3671 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3672 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3673 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3674 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3675 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
3679 /* Fill out the OS statistics structure */
3680 adapter->net_stats.rx_packets = adapter->stats.gprc;
3681 adapter->net_stats.tx_packets = adapter->stats.gptc;
3682 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3683 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3684 adapter->net_stats.multicast = adapter->stats.mprc;
3685 adapter->net_stats.collisions = adapter->stats.colc;
3689 /* RLEC on some newer hardware can be incorrect so build
3690 * our own version based on RUC and ROC */
3691 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3692 adapter->stats.crcerrs + adapter->stats.algnerrc +
3693 adapter->stats.ruc + adapter->stats.roc +
3694 adapter->stats.cexterr;
3695 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3696 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
3697 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3698 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3699 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3702 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3703 adapter->net_stats.tx_errors = adapter->stats.txerrc;
3704 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3705 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3706 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3707 if (adapter->hw.bad_tx_carr_stats_fd &&
3708 adapter->link_duplex == FULL_DUPLEX) {
3709 adapter->net_stats.tx_carrier_errors = 0;
3710 adapter->stats.tncrs = 0;
3713 /* Tx Dropped needs to be maintained elsewhere */
3716 if (hw->media_type == e1000_media_type_copper) {
3717 if ((adapter->link_speed == SPEED_1000) &&
3718 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3719 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3720 adapter->phy_stats.idle_errors += phy_tmp;
3723 if ((hw->mac_type <= e1000_82546) &&
3724 (hw->phy_type == e1000_phy_m88) &&
3725 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3726 adapter->phy_stats.receive_errors += phy_tmp;
3729 /* Management Stats */
3730 if (adapter->hw.has_smbus) {
3731 adapter->stats.mgptc += E1000_READ_REG(hw, MGTPTC);
3732 adapter->stats.mgprc += E1000_READ_REG(hw, MGTPRC);
3733 adapter->stats.mgpdc += E1000_READ_REG(hw, MGTPDC);
3736 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3740 * e1000_intr_msi - Interrupt Handler
3741 * @irq: interrupt number
3742 * @data: pointer to a network interface device structure
3746 e1000_intr_msi(int irq, void *data)
3748 struct net_device *netdev = data;
3749 struct e1000_adapter *adapter = netdev_priv(netdev);
3750 struct e1000_hw *hw = &adapter->hw;
3751 #ifndef CONFIG_E1000_NAPI
3754 uint32_t icr = E1000_READ_REG(hw, ICR);
3756 #ifdef CONFIG_E1000_NAPI
3757 /* read ICR disables interrupts using IAM, so keep up with our
3758 * enable/disable accounting */
3759 atomic_inc(&adapter->irq_sem);
3761 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3762 hw->get_link_status = 1;
3763 /* 80003ES2LAN workaround-- For packet buffer work-around on
3764 * link down event; disable receives here in the ISR and reset
3765 * adapter in watchdog */
3766 if (netif_carrier_ok(netdev) &&
3767 (adapter->hw.mac_type == e1000_80003es2lan)) {
3768 /* disable receives */
3769 uint32_t rctl = E1000_READ_REG(hw, RCTL);
3770 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3772 /* guard against interrupt when we're going down */
3773 if (!test_bit(__E1000_DOWN, &adapter->flags))
3774 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3777 #ifdef CONFIG_E1000_NAPI
3778 if (likely(netif_rx_schedule_prep(netdev))) {
3779 adapter->total_tx_bytes = 0;
3780 adapter->total_tx_packets = 0;
3781 adapter->total_rx_bytes = 0;
3782 adapter->total_rx_packets = 0;
3783 __netif_rx_schedule(netdev);
3785 e1000_irq_enable(adapter);
3787 adapter->total_tx_bytes = 0;
3788 adapter->total_rx_bytes = 0;
3789 adapter->total_tx_packets = 0;
3790 adapter->total_rx_packets = 0;
3792 for (i = 0; i < E1000_MAX_INTR; i++)
3793 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3794 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3797 if (likely(adapter->itr_setting & 3))
3798 e1000_set_itr(adapter);
3805 * e1000_intr - Interrupt Handler
3806 * @irq: interrupt number
3807 * @data: pointer to a network interface device structure
3811 e1000_intr(int irq, void *data)
3813 struct net_device *netdev = data;
3814 struct e1000_adapter *adapter = netdev_priv(netdev);
3815 struct e1000_hw *hw = &adapter->hw;
3816 uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
3817 #ifndef CONFIG_E1000_NAPI
3821 return IRQ_NONE; /* Not our interrupt */
3823 #ifdef CONFIG_E1000_NAPI
3824 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3825 * not set, then the adapter didn't send an interrupt */
3826 if (unlikely(hw->mac_type >= e1000_82571 &&
3827 !(icr & E1000_ICR_INT_ASSERTED)))
3830 /* Interrupt Auto-Mask...upon reading ICR,
3831 * interrupts are masked. No need for the
3832 * IMC write, but it does mean we should
3833 * account for it ASAP. */
3834 if (likely(hw->mac_type >= e1000_82571))
3835 atomic_inc(&adapter->irq_sem);
3838 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
3839 hw->get_link_status = 1;
3840 /* 80003ES2LAN workaround--
3841 * For packet buffer work-around on link down event;
3842 * disable receives here in the ISR and
3843 * reset adapter in watchdog
3845 if (netif_carrier_ok(netdev) &&
3846 (adapter->hw.mac_type == e1000_80003es2lan)) {
3847 /* disable receives */
3848 rctl = E1000_READ_REG(hw, RCTL);
3849 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3851 /* guard against interrupt when we're going down */
3852 if (!test_bit(__E1000_DOWN, &adapter->flags))
3853 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3856 #ifdef CONFIG_E1000_NAPI
3857 if (unlikely(hw->mac_type < e1000_82571)) {
3858 /* disable interrupts, without the synchronize_irq bit */
3859 atomic_inc(&adapter->irq_sem);
3860 E1000_WRITE_REG(hw, IMC, ~0);
3861 E1000_WRITE_FLUSH(hw);
3863 if (likely(netif_rx_schedule_prep(netdev))) {
3864 adapter->total_tx_bytes = 0;
3865 adapter->total_tx_packets = 0;
3866 adapter->total_rx_bytes = 0;
3867 adapter->total_rx_packets = 0;
3868 __netif_rx_schedule(netdev);
3870 /* this really should not happen! if it does it is basically a
3871 * bug, but not a hard error, so enable ints and continue */
3872 e1000_irq_enable(adapter);
3874 /* Writing IMC and IMS is needed for 82547.
3875 * Due to Hub Link bus being occupied, an interrupt
3876 * de-assertion message is not able to be sent.
3877 * When an interrupt assertion message is generated later,
3878 * two messages are re-ordered and sent out.
3879 * That causes APIC to think 82547 is in de-assertion
3880 * state, while 82547 is in assertion state, resulting
3881 * in dead lock. Writing IMC forces 82547 into
3882 * de-assertion state.
3884 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
3885 atomic_inc(&adapter->irq_sem);
3886 E1000_WRITE_REG(hw, IMC, ~0);
3889 adapter->total_tx_bytes = 0;
3890 adapter->total_rx_bytes = 0;
3891 adapter->total_tx_packets = 0;
3892 adapter->total_rx_packets = 0;
3894 for (i = 0; i < E1000_MAX_INTR; i++)
3895 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3896 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3899 if (likely(adapter->itr_setting & 3))
3900 e1000_set_itr(adapter);
3902 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
3903 e1000_irq_enable(adapter);
3909 #ifdef CONFIG_E1000_NAPI
3911 * e1000_clean - NAPI Rx polling callback
3912 * @adapter: board private structure
3916 e1000_clean(struct net_device *poll_dev, int *budget)
3918 struct e1000_adapter *adapter;
3919 int work_to_do = min(*budget, poll_dev->quota);
3920 int tx_cleaned = 0, work_done = 0;
3922 /* Must NOT use netdev_priv macro here. */
3923 adapter = poll_dev->priv;
3925 /* Keep link state information with original netdev */
3926 if (!netif_carrier_ok(poll_dev))
3929 /* e1000_clean is called per-cpu. This lock protects
3930 * tx_ring[0] from being cleaned by multiple cpus
3931 * simultaneously. A failure obtaining the lock means
3932 * tx_ring[0] is currently being cleaned anyway. */
3933 if (spin_trylock(&adapter->tx_queue_lock)) {
3934 tx_cleaned = e1000_clean_tx_irq(adapter,
3935 &adapter->tx_ring[0]);
3936 spin_unlock(&adapter->tx_queue_lock);
3939 adapter->clean_rx(adapter, &adapter->rx_ring[0],
3940 &work_done, work_to_do);
3942 *budget -= work_done;
3943 poll_dev->quota -= work_done;
3945 /* If no Tx and not enough Rx work done, exit the polling mode */
3946 if ((!tx_cleaned && (work_done == 0)) ||
3947 !netif_running(poll_dev)) {
3949 if (likely(adapter->itr_setting & 3))
3950 e1000_set_itr(adapter);
3951 netif_rx_complete(poll_dev);
3952 e1000_irq_enable(adapter);
3961 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3962 * @adapter: board private structure
3966 e1000_clean_tx_irq(struct e1000_adapter *adapter,
3967 struct e1000_tx_ring *tx_ring)
3969 struct net_device *netdev = adapter->netdev;
3970 struct e1000_tx_desc *tx_desc, *eop_desc;
3971 struct e1000_buffer *buffer_info;
3972 unsigned int i, eop;
3973 #ifdef CONFIG_E1000_NAPI
3974 unsigned int count = 0;
3976 boolean_t cleaned = FALSE;
3977 unsigned int total_tx_bytes=0, total_tx_packets=0;
3979 i = tx_ring->next_to_clean;
3980 eop = tx_ring->buffer_info[i].next_to_watch;
3981 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3983 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
3984 for (cleaned = FALSE; !cleaned; ) {
3985 tx_desc = E1000_TX_DESC(*tx_ring, i);
3986 buffer_info = &tx_ring->buffer_info[i];
3987 cleaned = (i == eop);
3990 struct sk_buff *skb = buffer_info->skb;
3991 unsigned int segs, bytecount;
3992 segs = skb_shinfo(skb)->gso_segs ?: 1;
3993 /* multiply data chunks by size of headers */
3994 bytecount = ((segs - 1) * skb_headlen(skb)) +
3996 total_tx_packets += segs;
3997 total_tx_bytes += bytecount;
3999 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
4000 tx_desc->upper.data = 0;
4002 if (unlikely(++i == tx_ring->count)) i = 0;
4005 eop = tx_ring->buffer_info[i].next_to_watch;
4006 eop_desc = E1000_TX_DESC(*tx_ring, eop);
4007 #ifdef CONFIG_E1000_NAPI
4008 #define E1000_TX_WEIGHT 64
4009 /* weight of a sort for tx, to avoid endless transmit cleanup */
4010 if (count++ == E1000_TX_WEIGHT) break;
4014 tx_ring->next_to_clean = i;
4016 #define TX_WAKE_THRESHOLD 32
4017 if (unlikely(cleaned && netif_carrier_ok(netdev) &&
4018 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
4019 /* Make sure that anybody stopping the queue after this
4020 * sees the new next_to_clean.
4023 if (netif_queue_stopped(netdev)) {
4024 netif_wake_queue(netdev);
4025 ++adapter->restart_queue;
4029 if (adapter->detect_tx_hung) {
4030 /* Detect a transmit hang in hardware, this serializes the
4031 * check with the clearing of time_stamp and movement of i */
4032 adapter->detect_tx_hung = FALSE;
4033 if (tx_ring->buffer_info[eop].dma &&
4034 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
4035 (adapter->tx_timeout_factor * HZ))
4036 && !(E1000_READ_REG(&adapter->hw, STATUS) &
4037 E1000_STATUS_TXOFF)) {
4039 /* detected Tx unit hang */
4040 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
4044 " next_to_use <%x>\n"
4045 " next_to_clean <%x>\n"
4046 "buffer_info[next_to_clean]\n"
4047 " time_stamp <%lx>\n"
4048 " next_to_watch <%x>\n"
4050 " next_to_watch.status <%x>\n",
4051 (unsigned long)((tx_ring - adapter->tx_ring) /
4052 sizeof(struct e1000_tx_ring)),
4053 readl(adapter->hw.hw_addr + tx_ring->tdh),
4054 readl(adapter->hw.hw_addr + tx_ring->tdt),
4055 tx_ring->next_to_use,
4056 tx_ring->next_to_clean,
4057 tx_ring->buffer_info[eop].time_stamp,
4060 eop_desc->upper.fields.status);
4061 netif_stop_queue(netdev);
4064 adapter->total_tx_bytes += total_tx_bytes;
4065 adapter->total_tx_packets += total_tx_packets;
4070 * e1000_rx_checksum - Receive Checksum Offload for 82543
4071 * @adapter: board private structure
4072 * @status_err: receive descriptor status and error fields
4073 * @csum: receive descriptor csum field
4074 * @sk_buff: socket buffer with received data
4078 e1000_rx_checksum(struct e1000_adapter *adapter,
4079 uint32_t status_err, uint32_t csum,
4080 struct sk_buff *skb)
4082 uint16_t status = (uint16_t)status_err;
4083 uint8_t errors = (uint8_t)(status_err >> 24);
4084 skb->ip_summed = CHECKSUM_NONE;
4086 /* 82543 or newer only */
4087 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
4088 /* Ignore Checksum bit is set */
4089 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
4090 /* TCP/UDP checksum error bit is set */
4091 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
4092 /* let the stack verify checksum errors */
4093 adapter->hw_csum_err++;
4096 /* TCP/UDP Checksum has not been calculated */
4097 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
4098 if (!(status & E1000_RXD_STAT_TCPCS))
4101 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
4104 /* It must be a TCP or UDP packet with a valid checksum */
4105 if (likely(status & E1000_RXD_STAT_TCPCS)) {
4106 /* TCP checksum is good */
4107 skb->ip_summed = CHECKSUM_UNNECESSARY;
4108 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
4109 /* IP fragment with UDP payload */
4110 /* Hardware complements the payload checksum, so we undo it
4111 * and then put the value in host order for further stack use.
4113 csum = ntohl(csum ^ 0xFFFF);
4115 skb->ip_summed = CHECKSUM_COMPLETE;
4117 adapter->hw_csum_good++;
4121 * e1000_clean_rx_irq - Send received data up the network stack; legacy
4122 * @adapter: board private structure
4126 #ifdef CONFIG_E1000_NAPI
4127 e1000_clean_rx_irq(struct e1000_adapter *adapter,
4128 struct e1000_rx_ring *rx_ring,
4129 int *work_done, int work_to_do)
4131 e1000_clean_rx_irq(struct e1000_adapter *adapter,
4132 struct e1000_rx_ring *rx_ring)
4135 struct net_device *netdev = adapter->netdev;
4136 struct pci_dev *pdev = adapter->pdev;
4137 struct e1000_rx_desc *rx_desc, *next_rxd;
4138 struct e1000_buffer *buffer_info, *next_buffer;
4139 unsigned long flags;
4143 int cleaned_count = 0;
4144 boolean_t cleaned = FALSE;
4145 unsigned int total_rx_bytes=0, total_rx_packets=0;
4147 i = rx_ring->next_to_clean;
4148 rx_desc = E1000_RX_DESC(*rx_ring, i);
4149 buffer_info = &rx_ring->buffer_info[i];
4151 while (rx_desc->status & E1000_RXD_STAT_DD) {
4152 struct sk_buff *skb;
4155 #ifdef CONFIG_E1000_NAPI
4156 if (*work_done >= work_to_do)
4160 status = rx_desc->status;
4161 skb = buffer_info->skb;
4162 buffer_info->skb = NULL;
4164 prefetch(skb->data - NET_IP_ALIGN);
4166 if (++i == rx_ring->count) i = 0;
4167 next_rxd = E1000_RX_DESC(*rx_ring, i);
4170 next_buffer = &rx_ring->buffer_info[i];
4174 pci_unmap_single(pdev,
4176 buffer_info->length,
4177 PCI_DMA_FROMDEVICE);
4179 length = le16_to_cpu(rx_desc->length);
4181 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
4182 /* All receives must fit into a single buffer */
4183 E1000_DBG("%s: Receive packet consumed multiple"
4184 " buffers\n", netdev->name);
4186 buffer_info->skb = skb;
4190 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
4191 last_byte = *(skb->data + length - 1);
4192 if (TBI_ACCEPT(&adapter->hw, status,
4193 rx_desc->errors, length, last_byte)) {
4194 spin_lock_irqsave(&adapter->stats_lock, flags);
4195 e1000_tbi_adjust_stats(&adapter->hw,
4198 spin_unlock_irqrestore(&adapter->stats_lock,
4203 buffer_info->skb = skb;
4208 /* adjust length to remove Ethernet CRC, this must be
4209 * done after the TBI_ACCEPT workaround above */
4212 /* probably a little skewed due to removing CRC */
4213 total_rx_bytes += length;
4216 /* code added for copybreak, this should improve
4217 * performance for small packets with large amounts
4218 * of reassembly being done in the stack */
4219 if (length < copybreak) {
4220 struct sk_buff *new_skb =
4221 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
4223 skb_reserve(new_skb, NET_IP_ALIGN);
4224 skb_copy_to_linear_data_offset(new_skb,
4230 /* save the skb in buffer_info as good */
4231 buffer_info->skb = skb;
4234 /* else just continue with the old one */
4236 /* end copybreak code */
4237 skb_put(skb, length);
4239 /* Receive Checksum Offload */
4240 e1000_rx_checksum(adapter,
4241 (uint32_t)(status) |
4242 ((uint32_t)(rx_desc->errors) << 24),
4243 le16_to_cpu(rx_desc->csum), skb);
4245 skb->protocol = eth_type_trans(skb, netdev);
4246 #ifdef CONFIG_E1000_NAPI
4247 if (unlikely(adapter->vlgrp &&
4248 (status & E1000_RXD_STAT_VP))) {
4249 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4250 le16_to_cpu(rx_desc->special) &
4251 E1000_RXD_SPC_VLAN_MASK);
4253 netif_receive_skb(skb);
4255 #else /* CONFIG_E1000_NAPI */
4256 if (unlikely(adapter->vlgrp &&
4257 (status & E1000_RXD_STAT_VP))) {
4258 vlan_hwaccel_rx(skb, adapter->vlgrp,
4259 le16_to_cpu(rx_desc->special) &
4260 E1000_RXD_SPC_VLAN_MASK);
4264 #endif /* CONFIG_E1000_NAPI */
4265 netdev->last_rx = jiffies;
4268 rx_desc->status = 0;
4270 /* return some buffers to hardware, one at a time is too slow */
4271 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4272 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4276 /* use prefetched values */
4278 buffer_info = next_buffer;
4280 rx_ring->next_to_clean = i;
4282 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4284 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4286 adapter->total_rx_packets += total_rx_packets;
4287 adapter->total_rx_bytes += total_rx_bytes;
4292 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
4293 * @adapter: board private structure
4297 #ifdef CONFIG_E1000_NAPI
4298 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4299 struct e1000_rx_ring *rx_ring,
4300 int *work_done, int work_to_do)
4302 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4303 struct e1000_rx_ring *rx_ring)
4306 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
4307 struct net_device *netdev = adapter->netdev;
4308 struct pci_dev *pdev = adapter->pdev;
4309 struct e1000_buffer *buffer_info, *next_buffer;
4310 struct e1000_ps_page *ps_page;
4311 struct e1000_ps_page_dma *ps_page_dma;
4312 struct sk_buff *skb;
4314 uint32_t length, staterr;
4315 int cleaned_count = 0;
4316 boolean_t cleaned = FALSE;
4317 unsigned int total_rx_bytes=0, total_rx_packets=0;
4319 i = rx_ring->next_to_clean;
4320 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4321 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
4322 buffer_info = &rx_ring->buffer_info[i];
4324 while (staterr & E1000_RXD_STAT_DD) {
4325 ps_page = &rx_ring->ps_page[i];
4326 ps_page_dma = &rx_ring->ps_page_dma[i];
4327 #ifdef CONFIG_E1000_NAPI
4328 if (unlikely(*work_done >= work_to_do))
4332 skb = buffer_info->skb;
4334 /* in the packet split case this is header only */
4335 prefetch(skb->data - NET_IP_ALIGN);
4337 if (++i == rx_ring->count) i = 0;
4338 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
4341 next_buffer = &rx_ring->buffer_info[i];
4345 pci_unmap_single(pdev, buffer_info->dma,
4346 buffer_info->length,
4347 PCI_DMA_FROMDEVICE);
4349 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
4350 E1000_DBG("%s: Packet Split buffers didn't pick up"
4351 " the full packet\n", netdev->name);
4352 dev_kfree_skb_irq(skb);
4356 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
4357 dev_kfree_skb_irq(skb);
4361 length = le16_to_cpu(rx_desc->wb.middle.length0);
4363 if (unlikely(!length)) {
4364 E1000_DBG("%s: Last part of the packet spanning"
4365 " multiple descriptors\n", netdev->name);
4366 dev_kfree_skb_irq(skb);
4371 skb_put(skb, length);
4374 /* this looks ugly, but it seems compiler issues make it
4375 more efficient than reusing j */
4376 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
4378 /* page alloc/put takes too long and effects small packet
4379 * throughput, so unsplit small packets and save the alloc/put*/
4380 if (l1 && (l1 <= copybreak) && ((length + l1) <= adapter->rx_ps_bsize0)) {
4382 /* there is no documentation about how to call
4383 * kmap_atomic, so we can't hold the mapping
4385 pci_dma_sync_single_for_cpu(pdev,
4386 ps_page_dma->ps_page_dma[0],
4388 PCI_DMA_FROMDEVICE);
4389 vaddr = kmap_atomic(ps_page->ps_page[0],
4390 KM_SKB_DATA_SOFTIRQ);
4391 memcpy(skb_tail_pointer(skb), vaddr, l1);
4392 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
4393 pci_dma_sync_single_for_device(pdev,
4394 ps_page_dma->ps_page_dma[0],
4395 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4396 /* remove the CRC */
4403 for (j = 0; j < adapter->rx_ps_pages; j++) {
4404 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
4406 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
4407 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4408 ps_page_dma->ps_page_dma[j] = 0;
4409 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
4411 ps_page->ps_page[j] = NULL;
4413 skb->data_len += length;
4414 skb->truesize += length;
4417 /* strip the ethernet crc, problem is we're using pages now so
4418 * this whole operation can get a little cpu intensive */
4419 pskb_trim(skb, skb->len - 4);
4422 total_rx_bytes += skb->len;
4425 e1000_rx_checksum(adapter, staterr,
4426 le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
4427 skb->protocol = eth_type_trans(skb, netdev);
4429 if (likely(rx_desc->wb.upper.header_status &
4430 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
4431 adapter->rx_hdr_split++;
4432 #ifdef CONFIG_E1000_NAPI
4433 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4434 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4435 le16_to_cpu(rx_desc->wb.middle.vlan) &
4436 E1000_RXD_SPC_VLAN_MASK);
4438 netif_receive_skb(skb);
4440 #else /* CONFIG_E1000_NAPI */
4441 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4442 vlan_hwaccel_rx(skb, adapter->vlgrp,
4443 le16_to_cpu(rx_desc->wb.middle.vlan) &
4444 E1000_RXD_SPC_VLAN_MASK);
4448 #endif /* CONFIG_E1000_NAPI */
4449 netdev->last_rx = jiffies;
4452 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
4453 buffer_info->skb = NULL;
4455 /* return some buffers to hardware, one at a time is too slow */
4456 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4457 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4461 /* use prefetched values */
4463 buffer_info = next_buffer;
4465 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
4467 rx_ring->next_to_clean = i;
4469 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4471 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4473 adapter->total_rx_packets += total_rx_packets;
4474 adapter->total_rx_bytes += total_rx_bytes;
4479 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
4480 * @adapter: address of board private structure
4484 e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4485 struct e1000_rx_ring *rx_ring,
4488 struct net_device *netdev = adapter->netdev;
4489 struct pci_dev *pdev = adapter->pdev;
4490 struct e1000_rx_desc *rx_desc;
4491 struct e1000_buffer *buffer_info;
4492 struct sk_buff *skb;
4494 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
4496 i = rx_ring->next_to_use;
4497 buffer_info = &rx_ring->buffer_info[i];
4499 while (cleaned_count--) {
4500 skb = buffer_info->skb;
4506 skb = netdev_alloc_skb(netdev, bufsz);
4507 if (unlikely(!skb)) {
4508 /* Better luck next round */
4509 adapter->alloc_rx_buff_failed++;
4513 /* Fix for errata 23, can't cross 64kB boundary */
4514 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4515 struct sk_buff *oldskb = skb;
4516 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4517 "at %p\n", bufsz, skb->data);
4518 /* Try again, without freeing the previous */
4519 skb = netdev_alloc_skb(netdev, bufsz);
4520 /* Failed allocation, critical failure */
4522 dev_kfree_skb(oldskb);
4526 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4529 dev_kfree_skb(oldskb);
4530 break; /* while !buffer_info->skb */
4533 /* Use new allocation */
4534 dev_kfree_skb(oldskb);
4536 /* Make buffer alignment 2 beyond a 16 byte boundary
4537 * this will result in a 16 byte aligned IP header after
4538 * the 14 byte MAC header is removed
4540 skb_reserve(skb, NET_IP_ALIGN);
4542 buffer_info->skb = skb;
4543 buffer_info->length = adapter->rx_buffer_len;
4545 buffer_info->dma = pci_map_single(pdev,
4547 adapter->rx_buffer_len,
4548 PCI_DMA_FROMDEVICE);
4550 /* Fix for errata 23, can't cross 64kB boundary */
4551 if (!e1000_check_64k_bound(adapter,
4552 (void *)(unsigned long)buffer_info->dma,
4553 adapter->rx_buffer_len)) {
4554 DPRINTK(RX_ERR, ERR,
4555 "dma align check failed: %u bytes at %p\n",
4556 adapter->rx_buffer_len,
4557 (void *)(unsigned long)buffer_info->dma);
4559 buffer_info->skb = NULL;
4561 pci_unmap_single(pdev, buffer_info->dma,
4562 adapter->rx_buffer_len,
4563 PCI_DMA_FROMDEVICE);
4565 break; /* while !buffer_info->skb */
4567 rx_desc = E1000_RX_DESC(*rx_ring, i);
4568 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4570 if (unlikely(++i == rx_ring->count))
4572 buffer_info = &rx_ring->buffer_info[i];
4575 if (likely(rx_ring->next_to_use != i)) {
4576 rx_ring->next_to_use = i;
4577 if (unlikely(i-- == 0))
4578 i = (rx_ring->count - 1);
4580 /* Force memory writes to complete before letting h/w
4581 * know there are new descriptors to fetch. (Only
4582 * applicable for weak-ordered memory model archs,
4583 * such as IA-64). */
4585 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4590 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
4591 * @adapter: address of board private structure
4595 e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
4596 struct e1000_rx_ring *rx_ring,
4599 struct net_device *netdev = adapter->netdev;
4600 struct pci_dev *pdev = adapter->pdev;
4601 union e1000_rx_desc_packet_split *rx_desc;
4602 struct e1000_buffer *buffer_info;
4603 struct e1000_ps_page *ps_page;
4604 struct e1000_ps_page_dma *ps_page_dma;
4605 struct sk_buff *skb;
4608 i = rx_ring->next_to_use;
4609 buffer_info = &rx_ring->buffer_info[i];
4610 ps_page = &rx_ring->ps_page[i];
4611 ps_page_dma = &rx_ring->ps_page_dma[i];
4613 while (cleaned_count--) {
4614 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4616 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
4617 if (j < adapter->rx_ps_pages) {
4618 if (likely(!ps_page->ps_page[j])) {
4619 ps_page->ps_page[j] =
4620 alloc_page(GFP_ATOMIC);
4621 if (unlikely(!ps_page->ps_page[j])) {
4622 adapter->alloc_rx_buff_failed++;
4625 ps_page_dma->ps_page_dma[j] =
4627 ps_page->ps_page[j],
4629 PCI_DMA_FROMDEVICE);
4631 /* Refresh the desc even if buffer_addrs didn't
4632 * change because each write-back erases
4635 rx_desc->read.buffer_addr[j+1] =
4636 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4638 rx_desc->read.buffer_addr[j+1] = ~0;
4641 skb = netdev_alloc_skb(netdev,
4642 adapter->rx_ps_bsize0 + NET_IP_ALIGN);
4644 if (unlikely(!skb)) {
4645 adapter->alloc_rx_buff_failed++;
4649 /* Make buffer alignment 2 beyond a 16 byte boundary
4650 * this will result in a 16 byte aligned IP header after
4651 * the 14 byte MAC header is removed
4653 skb_reserve(skb, NET_IP_ALIGN);
4655 buffer_info->skb = skb;
4656 buffer_info->length = adapter->rx_ps_bsize0;
4657 buffer_info->dma = pci_map_single(pdev, skb->data,
4658 adapter->rx_ps_bsize0,
4659 PCI_DMA_FROMDEVICE);
4661 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4663 if (unlikely(++i == rx_ring->count)) i = 0;
4664 buffer_info = &rx_ring->buffer_info[i];
4665 ps_page = &rx_ring->ps_page[i];
4666 ps_page_dma = &rx_ring->ps_page_dma[i];
4670 if (likely(rx_ring->next_to_use != i)) {
4671 rx_ring->next_to_use = i;
4672 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4674 /* Force memory writes to complete before letting h/w
4675 * know there are new descriptors to fetch. (Only
4676 * applicable for weak-ordered memory model archs,
4677 * such as IA-64). */
4679 /* Hardware increments by 16 bytes, but packet split
4680 * descriptors are 32 bytes...so we increment tail
4683 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4688 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4693 e1000_smartspeed(struct e1000_adapter *adapter)
4695 uint16_t phy_status;
4698 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
4699 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4702 if (adapter->smartspeed == 0) {
4703 /* If Master/Slave config fault is asserted twice,
4704 * we assume back-to-back */
4705 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4706 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4707 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4708 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4709 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4710 if (phy_ctrl & CR_1000T_MS_ENABLE) {
4711 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4712 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4714 adapter->smartspeed++;
4715 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4716 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4718 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4719 MII_CR_RESTART_AUTO_NEG);
4720 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4725 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
4726 /* If still no link, perhaps using 2/3 pair cable */
4727 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4728 phy_ctrl |= CR_1000T_MS_ENABLE;
4729 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
4730 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4731 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4732 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4733 MII_CR_RESTART_AUTO_NEG);
4734 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4737 /* Restart process after E1000_SMARTSPEED_MAX iterations */
4738 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
4739 adapter->smartspeed = 0;
4750 e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4756 return e1000_mii_ioctl(netdev, ifr, cmd);
4770 e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4772 struct e1000_adapter *adapter = netdev_priv(netdev);
4773 struct mii_ioctl_data *data = if_mii(ifr);
4777 unsigned long flags;
4779 if (adapter->hw.media_type != e1000_media_type_copper)
4784 data->phy_id = adapter->hw.phy_addr;
4787 if (!capable(CAP_NET_ADMIN))
4789 spin_lock_irqsave(&adapter->stats_lock, flags);
4790 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
4792 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4795 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4798 if (!capable(CAP_NET_ADMIN))
4800 if (data->reg_num & ~(0x1F))
4802 mii_reg = data->val_in;
4803 spin_lock_irqsave(&adapter->stats_lock, flags);
4804 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
4806 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4809 if (adapter->hw.media_type == e1000_media_type_copper) {
4810 switch (data->reg_num) {
4812 if (mii_reg & MII_CR_POWER_DOWN)
4814 if (mii_reg & MII_CR_AUTO_NEG_EN) {
4815 adapter->hw.autoneg = 1;
4816 adapter->hw.autoneg_advertised = 0x2F;
4819 spddplx = SPEED_1000;
4820 else if (mii_reg & 0x2000)
4821 spddplx = SPEED_100;
4824 spddplx += (mii_reg & 0x100)
4827 retval = e1000_set_spd_dplx(adapter,
4830 spin_unlock_irqrestore(
4831 &adapter->stats_lock,
4836 if (netif_running(adapter->netdev))
4837 e1000_reinit_locked(adapter);
4839 e1000_reset(adapter);
4841 case M88E1000_PHY_SPEC_CTRL:
4842 case M88E1000_EXT_PHY_SPEC_CTRL:
4843 if (e1000_phy_reset(&adapter->hw)) {
4844 spin_unlock_irqrestore(
4845 &adapter->stats_lock, flags);
4851 switch (data->reg_num) {
4853 if (mii_reg & MII_CR_POWER_DOWN)
4855 if (netif_running(adapter->netdev))
4856 e1000_reinit_locked(adapter);
4858 e1000_reset(adapter);
4862 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4867 return E1000_SUCCESS;
4871 e1000_pci_set_mwi(struct e1000_hw *hw)
4873 struct e1000_adapter *adapter = hw->back;
4874 int ret_val = pci_set_mwi(adapter->pdev);
4877 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
4881 e1000_pci_clear_mwi(struct e1000_hw *hw)
4883 struct e1000_adapter *adapter = hw->back;
4885 pci_clear_mwi(adapter->pdev);
4889 e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4891 struct e1000_adapter *adapter = hw->back;
4893 pci_read_config_word(adapter->pdev, reg, value);
4897 e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4899 struct e1000_adapter *adapter = hw->back;
4901 pci_write_config_word(adapter->pdev, reg, *value);
4905 e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4907 struct e1000_adapter *adapter = hw->back;
4908 uint16_t cap_offset;
4910 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4912 return -E1000_ERR_CONFIG;
4914 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4916 return E1000_SUCCESS;
4920 e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4926 e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4928 struct e1000_adapter *adapter = netdev_priv(netdev);
4929 uint32_t ctrl, rctl;
4931 e1000_irq_disable(adapter);
4932 adapter->vlgrp = grp;
4935 /* enable VLAN tag insert/strip */
4936 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4937 ctrl |= E1000_CTRL_VME;
4938 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4940 if (adapter->hw.mac_type != e1000_ich8lan) {
4941 /* enable VLAN receive filtering */
4942 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4943 rctl |= E1000_RCTL_VFE;
4944 rctl &= ~E1000_RCTL_CFIEN;
4945 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4946 e1000_update_mng_vlan(adapter);
4949 /* disable VLAN tag insert/strip */
4950 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4951 ctrl &= ~E1000_CTRL_VME;
4952 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4954 if (adapter->hw.mac_type != e1000_ich8lan) {
4955 /* disable VLAN filtering */
4956 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4957 rctl &= ~E1000_RCTL_VFE;
4958 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4959 if (adapter->mng_vlan_id !=
4960 (uint16_t)E1000_MNG_VLAN_NONE) {
4961 e1000_vlan_rx_kill_vid(netdev,
4962 adapter->mng_vlan_id);
4963 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4968 e1000_irq_enable(adapter);
4972 e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4974 struct e1000_adapter *adapter = netdev_priv(netdev);
4975 uint32_t vfta, index;
4977 if ((adapter->hw.mng_cookie.status &
4978 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4979 (vid == adapter->mng_vlan_id))
4981 /* add VID to filter table */
4982 index = (vid >> 5) & 0x7F;
4983 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4984 vfta |= (1 << (vid & 0x1F));
4985 e1000_write_vfta(&adapter->hw, index, vfta);
4989 e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4991 struct e1000_adapter *adapter = netdev_priv(netdev);
4992 uint32_t vfta, index;
4994 e1000_irq_disable(adapter);
4995 vlan_group_set_device(adapter->vlgrp, vid, NULL);
4996 e1000_irq_enable(adapter);
4998 if ((adapter->hw.mng_cookie.status &
4999 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
5000 (vid == adapter->mng_vlan_id)) {
5001 /* release control to f/w */
5002 e1000_release_hw_control(adapter);
5006 /* remove VID from filter table */
5007 index = (vid >> 5) & 0x7F;
5008 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
5009 vfta &= ~(1 << (vid & 0x1F));
5010 e1000_write_vfta(&adapter->hw, index, vfta);
5014 e1000_restore_vlan(struct e1000_adapter *adapter)
5016 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
5018 if (adapter->vlgrp) {
5020 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
5021 if (!vlan_group_get_device(adapter->vlgrp, vid))
5023 e1000_vlan_rx_add_vid(adapter->netdev, vid);
5029 e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
5031 adapter->hw.autoneg = 0;
5033 /* Fiber NICs only allow 1000 gbps Full duplex */
5034 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
5035 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
5036 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
5041 case SPEED_10 + DUPLEX_HALF:
5042 adapter->hw.forced_speed_duplex = e1000_10_half;
5044 case SPEED_10 + DUPLEX_FULL:
5045 adapter->hw.forced_speed_duplex = e1000_10_full;
5047 case SPEED_100 + DUPLEX_HALF:
5048 adapter->hw.forced_speed_duplex = e1000_100_half;
5050 case SPEED_100 + DUPLEX_FULL:
5051 adapter->hw.forced_speed_duplex = e1000_100_full;
5053 case SPEED_1000 + DUPLEX_FULL:
5054 adapter->hw.autoneg = 1;
5055 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
5057 case SPEED_1000 + DUPLEX_HALF: /* not supported */
5059 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
5066 e1000_suspend(struct pci_dev *pdev, pm_message_t state)
5068 struct net_device *netdev = pci_get_drvdata(pdev);
5069 struct e1000_adapter *adapter = netdev_priv(netdev);
5070 uint32_t ctrl, ctrl_ext, rctl, status;
5071 uint32_t wufc = adapter->wol;
5076 netif_device_detach(netdev);
5078 if (netif_running(netdev)) {
5079 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
5080 e1000_down(adapter);
5084 retval = pci_save_state(pdev);
5089 status = E1000_READ_REG(&adapter->hw, STATUS);
5090 if (status & E1000_STATUS_LU)
5091 wufc &= ~E1000_WUFC_LNKC;
5094 e1000_setup_rctl(adapter);
5095 e1000_set_multi(netdev);
5097 /* turn on all-multi mode if wake on multicast is enabled */
5098 if (wufc & E1000_WUFC_MC) {
5099 rctl = E1000_READ_REG(&adapter->hw, RCTL);
5100 rctl |= E1000_RCTL_MPE;
5101 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
5104 if (adapter->hw.mac_type >= e1000_82540) {
5105 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
5106 /* advertise wake from D3Cold */
5107 #define E1000_CTRL_ADVD3WUC 0x00100000
5108 /* phy power management enable */
5109 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
5110 ctrl |= E1000_CTRL_ADVD3WUC |
5111 E1000_CTRL_EN_PHY_PWR_MGMT;
5112 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
5115 if (adapter->hw.media_type == e1000_media_type_fiber ||
5116 adapter->hw.media_type == e1000_media_type_internal_serdes) {
5117 /* keep the laser running in D3 */
5118 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
5119 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
5120 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
5123 /* Allow time for pending master requests to run */
5124 e1000_disable_pciex_master(&adapter->hw);
5126 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
5127 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
5128 pci_enable_wake(pdev, PCI_D3hot, 1);
5129 pci_enable_wake(pdev, PCI_D3cold, 1);
5131 E1000_WRITE_REG(&adapter->hw, WUC, 0);
5132 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
5133 pci_enable_wake(pdev, PCI_D3hot, 0);
5134 pci_enable_wake(pdev, PCI_D3cold, 0);
5137 e1000_release_manageability(adapter);
5139 /* make sure adapter isn't asleep if manageability is enabled */
5140 if (adapter->en_mng_pt) {
5141 pci_enable_wake(pdev, PCI_D3hot, 1);
5142 pci_enable_wake(pdev, PCI_D3cold, 1);
5145 if (adapter->hw.phy_type == e1000_phy_igp_3)
5146 e1000_phy_powerdown_workaround(&adapter->hw);
5148 if (netif_running(netdev))
5149 e1000_free_irq(adapter);
5151 /* Release control of h/w to f/w. If f/w is AMT enabled, this
5152 * would have already happened in close and is redundant. */
5153 e1000_release_hw_control(adapter);
5155 pci_disable_device(pdev);
5157 pci_set_power_state(pdev, pci_choose_state(pdev, state));
5164 e1000_resume(struct pci_dev *pdev)
5166 struct net_device *netdev = pci_get_drvdata(pdev);
5167 struct e1000_adapter *adapter = netdev_priv(netdev);
5170 pci_set_power_state(pdev, PCI_D0);
5171 pci_restore_state(pdev);
5172 if ((err = pci_enable_device(pdev))) {
5173 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
5176 pci_set_master(pdev);
5178 pci_enable_wake(pdev, PCI_D3hot, 0);
5179 pci_enable_wake(pdev, PCI_D3cold, 0);
5181 if (netif_running(netdev) && (err = e1000_request_irq(adapter)))
5184 e1000_power_up_phy(adapter);
5185 e1000_reset(adapter);
5186 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5188 e1000_init_manageability(adapter);
5190 if (netif_running(netdev))
5193 netif_device_attach(netdev);
5195 /* If the controller is 82573 and f/w is AMT, do not set
5196 * DRV_LOAD until the interface is up. For all other cases,
5197 * let the f/w know that the h/w is now under the control
5199 if (adapter->hw.mac_type != e1000_82573 ||
5200 !e1000_check_mng_mode(&adapter->hw))
5201 e1000_get_hw_control(adapter);
5207 static void e1000_shutdown(struct pci_dev *pdev)
5209 e1000_suspend(pdev, PMSG_SUSPEND);
5212 #ifdef CONFIG_NET_POLL_CONTROLLER
5214 * Polling 'interrupt' - used by things like netconsole to send skbs
5215 * without having to re-enable interrupts. It's not called while
5216 * the interrupt routine is executing.
5219 e1000_netpoll(struct net_device *netdev)
5221 struct e1000_adapter *adapter = netdev_priv(netdev);
5223 disable_irq(adapter->pdev->irq);
5224 e1000_intr(adapter->pdev->irq, netdev);
5225 e1000_clean_tx_irq(adapter, adapter->tx_ring);
5226 #ifndef CONFIG_E1000_NAPI
5227 adapter->clean_rx(adapter, adapter->rx_ring);
5229 enable_irq(adapter->pdev->irq);
5234 * e1000_io_error_detected - called when PCI error is detected
5235 * @pdev: Pointer to PCI device
5236 * @state: The current pci conneection state
5238 * This function is called after a PCI bus error affecting
5239 * this device has been detected.
5241 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
5243 struct net_device *netdev = pci_get_drvdata(pdev);
5244 struct e1000_adapter *adapter = netdev->priv;
5246 netif_device_detach(netdev);
5248 if (netif_running(netdev))
5249 e1000_down(adapter);
5250 pci_disable_device(pdev);
5252 /* Request a slot slot reset. */
5253 return PCI_ERS_RESULT_NEED_RESET;
5257 * e1000_io_slot_reset - called after the pci bus has been reset.
5258 * @pdev: Pointer to PCI device
5260 * Restart the card from scratch, as if from a cold-boot. Implementation
5261 * resembles the first-half of the e1000_resume routine.
5263 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5265 struct net_device *netdev = pci_get_drvdata(pdev);
5266 struct e1000_adapter *adapter = netdev->priv;
5268 if (pci_enable_device(pdev)) {
5269 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
5270 return PCI_ERS_RESULT_DISCONNECT;
5272 pci_set_master(pdev);
5274 pci_enable_wake(pdev, PCI_D3hot, 0);
5275 pci_enable_wake(pdev, PCI_D3cold, 0);
5277 e1000_reset(adapter);
5278 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5280 return PCI_ERS_RESULT_RECOVERED;
5284 * e1000_io_resume - called when traffic can start flowing again.
5285 * @pdev: Pointer to PCI device
5287 * This callback is called when the error recovery driver tells us that
5288 * its OK to resume normal operation. Implementation resembles the
5289 * second-half of the e1000_resume routine.
5291 static void e1000_io_resume(struct pci_dev *pdev)
5293 struct net_device *netdev = pci_get_drvdata(pdev);
5294 struct e1000_adapter *adapter = netdev->priv;
5296 e1000_init_manageability(adapter);
5298 if (netif_running(netdev)) {
5299 if (e1000_up(adapter)) {
5300 printk("e1000: can't bring device back up after reset\n");
5305 netif_device_attach(netdev);
5307 /* If the controller is 82573 and f/w is AMT, do not set
5308 * DRV_LOAD until the interface is up. For all other cases,
5309 * let the f/w know that the h/w is now under the control
5311 if (adapter->hw.mac_type != e1000_82573 ||
5312 !e1000_check_mng_mode(&adapter->hw))
5313 e1000_get_hw_control(adapter);