2 * Copyright (C) 2006-2007 PA Semi, Inc
4 * Driver for the PA Semi PWRficient onchip 1G/10G Ethernet MACs
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include <linux/init.h>
21 #include <linux/module.h>
22 #include <linux/pci.h>
23 #include <linux/interrupt.h>
24 #include <linux/dmaengine.h>
25 #include <linux/delay.h>
26 #include <linux/netdevice.h>
27 #include <linux/etherdevice.h>
28 #include <asm/dma-mapping.h>
30 #include <linux/skbuff.h>
33 #include <linux/tcp.h>
34 #include <net/checksum.h>
38 #include "pasemi_mac.h"
43 * - Get rid of pci_{read,write}_config(), map registers with ioremap
48 * - Other performance improvements
52 /* Must be a power of two */
53 #define RX_RING_SIZE 512
54 #define TX_RING_SIZE 512
56 #define DEFAULT_MSG_ENABLE \
66 #define TX_DESC(mac, num) ((mac)->tx->desc[(num) & (TX_RING_SIZE-1)])
67 #define TX_DESC_INFO(mac, num) ((mac)->tx->desc_info[(num) & (TX_RING_SIZE-1)])
68 #define RX_DESC(mac, num) ((mac)->rx->desc[(num) & (RX_RING_SIZE-1)])
69 #define RX_DESC_INFO(mac, num) ((mac)->rx->desc_info[(num) & (RX_RING_SIZE-1)])
70 #define RX_BUFF(mac, num) ((mac)->rx->buffers[(num) & (RX_RING_SIZE-1)])
72 #define BUF_SIZE 1646 /* 1500 MTU + ETH_HLEN + VLAN_HLEN + 2 64B cachelines */
74 MODULE_LICENSE("GPL");
75 MODULE_AUTHOR ("Olof Johansson <olof@lixom.net>");
76 MODULE_DESCRIPTION("PA Semi PWRficient Ethernet driver");
78 static int debug = -1; /* -1 == use DEFAULT_MSG_ENABLE as value */
79 module_param(debug, int, 0);
80 MODULE_PARM_DESC(debug, "PA Semi MAC bitmapped debugging message enable value");
82 static struct pasdma_status *dma_status;
84 static int pasemi_get_mac_addr(struct pasemi_mac *mac)
86 struct pci_dev *pdev = mac->pdev;
87 struct device_node *dn = pci_device_to_OF_node(pdev);
93 "No device node for mac, not configuring\n");
97 maddr = of_get_property(dn, "local-mac-address", NULL);
99 /* Fall back to mac-address for older firmware */
101 maddr = of_get_property(dn, "mac-address", NULL);
105 "no mac address in device tree, not configuring\n");
109 if (sscanf(maddr, "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx", &addr[0],
110 &addr[1], &addr[2], &addr[3], &addr[4], &addr[5]) != 6) {
112 "can't parse mac address, not configuring\n");
116 memcpy(mac->mac_addr, addr, sizeof(addr));
120 static int pasemi_mac_setup_rx_resources(struct net_device *dev)
122 struct pasemi_mac_rxring *ring;
123 struct pasemi_mac *mac = netdev_priv(dev);
124 int chan_id = mac->dma_rxch;
126 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
131 spin_lock_init(&ring->lock);
133 ring->desc_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
134 RX_RING_SIZE, GFP_KERNEL);
136 if (!ring->desc_info)
139 /* Allocate descriptors */
140 ring->desc = dma_alloc_coherent(&mac->dma_pdev->dev,
142 sizeof(struct pas_dma_xct_descr),
143 &ring->dma, GFP_KERNEL);
148 memset(ring->desc, 0, RX_RING_SIZE * sizeof(struct pas_dma_xct_descr));
150 ring->buffers = dma_alloc_coherent(&mac->dma_pdev->dev,
151 RX_RING_SIZE * sizeof(u64),
152 &ring->buf_dma, GFP_KERNEL);
156 memset(ring->buffers, 0, RX_RING_SIZE * sizeof(u64));
158 pci_write_config_dword(mac->dma_pdev, PAS_DMA_RXCHAN_BASEL(chan_id),
159 PAS_DMA_RXCHAN_BASEL_BRBL(ring->dma));
161 pci_write_config_dword(mac->dma_pdev, PAS_DMA_RXCHAN_BASEU(chan_id),
162 PAS_DMA_RXCHAN_BASEU_BRBH(ring->dma >> 32) |
163 PAS_DMA_RXCHAN_BASEU_SIZ(RX_RING_SIZE >> 2));
165 pci_write_config_dword(mac->dma_pdev, PAS_DMA_RXCHAN_CFG(chan_id),
166 PAS_DMA_RXCHAN_CFG_HBU(1));
168 pci_write_config_dword(mac->dma_pdev, PAS_DMA_RXINT_BASEL(mac->dma_if),
169 PAS_DMA_RXINT_BASEL_BRBL(__pa(ring->buffers)));
171 pci_write_config_dword(mac->dma_pdev, PAS_DMA_RXINT_BASEU(mac->dma_if),
172 PAS_DMA_RXINT_BASEU_BRBH(__pa(ring->buffers) >> 32) |
173 PAS_DMA_RXINT_BASEU_SIZ(RX_RING_SIZE >> 3));
175 ring->next_to_fill = 0;
176 ring->next_to_clean = 0;
178 snprintf(ring->irq_name, sizeof(ring->irq_name),
185 dma_free_coherent(&mac->dma_pdev->dev,
186 RX_RING_SIZE * sizeof(struct pas_dma_xct_descr),
187 mac->rx->desc, mac->rx->dma);
189 kfree(ring->desc_info);
197 static int pasemi_mac_setup_tx_resources(struct net_device *dev)
199 struct pasemi_mac *mac = netdev_priv(dev);
201 int chan_id = mac->dma_txch;
202 struct pasemi_mac_txring *ring;
204 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
208 spin_lock_init(&ring->lock);
210 ring->desc_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
211 TX_RING_SIZE, GFP_KERNEL);
212 if (!ring->desc_info)
215 /* Allocate descriptors */
216 ring->desc = dma_alloc_coherent(&mac->dma_pdev->dev,
218 sizeof(struct pas_dma_xct_descr),
219 &ring->dma, GFP_KERNEL);
223 memset(ring->desc, 0, TX_RING_SIZE * sizeof(struct pas_dma_xct_descr));
225 pci_write_config_dword(mac->dma_pdev, PAS_DMA_TXCHAN_BASEL(chan_id),
226 PAS_DMA_TXCHAN_BASEL_BRBL(ring->dma));
227 val = PAS_DMA_TXCHAN_BASEU_BRBH(ring->dma >> 32);
228 val |= PAS_DMA_TXCHAN_BASEU_SIZ(TX_RING_SIZE >> 2);
230 pci_write_config_dword(mac->dma_pdev, PAS_DMA_TXCHAN_BASEU(chan_id), val);
232 pci_write_config_dword(mac->dma_pdev, PAS_DMA_TXCHAN_CFG(chan_id),
233 PAS_DMA_TXCHAN_CFG_TY_IFACE |
234 PAS_DMA_TXCHAN_CFG_TATTR(mac->dma_if) |
235 PAS_DMA_TXCHAN_CFG_UP |
236 PAS_DMA_TXCHAN_CFG_WT(2));
238 ring->next_to_use = 0;
239 ring->next_to_clean = 0;
241 snprintf(ring->irq_name, sizeof(ring->irq_name),
248 kfree(ring->desc_info);
255 static void pasemi_mac_free_tx_resources(struct net_device *dev)
257 struct pasemi_mac *mac = netdev_priv(dev);
259 struct pasemi_mac_buffer *info;
260 struct pas_dma_xct_descr *dp;
262 for (i = 0; i < TX_RING_SIZE; i++) {
263 info = &TX_DESC_INFO(mac, i);
264 dp = &TX_DESC(mac, i);
267 pci_unmap_single(mac->dma_pdev,
271 dev_kfree_skb_any(info->skb);
280 dma_free_coherent(&mac->dma_pdev->dev,
281 TX_RING_SIZE * sizeof(struct pas_dma_xct_descr),
282 mac->tx->desc, mac->tx->dma);
284 kfree(mac->tx->desc_info);
289 static void pasemi_mac_free_rx_resources(struct net_device *dev)
291 struct pasemi_mac *mac = netdev_priv(dev);
293 struct pasemi_mac_buffer *info;
294 struct pas_dma_xct_descr *dp;
296 for (i = 0; i < RX_RING_SIZE; i++) {
297 info = &RX_DESC_INFO(mac, i);
298 dp = &RX_DESC(mac, i);
301 pci_unmap_single(mac->dma_pdev,
305 dev_kfree_skb_any(info->skb);
314 dma_free_coherent(&mac->dma_pdev->dev,
315 RX_RING_SIZE * sizeof(struct pas_dma_xct_descr),
316 mac->rx->desc, mac->rx->dma);
318 dma_free_coherent(&mac->dma_pdev->dev, RX_RING_SIZE * sizeof(u64),
319 mac->rx->buffers, mac->rx->buf_dma);
321 kfree(mac->rx->desc_info);
326 static void pasemi_mac_replenish_rx_ring(struct net_device *dev)
328 struct pasemi_mac *mac = netdev_priv(dev);
330 int start = mac->rx->next_to_fill;
331 unsigned int limit, count;
333 limit = (mac->rx->next_to_clean + RX_RING_SIZE -
334 mac->rx->next_to_fill) & (RX_RING_SIZE - 1);
336 /* Check to see if we're doing first-time setup */
337 if (unlikely(mac->rx->next_to_clean == 0 && mac->rx->next_to_fill == 0))
338 limit = RX_RING_SIZE;
344 for (count = limit; count; count--) {
345 struct pasemi_mac_buffer *info = &RX_DESC_INFO(mac, i);
346 u64 *buff = &RX_BUFF(mac, i);
350 /* skb might still be in there for recycle on short receives */
354 skb = dev_alloc_skb(BUF_SIZE);
359 dma = pci_map_single(mac->dma_pdev, skb->data, skb->len,
362 if (unlikely(dma_mapping_error(dma))) {
363 dev_kfree_skb_irq(info->skb);
369 *buff = XCT_RXB_LEN(BUF_SIZE) | XCT_RXB_ADDR(dma);
375 pci_write_config_dword(mac->dma_pdev,
376 PAS_DMA_RXCHAN_INCR(mac->dma_rxch),
378 pci_write_config_dword(mac->dma_pdev,
379 PAS_DMA_RXINT_INCR(mac->dma_if),
382 mac->rx->next_to_fill += limit - count;
385 static void pasemi_mac_restart_rx_intr(struct pasemi_mac *mac)
387 unsigned int reg, pcnt;
388 /* Re-enable packet count interrupts: finally
389 * ack the packet count interrupt we got in rx_intr.
392 pcnt = *mac->rx_status & PAS_STATUS_PCNT_M;
394 reg = PAS_IOB_DMA_RXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_RXCH_RESET_PINTC;
396 pci_write_config_dword(mac->iob_pdev,
397 PAS_IOB_DMA_RXCH_RESET(mac->dma_rxch),
401 static void pasemi_mac_restart_tx_intr(struct pasemi_mac *mac)
403 unsigned int reg, pcnt;
405 /* Re-enable packet count interrupts */
406 pcnt = *mac->tx_status & PAS_STATUS_PCNT_M;
408 reg = PAS_IOB_DMA_TXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_TXCH_RESET_PINTC;
410 pci_write_config_dword(mac->iob_pdev,
411 PAS_IOB_DMA_TXCH_RESET(mac->dma_txch), reg);
415 static int pasemi_mac_clean_rx(struct pasemi_mac *mac, int limit)
419 struct pas_dma_xct_descr *dp;
420 struct pasemi_mac_buffer *info;
426 spin_lock(&mac->rx->lock);
428 n = mac->rx->next_to_clean;
430 for (count = limit; count; count--) {
434 dp = &RX_DESC(mac, n);
437 if (!(macrx & XCT_MACRX_O))
443 /* We have to scan for our skb since there's no way
444 * to back-map them from the descriptor, and if we
445 * have several receive channels then they might not
446 * show up in the same order as they were put on the
450 dma = (dp->ptr & XCT_PTR_ADDR_M);
451 for (i = n; i < (n + RX_RING_SIZE); i++) {
452 info = &RX_DESC_INFO(mac, i);
453 if (info->dma == dma)
460 pci_unmap_single(mac->dma_pdev, dma, skb->len,
463 len = (macrx & XCT_MACRX_LLEN_M) >> XCT_MACRX_LLEN_S;
466 struct sk_buff *new_skb =
467 netdev_alloc_skb(mac->netdev, len + NET_IP_ALIGN);
469 skb_reserve(new_skb, NET_IP_ALIGN);
470 memcpy(new_skb->data - NET_IP_ALIGN,
471 skb->data - NET_IP_ALIGN,
473 /* save the skb in buffer_info as good */
476 /* else just continue with the old one */
482 skb->protocol = eth_type_trans(skb, mac->netdev);
484 if ((macrx & XCT_MACRX_HTY_M) == XCT_MACRX_HTY_IPV4_OK) {
485 skb->ip_summed = CHECKSUM_COMPLETE;
486 skb->csum = (macrx & XCT_MACRX_CSUM_M) >>
489 skb->ip_summed = CHECKSUM_NONE;
491 mac->stats.rx_bytes += len;
492 mac->stats.rx_packets++;
494 netif_receive_skb(skb);
502 mac->rx->next_to_clean += limit - count;
503 pasemi_mac_replenish_rx_ring(mac->netdev);
505 spin_unlock(&mac->rx->lock);
510 static int pasemi_mac_clean_tx(struct pasemi_mac *mac)
513 struct pasemi_mac_buffer *info;
514 struct pas_dma_xct_descr *dp;
518 spin_lock_irqsave(&mac->tx->lock, flags);
520 start = mac->tx->next_to_clean;
523 for (i = start; i < mac->tx->next_to_use; i++) {
524 dp = &TX_DESC(mac, i);
525 if (!dp || (dp->mactx & XCT_MACTX_O))
530 info = &TX_DESC_INFO(mac, i);
532 pci_unmap_single(mac->dma_pdev, info->dma,
533 info->skb->len, PCI_DMA_TODEVICE);
534 dev_kfree_skb_irq(info->skb);
541 mac->tx->next_to_clean += count;
542 spin_unlock_irqrestore(&mac->tx->lock, flags);
544 netif_wake_queue(mac->netdev);
550 static irqreturn_t pasemi_mac_rx_intr(int irq, void *data)
552 struct net_device *dev = data;
553 struct pasemi_mac *mac = netdev_priv(dev);
556 if (!(*mac->rx_status & PAS_STATUS_CAUSE_M))
559 if (*mac->rx_status & PAS_STATUS_ERROR)
560 printk("rx_status reported error\n");
562 /* Don't reset packet count so it won't fire again but clear
566 pci_read_config_dword(mac->dma_pdev, PAS_DMA_RXINT_RCMDSTA(mac->dma_if), ®);
569 if (*mac->rx_status & PAS_STATUS_SOFT)
570 reg |= PAS_IOB_DMA_RXCH_RESET_SINTC;
571 if (*mac->rx_status & PAS_STATUS_ERROR)
572 reg |= PAS_IOB_DMA_RXCH_RESET_DINTC;
573 if (*mac->rx_status & PAS_STATUS_TIMER)
574 reg |= PAS_IOB_DMA_RXCH_RESET_TINTC;
576 netif_rx_schedule(dev);
578 pci_write_config_dword(mac->iob_pdev,
579 PAS_IOB_DMA_RXCH_RESET(mac->dma_rxch), reg);
585 static irqreturn_t pasemi_mac_tx_intr(int irq, void *data)
587 struct net_device *dev = data;
588 struct pasemi_mac *mac = netdev_priv(dev);
589 unsigned int reg, pcnt;
591 if (!(*mac->tx_status & PAS_STATUS_CAUSE_M))
594 pasemi_mac_clean_tx(mac);
596 pcnt = *mac->tx_status & PAS_STATUS_PCNT_M;
598 reg = PAS_IOB_DMA_TXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_TXCH_RESET_PINTC;
600 if (*mac->tx_status & PAS_STATUS_SOFT)
601 reg |= PAS_IOB_DMA_TXCH_RESET_SINTC;
602 if (*mac->tx_status & PAS_STATUS_ERROR)
603 reg |= PAS_IOB_DMA_TXCH_RESET_DINTC;
605 pci_write_config_dword(mac->iob_pdev,
606 PAS_IOB_DMA_TXCH_RESET(mac->dma_txch),
612 static void pasemi_adjust_link(struct net_device *dev)
614 struct pasemi_mac *mac = netdev_priv(dev);
617 unsigned int new_flags;
619 if (!mac->phydev->link) {
620 /* If no link, MAC speed settings don't matter. Just report
621 * link down and return.
623 if (mac->link && netif_msg_link(mac))
624 printk(KERN_INFO "%s: Link is down.\n", dev->name);
626 netif_carrier_off(dev);
631 netif_carrier_on(dev);
633 pci_read_config_dword(mac->pdev, PAS_MAC_CFG_PCFG, &flags);
634 new_flags = flags & ~(PAS_MAC_CFG_PCFG_HD | PAS_MAC_CFG_PCFG_SPD_M |
635 PAS_MAC_CFG_PCFG_TSR_M);
637 if (!mac->phydev->duplex)
638 new_flags |= PAS_MAC_CFG_PCFG_HD;
640 switch (mac->phydev->speed) {
642 new_flags |= PAS_MAC_CFG_PCFG_SPD_1G |
643 PAS_MAC_CFG_PCFG_TSR_1G;
646 new_flags |= PAS_MAC_CFG_PCFG_SPD_100M |
647 PAS_MAC_CFG_PCFG_TSR_100M;
650 new_flags |= PAS_MAC_CFG_PCFG_SPD_10M |
651 PAS_MAC_CFG_PCFG_TSR_10M;
654 printk("Unsupported speed %d\n", mac->phydev->speed);
657 /* Print on link or speed/duplex change */
658 msg = mac->link != mac->phydev->link || flags != new_flags;
660 mac->duplex = mac->phydev->duplex;
661 mac->speed = mac->phydev->speed;
662 mac->link = mac->phydev->link;
664 if (new_flags != flags)
665 pci_write_config_dword(mac->pdev, PAS_MAC_CFG_PCFG, new_flags);
667 if (msg && netif_msg_link(mac))
668 printk(KERN_INFO "%s: Link is up at %d Mbps, %s duplex.\n",
669 dev->name, mac->speed, mac->duplex ? "full" : "half");
672 static int pasemi_mac_phy_init(struct net_device *dev)
674 struct pasemi_mac *mac = netdev_priv(dev);
675 struct device_node *dn, *phy_dn;
676 struct phy_device *phydev;
679 const unsigned int *prop;
683 dn = pci_device_to_OF_node(mac->pdev);
684 ph = of_get_property(dn, "phy-handle", NULL);
687 phy_dn = of_find_node_by_phandle(*ph);
689 prop = of_get_property(phy_dn, "reg", NULL);
690 ret = of_address_to_resource(phy_dn->parent, 0, &r);
695 snprintf(mac->phy_id, BUS_ID_SIZE, PHY_ID_FMT, (int)r.start, phy_id);
703 phydev = phy_connect(dev, mac->phy_id, &pasemi_adjust_link, 0, PHY_INTERFACE_MODE_SGMII);
705 if (IS_ERR(phydev)) {
706 printk(KERN_ERR "%s: Could not attach to phy\n", dev->name);
707 return PTR_ERR(phydev);
710 mac->phydev = phydev;
720 static int pasemi_mac_open(struct net_device *dev)
722 struct pasemi_mac *mac = netdev_priv(dev);
727 /* enable rx section */
728 pci_write_config_dword(mac->dma_pdev, PAS_DMA_COM_RXCMD,
729 PAS_DMA_COM_RXCMD_EN);
731 /* enable tx section */
732 pci_write_config_dword(mac->dma_pdev, PAS_DMA_COM_TXCMD,
733 PAS_DMA_COM_TXCMD_EN);
735 flags = PAS_MAC_CFG_TXP_FCE | PAS_MAC_CFG_TXP_FPC(3) |
736 PAS_MAC_CFG_TXP_SL(3) | PAS_MAC_CFG_TXP_COB(0xf) |
737 PAS_MAC_CFG_TXP_TIFT(8) | PAS_MAC_CFG_TXP_TIFG(12);
739 pci_write_config_dword(mac->pdev, PAS_MAC_CFG_TXP, flags);
741 flags = PAS_MAC_CFG_PCFG_S1 | PAS_MAC_CFG_PCFG_PE |
742 PAS_MAC_CFG_PCFG_PR | PAS_MAC_CFG_PCFG_CE;
744 flags |= PAS_MAC_CFG_PCFG_TSR_1G | PAS_MAC_CFG_PCFG_SPD_1G;
746 pci_write_config_dword(mac->iob_pdev, PAS_IOB_DMA_RXCH_CFG(mac->dma_rxch),
747 PAS_IOB_DMA_RXCH_CFG_CNTTH(1));
749 pci_write_config_dword(mac->iob_pdev, PAS_IOB_DMA_TXCH_CFG(mac->dma_txch),
750 PAS_IOB_DMA_TXCH_CFG_CNTTH(32));
752 /* Clear out any residual packet count state from firmware */
753 pasemi_mac_restart_rx_intr(mac);
754 pasemi_mac_restart_tx_intr(mac);
756 /* 0xffffff is max value, about 16ms */
757 pci_write_config_dword(mac->iob_pdev, PAS_IOB_DMA_COM_TIMEOUTCFG,
758 PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(0xffffff));
760 pci_write_config_dword(mac->pdev, PAS_MAC_CFG_PCFG, flags);
762 ret = pasemi_mac_setup_rx_resources(dev);
764 goto out_rx_resources;
766 ret = pasemi_mac_setup_tx_resources(dev);
768 goto out_tx_resources;
770 pci_write_config_dword(mac->pdev, PAS_MAC_IPC_CHNL,
771 PAS_MAC_IPC_CHNL_DCHNO(mac->dma_rxch) |
772 PAS_MAC_IPC_CHNL_BCH(mac->dma_rxch));
775 pci_write_config_dword(mac->dma_pdev,
776 PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
777 PAS_DMA_RXINT_RCMDSTA_EN);
779 /* enable rx channel */
780 pci_write_config_dword(mac->dma_pdev,
781 PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch),
782 PAS_DMA_RXCHAN_CCMDSTA_EN |
783 PAS_DMA_RXCHAN_CCMDSTA_DU);
785 /* enable tx channel */
786 pci_write_config_dword(mac->dma_pdev,
787 PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch),
788 PAS_DMA_TXCHAN_TCMDSTA_EN);
790 pasemi_mac_replenish_rx_ring(dev);
792 ret = pasemi_mac_phy_init(dev);
793 /* Some configs don't have PHYs (XAUI etc), so don't complain about
794 * failed init due to -ENODEV.
796 if (ret && ret != -ENODEV)
797 dev_warn(&mac->pdev->dev, "phy init failed: %d\n", ret);
799 netif_start_queue(dev);
800 netif_poll_enable(dev);
802 /* Interrupts are a bit different for our DMA controller: While
803 * it's got one a regular PCI device header, the interrupt there
804 * is really the base of the range it's using. Each tx and rx
805 * channel has it's own interrupt source.
808 base_irq = virq_to_hw(mac->dma_pdev->irq);
810 mac->tx_irq = irq_create_mapping(NULL, base_irq + mac->dma_txch);
811 mac->rx_irq = irq_create_mapping(NULL, base_irq + 20 + mac->dma_txch);
813 ret = request_irq(mac->tx_irq, &pasemi_mac_tx_intr, IRQF_DISABLED,
814 mac->tx->irq_name, dev);
816 dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
817 base_irq + mac->dma_txch, ret);
821 ret = request_irq(mac->rx_irq, &pasemi_mac_rx_intr, IRQF_DISABLED,
822 mac->rx->irq_name, dev);
824 dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
825 base_irq + 20 + mac->dma_rxch, ret);
830 phy_start(mac->phydev);
835 free_irq(mac->tx_irq, dev);
837 netif_poll_disable(dev);
838 netif_stop_queue(dev);
839 pasemi_mac_free_tx_resources(dev);
841 pasemi_mac_free_rx_resources(dev);
847 #define MAX_RETRIES 5000
849 static int pasemi_mac_close(struct net_device *dev)
851 struct pasemi_mac *mac = netdev_priv(dev);
856 phy_stop(mac->phydev);
857 phy_disconnect(mac->phydev);
860 netif_stop_queue(dev);
862 /* Clean out any pending buffers */
863 pasemi_mac_clean_tx(mac);
864 pasemi_mac_clean_rx(mac, RX_RING_SIZE);
866 /* Disable interface */
867 pci_write_config_dword(mac->dma_pdev,
868 PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch),
869 PAS_DMA_TXCHAN_TCMDSTA_ST);
870 pci_write_config_dword(mac->dma_pdev,
871 PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
872 PAS_DMA_RXINT_RCMDSTA_ST);
873 pci_write_config_dword(mac->dma_pdev,
874 PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch),
875 PAS_DMA_RXCHAN_CCMDSTA_ST);
877 for (retries = 0; retries < MAX_RETRIES; retries++) {
878 pci_read_config_dword(mac->dma_pdev,
879 PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch),
881 if (!(stat & PAS_DMA_TXCHAN_TCMDSTA_ACT))
886 if (stat & PAS_DMA_TXCHAN_TCMDSTA_ACT)
887 dev_err(&mac->dma_pdev->dev, "Failed to stop tx channel\n");
889 for (retries = 0; retries < MAX_RETRIES; retries++) {
890 pci_read_config_dword(mac->dma_pdev,
891 PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch),
893 if (!(stat & PAS_DMA_RXCHAN_CCMDSTA_ACT))
898 if (stat & PAS_DMA_RXCHAN_CCMDSTA_ACT)
899 dev_err(&mac->dma_pdev->dev, "Failed to stop rx channel\n");
901 for (retries = 0; retries < MAX_RETRIES; retries++) {
902 pci_read_config_dword(mac->dma_pdev,
903 PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
905 if (!(stat & PAS_DMA_RXINT_RCMDSTA_ACT))
910 if (stat & PAS_DMA_RXINT_RCMDSTA_ACT)
911 dev_err(&mac->dma_pdev->dev, "Failed to stop rx interface\n");
913 /* Then, disable the channel. This must be done separately from
914 * stopping, since you can't disable when active.
917 pci_write_config_dword(mac->dma_pdev,
918 PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch), 0);
919 pci_write_config_dword(mac->dma_pdev,
920 PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch), 0);
921 pci_write_config_dword(mac->dma_pdev,
922 PAS_DMA_RXINT_RCMDSTA(mac->dma_if), 0);
924 free_irq(mac->tx_irq, dev);
925 free_irq(mac->rx_irq, dev);
928 pasemi_mac_free_rx_resources(dev);
929 pasemi_mac_free_tx_resources(dev);
934 static int pasemi_mac_start_tx(struct sk_buff *skb, struct net_device *dev)
936 struct pasemi_mac *mac = netdev_priv(dev);
937 struct pasemi_mac_txring *txring;
938 struct pasemi_mac_buffer *info;
939 struct pas_dma_xct_descr *dp;
944 dflags = XCT_MACTX_O | XCT_MACTX_ST | XCT_MACTX_SS | XCT_MACTX_CRC_PAD;
946 if (skb->ip_summed == CHECKSUM_PARTIAL) {
947 const unsigned char *nh = skb_network_header(skb);
949 switch (ip_hdr(skb)->protocol) {
951 dflags |= XCT_MACTX_CSUM_TCP;
952 dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2);
953 dflags |= XCT_MACTX_IPO(nh - skb->data);
956 dflags |= XCT_MACTX_CSUM_UDP;
957 dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2);
958 dflags |= XCT_MACTX_IPO(nh - skb->data);
963 map = pci_map_single(mac->dma_pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
965 if (dma_mapping_error(map))
966 return NETDEV_TX_BUSY;
970 spin_lock_irqsave(&txring->lock, flags);
972 if (txring->next_to_clean - txring->next_to_use == TX_RING_SIZE) {
973 spin_unlock_irqrestore(&txring->lock, flags);
974 pasemi_mac_clean_tx(mac);
975 pasemi_mac_restart_tx_intr(mac);
976 spin_lock_irqsave(&txring->lock, flags);
978 if (txring->next_to_clean - txring->next_to_use ==
980 /* Still no room -- stop the queue and wait for tx
981 * intr when there's room.
983 netif_stop_queue(dev);
989 dp = &TX_DESC(mac, txring->next_to_use);
990 info = &TX_DESC_INFO(mac, txring->next_to_use);
992 dp->mactx = dflags | XCT_MACTX_LLEN(skb->len);
993 dp->ptr = XCT_PTR_LEN(skb->len) | XCT_PTR_ADDR(map);
997 txring->next_to_use++;
998 mac->stats.tx_packets++;
999 mac->stats.tx_bytes += skb->len;
1001 spin_unlock_irqrestore(&txring->lock, flags);
1003 pci_write_config_dword(mac->dma_pdev,
1004 PAS_DMA_TXCHAN_INCR(mac->dma_txch), 1);
1006 return NETDEV_TX_OK;
1009 spin_unlock_irqrestore(&txring->lock, flags);
1010 pci_unmap_single(mac->dma_pdev, map, skb->len, PCI_DMA_TODEVICE);
1011 return NETDEV_TX_BUSY;
1014 static struct net_device_stats *pasemi_mac_get_stats(struct net_device *dev)
1016 struct pasemi_mac *mac = netdev_priv(dev);
1022 static void pasemi_mac_set_rx_mode(struct net_device *dev)
1024 struct pasemi_mac *mac = netdev_priv(dev);
1027 pci_read_config_dword(mac->pdev, PAS_MAC_CFG_PCFG, &flags);
1029 /* Set promiscuous */
1030 if (dev->flags & IFF_PROMISC)
1031 flags |= PAS_MAC_CFG_PCFG_PR;
1033 flags &= ~PAS_MAC_CFG_PCFG_PR;
1035 pci_write_config_dword(mac->pdev, PAS_MAC_CFG_PCFG, flags);
1039 static int pasemi_mac_poll(struct net_device *dev, int *budget)
1041 int pkts, limit = min(*budget, dev->quota);
1042 struct pasemi_mac *mac = netdev_priv(dev);
1044 pkts = pasemi_mac_clean_rx(mac, limit);
1050 /* all done, no more packets present */
1051 netif_rx_complete(dev);
1053 pasemi_mac_restart_rx_intr(mac);
1056 /* used up our quantum, so reschedule */
1061 static int __devinit
1062 pasemi_mac_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1064 static int index = 0;
1065 struct net_device *dev;
1066 struct pasemi_mac *mac;
1069 err = pci_enable_device(pdev);
1073 dev = alloc_etherdev(sizeof(struct pasemi_mac));
1076 "pasemi_mac: Could not allocate ethernet device.\n");
1078 goto out_disable_device;
1081 SET_MODULE_OWNER(dev);
1082 pci_set_drvdata(pdev, dev);
1083 SET_NETDEV_DEV(dev, &pdev->dev);
1085 mac = netdev_priv(dev);
1089 mac->dma_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa007, NULL);
1091 if (!mac->dma_pdev) {
1092 dev_err(&pdev->dev, "Can't find DMA Controller\n");
1094 goto out_free_netdev;
1097 mac->iob_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa001, NULL);
1099 if (!mac->iob_pdev) {
1100 dev_err(&pdev->dev, "Can't find I/O Bridge\n");
1102 goto out_put_dma_pdev;
1105 /* These should come out of the device tree eventually */
1106 mac->dma_txch = index;
1107 mac->dma_rxch = index;
1109 /* We probe GMAC before XAUI, but the DMA interfaces are
1110 * in XAUI, GMAC order.
1113 mac->dma_if = index + 2;
1115 mac->dma_if = index - 4;
1118 switch (pdev->device) {
1120 mac->type = MAC_TYPE_GMAC;
1123 mac->type = MAC_TYPE_XAUI;
1130 /* get mac addr from device tree */
1131 if (pasemi_get_mac_addr(mac) || !is_valid_ether_addr(mac->mac_addr)) {
1135 memcpy(dev->dev_addr, mac->mac_addr, sizeof(mac->mac_addr));
1137 dev->open = pasemi_mac_open;
1138 dev->stop = pasemi_mac_close;
1139 dev->hard_start_xmit = pasemi_mac_start_tx;
1140 dev->get_stats = pasemi_mac_get_stats;
1141 dev->set_multicast_list = pasemi_mac_set_rx_mode;
1143 dev->poll = pasemi_mac_poll;
1144 dev->features = NETIF_F_HW_CSUM;
1146 /* The dma status structure is located in the I/O bridge, and
1147 * is cache coherent.
1150 /* XXXOJN This should come from the device tree */
1151 dma_status = __ioremap(0xfd800000, 0x1000, 0);
1153 mac->rx_status = &dma_status->rx_sta[mac->dma_rxch];
1154 mac->tx_status = &dma_status->tx_sta[mac->dma_txch];
1156 mac->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
1158 /* Enable most messages by default */
1159 mac->msg_enable = (NETIF_MSG_IFUP << 1 ) - 1;
1161 err = register_netdev(dev);
1164 dev_err(&mac->pdev->dev, "register_netdev failed with error %d\n",
1168 printk(KERN_INFO "%s: PA Semi %s: intf %d, txch %d, rxch %d, "
1169 "hw addr %02x:%02x:%02x:%02x:%02x:%02x\n",
1170 dev->name, mac->type == MAC_TYPE_GMAC ? "GMAC" : "XAUI",
1171 mac->dma_if, mac->dma_txch, mac->dma_rxch,
1172 dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
1173 dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
1178 pci_dev_put(mac->iob_pdev);
1180 pci_dev_put(mac->dma_pdev);
1184 pci_disable_device(pdev);
1189 static void __devexit pasemi_mac_remove(struct pci_dev *pdev)
1191 struct net_device *netdev = pci_get_drvdata(pdev);
1192 struct pasemi_mac *mac;
1197 mac = netdev_priv(netdev);
1199 unregister_netdev(netdev);
1201 pci_disable_device(pdev);
1202 pci_dev_put(mac->dma_pdev);
1203 pci_dev_put(mac->iob_pdev);
1205 pci_set_drvdata(pdev, NULL);
1206 free_netdev(netdev);
1209 static struct pci_device_id pasemi_mac_pci_tbl[] = {
1210 { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa005) },
1211 { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa006) },
1215 MODULE_DEVICE_TABLE(pci, pasemi_mac_pci_tbl);
1217 static struct pci_driver pasemi_mac_driver = {
1218 .name = "pasemi_mac",
1219 .id_table = pasemi_mac_pci_tbl,
1220 .probe = pasemi_mac_probe,
1221 .remove = __devexit_p(pasemi_mac_remove),
1224 static void __exit pasemi_mac_cleanup_module(void)
1226 pci_unregister_driver(&pasemi_mac_driver);
1227 __iounmap(dma_status);
1231 int pasemi_mac_init_module(void)
1233 return pci_register_driver(&pasemi_mac_driver);
1236 module_init(pasemi_mac_init_module);
1237 module_exit(pasemi_mac_cleanup_module);