3 * This is a driver for SMSC's 91C9x/91C1xx single-chip Ethernet devices.
5 * Copyright (C) 1996 by Erik Stahlman
6 * Copyright (C) 2001 Standard Microsystems Corporation
7 * Developed by Simple Network Magic Corporation
8 * Copyright (C) 2003 Monta Vista Software, Inc.
9 * Unified SMC91x driver by Nicolas Pitre
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 * io = for the base address
28 * nowait = 0 for normal wait states, 1 eliminates additional wait states
31 * Erik Stahlman <erik@vt.edu>
33 * hardware multicast code:
34 * Peter Cammaert <pc@denkart.be>
37 * Daris A Nevil <dnevil@snmc.com>
38 * Nicolas Pitre <nico@cam.org>
39 * Russell King <rmk@arm.linux.org.uk>
42 * 08/20/00 Arnaldo Melo fix kfree(skb) in smc_hardware_send_packet
43 * 12/15/00 Christian Jullien fix "Warning: kfree_skb on hard IRQ"
44 * 03/16/01 Daris A Nevil modified smc9194.c for use with LAN91C111
45 * 08/22/01 Scott Anderson merge changes from smc9194 to smc91111
46 * 08/21/01 Pramod B Bhardwaj added support for RevB of LAN91C111
47 * 12/20/01 Jeff Sutherland initial port to Xscale PXA with DMA support
48 * 04/07/03 Nicolas Pitre unified SMC91x driver, killed irq races,
49 * more bus abstraction, big cleanup, etc.
50 * 29/09/03 Russell King - add driver model support
52 * - convert to use generic MII interface
53 * - add link up/down notification
54 * - don't try to handle full negotiation in
56 * - clean up (and fix stack overrun) in PHY
57 * MII read/write functions
58 * 22/09/04 Nicolas Pitre big update (see commit log for details)
60 static const char version[] =
61 "smc91x.c: v1.1, sep 22 2004 by Nicolas Pitre <nico@cam.org>\n";
69 #include <linux/init.h>
70 #include <linux/module.h>
71 #include <linux/kernel.h>
72 #include <linux/sched.h>
73 #include <linux/slab.h>
74 #include <linux/delay.h>
75 #include <linux/interrupt.h>
76 #include <linux/errno.h>
77 #include <linux/ioport.h>
78 #include <linux/crc32.h>
79 #include <linux/platform_device.h>
80 #include <linux/spinlock.h>
81 #include <linux/ethtool.h>
82 #include <linux/mii.h>
83 #include <linux/workqueue.h>
85 #include <linux/netdevice.h>
86 #include <linux/etherdevice.h>
87 #include <linux/skbuff.h>
95 * the LAN91C111 can be at any of the following port addresses. To change,
96 * for a slightly different card, you can add it to the array. Keep in
97 * mind that the array must end in zero.
99 static unsigned int smc_portlist[] __initdata = {
100 0x200, 0x220, 0x240, 0x260, 0x280, 0x2A0, 0x2C0, 0x2E0,
101 0x300, 0x320, 0x340, 0x360, 0x380, 0x3A0, 0x3C0, 0x3E0, 0
105 # define SMC_IOADDR -1
107 static unsigned long io = SMC_IOADDR;
108 module_param(io, ulong, 0400);
109 MODULE_PARM_DESC(io, "I/O base address");
114 static int irq = SMC_IRQ;
115 module_param(irq, int, 0400);
116 MODULE_PARM_DESC(irq, "IRQ number");
118 #endif /* CONFIG_ISA */
121 # define SMC_NOWAIT 0
123 static int nowait = SMC_NOWAIT;
124 module_param(nowait, int, 0400);
125 MODULE_PARM_DESC(nowait, "set to 1 for no wait state");
128 * Transmit timeout, default 5 seconds.
130 static int watchdog = 1000;
131 module_param(watchdog, int, 0400);
132 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
134 MODULE_LICENSE("GPL");
137 * The internal workings of the driver. If you are changing anything
138 * here with the SMC stuff, you should have the datasheet and know
139 * what you are doing.
141 #define CARDNAME "smc91x"
144 * Use power-down feature of the chip
149 * Wait time for memory to be free. This probably shouldn't be
150 * tuned that much, as waiting for this means nothing else happens
153 #define MEMORY_WAIT_TIME 16
156 * The maximum number of processing loops allowed for each call to the
159 #define MAX_IRQ_LOOPS 8
162 * This selects whether TX packets are sent one by one to the SMC91x internal
163 * memory and throttled until transmission completes. This may prevent
164 * RX overruns a litle by keeping much of the memory free for RX packets
165 * but to the expense of reduced TX throughput and increased IRQ overhead.
166 * Note this is not a cure for a too slow data bus or too high IRQ latency.
168 #define THROTTLE_TX_PKTS 0
171 * The MII clock high/low times. 2x this number gives the MII clock period
172 * in microseconds. (was 50, but this gives 6.4ms for each MII transaction!)
176 /* store this information for the driver.. */
179 * If I have to wait until memory is available to send a
180 * packet, I will store the skbuff here, until I get the
181 * desired memory. Then, I'll send it out and free it.
183 struct sk_buff *pending_tx_skb;
184 struct tasklet_struct tx_task;
187 * these are things that the kernel wants me to keep, so users
188 * can find out semi-useless statistics of how well the card is
191 struct net_device_stats stats;
193 /* version/revision of the SMC91x chip */
196 /* Contains the current active transmission mode */
199 /* Contains the current active receive mode */
202 /* Contains the current active receive/phy mode */
209 struct mii_if_info mii;
212 struct work_struct phy_configure;
213 struct net_device *dev;
218 #ifdef SMC_USE_PXA_DMA
219 /* DMA needs the physical address of the chip */
223 void __iomem *datacs;
227 #define DBG(n, args...) \
229 if (SMC_DEBUG >= (n)) \
233 #define PRINTK(args...) printk(args)
235 #define DBG(n, args...) do { } while(0)
236 #define PRINTK(args...) printk(KERN_DEBUG args)
240 static void PRINT_PKT(u_char *buf, int length)
247 remainder = length % 16;
249 for (i = 0; i < lines ; i ++) {
251 for (cur = 0; cur < 8; cur++) {
255 printk("%02x%02x ", a, b);
259 for (i = 0; i < remainder/2 ; i++) {
263 printk("%02x%02x ", a, b);
268 #define PRINT_PKT(x...) do { } while(0)
272 /* this enables an interrupt in the interrupt mask register */
273 #define SMC_ENABLE_INT(x) do { \
274 unsigned char mask; \
275 spin_lock_irq(&lp->lock); \
276 mask = SMC_GET_INT_MASK(); \
278 SMC_SET_INT_MASK(mask); \
279 spin_unlock_irq(&lp->lock); \
282 /* this disables an interrupt from the interrupt mask register */
283 #define SMC_DISABLE_INT(x) do { \
284 unsigned char mask; \
285 spin_lock_irq(&lp->lock); \
286 mask = SMC_GET_INT_MASK(); \
288 SMC_SET_INT_MASK(mask); \
289 spin_unlock_irq(&lp->lock); \
293 * Wait while MMU is busy. This is usually in the order of a few nanosecs
294 * if at all, but let's avoid deadlocking the system if the hardware
295 * decides to go south.
297 #define SMC_WAIT_MMU_BUSY() do { \
298 if (unlikely(SMC_GET_MMU_CMD() & MC_BUSY)) { \
299 unsigned long timeout = jiffies + 2; \
300 while (SMC_GET_MMU_CMD() & MC_BUSY) { \
301 if (time_after(jiffies, timeout)) { \
302 printk("%s: timeout %s line %d\n", \
303 dev->name, __FILE__, __LINE__); \
313 * this does a soft reset on the device
315 static void smc_reset(struct net_device *dev)
317 struct smc_local *lp = netdev_priv(dev);
318 void __iomem *ioaddr = lp->base;
319 unsigned int ctl, cfg;
320 struct sk_buff *pending_skb;
322 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
324 /* Disable all interrupts, block TX tasklet */
325 spin_lock_irq(&lp->lock);
328 pending_skb = lp->pending_tx_skb;
329 lp->pending_tx_skb = NULL;
330 spin_unlock_irq(&lp->lock);
332 /* free any pending tx skb */
334 dev_kfree_skb(pending_skb);
335 lp->stats.tx_errors++;
336 lp->stats.tx_aborted_errors++;
340 * This resets the registers mostly to defaults, but doesn't
341 * affect EEPROM. That seems unnecessary
344 SMC_SET_RCR(RCR_SOFTRST);
347 * Setup the Configuration Register
348 * This is necessary because the CONFIG_REG is not affected
353 cfg = CONFIG_DEFAULT;
356 * Setup for fast accesses if requested. If the card/system
357 * can't handle it then there will be no recovery except for
358 * a hard reset or power cycle
361 cfg |= CONFIG_NO_WAIT;
364 * Release from possible power-down state
365 * Configuration register is not affected by Soft Reset
367 cfg |= CONFIG_EPH_POWER_EN;
371 /* this should pause enough for the chip to be happy */
373 * elaborate? What does the chip _need_? --jgarzik
375 * This seems to be undocumented, but something the original
376 * driver(s) have always done. Suspect undocumented timing
377 * info/determined empirically. --rmk
381 /* Disable transmit and receive functionality */
383 SMC_SET_RCR(RCR_CLEAR);
384 SMC_SET_TCR(TCR_CLEAR);
387 ctl = SMC_GET_CTL() | CTL_LE_ENABLE;
390 * Set the control register to automatically release successfully
391 * transmitted packets, to make the best use out of our limited
394 if(!THROTTLE_TX_PKTS)
395 ctl |= CTL_AUTO_RELEASE;
397 ctl &= ~CTL_AUTO_RELEASE;
402 SMC_SET_MMU_CMD(MC_RESET);
407 * Enable Interrupts, Receive, and Transmit
409 static void smc_enable(struct net_device *dev)
411 struct smc_local *lp = netdev_priv(dev);
412 void __iomem *ioaddr = lp->base;
415 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
417 /* see the header file for options in TCR/RCR DEFAULT */
419 SMC_SET_TCR(lp->tcr_cur_mode);
420 SMC_SET_RCR(lp->rcr_cur_mode);
423 SMC_SET_MAC_ADDR(dev->dev_addr);
425 /* now, enable interrupts */
426 mask = IM_EPH_INT|IM_RX_OVRN_INT|IM_RCV_INT;
427 if (lp->version >= (CHIP_91100 << 4))
430 SMC_SET_INT_MASK(mask);
433 * From this point the register bank must _NOT_ be switched away
434 * to something else than bank 2 without proper locking against
435 * races with any tasklet or interrupt handlers until smc_shutdown()
436 * or smc_reset() is called.
441 * this puts the device in an inactive state
443 static void smc_shutdown(struct net_device *dev)
445 struct smc_local *lp = netdev_priv(dev);
446 void __iomem *ioaddr = lp->base;
447 struct sk_buff *pending_skb;
449 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
451 /* no more interrupts for me */
452 spin_lock_irq(&lp->lock);
455 pending_skb = lp->pending_tx_skb;
456 lp->pending_tx_skb = NULL;
457 spin_unlock_irq(&lp->lock);
459 dev_kfree_skb(pending_skb);
461 /* and tell the card to stay away from that nasty outside world */
463 SMC_SET_RCR(RCR_CLEAR);
464 SMC_SET_TCR(TCR_CLEAR);
467 /* finally, shut the chip down */
469 SMC_SET_CONFIG(SMC_GET_CONFIG() & ~CONFIG_EPH_POWER_EN);
474 * This is the procedure to handle the receipt of a packet.
476 static inline void smc_rcv(struct net_device *dev)
478 struct smc_local *lp = netdev_priv(dev);
479 void __iomem *ioaddr = lp->base;
480 unsigned int packet_number, status, packet_len;
482 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
484 packet_number = SMC_GET_RXFIFO();
485 if (unlikely(packet_number & RXFIFO_REMPTY)) {
486 PRINTK("%s: smc_rcv with nothing on FIFO.\n", dev->name);
490 /* read from start of packet */
491 SMC_SET_PTR(PTR_READ | PTR_RCV | PTR_AUTOINC);
493 /* First two words are status and packet length */
494 SMC_GET_PKT_HDR(status, packet_len);
495 packet_len &= 0x07ff; /* mask off top bits */
496 DBG(2, "%s: RX PNR 0x%x STATUS 0x%04x LENGTH 0x%04x (%d)\n",
497 dev->name, packet_number, status,
498 packet_len, packet_len);
500 if (unlikely(packet_len == 0 && !(status & RS_ERRORS))) {
501 printk(KERN_ERR "%s: bad memory timings: rxlen %u status %x\n",
502 dev->name, packet_len, status);
503 status |= RS_TOOSHORT;
506 if (unlikely(packet_len < 6 || status & RS_ERRORS)) {
507 if (status & RS_TOOLONG && packet_len <= (1514 + 4 + 6)) {
508 /* accept VLAN packets */
509 status &= ~RS_TOOLONG;
512 if (packet_len < 6) {
513 /* bloody hardware */
514 printk(KERN_ERR "%s: fubar (rxlen %u status %x\n",
515 dev->name, packet_len, status);
516 status |= RS_TOOSHORT;
519 SMC_SET_MMU_CMD(MC_RELEASE);
520 lp->stats.rx_errors++;
521 if (status & RS_ALGNERR)
522 lp->stats.rx_frame_errors++;
523 if (status & (RS_TOOSHORT | RS_TOOLONG))
524 lp->stats.rx_length_errors++;
525 if (status & RS_BADCRC)
526 lp->stats.rx_crc_errors++;
530 unsigned int data_len;
532 /* set multicast stats */
533 if (status & RS_MULTICAST)
534 lp->stats.multicast++;
537 * Actual payload is packet_len - 6 (or 5 if odd byte).
538 * We want skb_reserve(2) and the final ctrl word
539 * (2 bytes, possibly containing the payload odd byte).
540 * Furthermore, we add 2 bytes to allow rounding up to
541 * multiple of 4 bytes on 32 bit buses.
542 * Hence packet_len - 6 + 2 + 2 + 2.
544 skb = dev_alloc_skb(packet_len);
545 if (unlikely(skb == NULL)) {
546 printk(KERN_NOTICE "%s: Low memory, packet dropped.\n",
549 SMC_SET_MMU_CMD(MC_RELEASE);
550 lp->stats.rx_dropped++;
554 /* Align IP header to 32 bits */
557 /* BUG: the LAN91C111 rev A never sets this bit. Force it. */
558 if (lp->version == 0x90)
559 status |= RS_ODDFRAME;
562 * If odd length: packet_len - 5,
563 * otherwise packet_len - 6.
564 * With the trailing ctrl byte it's packet_len - 4.
566 data_len = packet_len - ((status & RS_ODDFRAME) ? 5 : 6);
567 data = skb_put(skb, data_len);
568 SMC_PULL_DATA(data, packet_len - 4);
571 SMC_SET_MMU_CMD(MC_RELEASE);
573 PRINT_PKT(data, packet_len - 4);
575 dev->last_rx = jiffies;
576 skb->protocol = eth_type_trans(skb, dev);
578 lp->stats.rx_packets++;
579 lp->stats.rx_bytes += data_len;
585 * On SMP we have the following problem:
587 * A = smc_hardware_send_pkt()
588 * B = smc_hard_start_xmit()
589 * C = smc_interrupt()
591 * A and B can never be executed simultaneously. However, at least on UP,
592 * it is possible (and even desirable) for C to interrupt execution of
593 * A or B in order to have better RX reliability and avoid overruns.
594 * C, just like A and B, must have exclusive access to the chip and
595 * each of them must lock against any other concurrent access.
596 * Unfortunately this is not possible to have C suspend execution of A or
597 * B taking place on another CPU. On UP this is no an issue since A and B
598 * are run from softirq context and C from hard IRQ context, and there is
599 * no other CPU where concurrent access can happen.
600 * If ever there is a way to force at least B and C to always be executed
601 * on the same CPU then we could use read/write locks to protect against
602 * any other concurrent access and C would always interrupt B. But life
603 * isn't that easy in a SMP world...
605 #define smc_special_trylock(lock) \
608 local_irq_disable(); \
609 __ret = spin_trylock(lock); \
611 local_irq_enable(); \
614 #define smc_special_lock(lock) spin_lock_irq(lock)
615 #define smc_special_unlock(lock) spin_unlock_irq(lock)
617 #define smc_special_trylock(lock) (1)
618 #define smc_special_lock(lock) do { } while (0)
619 #define smc_special_unlock(lock) do { } while (0)
623 * This is called to actually send a packet to the chip.
625 static void smc_hardware_send_pkt(unsigned long data)
627 struct net_device *dev = (struct net_device *)data;
628 struct smc_local *lp = netdev_priv(dev);
629 void __iomem *ioaddr = lp->base;
631 unsigned int packet_no, len;
634 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
636 if (!smc_special_trylock(&lp->lock)) {
637 netif_stop_queue(dev);
638 tasklet_schedule(&lp->tx_task);
642 skb = lp->pending_tx_skb;
643 if (unlikely(!skb)) {
644 smc_special_unlock(&lp->lock);
647 lp->pending_tx_skb = NULL;
649 packet_no = SMC_GET_AR();
650 if (unlikely(packet_no & AR_FAILED)) {
651 printk("%s: Memory allocation failed.\n", dev->name);
652 lp->stats.tx_errors++;
653 lp->stats.tx_fifo_errors++;
654 smc_special_unlock(&lp->lock);
658 /* point to the beginning of the packet */
659 SMC_SET_PN(packet_no);
660 SMC_SET_PTR(PTR_AUTOINC);
664 DBG(2, "%s: TX PNR 0x%x LENGTH 0x%04x (%d) BUF 0x%p\n",
665 dev->name, packet_no, len, len, buf);
669 * Send the packet length (+6 for status words, length, and ctl.
670 * The card will pad to 64 bytes with zeroes if packet is too small.
672 SMC_PUT_PKT_HDR(0, len + 6);
674 /* send the actual data */
675 SMC_PUSH_DATA(buf, len & ~1);
677 /* Send final ctl word with the last byte if there is one */
678 SMC_outw(((len & 1) ? (0x2000 | buf[len-1]) : 0), ioaddr, DATA_REG);
681 * If THROTTLE_TX_PKTS is set, we stop the queue here. This will
682 * have the effect of having at most one packet queued for TX
683 * in the chip's memory at all time.
685 * If THROTTLE_TX_PKTS is not set then the queue is stopped only
686 * when memory allocation (MC_ALLOC) does not succeed right away.
688 if (THROTTLE_TX_PKTS)
689 netif_stop_queue(dev);
691 /* queue the packet for TX */
692 SMC_SET_MMU_CMD(MC_ENQUEUE);
693 smc_special_unlock(&lp->lock);
695 dev->trans_start = jiffies;
696 lp->stats.tx_packets++;
697 lp->stats.tx_bytes += len;
699 SMC_ENABLE_INT(IM_TX_INT | IM_TX_EMPTY_INT);
701 done: if (!THROTTLE_TX_PKTS)
702 netif_wake_queue(dev);
708 * Since I am not sure if I will have enough room in the chip's ram
709 * to store the packet, I call this routine which either sends it
710 * now, or set the card to generates an interrupt when ready
713 static int smc_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
715 struct smc_local *lp = netdev_priv(dev);
716 void __iomem *ioaddr = lp->base;
717 unsigned int numPages, poll_count, status;
719 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
721 BUG_ON(lp->pending_tx_skb != NULL);
724 * The MMU wants the number of pages to be the number of 256 bytes
725 * 'pages', minus 1 (since a packet can't ever have 0 pages :))
727 * The 91C111 ignores the size bits, but earlier models don't.
729 * Pkt size for allocating is data length +6 (for additional status
730 * words, length and ctl)
732 * If odd size then last byte is included in ctl word.
734 numPages = ((skb->len & ~1) + (6 - 1)) >> 8;
735 if (unlikely(numPages > 7)) {
736 printk("%s: Far too big packet error.\n", dev->name);
737 lp->stats.tx_errors++;
738 lp->stats.tx_dropped++;
743 smc_special_lock(&lp->lock);
745 /* now, try to allocate the memory */
746 SMC_SET_MMU_CMD(MC_ALLOC | numPages);
749 * Poll the chip for a short amount of time in case the
750 * allocation succeeds quickly.
752 poll_count = MEMORY_WAIT_TIME;
754 status = SMC_GET_INT();
755 if (status & IM_ALLOC_INT) {
756 SMC_ACK_INT(IM_ALLOC_INT);
759 } while (--poll_count);
761 smc_special_unlock(&lp->lock);
763 lp->pending_tx_skb = skb;
765 /* oh well, wait until the chip finds memory later */
766 netif_stop_queue(dev);
767 DBG(2, "%s: TX memory allocation deferred.\n", dev->name);
768 SMC_ENABLE_INT(IM_ALLOC_INT);
771 * Allocation succeeded: push packet to the chip's own memory
774 smc_hardware_send_pkt((unsigned long)dev);
781 * This handles a TX interrupt, which is only called when:
782 * - a TX error occurred, or
783 * - CTL_AUTO_RELEASE is not set and TX of a packet completed.
785 static void smc_tx(struct net_device *dev)
787 struct smc_local *lp = netdev_priv(dev);
788 void __iomem *ioaddr = lp->base;
789 unsigned int saved_packet, packet_no, tx_status, pkt_len;
791 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
793 /* If the TX FIFO is empty then nothing to do */
794 packet_no = SMC_GET_TXFIFO();
795 if (unlikely(packet_no & TXFIFO_TEMPTY)) {
796 PRINTK("%s: smc_tx with nothing on FIFO.\n", dev->name);
800 /* select packet to read from */
801 saved_packet = SMC_GET_PN();
802 SMC_SET_PN(packet_no);
804 /* read the first word (status word) from this packet */
805 SMC_SET_PTR(PTR_AUTOINC | PTR_READ);
806 SMC_GET_PKT_HDR(tx_status, pkt_len);
807 DBG(2, "%s: TX STATUS 0x%04x PNR 0x%02x\n",
808 dev->name, tx_status, packet_no);
810 if (!(tx_status & ES_TX_SUC))
811 lp->stats.tx_errors++;
813 if (tx_status & ES_LOSTCARR)
814 lp->stats.tx_carrier_errors++;
816 if (tx_status & (ES_LATCOL | ES_16COL)) {
817 PRINTK("%s: %s occurred on last xmit\n", dev->name,
818 (tx_status & ES_LATCOL) ?
819 "late collision" : "too many collisions");
820 lp->stats.tx_window_errors++;
821 if (!(lp->stats.tx_window_errors & 63) && net_ratelimit()) {
822 printk(KERN_INFO "%s: unexpectedly large number of "
823 "bad collisions. Please check duplex "
824 "setting.\n", dev->name);
828 /* kill the packet */
830 SMC_SET_MMU_CMD(MC_FREEPKT);
832 /* Don't restore Packet Number Reg until busy bit is cleared */
834 SMC_SET_PN(saved_packet);
836 /* re-enable transmit */
838 SMC_SET_TCR(lp->tcr_cur_mode);
843 /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
845 static void smc_mii_out(struct net_device *dev, unsigned int val, int bits)
847 struct smc_local *lp = netdev_priv(dev);
848 void __iomem *ioaddr = lp->base;
849 unsigned int mii_reg, mask;
851 mii_reg = SMC_GET_MII() & ~(MII_MCLK | MII_MDOE | MII_MDO);
854 for (mask = 1 << (bits - 1); mask; mask >>= 1) {
860 SMC_SET_MII(mii_reg);
862 SMC_SET_MII(mii_reg | MII_MCLK);
867 static unsigned int smc_mii_in(struct net_device *dev, int bits)
869 struct smc_local *lp = netdev_priv(dev);
870 void __iomem *ioaddr = lp->base;
871 unsigned int mii_reg, mask, val;
873 mii_reg = SMC_GET_MII() & ~(MII_MCLK | MII_MDOE | MII_MDO);
874 SMC_SET_MII(mii_reg);
876 for (mask = 1 << (bits - 1), val = 0; mask; mask >>= 1) {
877 if (SMC_GET_MII() & MII_MDI)
880 SMC_SET_MII(mii_reg);
882 SMC_SET_MII(mii_reg | MII_MCLK);
890 * Reads a register from the MII Management serial interface
892 static int smc_phy_read(struct net_device *dev, int phyaddr, int phyreg)
894 struct smc_local *lp = netdev_priv(dev);
895 void __iomem *ioaddr = lp->base;
896 unsigned int phydata;
901 smc_mii_out(dev, 0xffffffff, 32);
903 /* Start code (01) + read (10) + phyaddr + phyreg */
904 smc_mii_out(dev, 6 << 10 | phyaddr << 5 | phyreg, 14);
906 /* Turnaround (2bits) + phydata */
907 phydata = smc_mii_in(dev, 18);
909 /* Return to idle state */
910 SMC_SET_MII(SMC_GET_MII() & ~(MII_MCLK|MII_MDOE|MII_MDO));
912 DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
913 __FUNCTION__, phyaddr, phyreg, phydata);
920 * Writes a register to the MII Management serial interface
922 static void smc_phy_write(struct net_device *dev, int phyaddr, int phyreg,
925 struct smc_local *lp = netdev_priv(dev);
926 void __iomem *ioaddr = lp->base;
931 smc_mii_out(dev, 0xffffffff, 32);
933 /* Start code (01) + write (01) + phyaddr + phyreg + turnaround + phydata */
934 smc_mii_out(dev, 5 << 28 | phyaddr << 23 | phyreg << 18 | 2 << 16 | phydata, 32);
936 /* Return to idle state */
937 SMC_SET_MII(SMC_GET_MII() & ~(MII_MCLK|MII_MDOE|MII_MDO));
939 DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
940 __FUNCTION__, phyaddr, phyreg, phydata);
946 * Finds and reports the PHY address
948 static void smc_phy_detect(struct net_device *dev)
950 struct smc_local *lp = netdev_priv(dev);
953 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
958 * Scan all 32 PHY addresses if necessary, starting at
959 * PHY#1 to PHY#31, and then PHY#0 last.
961 for (phyaddr = 1; phyaddr < 33; ++phyaddr) {
962 unsigned int id1, id2;
964 /* Read the PHY identifiers */
965 id1 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID1);
966 id2 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID2);
968 DBG(3, "%s: phy_id1=0x%x, phy_id2=0x%x\n",
969 dev->name, id1, id2);
971 /* Make sure it is a valid identifier */
972 if (id1 != 0x0000 && id1 != 0xffff && id1 != 0x8000 &&
973 id2 != 0x0000 && id2 != 0xffff && id2 != 0x8000) {
974 /* Save the PHY's address */
975 lp->mii.phy_id = phyaddr & 31;
976 lp->phy_type = id1 << 16 | id2;
983 * Sets the PHY to a configuration as determined by the user
985 static int smc_phy_fixed(struct net_device *dev)
987 struct smc_local *lp = netdev_priv(dev);
988 void __iomem *ioaddr = lp->base;
989 int phyaddr = lp->mii.phy_id;
992 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
994 /* Enter Link Disable state */
995 cfg1 = smc_phy_read(dev, phyaddr, PHY_CFG1_REG);
996 cfg1 |= PHY_CFG1_LNKDIS;
997 smc_phy_write(dev, phyaddr, PHY_CFG1_REG, cfg1);
1000 * Set our fixed capabilities
1001 * Disable auto-negotiation
1005 if (lp->ctl_rfduplx)
1006 bmcr |= BMCR_FULLDPLX;
1008 if (lp->ctl_rspeed == 100)
1009 bmcr |= BMCR_SPEED100;
1011 /* Write our capabilities to the phy control register */
1012 smc_phy_write(dev, phyaddr, MII_BMCR, bmcr);
1014 /* Re-Configure the Receive/Phy Control register */
1016 SMC_SET_RPC(lp->rpc_cur_mode);
1023 * smc_phy_reset - reset the phy
1027 * Issue a software reset for the specified PHY and
1028 * wait up to 100ms for the reset to complete. We should
1029 * not access the PHY for 50ms after issuing the reset.
1031 * The time to wait appears to be dependent on the PHY.
1033 * Must be called with lp->lock locked.
1035 static int smc_phy_reset(struct net_device *dev, int phy)
1037 struct smc_local *lp = netdev_priv(dev);
1041 smc_phy_write(dev, phy, MII_BMCR, BMCR_RESET);
1043 for (timeout = 2; timeout; timeout--) {
1044 spin_unlock_irq(&lp->lock);
1046 spin_lock_irq(&lp->lock);
1048 bmcr = smc_phy_read(dev, phy, MII_BMCR);
1049 if (!(bmcr & BMCR_RESET))
1053 return bmcr & BMCR_RESET;
1057 * smc_phy_powerdown - powerdown phy
1060 * Power down the specified PHY
1062 static void smc_phy_powerdown(struct net_device *dev)
1064 struct smc_local *lp = netdev_priv(dev);
1066 int phy = lp->mii.phy_id;
1068 if (lp->phy_type == 0)
1071 /* We need to ensure that no calls to smc_phy_configure are
1074 flush_scheduled_work() cannot be called because we are
1075 running with the netlink semaphore held (from
1076 devinet_ioctl()) and the pending work queue contains
1077 linkwatch_event() (scheduled by netif_carrier_off()
1078 above). linkwatch_event() also wants the netlink semaphore.
1080 while(lp->work_pending)
1083 bmcr = smc_phy_read(dev, phy, MII_BMCR);
1084 smc_phy_write(dev, phy, MII_BMCR, bmcr | BMCR_PDOWN);
1088 * smc_phy_check_media - check the media status and adjust TCR
1090 * @init: set true for initialisation
1092 * Select duplex mode depending on negotiation state. This
1093 * also updates our carrier state.
1095 static void smc_phy_check_media(struct net_device *dev, int init)
1097 struct smc_local *lp = netdev_priv(dev);
1098 void __iomem *ioaddr = lp->base;
1100 if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
1101 /* duplex state has changed */
1102 if (lp->mii.full_duplex) {
1103 lp->tcr_cur_mode |= TCR_SWFDUP;
1105 lp->tcr_cur_mode &= ~TCR_SWFDUP;
1109 SMC_SET_TCR(lp->tcr_cur_mode);
1114 * Configures the specified PHY through the MII management interface
1115 * using Autonegotiation.
1116 * Calls smc_phy_fixed() if the user has requested a certain config.
1117 * If RPC ANEG bit is set, the media selection is dependent purely on
1118 * the selection by the MII (either in the MII BMCR reg or the result
1119 * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
1120 * is controlled by the RPC SPEED and RPC DPLX bits.
1122 static void smc_phy_configure(struct work_struct *work)
1124 struct smc_local *lp =
1125 container_of(work, struct smc_local, phy_configure);
1126 struct net_device *dev = lp->dev;
1127 void __iomem *ioaddr = lp->base;
1128 int phyaddr = lp->mii.phy_id;
1129 int my_phy_caps; /* My PHY capabilities */
1130 int my_ad_caps; /* My Advertised capabilities */
1133 DBG(3, "%s:smc_program_phy()\n", dev->name);
1135 spin_lock_irq(&lp->lock);
1138 * We should not be called if phy_type is zero.
1140 if (lp->phy_type == 0)
1141 goto smc_phy_configure_exit;
1143 if (smc_phy_reset(dev, phyaddr)) {
1144 printk("%s: PHY reset timed out\n", dev->name);
1145 goto smc_phy_configure_exit;
1149 * Enable PHY Interrupts (for register 18)
1150 * Interrupts listed here are disabled
1152 smc_phy_write(dev, phyaddr, PHY_MASK_REG,
1153 PHY_INT_LOSSSYNC | PHY_INT_CWRD | PHY_INT_SSD |
1154 PHY_INT_ESD | PHY_INT_RPOL | PHY_INT_JAB |
1155 PHY_INT_SPDDET | PHY_INT_DPLXDET);
1157 /* Configure the Receive/Phy Control register */
1159 SMC_SET_RPC(lp->rpc_cur_mode);
1161 /* If the user requested no auto neg, then go set his request */
1162 if (lp->mii.force_media) {
1164 goto smc_phy_configure_exit;
1167 /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
1168 my_phy_caps = smc_phy_read(dev, phyaddr, MII_BMSR);
1170 if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
1171 printk(KERN_INFO "Auto negotiation NOT supported\n");
1173 goto smc_phy_configure_exit;
1176 my_ad_caps = ADVERTISE_CSMA; /* I am CSMA capable */
1178 if (my_phy_caps & BMSR_100BASE4)
1179 my_ad_caps |= ADVERTISE_100BASE4;
1180 if (my_phy_caps & BMSR_100FULL)
1181 my_ad_caps |= ADVERTISE_100FULL;
1182 if (my_phy_caps & BMSR_100HALF)
1183 my_ad_caps |= ADVERTISE_100HALF;
1184 if (my_phy_caps & BMSR_10FULL)
1185 my_ad_caps |= ADVERTISE_10FULL;
1186 if (my_phy_caps & BMSR_10HALF)
1187 my_ad_caps |= ADVERTISE_10HALF;
1189 /* Disable capabilities not selected by our user */
1190 if (lp->ctl_rspeed != 100)
1191 my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
1193 if (!lp->ctl_rfduplx)
1194 my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
1196 /* Update our Auto-Neg Advertisement Register */
1197 smc_phy_write(dev, phyaddr, MII_ADVERTISE, my_ad_caps);
1198 lp->mii.advertising = my_ad_caps;
1201 * Read the register back. Without this, it appears that when
1202 * auto-negotiation is restarted, sometimes it isn't ready and
1203 * the link does not come up.
1205 status = smc_phy_read(dev, phyaddr, MII_ADVERTISE);
1207 DBG(2, "%s: phy caps=%x\n", dev->name, my_phy_caps);
1208 DBG(2, "%s: phy advertised caps=%x\n", dev->name, my_ad_caps);
1210 /* Restart auto-negotiation process in order to advertise my caps */
1211 smc_phy_write(dev, phyaddr, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART);
1213 smc_phy_check_media(dev, 1);
1215 smc_phy_configure_exit:
1217 spin_unlock_irq(&lp->lock);
1218 lp->work_pending = 0;
1224 * Purpose: Handle interrupts relating to PHY register 18. This is
1225 * called from the "hard" interrupt handler under our private spinlock.
1227 static void smc_phy_interrupt(struct net_device *dev)
1229 struct smc_local *lp = netdev_priv(dev);
1230 int phyaddr = lp->mii.phy_id;
1233 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1235 if (lp->phy_type == 0)
1239 smc_phy_check_media(dev, 0);
1241 /* Read PHY Register 18, Status Output */
1242 phy18 = smc_phy_read(dev, phyaddr, PHY_INT_REG);
1243 if ((phy18 & PHY_INT_INT) == 0)
1248 /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
1250 static void smc_10bt_check_media(struct net_device *dev, int init)
1252 struct smc_local *lp = netdev_priv(dev);
1253 void __iomem *ioaddr = lp->base;
1254 unsigned int old_carrier, new_carrier;
1256 old_carrier = netif_carrier_ok(dev) ? 1 : 0;
1259 new_carrier = (SMC_GET_EPH_STATUS() & ES_LINK_OK) ? 1 : 0;
1262 if (init || (old_carrier != new_carrier)) {
1264 netif_carrier_off(dev);
1266 netif_carrier_on(dev);
1268 if (netif_msg_link(lp))
1269 printk(KERN_INFO "%s: link %s\n", dev->name,
1270 new_carrier ? "up" : "down");
1274 static void smc_eph_interrupt(struct net_device *dev)
1276 struct smc_local *lp = netdev_priv(dev);
1277 void __iomem *ioaddr = lp->base;
1280 smc_10bt_check_media(dev, 0);
1283 ctl = SMC_GET_CTL();
1284 SMC_SET_CTL(ctl & ~CTL_LE_ENABLE);
1290 * This is the main routine of the driver, to handle the device when
1291 * it needs some attention.
1293 static irqreturn_t smc_interrupt(int irq, void *dev_id)
1295 struct net_device *dev = dev_id;
1296 struct smc_local *lp = netdev_priv(dev);
1297 void __iomem *ioaddr = lp->base;
1298 int status, mask, timeout, card_stats;
1301 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
1303 spin_lock(&lp->lock);
1305 /* A preamble may be used when there is a potential race
1306 * between the interruptible transmit functions and this
1308 SMC_INTERRUPT_PREAMBLE;
1310 saved_pointer = SMC_GET_PTR();
1311 mask = SMC_GET_INT_MASK();
1312 SMC_SET_INT_MASK(0);
1314 /* set a timeout value, so I don't stay here forever */
1315 timeout = MAX_IRQ_LOOPS;
1318 status = SMC_GET_INT();
1320 DBG(2, "%s: INT 0x%02x MASK 0x%02x MEM 0x%04x FIFO 0x%04x\n",
1321 dev->name, status, mask,
1322 ({ int meminfo; SMC_SELECT_BANK(0);
1323 meminfo = SMC_GET_MIR();
1324 SMC_SELECT_BANK(2); meminfo; }),
1331 if (status & IM_TX_INT) {
1332 /* do this before RX as it will free memory quickly */
1333 DBG(3, "%s: TX int\n", dev->name);
1335 SMC_ACK_INT(IM_TX_INT);
1336 if (THROTTLE_TX_PKTS)
1337 netif_wake_queue(dev);
1338 } else if (status & IM_RCV_INT) {
1339 DBG(3, "%s: RX irq\n", dev->name);
1341 } else if (status & IM_ALLOC_INT) {
1342 DBG(3, "%s: Allocation irq\n", dev->name);
1343 tasklet_hi_schedule(&lp->tx_task);
1344 mask &= ~IM_ALLOC_INT;
1345 } else if (status & IM_TX_EMPTY_INT) {
1346 DBG(3, "%s: TX empty\n", dev->name);
1347 mask &= ~IM_TX_EMPTY_INT;
1351 card_stats = SMC_GET_COUNTER();
1354 /* single collisions */
1355 lp->stats.collisions += card_stats & 0xF;
1358 /* multiple collisions */
1359 lp->stats.collisions += card_stats & 0xF;
1360 } else if (status & IM_RX_OVRN_INT) {
1361 DBG(1, "%s: RX overrun (EPH_ST 0x%04x)\n", dev->name,
1362 ({ int eph_st; SMC_SELECT_BANK(0);
1363 eph_st = SMC_GET_EPH_STATUS();
1364 SMC_SELECT_BANK(2); eph_st; }) );
1365 SMC_ACK_INT(IM_RX_OVRN_INT);
1366 lp->stats.rx_errors++;
1367 lp->stats.rx_fifo_errors++;
1368 } else if (status & IM_EPH_INT) {
1369 smc_eph_interrupt(dev);
1370 } else if (status & IM_MDINT) {
1371 SMC_ACK_INT(IM_MDINT);
1372 smc_phy_interrupt(dev);
1373 } else if (status & IM_ERCV_INT) {
1374 SMC_ACK_INT(IM_ERCV_INT);
1375 PRINTK("%s: UNSUPPORTED: ERCV INTERRUPT \n", dev->name);
1377 } while (--timeout);
1379 /* restore register states */
1380 SMC_SET_PTR(saved_pointer);
1381 SMC_SET_INT_MASK(mask);
1382 spin_unlock(&lp->lock);
1384 if (timeout == MAX_IRQ_LOOPS)
1385 PRINTK("%s: spurious interrupt (mask = 0x%02x)\n",
1387 DBG(3, "%s: Interrupt done (%d loops)\n",
1388 dev->name, MAX_IRQ_LOOPS - timeout);
1391 * We return IRQ_HANDLED unconditionally here even if there was
1392 * nothing to do. There is a possibility that a packet might
1393 * get enqueued into the chip right after TX_EMPTY_INT is raised
1394 * but just before the CPU acknowledges the IRQ.
1395 * Better take an unneeded IRQ in some occasions than complexifying
1396 * the code for all cases.
1401 #ifdef CONFIG_NET_POLL_CONTROLLER
1403 * Polling receive - used by netconsole and other diagnostic tools
1404 * to allow network i/o with interrupts disabled.
1406 static void smc_poll_controller(struct net_device *dev)
1408 disable_irq(dev->irq);
1409 smc_interrupt(dev->irq, dev);
1410 enable_irq(dev->irq);
1414 /* Our watchdog timed out. Called by the networking layer */
1415 static void smc_timeout(struct net_device *dev)
1417 struct smc_local *lp = netdev_priv(dev);
1418 void __iomem *ioaddr = lp->base;
1419 int status, mask, eph_st, meminfo, fifo;
1421 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1423 spin_lock_irq(&lp->lock);
1424 status = SMC_GET_INT();
1425 mask = SMC_GET_INT_MASK();
1426 fifo = SMC_GET_FIFO();
1428 eph_st = SMC_GET_EPH_STATUS();
1429 meminfo = SMC_GET_MIR();
1431 spin_unlock_irq(&lp->lock);
1432 PRINTK( "%s: TX timeout (INT 0x%02x INTMASK 0x%02x "
1433 "MEM 0x%04x FIFO 0x%04x EPH_ST 0x%04x)\n",
1434 dev->name, status, mask, meminfo, fifo, eph_st );
1440 * Reconfiguring the PHY doesn't seem like a bad idea here, but
1441 * smc_phy_configure() calls msleep() which calls schedule_timeout()
1442 * which calls schedule(). Hence we use a work queue.
1444 if (lp->phy_type != 0) {
1445 if (schedule_work(&lp->phy_configure)) {
1446 lp->work_pending = 1;
1450 /* We can accept TX packets again */
1451 dev->trans_start = jiffies;
1452 netif_wake_queue(dev);
1456 * This routine will, depending on the values passed to it,
1457 * either make it accept multicast packets, go into
1458 * promiscuous mode (for TCPDUMP and cousins) or accept
1459 * a select set of multicast packets
1461 static void smc_set_multicast_list(struct net_device *dev)
1463 struct smc_local *lp = netdev_priv(dev);
1464 void __iomem *ioaddr = lp->base;
1465 unsigned char multicast_table[8];
1466 int update_multicast = 0;
1468 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1470 if (dev->flags & IFF_PROMISC) {
1471 DBG(2, "%s: RCR_PRMS\n", dev->name);
1472 lp->rcr_cur_mode |= RCR_PRMS;
1475 /* BUG? I never disable promiscuous mode if multicasting was turned on.
1476 Now, I turn off promiscuous mode, but I don't do anything to multicasting
1477 when promiscuous mode is turned on.
1481 * Here, I am setting this to accept all multicast packets.
1482 * I don't need to zero the multicast table, because the flag is
1483 * checked before the table is
1485 else if (dev->flags & IFF_ALLMULTI || dev->mc_count > 16) {
1486 DBG(2, "%s: RCR_ALMUL\n", dev->name);
1487 lp->rcr_cur_mode |= RCR_ALMUL;
1491 * This sets the internal hardware table to filter out unwanted
1492 * multicast packets before they take up memory.
1494 * The SMC chip uses a hash table where the high 6 bits of the CRC of
1495 * address are the offset into the table. If that bit is 1, then the
1496 * multicast packet is accepted. Otherwise, it's dropped silently.
1498 * To use the 6 bits as an offset into the table, the high 3 bits are
1499 * the number of the 8 bit register, while the low 3 bits are the bit
1500 * within that register.
1502 else if (dev->mc_count) {
1504 struct dev_mc_list *cur_addr;
1506 /* table for flipping the order of 3 bits */
1507 static const unsigned char invert3[] = {0, 4, 2, 6, 1, 5, 3, 7};
1509 /* start with a table of all zeros: reject all */
1510 memset(multicast_table, 0, sizeof(multicast_table));
1512 cur_addr = dev->mc_list;
1513 for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
1516 /* do we have a pointer here? */
1519 /* make sure this is a multicast address -
1520 shouldn't this be a given if we have it here ? */
1521 if (!(*cur_addr->dmi_addr & 1))
1524 /* only use the low order bits */
1525 position = crc32_le(~0, cur_addr->dmi_addr, 6) & 0x3f;
1527 /* do some messy swapping to put the bit in the right spot */
1528 multicast_table[invert3[position&7]] |=
1529 (1<<invert3[(position>>3)&7]);
1532 /* be sure I get rid of flags I might have set */
1533 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1535 /* now, the table can be loaded into the chipset */
1536 update_multicast = 1;
1538 DBG(2, "%s: ~(RCR_PRMS|RCR_ALMUL)\n", dev->name);
1539 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1542 * since I'm disabling all multicast entirely, I need to
1543 * clear the multicast list
1545 memset(multicast_table, 0, sizeof(multicast_table));
1546 update_multicast = 1;
1549 spin_lock_irq(&lp->lock);
1551 SMC_SET_RCR(lp->rcr_cur_mode);
1552 if (update_multicast) {
1554 SMC_SET_MCAST(multicast_table);
1557 spin_unlock_irq(&lp->lock);
1562 * Open and Initialize the board
1564 * Set up everything, reset the card, etc..
1567 smc_open(struct net_device *dev)
1569 struct smc_local *lp = netdev_priv(dev);
1571 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1574 * Check that the address is valid. If its not, refuse
1575 * to bring the device up. The user must specify an
1576 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
1578 if (!is_valid_ether_addr(dev->dev_addr)) {
1579 PRINTK("%s: no valid ethernet hw addr\n", __FUNCTION__);
1583 /* Setup the default Register Modes */
1584 lp->tcr_cur_mode = TCR_DEFAULT;
1585 lp->rcr_cur_mode = RCR_DEFAULT;
1586 lp->rpc_cur_mode = RPC_DEFAULT;
1589 * If we are not using a MII interface, we need to
1590 * monitor our own carrier signal to detect faults.
1592 if (lp->phy_type == 0)
1593 lp->tcr_cur_mode |= TCR_MON_CSN;
1595 /* reset the hardware */
1599 /* Configure the PHY, initialize the link state */
1600 if (lp->phy_type != 0)
1601 smc_phy_configure(&lp->phy_configure);
1603 spin_lock_irq(&lp->lock);
1604 smc_10bt_check_media(dev, 1);
1605 spin_unlock_irq(&lp->lock);
1608 netif_start_queue(dev);
1615 * this makes the board clean up everything that it can
1616 * and not talk to the outside world. Caused by
1617 * an 'ifconfig ethX down'
1619 static int smc_close(struct net_device *dev)
1621 struct smc_local *lp = netdev_priv(dev);
1623 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1625 netif_stop_queue(dev);
1626 netif_carrier_off(dev);
1628 /* clear everything */
1630 tasklet_kill(&lp->tx_task);
1631 smc_phy_powerdown(dev);
1636 * Get the current statistics.
1637 * This may be called with the card open or closed.
1639 static struct net_device_stats *smc_query_statistics(struct net_device *dev)
1641 struct smc_local *lp = netdev_priv(dev);
1643 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1652 smc_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1654 struct smc_local *lp = netdev_priv(dev);
1660 if (lp->phy_type != 0) {
1661 spin_lock_irq(&lp->lock);
1662 ret = mii_ethtool_gset(&lp->mii, cmd);
1663 spin_unlock_irq(&lp->lock);
1665 cmd->supported = SUPPORTED_10baseT_Half |
1666 SUPPORTED_10baseT_Full |
1667 SUPPORTED_TP | SUPPORTED_AUI;
1669 if (lp->ctl_rspeed == 10)
1670 cmd->speed = SPEED_10;
1671 else if (lp->ctl_rspeed == 100)
1672 cmd->speed = SPEED_100;
1674 cmd->autoneg = AUTONEG_DISABLE;
1675 cmd->transceiver = XCVR_INTERNAL;
1677 cmd->duplex = lp->tcr_cur_mode & TCR_SWFDUP ? DUPLEX_FULL : DUPLEX_HALF;
1686 smc_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1688 struct smc_local *lp = netdev_priv(dev);
1691 if (lp->phy_type != 0) {
1692 spin_lock_irq(&lp->lock);
1693 ret = mii_ethtool_sset(&lp->mii, cmd);
1694 spin_unlock_irq(&lp->lock);
1696 if (cmd->autoneg != AUTONEG_DISABLE ||
1697 cmd->speed != SPEED_10 ||
1698 (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
1699 (cmd->port != PORT_TP && cmd->port != PORT_AUI))
1702 // lp->port = cmd->port;
1703 lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
1705 // if (netif_running(dev))
1706 // smc_set_port(dev);
1715 smc_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1717 strncpy(info->driver, CARDNAME, sizeof(info->driver));
1718 strncpy(info->version, version, sizeof(info->version));
1719 strncpy(info->bus_info, dev->dev.parent->bus_id, sizeof(info->bus_info));
1722 static int smc_ethtool_nwayreset(struct net_device *dev)
1724 struct smc_local *lp = netdev_priv(dev);
1727 if (lp->phy_type != 0) {
1728 spin_lock_irq(&lp->lock);
1729 ret = mii_nway_restart(&lp->mii);
1730 spin_unlock_irq(&lp->lock);
1736 static u32 smc_ethtool_getmsglevel(struct net_device *dev)
1738 struct smc_local *lp = netdev_priv(dev);
1739 return lp->msg_enable;
1742 static void smc_ethtool_setmsglevel(struct net_device *dev, u32 level)
1744 struct smc_local *lp = netdev_priv(dev);
1745 lp->msg_enable = level;
1748 static const struct ethtool_ops smc_ethtool_ops = {
1749 .get_settings = smc_ethtool_getsettings,
1750 .set_settings = smc_ethtool_setsettings,
1751 .get_drvinfo = smc_ethtool_getdrvinfo,
1753 .get_msglevel = smc_ethtool_getmsglevel,
1754 .set_msglevel = smc_ethtool_setmsglevel,
1755 .nway_reset = smc_ethtool_nwayreset,
1756 .get_link = ethtool_op_get_link,
1757 // .get_eeprom = smc_ethtool_geteeprom,
1758 // .set_eeprom = smc_ethtool_seteeprom,
1764 * This routine has a simple purpose -- make the SMC chip generate an
1765 * interrupt, so an auto-detect routine can detect it, and find the IRQ,
1768 * does this still work?
1770 * I just deleted auto_irq.c, since it was never built...
1773 static int __init smc_findirq(void __iomem *ioaddr)
1776 unsigned long cookie;
1778 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
1780 cookie = probe_irq_on();
1783 * What I try to do here is trigger an ALLOC_INT. This is done
1784 * by allocating a small chunk of memory, which will give an interrupt
1787 /* enable ALLOCation interrupts ONLY */
1789 SMC_SET_INT_MASK(IM_ALLOC_INT);
1792 * Allocate 512 bytes of memory. Note that the chip was just
1793 * reset so all the memory is available
1795 SMC_SET_MMU_CMD(MC_ALLOC | 1);
1798 * Wait until positive that the interrupt has been generated
1803 int_status = SMC_GET_INT();
1804 if (int_status & IM_ALLOC_INT)
1805 break; /* got the interrupt */
1806 } while (--timeout);
1809 * there is really nothing that I can do here if timeout fails,
1810 * as autoirq_report will return a 0 anyway, which is what I
1811 * want in this case. Plus, the clean up is needed in both
1815 /* and disable all interrupts again */
1816 SMC_SET_INT_MASK(0);
1818 /* and return what I found */
1819 return probe_irq_off(cookie);
1823 * Function: smc_probe(unsigned long ioaddr)
1826 * Tests to see if a given ioaddr points to an SMC91x chip.
1827 * Returns a 0 on success
1830 * (1) see if the high byte of BANK_SELECT is 0x33
1831 * (2) compare the ioaddr with the base register's address
1832 * (3) see if I recognize the chip ID in the appropriate register
1834 * Here I do typical initialization tasks.
1836 * o Initialize the structure if needed
1837 * o print out my vanity message if not done so already
1838 * o print out what type of hardware is detected
1839 * o print out the ethernet address
1841 * o set up my private data
1842 * o configure the dev structure with my subroutines
1843 * o actually GRAB the irq.
1846 static int __init smc_probe(struct net_device *dev, void __iomem *ioaddr)
1848 struct smc_local *lp = netdev_priv(dev);
1849 static int version_printed = 0;
1851 unsigned int val, revision_register;
1852 const char *version_string;
1854 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
1856 /* First, see if the high byte is 0x33 */
1857 val = SMC_CURRENT_BANK();
1858 DBG(2, "%s: bank signature probe returned 0x%04x\n", CARDNAME, val);
1859 if ((val & 0xFF00) != 0x3300) {
1860 if ((val & 0xFF) == 0x33) {
1862 "%s: Detected possible byte-swapped interface"
1863 " at IOADDR %p\n", CARDNAME, ioaddr);
1870 * The above MIGHT indicate a device, but I need to write to
1871 * further test this.
1874 val = SMC_CURRENT_BANK();
1875 if ((val & 0xFF00) != 0x3300) {
1881 * well, we've already written once, so hopefully another
1882 * time won't hurt. This time, I need to switch the bank
1883 * register to bank 1, so I can access the base address
1887 val = SMC_GET_BASE();
1888 val = ((val & 0x1F00) >> 3) << SMC_IO_SHIFT;
1889 if (((unsigned int)ioaddr & (0x3e0 << SMC_IO_SHIFT)) != val) {
1890 printk("%s: IOADDR %p doesn't match configuration (%x).\n",
1891 CARDNAME, ioaddr, val);
1895 * check if the revision register is something that I
1896 * recognize. These might need to be added to later,
1897 * as future revisions could be added.
1900 revision_register = SMC_GET_REV();
1901 DBG(2, "%s: revision = 0x%04x\n", CARDNAME, revision_register);
1902 version_string = chip_ids[ (revision_register >> 4) & 0xF];
1903 if (!version_string || (revision_register & 0xff00) != 0x3300) {
1904 /* I don't recognize this chip, so... */
1905 printk("%s: IO %p: Unrecognized revision register 0x%04x"
1906 ", Contact author.\n", CARDNAME,
1907 ioaddr, revision_register);
1913 /* At this point I'll assume that the chip is an SMC91x. */
1914 if (version_printed++ == 0)
1915 printk("%s", version);
1917 /* fill in some of the fields */
1918 dev->base_addr = (unsigned long)ioaddr;
1920 lp->version = revision_register & 0xff;
1921 spin_lock_init(&lp->lock);
1923 /* Get the MAC address */
1925 SMC_GET_MAC_ADDR(dev->dev_addr);
1927 /* now, reset the chip, and put it into a known state */
1931 * If dev->irq is 0, then the device has to be banged on to see
1934 * This banging doesn't always detect the IRQ, for unknown reasons.
1935 * a workaround is to reset the chip and try again.
1937 * Interestingly, the DOS packet driver *SETS* the IRQ on the card to
1938 * be what is requested on the command line. I don't do that, mostly
1939 * because the card that I have uses a non-standard method of accessing
1940 * the IRQs, and because this _should_ work in most configurations.
1942 * Specifying an IRQ is done with the assumption that the user knows
1943 * what (s)he is doing. No checking is done!!!!
1950 dev->irq = smc_findirq(ioaddr);
1953 /* kick the card and try again */
1957 if (dev->irq == 0) {
1958 printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n",
1963 dev->irq = irq_canonicalize(dev->irq);
1965 /* Fill in the fields of the device structure with ethernet values. */
1968 dev->open = smc_open;
1969 dev->stop = smc_close;
1970 dev->hard_start_xmit = smc_hard_start_xmit;
1971 dev->tx_timeout = smc_timeout;
1972 dev->watchdog_timeo = msecs_to_jiffies(watchdog);
1973 dev->get_stats = smc_query_statistics;
1974 dev->set_multicast_list = smc_set_multicast_list;
1975 dev->ethtool_ops = &smc_ethtool_ops;
1976 #ifdef CONFIG_NET_POLL_CONTROLLER
1977 dev->poll_controller = smc_poll_controller;
1980 tasklet_init(&lp->tx_task, smc_hardware_send_pkt, (unsigned long)dev);
1981 INIT_WORK(&lp->phy_configure, smc_phy_configure);
1983 lp->mii.phy_id_mask = 0x1f;
1984 lp->mii.reg_num_mask = 0x1f;
1985 lp->mii.force_media = 0;
1986 lp->mii.full_duplex = 0;
1988 lp->mii.mdio_read = smc_phy_read;
1989 lp->mii.mdio_write = smc_phy_write;
1992 * Locate the phy, if any.
1994 if (lp->version >= (CHIP_91100 << 4))
1995 smc_phy_detect(dev);
1997 /* then shut everything down to save power */
1999 smc_phy_powerdown(dev);
2001 /* Set default parameters */
2002 lp->msg_enable = NETIF_MSG_LINK;
2003 lp->ctl_rfduplx = 0;
2004 lp->ctl_rspeed = 10;
2006 if (lp->version >= (CHIP_91100 << 4)) {
2007 lp->ctl_rfduplx = 1;
2008 lp->ctl_rspeed = 100;
2012 retval = request_irq(dev->irq, &smc_interrupt, SMC_IRQ_FLAGS, dev->name, dev);
2016 #ifdef SMC_USE_PXA_DMA
2018 int dma = pxa_request_dma(dev->name, DMA_PRIO_LOW,
2019 smc_pxa_dma_irq, NULL);
2025 retval = register_netdev(dev);
2027 /* now, print out the card info, in a short format.. */
2028 printk("%s: %s (rev %d) at %p IRQ %d",
2029 dev->name, version_string, revision_register & 0x0f,
2030 lp->base, dev->irq);
2032 if (dev->dma != (unsigned char)-1)
2033 printk(" DMA %d", dev->dma);
2035 printk("%s%s\n", nowait ? " [nowait]" : "",
2036 THROTTLE_TX_PKTS ? " [throttle_tx]" : "");
2038 if (!is_valid_ether_addr(dev->dev_addr)) {
2039 printk("%s: Invalid ethernet MAC address. Please "
2040 "set using ifconfig\n", dev->name);
2042 /* Print the Ethernet address */
2043 printk("%s: Ethernet addr: ", dev->name);
2044 for (i = 0; i < 5; i++)
2045 printk("%2.2x:", dev->dev_addr[i]);
2046 printk("%2.2x\n", dev->dev_addr[5]);
2049 if (lp->phy_type == 0) {
2050 PRINTK("%s: No PHY found\n", dev->name);
2051 } else if ((lp->phy_type & 0xfffffff0) == 0x0016f840) {
2052 PRINTK("%s: PHY LAN83C183 (LAN91C111 Internal)\n", dev->name);
2053 } else if ((lp->phy_type & 0xfffffff0) == 0x02821c50) {
2054 PRINTK("%s: PHY LAN83C180\n", dev->name);
2059 #ifdef SMC_USE_PXA_DMA
2060 if (retval && dev->dma != (unsigned char)-1)
2061 pxa_free_dma(dev->dma);
2066 static int smc_enable_device(struct platform_device *pdev)
2068 unsigned long flags;
2069 unsigned char ecor, ecsr;
2071 struct resource * res;
2073 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2078 * Map the attribute space. This is overkill, but clean.
2080 addr = ioremap(res->start, ATTRIB_SIZE);
2085 * Reset the device. We must disable IRQs around this
2086 * since a reset causes the IRQ line become active.
2088 local_irq_save(flags);
2089 ecor = readb(addr + (ECOR << SMC_IO_SHIFT)) & ~ECOR_RESET;
2090 writeb(ecor | ECOR_RESET, addr + (ECOR << SMC_IO_SHIFT));
2091 readb(addr + (ECOR << SMC_IO_SHIFT));
2094 * Wait 100us for the chip to reset.
2099 * The device will ignore all writes to the enable bit while
2100 * reset is asserted, even if the reset bit is cleared in the
2101 * same write. Must clear reset first, then enable the device.
2103 writeb(ecor, addr + (ECOR << SMC_IO_SHIFT));
2104 writeb(ecor | ECOR_ENABLE, addr + (ECOR << SMC_IO_SHIFT));
2107 * Set the appropriate byte/word mode.
2109 ecsr = readb(addr + (ECSR << SMC_IO_SHIFT)) & ~ECSR_IOIS8;
2110 if (!SMC_CAN_USE_16BIT)
2112 writeb(ecsr, addr + (ECSR << SMC_IO_SHIFT));
2113 local_irq_restore(flags);
2118 * Wait for the chip to wake up. We could poll the control
2119 * register in the main register space, but that isn't mapped
2120 * yet. We know this is going to take 750us.
2127 static int smc_request_attrib(struct platform_device *pdev)
2129 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2134 if (!request_mem_region(res->start, ATTRIB_SIZE, CARDNAME))
2140 static void smc_release_attrib(struct platform_device *pdev)
2142 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2145 release_mem_region(res->start, ATTRIB_SIZE);
2148 static inline void smc_request_datacs(struct platform_device *pdev, struct net_device *ndev)
2150 if (SMC_CAN_USE_DATACS) {
2151 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-data32");
2152 struct smc_local *lp = netdev_priv(ndev);
2157 if(!request_mem_region(res->start, SMC_DATA_EXTENT, CARDNAME)) {
2158 printk(KERN_INFO "%s: failed to request datacs memory region.\n", CARDNAME);
2162 lp->datacs = ioremap(res->start, SMC_DATA_EXTENT);
2166 static void smc_release_datacs(struct platform_device *pdev, struct net_device *ndev)
2168 if (SMC_CAN_USE_DATACS) {
2169 struct smc_local *lp = netdev_priv(ndev);
2170 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-data32");
2173 iounmap(lp->datacs);
2178 release_mem_region(res->start, SMC_DATA_EXTENT);
2185 * dev->base_addr == 0, try to find all possible locations
2186 * dev->base_addr > 0x1ff, this is the address to check
2187 * dev->base_addr == <anything else>, return failure code
2190 * 0 --> there is a device
2191 * anything else, error
2193 static int smc_drv_probe(struct platform_device *pdev)
2195 struct net_device *ndev;
2196 struct resource *res;
2197 unsigned int __iomem *addr;
2200 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
2202 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2209 if (!request_mem_region(res->start, SMC_IO_EXTENT, CARDNAME)) {
2214 ndev = alloc_etherdev(sizeof(struct smc_local));
2216 printk("%s: could not allocate device.\n", CARDNAME);
2218 goto out_release_io;
2220 SET_MODULE_OWNER(ndev);
2221 SET_NETDEV_DEV(ndev, &pdev->dev);
2223 ndev->dma = (unsigned char)-1;
2224 ndev->irq = platform_get_irq(pdev, 0);
2225 if (ndev->irq < 0) {
2227 goto out_free_netdev;
2230 ret = smc_request_attrib(pdev);
2232 goto out_free_netdev;
2233 #if defined(CONFIG_SA1100_ASSABET)
2234 NCR_0 |= NCR_ENET_OSC_EN;
2236 ret = smc_enable_device(pdev);
2238 goto out_release_attrib;
2240 addr = ioremap(res->start, SMC_IO_EXTENT);
2243 goto out_release_attrib;
2246 platform_set_drvdata(pdev, ndev);
2247 ret = smc_probe(ndev, addr);
2250 #ifdef SMC_USE_PXA_DMA
2252 struct smc_local *lp = netdev_priv(ndev);
2253 lp->physaddr = res->start;
2257 smc_request_datacs(pdev, ndev);
2262 platform_set_drvdata(pdev, NULL);
2265 smc_release_attrib(pdev);
2269 release_mem_region(res->start, SMC_IO_EXTENT);
2271 printk("%s: not found (%d).\n", CARDNAME, ret);
2276 static int smc_drv_remove(struct platform_device *pdev)
2278 struct net_device *ndev = platform_get_drvdata(pdev);
2279 struct smc_local *lp = netdev_priv(ndev);
2280 struct resource *res;
2282 platform_set_drvdata(pdev, NULL);
2284 unregister_netdev(ndev);
2286 free_irq(ndev->irq, ndev);
2288 #ifdef SMC_USE_PXA_DMA
2289 if (ndev->dma != (unsigned char)-1)
2290 pxa_free_dma(ndev->dma);
2294 smc_release_datacs(pdev,ndev);
2295 smc_release_attrib(pdev);
2297 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
2299 platform_get_resource(pdev, IORESOURCE_MEM, 0);
2300 release_mem_region(res->start, SMC_IO_EXTENT);
2307 static int smc_drv_suspend(struct platform_device *dev, pm_message_t state)
2309 struct net_device *ndev = platform_get_drvdata(dev);
2312 if (netif_running(ndev)) {
2313 netif_device_detach(ndev);
2315 smc_phy_powerdown(ndev);
2321 static int smc_drv_resume(struct platform_device *dev)
2323 struct net_device *ndev = platform_get_drvdata(dev);
2326 struct smc_local *lp = netdev_priv(ndev);
2327 smc_enable_device(dev);
2328 if (netif_running(ndev)) {
2331 if (lp->phy_type != 0)
2332 smc_phy_configure(&lp->phy_configure);
2333 netif_device_attach(ndev);
2339 static struct platform_driver smc_driver = {
2340 .probe = smc_drv_probe,
2341 .remove = smc_drv_remove,
2342 .suspend = smc_drv_suspend,
2343 .resume = smc_drv_resume,
2349 static int __init smc_init(void)
2355 "%s: You shouldn't use auto-probing with insmod!\n",
2360 return platform_driver_register(&smc_driver);
2363 static void __exit smc_cleanup(void)
2365 platform_driver_unregister(&smc_driver);
2368 module_init(smc_init);
2369 module_exit(smc_cleanup);