drivers/net/wireless/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 /* mac80211 and PCI callbacks */
  18
  19 #include <linux/nl80211.h>
  20 #include "core.h"
  21
  22 #define ATH_PCI_VERSION "0.1"
  23
  24 static char *dev_info = "ath9k";
  25
  26 MODULE_AUTHOR("Atheros Communications");
  27 MODULE_DESCRIPTION("Support for Atheros 802.11n wireless LAN cards.");
  28 MODULE_SUPPORTED_DEVICE("Atheros 802.11n WLAN cards");
  29 MODULE_LICENSE("Dual BSD/GPL");
  30
  31 static struct pci_device_id ath_pci_id_table[] __devinitdata = {
  32         { PCI_VDEVICE(ATHEROS, 0x0023) }, /* PCI   */
  33         { PCI_VDEVICE(ATHEROS, 0x0024) }, /* PCI-E */
  34         { PCI_VDEVICE(ATHEROS, 0x0027) }, /* PCI   */
  35         { PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI   */
  36         { PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */
  37         { 0 }
  38 };
  39
  40 static int ath_get_channel(struct ath_softc *sc,
  41                            struct ieee80211_channel *chan)
  42 {
  43         int i;
  44
  45         for (i = 0; i < sc->sc_ah->ah_nchan; i++) {
  46                 if (sc->sc_ah->ah_channels[i].channel == chan->center_freq)
  47                         return i;
  48         }
  49
  50         return -1;
  51 }
  52
  53 static u32 ath_get_extchanmode(struct ath_softc *sc,
  54                                      struct ieee80211_channel *chan)
  55 {
  56         u32 chanmode = 0;
  57         u8 ext_chan_offset = sc->sc_ht_info.ext_chan_offset;
  58         enum ath9k_ht_macmode tx_chan_width = sc->sc_ht_info.tx_chan_width;
  59
  60         switch (chan->band) {
  61         case IEEE80211_BAND_2GHZ:
  62                 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_NONE) &&
  63                     (tx_chan_width == ATH9K_HT_MACMODE_20))
  64                         chanmode = CHANNEL_G_HT20;
  65                 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE) &&
  66                     (tx_chan_width == ATH9K_HT_MACMODE_2040))
  67                         chanmode = CHANNEL_G_HT40PLUS;
  68                 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW) &&
  69                     (tx_chan_width == ATH9K_HT_MACMODE_2040))
  70                         chanmode = CHANNEL_G_HT40MINUS;
  71                 break;
  72         case IEEE80211_BAND_5GHZ:
  73                 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_NONE) &&
  74                     (tx_chan_width == ATH9K_HT_MACMODE_20))
  75                         chanmode = CHANNEL_A_HT20;
  76                 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE) &&
  77                     (tx_chan_width == ATH9K_HT_MACMODE_2040))
  78                         chanmode = CHANNEL_A_HT40PLUS;
  79                 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW) &&
  80                     (tx_chan_width == ATH9K_HT_MACMODE_2040))
  81                         chanmode = CHANNEL_A_HT40MINUS;
  82                 break;
  83         default:
  84                 break;
  85         }
  86
  87         return chanmode;
  88 }
  89
  90
  91 static int ath_setkey_tkip(struct ath_softc *sc,
  92                            struct ieee80211_key_conf *key,
  93                            struct ath9k_keyval *hk,
  94                            const u8 *addr)
  95 {
  96         u8 *key_rxmic = NULL;
  97         u8 *key_txmic = NULL;
  98
  99         key_txmic = key->key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
 100         key_rxmic = key->key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
 101
 102         if (addr == NULL) {
 103                 /* Group key installation */
 104                 memcpy(hk->kv_mic,  key_rxmic, sizeof(hk->kv_mic));
 105                 return ath_keyset(sc, key->keyidx, hk, addr);
 106         }
 107         if (!sc->sc_splitmic) {
 108                 /*
 109                  * data key goes at first index,
 110                  * the hal handles the MIC keys at index+64.
 111                  */
 112                 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
 113                 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
 114                 return ath_keyset(sc, key->keyidx, hk, addr);
 115         }
 116         /*
 117          * TX key goes at first index, RX key at +32.
 118          * The hal handles the MIC keys at index+64.
 119          */
 120         memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
 121         if (!ath_keyset(sc, key->keyidx, hk, NULL)) {
 122                 /* Txmic entry failed. No need to proceed further */
 123                 DPRINTF(sc, ATH_DBG_KEYCACHE,
 124                         "%s Setting TX MIC Key Failed\n", __func__);
 125                 return 0;
 126         }
 127
 128         memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
 129         /* XXX delete tx key on failure? */
 130         return ath_keyset(sc, key->keyidx+32, hk, addr);
 131 }
 132
 133 static int ath_key_config(struct ath_softc *sc,
 134                           const u8 *addr,
 135                           struct ieee80211_key_conf *key)
 136 {
 137         struct ieee80211_vif *vif;
 138         struct ath9k_keyval hk;
 139         const u8 *mac = NULL;
 140         int ret = 0;
 141         enum nl80211_iftype opmode;
 142
 143         memset(&hk, 0, sizeof(hk));
 144
 145         switch (key->alg) {
 146         case ALG_WEP:
 147                 hk.kv_type = ATH9K_CIPHER_WEP;
 148                 break;
 149         case ALG_TKIP:
 150                 hk.kv_type = ATH9K_CIPHER_TKIP;
 151                 break;
 152         case ALG_CCMP:
 153                 hk.kv_type = ATH9K_CIPHER_AES_CCM;
 154                 break;
 155         default:
 156                 return -EINVAL;
 157         }
 158
 159         hk.kv_len  = key->keylen;
 160         memcpy(hk.kv_val, key->key, key->keylen);
 161
 162         if (!sc->sc_vaps[0])
 163                 return -EIO;
 164
 165         vif = sc->sc_vaps[0];
 166         opmode = vif->type;
 167
 168         /*
 169          *  Strategy:
 170          *   For _M_STA mc tx, we will not setup a key at all since we never
 171          *   tx mc.
 172          *   _M_STA mc rx, we will use the keyID.
 173          *   for _M_IBSS mc tx, we will use the keyID, and no macaddr.
 174          *   for _M_IBSS mc rx, we will alloc a slot and plumb the mac of the
 175          *   peer node. BUT we will plumb a cleartext key so that we can do
 176          *   perSta default key table lookup in software.
 177          */
 178         if (is_broadcast_ether_addr(addr)) {
 179                 switch (opmode) {
 180                 case NL80211_IFTYPE_STATION:
 181                         /* default key:  could be group WPA key
 182                          * or could be static WEP key */
 183                         mac = NULL;
 184                         break;
 185                 case NL80211_IFTYPE_ADHOC:
 186                         break;
 187                 case NL80211_IFTYPE_AP:
 188                         break;
 189                 default:
 190                         ASSERT(0);
 191                         break;
 192                 }
 193         } else {
 194                 mac = addr;
 195         }
 196
 197         if (key->alg == ALG_TKIP)
 198                 ret = ath_setkey_tkip(sc, key, &hk, mac);
 199         else
 200                 ret = ath_keyset(sc, key->keyidx, &hk, mac);
 201
 202         if (!ret)
 203                 return -EIO;
 204
 205         return 0;
 206 }
 207
 208 static void ath_key_delete(struct ath_softc *sc, struct ieee80211_key_conf *key)
 209 {
 210         int freeslot;
 211
 212         freeslot = (key->keyidx >= 4) ? 1 : 0;
 213         ath_key_reset(sc, key->keyidx, freeslot);
 214 }
 215
 216 static void setup_ht_cap(struct ieee80211_sta_ht_cap *ht_info)
 217 {
 218 #define ATH9K_HT_CAP_MAXRXAMPDU_65536 0x3       /* 2 ^ 16 */
 219 #define ATH9K_HT_CAP_MPDUDENSITY_8 0x6          /* 8 usec */
 220
 221         ht_info->ht_supported = true;
 222         ht_info->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
 223                        IEEE80211_HT_CAP_SM_PS |
 224                        IEEE80211_HT_CAP_SGI_40 |
 225                        IEEE80211_HT_CAP_DSSSCCK40;
 226
 227         ht_info->ampdu_factor = ATH9K_HT_CAP_MAXRXAMPDU_65536;
 228         ht_info->ampdu_density = ATH9K_HT_CAP_MPDUDENSITY_8;
 229         /* set up supported mcs set */
 230         memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
 231         ht_info->mcs.rx_mask[0] = 0xff;
 232         ht_info->mcs.rx_mask[1] = 0xff;
 233         ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
 234 }
 235
 236 static int ath_rate2idx(struct ath_softc *sc, int rate)
 237 {
 238         int i = 0, cur_band, n_rates;
 239         struct ieee80211_hw *hw = sc->hw;
 240
 241         cur_band = hw->conf.channel->band;
 242         n_rates = sc->sbands[cur_band].n_bitrates;
 243
 244         for (i = 0; i < n_rates; i++) {
 245                 if (sc->sbands[cur_band].bitrates[i].bitrate == rate)
 246                         break;
 247         }
 248
 249         /*
 250          * NB:mac80211 validates rx rate index against the supported legacy rate
 251          * index only (should be done against ht rates also), return the highest
 252          * legacy rate index for rx rate which does not match any one of the
 253          * supported basic and extended rates to make mac80211 happy.
 254          * The following hack will be cleaned up once the issue with
 255          * the rx rate index validation in mac80211 is fixed.
 256          */
 257         if (i == n_rates)
 258                 return n_rates - 1;
 259         return i;
 260 }
 261
 262 static void ath9k_rx_prepare(struct ath_softc *sc,
 263                              struct sk_buff *skb,
 264                              struct ath_recv_status *status,
 265                              struct ieee80211_rx_status *rx_status)
 266 {
 267         struct ieee80211_hw *hw = sc->hw;
 268         struct ieee80211_channel *curchan = hw->conf.channel;
 269
 270         memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
 271
 272         rx_status->mactime = status->tsf;
 273         rx_status->band = curchan->band;
 274         rx_status->freq =  curchan->center_freq;
 275         rx_status->noise = sc->sc_ani.sc_noise_floor;
 276         rx_status->signal = rx_status->noise + status->rssi;
 277         rx_status->rate_idx = ath_rate2idx(sc, (status->rateKbps / 100));
 278         rx_status->antenna = status->antenna;
 279
 280         /* at 45 you will be able to use MCS 15 reliably. A more elaborate
 281          * scheme can be used here but it requires tables of SNR/throughput for
 282          * each possible mode used. */
 283         rx_status->qual = status->rssi * 100 / 45;
 284
 285         /* rssi can be more than 45 though, anything above that
 286          * should be considered at 100% */
 287         if (rx_status->qual > 100)
 288                 rx_status->qual = 100;
 289
 290         if (status->flags & ATH_RX_MIC_ERROR)
 291                 rx_status->flag |= RX_FLAG_MMIC_ERROR;
 292         if (status->flags & ATH_RX_FCS_ERROR)
 293                 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
 294
 295         rx_status->flag |= RX_FLAG_TSFT;
 296 }
 297
 298 static void ath9k_ht_conf(struct ath_softc *sc,
 299                           struct ieee80211_bss_conf *bss_conf)
 300 {
 301         struct ath_ht_info *ht_info = &sc->sc_ht_info;
 302
 303         if (sc->hw->conf.ht.enabled) {
 304                 ht_info->ext_chan_offset = bss_conf->ht.secondary_channel_offset;
 305
 306                 if (bss_conf->ht.width_40_ok)
 307                         ht_info->tx_chan_width = ATH9K_HT_MACMODE_2040;
 308                 else
 309                         ht_info->tx_chan_width = ATH9K_HT_MACMODE_20;
 310
 311                 ath9k_hw_set11nmac2040(sc->sc_ah, ht_info->tx_chan_width);
 312         }
 313 }
 314
 315 static void ath9k_bss_assoc_info(struct ath_softc *sc,
 316                                  struct ieee80211_vif *vif,
 317                                  struct ieee80211_bss_conf *bss_conf)
 318 {
 319         struct ieee80211_hw *hw = sc->hw;
 320         struct ieee80211_channel *curchan = hw->conf.channel;
 321         struct ath_vap *avp = (void *)vif->drv_priv;
 322         int pos;
 323
 324         if (bss_conf->assoc) {
 325                 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Bss Info ASSOC %d\n",
 326                         __func__,
 327                         bss_conf->aid);
 328
 329                 /* New association, store aid */
 330                 if (avp->av_opmode == ATH9K_M_STA) {
 331                         sc->sc_curaid = bss_conf->aid;
 332                         ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
 333                                                sc->sc_curaid);
 334                 }
 335
 336                 /* Configure the beacon */
 337                 ath_beacon_config(sc, 0);
 338                 sc->sc_flags |= SC_OP_BEACONS;
 339
 340                 /* Reset rssi stats */
 341                 sc->sc_halstats.ns_avgbrssi = ATH_RSSI_DUMMY_MARKER;
 342                 sc->sc_halstats.ns_avgrssi = ATH_RSSI_DUMMY_MARKER;
 343                 sc->sc_halstats.ns_avgtxrssi = ATH_RSSI_DUMMY_MARKER;
 344                 sc->sc_halstats.ns_avgtxrate = ATH_RATE_DUMMY_MARKER;
 345
 346                 /* Update chainmask */
 347                 ath_update_chainmask(sc, hw->conf.ht.enabled);
 348
 349                 DPRINTF(sc, ATH_DBG_CONFIG,
 350                         "%s: bssid %pM aid 0x%x\n",
 351                         __func__,
 352                         sc->sc_curbssid, sc->sc_curaid);
 353
 354                 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
 355                         __func__,
 356                         curchan->center_freq);
 357
 358                 pos = ath_get_channel(sc, curchan);
 359                 if (pos == -1) {
 360                         DPRINTF(sc, ATH_DBG_FATAL,
 361                                 "%s: Invalid channel\n", __func__);
 362                         return;
 363                 }
 364
 365                 if (hw->conf.ht.enabled)
 366                         sc->sc_ah->ah_channels[pos].chanmode =
 367                                 ath_get_extchanmode(sc, curchan);
 368                 else
 369                         sc->sc_ah->ah_channels[pos].chanmode =
 370                                 (curchan->band == IEEE80211_BAND_2GHZ) ?
 371                                 CHANNEL_G : CHANNEL_A;
 372
 373                 /* set h/w channel */
 374                 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
 375                         DPRINTF(sc, ATH_DBG_FATAL,
 376                                 "%s: Unable to set channel\n",
 377                                 __func__);
 378
 379                 ath_rate_newstate(sc, avp);
 380                 /* Update ratectrl about the new state */
 381                 ath_rc_node_update(hw, avp->rc_node);
 382
 383                 /* Start ANI */
 384                 mod_timer(&sc->sc_ani.timer,
 385                         jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
 386
 387         } else {
 388                 DPRINTF(sc, ATH_DBG_CONFIG,
 389                 "%s: Bss Info DISSOC\n", __func__);
 390                 sc->sc_curaid = 0;
 391         }
 392 }
 393
 394 void ath_get_beaconconfig(struct ath_softc *sc,
 395                           int if_id,
 396                           struct ath_beacon_config *conf)
 397 {
 398         struct ieee80211_hw *hw = sc->hw;
 399
 400         /* fill in beacon config data */
 401
 402         conf->beacon_interval = hw->conf.beacon_int;
 403         conf->listen_interval = 100;
 404         conf->dtim_count = 1;
 405         conf->bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf->listen_interval;
 406 }
 407
 408 void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
 409                      struct ath_xmit_status *tx_status)
 410 {
 411         struct ieee80211_hw *hw = sc->hw;
 412         struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
 413
 414         DPRINTF(sc, ATH_DBG_XMIT,
 415                 "%s: TX complete: skb: %p\n", __func__, skb);
 416
 417         ieee80211_tx_info_clear_status(tx_info);
 418         if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK ||
 419                 tx_info->flags & IEEE80211_TX_STAT_TX_FILTERED) {
 420                 /* free driver's private data area of tx_info, XXX: HACK! */
 421                 if (tx_info->control.vif != NULL)
 422                         kfree(tx_info->control.vif);
 423                         tx_info->control.vif = NULL;
 424         }
 425
 426         if (tx_status->flags & ATH_TX_BAR) {
 427                 tx_info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
 428                 tx_status->flags &= ~ATH_TX_BAR;
 429         }
 430
 431         if (!(tx_status->flags & (ATH_TX_ERROR | ATH_TX_XRETRY))) {
 432                 /* Frame was ACKed */
 433                 tx_info->flags |= IEEE80211_TX_STAT_ACK;
 434         }
 435
 436         tx_info->status.rates[0].count = tx_status->retries + 1;
 437
 438         ieee80211_tx_status(hw, skb);
 439 }
 440
 441 int _ath_rx_indicate(struct ath_softc *sc,
 442                      struct sk_buff *skb,
 443                      struct ath_recv_status *status,
 444                      u16 keyix)
 445 {
 446         struct ieee80211_hw *hw = sc->hw;
 447         struct ieee80211_rx_status rx_status;
 448         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
 449         int hdrlen = ieee80211_get_hdrlen_from_skb(skb);
 450         int padsize;
 451
 452         /* see if any padding is done by the hw and remove it */
 453         if (hdrlen & 3) {
 454                 padsize = hdrlen % 4;
 455                 memmove(skb->data + padsize, skb->data, hdrlen);
 456                 skb_pull(skb, padsize);
 457         }
 458
 459         /* Prepare rx status */
 460         ath9k_rx_prepare(sc, skb, status, &rx_status);
 461
 462         if (!(keyix == ATH9K_RXKEYIX_INVALID) &&
 463             !(status->flags & ATH_RX_DECRYPT_ERROR)) {
 464                 rx_status.flag |= RX_FLAG_DECRYPTED;
 465         } else if ((le16_to_cpu(hdr->frame_control) & IEEE80211_FCTL_PROTECTED)
 466                    && !(status->flags & ATH_RX_DECRYPT_ERROR)
 467                    && skb->len >= hdrlen + 4) {
 468                 keyix = skb->data[hdrlen + 3] >> 6;
 469
 470                 if (test_bit(keyix, sc->sc_keymap))
 471                         rx_status.flag |= RX_FLAG_DECRYPTED;
 472         }
 473
 474         __ieee80211_rx(hw, skb, &rx_status);
 475
 476         return 0;
 477 }
 478
 479 /********************************/
 480 /*       LED functions          */
 481 /********************************/
 482
 483 static void ath_led_brightness(struct led_classdev *led_cdev,
 484                                enum led_brightness brightness)
 485 {
 486         struct ath_led *led = container_of(led_cdev, struct ath_led, led_cdev);
 487         struct ath_softc *sc = led->sc;
 488
 489         switch (brightness) {
 490         case LED_OFF:
 491                 if (led->led_type == ATH_LED_ASSOC ||
 492                     led->led_type == ATH_LED_RADIO)
 493                         sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
 494                 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN,
 495                                 (led->led_type == ATH_LED_RADIO) ? 1 :
 496                                 !!(sc->sc_flags & SC_OP_LED_ASSOCIATED));
 497                 break;
 498         case LED_FULL:
 499                 if (led->led_type == ATH_LED_ASSOC)
 500                         sc->sc_flags |= SC_OP_LED_ASSOCIATED;
 501                 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 0);
 502                 break;
 503         default:
 504                 break;
 505         }
 506 }
 507
 508 static int ath_register_led(struct ath_softc *sc, struct ath_led *led,
 509                             char *trigger)
 510 {
 511         int ret;
 512
 513         led->sc = sc;
 514         led->led_cdev.name = led->name;
 515         led->led_cdev.default_trigger = trigger;
 516         led->led_cdev.brightness_set = ath_led_brightness;
 517
 518         ret = led_classdev_register(wiphy_dev(sc->hw->wiphy), &led->led_cdev);
 519         if (ret)
 520                 DPRINTF(sc, ATH_DBG_FATAL,
 521                         "Failed to register led:%s", led->name);
 522         else
 523                 led->registered = 1;
 524         return ret;
 525 }
 526
 527 static void ath_unregister_led(struct ath_led *led)
 528 {
 529         if (led->registered) {
 530                 led_classdev_unregister(&led->led_cdev);
 531                 led->registered = 0;
 532         }
 533 }
 534
 535 static void ath_deinit_leds(struct ath_softc *sc)
 536 {
 537         ath_unregister_led(&sc->assoc_led);
 538         sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
 539         ath_unregister_led(&sc->tx_led);
 540         ath_unregister_led(&sc->rx_led);
 541         ath_unregister_led(&sc->radio_led);
 542         ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
 543 }
 544
 545 static void ath_init_leds(struct ath_softc *sc)
 546 {
 547         char *trigger;
 548         int ret;
 549
 550         /* Configure gpio 1 for output */
 551         ath9k_hw_cfg_output(sc->sc_ah, ATH_LED_PIN,
 552                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 553         /* LED off, active low */
 554         ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
 555
 556         trigger = ieee80211_get_radio_led_name(sc->hw);
 557         snprintf(sc->radio_led.name, sizeof(sc->radio_led.name),
 558                 "ath9k-%s:radio", wiphy_name(sc->hw->wiphy));
 559         ret = ath_register_led(sc, &sc->radio_led, trigger);
 560         sc->radio_led.led_type = ATH_LED_RADIO;
 561         if (ret)
 562                 goto fail;
 563
 564         trigger = ieee80211_get_assoc_led_name(sc->hw);
 565         snprintf(sc->assoc_led.name, sizeof(sc->assoc_led.name),
 566                 "ath9k-%s:assoc", wiphy_name(sc->hw->wiphy));
 567         ret = ath_register_led(sc, &sc->assoc_led, trigger);
 568         sc->assoc_led.led_type = ATH_LED_ASSOC;
 569         if (ret)
 570                 goto fail;
 571
 572         trigger = ieee80211_get_tx_led_name(sc->hw);
 573         snprintf(sc->tx_led.name, sizeof(sc->tx_led.name),
 574                 "ath9k-%s:tx", wiphy_name(sc->hw->wiphy));
 575         ret = ath_register_led(sc, &sc->tx_led, trigger);
 576         sc->tx_led.led_type = ATH_LED_TX;
 577         if (ret)
 578                 goto fail;
 579
 580         trigger = ieee80211_get_rx_led_name(sc->hw);
 581         snprintf(sc->rx_led.name, sizeof(sc->rx_led.name),
 582                 "ath9k-%s:rx", wiphy_name(sc->hw->wiphy));
 583         ret = ath_register_led(sc, &sc->rx_led, trigger);
 584         sc->rx_led.led_type = ATH_LED_RX;
 585         if (ret)
 586                 goto fail;
 587
 588         return;
 589
 590 fail:
 591         ath_deinit_leds(sc);
 592 }
 593
 594 #ifdef CONFIG_RFKILL
 595
 596 /*******************/
 597 /*      Rfkill     */
 598 /*******************/
 599
 600 static void ath_radio_enable(struct ath_softc *sc)
 601 {
 602         struct ath_hal *ah = sc->sc_ah;
 603         int status;
 604
 605         spin_lock_bh(&sc->sc_resetlock);
 606         if (!ath9k_hw_reset(ah, ah->ah_curchan,
 607                             sc->sc_ht_info.tx_chan_width,
 608                             sc->sc_tx_chainmask,
 609                             sc->sc_rx_chainmask,
 610                             sc->sc_ht_extprotspacing,
 611                             false, &status)) {
 612                 DPRINTF(sc, ATH_DBG_FATAL,
 613                         "%s: unable to reset channel %u (%uMhz) "
 614                         "flags 0x%x hal status %u\n", __func__,
 615                         ath9k_hw_mhz2ieee(ah,
 616                                           ah->ah_curchan->channel,
 617                                           ah->ah_curchan->channelFlags),
 618                         ah->ah_curchan->channel,
 619                         ah->ah_curchan->channelFlags, status);
 620         }
 621         spin_unlock_bh(&sc->sc_resetlock);
 622
 623         ath_update_txpow(sc);
 624         if (ath_startrecv(sc) != 0) {
 625                 DPRINTF(sc, ATH_DBG_FATAL,
 626                         "%s: unable to restart recv logic\n", __func__);
 627                 return;
 628         }
 629
 630         if (sc->sc_flags & SC_OP_BEACONS)
 631                 ath_beacon_config(sc, ATH_IF_ID_ANY);   /* restart beacons */
 632
 633         /* Re-Enable  interrupts */
 634         ath9k_hw_set_interrupts(ah, sc->sc_imask);
 635
 636         /* Enable LED */
 637         ath9k_hw_cfg_output(ah, ATH_LED_PIN,
 638                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 639         ath9k_hw_set_gpio(ah, ATH_LED_PIN, 0);
 640
 641         ieee80211_wake_queues(sc->hw);
 642 }
 643
 644 static void ath_radio_disable(struct ath_softc *sc)
 645 {
 646         struct ath_hal *ah = sc->sc_ah;
 647         int status;
 648
 649
 650         ieee80211_stop_queues(sc->hw);
 651
 652         /* Disable LED */
 653         ath9k_hw_set_gpio(ah, ATH_LED_PIN, 1);
 654         ath9k_hw_cfg_gpio_input(ah, ATH_LED_PIN);
 655
 656         /* Disable interrupts */
 657         ath9k_hw_set_interrupts(ah, 0);
 658
 659         ath_draintxq(sc, false);        /* clear pending tx frames */
 660         ath_stoprecv(sc);               /* turn off frame recv */
 661         ath_flushrecv(sc);              /* flush recv queue */
 662
 663         spin_lock_bh(&sc->sc_resetlock);
 664         if (!ath9k_hw_reset(ah, ah->ah_curchan,
 665                             sc->sc_ht_info.tx_chan_width,
 666                             sc->sc_tx_chainmask,
 667                             sc->sc_rx_chainmask,
 668                             sc->sc_ht_extprotspacing,
 669                             false, &status)) {
 670                 DPRINTF(sc, ATH_DBG_FATAL,
 671                         "%s: unable to reset channel %u (%uMhz) "
 672                         "flags 0x%x hal status %u\n", __func__,
 673                         ath9k_hw_mhz2ieee(ah,
 674                                 ah->ah_curchan->channel,
 675                                 ah->ah_curchan->channelFlags),
 676                         ah->ah_curchan->channel,
 677                         ah->ah_curchan->channelFlags, status);
 678         }
 679         spin_unlock_bh(&sc->sc_resetlock);
 680
 681         ath9k_hw_phy_disable(ah);
 682         ath9k_hw_setpower(ah, ATH9K_PM_FULL_SLEEP);
 683 }
 684
 685 static bool ath_is_rfkill_set(struct ath_softc *sc)
 686 {
 687         struct ath_hal *ah = sc->sc_ah;
 688
 689         return ath9k_hw_gpio_get(ah, ah->ah_rfkill_gpio) ==
 690                                   ah->ah_rfkill_polarity;
 691 }
 692
 693 /* h/w rfkill poll function */
 694 static void ath_rfkill_poll(struct work_struct *work)
 695 {
 696         struct ath_softc *sc = container_of(work, struct ath_softc,
 697                                             rf_kill.rfkill_poll.work);
 698         bool radio_on;
 699
 700         if (sc->sc_flags & SC_OP_INVALID)
 701                 return;
 702
 703         radio_on = !ath_is_rfkill_set(sc);
 704
 705         /*
 706          * enable/disable radio only when there is a
 707          * state change in RF switch
 708          */
 709         if (radio_on == !!(sc->sc_flags & SC_OP_RFKILL_HW_BLOCKED)) {
 710                 enum rfkill_state state;
 711
 712                 if (sc->sc_flags & SC_OP_RFKILL_SW_BLOCKED) {
 713                         state = radio_on ? RFKILL_STATE_SOFT_BLOCKED
 714                                 : RFKILL_STATE_HARD_BLOCKED;
 715                 } else if (radio_on) {
 716                         ath_radio_enable(sc);
 717                         state = RFKILL_STATE_UNBLOCKED;
 718                 } else {
 719                         ath_radio_disable(sc);
 720                         state = RFKILL_STATE_HARD_BLOCKED;
 721                 }
 722
 723                 if (state == RFKILL_STATE_HARD_BLOCKED)
 724                         sc->sc_flags |= SC_OP_RFKILL_HW_BLOCKED;
 725                 else
 726                         sc->sc_flags &= ~SC_OP_RFKILL_HW_BLOCKED;
 727
 728                 rfkill_force_state(sc->rf_kill.rfkill, state);
 729         }
 730
 731         queue_delayed_work(sc->hw->workqueue, &sc->rf_kill.rfkill_poll,
 732                            msecs_to_jiffies(ATH_RFKILL_POLL_INTERVAL));
 733 }
 734
 735 /* s/w rfkill handler */
 736 static int ath_sw_toggle_radio(void *data, enum rfkill_state state)
 737 {
 738         struct ath_softc *sc = data;
 739
 740         switch (state) {
 741         case RFKILL_STATE_SOFT_BLOCKED:
 742                 if (!(sc->sc_flags & (SC_OP_RFKILL_HW_BLOCKED |
 743                     SC_OP_RFKILL_SW_BLOCKED)))
 744                         ath_radio_disable(sc);
 745                 sc->sc_flags |= SC_OP_RFKILL_SW_BLOCKED;
 746                 return 0;
 747         case RFKILL_STATE_UNBLOCKED:
 748                 if ((sc->sc_flags & SC_OP_RFKILL_SW_BLOCKED)) {
 749                         sc->sc_flags &= ~SC_OP_RFKILL_SW_BLOCKED;
 750                         if (sc->sc_flags & SC_OP_RFKILL_HW_BLOCKED) {
 751                                 DPRINTF(sc, ATH_DBG_FATAL, "Can't turn on the"
 752                                         "radio as it is disabled by h/w \n");
 753                                 return -EPERM;
 754                         }
 755                         ath_radio_enable(sc);
 756                 }
 757                 return 0;
 758         default:
 759                 return -EINVAL;
 760         }
 761 }
 762
 763 /* Init s/w rfkill */
 764 static int ath_init_sw_rfkill(struct ath_softc *sc)
 765 {
 766         sc->rf_kill.rfkill = rfkill_allocate(wiphy_dev(sc->hw->wiphy),
 767                                              RFKILL_TYPE_WLAN);
 768         if (!sc->rf_kill.rfkill) {
 769                 DPRINTF(sc, ATH_DBG_FATAL, "Failed to allocate rfkill\n");
 770                 return -ENOMEM;
 771         }
 772
 773         snprintf(sc->rf_kill.rfkill_name, sizeof(sc->rf_kill.rfkill_name),
 774                 "ath9k-%s:rfkill", wiphy_name(sc->hw->wiphy));
 775         sc->rf_kill.rfkill->name = sc->rf_kill.rfkill_name;
 776         sc->rf_kill.rfkill->data = sc;
 777         sc->rf_kill.rfkill->toggle_radio = ath_sw_toggle_radio;
 778         sc->rf_kill.rfkill->state = RFKILL_STATE_UNBLOCKED;
 779         sc->rf_kill.rfkill->user_claim_unsupported = 1;
 780
 781         return 0;
 782 }
 783
 784 /* Deinitialize rfkill */
 785 static void ath_deinit_rfkill(struct ath_softc *sc)
 786 {
 787         if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
 788                 cancel_delayed_work_sync(&sc->rf_kill.rfkill_poll);
 789
 790         if (sc->sc_flags & SC_OP_RFKILL_REGISTERED) {
 791                 rfkill_unregister(sc->rf_kill.rfkill);
 792                 sc->sc_flags &= ~SC_OP_RFKILL_REGISTERED;
 793                 sc->rf_kill.rfkill = NULL;
 794         }
 795 }
 796
 797 static int ath_start_rfkill_poll(struct ath_softc *sc)
 798 {
 799         if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
 800                 queue_delayed_work(sc->hw->workqueue,
 801                                    &sc->rf_kill.rfkill_poll, 0);
 802
 803         if (!(sc->sc_flags & SC_OP_RFKILL_REGISTERED)) {
 804                 if (rfkill_register(sc->rf_kill.rfkill)) {
 805                         DPRINTF(sc, ATH_DBG_FATAL,
 806                                 "Unable to register rfkill\n");
 807                         rfkill_free(sc->rf_kill.rfkill);
 808
 809                         /* Deinitialize the device */
 810                         if (sc->pdev->irq)
 811                                 free_irq(sc->pdev->irq, sc);
 812                         ath_detach(sc);
 813                         pci_iounmap(sc->pdev, sc->mem);
 814                         pci_release_region(sc->pdev, 0);
 815                         pci_disable_device(sc->pdev);
 816                         ieee80211_free_hw(hw);
 817                         return -EIO;
 818                 } else {
 819                         sc->sc_flags |= SC_OP_RFKILL_REGISTERED;
 820                 }
 821         }
 822
 823         return 0;
 824 }
 825 #endif /* CONFIG_RFKILL */
 826
 827 static void ath_detach(struct ath_softc *sc)
 828 {
 829         struct ieee80211_hw *hw = sc->hw;
 830         int i = 0;
 831
 832         DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach ATH hw\n", __func__);
 833
 834         ieee80211_unregister_hw(hw);
 835
 836         ath_deinit_leds(sc);
 837
 838 #ifdef CONFIG_RFKILL
 839         ath_deinit_rfkill(sc);
 840 #endif
 841         ath_rate_control_unregister();
 842         ath_rate_detach(sc->sc_rc);
 843
 844         ath_rx_cleanup(sc);
 845         ath_tx_cleanup(sc);
 846
 847         tasklet_kill(&sc->intr_tq);
 848         tasklet_kill(&sc->bcon_tasklet);
 849
 850         if (!(sc->sc_flags & SC_OP_INVALID))
 851                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 852
 853         /* cleanup tx queues */
 854         for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++)
 855                 if (ATH_TXQ_SETUP(sc, i))
 856                         ath_tx_cleanupq(sc, &sc->sc_txq[i]);
 857
 858         ath9k_hw_detach(sc->sc_ah);
 859 }
 860
 861 static int ath_attach(u16 devid, struct ath_softc *sc)
 862 {
 863         struct ieee80211_hw *hw = sc->hw;
 864         int error = 0;
 865
 866         DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach ATH hw\n", __func__);
 867
 868         error = ath_init(devid, sc);
 869         if (error != 0)
 870                 return error;
 871
 872         /* get mac address from hardware and set in mac80211 */
 873
 874         SET_IEEE80211_PERM_ADDR(hw, sc->sc_myaddr);
 875
 876         hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
 877                 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
 878                 IEEE80211_HW_SIGNAL_DBM |
 879                 IEEE80211_HW_AMPDU_AGGREGATION;
 880
 881         hw->wiphy->interface_modes =
 882                 BIT(NL80211_IFTYPE_AP) |
 883                 BIT(NL80211_IFTYPE_STATION) |
 884                 BIT(NL80211_IFTYPE_ADHOC);
 885
 886         hw->queues = 4;
 887         hw->sta_data_size = sizeof(struct ath_node);
 888         hw->vif_data_size = sizeof(struct ath_vap);
 889
 890         /* Register rate control */
 891         hw->rate_control_algorithm = "ath9k_rate_control";
 892         error = ath_rate_control_register();
 893         if (error != 0) {
 894                 DPRINTF(sc, ATH_DBG_FATAL,
 895                         "%s: Unable to register rate control "
 896                         "algorithm:%d\n", __func__, error);
 897                 ath_rate_control_unregister();
 898                 goto bad;
 899         }
 900
 901         if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT) {
 902                 setup_ht_cap(&sc->sbands[IEEE80211_BAND_2GHZ].ht_cap);
 903                 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->ah_caps.wireless_modes))
 904                         setup_ht_cap(&sc->sbands[IEEE80211_BAND_5GHZ].ht_cap);
 905         }
 906
 907         hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &sc->sbands[IEEE80211_BAND_2GHZ];
 908         if (test_bit(ATH9K_MODE_11A, sc->sc_ah->ah_caps.wireless_modes))
 909                 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
 910                         &sc->sbands[IEEE80211_BAND_5GHZ];
 911
 912         error = ieee80211_register_hw(hw);
 913         if (error != 0) {
 914                 ath_rate_control_unregister();
 915                 goto bad;
 916         }
 917
 918         /* Initialize LED control */
 919         ath_init_leds(sc);
 920
 921 #ifdef CONFIG_RFKILL
 922         /* Initialze h/w Rfkill */
 923         if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
 924                 INIT_DELAYED_WORK(&sc->rf_kill.rfkill_poll, ath_rfkill_poll);
 925
 926         /* Initialize s/w rfkill */
 927         if (ath_init_sw_rfkill(sc))
 928                 goto detach;
 929 #endif
 930
 931         /* initialize tx/rx engine */
 932
 933         error = ath_tx_init(sc, ATH_TXBUF);
 934         if (error != 0)
 935                 goto detach;
 936
 937         error = ath_rx_init(sc, ATH_RXBUF);
 938         if (error != 0)
 939                 goto detach;
 940
 941         return 0;
 942 detach:
 943         ath_detach(sc);
 944 bad:
 945         return error;
 946 }
 947
 948 static int ath9k_start(struct ieee80211_hw *hw)
 949 {
 950         struct ath_softc *sc = hw->priv;
 951         struct ieee80211_channel *curchan = hw->conf.channel;
 952         int error = 0, pos;
 953
 954         DPRINTF(sc, ATH_DBG_CONFIG, "%s: Starting driver with "
 955                 "initial channel: %d MHz\n", __func__, curchan->center_freq);
 956
 957         memset(&sc->sc_ht_info, 0, sizeof(struct ath_ht_info));
 958
 959         /* setup initial channel */
 960
 961         pos = ath_get_channel(sc, curchan);
 962         if (pos == -1) {
 963                 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
 964                 error = -EINVAL;
 965                 goto exit;
 966         }
 967
 968         sc->sc_ah->ah_channels[pos].chanmode =
 969                 (curchan->band == IEEE80211_BAND_2GHZ) ? CHANNEL_G : CHANNEL_A;
 970
 971         error = ath_open(sc, &sc->sc_ah->ah_channels[pos]);
 972         if (error) {
 973                 DPRINTF(sc, ATH_DBG_FATAL,
 974                         "%s: Unable to complete ath_open\n", __func__);
 975                 goto exit;
 976         }
 977
 978 #ifdef CONFIG_RFKILL
 979         error = ath_start_rfkill_poll(sc);
 980 #endif
 981
 982 exit:
 983         return error;
 984 }
 985
 986 static int ath9k_tx(struct ieee80211_hw *hw,
 987                     struct sk_buff *skb)
 988 {
 989         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 990         struct ath_softc *sc = hw->priv;
 991         struct ath_tx_control txctl;
 992         int hdrlen, padsize;
 993
 994         memset(&txctl, 0, sizeof(struct ath_tx_control));
 995
 996         /*
 997          * As a temporary workaround, assign seq# here; this will likely need
 998          * to be cleaned up to work better with Beacon transmission and virtual
 999          * BSSes.
1000          */
1001         if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1002                 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1003                 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1004                         sc->seq_no += 0x10;
1005                 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1006                 hdr->seq_ctrl |= cpu_to_le16(sc->seq_no);
1007         }
1008
1009         /* Add the padding after the header if this is not already done */
1010         hdrlen = ieee80211_get_hdrlen_from_skb(skb);
1011         if (hdrlen & 3) {
1012                 padsize = hdrlen % 4;
1013                 if (skb_headroom(skb) < padsize)
1014                         return -1;
1015                 skb_push(skb, padsize);
1016                 memmove(skb->data, skb->data + padsize, hdrlen);
1017         }
1018
1019         /* Check if a tx queue is available */
1020
1021         txctl.txq = ath_test_get_txq(sc, skb);
1022         if (!txctl.txq)
1023                 goto exit;
1024
1025         DPRINTF(sc, ATH_DBG_XMIT, "%s: transmitting packet, skb: %p\n",
1026                 __func__,
1027                 skb);
1028
1029         if (ath_tx_start(sc, skb, &txctl) != 0) {
1030                 DPRINTF(sc, ATH_DBG_XMIT, "%s: TX failed\n", __func__);
1031                 goto exit;
1032         }
1033
1034         return 0;
1035 exit:
1036         dev_kfree_skb_any(skb);
1037         return 0;
1038 }
1039
1040 static void ath9k_stop(struct ieee80211_hw *hw)
1041 {
1042         struct ath_softc *sc = hw->priv;
1043
1044         if (sc->sc_flags & SC_OP_INVALID) {
1045                 DPRINTF(sc, ATH_DBG_ANY, "%s: Device not present\n", __func__);
1046                 return;
1047         }
1048
1049         ath_stop(sc);
1050
1051         DPRINTF(sc, ATH_DBG_CONFIG, "%s: Driver halt\n", __func__);
1052 }
1053
1054 static int ath9k_add_interface(struct ieee80211_hw *hw,
1055                                struct ieee80211_if_init_conf *conf)
1056 {
1057         struct ath_softc *sc = hw->priv;
1058         struct ath_vap *avp = (void *)conf->vif->drv_priv;
1059         int ic_opmode = 0;
1060
1061         /* Support only vap for now */
1062
1063         if (sc->sc_nvaps)
1064                 return -ENOBUFS;
1065
1066         switch (conf->type) {
1067         case NL80211_IFTYPE_STATION:
1068                 ic_opmode = ATH9K_M_STA;
1069                 break;
1070         case NL80211_IFTYPE_ADHOC:
1071                 ic_opmode = ATH9K_M_IBSS;
1072                 break;
1073         case NL80211_IFTYPE_AP:
1074                 ic_opmode = ATH9K_M_HOSTAP;
1075                 break;
1076         default:
1077                 DPRINTF(sc, ATH_DBG_FATAL,
1078                         "%s: Interface type %d not yet supported\n",
1079                         __func__, conf->type);
1080                 return -EOPNOTSUPP;
1081         }
1082
1083         DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a VAP of type: %d\n",
1084                 __func__,
1085                 ic_opmode);
1086
1087         /* Set the VAP opmode */
1088         avp->av_opmode = ic_opmode;
1089         avp->av_bslot = -1;
1090
1091         if (ic_opmode == ATH9K_M_HOSTAP)
1092                 ath9k_hw_set_tsfadjust(sc->sc_ah, 1);
1093
1094         sc->sc_vaps[0] = conf->vif;
1095         sc->sc_nvaps++;
1096
1097         /* Set the device opmode */
1098         sc->sc_ah->ah_opmode = ic_opmode;
1099
1100         /* default VAP configuration */
1101         avp->av_config.av_fixed_rateset = IEEE80211_FIXED_RATE_NONE;
1102         avp->av_config.av_fixed_retryset = 0x03030303;
1103
1104         if (conf->type == NL80211_IFTYPE_AP) {
1105                 /* TODO: is this a suitable place to start ANI for AP mode? */
1106                 /* Start ANI */
1107                 mod_timer(&sc->sc_ani.timer,
1108                           jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
1109         }
1110
1111         return 0;
1112 }
1113
1114 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1115                                    struct ieee80211_if_init_conf *conf)
1116 {
1117         struct ath_softc *sc = hw->priv;
1118         struct ath_vap *avp = (void *)conf->vif->drv_priv;
1119
1120         DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach VAP\n", __func__);
1121
1122 #ifdef CONFIG_SLOW_ANT_DIV
1123         ath_slow_ant_div_stop(&sc->sc_antdiv);
1124 #endif
1125         /* Stop ANI */
1126         del_timer_sync(&sc->sc_ani.timer);
1127
1128         /* Reclaim beacon resources */
1129         if (sc->sc_ah->ah_opmode == ATH9K_M_HOSTAP ||
1130             sc->sc_ah->ah_opmode == ATH9K_M_IBSS) {
1131                 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
1132                 ath_beacon_return(sc, avp);
1133         }
1134
1135         sc->sc_flags &= ~SC_OP_BEACONS;
1136
1137         sc->sc_vaps[0] = NULL;
1138         sc->sc_nvaps--;
1139 }
1140
1141 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1142 {
1143         struct ath_softc *sc = hw->priv;
1144         struct ieee80211_channel *curchan = hw->conf.channel;
1145         struct ieee80211_conf *conf = &hw->conf;
1146         int pos;
1147
1148         DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
1149                 __func__,
1150                 curchan->center_freq);
1151
1152         /* Update chainmask */
1153         ath_update_chainmask(sc, conf->ht.enabled);
1154
1155         pos = ath_get_channel(sc, curchan);
1156         if (pos == -1) {
1157                 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
1158                 return -EINVAL;
1159         }
1160
1161         sc->sc_ah->ah_channels[pos].chanmode =
1162                 (curchan->band == IEEE80211_BAND_2GHZ) ?
1163                 CHANNEL_G : CHANNEL_A;
1164
1165         if (sc->sc_curaid && hw->conf.ht.enabled)
1166                 sc->sc_ah->ah_channels[pos].chanmode =
1167                         ath_get_extchanmode(sc, curchan);
1168
1169         if (changed & IEEE80211_CONF_CHANGE_POWER)
1170                 sc->sc_config.txpowlimit = 2 * conf->power_level;
1171
1172         /* set h/w channel */
1173         if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
1174                 DPRINTF(sc, ATH_DBG_FATAL, "%s: Unable to set channel\n",
1175                         __func__);
1176
1177         return 0;
1178 }
1179
1180 static int ath9k_config_interface(struct ieee80211_hw *hw,
1181                                   struct ieee80211_vif *vif,
1182                                   struct ieee80211_if_conf *conf)
1183 {
1184         struct ath_softc *sc = hw->priv;
1185         struct ath_hal *ah = sc->sc_ah;
1186         struct ath_vap *avp = (void *)vif->drv_priv;
1187         u32 rfilt = 0;
1188         int error, i;
1189
1190         /* TODO: Need to decide which hw opmode to use for multi-interface
1191          * cases */
1192         if (vif->type == NL80211_IFTYPE_AP &&
1193             ah->ah_opmode != ATH9K_M_HOSTAP) {
1194                 ah->ah_opmode = ATH9K_M_HOSTAP;
1195                 ath9k_hw_setopmode(ah);
1196                 ath9k_hw_write_associd(ah, sc->sc_myaddr, 0);
1197                 /* Request full reset to get hw opmode changed properly */
1198                 sc->sc_flags |= SC_OP_FULL_RESET;
1199         }
1200
1201         if ((conf->changed & IEEE80211_IFCC_BSSID) &&
1202             !is_zero_ether_addr(conf->bssid)) {
1203                 switch (vif->type) {
1204                 case NL80211_IFTYPE_STATION:
1205                 case NL80211_IFTYPE_ADHOC:
1206                         /* Update ratectrl about the new state */
1207                         ath_rate_newstate(sc, avp);
1208
1209                         /* Set BSSID */
1210                         memcpy(sc->sc_curbssid, conf->bssid, ETH_ALEN);
1211                         sc->sc_curaid = 0;
1212                         ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
1213                                                sc->sc_curaid);
1214
1215                         /* Set aggregation protection mode parameters */
1216                         sc->sc_config.ath_aggr_prot = 0;
1217
1218                         DPRINTF(sc, ATH_DBG_CONFIG,
1219                                 "%s: RX filter 0x%x bssid %pM aid 0x%x\n",
1220                                 __func__, rfilt,
1221                                 sc->sc_curbssid, sc->sc_curaid);
1222
1223                         /* need to reconfigure the beacon */
1224                         sc->sc_flags &= ~SC_OP_BEACONS ;
1225
1226                         break;
1227                 default:
1228                         break;
1229                 }
1230         }
1231
1232         if ((conf->changed & IEEE80211_IFCC_BEACON) &&
1233             ((vif->type == NL80211_IFTYPE_ADHOC) ||
1234              (vif->type == NL80211_IFTYPE_AP))) {
1235                 /*
1236                  * Allocate and setup the beacon frame.
1237                  *
1238                  * Stop any previous beacon DMA.  This may be
1239                  * necessary, for example, when an ibss merge
1240                  * causes reconfiguration; we may be called
1241                  * with beacon transmission active.
1242                  */
1243                 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
1244
1245                 error = ath_beacon_alloc(sc, 0);
1246                 if (error != 0)
1247                         return error;
1248
1249                 ath_beacon_sync(sc, 0);
1250         }
1251
1252         /* Check for WLAN_CAPABILITY_PRIVACY ? */
1253         if ((avp->av_opmode != ATH9K_M_STA)) {
1254                 for (i = 0; i < IEEE80211_WEP_NKID; i++)
1255                         if (ath9k_hw_keyisvalid(sc->sc_ah, (u16)i))
1256                                 ath9k_hw_keysetmac(sc->sc_ah,
1257                                                    (u16)i,
1258                                                    sc->sc_curbssid);
1259         }
1260
1261         /* Only legacy IBSS for now */
1262         if (vif->type == NL80211_IFTYPE_ADHOC)
1263                 ath_update_chainmask(sc, 0);
1264
1265         return 0;
1266 }
1267
1268 #define SUPPORTED_FILTERS                       \
1269         (FIF_PROMISC_IN_BSS |                   \
1270         FIF_ALLMULTI |                          \
1271         FIF_CONTROL |                           \
1272         FIF_OTHER_BSS |                         \
1273         FIF_BCN_PRBRESP_PROMISC |               \
1274         FIF_FCSFAIL)
1275
1276 /* FIXME: sc->sc_full_reset ? */
1277 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1278                                    unsigned int changed_flags,
1279                                    unsigned int *total_flags,
1280                                    int mc_count,
1281                                    struct dev_mc_list *mclist)
1282 {
1283         struct ath_softc *sc = hw->priv;
1284         u32 rfilt;
1285
1286         changed_flags &= SUPPORTED_FILTERS;
1287         *total_flags &= SUPPORTED_FILTERS;
1288
1289         sc->rx_filter = *total_flags;
1290         rfilt = ath_calcrxfilter(sc);
1291         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1292
1293         if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1294                 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
1295                         ath9k_hw_write_associd(sc->sc_ah, ath_bcast_mac, 0);
1296         }
1297
1298         DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set HW RX filter: 0x%x\n",
1299                 __func__, sc->rx_filter);
1300 }
1301
1302 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1303                              struct ieee80211_vif *vif,
1304                              enum sta_notify_cmd cmd,
1305                              struct ieee80211_sta *sta)
1306 {
1307         struct ath_softc *sc = hw->priv;
1308
1309         switch (cmd) {
1310         case STA_NOTIFY_ADD:
1311                 ath_node_attach(sc, sta);
1312                 break;
1313         case STA_NOTIFY_REMOVE:
1314                 ath_node_detach(sc, sta);
1315                 break;
1316         default:
1317                 break;
1318         }
1319 }
1320
1321 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1322                          u16 queue,
1323                          const struct ieee80211_tx_queue_params *params)
1324 {
1325         struct ath_softc *sc = hw->priv;
1326         struct ath9k_tx_queue_info qi;
1327         int ret = 0, qnum;
1328
1329         if (queue >= WME_NUM_AC)
1330                 return 0;
1331
1332         qi.tqi_aifs = params->aifs;
1333         qi.tqi_cwmin = params->cw_min;
1334         qi.tqi_cwmax = params->cw_max;
1335         qi.tqi_burstTime = params->txop;
1336         qnum = ath_get_hal_qnum(queue, sc);
1337
1338         DPRINTF(sc, ATH_DBG_CONFIG,
1339                 "%s: Configure tx [queue/halq] [%d/%d],  "
1340                 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1341                 __func__,
1342                 queue,
1343                 qnum,
1344                 params->aifs,
1345                 params->cw_min,
1346                 params->cw_max,
1347                 params->txop);
1348
1349         ret = ath_txq_update(sc, qnum, &qi);
1350         if (ret)
1351                 DPRINTF(sc, ATH_DBG_FATAL,
1352                         "%s: TXQ Update failed\n", __func__);
1353
1354         return ret;
1355 }
1356
1357 static int ath9k_set_key(struct ieee80211_hw *hw,
1358                          enum set_key_cmd cmd,
1359                          const u8 *local_addr,
1360                          const u8 *addr,
1361                          struct ieee80211_key_conf *key)
1362 {
1363         struct ath_softc *sc = hw->priv;
1364         int ret = 0;
1365
1366         DPRINTF(sc, ATH_DBG_KEYCACHE, " %s: Set HW Key\n", __func__);
1367
1368         switch (cmd) {
1369         case SET_KEY:
1370                 ret = ath_key_config(sc, addr, key);
1371                 if (!ret) {
1372                         set_bit(key->keyidx, sc->sc_keymap);
1373                         key->hw_key_idx = key->keyidx;
1374                         /* push IV and Michael MIC generation to stack */
1375                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1376                         if (key->alg == ALG_TKIP)
1377                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1378                 }
1379                 break;
1380         case DISABLE_KEY:
1381                 ath_key_delete(sc, key);
1382                 clear_bit(key->keyidx, sc->sc_keymap);
1383                 break;
1384         default:
1385                 ret = -EINVAL;
1386         }
1387
1388         return ret;
1389 }
1390
1391 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1392                                    struct ieee80211_vif *vif,
1393                                    struct ieee80211_bss_conf *bss_conf,
1394                                    u32 changed)
1395 {
1396         struct ath_softc *sc = hw->priv;
1397
1398         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1399                 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed PREAMBLE %d\n",
1400                         __func__,
1401                         bss_conf->use_short_preamble);
1402                 if (bss_conf->use_short_preamble)
1403                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1404                 else
1405                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1406         }
1407
1408         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1409                 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed CTS PROT %d\n",
1410                         __func__,
1411                         bss_conf->use_cts_prot);
1412                 if (bss_conf->use_cts_prot &&
1413                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1414                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1415                 else
1416                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1417         }
1418
1419         if (changed & BSS_CHANGED_HT) {
1420                 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed HT\n",
1421                         __func__);
1422                 ath9k_ht_conf(sc, bss_conf);
1423         }
1424
1425         if (changed & BSS_CHANGED_ASSOC) {
1426                 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed ASSOC %d\n",
1427                         __func__,
1428                         bss_conf->assoc);
1429                 ath9k_bss_assoc_info(sc, vif, bss_conf);
1430         }
1431 }
1432
1433 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1434 {
1435         u64 tsf;
1436         struct ath_softc *sc = hw->priv;
1437         struct ath_hal *ah = sc->sc_ah;
1438
1439         tsf = ath9k_hw_gettsf64(ah);
1440
1441         return tsf;
1442 }
1443
1444 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1445 {
1446         struct ath_softc *sc = hw->priv;
1447         struct ath_hal *ah = sc->sc_ah;
1448
1449         ath9k_hw_reset_tsf(ah);
1450 }
1451
1452 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1453                        enum ieee80211_ampdu_mlme_action action,
1454                        struct ieee80211_sta *sta,
1455                        u16 tid, u16 *ssn)
1456 {
1457         struct ath_softc *sc = hw->priv;
1458         int ret = 0;
1459
1460         switch (action) {
1461         case IEEE80211_AMPDU_RX_START:
1462                 if (!(sc->sc_flags & SC_OP_RXAGGR))
1463                         ret = -ENOTSUPP;
1464                 break;
1465         case IEEE80211_AMPDU_RX_STOP:
1466                 break;
1467         case IEEE80211_AMPDU_TX_START:
1468                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
1469                 if (ret < 0)
1470                         DPRINTF(sc, ATH_DBG_FATAL,
1471                                 "%s: Unable to start TX aggregation\n",
1472                                 __func__);
1473                 else
1474                         ieee80211_start_tx_ba_cb_irqsafe(hw, sta->addr, tid);
1475                 break;
1476         case IEEE80211_AMPDU_TX_STOP:
1477                 ret = ath_tx_aggr_stop(sc, sta, tid);
1478                 if (ret < 0)
1479                         DPRINTF(sc, ATH_DBG_FATAL,
1480                                 "%s: Unable to stop TX aggregation\n",
1481                                 __func__);
1482
1483                 ieee80211_stop_tx_ba_cb_irqsafe(hw, sta->addr, tid);
1484                 break;
1485         case IEEE80211_AMPDU_TX_RESUME:
1486                 ath_tx_aggr_resume(sc, sta, tid);
1487                 break;
1488         default:
1489                 DPRINTF(sc, ATH_DBG_FATAL,
1490                         "%s: Unknown AMPDU action\n", __func__);
1491         }
1492
1493         return ret;
1494 }
1495
1496 static int ath9k_no_fragmentation(struct ieee80211_hw *hw, u32 value)
1497 {
1498         return -EOPNOTSUPP;
1499 }
1500
1501 static struct ieee80211_ops ath9k_ops = {
1502         .tx                 = ath9k_tx,
1503         .start              = ath9k_start,
1504         .stop               = ath9k_stop,
1505         .add_interface      = ath9k_add_interface,
1506         .remove_interface   = ath9k_remove_interface,
1507         .config             = ath9k_config,
1508         .config_interface   = ath9k_config_interface,
1509         .configure_filter   = ath9k_configure_filter,
1510         .sta_notify         = ath9k_sta_notify,
1511         .conf_tx            = ath9k_conf_tx,
1512         .bss_info_changed   = ath9k_bss_info_changed,
1513         .set_key            = ath9k_set_key,
1514         .get_tsf            = ath9k_get_tsf,
1515         .reset_tsf          = ath9k_reset_tsf,
1516         .ampdu_action       = ath9k_ampdu_action,
1517         .set_frag_threshold = ath9k_no_fragmentation,
1518 };
1519
1520 static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1521 {
1522         void __iomem *mem;
1523         struct ath_softc *sc;
1524         struct ieee80211_hw *hw;
1525         const char *athname;
1526         u8 csz;
1527         u32 val;
1528         int ret = 0;
1529
1530         if (pci_enable_device(pdev))
1531                 return -EIO;
1532
1533         /* XXX 32-bit addressing only */
1534         if (pci_set_dma_mask(pdev, 0xffffffff)) {
1535                 printk(KERN_ERR "ath_pci: 32-bit DMA not available\n");
1536                 ret = -ENODEV;
1537                 goto bad;
1538         }
1539
1540         /*
1541          * Cache line size is used to size and align various
1542          * structures used to communicate with the hardware.
1543          */
1544         pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz);
1545         if (csz == 0) {
1546                 /*
1547                  * Linux 2.4.18 (at least) writes the cache line size
1548                  * register as a 16-bit wide register which is wrong.
1549                  * We must have this setup properly for rx buffer
1550                  * DMA to work so force a reasonable value here if it
1551                  * comes up zero.
1552                  */
1553                 csz = L1_CACHE_BYTES / sizeof(u32);
1554                 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
1555         }
1556         /*
1557          * The default setting of latency timer yields poor results,
1558          * set it to the value used by other systems. It may be worth
1559          * tweaking this setting more.
1560          */
1561         pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8);
1562
1563         pci_set_master(pdev);
1564
1565         /*
1566          * Disable the RETRY_TIMEOUT register (0x41) to keep
1567          * PCI Tx retries from interfering with C3 CPU state.
1568          */
1569         pci_read_config_dword(pdev, 0x40, &val);
1570         if ((val & 0x0000ff00) != 0)
1571                 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1572
1573         ret = pci_request_region(pdev, 0, "ath9k");
1574         if (ret) {
1575                 dev_err(&pdev->dev, "PCI memory region reserve error\n");
1576                 ret = -ENODEV;
1577                 goto bad;
1578         }
1579
1580         mem = pci_iomap(pdev, 0, 0);
1581         if (!mem) {
1582                 printk(KERN_ERR "PCI memory map error\n") ;
1583                 ret = -EIO;
1584                 goto bad1;
1585         }
1586
1587         hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops);
1588         if (hw == NULL) {
1589                 printk(KERN_ERR "ath_pci: no memory for ieee80211_hw\n");
1590                 goto bad2;
1591         }
1592
1593         SET_IEEE80211_DEV(hw, &pdev->dev);
1594         pci_set_drvdata(pdev, hw);
1595
1596         sc = hw->priv;
1597         sc->hw = hw;
1598         sc->pdev = pdev;
1599         sc->mem = mem;
1600
1601         if (ath_attach(id->device, sc) != 0) {
1602                 ret = -ENODEV;
1603                 goto bad3;
1604         }
1605
1606         /* setup interrupt service routine */
1607
1608         if (request_irq(pdev->irq, ath_isr, IRQF_SHARED, "ath", sc)) {
1609                 printk(KERN_ERR "%s: request_irq failed\n",
1610                         wiphy_name(hw->wiphy));
1611                 ret = -EIO;
1612                 goto bad4;
1613         }
1614
1615         athname = ath9k_hw_probe(id->vendor, id->device);
1616
1617         printk(KERN_INFO "%s: %s: mem=0x%lx, irq=%d\n",
1618                wiphy_name(hw->wiphy),
1619                athname ? athname : "Atheros ???",
1620                (unsigned long)mem, pdev->irq);
1621
1622         return 0;
1623 bad4:
1624         ath_detach(sc);
1625 bad3:
1626         ieee80211_free_hw(hw);
1627 bad2:
1628         pci_iounmap(pdev, mem);
1629 bad1:
1630         pci_release_region(pdev, 0);
1631 bad:
1632         pci_disable_device(pdev);
1633         return ret;
1634 }
1635
1636 static void ath_pci_remove(struct pci_dev *pdev)
1637 {
1638         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1639         struct ath_softc *sc = hw->priv;
1640
1641         ath_detach(sc);
1642         if (pdev->irq)
1643                 free_irq(pdev->irq, sc);
1644         pci_iounmap(pdev, sc->mem);
1645         pci_release_region(pdev, 0);
1646         pci_disable_device(pdev);
1647         ieee80211_free_hw(hw);
1648 }
1649
1650 #ifdef CONFIG_PM
1651
1652 static int ath_pci_suspend(struct pci_dev *pdev, pm_message_t state)
1653 {
1654         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1655         struct ath_softc *sc = hw->priv;
1656
1657         ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
1658
1659 #ifdef CONFIG_RFKILL
1660         if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1661                 cancel_delayed_work_sync(&sc->rf_kill.rfkill_poll);
1662 #endif
1663
1664         pci_save_state(pdev);
1665         pci_disable_device(pdev);
1666         pci_set_power_state(pdev, 3);
1667
1668         return 0;
1669 }
1670
1671 static int ath_pci_resume(struct pci_dev *pdev)
1672 {
1673         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1674         struct ath_softc *sc = hw->priv;
1675         u32 val;
1676         int err;
1677
1678         err = pci_enable_device(pdev);
1679         if (err)
1680                 return err;
1681         pci_restore_state(pdev);
1682         /*
1683          * Suspend/Resume resets the PCI configuration space, so we have to
1684          * re-disable the RETRY_TIMEOUT register (0x41) to keep
1685          * PCI Tx retries from interfering with C3 CPU state
1686          */
1687         pci_read_config_dword(pdev, 0x40, &val);
1688         if ((val & 0x0000ff00) != 0)
1689                 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1690
1691         /* Enable LED */
1692         ath9k_hw_cfg_output(sc->sc_ah, ATH_LED_PIN,
1693                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
1694         ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
1695
1696 #ifdef CONFIG_RFKILL
1697         /*
1698          * check the h/w rfkill state on resume
1699          * and start the rfkill poll timer
1700          */
1701         if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1702                 queue_delayed_work(sc->hw->workqueue,
1703                                    &sc->rf_kill.rfkill_poll, 0);
1704 #endif
1705
1706         return 0;
1707 }
1708
1709 #endif /* CONFIG_PM */
1710
1711 MODULE_DEVICE_TABLE(pci, ath_pci_id_table);
1712
1713 static struct pci_driver ath_pci_driver = {
1714         .name       = "ath9k",
1715         .id_table   = ath_pci_id_table,
1716         .probe      = ath_pci_probe,
1717         .remove     = ath_pci_remove,
1718 #ifdef CONFIG_PM
1719         .suspend    = ath_pci_suspend,
1720         .resume     = ath_pci_resume,
1721 #endif /* CONFIG_PM */
1722 };
1723
1724 static int __init init_ath_pci(void)
1725 {
1726         printk(KERN_INFO "%s: %s\n", dev_info, ATH_PCI_VERSION);
1727
1728         if (pci_register_driver(&ath_pci_driver) < 0) {
1729                 printk(KERN_ERR
1730                         "ath_pci: No devices found, driver not installed.\n");
1731                 pci_unregister_driver(&ath_pci_driver);
1732                 return -ENODEV;
1733         }
1734
1735         return 0;
1736 }
1737 module_init(init_ath_pci);
1738
1739 static void __exit exit_ath_pci(void)
1740 {
1741         pci_unregister_driver(&ath_pci_driver);
1742         printk(KERN_INFO "%s: driver unloaded\n", dev_info);
1743 }
1744 module_exit(exit_ath_pci);