2 * Copyright (c) 2008 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 /* mac80211 and PCI callbacks */
19 #include <linux/nl80211.h>
22 #define ATH_PCI_VERSION "0.1"
24 #define IEEE80211_HTCAP_MAXRXAMPDU_FACTOR 13
26 static char *dev_info = "ath9k";
28 MODULE_AUTHOR("Atheros Communications");
29 MODULE_DESCRIPTION("Support for Atheros 802.11n wireless LAN cards.");
30 MODULE_SUPPORTED_DEVICE("Atheros 802.11n WLAN cards");
31 MODULE_LICENSE("Dual BSD/GPL");
33 static struct pci_device_id ath_pci_id_table[] __devinitdata = {
34 { PCI_VDEVICE(ATHEROS, 0x0023) }, /* PCI */
35 { PCI_VDEVICE(ATHEROS, 0x0024) }, /* PCI-E */
36 { PCI_VDEVICE(ATHEROS, 0x0027) }, /* PCI */
37 { PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI */
38 { PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */
42 static int ath_get_channel(struct ath_softc *sc,
43 struct ieee80211_channel *chan)
47 for (i = 0; i < sc->sc_ah->ah_nchan; i++) {
48 if (sc->sc_ah->ah_channels[i].channel == chan->center_freq)
55 static u32 ath_get_extchanmode(struct ath_softc *sc,
56 struct ieee80211_channel *chan)
59 u8 ext_chan_offset = sc->sc_ht_info.ext_chan_offset;
60 enum ath9k_ht_macmode tx_chan_width = sc->sc_ht_info.tx_chan_width;
63 case IEEE80211_BAND_2GHZ:
64 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_NONE) &&
65 (tx_chan_width == ATH9K_HT_MACMODE_20))
66 chanmode = CHANNEL_G_HT20;
67 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_ABOVE) &&
68 (tx_chan_width == ATH9K_HT_MACMODE_2040))
69 chanmode = CHANNEL_G_HT40PLUS;
70 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_BELOW) &&
71 (tx_chan_width == ATH9K_HT_MACMODE_2040))
72 chanmode = CHANNEL_G_HT40MINUS;
74 case IEEE80211_BAND_5GHZ:
75 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_NONE) &&
76 (tx_chan_width == ATH9K_HT_MACMODE_20))
77 chanmode = CHANNEL_A_HT20;
78 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_ABOVE) &&
79 (tx_chan_width == ATH9K_HT_MACMODE_2040))
80 chanmode = CHANNEL_A_HT40PLUS;
81 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_BELOW) &&
82 (tx_chan_width == ATH9K_HT_MACMODE_2040))
83 chanmode = CHANNEL_A_HT40MINUS;
93 static int ath_setkey_tkip(struct ath_softc *sc,
94 struct ieee80211_key_conf *key,
95 struct ath9k_keyval *hk,
101 key_txmic = key->key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
102 key_rxmic = key->key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
105 /* Group key installation */
106 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
107 return ath_keyset(sc, key->keyidx, hk, addr);
109 if (!sc->sc_splitmic) {
111 * data key goes at first index,
112 * the hal handles the MIC keys at index+64.
114 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
115 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
116 return ath_keyset(sc, key->keyidx, hk, addr);
119 * TX key goes at first index, RX key at +32.
120 * The hal handles the MIC keys at index+64.
122 memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
123 if (!ath_keyset(sc, key->keyidx, hk, NULL)) {
124 /* Txmic entry failed. No need to proceed further */
125 DPRINTF(sc, ATH_DBG_KEYCACHE,
126 "%s Setting TX MIC Key Failed\n", __func__);
130 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
131 /* XXX delete tx key on failure? */
132 return ath_keyset(sc, key->keyidx+32, hk, addr);
135 static int ath_key_config(struct ath_softc *sc,
137 struct ieee80211_key_conf *key)
139 struct ieee80211_vif *vif;
140 struct ath9k_keyval hk;
141 const u8 *mac = NULL;
143 enum nl80211_iftype opmode;
145 memset(&hk, 0, sizeof(hk));
149 hk.kv_type = ATH9K_CIPHER_WEP;
152 hk.kv_type = ATH9K_CIPHER_TKIP;
155 hk.kv_type = ATH9K_CIPHER_AES_CCM;
161 hk.kv_len = key->keylen;
162 memcpy(hk.kv_val, key->key, key->keylen);
167 vif = sc->sc_vaps[0]->av_if_data;
172 * For _M_STA mc tx, we will not setup a key at all since we never
174 * _M_STA mc rx, we will use the keyID.
175 * for _M_IBSS mc tx, we will use the keyID, and no macaddr.
176 * for _M_IBSS mc rx, we will alloc a slot and plumb the mac of the
177 * peer node. BUT we will plumb a cleartext key so that we can do
178 * perSta default key table lookup in software.
180 if (is_broadcast_ether_addr(addr)) {
182 case NL80211_IFTYPE_STATION:
183 /* default key: could be group WPA key
184 * or could be static WEP key */
187 case NL80211_IFTYPE_ADHOC:
189 case NL80211_IFTYPE_AP:
199 if (key->alg == ALG_TKIP)
200 ret = ath_setkey_tkip(sc, key, &hk, mac);
202 ret = ath_keyset(sc, key->keyidx, &hk, mac);
210 static void ath_key_delete(struct ath_softc *sc, struct ieee80211_key_conf *key)
214 freeslot = (key->keyidx >= 4) ? 1 : 0;
215 ath_key_reset(sc, key->keyidx, freeslot);
218 static void setup_ht_cap(struct ieee80211_ht_info *ht_info)
220 #define ATH9K_HT_CAP_MAXRXAMPDU_65536 0x3 /* 2 ^ 16 */
221 #define ATH9K_HT_CAP_MPDUDENSITY_8 0x6 /* 8 usec */
223 ht_info->ht_supported = 1;
224 ht_info->cap = (u16)IEEE80211_HT_CAP_SUP_WIDTH
225 |(u16)IEEE80211_HT_CAP_SM_PS
226 |(u16)IEEE80211_HT_CAP_SGI_40
227 |(u16)IEEE80211_HT_CAP_DSSSCCK40;
229 ht_info->ampdu_factor = ATH9K_HT_CAP_MAXRXAMPDU_65536;
230 ht_info->ampdu_density = ATH9K_HT_CAP_MPDUDENSITY_8;
231 /* setup supported mcs set */
232 memset(ht_info->supp_mcs_set, 0, 16);
233 ht_info->supp_mcs_set[0] = 0xff;
234 ht_info->supp_mcs_set[1] = 0xff;
235 ht_info->supp_mcs_set[12] = IEEE80211_HT_CAP_MCS_TX_DEFINED;
238 static int ath_rate2idx(struct ath_softc *sc, int rate)
240 int i = 0, cur_band, n_rates;
241 struct ieee80211_hw *hw = sc->hw;
243 cur_band = hw->conf.channel->band;
244 n_rates = sc->sbands[cur_band].n_bitrates;
246 for (i = 0; i < n_rates; i++) {
247 if (sc->sbands[cur_band].bitrates[i].bitrate == rate)
252 * NB:mac80211 validates rx rate index against the supported legacy rate
253 * index only (should be done against ht rates also), return the highest
254 * legacy rate index for rx rate which does not match any one of the
255 * supported basic and extended rates to make mac80211 happy.
256 * The following hack will be cleaned up once the issue with
257 * the rx rate index validation in mac80211 is fixed.
264 static void ath9k_rx_prepare(struct ath_softc *sc,
266 struct ath_recv_status *status,
267 struct ieee80211_rx_status *rx_status)
269 struct ieee80211_hw *hw = sc->hw;
270 struct ieee80211_channel *curchan = hw->conf.channel;
272 memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
274 rx_status->mactime = status->tsf;
275 rx_status->band = curchan->band;
276 rx_status->freq = curchan->center_freq;
277 rx_status->noise = sc->sc_ani.sc_noise_floor;
278 rx_status->signal = rx_status->noise + status->rssi;
279 rx_status->rate_idx = ath_rate2idx(sc, (status->rateKbps / 100));
280 rx_status->antenna = status->antenna;
282 /* XXX Fix me, 64 cannot be the max rssi value, rigure it out */
283 rx_status->qual = status->rssi * 100 / 64;
285 if (status->flags & ATH_RX_MIC_ERROR)
286 rx_status->flag |= RX_FLAG_MMIC_ERROR;
287 if (status->flags & ATH_RX_FCS_ERROR)
288 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
290 rx_status->flag |= RX_FLAG_TSFT;
293 static u8 parse_mpdudensity(u8 mpdudensity)
296 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
297 * 0 for no restriction
306 switch (mpdudensity) {
312 /* Our lower layer calculations limit our precision to
328 static void ath9k_ht_conf(struct ath_softc *sc,
329 struct ieee80211_bss_conf *bss_conf)
331 #define IEEE80211_HT_CAP_40MHZ_INTOLERANT BIT(14)
332 struct ath_ht_info *ht_info = &sc->sc_ht_info;
334 if (bss_conf->assoc_ht) {
335 ht_info->ext_chan_offset =
336 bss_conf->ht_bss_conf->bss_cap &
337 IEEE80211_HT_IE_CHA_SEC_OFFSET;
339 if (!(bss_conf->ht_conf->cap &
340 IEEE80211_HT_CAP_40MHZ_INTOLERANT) &&
341 (bss_conf->ht_bss_conf->bss_cap &
342 IEEE80211_HT_IE_CHA_WIDTH))
343 ht_info->tx_chan_width = ATH9K_HT_MACMODE_2040;
345 ht_info->tx_chan_width = ATH9K_HT_MACMODE_20;
347 ath9k_hw_set11nmac2040(sc->sc_ah, ht_info->tx_chan_width);
348 ht_info->maxampdu = 1 << (IEEE80211_HTCAP_MAXRXAMPDU_FACTOR +
349 bss_conf->ht_conf->ampdu_factor);
350 ht_info->mpdudensity =
351 parse_mpdudensity(bss_conf->ht_conf->ampdu_density);
355 #undef IEEE80211_HT_CAP_40MHZ_INTOLERANT
358 static void ath9k_bss_assoc_info(struct ath_softc *sc,
359 struct ieee80211_bss_conf *bss_conf)
361 struct ieee80211_hw *hw = sc->hw;
362 struct ieee80211_channel *curchan = hw->conf.channel;
365 DECLARE_MAC_BUF(mac);
367 if (bss_conf->assoc) {
368 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Bss Info ASSOC %d\n",
372 avp = sc->sc_vaps[0];
374 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
379 /* New association, store aid */
380 if (avp->av_opmode == ATH9K_M_STA) {
381 sc->sc_curaid = bss_conf->aid;
382 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
386 /* Configure the beacon */
387 ath_beacon_config(sc, 0);
388 sc->sc_flags |= SC_OP_BEACONS;
390 /* Reset rssi stats */
391 sc->sc_halstats.ns_avgbrssi = ATH_RSSI_DUMMY_MARKER;
392 sc->sc_halstats.ns_avgrssi = ATH_RSSI_DUMMY_MARKER;
393 sc->sc_halstats.ns_avgtxrssi = ATH_RSSI_DUMMY_MARKER;
394 sc->sc_halstats.ns_avgtxrate = ATH_RATE_DUMMY_MARKER;
396 /* Update chainmask */
397 ath_update_chainmask(sc, bss_conf->assoc_ht);
399 DPRINTF(sc, ATH_DBG_CONFIG,
400 "%s: bssid %s aid 0x%x\n",
402 print_mac(mac, sc->sc_curbssid), sc->sc_curaid);
404 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
406 curchan->center_freq);
408 pos = ath_get_channel(sc, curchan);
410 DPRINTF(sc, ATH_DBG_FATAL,
411 "%s: Invalid channel\n", __func__);
415 if (hw->conf.ht_conf.ht_supported)
416 sc->sc_ah->ah_channels[pos].chanmode =
417 ath_get_extchanmode(sc, curchan);
419 sc->sc_ah->ah_channels[pos].chanmode =
420 (curchan->band == IEEE80211_BAND_2GHZ) ?
421 CHANNEL_G : CHANNEL_A;
423 /* set h/w channel */
424 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
425 DPRINTF(sc, ATH_DBG_FATAL,
426 "%s: Unable to set channel\n",
429 ath_rate_newstate(sc, avp);
430 /* Update ratectrl about the new state */
431 ath_rc_node_update(hw, avp->rc_node);
434 mod_timer(&sc->sc_ani.timer,
435 jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
438 DPRINTF(sc, ATH_DBG_CONFIG,
439 "%s: Bss Info DISSOC\n", __func__);
444 void ath_get_beaconconfig(struct ath_softc *sc,
446 struct ath_beacon_config *conf)
448 struct ieee80211_hw *hw = sc->hw;
450 /* fill in beacon config data */
452 conf->beacon_interval = hw->conf.beacon_int;
453 conf->listen_interval = 100;
454 conf->dtim_count = 1;
455 conf->bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf->listen_interval;
458 void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
459 struct ath_xmit_status *tx_status, struct ath_node *an)
461 struct ieee80211_hw *hw = sc->hw;
462 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
464 DPRINTF(sc, ATH_DBG_XMIT,
465 "%s: TX complete: skb: %p\n", __func__, skb);
467 if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK ||
468 tx_info->flags & IEEE80211_TX_STAT_TX_FILTERED) {
469 /* free driver's private data area of tx_info */
470 if (tx_info->driver_data[0] != NULL)
471 kfree(tx_info->driver_data[0]);
472 tx_info->driver_data[0] = NULL;
475 if (tx_status->flags & ATH_TX_BAR) {
476 tx_info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
477 tx_status->flags &= ~ATH_TX_BAR;
480 if (tx_status->flags & (ATH_TX_ERROR | ATH_TX_XRETRY)) {
481 if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK)) {
482 /* Frame was not ACKed, but an ACK was expected */
483 tx_info->status.excessive_retries = 1;
486 /* Frame was ACKed */
487 tx_info->flags |= IEEE80211_TX_STAT_ACK;
490 tx_info->status.retry_count = tx_status->retries;
492 ieee80211_tx_status(hw, skb);
494 ath_node_put(sc, an, ATH9K_BH_STATUS_CHANGE);
497 int _ath_rx_indicate(struct ath_softc *sc,
499 struct ath_recv_status *status,
502 struct ieee80211_hw *hw = sc->hw;
503 struct ath_node *an = NULL;
504 struct ieee80211_rx_status rx_status;
505 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
506 int hdrlen = ieee80211_get_hdrlen_from_skb(skb);
510 /* see if any padding is done by the hw and remove it */
512 padsize = hdrlen % 4;
513 memmove(skb->data + padsize, skb->data, hdrlen);
514 skb_pull(skb, padsize);
517 /* Prepare rx status */
518 ath9k_rx_prepare(sc, skb, status, &rx_status);
520 if (!(keyix == ATH9K_RXKEYIX_INVALID) &&
521 !(status->flags & ATH_RX_DECRYPT_ERROR)) {
522 rx_status.flag |= RX_FLAG_DECRYPTED;
523 } else if ((le16_to_cpu(hdr->frame_control) & IEEE80211_FCTL_PROTECTED)
524 && !(status->flags & ATH_RX_DECRYPT_ERROR)
525 && skb->len >= hdrlen + 4) {
526 keyix = skb->data[hdrlen + 3] >> 6;
528 if (test_bit(keyix, sc->sc_keymap))
529 rx_status.flag |= RX_FLAG_DECRYPTED;
532 spin_lock_bh(&sc->node_lock);
533 an = ath_node_find(sc, hdr->addr2);
534 spin_unlock_bh(&sc->node_lock);
538 hw->conf.ht_conf.ht_supported,
541 if (!an || (st != ATH_RX_CONSUMED))
542 __ieee80211_rx(hw, skb, &rx_status);
547 int ath_rx_subframe(struct ath_node *an,
549 struct ath_recv_status *status)
551 struct ath_softc *sc = an->an_sc;
552 struct ieee80211_hw *hw = sc->hw;
553 struct ieee80211_rx_status rx_status;
555 /* Prepare rx status */
556 ath9k_rx_prepare(sc, skb, status, &rx_status);
557 if (!(status->flags & ATH_RX_DECRYPT_ERROR))
558 rx_status.flag |= RX_FLAG_DECRYPTED;
560 __ieee80211_rx(hw, skb, &rx_status);
565 /********************************/
567 /********************************/
569 static void ath_led_brightness(struct led_classdev *led_cdev,
570 enum led_brightness brightness)
572 struct ath_led *led = container_of(led_cdev, struct ath_led, led_cdev);
573 struct ath_softc *sc = led->sc;
575 switch (brightness) {
577 if (led->led_type == ATH_LED_ASSOC ||
578 led->led_type == ATH_LED_RADIO)
579 sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
580 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN,
581 (led->led_type == ATH_LED_RADIO) ? 1 :
582 !!(sc->sc_flags & SC_OP_LED_ASSOCIATED));
585 if (led->led_type == ATH_LED_ASSOC)
586 sc->sc_flags |= SC_OP_LED_ASSOCIATED;
587 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 0);
594 static int ath_register_led(struct ath_softc *sc, struct ath_led *led,
600 led->led_cdev.name = led->name;
601 led->led_cdev.default_trigger = trigger;
602 led->led_cdev.brightness_set = ath_led_brightness;
604 ret = led_classdev_register(wiphy_dev(sc->hw->wiphy), &led->led_cdev);
606 DPRINTF(sc, ATH_DBG_FATAL,
607 "Failed to register led:%s", led->name);
613 static void ath_unregister_led(struct ath_led *led)
615 if (led->registered) {
616 led_classdev_unregister(&led->led_cdev);
621 static void ath_deinit_leds(struct ath_softc *sc)
623 ath_unregister_led(&sc->assoc_led);
624 sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
625 ath_unregister_led(&sc->tx_led);
626 ath_unregister_led(&sc->rx_led);
627 ath_unregister_led(&sc->radio_led);
628 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
631 static void ath_init_leds(struct ath_softc *sc)
636 /* Configure gpio 1 for output */
637 ath9k_hw_cfg_output(sc->sc_ah, ATH_LED_PIN,
638 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
639 /* LED off, active low */
640 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
642 trigger = ieee80211_get_radio_led_name(sc->hw);
643 snprintf(sc->radio_led.name, sizeof(sc->radio_led.name),
644 "ath9k-%s:radio", wiphy_name(sc->hw->wiphy));
645 ret = ath_register_led(sc, &sc->radio_led, trigger);
646 sc->radio_led.led_type = ATH_LED_RADIO;
650 trigger = ieee80211_get_assoc_led_name(sc->hw);
651 snprintf(sc->assoc_led.name, sizeof(sc->assoc_led.name),
652 "ath9k-%s:assoc", wiphy_name(sc->hw->wiphy));
653 ret = ath_register_led(sc, &sc->assoc_led, trigger);
654 sc->assoc_led.led_type = ATH_LED_ASSOC;
658 trigger = ieee80211_get_tx_led_name(sc->hw);
659 snprintf(sc->tx_led.name, sizeof(sc->tx_led.name),
660 "ath9k-%s:tx", wiphy_name(sc->hw->wiphy));
661 ret = ath_register_led(sc, &sc->tx_led, trigger);
662 sc->tx_led.led_type = ATH_LED_TX;
666 trigger = ieee80211_get_rx_led_name(sc->hw);
667 snprintf(sc->rx_led.name, sizeof(sc->rx_led.name),
668 "ath9k-%s:rx", wiphy_name(sc->hw->wiphy));
669 ret = ath_register_led(sc, &sc->rx_led, trigger);
670 sc->rx_led.led_type = ATH_LED_RX;
681 /*******************/
683 /*******************/
685 static void ath_radio_enable(struct ath_softc *sc)
687 struct ath_hal *ah = sc->sc_ah;
690 spin_lock_bh(&sc->sc_resetlock);
691 if (!ath9k_hw_reset(ah, ah->ah_curchan,
692 sc->sc_ht_info.tx_chan_width,
695 sc->sc_ht_extprotspacing,
697 DPRINTF(sc, ATH_DBG_FATAL,
698 "%s: unable to reset channel %u (%uMhz) "
699 "flags 0x%x hal status %u\n", __func__,
700 ath9k_hw_mhz2ieee(ah,
701 ah->ah_curchan->channel,
702 ah->ah_curchan->channelFlags),
703 ah->ah_curchan->channel,
704 ah->ah_curchan->channelFlags, status);
706 spin_unlock_bh(&sc->sc_resetlock);
708 ath_update_txpow(sc);
709 if (ath_startrecv(sc) != 0) {
710 DPRINTF(sc, ATH_DBG_FATAL,
711 "%s: unable to restart recv logic\n", __func__);
715 if (sc->sc_flags & SC_OP_BEACONS)
716 ath_beacon_config(sc, ATH_IF_ID_ANY); /* restart beacons */
718 /* Re-Enable interrupts */
719 ath9k_hw_set_interrupts(ah, sc->sc_imask);
722 ath9k_hw_cfg_output(ah, ATH_LED_PIN,
723 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
724 ath9k_hw_set_gpio(ah, ATH_LED_PIN, 0);
726 ieee80211_wake_queues(sc->hw);
729 static void ath_radio_disable(struct ath_softc *sc)
731 struct ath_hal *ah = sc->sc_ah;
735 ieee80211_stop_queues(sc->hw);
738 ath9k_hw_set_gpio(ah, ATH_LED_PIN, 1);
739 ath9k_hw_cfg_gpio_input(ah, ATH_LED_PIN);
741 /* Disable interrupts */
742 ath9k_hw_set_interrupts(ah, 0);
744 ath_draintxq(sc, false); /* clear pending tx frames */
745 ath_stoprecv(sc); /* turn off frame recv */
746 ath_flushrecv(sc); /* flush recv queue */
748 spin_lock_bh(&sc->sc_resetlock);
749 if (!ath9k_hw_reset(ah, ah->ah_curchan,
750 sc->sc_ht_info.tx_chan_width,
753 sc->sc_ht_extprotspacing,
755 DPRINTF(sc, ATH_DBG_FATAL,
756 "%s: unable to reset channel %u (%uMhz) "
757 "flags 0x%x hal status %u\n", __func__,
758 ath9k_hw_mhz2ieee(ah,
759 ah->ah_curchan->channel,
760 ah->ah_curchan->channelFlags),
761 ah->ah_curchan->channel,
762 ah->ah_curchan->channelFlags, status);
764 spin_unlock_bh(&sc->sc_resetlock);
766 ath9k_hw_phy_disable(ah);
767 ath9k_hw_setpower(ah, ATH9K_PM_FULL_SLEEP);
770 static bool ath_is_rfkill_set(struct ath_softc *sc)
772 struct ath_hal *ah = sc->sc_ah;
774 return ath9k_hw_gpio_get(ah, ah->ah_rfkill_gpio) ==
775 ah->ah_rfkill_polarity;
778 /* h/w rfkill poll function */
779 static void ath_rfkill_poll(struct work_struct *work)
781 struct ath_softc *sc = container_of(work, struct ath_softc,
782 rf_kill.rfkill_poll.work);
785 if (sc->sc_flags & SC_OP_INVALID)
788 radio_on = !ath_is_rfkill_set(sc);
791 * enable/disable radio only when there is a
792 * state change in RF switch
794 if (radio_on == !!(sc->sc_flags & SC_OP_RFKILL_HW_BLOCKED)) {
795 enum rfkill_state state;
797 if (sc->sc_flags & SC_OP_RFKILL_SW_BLOCKED) {
798 state = radio_on ? RFKILL_STATE_SOFT_BLOCKED
799 : RFKILL_STATE_HARD_BLOCKED;
800 } else if (radio_on) {
801 ath_radio_enable(sc);
802 state = RFKILL_STATE_UNBLOCKED;
804 ath_radio_disable(sc);
805 state = RFKILL_STATE_HARD_BLOCKED;
808 if (state == RFKILL_STATE_HARD_BLOCKED)
809 sc->sc_flags |= SC_OP_RFKILL_HW_BLOCKED;
811 sc->sc_flags &= ~SC_OP_RFKILL_HW_BLOCKED;
813 rfkill_force_state(sc->rf_kill.rfkill, state);
816 queue_delayed_work(sc->hw->workqueue, &sc->rf_kill.rfkill_poll,
817 msecs_to_jiffies(ATH_RFKILL_POLL_INTERVAL));
820 /* s/w rfkill handler */
821 static int ath_sw_toggle_radio(void *data, enum rfkill_state state)
823 struct ath_softc *sc = data;
826 case RFKILL_STATE_SOFT_BLOCKED:
827 if (!(sc->sc_flags & (SC_OP_RFKILL_HW_BLOCKED |
828 SC_OP_RFKILL_SW_BLOCKED)))
829 ath_radio_disable(sc);
830 sc->sc_flags |= SC_OP_RFKILL_SW_BLOCKED;
832 case RFKILL_STATE_UNBLOCKED:
833 if ((sc->sc_flags & SC_OP_RFKILL_SW_BLOCKED)) {
834 sc->sc_flags &= ~SC_OP_RFKILL_SW_BLOCKED;
835 if (sc->sc_flags & SC_OP_RFKILL_HW_BLOCKED) {
836 DPRINTF(sc, ATH_DBG_FATAL, "Can't turn on the"
837 "radio as it is disabled by h/w \n");
840 ath_radio_enable(sc);
848 /* Init s/w rfkill */
849 static int ath_init_sw_rfkill(struct ath_softc *sc)
851 sc->rf_kill.rfkill = rfkill_allocate(wiphy_dev(sc->hw->wiphy),
853 if (!sc->rf_kill.rfkill) {
854 DPRINTF(sc, ATH_DBG_FATAL, "Failed to allocate rfkill\n");
858 snprintf(sc->rf_kill.rfkill_name, sizeof(sc->rf_kill.rfkill_name),
859 "ath9k-%s:rfkill", wiphy_name(sc->hw->wiphy));
860 sc->rf_kill.rfkill->name = sc->rf_kill.rfkill_name;
861 sc->rf_kill.rfkill->data = sc;
862 sc->rf_kill.rfkill->toggle_radio = ath_sw_toggle_radio;
863 sc->rf_kill.rfkill->state = RFKILL_STATE_UNBLOCKED;
864 sc->rf_kill.rfkill->user_claim_unsupported = 1;
869 /* Deinitialize rfkill */
870 static void ath_deinit_rfkill(struct ath_softc *sc)
872 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
873 cancel_delayed_work_sync(&sc->rf_kill.rfkill_poll);
875 if (sc->sc_flags & SC_OP_RFKILL_REGISTERED) {
876 rfkill_unregister(sc->rf_kill.rfkill);
877 sc->sc_flags &= ~SC_OP_RFKILL_REGISTERED;
878 sc->rf_kill.rfkill = NULL;
881 #endif /* CONFIG_RFKILL */
883 static int ath_detach(struct ath_softc *sc)
885 struct ieee80211_hw *hw = sc->hw;
887 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach ATH hw\n", __func__);
889 /* Deinit LED control */
894 ath_deinit_rfkill(sc);
899 ieee80211_unregister_hw(hw);
901 /* unregister Rate control */
902 ath_rate_control_unregister();
916 static int ath_attach(u16 devid,
917 struct ath_softc *sc)
919 struct ieee80211_hw *hw = sc->hw;
922 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach ATH hw\n", __func__);
924 error = ath_init(devid, sc);
930 INIT_LIST_HEAD(&sc->node_list);
931 spin_lock_init(&sc->node_lock);
933 /* get mac address from hardware and set in mac80211 */
935 SET_IEEE80211_PERM_ADDR(hw, sc->sc_myaddr);
937 /* setup channels and rates */
939 sc->sbands[IEEE80211_BAND_2GHZ].channels =
940 sc->channels[IEEE80211_BAND_2GHZ];
941 sc->sbands[IEEE80211_BAND_2GHZ].bitrates =
942 sc->rates[IEEE80211_BAND_2GHZ];
943 sc->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
945 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)
946 /* Setup HT capabilities for 2.4Ghz*/
947 setup_ht_cap(&sc->sbands[IEEE80211_BAND_2GHZ].ht_info);
949 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
950 &sc->sbands[IEEE80211_BAND_2GHZ];
952 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->ah_caps.wireless_modes)) {
953 sc->sbands[IEEE80211_BAND_5GHZ].channels =
954 sc->channels[IEEE80211_BAND_5GHZ];
955 sc->sbands[IEEE80211_BAND_5GHZ].bitrates =
956 sc->rates[IEEE80211_BAND_5GHZ];
957 sc->sbands[IEEE80211_BAND_5GHZ].band =
960 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)
961 /* Setup HT capabilities for 5Ghz*/
962 setup_ht_cap(&sc->sbands[IEEE80211_BAND_5GHZ].ht_info);
964 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
965 &sc->sbands[IEEE80211_BAND_5GHZ];
968 /* FIXME: Have to figure out proper hw init values later */
971 hw->ampdu_queues = 1;
973 /* Register rate control */
974 hw->rate_control_algorithm = "ath9k_rate_control";
975 error = ath_rate_control_register();
977 DPRINTF(sc, ATH_DBG_FATAL,
978 "%s: Unable to register rate control "
979 "algorithm:%d\n", __func__, error);
980 ath_rate_control_unregister();
984 error = ieee80211_register_hw(hw);
986 ath_rate_control_unregister();
990 /* Initialize LED control */
994 /* Initialze h/w Rfkill */
995 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
996 INIT_DELAYED_WORK(&sc->rf_kill.rfkill_poll, ath_rfkill_poll);
998 /* Initialize s/w rfkill */
999 if (ath_init_sw_rfkill(sc))
1003 /* initialize tx/rx engine */
1005 error = ath_tx_init(sc, ATH_TXBUF);
1009 error = ath_rx_init(sc, ATH_RXBUF);
1020 static int ath9k_start(struct ieee80211_hw *hw)
1022 struct ath_softc *sc = hw->priv;
1023 struct ieee80211_channel *curchan = hw->conf.channel;
1026 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Starting driver with "
1027 "initial channel: %d MHz\n", __func__, curchan->center_freq);
1029 /* setup initial channel */
1031 pos = ath_get_channel(sc, curchan);
1033 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
1037 sc->sc_ah->ah_channels[pos].chanmode =
1038 (curchan->band == IEEE80211_BAND_2GHZ) ? CHANNEL_G : CHANNEL_A;
1041 error = ath_open(sc, &sc->sc_ah->ah_channels[pos]);
1043 DPRINTF(sc, ATH_DBG_FATAL,
1044 "%s: Unable to complete ath_open\n", __func__);
1048 #ifdef CONFIG_RFKILL
1049 /* Start rfkill polling */
1050 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1051 queue_delayed_work(sc->hw->workqueue,
1052 &sc->rf_kill.rfkill_poll, 0);
1054 if (!(sc->sc_flags & SC_OP_RFKILL_REGISTERED)) {
1055 if (rfkill_register(sc->rf_kill.rfkill)) {
1056 DPRINTF(sc, ATH_DBG_FATAL,
1057 "Unable to register rfkill\n");
1058 rfkill_free(sc->rf_kill.rfkill);
1060 /* Deinitialize the device */
1062 free_irq(sc->pdev->irq, sc);
1064 pci_iounmap(sc->pdev, sc->mem);
1065 pci_release_region(sc->pdev, 0);
1066 pci_disable_device(sc->pdev);
1067 ieee80211_free_hw(hw);
1070 sc->sc_flags |= SC_OP_RFKILL_REGISTERED;
1075 ieee80211_wake_queues(hw);
1079 static int ath9k_tx(struct ieee80211_hw *hw,
1080 struct sk_buff *skb)
1082 struct ath_softc *sc = hw->priv;
1083 int hdrlen, padsize;
1084 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1087 * As a temporary workaround, assign seq# here; this will likely need
1088 * to be cleaned up to work better with Beacon transmission and virtual
1091 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1092 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1093 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1095 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1096 hdr->seq_ctrl |= cpu_to_le16(sc->seq_no);
1099 /* Add the padding after the header if this is not already done */
1100 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
1102 padsize = hdrlen % 4;
1103 if (skb_headroom(skb) < padsize)
1105 skb_push(skb, padsize);
1106 memmove(skb->data, skb->data + padsize, hdrlen);
1109 DPRINTF(sc, ATH_DBG_XMIT, "%s: transmitting packet, skb: %p\n",
1113 if (ath_tx_start(sc, skb) != 0) {
1114 DPRINTF(sc, ATH_DBG_XMIT, "%s: TX failed\n", __func__);
1115 dev_kfree_skb_any(skb);
1116 /* FIXME: Check for proper return value from ATH_DEV */
1123 static void ath9k_stop(struct ieee80211_hw *hw)
1125 struct ath_softc *sc = hw->priv;
1128 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Driver halt\n", __func__);
1130 error = ath_suspend(sc);
1132 DPRINTF(sc, ATH_DBG_CONFIG,
1133 "%s: Device is no longer present\n", __func__);
1135 ieee80211_stop_queues(hw);
1137 #ifdef CONFIG_RFKILL
1138 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1139 cancel_delayed_work_sync(&sc->rf_kill.rfkill_poll);
1143 static int ath9k_add_interface(struct ieee80211_hw *hw,
1144 struct ieee80211_if_init_conf *conf)
1146 struct ath_softc *sc = hw->priv;
1147 int error, ic_opmode = 0;
1149 /* Support only vap for now */
1154 switch (conf->type) {
1155 case NL80211_IFTYPE_STATION:
1156 ic_opmode = ATH9K_M_STA;
1158 case NL80211_IFTYPE_ADHOC:
1159 ic_opmode = ATH9K_M_IBSS;
1161 case NL80211_IFTYPE_AP:
1162 ic_opmode = ATH9K_M_HOSTAP;
1165 DPRINTF(sc, ATH_DBG_FATAL,
1166 "%s: Interface type %d not yet supported\n",
1167 __func__, conf->type);
1171 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a VAP of type: %d\n",
1175 error = ath_vap_attach(sc, 0, conf->vif, ic_opmode);
1177 DPRINTF(sc, ATH_DBG_FATAL,
1178 "%s: Unable to attach vap, error: %d\n",
1183 if (conf->type == NL80211_IFTYPE_AP) {
1184 /* TODO: is this a suitable place to start ANI for AP mode? */
1186 mod_timer(&sc->sc_ani.timer,
1187 jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
1193 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1194 struct ieee80211_if_init_conf *conf)
1196 struct ath_softc *sc = hw->priv;
1197 struct ath_vap *avp;
1200 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach VAP\n", __func__);
1202 avp = sc->sc_vaps[0];
1204 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
1209 #ifdef CONFIG_SLOW_ANT_DIV
1210 ath_slow_ant_div_stop(&sc->sc_antdiv);
1213 del_timer_sync(&sc->sc_ani.timer);
1215 /* Update ratectrl */
1216 ath_rate_newstate(sc, avp);
1218 /* Reclaim beacon resources */
1219 if (sc->sc_ah->ah_opmode == ATH9K_M_HOSTAP ||
1220 sc->sc_ah->ah_opmode == ATH9K_M_IBSS) {
1221 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
1222 ath_beacon_return(sc, avp);
1225 /* Set interrupt mask */
1226 sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1227 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_imask & ~ATH9K_INT_GLOBAL);
1228 sc->sc_flags &= ~SC_OP_BEACONS;
1230 error = ath_vap_detach(sc, 0);
1232 DPRINTF(sc, ATH_DBG_FATAL,
1233 "%s: Unable to detach vap, error: %d\n",
1237 static int ath9k_config(struct ieee80211_hw *hw,
1238 struct ieee80211_conf *conf)
1240 struct ath_softc *sc = hw->priv;
1241 struct ieee80211_channel *curchan = hw->conf.channel;
1244 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
1246 curchan->center_freq);
1248 pos = ath_get_channel(sc, curchan);
1250 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
1254 sc->sc_ah->ah_channels[pos].chanmode =
1255 (curchan->band == IEEE80211_BAND_2GHZ) ?
1256 CHANNEL_G : CHANNEL_A;
1258 if (sc->sc_curaid && hw->conf.ht_conf.ht_supported)
1259 sc->sc_ah->ah_channels[pos].chanmode =
1260 ath_get_extchanmode(sc, curchan);
1262 sc->sc_config.txpowlimit = 2 * conf->power_level;
1264 /* set h/w channel */
1265 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
1266 DPRINTF(sc, ATH_DBG_FATAL, "%s: Unable to set channel\n",
1272 static int ath9k_config_interface(struct ieee80211_hw *hw,
1273 struct ieee80211_vif *vif,
1274 struct ieee80211_if_conf *conf)
1276 struct ath_softc *sc = hw->priv;
1277 struct ath_hal *ah = sc->sc_ah;
1278 struct ath_vap *avp;
1281 DECLARE_MAC_BUF(mac);
1283 avp = sc->sc_vaps[0];
1285 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
1290 /* TODO: Need to decide which hw opmode to use for multi-interface
1292 if (vif->type == NL80211_IFTYPE_AP &&
1293 ah->ah_opmode != ATH9K_M_HOSTAP) {
1294 ah->ah_opmode = ATH9K_M_HOSTAP;
1295 ath9k_hw_setopmode(ah);
1296 ath9k_hw_write_associd(ah, sc->sc_myaddr, 0);
1297 /* Request full reset to get hw opmode changed properly */
1298 sc->sc_flags |= SC_OP_FULL_RESET;
1301 if ((conf->changed & IEEE80211_IFCC_BSSID) &&
1302 !is_zero_ether_addr(conf->bssid)) {
1303 switch (vif->type) {
1304 case NL80211_IFTYPE_STATION:
1305 case NL80211_IFTYPE_ADHOC:
1306 /* Update ratectrl about the new state */
1307 ath_rate_newstate(sc, avp);
1310 memcpy(sc->sc_curbssid, conf->bssid, ETH_ALEN);
1312 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
1315 /* Set aggregation protection mode parameters */
1316 sc->sc_config.ath_aggr_prot = 0;
1319 * Reset our TSF so that its value is lower than the
1320 * beacon that we are trying to catch.
1321 * Only then hw will update its TSF register with the
1322 * new beacon. Reset the TSF before setting the BSSID
1323 * to avoid allowing in any frames that would update
1324 * our TSF only to have us clear it
1325 * immediately thereafter.
1327 ath9k_hw_reset_tsf(sc->sc_ah);
1329 /* Disable BMISS interrupt when we're not associated */
1330 ath9k_hw_set_interrupts(sc->sc_ah,
1332 ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS));
1333 sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1335 DPRINTF(sc, ATH_DBG_CONFIG,
1336 "%s: RX filter 0x%x bssid %s aid 0x%x\n",
1338 print_mac(mac, sc->sc_curbssid), sc->sc_curaid);
1340 /* need to reconfigure the beacon */
1341 sc->sc_flags &= ~SC_OP_BEACONS ;
1349 if ((conf->changed & IEEE80211_IFCC_BEACON) &&
1350 ((vif->type == NL80211_IFTYPE_ADHOC) ||
1351 (vif->type == NL80211_IFTYPE_AP))) {
1353 * Allocate and setup the beacon frame.
1355 * Stop any previous beacon DMA. This may be
1356 * necessary, for example, when an ibss merge
1357 * causes reconfiguration; we may be called
1358 * with beacon transmission active.
1360 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
1362 error = ath_beacon_alloc(sc, 0);
1366 ath_beacon_sync(sc, 0);
1369 /* Check for WLAN_CAPABILITY_PRIVACY ? */
1370 if ((avp->av_opmode != NL80211_IFTYPE_STATION)) {
1371 for (i = 0; i < IEEE80211_WEP_NKID; i++)
1372 if (ath9k_hw_keyisvalid(sc->sc_ah, (u16)i))
1373 ath9k_hw_keysetmac(sc->sc_ah,
1378 /* Only legacy IBSS for now */
1379 if (vif->type == NL80211_IFTYPE_ADHOC)
1380 ath_update_chainmask(sc, 0);
1385 #define SUPPORTED_FILTERS \
1386 (FIF_PROMISC_IN_BSS | \
1390 FIF_BCN_PRBRESP_PROMISC | \
1393 /* FIXME: sc->sc_full_reset ? */
1394 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1395 unsigned int changed_flags,
1396 unsigned int *total_flags,
1398 struct dev_mc_list *mclist)
1400 struct ath_softc *sc = hw->priv;
1403 changed_flags &= SUPPORTED_FILTERS;
1404 *total_flags &= SUPPORTED_FILTERS;
1406 sc->rx_filter = *total_flags;
1407 rfilt = ath_calcrxfilter(sc);
1408 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1410 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1411 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
1412 ath9k_hw_write_associd(sc->sc_ah, ath_bcast_mac, 0);
1415 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set HW RX filter: 0x%x\n",
1416 __func__, sc->rx_filter);
1419 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1420 struct ieee80211_vif *vif,
1421 enum sta_notify_cmd cmd,
1422 struct ieee80211_sta *sta)
1424 struct ath_softc *sc = hw->priv;
1425 struct ath_node *an;
1426 unsigned long flags;
1427 DECLARE_MAC_BUF(mac);
1429 spin_lock_irqsave(&sc->node_lock, flags);
1430 an = ath_node_find(sc, sta->addr);
1431 spin_unlock_irqrestore(&sc->node_lock, flags);
1434 case STA_NOTIFY_ADD:
1435 spin_lock_irqsave(&sc->node_lock, flags);
1437 ath_node_attach(sc, sta->addr, 0);
1438 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a node: %s\n",
1439 __func__, print_mac(mac, sta->addr));
1441 ath_node_get(sc, sta->addr);
1443 spin_unlock_irqrestore(&sc->node_lock, flags);
1445 case STA_NOTIFY_REMOVE:
1447 DPRINTF(sc, ATH_DBG_FATAL,
1448 "%s: Removal of a non-existent node\n",
1451 ath_node_put(sc, an, ATH9K_BH_STATUS_INTACT);
1452 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Put a node: %s\n",
1454 print_mac(mac, sta->addr));
1462 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1464 const struct ieee80211_tx_queue_params *params)
1466 struct ath_softc *sc = hw->priv;
1467 struct ath9k_tx_queue_info qi;
1470 if (queue >= WME_NUM_AC)
1473 qi.tqi_aifs = params->aifs;
1474 qi.tqi_cwmin = params->cw_min;
1475 qi.tqi_cwmax = params->cw_max;
1476 qi.tqi_burstTime = params->txop;
1477 qnum = ath_get_hal_qnum(queue, sc);
1479 DPRINTF(sc, ATH_DBG_CONFIG,
1480 "%s: Configure tx [queue/halq] [%d/%d], "
1481 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1490 ret = ath_txq_update(sc, qnum, &qi);
1492 DPRINTF(sc, ATH_DBG_FATAL,
1493 "%s: TXQ Update failed\n", __func__);
1498 static int ath9k_set_key(struct ieee80211_hw *hw,
1499 enum set_key_cmd cmd,
1500 const u8 *local_addr,
1502 struct ieee80211_key_conf *key)
1504 struct ath_softc *sc = hw->priv;
1507 DPRINTF(sc, ATH_DBG_KEYCACHE, " %s: Set HW Key\n", __func__);
1511 ret = ath_key_config(sc, addr, key);
1513 set_bit(key->keyidx, sc->sc_keymap);
1514 key->hw_key_idx = key->keyidx;
1515 /* push IV and Michael MIC generation to stack */
1516 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1517 if (key->alg == ALG_TKIP)
1518 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1522 ath_key_delete(sc, key);
1523 clear_bit(key->keyidx, sc->sc_keymap);
1532 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1533 struct ieee80211_vif *vif,
1534 struct ieee80211_bss_conf *bss_conf,
1537 struct ath_softc *sc = hw->priv;
1539 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1540 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed PREAMBLE %d\n",
1542 bss_conf->use_short_preamble);
1543 if (bss_conf->use_short_preamble)
1544 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1546 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1549 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1550 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed CTS PROT %d\n",
1552 bss_conf->use_cts_prot);
1553 if (bss_conf->use_cts_prot &&
1554 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1555 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1557 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1560 if (changed & BSS_CHANGED_HT) {
1561 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed HT %d\n",
1563 bss_conf->assoc_ht);
1564 ath9k_ht_conf(sc, bss_conf);
1567 if (changed & BSS_CHANGED_ASSOC) {
1568 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed ASSOC %d\n",
1571 ath9k_bss_assoc_info(sc, bss_conf);
1575 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1578 struct ath_softc *sc = hw->priv;
1579 struct ath_hal *ah = sc->sc_ah;
1581 tsf = ath9k_hw_gettsf64(ah);
1586 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1588 struct ath_softc *sc = hw->priv;
1589 struct ath_hal *ah = sc->sc_ah;
1591 ath9k_hw_reset_tsf(ah);
1594 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1595 enum ieee80211_ampdu_mlme_action action,
1596 struct ieee80211_sta *sta,
1599 struct ath_softc *sc = hw->priv;
1603 case IEEE80211_AMPDU_RX_START:
1604 ret = ath_rx_aggr_start(sc, sta->addr, tid, ssn);
1606 DPRINTF(sc, ATH_DBG_FATAL,
1607 "%s: Unable to start RX aggregation\n",
1610 case IEEE80211_AMPDU_RX_STOP:
1611 ret = ath_rx_aggr_stop(sc, sta->addr, tid);
1613 DPRINTF(sc, ATH_DBG_FATAL,
1614 "%s: Unable to stop RX aggregation\n",
1617 case IEEE80211_AMPDU_TX_START:
1618 ret = ath_tx_aggr_start(sc, sta->addr, tid, ssn);
1620 DPRINTF(sc, ATH_DBG_FATAL,
1621 "%s: Unable to start TX aggregation\n",
1624 ieee80211_start_tx_ba_cb_irqsafe(hw, sta->addr, tid);
1626 case IEEE80211_AMPDU_TX_STOP:
1627 ret = ath_tx_aggr_stop(sc, sta->addr, tid);
1629 DPRINTF(sc, ATH_DBG_FATAL,
1630 "%s: Unable to stop TX aggregation\n",
1633 ieee80211_stop_tx_ba_cb_irqsafe(hw, sta->addr, tid);
1636 DPRINTF(sc, ATH_DBG_FATAL,
1637 "%s: Unknown AMPDU action\n", __func__);
1643 static int ath9k_no_fragmentation(struct ieee80211_hw *hw, u32 value)
1648 static struct ieee80211_ops ath9k_ops = {
1650 .start = ath9k_start,
1652 .add_interface = ath9k_add_interface,
1653 .remove_interface = ath9k_remove_interface,
1654 .config = ath9k_config,
1655 .config_interface = ath9k_config_interface,
1656 .configure_filter = ath9k_configure_filter,
1658 .sta_notify = ath9k_sta_notify,
1659 .conf_tx = ath9k_conf_tx,
1660 .get_tx_stats = NULL,
1661 .bss_info_changed = ath9k_bss_info_changed,
1663 .set_key = ath9k_set_key,
1665 .get_tkip_seq = NULL,
1666 .set_rts_threshold = NULL,
1667 .set_frag_threshold = NULL,
1668 .set_retry_limit = NULL,
1669 .get_tsf = ath9k_get_tsf,
1670 .reset_tsf = ath9k_reset_tsf,
1671 .tx_last_beacon = NULL,
1672 .ampdu_action = ath9k_ampdu_action,
1673 .set_frag_threshold = ath9k_no_fragmentation,
1676 static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1679 struct ath_softc *sc;
1680 struct ieee80211_hw *hw;
1681 const char *athname;
1686 if (pci_enable_device(pdev))
1689 /* XXX 32-bit addressing only */
1690 if (pci_set_dma_mask(pdev, 0xffffffff)) {
1691 printk(KERN_ERR "ath_pci: 32-bit DMA not available\n");
1697 * Cache line size is used to size and align various
1698 * structures used to communicate with the hardware.
1700 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz);
1703 * Linux 2.4.18 (at least) writes the cache line size
1704 * register as a 16-bit wide register which is wrong.
1705 * We must have this setup properly for rx buffer
1706 * DMA to work so force a reasonable value here if it
1709 csz = L1_CACHE_BYTES / sizeof(u32);
1710 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
1713 * The default setting of latency timer yields poor results,
1714 * set it to the value used by other systems. It may be worth
1715 * tweaking this setting more.
1717 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8);
1719 pci_set_master(pdev);
1722 * Disable the RETRY_TIMEOUT register (0x41) to keep
1723 * PCI Tx retries from interfering with C3 CPU state.
1725 pci_read_config_dword(pdev, 0x40, &val);
1726 if ((val & 0x0000ff00) != 0)
1727 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1729 ret = pci_request_region(pdev, 0, "ath9k");
1731 dev_err(&pdev->dev, "PCI memory region reserve error\n");
1736 mem = pci_iomap(pdev, 0, 0);
1738 printk(KERN_ERR "PCI memory map error\n") ;
1743 hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops);
1745 printk(KERN_ERR "ath_pci: no memory for ieee80211_hw\n");
1749 hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
1750 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1751 IEEE80211_HW_SIGNAL_DBM |
1752 IEEE80211_HW_NOISE_DBM;
1754 hw->wiphy->interface_modes =
1755 BIT(NL80211_IFTYPE_AP) |
1756 BIT(NL80211_IFTYPE_STATION) |
1757 BIT(NL80211_IFTYPE_ADHOC);
1759 SET_IEEE80211_DEV(hw, &pdev->dev);
1760 pci_set_drvdata(pdev, hw);
1767 if (ath_attach(id->device, sc) != 0) {
1772 /* setup interrupt service routine */
1774 if (request_irq(pdev->irq, ath_isr, IRQF_SHARED, "ath", sc)) {
1775 printk(KERN_ERR "%s: request_irq failed\n",
1776 wiphy_name(hw->wiphy));
1781 athname = ath9k_hw_probe(id->vendor, id->device);
1783 printk(KERN_INFO "%s: %s: mem=0x%lx, irq=%d\n",
1784 wiphy_name(hw->wiphy),
1785 athname ? athname : "Atheros ???",
1786 (unsigned long)mem, pdev->irq);
1792 ieee80211_free_hw(hw);
1794 pci_iounmap(pdev, mem);
1796 pci_release_region(pdev, 0);
1798 pci_disable_device(pdev);
1802 static void ath_pci_remove(struct pci_dev *pdev)
1804 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1805 struct ath_softc *sc = hw->priv;
1806 enum ath9k_int status;
1809 ath9k_hw_set_interrupts(sc->sc_ah, 0);
1811 ath9k_hw_getisr(sc->sc_ah, &status);
1812 sc->sc_flags |= SC_OP_INVALID;
1813 free_irq(pdev->irq, sc);
1817 pci_iounmap(pdev, sc->mem);
1818 pci_release_region(pdev, 0);
1819 pci_disable_device(pdev);
1820 ieee80211_free_hw(hw);
1825 static int ath_pci_suspend(struct pci_dev *pdev, pm_message_t state)
1827 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1828 struct ath_softc *sc = hw->priv;
1830 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
1832 #ifdef CONFIG_RFKILL
1833 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1834 cancel_delayed_work_sync(&sc->rf_kill.rfkill_poll);
1837 pci_save_state(pdev);
1838 pci_disable_device(pdev);
1839 pci_set_power_state(pdev, 3);
1844 static int ath_pci_resume(struct pci_dev *pdev)
1846 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1847 struct ath_softc *sc = hw->priv;
1851 err = pci_enable_device(pdev);
1854 pci_restore_state(pdev);
1856 * Suspend/Resume resets the PCI configuration space, so we have to
1857 * re-disable the RETRY_TIMEOUT register (0x41) to keep
1858 * PCI Tx retries from interfering with C3 CPU state
1860 pci_read_config_dword(pdev, 0x40, &val);
1861 if ((val & 0x0000ff00) != 0)
1862 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1865 ath9k_hw_cfg_output(sc->sc_ah, ATH_LED_PIN,
1866 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
1867 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
1869 #ifdef CONFIG_RFKILL
1871 * check the h/w rfkill state on resume
1872 * and start the rfkill poll timer
1874 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1875 queue_delayed_work(sc->hw->workqueue,
1876 &sc->rf_kill.rfkill_poll, 0);
1882 #endif /* CONFIG_PM */
1884 MODULE_DEVICE_TABLE(pci, ath_pci_id_table);
1886 static struct pci_driver ath_pci_driver = {
1888 .id_table = ath_pci_id_table,
1889 .probe = ath_pci_probe,
1890 .remove = ath_pci_remove,
1892 .suspend = ath_pci_suspend,
1893 .resume = ath_pci_resume,
1894 #endif /* CONFIG_PM */
1897 static int __init init_ath_pci(void)
1899 printk(KERN_INFO "%s: %s\n", dev_info, ATH_PCI_VERSION);
1901 if (pci_register_driver(&ath_pci_driver) < 0) {
1903 "ath_pci: No devices found, driver not installed.\n");
1904 pci_unregister_driver(&ath_pci_driver);
1910 module_init(init_ath_pci);
1912 static void __exit exit_ath_pci(void)
1914 pci_unregister_driver(&ath_pci_driver);
1915 printk(KERN_INFO "%s: driver unloaded\n", dev_info);
1917 module_exit(exit_ath_pci);