drivers/net/wireless/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 /* mac80211 and PCI callbacks */
  18
  19 #include <linux/nl80211.h>
  20 #include "core.h"
  21 #include "reg.h"
  22
  23 #define ATH_PCI_VERSION "0.1"
  24
  25 static char *dev_info = "ath9k";
  26
  27 MODULE_AUTHOR("Atheros Communications");
  28 MODULE_DESCRIPTION("Support for Atheros 802.11n wireless LAN cards.");
  29 MODULE_SUPPORTED_DEVICE("Atheros 802.11n WLAN cards");
  30 MODULE_LICENSE("Dual BSD/GPL");
  31
  32 static struct pci_device_id ath_pci_id_table[] __devinitdata = {
  33         { PCI_VDEVICE(ATHEROS, 0x0023) }, /* PCI   */
  34         { PCI_VDEVICE(ATHEROS, 0x0024) }, /* PCI-E */
  35         { PCI_VDEVICE(ATHEROS, 0x0027) }, /* PCI   */
  36         { PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI   */
  37         { PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */
  38         { 0 }
  39 };
  40
  41 static void ath_detach(struct ath_softc *sc);
  42
  43 static int ath_get_channel(struct ath_softc *sc,
  44                            struct ieee80211_channel *chan)
  45 {
  46         int i;
  47
  48         for (i = 0; i < sc->sc_ah->ah_nchan; i++) {
  49                 if (sc->sc_ah->ah_channels[i].channel == chan->center_freq)
  50                         return i;
  51         }
  52
  53         return -1;
  54 }
  55
  56 static u32 ath_get_extchanmode(struct ath_softc *sc,
  57                                      struct ieee80211_channel *chan)
  58 {
  59         u32 chanmode = 0;
  60         u8 ext_chan_offset = sc->sc_ht_info.ext_chan_offset;
  61         enum ath9k_ht_macmode tx_chan_width = sc->sc_ht_info.tx_chan_width;
  62
  63         switch (chan->band) {
  64         case IEEE80211_BAND_2GHZ:
  65                 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_NONE) &&
  66                     (tx_chan_width == ATH9K_HT_MACMODE_20))
  67                         chanmode = CHANNEL_G_HT20;
  68                 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE) &&
  69                     (tx_chan_width == ATH9K_HT_MACMODE_2040))
  70                         chanmode = CHANNEL_G_HT40PLUS;
  71                 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW) &&
  72                     (tx_chan_width == ATH9K_HT_MACMODE_2040))
  73                         chanmode = CHANNEL_G_HT40MINUS;
  74                 break;
  75         case IEEE80211_BAND_5GHZ:
  76                 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_NONE) &&
  77                     (tx_chan_width == ATH9K_HT_MACMODE_20))
  78                         chanmode = CHANNEL_A_HT20;
  79                 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE) &&
  80                     (tx_chan_width == ATH9K_HT_MACMODE_2040))
  81                         chanmode = CHANNEL_A_HT40PLUS;
  82                 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW) &&
  83                     (tx_chan_width == ATH9K_HT_MACMODE_2040))
  84                         chanmode = CHANNEL_A_HT40MINUS;
  85                 break;
  86         default:
  87                 break;
  88         }
  89
  90         return chanmode;
  91 }
  92
  93
  94 static int ath_setkey_tkip(struct ath_softc *sc,
  95                            struct ieee80211_key_conf *key,
  96                            struct ath9k_keyval *hk,
  97                            const u8 *addr)
  98 {
  99         u8 *key_rxmic = NULL;
 100         u8 *key_txmic = NULL;
 101
 102         key_txmic = key->key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
 103         key_rxmic = key->key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
 104
 105         if (addr == NULL) {
 106                 /* Group key installation */
 107                 memcpy(hk->kv_mic,  key_rxmic, sizeof(hk->kv_mic));
 108                 return ath_keyset(sc, key->keyidx, hk, addr);
 109         }
 110         if (!sc->sc_splitmic) {
 111                 /*
 112                  * data key goes at first index,
 113                  * the hal handles the MIC keys at index+64.
 114                  */
 115                 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
 116                 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
 117                 return ath_keyset(sc, key->keyidx, hk, addr);
 118         }
 119         /*
 120          * TX key goes at first index, RX key at +32.
 121          * The hal handles the MIC keys at index+64.
 122          */
 123         memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
 124         if (!ath_keyset(sc, key->keyidx, hk, NULL)) {
 125                 /* Txmic entry failed. No need to proceed further */
 126                 DPRINTF(sc, ATH_DBG_KEYCACHE,
 127                         "%s Setting TX MIC Key Failed\n", __func__);
 128                 return 0;
 129         }
 130
 131         memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
 132         /* XXX delete tx key on failure? */
 133         return ath_keyset(sc, key->keyidx+32, hk, addr);
 134 }
 135
 136 static int ath_key_config(struct ath_softc *sc,
 137                           const u8 *addr,
 138                           struct ieee80211_key_conf *key)
 139 {
 140         struct ieee80211_vif *vif;
 141         struct ath9k_keyval hk;
 142         const u8 *mac = NULL;
 143         int ret = 0;
 144         enum nl80211_iftype opmode;
 145
 146         memset(&hk, 0, sizeof(hk));
 147
 148         switch (key->alg) {
 149         case ALG_WEP:
 150                 hk.kv_type = ATH9K_CIPHER_WEP;
 151                 break;
 152         case ALG_TKIP:
 153                 hk.kv_type = ATH9K_CIPHER_TKIP;
 154                 break;
 155         case ALG_CCMP:
 156                 hk.kv_type = ATH9K_CIPHER_AES_CCM;
 157                 break;
 158         default:
 159                 return -EINVAL;
 160         }
 161
 162         hk.kv_len  = key->keylen;
 163         memcpy(hk.kv_val, key->key, key->keylen);
 164
 165         if (!sc->sc_vaps[0])
 166                 return -EIO;
 167
 168         vif = sc->sc_vaps[0];
 169         opmode = vif->type;
 170
 171         /*
 172          *  Strategy:
 173          *   For _M_STA mc tx, we will not setup a key at all since we never
 174          *   tx mc.
 175          *   _M_STA mc rx, we will use the keyID.
 176          *   for _M_IBSS mc tx, we will use the keyID, and no macaddr.
 177          *   for _M_IBSS mc rx, we will alloc a slot and plumb the mac of the
 178          *   peer node. BUT we will plumb a cleartext key so that we can do
 179          *   perSta default key table lookup in software.
 180          */
 181         if (is_broadcast_ether_addr(addr)) {
 182                 switch (opmode) {
 183                 case NL80211_IFTYPE_STATION:
 184                         /* default key:  could be group WPA key
 185                          * or could be static WEP key */
 186                         mac = NULL;
 187                         break;
 188                 case NL80211_IFTYPE_ADHOC:
 189                         break;
 190                 case NL80211_IFTYPE_AP:
 191                         break;
 192                 default:
 193                         ASSERT(0);
 194                         break;
 195                 }
 196         } else {
 197                 mac = addr;
 198         }
 199
 200         if (key->alg == ALG_TKIP)
 201                 ret = ath_setkey_tkip(sc, key, &hk, mac);
 202         else
 203                 ret = ath_keyset(sc, key->keyidx, &hk, mac);
 204
 205         if (!ret)
 206                 return -EIO;
 207
 208         return 0;
 209 }
 210
 211 static void ath_key_delete(struct ath_softc *sc, struct ieee80211_key_conf *key)
 212 {
 213         int freeslot;
 214
 215         freeslot = (key->keyidx >= 4) ? 1 : 0;
 216         ath_key_reset(sc, key->keyidx, freeslot);
 217 }
 218
 219 static void setup_ht_cap(struct ieee80211_sta_ht_cap *ht_info)
 220 {
 221 #define ATH9K_HT_CAP_MAXRXAMPDU_65536 0x3       /* 2 ^ 16 */
 222 #define ATH9K_HT_CAP_MPDUDENSITY_8 0x6          /* 8 usec */
 223
 224         ht_info->ht_supported = true;
 225         ht_info->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
 226                        IEEE80211_HT_CAP_SM_PS |
 227                        IEEE80211_HT_CAP_SGI_40 |
 228                        IEEE80211_HT_CAP_DSSSCCK40;
 229
 230         ht_info->ampdu_factor = ATH9K_HT_CAP_MAXRXAMPDU_65536;
 231         ht_info->ampdu_density = ATH9K_HT_CAP_MPDUDENSITY_8;
 232         /* set up supported mcs set */
 233         memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
 234         ht_info->mcs.rx_mask[0] = 0xff;
 235         ht_info->mcs.rx_mask[1] = 0xff;
 236         ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
 237 }
 238
 239 static void ath9k_ht_conf(struct ath_softc *sc,
 240                           struct ieee80211_bss_conf *bss_conf)
 241 {
 242         struct ath_ht_info *ht_info = &sc->sc_ht_info;
 243
 244         if (sc->hw->conf.ht.enabled) {
 245                 ht_info->ext_chan_offset = bss_conf->ht.secondary_channel_offset;
 246
 247                 if (bss_conf->ht.width_40_ok)
 248                         ht_info->tx_chan_width = ATH9K_HT_MACMODE_2040;
 249                 else
 250                         ht_info->tx_chan_width = ATH9K_HT_MACMODE_20;
 251
 252                 ath9k_hw_set11nmac2040(sc->sc_ah, ht_info->tx_chan_width);
 253         }
 254 }
 255
 256 static void ath9k_bss_assoc_info(struct ath_softc *sc,
 257                                  struct ieee80211_vif *vif,
 258                                  struct ieee80211_bss_conf *bss_conf)
 259 {
 260         struct ieee80211_hw *hw = sc->hw;
 261         struct ieee80211_channel *curchan = hw->conf.channel;
 262         struct ath_vap *avp = (void *)vif->drv_priv;
 263         int pos;
 264
 265         if (bss_conf->assoc) {
 266                 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Bss Info ASSOC %d\n",
 267                         __func__,
 268                         bss_conf->aid);
 269
 270                 /* New association, store aid */
 271                 if (avp->av_opmode == ATH9K_M_STA) {
 272                         sc->sc_curaid = bss_conf->aid;
 273                         ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
 274                                                sc->sc_curaid);
 275                 }
 276
 277                 /* Configure the beacon */
 278                 ath_beacon_config(sc, 0);
 279                 sc->sc_flags |= SC_OP_BEACONS;
 280
 281                 /* Reset rssi stats */
 282                 sc->sc_halstats.ns_avgbrssi = ATH_RSSI_DUMMY_MARKER;
 283                 sc->sc_halstats.ns_avgrssi = ATH_RSSI_DUMMY_MARKER;
 284                 sc->sc_halstats.ns_avgtxrssi = ATH_RSSI_DUMMY_MARKER;
 285                 sc->sc_halstats.ns_avgtxrate = ATH_RATE_DUMMY_MARKER;
 286
 287                 /* Update chainmask */
 288                 ath_update_chainmask(sc, hw->conf.ht.enabled);
 289
 290                 DPRINTF(sc, ATH_DBG_CONFIG,
 291                         "%s: bssid %pM aid 0x%x\n",
 292                         __func__,
 293                         sc->sc_curbssid, sc->sc_curaid);
 294
 295                 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
 296                         __func__,
 297                         curchan->center_freq);
 298
 299                 pos = ath_get_channel(sc, curchan);
 300                 if (pos == -1) {
 301                         DPRINTF(sc, ATH_DBG_FATAL,
 302                                 "%s: Invalid channel\n", __func__);
 303                         return;
 304                 }
 305
 306                 if (hw->conf.ht.enabled)
 307                         sc->sc_ah->ah_channels[pos].chanmode =
 308                                 ath_get_extchanmode(sc, curchan);
 309                 else
 310                         sc->sc_ah->ah_channels[pos].chanmode =
 311                                 (curchan->band == IEEE80211_BAND_2GHZ) ?
 312                                 CHANNEL_G : CHANNEL_A;
 313
 314                 /* set h/w channel */
 315                 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
 316                         DPRINTF(sc, ATH_DBG_FATAL,
 317                                 "%s: Unable to set channel\n",
 318                                 __func__);
 319
 320                 /* Update ratectrl about the new state */
 321                 ath_rc_node_update(hw, avp->rc_node);
 322
 323                 /* Start ANI */
 324                 mod_timer(&sc->sc_ani.timer,
 325                         jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
 326
 327         } else {
 328                 DPRINTF(sc, ATH_DBG_CONFIG,
 329                 "%s: Bss Info DISSOC\n", __func__);
 330                 sc->sc_curaid = 0;
 331         }
 332 }
 333
 334 void ath_get_beaconconfig(struct ath_softc *sc,
 335                           int if_id,
 336                           struct ath_beacon_config *conf)
 337 {
 338         struct ieee80211_hw *hw = sc->hw;
 339
 340         /* fill in beacon config data */
 341
 342         conf->beacon_interval = hw->conf.beacon_int;
 343         conf->listen_interval = 100;
 344         conf->dtim_count = 1;
 345         conf->bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf->listen_interval;
 346 }
 347
 348 void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
 349                      struct ath_xmit_status *tx_status)
 350 {
 351         struct ieee80211_hw *hw = sc->hw;
 352         struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
 353
 354         DPRINTF(sc, ATH_DBG_XMIT,
 355                 "%s: TX complete: skb: %p\n", __func__, skb);
 356
 357         ieee80211_tx_info_clear_status(tx_info);
 358         if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK ||
 359                 tx_info->flags & IEEE80211_TX_STAT_TX_FILTERED) {
 360                 /* free driver's private data area of tx_info, XXX: HACK! */
 361                 if (tx_info->control.vif != NULL)
 362                         kfree(tx_info->control.vif);
 363                         tx_info->control.vif = NULL;
 364         }
 365
 366         if (tx_status->flags & ATH_TX_BAR) {
 367                 tx_info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
 368                 tx_status->flags &= ~ATH_TX_BAR;
 369         }
 370
 371         if (!(tx_status->flags & (ATH_TX_ERROR | ATH_TX_XRETRY))) {
 372                 /* Frame was ACKed */
 373                 tx_info->flags |= IEEE80211_TX_STAT_ACK;
 374         }
 375
 376         tx_info->status.rates[0].count = tx_status->retries + 1;
 377
 378         ieee80211_tx_status(hw, skb);
 379 }
 380
 381 /********************************/
 382 /*       LED functions          */
 383 /********************************/
 384
 385 static void ath_led_brightness(struct led_classdev *led_cdev,
 386                                enum led_brightness brightness)
 387 {
 388         struct ath_led *led = container_of(led_cdev, struct ath_led, led_cdev);
 389         struct ath_softc *sc = led->sc;
 390
 391         switch (brightness) {
 392         case LED_OFF:
 393                 if (led->led_type == ATH_LED_ASSOC ||
 394                     led->led_type == ATH_LED_RADIO)
 395                         sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
 396                 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN,
 397                                 (led->led_type == ATH_LED_RADIO) ? 1 :
 398                                 !!(sc->sc_flags & SC_OP_LED_ASSOCIATED));
 399                 break;
 400         case LED_FULL:
 401                 if (led->led_type == ATH_LED_ASSOC)
 402                         sc->sc_flags |= SC_OP_LED_ASSOCIATED;
 403                 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 0);
 404                 break;
 405         default:
 406                 break;
 407         }
 408 }
 409
 410 static int ath_register_led(struct ath_softc *sc, struct ath_led *led,
 411                             char *trigger)
 412 {
 413         int ret;
 414
 415         led->sc = sc;
 416         led->led_cdev.name = led->name;
 417         led->led_cdev.default_trigger = trigger;
 418         led->led_cdev.brightness_set = ath_led_brightness;
 419
 420         ret = led_classdev_register(wiphy_dev(sc->hw->wiphy), &led->led_cdev);
 421         if (ret)
 422                 DPRINTF(sc, ATH_DBG_FATAL,
 423                         "Failed to register led:%s", led->name);
 424         else
 425                 led->registered = 1;
 426         return ret;
 427 }
 428
 429 static void ath_unregister_led(struct ath_led *led)
 430 {
 431         if (led->registered) {
 432                 led_classdev_unregister(&led->led_cdev);
 433                 led->registered = 0;
 434         }
 435 }
 436
 437 static void ath_deinit_leds(struct ath_softc *sc)
 438 {
 439         ath_unregister_led(&sc->assoc_led);
 440         sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
 441         ath_unregister_led(&sc->tx_led);
 442         ath_unregister_led(&sc->rx_led);
 443         ath_unregister_led(&sc->radio_led);
 444         ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
 445 }
 446
 447 static void ath_init_leds(struct ath_softc *sc)
 448 {
 449         char *trigger;
 450         int ret;
 451
 452         /* Configure gpio 1 for output */
 453         ath9k_hw_cfg_output(sc->sc_ah, ATH_LED_PIN,
 454                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 455         /* LED off, active low */
 456         ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
 457
 458         trigger = ieee80211_get_radio_led_name(sc->hw);
 459         snprintf(sc->radio_led.name, sizeof(sc->radio_led.name),
 460                 "ath9k-%s:radio", wiphy_name(sc->hw->wiphy));
 461         ret = ath_register_led(sc, &sc->radio_led, trigger);
 462         sc->radio_led.led_type = ATH_LED_RADIO;
 463         if (ret)
 464                 goto fail;
 465
 466         trigger = ieee80211_get_assoc_led_name(sc->hw);
 467         snprintf(sc->assoc_led.name, sizeof(sc->assoc_led.name),
 468                 "ath9k-%s:assoc", wiphy_name(sc->hw->wiphy));
 469         ret = ath_register_led(sc, &sc->assoc_led, trigger);
 470         sc->assoc_led.led_type = ATH_LED_ASSOC;
 471         if (ret)
 472                 goto fail;
 473
 474         trigger = ieee80211_get_tx_led_name(sc->hw);
 475         snprintf(sc->tx_led.name, sizeof(sc->tx_led.name),
 476                 "ath9k-%s:tx", wiphy_name(sc->hw->wiphy));
 477         ret = ath_register_led(sc, &sc->tx_led, trigger);
 478         sc->tx_led.led_type = ATH_LED_TX;
 479         if (ret)
 480                 goto fail;
 481
 482         trigger = ieee80211_get_rx_led_name(sc->hw);
 483         snprintf(sc->rx_led.name, sizeof(sc->rx_led.name),
 484                 "ath9k-%s:rx", wiphy_name(sc->hw->wiphy));
 485         ret = ath_register_led(sc, &sc->rx_led, trigger);
 486         sc->rx_led.led_type = ATH_LED_RX;
 487         if (ret)
 488                 goto fail;
 489
 490         return;
 491
 492 fail:
 493         ath_deinit_leds(sc);
 494 }
 495
 496 #if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
 497
 498 /*******************/
 499 /*      Rfkill     */
 500 /*******************/
 501
 502 static void ath_radio_enable(struct ath_softc *sc)
 503 {
 504         struct ath_hal *ah = sc->sc_ah;
 505         int status;
 506
 507         spin_lock_bh(&sc->sc_resetlock);
 508         if (!ath9k_hw_reset(ah, ah->ah_curchan,
 509                             sc->sc_ht_info.tx_chan_width,
 510                             sc->sc_tx_chainmask,
 511                             sc->sc_rx_chainmask,
 512                             sc->sc_ht_extprotspacing,
 513                             false, &status)) {
 514                 DPRINTF(sc, ATH_DBG_FATAL,
 515                         "%s: unable to reset channel %u (%uMhz) "
 516                         "flags 0x%x hal status %u\n", __func__,
 517                         ath9k_hw_mhz2ieee(ah,
 518                                           ah->ah_curchan->channel,
 519                                           ah->ah_curchan->channelFlags),
 520                         ah->ah_curchan->channel,
 521                         ah->ah_curchan->channelFlags, status);
 522         }
 523         spin_unlock_bh(&sc->sc_resetlock);
 524
 525         ath_update_txpow(sc);
 526         if (ath_startrecv(sc) != 0) {
 527                 DPRINTF(sc, ATH_DBG_FATAL,
 528                         "%s: unable to restart recv logic\n", __func__);
 529                 return;
 530         }
 531
 532         if (sc->sc_flags & SC_OP_BEACONS)
 533                 ath_beacon_config(sc, ATH_IF_ID_ANY);   /* restart beacons */
 534
 535         /* Re-Enable  interrupts */
 536         ath9k_hw_set_interrupts(ah, sc->sc_imask);
 537
 538         /* Enable LED */
 539         ath9k_hw_cfg_output(ah, ATH_LED_PIN,
 540                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 541         ath9k_hw_set_gpio(ah, ATH_LED_PIN, 0);
 542
 543         ieee80211_wake_queues(sc->hw);
 544 }
 545
 546 static void ath_radio_disable(struct ath_softc *sc)
 547 {
 548         struct ath_hal *ah = sc->sc_ah;
 549         int status;
 550
 551
 552         ieee80211_stop_queues(sc->hw);
 553
 554         /* Disable LED */
 555         ath9k_hw_set_gpio(ah, ATH_LED_PIN, 1);
 556         ath9k_hw_cfg_gpio_input(ah, ATH_LED_PIN);
 557
 558         /* Disable interrupts */
 559         ath9k_hw_set_interrupts(ah, 0);
 560
 561         ath_draintxq(sc, false);        /* clear pending tx frames */
 562         ath_stoprecv(sc);               /* turn off frame recv */
 563         ath_flushrecv(sc);              /* flush recv queue */
 564
 565         spin_lock_bh(&sc->sc_resetlock);
 566         if (!ath9k_hw_reset(ah, ah->ah_curchan,
 567                             sc->sc_ht_info.tx_chan_width,
 568                             sc->sc_tx_chainmask,
 569                             sc->sc_rx_chainmask,
 570                             sc->sc_ht_extprotspacing,
 571                             false, &status)) {
 572                 DPRINTF(sc, ATH_DBG_FATAL,
 573                         "%s: unable to reset channel %u (%uMhz) "
 574                         "flags 0x%x hal status %u\n", __func__,
 575                         ath9k_hw_mhz2ieee(ah,
 576                                 ah->ah_curchan->channel,
 577                                 ah->ah_curchan->channelFlags),
 578                         ah->ah_curchan->channel,
 579                         ah->ah_curchan->channelFlags, status);
 580         }
 581         spin_unlock_bh(&sc->sc_resetlock);
 582
 583         ath9k_hw_phy_disable(ah);
 584         ath9k_hw_setpower(ah, ATH9K_PM_FULL_SLEEP);
 585 }
 586
 587 static bool ath_is_rfkill_set(struct ath_softc *sc)
 588 {
 589         struct ath_hal *ah = sc->sc_ah;
 590
 591         return ath9k_hw_gpio_get(ah, ah->ah_rfkill_gpio) ==
 592                                   ah->ah_rfkill_polarity;
 593 }
 594
 595 /* h/w rfkill poll function */
 596 static void ath_rfkill_poll(struct work_struct *work)
 597 {
 598         struct ath_softc *sc = container_of(work, struct ath_softc,
 599                                             rf_kill.rfkill_poll.work);
 600         bool radio_on;
 601
 602         if (sc->sc_flags & SC_OP_INVALID)
 603                 return;
 604
 605         radio_on = !ath_is_rfkill_set(sc);
 606
 607         /*
 608          * enable/disable radio only when there is a
 609          * state change in RF switch
 610          */
 611         if (radio_on == !!(sc->sc_flags & SC_OP_RFKILL_HW_BLOCKED)) {
 612                 enum rfkill_state state;
 613
 614                 if (sc->sc_flags & SC_OP_RFKILL_SW_BLOCKED) {
 615                         state = radio_on ? RFKILL_STATE_SOFT_BLOCKED
 616                                 : RFKILL_STATE_HARD_BLOCKED;
 617                 } else if (radio_on) {
 618                         ath_radio_enable(sc);
 619                         state = RFKILL_STATE_UNBLOCKED;
 620                 } else {
 621                         ath_radio_disable(sc);
 622                         state = RFKILL_STATE_HARD_BLOCKED;
 623                 }
 624
 625                 if (state == RFKILL_STATE_HARD_BLOCKED)
 626                         sc->sc_flags |= SC_OP_RFKILL_HW_BLOCKED;
 627                 else
 628                         sc->sc_flags &= ~SC_OP_RFKILL_HW_BLOCKED;
 629
 630                 rfkill_force_state(sc->rf_kill.rfkill, state);
 631         }
 632
 633         queue_delayed_work(sc->hw->workqueue, &sc->rf_kill.rfkill_poll,
 634                            msecs_to_jiffies(ATH_RFKILL_POLL_INTERVAL));
 635 }
 636
 637 /* s/w rfkill handler */
 638 static int ath_sw_toggle_radio(void *data, enum rfkill_state state)
 639 {
 640         struct ath_softc *sc = data;
 641
 642         switch (state) {
 643         case RFKILL_STATE_SOFT_BLOCKED:
 644                 if (!(sc->sc_flags & (SC_OP_RFKILL_HW_BLOCKED |
 645                     SC_OP_RFKILL_SW_BLOCKED)))
 646                         ath_radio_disable(sc);
 647                 sc->sc_flags |= SC_OP_RFKILL_SW_BLOCKED;
 648                 return 0;
 649         case RFKILL_STATE_UNBLOCKED:
 650                 if ((sc->sc_flags & SC_OP_RFKILL_SW_BLOCKED)) {
 651                         sc->sc_flags &= ~SC_OP_RFKILL_SW_BLOCKED;
 652                         if (sc->sc_flags & SC_OP_RFKILL_HW_BLOCKED) {
 653                                 DPRINTF(sc, ATH_DBG_FATAL, "Can't turn on the"
 654                                         "radio as it is disabled by h/w \n");
 655                                 return -EPERM;
 656                         }
 657                         ath_radio_enable(sc);
 658                 }
 659                 return 0;
 660         default:
 661                 return -EINVAL;
 662         }
 663 }
 664
 665 /* Init s/w rfkill */
 666 static int ath_init_sw_rfkill(struct ath_softc *sc)
 667 {
 668         sc->rf_kill.rfkill = rfkill_allocate(wiphy_dev(sc->hw->wiphy),
 669                                              RFKILL_TYPE_WLAN);
 670         if (!sc->rf_kill.rfkill) {
 671                 DPRINTF(sc, ATH_DBG_FATAL, "Failed to allocate rfkill\n");
 672                 return -ENOMEM;
 673         }
 674
 675         snprintf(sc->rf_kill.rfkill_name, sizeof(sc->rf_kill.rfkill_name),
 676                 "ath9k-%s:rfkill", wiphy_name(sc->hw->wiphy));
 677         sc->rf_kill.rfkill->name = sc->rf_kill.rfkill_name;
 678         sc->rf_kill.rfkill->data = sc;
 679         sc->rf_kill.rfkill->toggle_radio = ath_sw_toggle_radio;
 680         sc->rf_kill.rfkill->state = RFKILL_STATE_UNBLOCKED;
 681         sc->rf_kill.rfkill->user_claim_unsupported = 1;
 682
 683         return 0;
 684 }
 685
 686 /* Deinitialize rfkill */
 687 static void ath_deinit_rfkill(struct ath_softc *sc)
 688 {
 689         if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
 690                 cancel_delayed_work_sync(&sc->rf_kill.rfkill_poll);
 691
 692         if (sc->sc_flags & SC_OP_RFKILL_REGISTERED) {
 693                 rfkill_unregister(sc->rf_kill.rfkill);
 694                 sc->sc_flags &= ~SC_OP_RFKILL_REGISTERED;
 695                 sc->rf_kill.rfkill = NULL;
 696         }
 697 }
 698
 699 static int ath_start_rfkill_poll(struct ath_softc *sc)
 700 {
 701         if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
 702                 queue_delayed_work(sc->hw->workqueue,
 703                                    &sc->rf_kill.rfkill_poll, 0);
 704
 705         if (!(sc->sc_flags & SC_OP_RFKILL_REGISTERED)) {
 706                 if (rfkill_register(sc->rf_kill.rfkill)) {
 707                         DPRINTF(sc, ATH_DBG_FATAL,
 708                                 "Unable to register rfkill\n");
 709                         rfkill_free(sc->rf_kill.rfkill);
 710
 711                         /* Deinitialize the device */
 712                         ath_detach(sc);
 713                         if (sc->pdev->irq)
 714                                 free_irq(sc->pdev->irq, sc);
 715                         pci_iounmap(sc->pdev, sc->mem);
 716                         pci_release_region(sc->pdev, 0);
 717                         pci_disable_device(sc->pdev);
 718                         ieee80211_free_hw(sc->hw);
 719                         return -EIO;
 720                 } else {
 721                         sc->sc_flags |= SC_OP_RFKILL_REGISTERED;
 722                 }
 723         }
 724
 725         return 0;
 726 }
 727 #endif /* CONFIG_RFKILL */
 728
 729 static void ath_detach(struct ath_softc *sc)
 730 {
 731         struct ieee80211_hw *hw = sc->hw;
 732         int i = 0;
 733
 734         DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach ATH hw\n", __func__);
 735
 736 #if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
 737         ath_deinit_rfkill(sc);
 738 #endif
 739         ath_deinit_leds(sc);
 740
 741         ieee80211_unregister_hw(hw);
 742
 743         ath_rate_control_unregister();
 744         ath_rate_detach(sc->sc_rc);
 745
 746         ath_rx_cleanup(sc);
 747         ath_tx_cleanup(sc);
 748
 749         tasklet_kill(&sc->intr_tq);
 750         tasklet_kill(&sc->bcon_tasklet);
 751
 752         if (!(sc->sc_flags & SC_OP_INVALID))
 753                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 754
 755         /* cleanup tx queues */
 756         for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++)
 757                 if (ATH_TXQ_SETUP(sc, i))
 758                         ath_tx_cleanupq(sc, &sc->sc_txq[i]);
 759
 760         ath9k_hw_detach(sc->sc_ah);
 761 }
 762
 763 static int ath_attach(u16 devid, struct ath_softc *sc)
 764 {
 765         struct ieee80211_hw *hw = sc->hw;
 766         int error = 0;
 767
 768         DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach ATH hw\n", __func__);
 769
 770         error = ath_init(devid, sc);
 771         if (error != 0)
 772                 return error;
 773
 774         /* get mac address from hardware and set in mac80211 */
 775
 776         SET_IEEE80211_PERM_ADDR(hw, sc->sc_myaddr);
 777
 778         hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
 779                 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
 780                 IEEE80211_HW_SIGNAL_DBM |
 781                 IEEE80211_HW_AMPDU_AGGREGATION;
 782
 783         hw->wiphy->interface_modes =
 784                 BIT(NL80211_IFTYPE_AP) |
 785                 BIT(NL80211_IFTYPE_STATION) |
 786                 BIT(NL80211_IFTYPE_ADHOC);
 787
 788         hw->queues = 4;
 789         hw->sta_data_size = sizeof(struct ath_node);
 790         hw->vif_data_size = sizeof(struct ath_vap);
 791
 792         /* Register rate control */
 793         hw->rate_control_algorithm = "ath9k_rate_control";
 794         error = ath_rate_control_register();
 795         if (error != 0) {
 796                 DPRINTF(sc, ATH_DBG_FATAL,
 797                         "%s: Unable to register rate control "
 798                         "algorithm:%d\n", __func__, error);
 799                 ath_rate_control_unregister();
 800                 goto bad;
 801         }
 802
 803         if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT) {
 804                 setup_ht_cap(&sc->sbands[IEEE80211_BAND_2GHZ].ht_cap);
 805                 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->ah_caps.wireless_modes))
 806                         setup_ht_cap(&sc->sbands[IEEE80211_BAND_5GHZ].ht_cap);
 807         }
 808
 809         hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &sc->sbands[IEEE80211_BAND_2GHZ];
 810         if (test_bit(ATH9K_MODE_11A, sc->sc_ah->ah_caps.wireless_modes))
 811                 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
 812                         &sc->sbands[IEEE80211_BAND_5GHZ];
 813
 814         /* initialize tx/rx engine */
 815         error = ath_tx_init(sc, ATH_TXBUF);
 816         if (error != 0)
 817                 goto detach;
 818
 819         error = ath_rx_init(sc, ATH_RXBUF);
 820         if (error != 0)
 821                 goto detach;
 822
 823 #if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
 824         /* Initialze h/w Rfkill */
 825         if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
 826                 INIT_DELAYED_WORK(&sc->rf_kill.rfkill_poll, ath_rfkill_poll);
 827
 828         /* Initialize s/w rfkill */
 829         if (ath_init_sw_rfkill(sc))
 830                 goto detach;
 831 #endif
 832
 833         error = ieee80211_register_hw(hw);
 834         if (error != 0) {
 835                 ath_rate_control_unregister();
 836                 goto bad;
 837         }
 838
 839         /* Initialize LED control */
 840         ath_init_leds(sc);
 841
 842         return 0;
 843 detach:
 844         ath_detach(sc);
 845 bad:
 846         return error;
 847 }
 848
 849 static int ath9k_start(struct ieee80211_hw *hw)
 850 {
 851         struct ath_softc *sc = hw->priv;
 852         struct ieee80211_channel *curchan = hw->conf.channel;
 853         int error = 0, pos;
 854
 855         DPRINTF(sc, ATH_DBG_CONFIG, "%s: Starting driver with "
 856                 "initial channel: %d MHz\n", __func__, curchan->center_freq);
 857
 858         memset(&sc->sc_ht_info, 0, sizeof(struct ath_ht_info));
 859
 860         /* setup initial channel */
 861
 862         pos = ath_get_channel(sc, curchan);
 863         if (pos == -1) {
 864                 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
 865                 error = -EINVAL;
 866                 goto exit;
 867         }
 868
 869         sc->sc_ah->ah_channels[pos].chanmode =
 870                 (curchan->band == IEEE80211_BAND_2GHZ) ? CHANNEL_G : CHANNEL_A;
 871
 872         error = ath_open(sc, &sc->sc_ah->ah_channels[pos]);
 873         if (error) {
 874                 DPRINTF(sc, ATH_DBG_FATAL,
 875                         "%s: Unable to complete ath_open\n", __func__);
 876                 goto exit;
 877         }
 878
 879 #if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
 880         error = ath_start_rfkill_poll(sc);
 881 #endif
 882
 883 exit:
 884         return error;
 885 }
 886
 887 static int ath9k_tx(struct ieee80211_hw *hw,
 888                     struct sk_buff *skb)
 889 {
 890         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 891         struct ath_softc *sc = hw->priv;
 892         struct ath_tx_control txctl;
 893         int hdrlen, padsize;
 894
 895         memset(&txctl, 0, sizeof(struct ath_tx_control));
 896
 897         /*
 898          * As a temporary workaround, assign seq# here; this will likely need
 899          * to be cleaned up to work better with Beacon transmission and virtual
 900          * BSSes.
 901          */
 902         if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
 903                 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
 904                 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
 905                         sc->seq_no += 0x10;
 906                 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
 907                 hdr->seq_ctrl |= cpu_to_le16(sc->seq_no);
 908         }
 909
 910         /* Add the padding after the header if this is not already done */
 911         hdrlen = ieee80211_get_hdrlen_from_skb(skb);
 912         if (hdrlen & 3) {
 913                 padsize = hdrlen % 4;
 914                 if (skb_headroom(skb) < padsize)
 915                         return -1;
 916                 skb_push(skb, padsize);
 917                 memmove(skb->data, skb->data + padsize, hdrlen);
 918         }
 919
 920         /* Check if a tx queue is available */
 921
 922         txctl.txq = ath_test_get_txq(sc, skb);
 923         if (!txctl.txq)
 924                 goto exit;
 925
 926         DPRINTF(sc, ATH_DBG_XMIT, "%s: transmitting packet, skb: %p\n",
 927                 __func__,
 928                 skb);
 929
 930         if (ath_tx_start(sc, skb, &txctl) != 0) {
 931                 DPRINTF(sc, ATH_DBG_XMIT, "%s: TX failed\n", __func__);
 932                 goto exit;
 933         }
 934
 935         return 0;
 936 exit:
 937         dev_kfree_skb_any(skb);
 938         return 0;
 939 }
 940
 941 static void ath9k_stop(struct ieee80211_hw *hw)
 942 {
 943         struct ath_softc *sc = hw->priv;
 944
 945         if (sc->sc_flags & SC_OP_INVALID) {
 946                 DPRINTF(sc, ATH_DBG_ANY, "%s: Device not present\n", __func__);
 947                 return;
 948         }
 949
 950         ath_stop(sc);
 951
 952         DPRINTF(sc, ATH_DBG_CONFIG, "%s: Driver halt\n", __func__);
 953 }
 954
 955 static int ath9k_add_interface(struct ieee80211_hw *hw,
 956                                struct ieee80211_if_init_conf *conf)
 957 {
 958         struct ath_softc *sc = hw->priv;
 959         struct ath_vap *avp = (void *)conf->vif->drv_priv;
 960         int ic_opmode = 0;
 961
 962         /* Support only vap for now */
 963
 964         if (sc->sc_nvaps)
 965                 return -ENOBUFS;
 966
 967         switch (conf->type) {
 968         case NL80211_IFTYPE_STATION:
 969                 ic_opmode = ATH9K_M_STA;
 970                 break;
 971         case NL80211_IFTYPE_ADHOC:
 972                 ic_opmode = ATH9K_M_IBSS;
 973                 break;
 974         case NL80211_IFTYPE_AP:
 975                 ic_opmode = ATH9K_M_HOSTAP;
 976                 break;
 977         default:
 978                 DPRINTF(sc, ATH_DBG_FATAL,
 979                         "%s: Interface type %d not yet supported\n",
 980                         __func__, conf->type);
 981                 return -EOPNOTSUPP;
 982         }
 983
 984         DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a VAP of type: %d\n",
 985                 __func__,
 986                 ic_opmode);
 987
 988         /* Set the VAP opmode */
 989         avp->av_opmode = ic_opmode;
 990         avp->av_bslot = -1;
 991
 992         if (ic_opmode == ATH9K_M_HOSTAP)
 993                 ath9k_hw_set_tsfadjust(sc->sc_ah, 1);
 994
 995         sc->sc_vaps[0] = conf->vif;
 996         sc->sc_nvaps++;
 997
 998         /* Set the device opmode */
 999         sc->sc_ah->ah_opmode = ic_opmode;
1000
1001         if (conf->type == NL80211_IFTYPE_AP) {
1002                 /* TODO: is this a suitable place to start ANI for AP mode? */
1003                 /* Start ANI */
1004                 mod_timer(&sc->sc_ani.timer,
1005                           jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
1006         }
1007
1008         return 0;
1009 }
1010
1011 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1012                                    struct ieee80211_if_init_conf *conf)
1013 {
1014         struct ath_softc *sc = hw->priv;
1015         struct ath_vap *avp = (void *)conf->vif->drv_priv;
1016
1017         DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach VAP\n", __func__);
1018
1019 #ifdef CONFIG_SLOW_ANT_DIV
1020         ath_slow_ant_div_stop(&sc->sc_antdiv);
1021 #endif
1022         /* Stop ANI */
1023         del_timer_sync(&sc->sc_ani.timer);
1024
1025         /* Reclaim beacon resources */
1026         if (sc->sc_ah->ah_opmode == ATH9K_M_HOSTAP ||
1027             sc->sc_ah->ah_opmode == ATH9K_M_IBSS) {
1028                 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
1029                 ath_beacon_return(sc, avp);
1030         }
1031
1032         sc->sc_flags &= ~SC_OP_BEACONS;
1033
1034         sc->sc_vaps[0] = NULL;
1035         sc->sc_nvaps--;
1036 }
1037
1038 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1039 {
1040         struct ath_softc *sc = hw->priv;
1041         struct ieee80211_channel *curchan = hw->conf.channel;
1042         struct ieee80211_conf *conf = &hw->conf;
1043         int pos;
1044
1045         DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
1046                 __func__,
1047                 curchan->center_freq);
1048
1049         /* Update chainmask */
1050         ath_update_chainmask(sc, conf->ht.enabled);
1051
1052         pos = ath_get_channel(sc, curchan);
1053         if (pos == -1) {
1054                 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
1055                 return -EINVAL;
1056         }
1057
1058         sc->sc_ah->ah_channels[pos].chanmode =
1059                 (curchan->band == IEEE80211_BAND_2GHZ) ?
1060                 CHANNEL_G : CHANNEL_A;
1061
1062         if (sc->sc_curaid && hw->conf.ht.enabled)
1063                 sc->sc_ah->ah_channels[pos].chanmode =
1064                         ath_get_extchanmode(sc, curchan);
1065
1066         if (changed & IEEE80211_CONF_CHANGE_POWER)
1067                 sc->sc_config.txpowlimit = 2 * conf->power_level;
1068
1069         /* set h/w channel */
1070         if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
1071                 DPRINTF(sc, ATH_DBG_FATAL, "%s: Unable to set channel\n",
1072                         __func__);
1073
1074         return 0;
1075 }
1076
1077 static int ath9k_config_interface(struct ieee80211_hw *hw,
1078                                   struct ieee80211_vif *vif,
1079                                   struct ieee80211_if_conf *conf)
1080 {
1081         struct ath_softc *sc = hw->priv;
1082         struct ath_hal *ah = sc->sc_ah;
1083         struct ath_vap *avp = (void *)vif->drv_priv;
1084         u32 rfilt = 0;
1085         int error, i;
1086
1087         /* TODO: Need to decide which hw opmode to use for multi-interface
1088          * cases */
1089         if (vif->type == NL80211_IFTYPE_AP &&
1090             ah->ah_opmode != ATH9K_M_HOSTAP) {
1091                 ah->ah_opmode = ATH9K_M_HOSTAP;
1092                 ath9k_hw_setopmode(ah);
1093                 ath9k_hw_write_associd(ah, sc->sc_myaddr, 0);
1094                 /* Request full reset to get hw opmode changed properly */
1095                 sc->sc_flags |= SC_OP_FULL_RESET;
1096         }
1097
1098         if ((conf->changed & IEEE80211_IFCC_BSSID) &&
1099             !is_zero_ether_addr(conf->bssid)) {
1100                 switch (vif->type) {
1101                 case NL80211_IFTYPE_STATION:
1102                 case NL80211_IFTYPE_ADHOC:
1103                         /* Set BSSID */
1104                         memcpy(sc->sc_curbssid, conf->bssid, ETH_ALEN);
1105                         sc->sc_curaid = 0;
1106                         ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
1107                                                sc->sc_curaid);
1108
1109                         /* Set aggregation protection mode parameters */
1110                         sc->sc_config.ath_aggr_prot = 0;
1111
1112                         DPRINTF(sc, ATH_DBG_CONFIG,
1113                                 "%s: RX filter 0x%x bssid %pM aid 0x%x\n",
1114                                 __func__, rfilt,
1115                                 sc->sc_curbssid, sc->sc_curaid);
1116
1117                         /* need to reconfigure the beacon */
1118                         sc->sc_flags &= ~SC_OP_BEACONS ;
1119
1120                         break;
1121                 default:
1122                         break;
1123                 }
1124         }
1125
1126         if ((conf->changed & IEEE80211_IFCC_BEACON) &&
1127             ((vif->type == NL80211_IFTYPE_ADHOC) ||
1128              (vif->type == NL80211_IFTYPE_AP))) {
1129                 /*
1130                  * Allocate and setup the beacon frame.
1131                  *
1132                  * Stop any previous beacon DMA.  This may be
1133                  * necessary, for example, when an ibss merge
1134                  * causes reconfiguration; we may be called
1135                  * with beacon transmission active.
1136                  */
1137                 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
1138
1139                 error = ath_beacon_alloc(sc, 0);
1140                 if (error != 0)
1141                         return error;
1142
1143                 ath_beacon_sync(sc, 0);
1144         }
1145
1146         /* Check for WLAN_CAPABILITY_PRIVACY ? */
1147         if ((avp->av_opmode != ATH9K_M_STA)) {
1148                 for (i = 0; i < IEEE80211_WEP_NKID; i++)
1149                         if (ath9k_hw_keyisvalid(sc->sc_ah, (u16)i))
1150                                 ath9k_hw_keysetmac(sc->sc_ah,
1151                                                    (u16)i,
1152                                                    sc->sc_curbssid);
1153         }
1154
1155         /* Only legacy IBSS for now */
1156         if (vif->type == NL80211_IFTYPE_ADHOC)
1157                 ath_update_chainmask(sc, 0);
1158
1159         return 0;
1160 }
1161
1162 #define SUPPORTED_FILTERS                       \
1163         (FIF_PROMISC_IN_BSS |                   \
1164         FIF_ALLMULTI |                          \
1165         FIF_CONTROL |                           \
1166         FIF_OTHER_BSS |                         \
1167         FIF_BCN_PRBRESP_PROMISC |               \
1168         FIF_FCSFAIL)
1169
1170 /* FIXME: sc->sc_full_reset ? */
1171 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1172                                    unsigned int changed_flags,
1173                                    unsigned int *total_flags,
1174                                    int mc_count,
1175                                    struct dev_mc_list *mclist)
1176 {
1177         struct ath_softc *sc = hw->priv;
1178         u32 rfilt;
1179
1180         changed_flags &= SUPPORTED_FILTERS;
1181         *total_flags &= SUPPORTED_FILTERS;
1182
1183         sc->rx_filter = *total_flags;
1184         rfilt = ath_calcrxfilter(sc);
1185         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1186
1187         if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1188                 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
1189                         ath9k_hw_write_associd(sc->sc_ah, ath_bcast_mac, 0);
1190         }
1191
1192         DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set HW RX filter: 0x%x\n",
1193                 __func__, sc->rx_filter);
1194 }
1195
1196 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1197                              struct ieee80211_vif *vif,
1198                              enum sta_notify_cmd cmd,
1199                              struct ieee80211_sta *sta)
1200 {
1201         struct ath_softc *sc = hw->priv;
1202
1203         switch (cmd) {
1204         case STA_NOTIFY_ADD:
1205                 ath_node_attach(sc, sta);
1206                 break;
1207         case STA_NOTIFY_REMOVE:
1208                 ath_node_detach(sc, sta);
1209                 break;
1210         default:
1211                 break;
1212         }
1213 }
1214
1215 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1216                          u16 queue,
1217                          const struct ieee80211_tx_queue_params *params)
1218 {
1219         struct ath_softc *sc = hw->priv;
1220         struct ath9k_tx_queue_info qi;
1221         int ret = 0, qnum;
1222
1223         if (queue >= WME_NUM_AC)
1224                 return 0;
1225
1226         qi.tqi_aifs = params->aifs;
1227         qi.tqi_cwmin = params->cw_min;
1228         qi.tqi_cwmax = params->cw_max;
1229         qi.tqi_burstTime = params->txop;
1230         qnum = ath_get_hal_qnum(queue, sc);
1231
1232         DPRINTF(sc, ATH_DBG_CONFIG,
1233                 "%s: Configure tx [queue/halq] [%d/%d],  "
1234                 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1235                 __func__,
1236                 queue,
1237                 qnum,
1238                 params->aifs,
1239                 params->cw_min,
1240                 params->cw_max,
1241                 params->txop);
1242
1243         ret = ath_txq_update(sc, qnum, &qi);
1244         if (ret)
1245                 DPRINTF(sc, ATH_DBG_FATAL,
1246                         "%s: TXQ Update failed\n", __func__);
1247
1248         return ret;
1249 }
1250
1251 static int ath9k_set_key(struct ieee80211_hw *hw,
1252                          enum set_key_cmd cmd,
1253                          const u8 *local_addr,
1254                          const u8 *addr,
1255                          struct ieee80211_key_conf *key)
1256 {
1257         struct ath_softc *sc = hw->priv;
1258         int ret = 0;
1259
1260         DPRINTF(sc, ATH_DBG_KEYCACHE, " %s: Set HW Key\n", __func__);
1261
1262         switch (cmd) {
1263         case SET_KEY:
1264                 ret = ath_key_config(sc, addr, key);
1265                 if (!ret) {
1266                         set_bit(key->keyidx, sc->sc_keymap);
1267                         key->hw_key_idx = key->keyidx;
1268                         /* push IV and Michael MIC generation to stack */
1269                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1270                         if (key->alg == ALG_TKIP)
1271                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1272                 }
1273                 break;
1274         case DISABLE_KEY:
1275                 ath_key_delete(sc, key);
1276                 clear_bit(key->keyidx, sc->sc_keymap);
1277                 break;
1278         default:
1279                 ret = -EINVAL;
1280         }
1281
1282         return ret;
1283 }
1284
1285 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1286                                    struct ieee80211_vif *vif,
1287                                    struct ieee80211_bss_conf *bss_conf,
1288                                    u32 changed)
1289 {
1290         struct ath_softc *sc = hw->priv;
1291
1292         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1293                 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed PREAMBLE %d\n",
1294                         __func__,
1295                         bss_conf->use_short_preamble);
1296                 if (bss_conf->use_short_preamble)
1297                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1298                 else
1299                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1300         }
1301
1302         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1303                 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed CTS PROT %d\n",
1304                         __func__,
1305                         bss_conf->use_cts_prot);
1306                 if (bss_conf->use_cts_prot &&
1307                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1308                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1309                 else
1310                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1311         }
1312
1313         if (changed & BSS_CHANGED_HT) {
1314                 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed HT\n",
1315                         __func__);
1316                 ath9k_ht_conf(sc, bss_conf);
1317         }
1318
1319         if (changed & BSS_CHANGED_ASSOC) {
1320                 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed ASSOC %d\n",
1321                         __func__,
1322                         bss_conf->assoc);
1323                 ath9k_bss_assoc_info(sc, vif, bss_conf);
1324         }
1325 }
1326
1327 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1328 {
1329         u64 tsf;
1330         struct ath_softc *sc = hw->priv;
1331         struct ath_hal *ah = sc->sc_ah;
1332
1333         tsf = ath9k_hw_gettsf64(ah);
1334
1335         return tsf;
1336 }
1337
1338 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1339 {
1340         struct ath_softc *sc = hw->priv;
1341         struct ath_hal *ah = sc->sc_ah;
1342
1343         ath9k_hw_reset_tsf(ah);
1344 }
1345
1346 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1347                        enum ieee80211_ampdu_mlme_action action,
1348                        struct ieee80211_sta *sta,
1349                        u16 tid, u16 *ssn)
1350 {
1351         struct ath_softc *sc = hw->priv;
1352         int ret = 0;
1353
1354         switch (action) {
1355         case IEEE80211_AMPDU_RX_START:
1356                 if (!(sc->sc_flags & SC_OP_RXAGGR))
1357                         ret = -ENOTSUPP;
1358                 break;
1359         case IEEE80211_AMPDU_RX_STOP:
1360                 break;
1361         case IEEE80211_AMPDU_TX_START:
1362                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
1363                 if (ret < 0)
1364                         DPRINTF(sc, ATH_DBG_FATAL,
1365                                 "%s: Unable to start TX aggregation\n",
1366                                 __func__);
1367                 else
1368                         ieee80211_start_tx_ba_cb_irqsafe(hw, sta->addr, tid);
1369                 break;
1370         case IEEE80211_AMPDU_TX_STOP:
1371                 ret = ath_tx_aggr_stop(sc, sta, tid);
1372                 if (ret < 0)
1373                         DPRINTF(sc, ATH_DBG_FATAL,
1374                                 "%s: Unable to stop TX aggregation\n",
1375                                 __func__);
1376
1377                 ieee80211_stop_tx_ba_cb_irqsafe(hw, sta->addr, tid);
1378                 break;
1379         case IEEE80211_AMPDU_TX_RESUME:
1380                 ath_tx_aggr_resume(sc, sta, tid);
1381                 break;
1382         default:
1383                 DPRINTF(sc, ATH_DBG_FATAL,
1384                         "%s: Unknown AMPDU action\n", __func__);
1385         }
1386
1387         return ret;
1388 }
1389
1390 static int ath9k_no_fragmentation(struct ieee80211_hw *hw, u32 value)
1391 {
1392         return -EOPNOTSUPP;
1393 }
1394
1395 static struct ieee80211_ops ath9k_ops = {
1396         .tx                 = ath9k_tx,
1397         .start              = ath9k_start,
1398         .stop               = ath9k_stop,
1399         .add_interface      = ath9k_add_interface,
1400         .remove_interface   = ath9k_remove_interface,
1401         .config             = ath9k_config,
1402         .config_interface   = ath9k_config_interface,
1403         .configure_filter   = ath9k_configure_filter,
1404         .sta_notify         = ath9k_sta_notify,
1405         .conf_tx            = ath9k_conf_tx,
1406         .bss_info_changed   = ath9k_bss_info_changed,
1407         .set_key            = ath9k_set_key,
1408         .get_tsf            = ath9k_get_tsf,
1409         .reset_tsf          = ath9k_reset_tsf,
1410         .ampdu_action       = ath9k_ampdu_action,
1411         .set_frag_threshold = ath9k_no_fragmentation,
1412 };
1413
1414 static struct {
1415         u32 version;
1416         const char * name;
1417 } ath_mac_bb_names[] = {
1418         { AR_SREV_VERSION_5416_PCI,     "5416" },
1419         { AR_SREV_VERSION_5416_PCIE,    "5418" },
1420         { AR_SREV_VERSION_9100,         "9100" },
1421         { AR_SREV_VERSION_9160,         "9160" },
1422         { AR_SREV_VERSION_9280,         "9280" },
1423         { AR_SREV_VERSION_9285,         "9285" }
1424 };
1425
1426 static struct {
1427         u16 version;
1428         const char * name;
1429 } ath_rf_names[] = {
1430         { 0,                            "5133" },
1431         { AR_RAD5133_SREV_MAJOR,        "5133" },
1432         { AR_RAD5122_SREV_MAJOR,        "5122" },
1433         { AR_RAD2133_SREV_MAJOR,        "2133" },
1434         { AR_RAD2122_SREV_MAJOR,        "2122" }
1435 };
1436
1437 /*
1438  * Return the MAC/BB name. "????" is returned if the MAC/BB is unknown.
1439  */
1440
1441 static const char *
1442 ath_mac_bb_name(u32 mac_bb_version)
1443 {
1444         int i;
1445
1446         for (i=0; i<ARRAY_SIZE(ath_mac_bb_names); i++) {
1447                 if (ath_mac_bb_names[i].version == mac_bb_version) {
1448                         return ath_mac_bb_names[i].name;
1449                 }
1450         }
1451
1452         return "????";
1453 }
1454
1455 /*
1456  * Return the RF name. "????" is returned if the RF is unknown.
1457  */
1458
1459 static const char *
1460 ath_rf_name(u16 rf_version)
1461 {
1462         int i;
1463
1464         for (i=0; i<ARRAY_SIZE(ath_rf_names); i++) {
1465                 if (ath_rf_names[i].version == rf_version) {
1466                         return ath_rf_names[i].name;
1467                 }
1468         }
1469
1470         return "????";
1471 }
1472
1473 static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1474 {
1475         void __iomem *mem;
1476         struct ath_softc *sc;
1477         struct ieee80211_hw *hw;
1478         u8 csz;
1479         u32 val;
1480         int ret = 0;
1481         struct ath_hal *ah;
1482
1483         if (pci_enable_device(pdev))
1484                 return -EIO;
1485
1486         ret =  pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1487
1488         if (ret) {
1489                 printk(KERN_ERR "ath9k: 32-bit DMA not available\n");
1490                 goto bad;
1491         }
1492
1493         ret = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
1494
1495         if (ret) {
1496                 printk(KERN_ERR "ath9k: 32-bit DMA consistent "
1497                         "DMA enable faled\n");
1498                 goto bad;
1499         }
1500
1501         /*
1502          * Cache line size is used to size and align various
1503          * structures used to communicate with the hardware.
1504          */
1505         pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz);
1506         if (csz == 0) {
1507                 /*
1508                  * Linux 2.4.18 (at least) writes the cache line size
1509                  * register as a 16-bit wide register which is wrong.
1510                  * We must have this setup properly for rx buffer
1511                  * DMA to work so force a reasonable value here if it
1512                  * comes up zero.
1513                  */
1514                 csz = L1_CACHE_BYTES / sizeof(u32);
1515                 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
1516         }
1517         /*
1518          * The default setting of latency timer yields poor results,
1519          * set it to the value used by other systems. It may be worth
1520          * tweaking this setting more.
1521          */
1522         pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8);
1523
1524         pci_set_master(pdev);
1525
1526         /*
1527          * Disable the RETRY_TIMEOUT register (0x41) to keep
1528          * PCI Tx retries from interfering with C3 CPU state.
1529          */
1530         pci_read_config_dword(pdev, 0x40, &val);
1531         if ((val & 0x0000ff00) != 0)
1532                 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1533
1534         ret = pci_request_region(pdev, 0, "ath9k");
1535         if (ret) {
1536                 dev_err(&pdev->dev, "PCI memory region reserve error\n");
1537                 ret = -ENODEV;
1538                 goto bad;
1539         }
1540
1541         mem = pci_iomap(pdev, 0, 0);
1542         if (!mem) {
1543                 printk(KERN_ERR "PCI memory map error\n") ;
1544                 ret = -EIO;
1545                 goto bad1;
1546         }
1547
1548         hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops);
1549         if (hw == NULL) {
1550                 printk(KERN_ERR "ath_pci: no memory for ieee80211_hw\n");
1551                 goto bad2;
1552         }
1553
1554         SET_IEEE80211_DEV(hw, &pdev->dev);
1555         pci_set_drvdata(pdev, hw);
1556
1557         sc = hw->priv;
1558         sc->hw = hw;
1559         sc->pdev = pdev;
1560         sc->mem = mem;
1561
1562         if (ath_attach(id->device, sc) != 0) {
1563                 ret = -ENODEV;
1564                 goto bad3;
1565         }
1566
1567         /* setup interrupt service routine */
1568
1569         if (request_irq(pdev->irq, ath_isr, IRQF_SHARED, "ath", sc)) {
1570                 printk(KERN_ERR "%s: request_irq failed\n",
1571                         wiphy_name(hw->wiphy));
1572                 ret = -EIO;
1573                 goto bad4;
1574         }
1575
1576         ah = sc->sc_ah;
1577         printk(KERN_INFO
1578                "%s: Atheros AR%s MAC/BB Rev:%x "
1579                "AR%s RF Rev:%x: mem=0x%lx, irq=%d\n",
1580                wiphy_name(hw->wiphy),
1581                ath_mac_bb_name(ah->ah_macVersion),
1582                ah->ah_macRev,
1583                ath_rf_name((ah->ah_analog5GhzRev & AR_RADIO_SREV_MAJOR)),
1584                ah->ah_phyRev,
1585                (unsigned long)mem, pdev->irq);
1586
1587         return 0;
1588 bad4:
1589         ath_detach(sc);
1590 bad3:
1591         ieee80211_free_hw(hw);
1592 bad2:
1593         pci_iounmap(pdev, mem);
1594 bad1:
1595         pci_release_region(pdev, 0);
1596 bad:
1597         pci_disable_device(pdev);
1598         return ret;
1599 }
1600
1601 static void ath_pci_remove(struct pci_dev *pdev)
1602 {
1603         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1604         struct ath_softc *sc = hw->priv;
1605
1606         ath_detach(sc);
1607         if (pdev->irq)
1608                 free_irq(pdev->irq, sc);
1609         pci_iounmap(pdev, sc->mem);
1610         pci_release_region(pdev, 0);
1611         pci_disable_device(pdev);
1612         ieee80211_free_hw(hw);
1613 }
1614
1615 #ifdef CONFIG_PM
1616
1617 static int ath_pci_suspend(struct pci_dev *pdev, pm_message_t state)
1618 {
1619         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1620         struct ath_softc *sc = hw->priv;
1621
1622         ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
1623
1624 #if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
1625         if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1626                 cancel_delayed_work_sync(&sc->rf_kill.rfkill_poll);
1627 #endif
1628
1629         pci_save_state(pdev);
1630         pci_disable_device(pdev);
1631         pci_set_power_state(pdev, 3);
1632
1633         return 0;
1634 }
1635
1636 static int ath_pci_resume(struct pci_dev *pdev)
1637 {
1638         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1639         struct ath_softc *sc = hw->priv;
1640         u32 val;
1641         int err;
1642
1643         err = pci_enable_device(pdev);
1644         if (err)
1645                 return err;
1646         pci_restore_state(pdev);
1647         /*
1648          * Suspend/Resume resets the PCI configuration space, so we have to
1649          * re-disable the RETRY_TIMEOUT register (0x41) to keep
1650          * PCI Tx retries from interfering with C3 CPU state
1651          */
1652         pci_read_config_dword(pdev, 0x40, &val);
1653         if ((val & 0x0000ff00) != 0)
1654                 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1655
1656         /* Enable LED */
1657         ath9k_hw_cfg_output(sc->sc_ah, ATH_LED_PIN,
1658                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
1659         ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
1660
1661 #if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
1662         /*
1663          * check the h/w rfkill state on resume
1664          * and start the rfkill poll timer
1665          */
1666         if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1667                 queue_delayed_work(sc->hw->workqueue,
1668                                    &sc->rf_kill.rfkill_poll, 0);
1669 #endif
1670
1671         return 0;
1672 }
1673
1674 #endif /* CONFIG_PM */
1675
1676 MODULE_DEVICE_TABLE(pci, ath_pci_id_table);
1677
1678 static struct pci_driver ath_pci_driver = {
1679         .name       = "ath9k",
1680         .id_table   = ath_pci_id_table,
1681         .probe      = ath_pci_probe,
1682         .remove     = ath_pci_remove,
1683 #ifdef CONFIG_PM
1684         .suspend    = ath_pci_suspend,
1685         .resume     = ath_pci_resume,
1686 #endif /* CONFIG_PM */
1687 };
1688
1689 static int __init init_ath_pci(void)
1690 {
1691         printk(KERN_INFO "%s: %s\n", dev_info, ATH_PCI_VERSION);
1692
1693         if (pci_register_driver(&ath_pci_driver) < 0) {
1694                 printk(KERN_ERR
1695                         "ath_pci: No devices found, driver not installed.\n");
1696                 pci_unregister_driver(&ath_pci_driver);
1697                 return -ENODEV;
1698         }
1699
1700         return 0;
1701 }
1702 module_init(init_ath_pci);
1703
1704 static void __exit exit_ath_pci(void)
1705 {
1706         pci_unregister_driver(&ath_pci_driver);
1707         printk(KERN_INFO "%s: driver unloaded\n", dev_info);
1708 }
1709 module_exit(exit_ath_pci);