1 /******************************************************************************
3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
21 * Contact Information:
22 * Intel Linux Wireless <ilw@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 *****************************************************************************/
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/init.h>
30 #include <linux/pci.h>
31 #include <linux/dma-mapping.h>
32 #include <linux/delay.h>
33 #include <linux/skbuff.h>
34 #include <linux/netdevice.h>
35 #include <linux/wireless.h>
36 #include <net/mac80211.h>
37 #include <linux/etherdevice.h>
38 #include <asm/unaligned.h>
40 #include "iwl-eeprom.h"
44 #include "iwl-helpers.h"
45 #include "iwl-calib.h"
48 static int iwl4965_send_tx_power(struct iwl_priv *priv);
49 static int iwl4965_hw_get_temperature(const struct iwl_priv *priv);
51 /* Highest firmware API version supported */
52 #define IWL4965_UCODE_API_MAX 2
54 /* Lowest firmware API version supported */
55 #define IWL4965_UCODE_API_MIN 2
57 #define IWL4965_FW_PRE "iwlwifi-4965-"
58 #define _IWL4965_MODULE_FIRMWARE(api) IWL4965_FW_PRE #api ".ucode"
59 #define IWL4965_MODULE_FIRMWARE(api) _IWL4965_MODULE_FIRMWARE(api)
62 /* module parameters */
63 static struct iwl_mod_params iwl4965_mod_params = {
64 .num_of_queues = IWL49_NUM_QUEUES,
65 .num_of_ampdu_queues = IWL49_NUM_AMPDU_QUEUES,
68 /* the rest are 0 by default */
71 /* check contents of special bootstrap uCode SRAM */
72 static int iwl4965_verify_bsm(struct iwl_priv *priv)
74 __le32 *image = priv->ucode_boot.v_addr;
75 u32 len = priv->ucode_boot.len;
79 IWL_DEBUG_INFO("Begin verify bsm\n");
81 /* verify BSM SRAM contents */
82 val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
83 for (reg = BSM_SRAM_LOWER_BOUND;
84 reg < BSM_SRAM_LOWER_BOUND + len;
85 reg += sizeof(u32), image++) {
86 val = iwl_read_prph(priv, reg);
87 if (val != le32_to_cpu(*image)) {
88 IWL_ERROR("BSM uCode verification failed at "
89 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
91 reg - BSM_SRAM_LOWER_BOUND, len,
92 val, le32_to_cpu(*image));
97 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
103 * iwl4965_load_bsm - Load bootstrap instructions
107 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
108 * in special SRAM that does not power down during RFKILL. When powering back
109 * up after power-saving sleeps (or during initial uCode load), the BSM loads
110 * the bootstrap program into the on-board processor, and starts it.
112 * The bootstrap program loads (via DMA) instructions and data for a new
113 * program from host DRAM locations indicated by the host driver in the
114 * BSM_DRAM_* registers. Once the new program is loaded, it starts
117 * When initializing the NIC, the host driver points the BSM to the
118 * "initialize" uCode image. This uCode sets up some internal data, then
119 * notifies host via "initialize alive" that it is complete.
121 * The host then replaces the BSM_DRAM_* pointer values to point to the
122 * normal runtime uCode instructions and a backup uCode data cache buffer
123 * (filled initially with starting data values for the on-board processor),
124 * then triggers the "initialize" uCode to load and launch the runtime uCode,
125 * which begins normal operation.
127 * When doing a power-save shutdown, runtime uCode saves data SRAM into
128 * the backup data cache in DRAM before SRAM is powered down.
130 * When powering back up, the BSM loads the bootstrap program. This reloads
131 * the runtime uCode instructions and the backup data cache into SRAM,
132 * and re-launches the runtime uCode from where it left off.
134 static int iwl4965_load_bsm(struct iwl_priv *priv)
136 __le32 *image = priv->ucode_boot.v_addr;
137 u32 len = priv->ucode_boot.len;
147 IWL_DEBUG_INFO("Begin load bsm\n");
149 priv->ucode_type = UCODE_RT;
151 /* make sure bootstrap program is no larger than BSM's SRAM size */
152 if (len > IWL49_MAX_BSM_SIZE)
155 /* Tell bootstrap uCode where to find the "Initialize" uCode
156 * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
157 * NOTE: iwl_init_alive_start() will replace these values,
158 * after the "initialize" uCode has run, to point to
159 * runtime/protocol instructions and backup data cache.
161 pinst = priv->ucode_init.p_addr >> 4;
162 pdata = priv->ucode_init_data.p_addr >> 4;
163 inst_len = priv->ucode_init.len;
164 data_len = priv->ucode_init_data.len;
166 ret = iwl_grab_nic_access(priv);
170 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
171 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
172 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
173 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
175 /* Fill BSM memory with bootstrap instructions */
176 for (reg_offset = BSM_SRAM_LOWER_BOUND;
177 reg_offset < BSM_SRAM_LOWER_BOUND + len;
178 reg_offset += sizeof(u32), image++)
179 _iwl_write_prph(priv, reg_offset, le32_to_cpu(*image));
181 ret = iwl4965_verify_bsm(priv);
183 iwl_release_nic_access(priv);
187 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
188 iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
189 iwl_write_prph(priv, BSM_WR_MEM_DST_REG, IWL49_RTC_INST_LOWER_BOUND);
190 iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
192 /* Load bootstrap code into instruction SRAM now,
193 * to prepare to load "initialize" uCode */
194 iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
196 /* Wait for load of bootstrap uCode to finish */
197 for (i = 0; i < 100; i++) {
198 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
199 if (!(done & BSM_WR_CTRL_REG_BIT_START))
204 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
206 IWL_ERROR("BSM write did not complete!\n");
210 /* Enable future boot loads whenever power management unit triggers it
211 * (e.g. when powering back up after power-save shutdown) */
212 iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
214 iwl_release_nic_access(priv);
220 * iwl4965_set_ucode_ptrs - Set uCode address location
222 * Tell initialization uCode where to find runtime uCode.
224 * BSM registers initially contain pointers to initialization uCode.
225 * We need to replace them to load runtime uCode inst and data,
226 * and to save runtime data when powering down.
228 static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
235 /* bits 35:4 for 4965 */
236 pinst = priv->ucode_code.p_addr >> 4;
237 pdata = priv->ucode_data_backup.p_addr >> 4;
239 spin_lock_irqsave(&priv->lock, flags);
240 ret = iwl_grab_nic_access(priv);
242 spin_unlock_irqrestore(&priv->lock, flags);
246 /* Tell bootstrap uCode where to find image to load */
247 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
248 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
249 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
250 priv->ucode_data.len);
252 /* Inst byte count must be last to set up, bit 31 signals uCode
253 * that all new ptr/size info is in place */
254 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
255 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
256 iwl_release_nic_access(priv);
258 spin_unlock_irqrestore(&priv->lock, flags);
260 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
266 * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
268 * Called after REPLY_ALIVE notification received from "initialize" uCode.
270 * The 4965 "initialize" ALIVE reply contains calibration data for:
271 * Voltage, temperature, and MIMO tx gain correction, now stored in priv
272 * (3945 does not contain this data).
274 * Tell "initialize" uCode to go ahead and load the runtime uCode.
276 static void iwl4965_init_alive_start(struct iwl_priv *priv)
278 /* Check alive response for "valid" sign from uCode */
279 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
280 /* We had an error bringing up the hardware, so take it
281 * all the way back down so we can try again */
282 IWL_DEBUG_INFO("Initialize Alive failed.\n");
286 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
287 * This is a paranoid check, because we would not have gotten the
288 * "initialize" alive if code weren't properly loaded. */
289 if (iwl_verify_ucode(priv)) {
290 /* Runtime instruction load was bad;
291 * take it all the way back down so we can try again */
292 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
296 /* Calculate temperature */
297 priv->temperature = iwl4965_hw_get_temperature(priv);
299 /* Send pointers to protocol/runtime uCode image ... init code will
300 * load and launch runtime uCode, which will send us another "Alive"
302 IWL_DEBUG_INFO("Initialization Alive received.\n");
303 if (iwl4965_set_ucode_ptrs(priv)) {
304 /* Runtime instruction load won't happen;
305 * take it all the way back down so we can try again */
306 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
312 queue_work(priv->workqueue, &priv->restart);
315 static int is_fat_channel(__le32 rxon_flags)
317 return (rxon_flags & RXON_FLG_CHANNEL_MODE_PURE_40_MSK) ||
318 (rxon_flags & RXON_FLG_CHANNEL_MODE_MIXED_MSK);
324 static u16 iwl4965_eeprom_calib_version(struct iwl_priv *priv)
326 return iwl_eeprom_query16(priv, EEPROM_4965_CALIB_VERSION_OFFSET);
330 * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask
331 * must be called under priv->lock and mac access
333 static void iwl4965_txq_set_sched(struct iwl_priv *priv, u32 mask)
335 iwl_write_prph(priv, IWL49_SCD_TXFACT, mask);
338 static int iwl4965_apm_init(struct iwl_priv *priv)
342 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
343 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
345 /* disable L0s without affecting L1 :don't wait for ICH L0s bug W/A) */
346 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
347 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
349 /* set "initialization complete" bit to move adapter
350 * D0U* --> D0A* state */
351 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
353 /* wait for clock stabilization */
354 ret = iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
355 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
357 IWL_DEBUG_INFO("Failed to init the card\n");
361 ret = iwl_grab_nic_access(priv);
366 iwl_write_prph(priv, APMG_CLK_CTRL_REG, APMG_CLK_VAL_DMA_CLK_RQT |
367 APMG_CLK_VAL_BSM_CLK_RQT);
371 /* disable L1-Active */
372 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
373 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
375 iwl_release_nic_access(priv);
381 static void iwl4965_nic_config(struct iwl_priv *priv)
388 spin_lock_irqsave(&priv->lock, flags);
390 if ((priv->rev_id & 0x80) == 0x80 && (priv->rev_id & 0x7f) < 8) {
391 pci_read_config_dword(priv->pci_dev, PCI_REG_WUM8, &val);
392 /* Enable No Snoop field */
393 pci_write_config_dword(priv->pci_dev, PCI_REG_WUM8,
397 pci_read_config_word(priv->pci_dev, PCI_CFG_LINK_CTRL, &link);
399 /* L1 is enabled by BIOS */
400 if ((link & PCI_CFG_LINK_CTRL_VAL_L1_EN) == PCI_CFG_LINK_CTRL_VAL_L1_EN)
401 /* disable L0S disabled L1A enabled */
402 iwl_set_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
404 /* L0S enabled L1A disabled */
405 iwl_clear_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
407 radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
409 /* write radio config values to register */
410 if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
411 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
412 EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
413 EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
414 EEPROM_RF_CFG_DASH_MSK(radio_cfg));
416 /* set CSR_HW_CONFIG_REG for uCode use */
417 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
418 CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
419 CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
421 priv->calib_info = (struct iwl_eeprom_calib_info *)
422 iwl_eeprom_query_addr(priv, EEPROM_4965_CALIB_TXPOWER_OFFSET);
424 spin_unlock_irqrestore(&priv->lock, flags);
427 static int iwl4965_apm_stop_master(struct iwl_priv *priv)
431 spin_lock_irqsave(&priv->lock, flags);
433 /* set stop master bit */
434 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
436 iwl_poll_direct_bit(priv, CSR_RESET,
437 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
439 spin_unlock_irqrestore(&priv->lock, flags);
440 IWL_DEBUG_INFO("stop master\n");
445 static void iwl4965_apm_stop(struct iwl_priv *priv)
449 iwl4965_apm_stop_master(priv);
451 spin_lock_irqsave(&priv->lock, flags);
453 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
456 /* clear "init complete" move adapter D0A* --> D0U state */
457 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
458 spin_unlock_irqrestore(&priv->lock, flags);
461 static int iwl4965_apm_reset(struct iwl_priv *priv)
466 iwl4965_apm_stop_master(priv);
468 spin_lock_irqsave(&priv->lock, flags);
470 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
474 /* FIXME: put here L1A -L0S w/a */
476 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
478 ret = iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
479 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
485 ret = iwl_grab_nic_access(priv);
488 /* Enable DMA and BSM Clock */
489 iwl_write_prph(priv, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT |
490 APMG_CLK_VAL_BSM_CLK_RQT);
495 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
496 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
498 iwl_release_nic_access(priv);
500 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
501 wake_up_interruptible(&priv->wait_command_queue);
504 spin_unlock_irqrestore(&priv->lock, flags);
509 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
510 * Called after every association, but this runs only once!
511 * ... once chain noise is calibrated the first time, it's good forever. */
512 static void iwl4965_chain_noise_reset(struct iwl_priv *priv)
514 struct iwl_chain_noise_data *data = &(priv->chain_noise_data);
516 if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) {
517 struct iwl_calib_diff_gain_cmd cmd;
519 memset(&cmd, 0, sizeof(cmd));
520 cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
524 if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
526 IWL_ERROR("Could not send REPLY_PHY_CALIBRATION_CMD\n");
527 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
528 IWL_DEBUG_CALIB("Run chain_noise_calibrate\n");
532 static void iwl4965_gain_computation(struct iwl_priv *priv,
534 u16 min_average_noise_antenna_i,
535 u32 min_average_noise)
538 struct iwl_chain_noise_data *data = &priv->chain_noise_data;
540 data->delta_gain_code[min_average_noise_antenna_i] = 0;
542 for (i = 0; i < NUM_RX_CHAINS; i++) {
545 if (!(data->disconn_array[i]) &&
546 (data->delta_gain_code[i] ==
547 CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
548 delta_g = average_noise[i] - min_average_noise;
549 data->delta_gain_code[i] = (u8)((delta_g * 10) / 15);
550 data->delta_gain_code[i] =
551 min(data->delta_gain_code[i],
552 (u8) CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
554 data->delta_gain_code[i] =
555 (data->delta_gain_code[i] | (1 << 2));
557 data->delta_gain_code[i] = 0;
560 IWL_DEBUG_CALIB("delta_gain_codes: a %d b %d c %d\n",
561 data->delta_gain_code[0],
562 data->delta_gain_code[1],
563 data->delta_gain_code[2]);
565 /* Differential gain gets sent to uCode only once */
566 if (!data->radio_write) {
567 struct iwl_calib_diff_gain_cmd cmd;
568 data->radio_write = 1;
570 memset(&cmd, 0, sizeof(cmd));
571 cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
572 cmd.diff_gain_a = data->delta_gain_code[0];
573 cmd.diff_gain_b = data->delta_gain_code[1];
574 cmd.diff_gain_c = data->delta_gain_code[2];
575 ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
578 IWL_DEBUG_CALIB("fail sending cmd "
579 "REPLY_PHY_CALIBRATION_CMD \n");
581 /* TODO we might want recalculate
582 * rx_chain in rxon cmd */
584 /* Mark so we run this algo only once! */
585 data->state = IWL_CHAIN_NOISE_CALIBRATED;
587 data->chain_noise_a = 0;
588 data->chain_noise_b = 0;
589 data->chain_noise_c = 0;
590 data->chain_signal_a = 0;
591 data->chain_signal_b = 0;
592 data->chain_signal_c = 0;
593 data->beacon_count = 0;
596 static void iwl4965_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
599 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
600 *tx_flags |= TX_CMD_FLG_RTS_MSK;
601 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
602 } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
603 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
604 *tx_flags |= TX_CMD_FLG_CTS_MSK;
608 static void iwl4965_bg_txpower_work(struct work_struct *work)
610 struct iwl_priv *priv = container_of(work, struct iwl_priv,
613 /* If a scan happened to start before we got here
614 * then just return; the statistics notification will
615 * kick off another scheduled work to compensate for
616 * any temperature delta we missed here. */
617 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
618 test_bit(STATUS_SCANNING, &priv->status))
621 mutex_lock(&priv->mutex);
623 /* Regardless of if we are associated, we must reconfigure the
624 * TX power since frames can be sent on non-radar channels while
626 iwl4965_send_tx_power(priv);
628 /* Update last_temperature to keep is_calib_needed from running
629 * when it isn't needed... */
630 priv->last_temperature = priv->temperature;
632 mutex_unlock(&priv->mutex);
636 * Acquire priv->lock before calling this function !
638 static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
640 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
641 (index & 0xff) | (txq_id << 8));
642 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(txq_id), index);
646 * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
647 * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
648 * @scd_retry: (1) Indicates queue will be used in aggregation mode
650 * NOTE: Acquire priv->lock before calling this function !
652 static void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
653 struct iwl_tx_queue *txq,
654 int tx_fifo_id, int scd_retry)
656 int txq_id = txq->q.id;
658 /* Find out whether to activate Tx queue */
659 int active = test_bit(txq_id, &priv->txq_ctx_active_msk) ? 1 : 0;
661 /* Set up and activate */
662 iwl_write_prph(priv, IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
663 (active << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
664 (tx_fifo_id << IWL49_SCD_QUEUE_STTS_REG_POS_TXF) |
665 (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_WSL) |
666 (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
667 IWL49_SCD_QUEUE_STTS_REG_MSK);
669 txq->sched_retry = scd_retry;
671 IWL_DEBUG_INFO("%s %s Queue %d on AC %d\n",
672 active ? "Activate" : "Deactivate",
673 scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
676 static const u16 default_queue_to_tx_fifo[] = {
686 static int iwl4965_alive_notify(struct iwl_priv *priv)
694 spin_lock_irqsave(&priv->lock, flags);
696 ret = iwl_grab_nic_access(priv);
698 spin_unlock_irqrestore(&priv->lock, flags);
702 /* Clear 4965's internal Tx Scheduler data base */
703 priv->scd_base_addr = iwl_read_prph(priv, IWL49_SCD_SRAM_BASE_ADDR);
704 a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET;
705 for (; a < priv->scd_base_addr + IWL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
706 iwl_write_targ_mem(priv, a, 0);
707 for (; a < priv->scd_base_addr + IWL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
708 iwl_write_targ_mem(priv, a, 0);
709 for (; a < sizeof(u16) * priv->hw_params.max_txq_num; a += 4)
710 iwl_write_targ_mem(priv, a, 0);
712 /* Tel 4965 where to find Tx byte count tables */
713 iwl_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR,
714 priv->scd_bc_tbls.dma >> 10);
716 /* Enable DMA channel */
717 for (chan = 0; chan < FH49_TCSR_CHNL_NUM ; chan++)
718 iwl_write_direct32(priv, FH_TCSR_CHNL_TX_CONFIG_REG(chan),
719 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
720 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE);
722 /* Update FH chicken bits */
723 reg_val = iwl_read_direct32(priv, FH_TX_CHICKEN_BITS_REG);
724 iwl_write_direct32(priv, FH_TX_CHICKEN_BITS_REG,
725 reg_val | FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN);
727 /* Disable chain mode for all queues */
728 iwl_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0);
730 /* Initialize each Tx queue (including the command queue) */
731 for (i = 0; i < priv->hw_params.max_txq_num; i++) {
733 /* TFD circular buffer read/write indexes */
734 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(i), 0);
735 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
737 /* Max Tx Window size for Scheduler-ACK mode */
738 iwl_write_targ_mem(priv, priv->scd_base_addr +
739 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i),
741 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
742 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
745 iwl_write_targ_mem(priv, priv->scd_base_addr +
746 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
749 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
750 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
753 iwl_write_prph(priv, IWL49_SCD_INTERRUPT_MASK,
754 (1 << priv->hw_params.max_txq_num) - 1);
756 /* Activate all Tx DMA/FIFO channels */
757 priv->cfg->ops->lib->txq_set_sched(priv, IWL_MASK(0, 6));
759 iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
761 /* Map each Tx/cmd queue to its corresponding fifo */
762 for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
763 int ac = default_queue_to_tx_fifo[i];
764 iwl_txq_ctx_activate(priv, i);
765 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
768 iwl_release_nic_access(priv);
769 spin_unlock_irqrestore(&priv->lock, flags);
774 static struct iwl_sensitivity_ranges iwl4965_sensitivity = {
778 .auto_corr_min_ofdm = 85,
779 .auto_corr_min_ofdm_mrc = 170,
780 .auto_corr_min_ofdm_x1 = 105,
781 .auto_corr_min_ofdm_mrc_x1 = 220,
783 .auto_corr_max_ofdm = 120,
784 .auto_corr_max_ofdm_mrc = 210,
785 .auto_corr_max_ofdm_x1 = 140,
786 .auto_corr_max_ofdm_mrc_x1 = 270,
788 .auto_corr_min_cck = 125,
789 .auto_corr_max_cck = 200,
790 .auto_corr_min_cck_mrc = 200,
791 .auto_corr_max_cck_mrc = 400,
798 * iwl4965_hw_set_hw_params
800 * Called when initializing driver
802 static int iwl4965_hw_set_hw_params(struct iwl_priv *priv)
805 if ((priv->cfg->mod_params->num_of_queues > IWL49_NUM_QUEUES) ||
806 (priv->cfg->mod_params->num_of_queues < IWL_MIN_NUM_QUEUES)) {
807 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
808 IWL_MIN_NUM_QUEUES, IWL49_NUM_QUEUES);
812 priv->hw_params.max_txq_num = priv->cfg->mod_params->num_of_queues;
813 priv->hw_params.dma_chnl_num = FH49_TCSR_CHNL_NUM;
814 priv->hw_params.scd_bc_tbls_size =
815 IWL49_NUM_QUEUES * sizeof(struct iwl4965_scd_bc_tbl);
816 priv->hw_params.max_stations = IWL4965_STATION_COUNT;
817 priv->hw_params.bcast_sta_id = IWL4965_BROADCAST_ID;
818 priv->hw_params.max_data_size = IWL49_RTC_DATA_SIZE;
819 priv->hw_params.max_inst_size = IWL49_RTC_INST_SIZE;
820 priv->hw_params.max_bsm_size = BSM_SRAM_SIZE;
821 priv->hw_params.fat_channel = BIT(IEEE80211_BAND_5GHZ);
823 priv->hw_params.tx_chains_num = 2;
824 priv->hw_params.rx_chains_num = 2;
825 priv->hw_params.valid_tx_ant = ANT_A | ANT_B;
826 priv->hw_params.valid_rx_ant = ANT_A | ANT_B;
827 priv->hw_params.ct_kill_threshold = CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD);
829 priv->hw_params.sens = &iwl4965_sensitivity;
834 static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
847 *res = ((num * 2 + denom) / (denom * 2)) * sign;
853 * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
855 * Determines power supply voltage compensation for txpower calculations.
856 * Returns number of 1/2-dB steps to subtract from gain table index,
857 * to compensate for difference between power supply voltage during
858 * factory measurements, vs. current power supply voltage.
860 * Voltage indication is higher for lower voltage.
861 * Lower voltage requires more gain (lower gain table index).
863 static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
868 if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
869 (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
872 iwl4965_math_div_round(current_voltage - eeprom_voltage,
873 TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
875 if (current_voltage > eeprom_voltage)
877 if ((comp < -2) || (comp > 2))
883 static s32 iwl4965_get_tx_atten_grp(u16 channel)
885 if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
886 channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
887 return CALIB_CH_GROUP_5;
889 if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
890 channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
891 return CALIB_CH_GROUP_1;
893 if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
894 channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
895 return CALIB_CH_GROUP_2;
897 if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
898 channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
899 return CALIB_CH_GROUP_3;
901 if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
902 channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
903 return CALIB_CH_GROUP_4;
908 static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel)
912 for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
913 if (priv->calib_info->band_info[b].ch_from == 0)
916 if ((channel >= priv->calib_info->band_info[b].ch_from)
917 && (channel <= priv->calib_info->band_info[b].ch_to))
924 static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
931 iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
937 * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
939 * Interpolates factory measurements from the two sample channels within a
940 * sub-band, to apply to channel of interest. Interpolation is proportional to
941 * differences in channel frequencies, which is proportional to differences
944 static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel,
945 struct iwl_eeprom_calib_ch_info *chan_info)
950 const struct iwl_eeprom_calib_measure *m1;
951 const struct iwl_eeprom_calib_measure *m2;
952 struct iwl_eeprom_calib_measure *omeas;
956 s = iwl4965_get_sub_band(priv, channel);
957 if (s >= EEPROM_TX_POWER_BANDS) {
958 IWL_ERROR("Tx Power can not find channel %d\n", channel);
962 ch_i1 = priv->calib_info->band_info[s].ch1.ch_num;
963 ch_i2 = priv->calib_info->band_info[s].ch2.ch_num;
964 chan_info->ch_num = (u8) channel;
966 IWL_DEBUG_TXPOWER("channel %d subband %d factory cal ch %d & %d\n",
967 channel, s, ch_i1, ch_i2);
969 for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
970 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
971 m1 = &(priv->calib_info->band_info[s].ch1.
973 m2 = &(priv->calib_info->band_info[s].ch2.
975 omeas = &(chan_info->measurements[c][m]);
978 (u8) iwl4965_interpolate_value(channel, ch_i1,
983 (u8) iwl4965_interpolate_value(channel, ch_i1,
987 (u8) iwl4965_interpolate_value(channel, ch_i1,
992 (s8) iwl4965_interpolate_value(channel, ch_i1,
997 ("chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
998 m1->actual_pow, m2->actual_pow, omeas->actual_pow);
1000 ("chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
1001 m1->gain_idx, m2->gain_idx, omeas->gain_idx);
1003 ("chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
1004 m1->pa_det, m2->pa_det, omeas->pa_det);
1006 ("chain %d meas %d T1=%d T2=%d T=%d\n", c, m,
1007 m1->temperature, m2->temperature,
1008 omeas->temperature);
1015 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
1016 * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
1017 static s32 back_off_table[] = {
1018 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
1019 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
1020 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
1021 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
1025 /* Thermal compensation values for txpower for various frequency ranges ...
1026 * ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
1027 static struct iwl4965_txpower_comp_entry {
1028 s32 degrees_per_05db_a;
1029 s32 degrees_per_05db_a_denom;
1030 } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
1031 {9, 2}, /* group 0 5.2, ch 34-43 */
1032 {4, 1}, /* group 1 5.2, ch 44-70 */
1033 {4, 1}, /* group 2 5.2, ch 71-124 */
1034 {4, 1}, /* group 3 5.2, ch 125-200 */
1035 {3, 1} /* group 4 2.4, ch all */
1038 static s32 get_min_power_index(s32 rate_power_index, u32 band)
1041 if ((rate_power_index & 7) <= 4)
1042 return MIN_TX_GAIN_INDEX_52GHZ_EXT;
1044 return MIN_TX_GAIN_INDEX;
1052 static const struct gain_entry gain_table[2][108] = {
1053 /* 5.2GHz power gain index table */
1055 {123, 0x3F}, /* highest txpower */
1164 /* 2.4GHz power gain index table */
1166 {110, 0x3f}, /* highest txpower */
1277 static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
1278 u8 is_fat, u8 ctrl_chan_high,
1279 struct iwl4965_tx_power_db *tx_power_tbl)
1281 u8 saturation_power;
1283 s32 user_target_power;
1287 s32 current_regulatory;
1288 s32 txatten_grp = CALIB_CH_GROUP_MAX;
1291 const struct iwl_channel_info *ch_info = NULL;
1292 struct iwl_eeprom_calib_ch_info ch_eeprom_info;
1293 const struct iwl_eeprom_calib_measure *measurement;
1296 s32 voltage_compensation;
1297 s32 degrees_per_05db_num;
1298 s32 degrees_per_05db_denom;
1300 s32 temperature_comp[2];
1301 s32 factory_gain_index[2];
1302 s32 factory_actual_pwr[2];
1305 /* user_txpower_limit is in dBm, convert to half-dBm (half-dB units
1306 * are used for indexing into txpower table) */
1307 user_target_power = 2 * priv->tx_power_user_lmt;
1309 /* Get current (RXON) channel, band, width */
1310 IWL_DEBUG_TXPOWER("chan %d band %d is_fat %d\n", channel, band,
1313 ch_info = iwl_get_channel_info(priv, priv->band, channel);
1315 if (!is_channel_valid(ch_info))
1318 /* get txatten group, used to select 1) thermal txpower adjustment
1319 * and 2) mimo txpower balance between Tx chains. */
1320 txatten_grp = iwl4965_get_tx_atten_grp(channel);
1321 if (txatten_grp < 0) {
1322 IWL_ERROR("Can't find txatten group for channel %d.\n",
1327 IWL_DEBUG_TXPOWER("channel %d belongs to txatten group %d\n",
1328 channel, txatten_grp);
1337 /* hardware txpower limits ...
1338 * saturation (clipping distortion) txpowers are in half-dBm */
1340 saturation_power = priv->calib_info->saturation_power24;
1342 saturation_power = priv->calib_info->saturation_power52;
1344 if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
1345 saturation_power > IWL_TX_POWER_SATURATION_MAX) {
1347 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
1349 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
1352 /* regulatory txpower limits ... reg_limit values are in half-dBm,
1353 * max_power_avg values are in dBm, convert * 2 */
1355 reg_limit = ch_info->fat_max_power_avg * 2;
1357 reg_limit = ch_info->max_power_avg * 2;
1359 if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
1360 (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
1362 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
1364 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
1367 /* Interpolate txpower calibration values for this channel,
1368 * based on factory calibration tests on spaced channels. */
1369 iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
1371 /* calculate tx gain adjustment based on power supply voltage */
1372 voltage = priv->calib_info->voltage;
1373 init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
1374 voltage_compensation =
1375 iwl4965_get_voltage_compensation(voltage, init_voltage);
1377 IWL_DEBUG_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n",
1379 voltage, voltage_compensation);
1381 /* get current temperature (Celsius) */
1382 current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
1383 current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
1384 current_temp = KELVIN_TO_CELSIUS(current_temp);
1386 /* select thermal txpower adjustment params, based on channel group
1387 * (same frequency group used for mimo txatten adjustment) */
1388 degrees_per_05db_num =
1389 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
1390 degrees_per_05db_denom =
1391 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
1393 /* get per-chain txpower values from factory measurements */
1394 for (c = 0; c < 2; c++) {
1395 measurement = &ch_eeprom_info.measurements[c][1];
1397 /* txgain adjustment (in half-dB steps) based on difference
1398 * between factory and current temperature */
1399 factory_temp = measurement->temperature;
1400 iwl4965_math_div_round((current_temp - factory_temp) *
1401 degrees_per_05db_denom,
1402 degrees_per_05db_num,
1403 &temperature_comp[c]);
1405 factory_gain_index[c] = measurement->gain_idx;
1406 factory_actual_pwr[c] = measurement->actual_pow;
1408 IWL_DEBUG_TXPOWER("chain = %d\n", c);
1409 IWL_DEBUG_TXPOWER("fctry tmp %d, "
1410 "curr tmp %d, comp %d steps\n",
1411 factory_temp, current_temp,
1412 temperature_comp[c]);
1414 IWL_DEBUG_TXPOWER("fctry idx %d, fctry pwr %d\n",
1415 factory_gain_index[c],
1416 factory_actual_pwr[c]);
1419 /* for each of 33 bit-rates (including 1 for CCK) */
1420 for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
1422 union iwl4965_tx_power_dual_stream tx_power;
1424 /* for mimo, reduce each chain's txpower by half
1425 * (3dB, 6 steps), so total output power is regulatory
1428 current_regulatory = reg_limit -
1429 IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
1432 current_regulatory = reg_limit;
1436 /* find txpower limit, either hardware or regulatory */
1437 power_limit = saturation_power - back_off_table[i];
1438 if (power_limit > current_regulatory)
1439 power_limit = current_regulatory;
1441 /* reduce user's txpower request if necessary
1442 * for this rate on this channel */
1443 target_power = user_target_power;
1444 if (target_power > power_limit)
1445 target_power = power_limit;
1447 IWL_DEBUG_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n",
1448 i, saturation_power - back_off_table[i],
1449 current_regulatory, user_target_power,
1452 /* for each of 2 Tx chains (radio transmitters) */
1453 for (c = 0; c < 2; c++) {
1458 (s32)le32_to_cpu(priv->card_alive_init.
1459 tx_atten[txatten_grp][c]);
1463 /* calculate index; higher index means lower txpower */
1464 power_index = (u8) (factory_gain_index[c] -
1466 factory_actual_pwr[c]) -
1467 temperature_comp[c] -
1468 voltage_compensation +
1471 /* IWL_DEBUG_TXPOWER("calculated txpower index %d\n",
1474 if (power_index < get_min_power_index(i, band))
1475 power_index = get_min_power_index(i, band);
1477 /* adjust 5 GHz index to support negative indexes */
1481 /* CCK, rate 32, reduce txpower for CCK */
1482 if (i == POWER_TABLE_CCK_ENTRY)
1484 IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
1486 /* stay within the table! */
1487 if (power_index > 107) {
1488 IWL_WARN(priv, "txpower index %d > 107\n",
1492 if (power_index < 0) {
1493 IWL_WARN(priv, "txpower index %d < 0\n",
1498 /* fill txpower command for this rate/chain */
1499 tx_power.s.radio_tx_gain[c] =
1500 gain_table[band][power_index].radio;
1501 tx_power.s.dsp_predis_atten[c] =
1502 gain_table[band][power_index].dsp;
1504 IWL_DEBUG_TXPOWER("chain %d mimo %d index %d "
1505 "gain 0x%02x dsp %d\n",
1506 c, atten_value, power_index,
1507 tx_power.s.radio_tx_gain[c],
1508 tx_power.s.dsp_predis_atten[c]);
1509 } /* for each chain */
1511 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
1513 } /* for each rate */
1519 * iwl4965_send_tx_power - Configure the TXPOWER level user limit
1521 * Uses the active RXON for channel, band, and characteristics (fat, high)
1522 * The power limit is taken from priv->tx_power_user_lmt.
1524 static int iwl4965_send_tx_power(struct iwl_priv *priv)
1526 struct iwl4965_txpowertable_cmd cmd = { 0 };
1530 u8 ctrl_chan_high = 0;
1532 if (test_bit(STATUS_SCANNING, &priv->status)) {
1533 /* If this gets hit a lot, switch it to a BUG() and catch
1534 * the stack trace to find out who is calling this during
1536 IWL_WARN(priv, "TX Power requested while scanning!\n");
1540 band = priv->band == IEEE80211_BAND_2GHZ;
1542 is_fat = is_fat_channel(priv->active_rxon.flags);
1545 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1549 cmd.channel = priv->active_rxon.channel;
1551 ret = iwl4965_fill_txpower_tbl(priv, band,
1552 le16_to_cpu(priv->active_rxon.channel),
1553 is_fat, ctrl_chan_high, &cmd.tx_power);
1557 ret = iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
1563 static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
1566 struct iwl4965_rxon_assoc_cmd rxon_assoc;
1567 const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
1568 const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
1570 if ((rxon1->flags == rxon2->flags) &&
1571 (rxon1->filter_flags == rxon2->filter_flags) &&
1572 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1573 (rxon1->ofdm_ht_single_stream_basic_rates ==
1574 rxon2->ofdm_ht_single_stream_basic_rates) &&
1575 (rxon1->ofdm_ht_dual_stream_basic_rates ==
1576 rxon2->ofdm_ht_dual_stream_basic_rates) &&
1577 (rxon1->rx_chain == rxon2->rx_chain) &&
1578 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1579 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
1583 rxon_assoc.flags = priv->staging_rxon.flags;
1584 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1585 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1586 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1587 rxon_assoc.reserved = 0;
1588 rxon_assoc.ofdm_ht_single_stream_basic_rates =
1589 priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1590 rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1591 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1592 rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1594 ret = iwl_send_cmd_pdu_async(priv, REPLY_RXON_ASSOC,
1595 sizeof(rxon_assoc), &rxon_assoc, NULL);
1602 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
1603 static int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel)
1608 u8 ctrl_chan_high = 0;
1609 struct iwl4965_channel_switch_cmd cmd = { 0 };
1610 const struct iwl_channel_info *ch_info;
1612 band = priv->band == IEEE80211_BAND_2GHZ;
1614 ch_info = iwl_get_channel_info(priv, priv->band, channel);
1616 is_fat = is_fat_channel(priv->staging_rxon.flags);
1619 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1623 cmd.expect_beacon = 0;
1624 cmd.channel = cpu_to_le16(channel);
1625 cmd.rxon_flags = priv->active_rxon.flags;
1626 cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
1627 cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
1629 cmd.expect_beacon = is_channel_radar(ch_info);
1631 cmd.expect_beacon = 1;
1633 rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_fat,
1634 ctrl_chan_high, &cmd.tx_power);
1636 IWL_DEBUG_11H("error:%d fill txpower_tbl\n", rc);
1640 rc = iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
1646 * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
1648 static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
1649 struct iwl_tx_queue *txq,
1652 struct iwl4965_scd_bc_tbl *scd_bc_tbl = priv->scd_bc_tbls.addr;
1653 int txq_id = txq->q.id;
1654 int write_ptr = txq->q.write_ptr;
1655 int len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
1658 WARN_ON(len > 0xFFF || write_ptr >= TFD_QUEUE_SIZE_MAX);
1660 bc_ent = cpu_to_le16(len & 0xFFF);
1661 /* Set up byte count within first 256 entries */
1662 scd_bc_tbl[txq_id].tfd_offset[write_ptr] = bc_ent;
1664 /* If within first 64 entries, duplicate at end */
1665 if (write_ptr < TFD_QUEUE_SIZE_BC_DUP)
1667 tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] = bc_ent;
1671 * sign_extend - Sign extend a value using specified bit as sign-bit
1673 * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
1674 * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
1676 * @param oper value to sign extend
1677 * @param index 0 based bit index (0<=index<32) to sign bit
1679 static s32 sign_extend(u32 oper, int index)
1681 u8 shift = 31 - index;
1683 return (s32)(oper << shift) >> shift;
1687 * iwl4965_hw_get_temperature - return the calibrated temperature (in Kelvin)
1688 * @statistics: Provides the temperature reading from the uCode
1690 * A return of <0 indicates bogus data in the statistics
1692 static int iwl4965_hw_get_temperature(const struct iwl_priv *priv)
1699 if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
1700 (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)) {
1701 IWL_DEBUG_TEMP("Running FAT temperature calibration\n");
1702 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
1703 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
1704 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
1705 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
1707 IWL_DEBUG_TEMP("Running temperature calibration\n");
1708 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
1709 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
1710 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
1711 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
1715 * Temperature is only 23 bits, so sign extend out to 32.
1717 * NOTE If we haven't received a statistics notification yet
1718 * with an updated temperature, use R4 provided to us in the
1719 * "initialize" ALIVE response.
1721 if (!test_bit(STATUS_TEMPERATURE, &priv->status))
1722 vt = sign_extend(R4, 23);
1725 le32_to_cpu(priv->statistics.general.temperature), 23);
1727 IWL_DEBUG_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt);
1730 IWL_ERROR("Calibration conflict R1 == R3\n");
1734 /* Calculate temperature in degrees Kelvin, adjust by 97%.
1735 * Add offset to center the adjustment around 0 degrees Centigrade. */
1736 temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
1737 temperature /= (R3 - R1);
1738 temperature = (temperature * 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET;
1740 IWL_DEBUG_TEMP("Calibrated temperature: %dK, %dC\n",
1741 temperature, KELVIN_TO_CELSIUS(temperature));
1746 /* Adjust Txpower only if temperature variance is greater than threshold. */
1747 #define IWL_TEMPERATURE_THRESHOLD 3
1750 * iwl4965_is_temp_calib_needed - determines if new calibration is needed
1752 * If the temperature changed has changed sufficiently, then a recalibration
1755 * Assumes caller will replace priv->last_temperature once calibration
1758 static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv)
1762 if (!test_bit(STATUS_STATISTICS, &priv->status)) {
1763 IWL_DEBUG_TEMP("Temperature not updated -- no statistics.\n");
1767 temp_diff = priv->temperature - priv->last_temperature;
1769 /* get absolute value */
1770 if (temp_diff < 0) {
1771 IWL_DEBUG_POWER("Getting cooler, delta %d, \n", temp_diff);
1772 temp_diff = -temp_diff;
1773 } else if (temp_diff == 0)
1774 IWL_DEBUG_POWER("Same temp, \n");
1776 IWL_DEBUG_POWER("Getting warmer, delta %d, \n", temp_diff);
1778 if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
1779 IWL_DEBUG_POWER("Thermal txpower calib not needed\n");
1783 IWL_DEBUG_POWER("Thermal txpower calib needed\n");
1788 static void iwl4965_temperature_calib(struct iwl_priv *priv)
1792 temp = iwl4965_hw_get_temperature(priv);
1796 if (priv->temperature != temp) {
1797 if (priv->temperature)
1798 IWL_DEBUG_TEMP("Temperature changed "
1799 "from %dC to %dC\n",
1800 KELVIN_TO_CELSIUS(priv->temperature),
1801 KELVIN_TO_CELSIUS(temp));
1803 IWL_DEBUG_TEMP("Temperature "
1804 "initialized to %dC\n",
1805 KELVIN_TO_CELSIUS(temp));
1808 priv->temperature = temp;
1809 set_bit(STATUS_TEMPERATURE, &priv->status);
1811 if (!priv->disable_tx_power_cal &&
1812 unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
1813 iwl4965_is_temp_calib_needed(priv))
1814 queue_work(priv->workqueue, &priv->txpower_work);
1818 * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
1820 static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv,
1823 /* Simply stop the queue, but don't change any configuration;
1824 * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
1825 iwl_write_prph(priv,
1826 IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
1827 (0 << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE)|
1828 (1 << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
1832 * txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE
1833 * priv->lock must be held by the caller
1835 static int iwl4965_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
1836 u16 ssn_idx, u8 tx_fifo)
1840 if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1841 (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) {
1843 "queue number out of range: %d, must be %d to %d\n",
1844 txq_id, IWL49_FIRST_AMPDU_QUEUE,
1845 IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES - 1);
1849 ret = iwl_grab_nic_access(priv);
1853 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1855 iwl_clear_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
1857 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1858 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1859 /* supposes that ssn_idx is valid (!= 0xFFF) */
1860 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1862 iwl_clear_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
1863 iwl_txq_ctx_deactivate(priv, txq_id);
1864 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
1866 iwl_release_nic_access(priv);
1872 * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
1874 static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
1881 scd_q2ratid = ra_tid & IWL_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
1883 tbl_dw_addr = priv->scd_base_addr +
1884 IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
1886 tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
1889 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
1891 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
1893 iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
1900 * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
1902 * NOTE: txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE,
1903 * i.e. it must be one of the higher queues used for aggregation
1905 static int iwl4965_txq_agg_enable(struct iwl_priv *priv, int txq_id,
1906 int tx_fifo, int sta_id, int tid, u16 ssn_idx)
1908 unsigned long flags;
1912 if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1913 (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) {
1915 "queue number out of range: %d, must be %d to %d\n",
1916 txq_id, IWL49_FIRST_AMPDU_QUEUE,
1917 IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES - 1);
1921 ra_tid = BUILD_RAxTID(sta_id, tid);
1923 /* Modify device's station table to Tx this TID */
1924 iwl_sta_tx_modify_enable_tid(priv, sta_id, tid);
1926 spin_lock_irqsave(&priv->lock, flags);
1927 ret = iwl_grab_nic_access(priv);
1929 spin_unlock_irqrestore(&priv->lock, flags);
1933 /* Stop this Tx queue before configuring it */
1934 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1936 /* Map receiver-address / traffic-ID to this queue */
1937 iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
1939 /* Set this queue as a chain-building queue */
1940 iwl_set_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
1942 /* Place first TFD at index corresponding to start sequence number.
1943 * Assumes that ssn_idx is valid (!= 0xFFF) */
1944 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1945 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1946 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1948 /* Set up Tx window size and frame limit for this queue */
1949 iwl_write_targ_mem(priv,
1950 priv->scd_base_addr + IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id),
1951 (SCD_WIN_SIZE << IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
1952 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
1954 iwl_write_targ_mem(priv, priv->scd_base_addr +
1955 IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
1956 (SCD_FRAME_LIMIT << IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
1957 & IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
1959 iwl_set_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
1961 /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
1962 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
1964 iwl_release_nic_access(priv);
1965 spin_unlock_irqrestore(&priv->lock, flags);
1971 static u16 iwl4965_get_hcmd_size(u8 cmd_id, u16 len)
1975 return (u16) sizeof(struct iwl4965_rxon_cmd);
1981 static u16 iwl4965_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
1983 struct iwl4965_addsta_cmd *addsta = (struct iwl4965_addsta_cmd *)data;
1984 addsta->mode = cmd->mode;
1985 memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
1986 memcpy(&addsta->key, &cmd->key, sizeof(struct iwl4965_keyinfo));
1987 addsta->station_flags = cmd->station_flags;
1988 addsta->station_flags_msk = cmd->station_flags_msk;
1989 addsta->tid_disable_tx = cmd->tid_disable_tx;
1990 addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
1991 addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
1992 addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
1993 addsta->reserved1 = __constant_cpu_to_le16(0);
1994 addsta->reserved2 = __constant_cpu_to_le32(0);
1996 return (u16)sizeof(struct iwl4965_addsta_cmd);
1999 static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
2001 return le32_to_cpup(&tx_resp->u.status + tx_resp->frame_count) & MAX_SN;
2005 * iwl4965_tx_status_reply_tx - Handle Tx response for frames in aggregation queue
2007 static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
2008 struct iwl_ht_agg *agg,
2009 struct iwl4965_tx_resp *tx_resp,
2010 int txq_id, u16 start_idx)
2013 struct agg_tx_status *frame_status = tx_resp->u.agg_status;
2014 struct ieee80211_tx_info *info = NULL;
2015 struct ieee80211_hdr *hdr = NULL;
2016 u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
2019 if (agg->wait_for_ba)
2020 IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
2022 agg->frame_count = tx_resp->frame_count;
2023 agg->start_idx = start_idx;
2024 agg->rate_n_flags = rate_n_flags;
2027 /* num frames attempted by Tx command */
2028 if (agg->frame_count == 1) {
2029 /* Only one frame was attempted; no block-ack will arrive */
2030 status = le16_to_cpu(frame_status[0].status);
2033 /* FIXME: code repetition */
2034 IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
2035 agg->frame_count, agg->start_idx, idx);
2037 info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb[0]);
2038 info->status.rates[0].count = tx_resp->failure_frame + 1;
2039 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
2040 info->flags |= iwl_is_tx_success(status) ?
2041 IEEE80211_TX_STAT_ACK : 0;
2042 iwl_hwrate_to_tx_control(priv, rate_n_flags, info);
2043 /* FIXME: code repetition end */
2045 IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
2046 status & 0xff, tx_resp->failure_frame);
2047 IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n", rate_n_flags);
2049 agg->wait_for_ba = 0;
2051 /* Two or more frames were attempted; expect block-ack */
2053 int start = agg->start_idx;
2055 /* Construct bit-map of pending frames within Tx window */
2056 for (i = 0; i < agg->frame_count; i++) {
2058 status = le16_to_cpu(frame_status[i].status);
2059 seq = le16_to_cpu(frame_status[i].sequence);
2060 idx = SEQ_TO_INDEX(seq);
2061 txq_id = SEQ_TO_QUEUE(seq);
2063 if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
2064 AGG_TX_STATE_ABORT_MSK))
2067 IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
2068 agg->frame_count, txq_id, idx);
2070 hdr = iwl_tx_queue_get_hdr(priv, txq_id, idx);
2072 sc = le16_to_cpu(hdr->seq_ctrl);
2073 if (idx != (SEQ_TO_SN(sc) & 0xff)) {
2074 IWL_ERROR("BUG_ON idx doesn't match seq control"
2075 " idx=%d, seq_idx=%d, seq=%d\n",
2081 IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
2082 i, idx, SEQ_TO_SN(sc));
2086 sh = (start - idx) + 0xff;
2087 bitmap = bitmap << sh;
2090 } else if (sh < -64)
2091 sh = 0xff - (start - idx);
2095 bitmap = bitmap << sh;
2098 bitmap |= 1ULL << sh;
2099 IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%llx\n",
2100 start, (unsigned long long)bitmap);
2103 agg->bitmap = bitmap;
2104 agg->start_idx = start;
2105 IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
2106 agg->frame_count, agg->start_idx,
2107 (unsigned long long)agg->bitmap);
2110 agg->wait_for_ba = 1;
2116 * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
2118 static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
2119 struct iwl_rx_mem_buffer *rxb)
2121 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2122 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
2123 int txq_id = SEQ_TO_QUEUE(sequence);
2124 int index = SEQ_TO_INDEX(sequence);
2125 struct iwl_tx_queue *txq = &priv->txq[txq_id];
2126 struct ieee80211_hdr *hdr;
2127 struct ieee80211_tx_info *info;
2128 struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
2129 u32 status = le32_to_cpu(tx_resp->u.status);
2130 int tid = MAX_TID_COUNT;
2135 if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) {
2136 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
2137 "is out of range [0-%d] %d %d\n", txq_id,
2138 index, txq->q.n_bd, txq->q.write_ptr,
2143 info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
2144 memset(&info->status, 0, sizeof(info->status));
2146 hdr = iwl_tx_queue_get_hdr(priv, txq_id, index);
2147 if (ieee80211_is_data_qos(hdr->frame_control)) {
2148 qc = ieee80211_get_qos_ctl(hdr);
2152 sta_id = iwl_get_ra_sta_id(priv, hdr);
2153 if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
2154 IWL_ERROR("Station not known\n");
2158 if (txq->sched_retry) {
2159 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
2160 struct iwl_ht_agg *agg = NULL;
2164 agg = &priv->stations[sta_id].tid[tid].agg;
2166 iwl4965_tx_status_reply_tx(priv, agg, tx_resp, txq_id, index);
2168 /* check if BAR is needed */
2169 if ((tx_resp->frame_count == 1) && !iwl_is_tx_success(status))
2170 info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
2172 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
2173 index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
2174 IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
2175 "%d index %d\n", scd_ssn , index);
2176 freed = iwl_tx_queue_reclaim(priv, txq_id, index);
2177 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2179 if (priv->mac80211_registered &&
2180 (iwl_queue_space(&txq->q) > txq->q.low_mark) &&
2181 (agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)) {
2182 if (agg->state == IWL_AGG_OFF)
2183 ieee80211_wake_queue(priv->hw, txq_id);
2185 ieee80211_wake_queue(priv->hw,
2190 info->status.rates[0].count = tx_resp->failure_frame + 1;
2191 info->flags |= iwl_is_tx_success(status) ?
2192 IEEE80211_TX_STAT_ACK : 0;
2193 iwl_hwrate_to_tx_control(priv,
2194 le32_to_cpu(tx_resp->rate_n_flags),
2197 IWL_DEBUG_TX_REPLY("TXQ %d status %s (0x%08x) "
2198 "rate_n_flags 0x%x retries %d\n",
2200 iwl_get_tx_fail_reason(status), status,
2201 le32_to_cpu(tx_resp->rate_n_flags),
2202 tx_resp->failure_frame);
2204 freed = iwl_tx_queue_reclaim(priv, txq_id, index);
2205 if (qc && likely(sta_id != IWL_INVALID_STATION))
2206 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2208 if (priv->mac80211_registered &&
2209 (iwl_queue_space(&txq->q) > txq->q.low_mark))
2210 ieee80211_wake_queue(priv->hw, txq_id);
2213 if (qc && likely(sta_id != IWL_INVALID_STATION))
2214 iwl_txq_check_empty(priv, sta_id, tid, txq_id);
2216 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
2217 IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
2220 static int iwl4965_calc_rssi(struct iwl_priv *priv,
2221 struct iwl_rx_phy_res *rx_resp)
2223 /* data from PHY/DSP regarding signal strength, etc.,
2224 * contents are always there, not configurable by host. */
2225 struct iwl4965_rx_non_cfg_phy *ncphy =
2226 (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy_buf;
2227 u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL49_AGC_DB_MASK)
2228 >> IWL49_AGC_DB_POS;
2230 u32 valid_antennae =
2231 (le16_to_cpu(rx_resp->phy_flags) & IWL49_RX_PHY_FLAGS_ANTENNAE_MASK)
2232 >> IWL49_RX_PHY_FLAGS_ANTENNAE_OFFSET;
2236 /* Find max rssi among 3 possible receivers.
2237 * These values are measured by the digital signal processor (DSP).
2238 * They should stay fairly constant even as the signal strength varies,
2239 * if the radio's automatic gain control (AGC) is working right.
2240 * AGC value (see below) will provide the "interesting" info. */
2241 for (i = 0; i < 3; i++)
2242 if (valid_antennae & (1 << i))
2243 max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
2245 IWL_DEBUG_STATS("Rssi In A %d B %d C %d Max %d AGC dB %d\n",
2246 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
2249 /* dBm = max_rssi dB - agc dB - constant.
2250 * Higher AGC (higher radio gain) means lower signal. */
2251 return max_rssi - agc - IWL49_RSSI_OFFSET;
2255 /* Set up 4965-specific Rx frame reply handlers */
2256 static void iwl4965_rx_handler_setup(struct iwl_priv *priv)
2258 /* Legacy Rx frames */
2259 priv->rx_handlers[REPLY_RX] = iwl_rx_reply_rx;
2261 priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
2264 static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
2266 INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
2269 static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
2271 cancel_work_sync(&priv->txpower_work);
2275 static struct iwl_hcmd_ops iwl4965_hcmd = {
2276 .rxon_assoc = iwl4965_send_rxon_assoc,
2279 static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
2280 .get_hcmd_size = iwl4965_get_hcmd_size,
2281 .build_addsta_hcmd = iwl4965_build_addsta_hcmd,
2282 .chain_noise_reset = iwl4965_chain_noise_reset,
2283 .gain_computation = iwl4965_gain_computation,
2284 .rts_tx_cmd_flag = iwl4965_rts_tx_cmd_flag,
2285 .calc_rssi = iwl4965_calc_rssi,
2288 static struct iwl_lib_ops iwl4965_lib = {
2289 .set_hw_params = iwl4965_hw_set_hw_params,
2290 .txq_update_byte_cnt_tbl = iwl4965_txq_update_byte_cnt_tbl,
2291 .txq_set_sched = iwl4965_txq_set_sched,
2292 .txq_agg_enable = iwl4965_txq_agg_enable,
2293 .txq_agg_disable = iwl4965_txq_agg_disable,
2294 .rx_handler_setup = iwl4965_rx_handler_setup,
2295 .setup_deferred_work = iwl4965_setup_deferred_work,
2296 .cancel_deferred_work = iwl4965_cancel_deferred_work,
2297 .is_valid_rtc_data_addr = iwl4965_hw_valid_rtc_data_addr,
2298 .alive_notify = iwl4965_alive_notify,
2299 .init_alive_start = iwl4965_init_alive_start,
2300 .load_ucode = iwl4965_load_bsm,
2302 .init = iwl4965_apm_init,
2303 .reset = iwl4965_apm_reset,
2304 .stop = iwl4965_apm_stop,
2305 .config = iwl4965_nic_config,
2306 .set_pwr_src = iwl_set_pwr_src,
2309 .regulatory_bands = {
2310 EEPROM_REGULATORY_BAND_1_CHANNELS,
2311 EEPROM_REGULATORY_BAND_2_CHANNELS,
2312 EEPROM_REGULATORY_BAND_3_CHANNELS,
2313 EEPROM_REGULATORY_BAND_4_CHANNELS,
2314 EEPROM_REGULATORY_BAND_5_CHANNELS,
2315 EEPROM_4965_REGULATORY_BAND_24_FAT_CHANNELS,
2316 EEPROM_4965_REGULATORY_BAND_52_FAT_CHANNELS
2318 .verify_signature = iwlcore_eeprom_verify_signature,
2319 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
2320 .release_semaphore = iwlcore_eeprom_release_semaphore,
2321 .calib_version = iwl4965_eeprom_calib_version,
2322 .query_addr = iwlcore_eeprom_query_addr,
2324 .send_tx_power = iwl4965_send_tx_power,
2325 .update_chain_flags = iwl_update_chain_flags,
2326 .temperature = iwl4965_temperature_calib,
2329 static struct iwl_ops iwl4965_ops = {
2330 .lib = &iwl4965_lib,
2331 .hcmd = &iwl4965_hcmd,
2332 .utils = &iwl4965_hcmd_utils,
2335 struct iwl_cfg iwl4965_agn_cfg = {
2337 .fw_name_pre = IWL4965_FW_PRE,
2338 .ucode_api_max = IWL4965_UCODE_API_MAX,
2339 .ucode_api_min = IWL4965_UCODE_API_MIN,
2340 .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
2341 .eeprom_size = IWL4965_EEPROM_IMG_SIZE,
2342 .eeprom_ver = EEPROM_4965_EEPROM_VERSION,
2343 .eeprom_calib_ver = EEPROM_4965_TX_POWER_VERSION,
2344 .ops = &iwl4965_ops,
2345 .mod_params = &iwl4965_mod_params,
2348 /* Module firmware */
2349 MODULE_FIRMWARE(IWL4965_MODULE_FIRMWARE(IWL4965_UCODE_API_MAX));
2351 module_param_named(antenna, iwl4965_mod_params.antenna, int, 0444);
2352 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
2353 module_param_named(disable, iwl4965_mod_params.disable, int, 0444);
2354 MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
2355 module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, 0444);
2356 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
2357 module_param_named(debug, iwl4965_mod_params.debug, uint, 0444);
2358 MODULE_PARM_DESC(debug, "debug output mask");
2360 disable_hw_scan, iwl4965_mod_params.disable_hw_scan, int, 0444);
2361 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
2363 module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, 0444);
2364 MODULE_PARM_DESC(queues_num, "number of hw queues.");
2366 module_param_named(11n_disable, iwl4965_mod_params.disable_11n, int, 0444);
2367 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
2368 module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K, int, 0444);
2369 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
2371 module_param_named(fw_restart4965, iwl4965_mod_params.restart_fw, int, 0444);
2372 MODULE_PARM_DESC(fw_restart4965, "restart firmware in case of error");