1 /******************************************************************************
3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
21 * Contact Information:
22 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 *****************************************************************************/
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/version.h>
30 #include <linux/init.h>
31 #include <linux/pci.h>
32 #include <linux/dma-mapping.h>
33 #include <linux/delay.h>
34 #include <linux/skbuff.h>
35 #include <linux/netdevice.h>
36 #include <linux/wireless.h>
37 #include <net/mac80211.h>
38 #include <linux/etherdevice.h>
39 #include <asm/unaligned.h>
41 #include "iwl-eeprom.h"
45 #include "iwl-helpers.h"
46 #include "iwl-calib.h"
49 /* module parameters */
50 static struct iwl_mod_params iwl4965_mod_params = {
51 .num_of_queues = IWL49_NUM_QUEUES,
55 /* the rest are 0 by default */
58 /* check contents of special bootstrap uCode SRAM */
59 static int iwl4965_verify_bsm(struct iwl_priv *priv)
61 __le32 *image = priv->ucode_boot.v_addr;
62 u32 len = priv->ucode_boot.len;
66 IWL_DEBUG_INFO("Begin verify bsm\n");
68 /* verify BSM SRAM contents */
69 val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
70 for (reg = BSM_SRAM_LOWER_BOUND;
71 reg < BSM_SRAM_LOWER_BOUND + len;
72 reg += sizeof(u32), image++) {
73 val = iwl_read_prph(priv, reg);
74 if (val != le32_to_cpu(*image)) {
75 IWL_ERROR("BSM uCode verification failed at "
76 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
78 reg - BSM_SRAM_LOWER_BOUND, len,
79 val, le32_to_cpu(*image));
84 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
90 * iwl4965_load_bsm - Load bootstrap instructions
94 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
95 * in special SRAM that does not power down during RFKILL. When powering back
96 * up after power-saving sleeps (or during initial uCode load), the BSM loads
97 * the bootstrap program into the on-board processor, and starts it.
99 * The bootstrap program loads (via DMA) instructions and data for a new
100 * program from host DRAM locations indicated by the host driver in the
101 * BSM_DRAM_* registers. Once the new program is loaded, it starts
104 * When initializing the NIC, the host driver points the BSM to the
105 * "initialize" uCode image. This uCode sets up some internal data, then
106 * notifies host via "initialize alive" that it is complete.
108 * The host then replaces the BSM_DRAM_* pointer values to point to the
109 * normal runtime uCode instructions and a backup uCode data cache buffer
110 * (filled initially with starting data values for the on-board processor),
111 * then triggers the "initialize" uCode to load and launch the runtime uCode,
112 * which begins normal operation.
114 * When doing a power-save shutdown, runtime uCode saves data SRAM into
115 * the backup data cache in DRAM before SRAM is powered down.
117 * When powering back up, the BSM loads the bootstrap program. This reloads
118 * the runtime uCode instructions and the backup data cache into SRAM,
119 * and re-launches the runtime uCode from where it left off.
121 static int iwl4965_load_bsm(struct iwl_priv *priv)
123 __le32 *image = priv->ucode_boot.v_addr;
124 u32 len = priv->ucode_boot.len;
134 IWL_DEBUG_INFO("Begin load bsm\n");
136 priv->ucode_type = UCODE_RT;
138 /* make sure bootstrap program is no larger than BSM's SRAM size */
139 if (len > IWL_MAX_BSM_SIZE)
142 /* Tell bootstrap uCode where to find the "Initialize" uCode
143 * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
144 * NOTE: iwl_init_alive_start() will replace these values,
145 * after the "initialize" uCode has run, to point to
146 * runtime/protocol instructions and backup data cache.
148 pinst = priv->ucode_init.p_addr >> 4;
149 pdata = priv->ucode_init_data.p_addr >> 4;
150 inst_len = priv->ucode_init.len;
151 data_len = priv->ucode_init_data.len;
153 ret = iwl_grab_nic_access(priv);
157 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
158 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
159 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
160 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
162 /* Fill BSM memory with bootstrap instructions */
163 for (reg_offset = BSM_SRAM_LOWER_BOUND;
164 reg_offset < BSM_SRAM_LOWER_BOUND + len;
165 reg_offset += sizeof(u32), image++)
166 _iwl_write_prph(priv, reg_offset, le32_to_cpu(*image));
168 ret = iwl4965_verify_bsm(priv);
170 iwl_release_nic_access(priv);
174 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
175 iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
176 iwl_write_prph(priv, BSM_WR_MEM_DST_REG, RTC_INST_LOWER_BOUND);
177 iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
179 /* Load bootstrap code into instruction SRAM now,
180 * to prepare to load "initialize" uCode */
181 iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
183 /* Wait for load of bootstrap uCode to finish */
184 for (i = 0; i < 100; i++) {
185 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
186 if (!(done & BSM_WR_CTRL_REG_BIT_START))
191 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
193 IWL_ERROR("BSM write did not complete!\n");
197 /* Enable future boot loads whenever power management unit triggers it
198 * (e.g. when powering back up after power-save shutdown) */
199 iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
201 iwl_release_nic_access(priv);
207 * iwl4965_set_ucode_ptrs - Set uCode address location
209 * Tell initialization uCode where to find runtime uCode.
211 * BSM registers initially contain pointers to initialization uCode.
212 * We need to replace them to load runtime uCode inst and data,
213 * and to save runtime data when powering down.
215 static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
222 /* bits 35:4 for 4965 */
223 pinst = priv->ucode_code.p_addr >> 4;
224 pdata = priv->ucode_data_backup.p_addr >> 4;
226 spin_lock_irqsave(&priv->lock, flags);
227 ret = iwl_grab_nic_access(priv);
229 spin_unlock_irqrestore(&priv->lock, flags);
233 /* Tell bootstrap uCode where to find image to load */
234 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
235 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
236 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
237 priv->ucode_data.len);
239 /* Inst bytecount must be last to set up, bit 31 signals uCode
240 * that all new ptr/size info is in place */
241 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
242 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
243 iwl_release_nic_access(priv);
245 spin_unlock_irqrestore(&priv->lock, flags);
247 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
253 * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
255 * Called after REPLY_ALIVE notification received from "initialize" uCode.
257 * The 4965 "initialize" ALIVE reply contains calibration data for:
258 * Voltage, temperature, and MIMO tx gain correction, now stored in priv
259 * (3945 does not contain this data).
261 * Tell "initialize" uCode to go ahead and load the runtime uCode.
263 static void iwl4965_init_alive_start(struct iwl_priv *priv)
265 /* Check alive response for "valid" sign from uCode */
266 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
267 /* We had an error bringing up the hardware, so take it
268 * all the way back down so we can try again */
269 IWL_DEBUG_INFO("Initialize Alive failed.\n");
273 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
274 * This is a paranoid check, because we would not have gotten the
275 * "initialize" alive if code weren't properly loaded. */
276 if (iwl_verify_ucode(priv)) {
277 /* Runtime instruction load was bad;
278 * take it all the way back down so we can try again */
279 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
283 /* Calculate temperature */
284 priv->temperature = iwl4965_get_temperature(priv);
286 /* Send pointers to protocol/runtime uCode image ... init code will
287 * load and launch runtime uCode, which will send us another "Alive"
289 IWL_DEBUG_INFO("Initialization Alive received.\n");
290 if (iwl4965_set_ucode_ptrs(priv)) {
291 /* Runtime instruction load won't happen;
292 * take it all the way back down so we can try again */
293 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
299 queue_work(priv->workqueue, &priv->restart);
302 static int is_fat_channel(__le32 rxon_flags)
304 return (rxon_flags & RXON_FLG_CHANNEL_MODE_PURE_40_MSK) ||
305 (rxon_flags & RXON_FLG_CHANNEL_MODE_MIXED_MSK);
308 int iwl4965_hwrate_to_plcp_idx(u32 rate_n_flags)
312 /* 4965 HT rate format */
313 if (rate_n_flags & RATE_MCS_HT_MSK) {
314 idx = (rate_n_flags & 0xff);
316 if (idx >= IWL_RATE_MIMO2_6M_PLCP)
317 idx = idx - IWL_RATE_MIMO2_6M_PLCP;
319 idx += IWL_FIRST_OFDM_RATE;
320 /* skip 9M not supported in ht*/
321 if (idx >= IWL_RATE_9M_INDEX)
323 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
326 /* 4965 legacy rate format, search for match in table */
328 for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
329 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
337 * translate ucode response to mac80211 tx status control values
339 void iwl4965_hwrate_to_tx_control(struct iwl_priv *priv, u32 rate_n_flags,
340 struct ieee80211_tx_info *control)
344 control->antenna_sel_tx =
345 ((rate_n_flags & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS);
346 if (rate_n_flags & RATE_MCS_HT_MSK)
347 control->flags |= IEEE80211_TX_CTL_OFDM_HT;
348 if (rate_n_flags & RATE_MCS_GF_MSK)
349 control->flags |= IEEE80211_TX_CTL_GREEN_FIELD;
350 if (rate_n_flags & RATE_MCS_FAT_MSK)
351 control->flags |= IEEE80211_TX_CTL_40_MHZ_WIDTH;
352 if (rate_n_flags & RATE_MCS_DUP_MSK)
353 control->flags |= IEEE80211_TX_CTL_DUP_DATA;
354 if (rate_n_flags & RATE_MCS_SGI_MSK)
355 control->flags |= IEEE80211_TX_CTL_SHORT_GI;
356 rate_index = iwl4965_hwrate_to_plcp_idx(rate_n_flags);
357 if (control->band == IEEE80211_BAND_5GHZ)
358 rate_index -= IWL_FIRST_OFDM_RATE;
359 control->tx_rate_idx = rate_index;
366 static int iwl4965_eeprom_check_version(struct iwl_priv *priv)
371 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
373 calib_ver = iwl_eeprom_query16(priv, EEPROM_4965_CALIB_VERSION_OFFSET);
375 if (eeprom_ver < EEPROM_4965_EEPROM_VERSION ||
376 calib_ver < EEPROM_4965_TX_POWER_VERSION)
381 IWL_ERROR("Unsuported EEPROM VER=0x%x < 0x%x CALIB=0x%x < 0x%x\n",
382 eeprom_ver, EEPROM_4965_EEPROM_VERSION,
383 calib_ver, EEPROM_4965_TX_POWER_VERSION);
387 int iwl4965_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
392 spin_lock_irqsave(&priv->lock, flags);
393 ret = iwl_grab_nic_access(priv);
395 spin_unlock_irqrestore(&priv->lock, flags);
399 if (src == IWL_PWR_SRC_VAUX) {
401 ret = pci_read_config_dword(priv->pci_dev, PCI_POWER_SOURCE,
404 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) {
405 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
406 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
407 ~APMG_PS_CTRL_MSK_PWR_SRC);
410 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
411 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
412 ~APMG_PS_CTRL_MSK_PWR_SRC);
415 iwl_release_nic_access(priv);
416 spin_unlock_irqrestore(&priv->lock, flags);
422 * Activate/Deactivat Tx DMA/FIFO channels according tx fifos mask
423 * must be called under priv->lock and mac access
425 static void iwl4965_txq_set_sched(struct iwl_priv *priv, u32 mask)
427 iwl_write_prph(priv, IWL49_SCD_TXFACT, mask);
430 static int iwl4965_apm_init(struct iwl_priv *priv)
434 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
435 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
437 /* disable L0s without affecting L1 :don't wait for ICH L0s bug W/A) */
438 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
439 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
441 /* set "initialization complete" bit to move adapter
442 * D0U* --> D0A* state */
443 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
445 /* wait for clock stabilization */
446 ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
447 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
448 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
450 IWL_DEBUG_INFO("Failed to init the card\n");
454 ret = iwl_grab_nic_access(priv);
459 iwl_write_prph(priv, APMG_CLK_CTRL_REG, APMG_CLK_VAL_DMA_CLK_RQT |
460 APMG_CLK_VAL_BSM_CLK_RQT);
464 /* disable L1-Active */
465 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
466 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
468 iwl_release_nic_access(priv);
474 static void iwl4965_nic_config(struct iwl_priv *priv)
481 spin_lock_irqsave(&priv->lock, flags);
483 if ((priv->rev_id & 0x80) == 0x80 && (priv->rev_id & 0x7f) < 8) {
484 pci_read_config_dword(priv->pci_dev, PCI_REG_WUM8, &val);
485 /* Enable No Snoop field */
486 pci_write_config_dword(priv->pci_dev, PCI_REG_WUM8,
490 pci_read_config_byte(priv->pci_dev, PCI_LINK_CTRL, &val_link);
492 /* L1 is enabled by BIOS */
493 if ((val_link & PCI_LINK_VAL_L1_EN) == PCI_LINK_VAL_L1_EN)
494 /* diable L0S disabled L1A enabled */
495 iwl_set_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
497 /* L0S enabled L1A disabled */
498 iwl_clear_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
500 radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
502 /* write radio config values to register */
503 if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
504 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
505 EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
506 EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
507 EEPROM_RF_CFG_DASH_MSK(radio_cfg));
509 /* set CSR_HW_CONFIG_REG for uCode use */
510 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
511 CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
512 CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
514 priv->calib_info = (struct iwl_eeprom_calib_info *)
515 iwl_eeprom_query_addr(priv, EEPROM_4965_CALIB_TXPOWER_OFFSET);
517 spin_unlock_irqrestore(&priv->lock, flags);
520 static int iwl4965_apm_stop_master(struct iwl_priv *priv)
525 spin_lock_irqsave(&priv->lock, flags);
527 /* set stop master bit */
528 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
530 ret = iwl_poll_bit(priv, CSR_RESET,
531 CSR_RESET_REG_FLAG_MASTER_DISABLED,
532 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
537 spin_unlock_irqrestore(&priv->lock, flags);
538 IWL_DEBUG_INFO("stop master\n");
543 static void iwl4965_apm_stop(struct iwl_priv *priv)
547 iwl4965_apm_stop_master(priv);
549 spin_lock_irqsave(&priv->lock, flags);
551 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
555 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
556 spin_unlock_irqrestore(&priv->lock, flags);
559 static int iwl4965_apm_reset(struct iwl_priv *priv)
564 iwl4965_apm_stop_master(priv);
566 spin_lock_irqsave(&priv->lock, flags);
568 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
572 /* FIXME: put here L1A -L0S w/a */
574 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
576 ret = iwl_poll_bit(priv, CSR_RESET,
577 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
578 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25);
585 ret = iwl_grab_nic_access(priv);
588 /* Enable DMA and BSM Clock */
589 iwl_write_prph(priv, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT |
590 APMG_CLK_VAL_BSM_CLK_RQT);
595 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
596 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
598 iwl_release_nic_access(priv);
600 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
601 wake_up_interruptible(&priv->wait_command_queue);
604 spin_unlock_irqrestore(&priv->lock, flags);
609 #define REG_RECALIB_PERIOD (60)
612 * iwl4965_bg_statistics_periodic - Timer callback to queue statistics
614 * This callback is provided in order to send a statistics request.
616 * This timer function is continually reset to execute within
617 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
618 * was received. We need to ensure we receive the statistics in order
619 * to update the temperature used for calibrating the TXPOWER.
621 static void iwl4965_bg_statistics_periodic(unsigned long data)
623 struct iwl_priv *priv = (struct iwl_priv *)data;
625 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
628 iwl_send_statistics_request(priv, CMD_ASYNC);
631 void iwl4965_rf_kill_ct_config(struct iwl_priv *priv)
633 struct iwl4965_ct_kill_config cmd;
637 spin_lock_irqsave(&priv->lock, flags);
638 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
639 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
640 spin_unlock_irqrestore(&priv->lock, flags);
642 cmd.critical_temperature_R =
643 cpu_to_le32(priv->hw_params.ct_kill_threshold);
645 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
648 IWL_ERROR("REPLY_CT_KILL_CONFIG_CMD failed\n");
650 IWL_DEBUG_INFO("REPLY_CT_KILL_CONFIG_CMD succeeded, "
651 "critical temperature is %d\n",
652 cmd.critical_temperature_R);
655 #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
657 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
658 * Called after every association, but this runs only once!
659 * ... once chain noise is calibrated the first time, it's good forever. */
660 static void iwl4965_chain_noise_reset(struct iwl_priv *priv)
662 struct iwl_chain_noise_data *data = &(priv->chain_noise_data);
664 if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) {
665 struct iwl4965_calibration_cmd cmd;
667 memset(&cmd, 0, sizeof(cmd));
668 cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
672 if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
674 IWL_ERROR("Could not send REPLY_PHY_CALIBRATION_CMD\n");
675 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
676 IWL_DEBUG_CALIB("Run chain_noise_calibrate\n");
680 static void iwl4965_gain_computation(struct iwl_priv *priv,
682 u16 min_average_noise_antenna_i,
683 u32 min_average_noise)
686 struct iwl_chain_noise_data *data = &priv->chain_noise_data;
688 data->delta_gain_code[min_average_noise_antenna_i] = 0;
690 for (i = 0; i < NUM_RX_CHAINS; i++) {
693 if (!(data->disconn_array[i]) &&
694 (data->delta_gain_code[i] ==
695 CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
696 delta_g = average_noise[i] - min_average_noise;
697 data->delta_gain_code[i] = (u8)((delta_g * 10) / 15);
698 data->delta_gain_code[i] =
699 min(data->delta_gain_code[i],
700 (u8) CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
702 data->delta_gain_code[i] =
703 (data->delta_gain_code[i] | (1 << 2));
705 data->delta_gain_code[i] = 0;
708 IWL_DEBUG_CALIB("delta_gain_codes: a %d b %d c %d\n",
709 data->delta_gain_code[0],
710 data->delta_gain_code[1],
711 data->delta_gain_code[2]);
713 /* Differential gain gets sent to uCode only once */
714 if (!data->radio_write) {
715 struct iwl4965_calibration_cmd cmd;
716 data->radio_write = 1;
718 memset(&cmd, 0, sizeof(cmd));
719 cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
720 cmd.diff_gain_a = data->delta_gain_code[0];
721 cmd.diff_gain_b = data->delta_gain_code[1];
722 cmd.diff_gain_c = data->delta_gain_code[2];
723 ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
726 IWL_DEBUG_CALIB("fail sending cmd "
727 "REPLY_PHY_CALIBRATION_CMD \n");
729 /* TODO we might want recalculate
730 * rx_chain in rxon cmd */
732 /* Mark so we run this algo only once! */
733 data->state = IWL_CHAIN_NOISE_CALIBRATED;
735 data->chain_noise_a = 0;
736 data->chain_noise_b = 0;
737 data->chain_noise_c = 0;
738 data->chain_signal_a = 0;
739 data->chain_signal_b = 0;
740 data->chain_signal_c = 0;
741 data->beacon_count = 0;
744 static void iwl4965_bg_sensitivity_work(struct work_struct *work)
746 struct iwl_priv *priv = container_of(work, struct iwl_priv,
749 mutex_lock(&priv->mutex);
751 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
752 test_bit(STATUS_SCANNING, &priv->status)) {
753 mutex_unlock(&priv->mutex);
757 if (priv->start_calib) {
758 iwl_chain_noise_calibration(priv, &priv->statistics);
760 iwl_sensitivity_calibration(priv, &priv->statistics);
763 mutex_unlock(&priv->mutex);
766 #endif /*CONFIG_IWL4965_RUN_TIME_CALIB*/
768 static void iwl4965_bg_txpower_work(struct work_struct *work)
770 struct iwl_priv *priv = container_of(work, struct iwl_priv,
773 /* If a scan happened to start before we got here
774 * then just return; the statistics notification will
775 * kick off another scheduled work to compensate for
776 * any temperature delta we missed here. */
777 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
778 test_bit(STATUS_SCANNING, &priv->status))
781 mutex_lock(&priv->mutex);
783 /* Regardless of if we are assocaited, we must reconfigure the
784 * TX power since frames can be sent on non-radar channels while
786 iwl4965_hw_reg_send_txpower(priv);
788 /* Update last_temperature to keep is_calib_needed from running
789 * when it isn't needed... */
790 priv->last_temperature = priv->temperature;
792 mutex_unlock(&priv->mutex);
796 * Acquire priv->lock before calling this function !
798 static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
800 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
801 (index & 0xff) | (txq_id << 8));
802 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(txq_id), index);
806 * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
807 * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
808 * @scd_retry: (1) Indicates queue will be used in aggregation mode
810 * NOTE: Acquire priv->lock before calling this function !
812 static void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
813 struct iwl_tx_queue *txq,
814 int tx_fifo_id, int scd_retry)
816 int txq_id = txq->q.id;
818 /* Find out whether to activate Tx queue */
819 int active = test_bit(txq_id, &priv->txq_ctx_active_msk)?1:0;
821 /* Set up and activate */
822 iwl_write_prph(priv, IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
823 (active << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
824 (tx_fifo_id << IWL49_SCD_QUEUE_STTS_REG_POS_TXF) |
825 (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_WSL) |
826 (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
827 IWL49_SCD_QUEUE_STTS_REG_MSK);
829 txq->sched_retry = scd_retry;
831 IWL_DEBUG_INFO("%s %s Queue %d on AC %d\n",
832 active ? "Activate" : "Deactivate",
833 scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
836 static const u16 default_queue_to_tx_fifo[] = {
846 int iwl4965_alive_notify(struct iwl_priv *priv)
853 spin_lock_irqsave(&priv->lock, flags);
855 ret = iwl_grab_nic_access(priv);
857 spin_unlock_irqrestore(&priv->lock, flags);
861 /* Clear 4965's internal Tx Scheduler data base */
862 priv->scd_base_addr = iwl_read_prph(priv, IWL49_SCD_SRAM_BASE_ADDR);
863 a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET;
864 for (; a < priv->scd_base_addr + IWL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
865 iwl_write_targ_mem(priv, a, 0);
866 for (; a < priv->scd_base_addr + IWL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
867 iwl_write_targ_mem(priv, a, 0);
868 for (; a < sizeof(u16) * priv->hw_params.max_txq_num; a += 4)
869 iwl_write_targ_mem(priv, a, 0);
871 /* Tel 4965 where to find Tx byte count tables */
872 iwl_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR,
874 offsetof(struct iwl4965_shared, queues_byte_cnt_tbls)) >> 10);
876 /* Disable chain mode for all queues */
877 iwl_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0);
879 /* Initialize each Tx queue (including the command queue) */
880 for (i = 0; i < priv->hw_params.max_txq_num; i++) {
882 /* TFD circular buffer read/write indexes */
883 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(i), 0);
884 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
886 /* Max Tx Window size for Scheduler-ACK mode */
887 iwl_write_targ_mem(priv, priv->scd_base_addr +
888 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i),
890 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
891 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
894 iwl_write_targ_mem(priv, priv->scd_base_addr +
895 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
898 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
899 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
902 iwl_write_prph(priv, IWL49_SCD_INTERRUPT_MASK,
903 (1 << priv->hw_params.max_txq_num) - 1);
905 /* Activate all Tx DMA/FIFO channels */
906 priv->cfg->ops->lib->txq_set_sched(priv, IWL_MASK(0, 7));
908 iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
910 /* Map each Tx/cmd queue to its corresponding fifo */
911 for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
912 int ac = default_queue_to_tx_fifo[i];
913 iwl_txq_ctx_activate(priv, i);
914 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
917 iwl_release_nic_access(priv);
918 spin_unlock_irqrestore(&priv->lock, flags);
923 #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
924 static struct iwl_sensitivity_ranges iwl4965_sensitivity = {
928 .auto_corr_min_ofdm = 85,
929 .auto_corr_min_ofdm_mrc = 170,
930 .auto_corr_min_ofdm_x1 = 105,
931 .auto_corr_min_ofdm_mrc_x1 = 220,
933 .auto_corr_max_ofdm = 120,
934 .auto_corr_max_ofdm_mrc = 210,
935 .auto_corr_max_ofdm_x1 = 140,
936 .auto_corr_max_ofdm_mrc_x1 = 270,
938 .auto_corr_min_cck = 125,
939 .auto_corr_max_cck = 200,
940 .auto_corr_min_cck_mrc = 200,
941 .auto_corr_max_cck_mrc = 400,
949 * iwl4965_hw_set_hw_params
951 * Called when initializing driver
953 int iwl4965_hw_set_hw_params(struct iwl_priv *priv)
956 if ((priv->cfg->mod_params->num_of_queues > IWL49_NUM_QUEUES) ||
957 (priv->cfg->mod_params->num_of_queues < IWL_MIN_NUM_QUEUES)) {
958 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
959 IWL_MIN_NUM_QUEUES, IWL49_NUM_QUEUES);
963 priv->hw_params.max_txq_num = priv->cfg->mod_params->num_of_queues;
964 priv->hw_params.sw_crypto = priv->cfg->mod_params->sw_crypto;
965 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
966 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
967 if (priv->cfg->mod_params->amsdu_size_8K)
968 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_8K;
970 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_4K;
971 priv->hw_params.max_pkt_size = priv->hw_params.rx_buf_size - 256;
972 priv->hw_params.max_stations = IWL4965_STATION_COUNT;
973 priv->hw_params.bcast_sta_id = IWL4965_BROADCAST_ID;
975 priv->hw_params.max_data_size = IWL49_RTC_DATA_SIZE;
976 priv->hw_params.max_inst_size = IWL49_RTC_INST_SIZE;
977 priv->hw_params.max_bsm_size = BSM_SRAM_SIZE;
978 priv->hw_params.fat_channel = BIT(IEEE80211_BAND_5GHZ);
980 priv->hw_params.tx_chains_num = 2;
981 priv->hw_params.rx_chains_num = 2;
982 priv->hw_params.valid_tx_ant = ANT_A | ANT_B;
983 priv->hw_params.valid_rx_ant = ANT_A | ANT_B;
984 priv->hw_params.ct_kill_threshold = CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD);
986 #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
987 priv->hw_params.sens = &iwl4965_sensitivity;
993 /* set card power command */
994 static int iwl4965_set_power(struct iwl_priv *priv,
999 ret = iwl_send_cmd_pdu_async(priv, POWER_TABLE_CMD,
1000 sizeof(struct iwl4965_powertable_cmd),
1004 int iwl4965_hw_reg_set_txpower(struct iwl_priv *priv, s8 power)
1006 IWL_ERROR("TODO: Implement iwl4965_hw_reg_set_txpower!\n");
1010 static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
1023 *res = ((num * 2 + denom) / (denom * 2)) * sign;
1029 * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
1031 * Determines power supply voltage compensation for txpower calculations.
1032 * Returns number of 1/2-dB steps to subtract from gain table index,
1033 * to compensate for difference between power supply voltage during
1034 * factory measurements, vs. current power supply voltage.
1036 * Voltage indication is higher for lower voltage.
1037 * Lower voltage requires more gain (lower gain table index).
1039 static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
1040 s32 current_voltage)
1044 if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
1045 (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
1048 iwl4965_math_div_round(current_voltage - eeprom_voltage,
1049 TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
1051 if (current_voltage > eeprom_voltage)
1053 if ((comp < -2) || (comp > 2))
1059 static const struct iwl_channel_info *
1060 iwl4965_get_channel_txpower_info(struct iwl_priv *priv,
1061 enum ieee80211_band band, u16 channel)
1063 const struct iwl_channel_info *ch_info;
1065 ch_info = iwl_get_channel_info(priv, band, channel);
1067 if (!is_channel_valid(ch_info))
1073 static s32 iwl4965_get_tx_atten_grp(u16 channel)
1075 if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
1076 channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
1077 return CALIB_CH_GROUP_5;
1079 if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
1080 channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
1081 return CALIB_CH_GROUP_1;
1083 if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
1084 channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
1085 return CALIB_CH_GROUP_2;
1087 if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
1088 channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
1089 return CALIB_CH_GROUP_3;
1091 if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
1092 channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
1093 return CALIB_CH_GROUP_4;
1095 IWL_ERROR("Can't find txatten group for channel %d.\n", channel);
1099 static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel)
1103 for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
1104 if (priv->calib_info->band_info[b].ch_from == 0)
1107 if ((channel >= priv->calib_info->band_info[b].ch_from)
1108 && (channel <= priv->calib_info->band_info[b].ch_to))
1115 static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
1122 iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
1128 * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
1130 * Interpolates factory measurements from the two sample channels within a
1131 * sub-band, to apply to channel of interest. Interpolation is proportional to
1132 * differences in channel frequencies, which is proportional to differences
1133 * in channel number.
1135 static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel,
1136 struct iwl_eeprom_calib_ch_info *chan_info)
1141 const struct iwl_eeprom_calib_measure *m1;
1142 const struct iwl_eeprom_calib_measure *m2;
1143 struct iwl_eeprom_calib_measure *omeas;
1147 s = iwl4965_get_sub_band(priv, channel);
1148 if (s >= EEPROM_TX_POWER_BANDS) {
1149 IWL_ERROR("Tx Power can not find channel %d ", channel);
1153 ch_i1 = priv->calib_info->band_info[s].ch1.ch_num;
1154 ch_i2 = priv->calib_info->band_info[s].ch2.ch_num;
1155 chan_info->ch_num = (u8) channel;
1157 IWL_DEBUG_TXPOWER("channel %d subband %d factory cal ch %d & %d\n",
1158 channel, s, ch_i1, ch_i2);
1160 for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
1161 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
1162 m1 = &(priv->calib_info->band_info[s].ch1.
1163 measurements[c][m]);
1164 m2 = &(priv->calib_info->band_info[s].ch2.
1165 measurements[c][m]);
1166 omeas = &(chan_info->measurements[c][m]);
1169 (u8) iwl4965_interpolate_value(channel, ch_i1,
1174 (u8) iwl4965_interpolate_value(channel, ch_i1,
1175 m1->gain_idx, ch_i2,
1177 omeas->temperature =
1178 (u8) iwl4965_interpolate_value(channel, ch_i1,
1183 (s8) iwl4965_interpolate_value(channel, ch_i1,
1188 ("chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
1189 m1->actual_pow, m2->actual_pow, omeas->actual_pow);
1191 ("chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
1192 m1->gain_idx, m2->gain_idx, omeas->gain_idx);
1194 ("chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
1195 m1->pa_det, m2->pa_det, omeas->pa_det);
1197 ("chain %d meas %d T1=%d T2=%d T=%d\n", c, m,
1198 m1->temperature, m2->temperature,
1199 omeas->temperature);
1206 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
1207 * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
1208 static s32 back_off_table[] = {
1209 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
1210 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
1211 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
1212 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
1216 /* Thermal compensation values for txpower for various frequency ranges ...
1217 * ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
1218 static struct iwl4965_txpower_comp_entry {
1219 s32 degrees_per_05db_a;
1220 s32 degrees_per_05db_a_denom;
1221 } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
1222 {9, 2}, /* group 0 5.2, ch 34-43 */
1223 {4, 1}, /* group 1 5.2, ch 44-70 */
1224 {4, 1}, /* group 2 5.2, ch 71-124 */
1225 {4, 1}, /* group 3 5.2, ch 125-200 */
1226 {3, 1} /* group 4 2.4, ch all */
1229 static s32 get_min_power_index(s32 rate_power_index, u32 band)
1232 if ((rate_power_index & 7) <= 4)
1233 return MIN_TX_GAIN_INDEX_52GHZ_EXT;
1235 return MIN_TX_GAIN_INDEX;
1243 static const struct gain_entry gain_table[2][108] = {
1244 /* 5.2GHz power gain index table */
1246 {123, 0x3F}, /* highest txpower */
1355 /* 2.4GHz power gain index table */
1357 {110, 0x3f}, /* highest txpower */
1468 static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
1469 u8 is_fat, u8 ctrl_chan_high,
1470 struct iwl4965_tx_power_db *tx_power_tbl)
1472 u8 saturation_power;
1474 s32 user_target_power;
1478 s32 current_regulatory;
1479 s32 txatten_grp = CALIB_CH_GROUP_MAX;
1482 const struct iwl_channel_info *ch_info = NULL;
1483 struct iwl_eeprom_calib_ch_info ch_eeprom_info;
1484 const struct iwl_eeprom_calib_measure *measurement;
1487 s32 voltage_compensation;
1488 s32 degrees_per_05db_num;
1489 s32 degrees_per_05db_denom;
1491 s32 temperature_comp[2];
1492 s32 factory_gain_index[2];
1493 s32 factory_actual_pwr[2];
1496 /* Sanity check requested level (dBm) */
1497 if (priv->user_txpower_limit < IWL_TX_POWER_TARGET_POWER_MIN) {
1498 IWL_WARNING("Requested user TXPOWER %d below limit.\n",
1499 priv->user_txpower_limit);
1502 if (priv->user_txpower_limit > IWL_TX_POWER_TARGET_POWER_MAX) {
1503 IWL_WARNING("Requested user TXPOWER %d above limit.\n",
1504 priv->user_txpower_limit);
1508 /* user_txpower_limit is in dBm, convert to half-dBm (half-dB units
1509 * are used for indexing into txpower table) */
1510 user_target_power = 2 * priv->user_txpower_limit;
1512 /* Get current (RXON) channel, band, width */
1514 iwl4965_get_channel_txpower_info(priv, priv->band, channel);
1516 IWL_DEBUG_TXPOWER("chan %d band %d is_fat %d\n", channel, band,
1522 /* get txatten group, used to select 1) thermal txpower adjustment
1523 * and 2) mimo txpower balance between Tx chains. */
1524 txatten_grp = iwl4965_get_tx_atten_grp(channel);
1525 if (txatten_grp < 0)
1528 IWL_DEBUG_TXPOWER("channel %d belongs to txatten group %d\n",
1529 channel, txatten_grp);
1538 /* hardware txpower limits ...
1539 * saturation (clipping distortion) txpowers are in half-dBm */
1541 saturation_power = priv->calib_info->saturation_power24;
1543 saturation_power = priv->calib_info->saturation_power52;
1545 if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
1546 saturation_power > IWL_TX_POWER_SATURATION_MAX) {
1548 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
1550 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
1553 /* regulatory txpower limits ... reg_limit values are in half-dBm,
1554 * max_power_avg values are in dBm, convert * 2 */
1556 reg_limit = ch_info->fat_max_power_avg * 2;
1558 reg_limit = ch_info->max_power_avg * 2;
1560 if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
1561 (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
1563 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
1565 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
1568 /* Interpolate txpower calibration values for this channel,
1569 * based on factory calibration tests on spaced channels. */
1570 iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
1572 /* calculate tx gain adjustment based on power supply voltage */
1573 voltage = priv->calib_info->voltage;
1574 init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
1575 voltage_compensation =
1576 iwl4965_get_voltage_compensation(voltage, init_voltage);
1578 IWL_DEBUG_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n",
1580 voltage, voltage_compensation);
1582 /* get current temperature (Celsius) */
1583 current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
1584 current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
1585 current_temp = KELVIN_TO_CELSIUS(current_temp);
1587 /* select thermal txpower adjustment params, based on channel group
1588 * (same frequency group used for mimo txatten adjustment) */
1589 degrees_per_05db_num =
1590 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
1591 degrees_per_05db_denom =
1592 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
1594 /* get per-chain txpower values from factory measurements */
1595 for (c = 0; c < 2; c++) {
1596 measurement = &ch_eeprom_info.measurements[c][1];
1598 /* txgain adjustment (in half-dB steps) based on difference
1599 * between factory and current temperature */
1600 factory_temp = measurement->temperature;
1601 iwl4965_math_div_round((current_temp - factory_temp) *
1602 degrees_per_05db_denom,
1603 degrees_per_05db_num,
1604 &temperature_comp[c]);
1606 factory_gain_index[c] = measurement->gain_idx;
1607 factory_actual_pwr[c] = measurement->actual_pow;
1609 IWL_DEBUG_TXPOWER("chain = %d\n", c);
1610 IWL_DEBUG_TXPOWER("fctry tmp %d, "
1611 "curr tmp %d, comp %d steps\n",
1612 factory_temp, current_temp,
1613 temperature_comp[c]);
1615 IWL_DEBUG_TXPOWER("fctry idx %d, fctry pwr %d\n",
1616 factory_gain_index[c],
1617 factory_actual_pwr[c]);
1620 /* for each of 33 bit-rates (including 1 for CCK) */
1621 for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
1623 union iwl4965_tx_power_dual_stream tx_power;
1625 /* for mimo, reduce each chain's txpower by half
1626 * (3dB, 6 steps), so total output power is regulatory
1629 current_regulatory = reg_limit -
1630 IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
1633 current_regulatory = reg_limit;
1637 /* find txpower limit, either hardware or regulatory */
1638 power_limit = saturation_power - back_off_table[i];
1639 if (power_limit > current_regulatory)
1640 power_limit = current_regulatory;
1642 /* reduce user's txpower request if necessary
1643 * for this rate on this channel */
1644 target_power = user_target_power;
1645 if (target_power > power_limit)
1646 target_power = power_limit;
1648 IWL_DEBUG_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n",
1649 i, saturation_power - back_off_table[i],
1650 current_regulatory, user_target_power,
1653 /* for each of 2 Tx chains (radio transmitters) */
1654 for (c = 0; c < 2; c++) {
1659 (s32)le32_to_cpu(priv->card_alive_init.
1660 tx_atten[txatten_grp][c]);
1664 /* calculate index; higher index means lower txpower */
1665 power_index = (u8) (factory_gain_index[c] -
1667 factory_actual_pwr[c]) -
1668 temperature_comp[c] -
1669 voltage_compensation +
1672 /* IWL_DEBUG_TXPOWER("calculated txpower index %d\n",
1675 if (power_index < get_min_power_index(i, band))
1676 power_index = get_min_power_index(i, band);
1678 /* adjust 5 GHz index to support negative indexes */
1682 /* CCK, rate 32, reduce txpower for CCK */
1683 if (i == POWER_TABLE_CCK_ENTRY)
1685 IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
1687 /* stay within the table! */
1688 if (power_index > 107) {
1689 IWL_WARNING("txpower index %d > 107\n",
1693 if (power_index < 0) {
1694 IWL_WARNING("txpower index %d < 0\n",
1699 /* fill txpower command for this rate/chain */
1700 tx_power.s.radio_tx_gain[c] =
1701 gain_table[band][power_index].radio;
1702 tx_power.s.dsp_predis_atten[c] =
1703 gain_table[band][power_index].dsp;
1705 IWL_DEBUG_TXPOWER("chain %d mimo %d index %d "
1706 "gain 0x%02x dsp %d\n",
1707 c, atten_value, power_index,
1708 tx_power.s.radio_tx_gain[c],
1709 tx_power.s.dsp_predis_atten[c]);
1710 }/* for each chain */
1712 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
1714 }/* for each rate */
1720 * iwl4965_hw_reg_send_txpower - Configure the TXPOWER level user limit
1722 * Uses the active RXON for channel, band, and characteristics (fat, high)
1723 * The power limit is taken from priv->user_txpower_limit.
1725 int iwl4965_hw_reg_send_txpower(struct iwl_priv *priv)
1727 struct iwl4965_txpowertable_cmd cmd = { 0 };
1731 u8 ctrl_chan_high = 0;
1733 if (test_bit(STATUS_SCANNING, &priv->status)) {
1734 /* If this gets hit a lot, switch it to a BUG() and catch
1735 * the stack trace to find out who is calling this during
1737 IWL_WARNING("TX Power requested while scanning!\n");
1741 band = priv->band == IEEE80211_BAND_2GHZ;
1743 is_fat = is_fat_channel(priv->active_rxon.flags);
1746 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1750 cmd.channel = priv->active_rxon.channel;
1752 ret = iwl4965_fill_txpower_tbl(priv, band,
1753 le16_to_cpu(priv->active_rxon.channel),
1754 is_fat, ctrl_chan_high, &cmd.tx_power);
1758 ret = iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
1764 static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
1767 struct iwl4965_rxon_assoc_cmd rxon_assoc;
1768 const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
1769 const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
1771 if ((rxon1->flags == rxon2->flags) &&
1772 (rxon1->filter_flags == rxon2->filter_flags) &&
1773 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1774 (rxon1->ofdm_ht_single_stream_basic_rates ==
1775 rxon2->ofdm_ht_single_stream_basic_rates) &&
1776 (rxon1->ofdm_ht_dual_stream_basic_rates ==
1777 rxon2->ofdm_ht_dual_stream_basic_rates) &&
1778 (rxon1->rx_chain == rxon2->rx_chain) &&
1779 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1780 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
1784 rxon_assoc.flags = priv->staging_rxon.flags;
1785 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1786 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1787 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1788 rxon_assoc.reserved = 0;
1789 rxon_assoc.ofdm_ht_single_stream_basic_rates =
1790 priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1791 rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1792 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1793 rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1795 ret = iwl_send_cmd_pdu_async(priv, REPLY_RXON_ASSOC,
1796 sizeof(rxon_assoc), &rxon_assoc, NULL);
1804 int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel)
1809 u8 ctrl_chan_high = 0;
1810 struct iwl4965_channel_switch_cmd cmd = { 0 };
1811 const struct iwl_channel_info *ch_info;
1813 band = priv->band == IEEE80211_BAND_2GHZ;
1815 ch_info = iwl_get_channel_info(priv, priv->band, channel);
1817 is_fat = is_fat_channel(priv->staging_rxon.flags);
1820 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1824 cmd.expect_beacon = 0;
1825 cmd.channel = cpu_to_le16(channel);
1826 cmd.rxon_flags = priv->active_rxon.flags;
1827 cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
1828 cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
1830 cmd.expect_beacon = is_channel_radar(ch_info);
1832 cmd.expect_beacon = 1;
1834 rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_fat,
1835 ctrl_chan_high, &cmd.tx_power);
1837 IWL_DEBUG_11H("error:%d fill txpower_tbl\n", rc);
1841 rc = iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
1845 static int iwl4965_shared_mem_rx_idx(struct iwl_priv *priv)
1847 struct iwl4965_shared *s = priv->shared_virt;
1848 return le32_to_cpu(s->rb_closed) & 0xFFF;
1851 int iwl4965_hw_get_temperature(struct iwl_priv *priv)
1853 return priv->temperature;
1856 unsigned int iwl4965_hw_get_beacon_cmd(struct iwl_priv *priv,
1857 struct iwl_frame *frame, u8 rate)
1859 struct iwl4965_tx_beacon_cmd *tx_beacon_cmd;
1860 unsigned int frame_size;
1862 tx_beacon_cmd = &frame->u.beacon;
1863 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
1865 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
1866 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
1868 frame_size = iwl4965_fill_beacon_frame(priv,
1869 tx_beacon_cmd->frame,
1871 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
1873 BUG_ON(frame_size > MAX_MPDU_SIZE);
1874 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
1876 if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
1877 tx_beacon_cmd->tx.rate_n_flags =
1878 iwl4965_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
1880 tx_beacon_cmd->tx.rate_n_flags =
1881 iwl4965_hw_set_rate_n_flags(rate, 0);
1883 tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
1884 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK);
1885 return (sizeof(*tx_beacon_cmd) + frame_size);
1888 static int iwl4965_alloc_shared_mem(struct iwl_priv *priv)
1890 priv->shared_virt = pci_alloc_consistent(priv->pci_dev,
1891 sizeof(struct iwl4965_shared),
1892 &priv->shared_phys);
1893 if (!priv->shared_virt)
1896 memset(priv->shared_virt, 0, sizeof(struct iwl4965_shared));
1898 priv->rb_closed_offset = offsetof(struct iwl4965_shared, rb_closed);
1903 static void iwl4965_free_shared_mem(struct iwl_priv *priv)
1905 if (priv->shared_virt)
1906 pci_free_consistent(priv->pci_dev,
1907 sizeof(struct iwl4965_shared),
1913 * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
1915 static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
1916 struct iwl_tx_queue *txq,
1920 int txq_id = txq->q.id;
1921 struct iwl4965_shared *shared_data = priv->shared_virt;
1923 len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
1925 /* Set up byte count within first 256 entries */
1926 IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
1927 tfd_offset[txq->q.write_ptr], byte_cnt, len);
1929 /* If within first 64 entries, duplicate at end */
1930 if (txq->q.write_ptr < IWL49_MAX_WIN_SIZE)
1931 IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
1932 tfd_offset[IWL49_QUEUE_SIZE + txq->q.write_ptr],
1937 * sign_extend - Sign extend a value using specified bit as sign-bit
1939 * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
1940 * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
1942 * @param oper value to sign extend
1943 * @param index 0 based bit index (0<=index<32) to sign bit
1945 static s32 sign_extend(u32 oper, int index)
1947 u8 shift = 31 - index;
1949 return (s32)(oper << shift) >> shift;
1953 * iwl4965_get_temperature - return the calibrated temperature (in Kelvin)
1954 * @statistics: Provides the temperature reading from the uCode
1956 * A return of <0 indicates bogus data in the statistics
1958 int iwl4965_get_temperature(const struct iwl_priv *priv)
1965 if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
1966 (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)) {
1967 IWL_DEBUG_TEMP("Running FAT temperature calibration\n");
1968 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
1969 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
1970 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
1971 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
1973 IWL_DEBUG_TEMP("Running temperature calibration\n");
1974 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
1975 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
1976 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
1977 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
1981 * Temperature is only 23 bits, so sign extend out to 32.
1983 * NOTE If we haven't received a statistics notification yet
1984 * with an updated temperature, use R4 provided to us in the
1985 * "initialize" ALIVE response.
1987 if (!test_bit(STATUS_TEMPERATURE, &priv->status))
1988 vt = sign_extend(R4, 23);
1991 le32_to_cpu(priv->statistics.general.temperature), 23);
1993 IWL_DEBUG_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n",
1997 IWL_ERROR("Calibration conflict R1 == R3\n");
2001 /* Calculate temperature in degrees Kelvin, adjust by 97%.
2002 * Add offset to center the adjustment around 0 degrees Centigrade. */
2003 temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
2004 temperature /= (R3 - R1);
2005 temperature = (temperature * 97) / 100 +
2006 TEMPERATURE_CALIB_KELVIN_OFFSET;
2008 IWL_DEBUG_TEMP("Calibrated temperature: %dK, %dC\n", temperature,
2009 KELVIN_TO_CELSIUS(temperature));
2014 /* Adjust Txpower only if temperature variance is greater than threshold. */
2015 #define IWL_TEMPERATURE_THRESHOLD 3
2018 * iwl4965_is_temp_calib_needed - determines if new calibration is needed
2020 * If the temperature changed has changed sufficiently, then a recalibration
2023 * Assumes caller will replace priv->last_temperature once calibration
2026 static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv)
2030 if (!test_bit(STATUS_STATISTICS, &priv->status)) {
2031 IWL_DEBUG_TEMP("Temperature not updated -- no statistics.\n");
2035 temp_diff = priv->temperature - priv->last_temperature;
2037 /* get absolute value */
2038 if (temp_diff < 0) {
2039 IWL_DEBUG_POWER("Getting cooler, delta %d, \n", temp_diff);
2040 temp_diff = -temp_diff;
2041 } else if (temp_diff == 0)
2042 IWL_DEBUG_POWER("Same temp, \n");
2044 IWL_DEBUG_POWER("Getting warmer, delta %d, \n", temp_diff);
2046 if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
2047 IWL_DEBUG_POWER("Thermal txpower calib not needed\n");
2051 IWL_DEBUG_POWER("Thermal txpower calib needed\n");
2056 /* Calculate noise level, based on measurements during network silence just
2057 * before arriving beacon. This measurement can be done only if we know
2058 * exactly when to expect beacons, therefore only when we're associated. */
2059 static void iwl4965_rx_calc_noise(struct iwl_priv *priv)
2061 struct statistics_rx_non_phy *rx_info
2062 = &(priv->statistics.rx.general);
2063 int num_active_rx = 0;
2064 int total_silence = 0;
2066 le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER;
2068 le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER;
2070 le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER;
2072 if (bcn_silence_a) {
2073 total_silence += bcn_silence_a;
2076 if (bcn_silence_b) {
2077 total_silence += bcn_silence_b;
2080 if (bcn_silence_c) {
2081 total_silence += bcn_silence_c;
2085 /* Average among active antennas */
2087 priv->last_rx_noise = (total_silence / num_active_rx) - 107;
2089 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
2091 IWL_DEBUG_CALIB("inband silence a %u, b %u, c %u, dBm %d\n",
2092 bcn_silence_a, bcn_silence_b, bcn_silence_c,
2093 priv->last_rx_noise);
2096 void iwl4965_hw_rx_statistics(struct iwl_priv *priv,
2097 struct iwl_rx_mem_buffer *rxb)
2099 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2103 IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
2104 (int)sizeof(priv->statistics), pkt->len);
2106 change = ((priv->statistics.general.temperature !=
2107 pkt->u.stats.general.temperature) ||
2108 ((priv->statistics.flag &
2109 STATISTICS_REPLY_FLG_FAT_MODE_MSK) !=
2110 (pkt->u.stats.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)));
2112 memcpy(&priv->statistics, &pkt->u.stats, sizeof(priv->statistics));
2114 set_bit(STATUS_STATISTICS, &priv->status);
2116 /* Reschedule the statistics timer to occur in
2117 * REG_RECALIB_PERIOD seconds to ensure we get a
2118 * thermal update even if the uCode doesn't give
2120 mod_timer(&priv->statistics_periodic, jiffies +
2121 msecs_to_jiffies(REG_RECALIB_PERIOD * 1000));
2123 if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
2124 (pkt->hdr.cmd == STATISTICS_NOTIFICATION)) {
2125 iwl4965_rx_calc_noise(priv);
2126 #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
2127 queue_work(priv->workqueue, &priv->sensitivity_work);
2131 iwl_leds_background(priv);
2133 /* If the hardware hasn't reported a change in
2134 * temperature then don't bother computing a
2135 * calibrated temperature value */
2139 temp = iwl4965_get_temperature(priv);
2143 if (priv->temperature != temp) {
2144 if (priv->temperature)
2145 IWL_DEBUG_TEMP("Temperature changed "
2146 "from %dC to %dC\n",
2147 KELVIN_TO_CELSIUS(priv->temperature),
2148 KELVIN_TO_CELSIUS(temp));
2150 IWL_DEBUG_TEMP("Temperature "
2151 "initialized to %dC\n",
2152 KELVIN_TO_CELSIUS(temp));
2155 priv->temperature = temp;
2156 set_bit(STATUS_TEMPERATURE, &priv->status);
2158 if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
2159 iwl4965_is_temp_calib_needed(priv))
2160 queue_work(priv->workqueue, &priv->txpower_work);
2163 static void iwl4965_add_radiotap(struct iwl_priv *priv,
2164 struct sk_buff *skb,
2165 struct iwl4965_rx_phy_res *rx_start,
2166 struct ieee80211_rx_status *stats,
2169 s8 signal = stats->signal;
2171 int rate = stats->rate_idx;
2172 u64 tsf = stats->mactime;
2174 __le16 phy_flags_hw = rx_start->phy_flags;
2175 struct iwl4965_rt_rx_hdr {
2176 struct ieee80211_radiotap_header rt_hdr;
2177 __le64 rt_tsf; /* TSF */
2178 u8 rt_flags; /* radiotap packet flags */
2179 u8 rt_rate; /* rate in 500kb/s */
2180 __le16 rt_channelMHz; /* channel in MHz */
2181 __le16 rt_chbitmask; /* channel bitfield */
2182 s8 rt_dbmsignal; /* signal in dBm, kluged to signed */
2184 u8 rt_antenna; /* antenna number */
2185 } __attribute__ ((packed)) *iwl4965_rt;
2187 /* TODO: We won't have enough headroom for HT frames. Fix it later. */
2188 if (skb_headroom(skb) < sizeof(*iwl4965_rt)) {
2189 if (net_ratelimit())
2190 printk(KERN_ERR "not enough headroom [%d] for "
2191 "radiotap head [%zd]\n",
2192 skb_headroom(skb), sizeof(*iwl4965_rt));
2196 /* put radiotap header in front of 802.11 header and data */
2197 iwl4965_rt = (void *)skb_push(skb, sizeof(*iwl4965_rt));
2199 /* initialise radiotap header */
2200 iwl4965_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
2201 iwl4965_rt->rt_hdr.it_pad = 0;
2203 /* total header + data */
2204 put_unaligned(cpu_to_le16(sizeof(*iwl4965_rt)),
2205 &iwl4965_rt->rt_hdr.it_len);
2207 /* Indicate all the fields we add to the radiotap header */
2208 put_unaligned(cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
2209 (1 << IEEE80211_RADIOTAP_FLAGS) |
2210 (1 << IEEE80211_RADIOTAP_RATE) |
2211 (1 << IEEE80211_RADIOTAP_CHANNEL) |
2212 (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
2213 (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
2214 (1 << IEEE80211_RADIOTAP_ANTENNA)),
2215 &iwl4965_rt->rt_hdr.it_present);
2217 /* Zero the flags, we'll add to them as we go */
2218 iwl4965_rt->rt_flags = 0;
2220 put_unaligned(cpu_to_le64(tsf), &iwl4965_rt->rt_tsf);
2222 iwl4965_rt->rt_dbmsignal = signal;
2223 iwl4965_rt->rt_dbmnoise = noise;
2225 /* Convert the channel frequency and set the flags */
2226 put_unaligned(cpu_to_le16(stats->freq), &iwl4965_rt->rt_channelMHz);
2227 if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
2228 put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
2229 IEEE80211_CHAN_5GHZ),
2230 &iwl4965_rt->rt_chbitmask);
2231 else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
2232 put_unaligned(cpu_to_le16(IEEE80211_CHAN_CCK |
2233 IEEE80211_CHAN_2GHZ),
2234 &iwl4965_rt->rt_chbitmask);
2236 put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
2237 IEEE80211_CHAN_2GHZ),
2238 &iwl4965_rt->rt_chbitmask);
2241 iwl4965_rt->rt_rate = 0;
2243 iwl4965_rt->rt_rate = iwl_rates[rate].ieee;
2248 * It seems that the antenna field in the phy flags value
2249 * is actually a bitfield. This is undefined by radiotap,
2250 * it wants an actual antenna number but I always get "7"
2251 * for most legacy frames I receive indicating that the
2252 * same frame was received on all three RX chains.
2254 * I think this field should be removed in favour of a
2255 * new 802.11n radiotap field "RX chains" that is defined
2258 antenna = phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK;
2259 iwl4965_rt->rt_antenna = le16_to_cpu(antenna) >> 4;
2261 /* set the preamble flag if appropriate */
2262 if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
2263 iwl4965_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
2265 stats->flag |= RX_FLAG_RADIOTAP;
2268 static void iwl_update_rx_stats(struct iwl_priv *priv, u16 fc, u16 len)
2270 /* 0 - mgmt, 1 - cnt, 2 - data */
2271 int idx = (fc & IEEE80211_FCTL_FTYPE) >> 2;
2272 priv->rx_stats[idx].cnt++;
2273 priv->rx_stats[idx].bytes += len;
2277 * returns non-zero if packet should be dropped
2279 static int iwl4965_set_decrypted_flag(struct iwl_priv *priv,
2280 struct ieee80211_hdr *hdr,
2282 struct ieee80211_rx_status *stats)
2284 u16 fc = le16_to_cpu(hdr->frame_control);
2286 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
2289 if (!(fc & IEEE80211_FCTL_PROTECTED))
2292 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
2293 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
2294 case RX_RES_STATUS_SEC_TYPE_TKIP:
2295 /* The uCode has got a bad phase 1 Key, pushes the packet.
2296 * Decryption will be done in SW. */
2297 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2298 RX_RES_STATUS_BAD_KEY_TTAK)
2301 case RX_RES_STATUS_SEC_TYPE_WEP:
2302 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2303 RX_RES_STATUS_BAD_ICV_MIC) {
2304 /* bad ICV, the packet is destroyed since the
2305 * decryption is inplace, drop it */
2306 IWL_DEBUG_RX("Packet destroyed\n");
2309 case RX_RES_STATUS_SEC_TYPE_CCMP:
2310 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2311 RX_RES_STATUS_DECRYPT_OK) {
2312 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
2313 stats->flag |= RX_FLAG_DECRYPTED;
2323 static u32 iwl4965_translate_rx_status(struct iwl_priv *priv, u32 decrypt_in)
2325 u32 decrypt_out = 0;
2327 if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) ==
2328 RX_RES_STATUS_STATION_FOUND)
2329 decrypt_out |= (RX_RES_STATUS_STATION_FOUND |
2330 RX_RES_STATUS_NO_STATION_INFO_MISMATCH);
2332 decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK);
2334 /* packet was not encrypted */
2335 if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
2336 RX_RES_STATUS_SEC_TYPE_NONE)
2339 /* packet was encrypted with unknown alg */
2340 if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
2341 RX_RES_STATUS_SEC_TYPE_ERR)
2344 /* decryption was not done in HW */
2345 if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) !=
2346 RX_MPDU_RES_STATUS_DEC_DONE_MSK)
2349 switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) {
2351 case RX_RES_STATUS_SEC_TYPE_CCMP:
2352 /* alg is CCM: check MIC only */
2353 if (!(decrypt_in & RX_MPDU_RES_STATUS_MIC_OK))
2355 decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
2357 decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
2361 case RX_RES_STATUS_SEC_TYPE_TKIP:
2362 if (!(decrypt_in & RX_MPDU_RES_STATUS_TTAK_OK)) {
2364 decrypt_out |= RX_RES_STATUS_BAD_KEY_TTAK;
2367 /* fall through if TTAK OK */
2369 if (!(decrypt_in & RX_MPDU_RES_STATUS_ICV_OK))
2370 decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
2372 decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
2376 IWL_DEBUG_RX("decrypt_in:0x%x decrypt_out = 0x%x\n",
2377 decrypt_in, decrypt_out);
2382 static void iwl4965_handle_data_packet(struct iwl_priv *priv, int is_data,
2384 struct iwl_rx_mem_buffer *rxb,
2385 struct ieee80211_rx_status *stats)
2387 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2388 struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
2389 (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) : NULL;
2390 struct ieee80211_hdr *hdr;
2393 unsigned int skblen;
2395 u32 ampdu_status_legacy;
2397 if (!include_phy && priv->last_phy_res[0])
2398 rx_start = (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
2401 IWL_ERROR("MPDU frame without a PHY data\n");
2405 hdr = (struct ieee80211_hdr *)((u8 *) & rx_start[1] +
2406 rx_start->cfg_phy_cnt);
2408 len = le16_to_cpu(rx_start->byte_count);
2410 rx_end = (__le32 *) ((u8 *) & pkt->u.raw[0] +
2411 sizeof(struct iwl4965_rx_phy_res) +
2412 rx_start->cfg_phy_cnt + len);
2415 struct iwl4965_rx_mpdu_res_start *amsdu =
2416 (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
2418 hdr = (struct ieee80211_hdr *)(pkt->u.raw +
2419 sizeof(struct iwl4965_rx_mpdu_res_start));
2420 len = le16_to_cpu(amsdu->byte_count);
2421 rx_start->byte_count = amsdu->byte_count;
2422 rx_end = (__le32 *) (((u8 *) hdr) + len);
2424 /* In monitor mode allow 802.11 ACk frames (10 bytes) */
2425 if (len > priv->hw_params.max_pkt_size ||
2426 len < ((priv->iw_mode == IEEE80211_IF_TYPE_MNTR) ? 10 : 16)) {
2427 IWL_WARNING("byte count out of range [16,4K] : %d\n", len);
2431 ampdu_status = le32_to_cpu(*rx_end);
2432 skblen = ((u8 *) rx_end - (u8 *) & pkt->u.raw[0]) + sizeof(u32);
2435 /* New status scheme, need to translate */
2436 ampdu_status_legacy = ampdu_status;
2437 ampdu_status = iwl4965_translate_rx_status(priv, ampdu_status);
2440 /* start from MAC */
2441 skb_reserve(rxb->skb, (void *)hdr - (void *)pkt);
2442 skb_put(rxb->skb, len); /* end where data ends */
2444 /* We only process data packets if the interface is open */
2445 if (unlikely(!priv->is_open)) {
2446 IWL_DEBUG_DROP_LIMIT
2447 ("Dropping packet while interface is not open.\n");
2452 hdr = (struct ieee80211_hdr *)rxb->skb->data;
2454 /* in case of HW accelerated crypto and bad decryption, drop */
2455 if (!priv->hw_params.sw_crypto &&
2456 iwl4965_set_decrypted_flag(priv, hdr, ampdu_status, stats))
2459 if (priv->add_radiotap)
2460 iwl4965_add_radiotap(priv, rxb->skb, rx_start, stats, ampdu_status);
2462 iwl_update_rx_stats(priv, le16_to_cpu(hdr->frame_control), len);
2463 ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
2464 priv->alloc_rxb_skb--;
2468 /* Calc max signal level (dBm) among 3 possible receivers */
2469 static int iwl4965_calc_rssi(struct iwl_priv *priv,
2470 struct iwl4965_rx_phy_res *rx_resp)
2472 /* data from PHY/DSP regarding signal strength, etc.,
2473 * contents are always there, not configurable by host. */
2474 struct iwl4965_rx_non_cfg_phy *ncphy =
2475 (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy;
2476 u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL_AGC_DB_MASK)
2479 u32 valid_antennae =
2480 (le16_to_cpu(rx_resp->phy_flags) & RX_PHY_FLAGS_ANTENNAE_MASK)
2481 >> RX_PHY_FLAGS_ANTENNAE_OFFSET;
2485 /* Find max rssi among 3 possible receivers.
2486 * These values are measured by the digital signal processor (DSP).
2487 * They should stay fairly constant even as the signal strength varies,
2488 * if the radio's automatic gain control (AGC) is working right.
2489 * AGC value (see below) will provide the "interesting" info. */
2490 for (i = 0; i < 3; i++)
2491 if (valid_antennae & (1 << i))
2492 max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
2494 IWL_DEBUG_STATS("Rssi In A %d B %d C %d Max %d AGC dB %d\n",
2495 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
2498 /* dBm = max_rssi dB - agc dB - constant.
2499 * Higher AGC (higher radio gain) means lower signal. */
2500 return (max_rssi - agc - IWL_RSSI_OFFSET);
2503 static void iwl4965_sta_modify_ps_wake(struct iwl_priv *priv, int sta_id)
2505 unsigned long flags;
2507 spin_lock_irqsave(&priv->sta_lock, flags);
2508 priv->stations[sta_id].sta.station_flags &= ~STA_FLG_PWR_SAVE_MSK;
2509 priv->stations[sta_id].sta.station_flags_msk = STA_FLG_PWR_SAVE_MSK;
2510 priv->stations[sta_id].sta.sta.modify_mask = 0;
2511 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
2512 spin_unlock_irqrestore(&priv->sta_lock, flags);
2514 iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
2517 static void iwl4965_update_ps_mode(struct iwl_priv *priv, u16 ps_bit, u8 *addr)
2519 /* FIXME: need locking over ps_status ??? */
2520 u8 sta_id = iwl_find_station(priv, addr);
2522 if (sta_id != IWL_INVALID_STATION) {
2523 u8 sta_awake = priv->stations[sta_id].
2524 ps_status == STA_PS_STATUS_WAKE;
2526 if (sta_awake && ps_bit)
2527 priv->stations[sta_id].ps_status = STA_PS_STATUS_SLEEP;
2528 else if (!sta_awake && !ps_bit) {
2529 iwl4965_sta_modify_ps_wake(priv, sta_id);
2530 priv->stations[sta_id].ps_status = STA_PS_STATUS_WAKE;
2534 #ifdef CONFIG_IWLWIFI_DEBUG
2537 * iwl4965_dbg_report_frame - dump frame to syslog during debug sessions
2539 * You may hack this function to show different aspects of received frames,
2540 * including selective frame dumps.
2541 * group100 parameter selects whether to show 1 out of 100 good frames.
2543 * TODO: This was originally written for 3945, need to audit for
2544 * proper operation with 4965.
2546 static void iwl4965_dbg_report_frame(struct iwl_priv *priv,
2547 struct iwl_rx_packet *pkt,
2548 struct ieee80211_hdr *header, int group100)
2551 u32 print_summary = 0;
2552 u32 print_dump = 0; /* set to 1 to dump all frames' contents */
2569 struct iwl4965_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
2570 struct iwl4965_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
2571 struct iwl4965_rx_frame_end *rx_end = IWL_RX_END(pkt);
2572 u8 *data = IWL_RX_DATA(pkt);
2574 if (likely(!(priv->debug_level & IWL_DL_RX)))
2578 fc = le16_to_cpu(header->frame_control);
2579 seq_ctl = le16_to_cpu(header->seq_ctrl);
2582 channel = le16_to_cpu(rx_hdr->channel);
2583 phy_flags = le16_to_cpu(rx_hdr->phy_flags);
2584 rate_sym = rx_hdr->rate;
2585 length = le16_to_cpu(rx_hdr->len);
2587 /* end-of-frame status and timestamp */
2588 status = le32_to_cpu(rx_end->status);
2589 bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
2590 tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
2591 tsf = le64_to_cpu(rx_end->timestamp);
2593 /* signal statistics */
2594 rssi = rx_stats->rssi;
2595 agc = rx_stats->agc;
2596 sig_avg = le16_to_cpu(rx_stats->sig_avg);
2597 noise_diff = le16_to_cpu(rx_stats->noise_diff);
2599 to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
2601 /* if data frame is to us and all is good,
2602 * (optionally) print summary for only 1 out of every 100 */
2603 if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
2604 (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
2607 print_summary = 1; /* print each frame */
2608 else if (priv->framecnt_to_us < 100) {
2609 priv->framecnt_to_us++;
2612 priv->framecnt_to_us = 0;
2617 /* print summary for all other frames */
2621 if (print_summary) {
2627 title = "100Frames";
2628 else if (fc & IEEE80211_FCTL_RETRY)
2630 else if (ieee80211_is_assoc_response(fc))
2632 else if (ieee80211_is_reassoc_response(fc))
2634 else if (ieee80211_is_probe_response(fc)) {
2636 print_dump = 1; /* dump frame contents */
2637 } else if (ieee80211_is_beacon(fc)) {
2639 print_dump = 1; /* dump frame contents */
2640 } else if (ieee80211_is_atim(fc))
2642 else if (ieee80211_is_auth(fc))
2644 else if (ieee80211_is_deauth(fc))
2646 else if (ieee80211_is_disassoc(fc))
2651 rate_idx = iwl4965_hwrate_to_plcp_idx(rate_sym);
2652 if (unlikely(rate_idx == -1))
2655 bitrate = iwl_rates[rate_idx].ieee / 2;
2657 /* print frame summary.
2658 * MAC addresses show just the last byte (for brevity),
2659 * but you can hack it to show more, if you'd like to. */
2661 IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
2662 "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
2663 title, fc, header->addr1[5],
2664 length, rssi, channel, bitrate);
2666 /* src/dst addresses assume managed mode */
2667 IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
2668 "src=0x%02x, rssi=%u, tim=%lu usec, "
2669 "phy=0x%02x, chnl=%d\n",
2670 title, fc, header->addr1[5],
2671 header->addr3[5], rssi,
2672 tsf_low - priv->scan_start_tsf,
2673 phy_flags, channel);
2677 iwl_print_hex_dump(priv, IWL_DL_RX, data, length);
2680 static inline void iwl4965_dbg_report_frame(struct iwl_priv *priv,
2681 struct iwl_rx_packet *pkt,
2682 struct ieee80211_hdr *header,
2690 /* Called for REPLY_RX (legacy ABG frames), or
2691 * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
2692 void iwl4965_rx_reply_rx(struct iwl_priv *priv,
2693 struct iwl_rx_mem_buffer *rxb)
2695 struct ieee80211_hdr *header;
2696 struct ieee80211_rx_status rx_status;
2697 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2698 /* Use phy data (Rx signal strength, etc.) contained within
2699 * this rx packet for legacy frames,
2700 * or phy data cached from REPLY_RX_PHY_CMD for HT frames. */
2701 int include_phy = (pkt->hdr.cmd == REPLY_RX);
2702 struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
2703 (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) :
2704 (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
2706 unsigned int len = 0;
2710 rx_status.mactime = le64_to_cpu(rx_start->timestamp);
2712 ieee80211_channel_to_frequency(le16_to_cpu(rx_start->channel));
2713 rx_status.band = (rx_start->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
2714 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
2715 rx_status.rate_idx =
2716 iwl4965_hwrate_to_plcp_idx(le32_to_cpu(rx_start->rate_n_flags));
2717 if (rx_status.band == IEEE80211_BAND_5GHZ)
2718 rx_status.rate_idx -= IWL_FIRST_OFDM_RATE;
2720 rx_status.antenna = 0;
2723 if ((unlikely(rx_start->cfg_phy_cnt > 20))) {
2724 IWL_DEBUG_DROP("dsp size out of range [0,20]: %d/n",
2725 rx_start->cfg_phy_cnt);
2730 if (priv->last_phy_res[0])
2731 rx_start = (struct iwl4965_rx_phy_res *)
2732 &priv->last_phy_res[1];
2738 IWL_ERROR("MPDU frame without a PHY data\n");
2743 header = (struct ieee80211_hdr *)((u8 *) & rx_start[1]
2744 + rx_start->cfg_phy_cnt);
2746 len = le16_to_cpu(rx_start->byte_count);
2747 rx_end = (__le32 *)(pkt->u.raw + rx_start->cfg_phy_cnt +
2748 sizeof(struct iwl4965_rx_phy_res) + len);
2750 struct iwl4965_rx_mpdu_res_start *amsdu =
2751 (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
2753 header = (void *)(pkt->u.raw +
2754 sizeof(struct iwl4965_rx_mpdu_res_start));
2755 len = le16_to_cpu(amsdu->byte_count);
2756 rx_end = (__le32 *) (pkt->u.raw +
2757 sizeof(struct iwl4965_rx_mpdu_res_start) + len);
2760 if (!(*rx_end & RX_RES_STATUS_NO_CRC32_ERROR) ||
2761 !(*rx_end & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
2762 IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n",
2763 le32_to_cpu(*rx_end));
2767 priv->ucode_beacon_time = le32_to_cpu(rx_start->beacon_time_stamp);
2769 /* Find max signal strength (dBm) among 3 antenna/receiver chains */
2770 rx_status.signal = iwl4965_calc_rssi(priv, rx_start);
2772 /* Meaningful noise values are available only from beacon statistics,
2773 * which are gathered only when associated, and indicate noise
2774 * only for the associated network channel ...
2775 * Ignore these noise values while scanning (other channels) */
2776 if (iwl_is_associated(priv) &&
2777 !test_bit(STATUS_SCANNING, &priv->status)) {
2778 rx_status.noise = priv->last_rx_noise;
2779 rx_status.qual = iwl4965_calc_sig_qual(rx_status.signal,
2782 rx_status.noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
2783 rx_status.qual = iwl4965_calc_sig_qual(rx_status.signal, 0);
2786 /* Reset beacon noise level if not associated. */
2787 if (!iwl_is_associated(priv))
2788 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
2790 /* Set "1" to report good data frames in groups of 100 */
2791 /* FIXME: need to optimze the call: */
2792 iwl4965_dbg_report_frame(priv, pkt, header, 1);
2794 IWL_DEBUG_STATS_LIMIT("Rssi %d, noise %d, qual %d, TSF %llu\n",
2795 rx_status.signal, rx_status.noise, rx_status.signal,
2796 (unsigned long long)rx_status.mactime);
2799 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
2800 iwl4965_handle_data_packet(priv, 1, include_phy,
2805 network_packet = iwl4965_is_network_packet(priv, header);
2806 if (network_packet) {
2807 priv->last_rx_rssi = rx_status.signal;
2808 priv->last_beacon_time = priv->ucode_beacon_time;
2809 priv->last_tsf = le64_to_cpu(rx_start->timestamp);
2812 fc = le16_to_cpu(header->frame_control);
2813 switch (fc & IEEE80211_FCTL_FTYPE) {
2814 case IEEE80211_FTYPE_MGMT:
2815 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
2816 iwl4965_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
2818 iwl4965_handle_data_packet(priv, 0, include_phy, rxb, &rx_status);
2821 case IEEE80211_FTYPE_CTL:
2822 switch (fc & IEEE80211_FCTL_STYPE) {
2823 case IEEE80211_STYPE_BACK_REQ:
2824 IWL_DEBUG_HT("IEEE80211_STYPE_BACK_REQ arrived\n");
2825 iwl4965_handle_data_packet(priv, 0, include_phy,
2833 case IEEE80211_FTYPE_DATA: {
2834 DECLARE_MAC_BUF(mac1);
2835 DECLARE_MAC_BUF(mac2);
2836 DECLARE_MAC_BUF(mac3);
2838 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
2839 iwl4965_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
2842 if (unlikely(!network_packet))
2843 IWL_DEBUG_DROP("Dropping (non network): "
2845 print_mac(mac1, header->addr1),
2846 print_mac(mac2, header->addr2),
2847 print_mac(mac3, header->addr3));
2848 else if (unlikely(iwl4965_is_duplicate_packet(priv, header)))
2849 IWL_DEBUG_DROP("Dropping (dup): %s, %s, %s\n",
2850 print_mac(mac1, header->addr1),
2851 print_mac(mac2, header->addr2),
2852 print_mac(mac3, header->addr3));
2854 iwl4965_handle_data_packet(priv, 1, include_phy, rxb,
2865 * iwl4965_tx_status_reply_compressed_ba - Update tx status from block-ack
2867 * Go through block-ack's bitmap of ACK'd frames, update driver's record of
2868 * ACK vs. not. This gets sent to mac80211, then to rate scaling algo.
2870 static int iwl4965_tx_status_reply_compressed_ba(struct iwl_priv *priv,
2871 struct iwl_ht_agg *agg,
2872 struct iwl4965_compressed_ba_resp*
2877 u16 seq_ctl = le16_to_cpu(ba_resp->seq_ctl);
2878 u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
2881 struct ieee80211_tx_info *info;
2883 if (unlikely(!agg->wait_for_ba)) {
2884 IWL_ERROR("Received BA when not expected\n");
2888 /* Mark that the expected block-ack response arrived */
2889 agg->wait_for_ba = 0;
2890 IWL_DEBUG_TX_REPLY("BA %d %d\n", agg->start_idx, ba_resp->seq_ctl);
2892 /* Calculate shift to align block-ack bits with our Tx window bits */
2893 sh = agg->start_idx - SEQ_TO_INDEX(seq_ctl>>4);
2894 if (sh < 0) /* tbw something is wrong with indices */
2897 /* don't use 64-bit values for now */
2898 bitmap = le64_to_cpu(ba_resp->bitmap) >> sh;
2900 if (agg->frame_count > (64 - sh)) {
2901 IWL_DEBUG_TX_REPLY("more frames than bitmap size");
2905 /* check for success or failure according to the
2906 * transmitted bitmap and block-ack bitmap */
2907 bitmap &= agg->bitmap;
2909 /* For each frame attempted in aggregation,
2910 * update driver's record of tx frame's status. */
2911 for (i = 0; i < agg->frame_count ; i++) {
2912 ack = bitmap & (1 << i);
2914 IWL_DEBUG_TX_REPLY("%s ON i=%d idx=%d raw=%d\n",
2915 ack? "ACK":"NACK", i, (agg->start_idx + i) & 0xff,
2916 agg->start_idx + i);
2919 info = IEEE80211_SKB_CB(priv->txq[scd_flow].txb[agg->start_idx].skb[0]);
2920 memset(&info->status, 0, sizeof(info->status));
2921 info->flags = IEEE80211_TX_STAT_ACK;
2922 info->flags |= IEEE80211_TX_STAT_AMPDU;
2923 info->status.ampdu_ack_map = successes;
2924 info->status.ampdu_ack_len = agg->frame_count;
2925 iwl4965_hwrate_to_tx_control(priv, agg->rate_n_flags, info);
2927 IWL_DEBUG_TX_REPLY("Bitmap %llx\n", (unsigned long long)bitmap);
2933 * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
2935 static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv,
2938 /* Simply stop the queue, but don't change any configuration;
2939 * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
2940 iwl_write_prph(priv,
2941 IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
2942 (0 << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE)|
2943 (1 << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
2947 * txq_id must be greater than IWL_BACK_QUEUE_FIRST_ID
2948 * priv->lock must be held by the caller
2950 static int iwl4965_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
2951 u16 ssn_idx, u8 tx_fifo)
2955 if (IWL_BACK_QUEUE_FIRST_ID > txq_id) {
2956 IWL_WARNING("queue number too small: %d, must be > %d\n",
2957 txq_id, IWL_BACK_QUEUE_FIRST_ID);
2961 ret = iwl_grab_nic_access(priv);
2965 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
2967 iwl_clear_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
2969 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
2970 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
2971 /* supposes that ssn_idx is valid (!= 0xFFF) */
2972 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
2974 iwl_clear_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
2975 iwl_txq_ctx_deactivate(priv, txq_id);
2976 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
2978 iwl_release_nic_access(priv);
2985 * iwl4965_rx_reply_compressed_ba - Handler for REPLY_COMPRESSED_BA
2987 * Handles block-acknowledge notification from device, which reports success
2988 * of frames sent via aggregation.
2990 static void iwl4965_rx_reply_compressed_ba(struct iwl_priv *priv,
2991 struct iwl_rx_mem_buffer *rxb)
2993 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2994 struct iwl4965_compressed_ba_resp *ba_resp = &pkt->u.compressed_ba;
2996 struct iwl_tx_queue *txq = NULL;
2997 struct iwl_ht_agg *agg;
2998 DECLARE_MAC_BUF(mac);
3000 /* "flow" corresponds to Tx queue */
3001 u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
3003 /* "ssn" is start of block-ack Tx window, corresponds to index
3004 * (in Tx queue's circular buffer) of first TFD/frame in window */
3005 u16 ba_resp_scd_ssn = le16_to_cpu(ba_resp->scd_ssn);
3007 if (scd_flow >= priv->hw_params.max_txq_num) {
3008 IWL_ERROR("BUG_ON scd_flow is bigger than number of queues");
3012 txq = &priv->txq[scd_flow];
3013 agg = &priv->stations[ba_resp->sta_id].tid[ba_resp->tid].agg;
3015 /* Find index just before block-ack window */
3016 index = iwl_queue_dec_wrap(ba_resp_scd_ssn & 0xff, txq->q.n_bd);
3018 /* TODO: Need to get this copy more safely - now good for debug */
3020 IWL_DEBUG_TX_REPLY("REPLY_COMPRESSED_BA [%d]Received from %s, "
3023 print_mac(mac, (u8*) &ba_resp->sta_addr_lo32),
3025 IWL_DEBUG_TX_REPLY("TID = %d, SeqCtl = %d, bitmap = 0x%llx, scd_flow = "
3026 "%d, scd_ssn = %d\n",
3029 (unsigned long long)le64_to_cpu(ba_resp->bitmap),
3032 IWL_DEBUG_TX_REPLY("DAT start_idx = %d, bitmap = 0x%llx \n",
3034 (unsigned long long)agg->bitmap);
3036 /* Update driver's record of ACK vs. not for each frame in window */
3037 iwl4965_tx_status_reply_compressed_ba(priv, agg, ba_resp);
3039 /* Release all TFDs before the SSN, i.e. all TFDs in front of
3040 * block-ack window (we assume that they've been successfully
3041 * transmitted ... if not, it's too late anyway). */
3042 if (txq->q.read_ptr != (ba_resp_scd_ssn & 0xff)) {
3043 /* calculate mac80211 ampdu sw queue to wake */
3045 scd_flow - IWL_BACK_QUEUE_FIRST_ID + priv->hw->queues;
3046 int freed = iwl_tx_queue_reclaim(priv, scd_flow, index);
3047 priv->stations[ba_resp->sta_id].
3048 tid[ba_resp->tid].tfds_in_queue -= freed;
3049 if (iwl_queue_space(&txq->q) > txq->q.low_mark &&
3050 priv->mac80211_registered &&
3051 agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
3052 ieee80211_wake_queue(priv->hw, ampdu_q);
3054 iwl_txq_check_empty(priv, ba_resp->sta_id,
3055 ba_resp->tid, scd_flow);
3060 * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
3062 static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
3069 scd_q2ratid = ra_tid & IWL_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
3071 tbl_dw_addr = priv->scd_base_addr +
3072 IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
3074 tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
3077 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
3079 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
3081 iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
3088 * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
3090 * NOTE: txq_id must be greater than IWL_BACK_QUEUE_FIRST_ID,
3091 * i.e. it must be one of the higher queues used for aggregation
3093 static int iwl4965_txq_agg_enable(struct iwl_priv *priv, int txq_id,
3094 int tx_fifo, int sta_id, int tid, u16 ssn_idx)
3096 unsigned long flags;
3100 if (IWL_BACK_QUEUE_FIRST_ID > txq_id)
3101 IWL_WARNING("queue number too small: %d, must be > %d\n",
3102 txq_id, IWL_BACK_QUEUE_FIRST_ID);
3104 ra_tid = BUILD_RAxTID(sta_id, tid);
3106 /* Modify device's station table to Tx this TID */
3107 iwl_sta_modify_enable_tid_tx(priv, sta_id, tid);
3109 spin_lock_irqsave(&priv->lock, flags);
3110 ret = iwl_grab_nic_access(priv);
3112 spin_unlock_irqrestore(&priv->lock, flags);
3116 /* Stop this Tx queue before configuring it */
3117 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
3119 /* Map receiver-address / traffic-ID to this queue */
3120 iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
3122 /* Set this queue as a chain-building queue */
3123 iwl_set_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
3125 /* Place first TFD at index corresponding to start sequence number.
3126 * Assumes that ssn_idx is valid (!= 0xFFF) */
3127 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
3128 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
3129 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
3131 /* Set up Tx window size and frame limit for this queue */
3132 iwl_write_targ_mem(priv,
3133 priv->scd_base_addr + IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id),
3134 (SCD_WIN_SIZE << IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
3135 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
3137 iwl_write_targ_mem(priv, priv->scd_base_addr +
3138 IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
3139 (SCD_FRAME_LIMIT << IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
3140 & IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
3142 iwl_set_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
3144 /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
3145 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
3147 iwl_release_nic_access(priv);
3148 spin_unlock_irqrestore(&priv->lock, flags);
3153 static int iwl4965_rx_agg_start(struct iwl_priv *priv,
3154 const u8 *addr, int tid, u16 ssn)
3156 unsigned long flags;
3159 sta_id = iwl_find_station(priv, addr);
3160 if (sta_id == IWL_INVALID_STATION)
3163 spin_lock_irqsave(&priv->sta_lock, flags);
3164 priv->stations[sta_id].sta.station_flags_msk = 0;
3165 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_ADDBA_TID_MSK;
3166 priv->stations[sta_id].sta.add_immediate_ba_tid = (u8)tid;
3167 priv->stations[sta_id].sta.add_immediate_ba_ssn = cpu_to_le16(ssn);
3168 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3169 spin_unlock_irqrestore(&priv->sta_lock, flags);
3171 return iwl_send_add_sta(priv, &priv->stations[sta_id].sta,
3175 static int iwl4965_rx_agg_stop(struct iwl_priv *priv,
3176 const u8 *addr, int tid)
3178 unsigned long flags;
3181 sta_id = iwl_find_station(priv, addr);
3182 if (sta_id == IWL_INVALID_STATION)
3185 spin_lock_irqsave(&priv->sta_lock, flags);
3186 priv->stations[sta_id].sta.station_flags_msk = 0;
3187 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_DELBA_TID_MSK;
3188 priv->stations[sta_id].sta.remove_immediate_ba_tid = (u8)tid;
3189 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3190 spin_unlock_irqrestore(&priv->sta_lock, flags);
3192 return iwl_send_add_sta(priv, &priv->stations[sta_id].sta,
3196 int iwl4965_mac_ampdu_action(struct ieee80211_hw *hw,
3197 enum ieee80211_ampdu_mlme_action action,
3198 const u8 *addr, u16 tid, u16 *ssn)
3200 struct iwl_priv *priv = hw->priv;
3201 DECLARE_MAC_BUF(mac);
3203 IWL_DEBUG_HT("A-MPDU action on addr %s tid %d\n",
3204 print_mac(mac, addr), tid);
3207 case IEEE80211_AMPDU_RX_START:
3208 IWL_DEBUG_HT("start Rx\n");
3209 return iwl4965_rx_agg_start(priv, addr, tid, *ssn);
3210 case IEEE80211_AMPDU_RX_STOP:
3211 IWL_DEBUG_HT("stop Rx\n");
3212 return iwl4965_rx_agg_stop(priv, addr, tid);
3213 case IEEE80211_AMPDU_TX_START:
3214 IWL_DEBUG_HT("start Tx\n");
3215 return iwl_tx_agg_start(priv, addr, tid, ssn);
3216 case IEEE80211_AMPDU_TX_STOP:
3217 IWL_DEBUG_HT("stop Tx\n");
3218 return iwl_tx_agg_stop(priv, addr, tid);
3220 IWL_DEBUG_HT("unknown\n");
3227 static u16 iwl4965_get_hcmd_size(u8 cmd_id, u16 len)
3231 return (u16) sizeof(struct iwl4965_rxon_cmd);
3237 static u16 iwl4965_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
3239 struct iwl4965_addsta_cmd *addsta = (struct iwl4965_addsta_cmd *)data;
3240 addsta->mode = cmd->mode;
3241 memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
3242 memcpy(&addsta->key, &cmd->key, sizeof(struct iwl4965_keyinfo));
3243 addsta->station_flags = cmd->station_flags;
3244 addsta->station_flags_msk = cmd->station_flags_msk;
3245 addsta->tid_disable_tx = cmd->tid_disable_tx;
3246 addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
3247 addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
3248 addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
3249 addsta->reserved1 = __constant_cpu_to_le16(0);
3250 addsta->reserved2 = __constant_cpu_to_le32(0);
3252 return (u16)sizeof(struct iwl4965_addsta_cmd);
3255 static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
3257 __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
3258 tx_resp->frame_count);
3259 return le32_to_cpu(*scd_ssn) & MAX_SN;
3264 * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
3266 static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
3267 struct iwl_ht_agg *agg,
3268 struct iwl4965_tx_resp_agg *tx_resp,
3272 struct agg_tx_status *frame_status = &tx_resp->status;
3273 struct ieee80211_tx_info *info = NULL;
3274 struct ieee80211_hdr *hdr = NULL;
3279 if (agg->wait_for_ba)
3280 IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
3282 agg->frame_count = tx_resp->frame_count;
3283 agg->start_idx = start_idx;
3284 agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
3287 /* # frames attempted by Tx command */
3288 if (agg->frame_count == 1) {
3289 /* Only one frame was attempted; no block-ack will arrive */
3290 status = le16_to_cpu(frame_status[0].status);
3291 seq = le16_to_cpu(frame_status[0].sequence);
3292 idx = SEQ_TO_INDEX(seq);
3293 txq_id = SEQ_TO_QUEUE(seq);
3295 /* FIXME: code repetition */
3296 IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
3297 agg->frame_count, agg->start_idx, idx);
3299 info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb[0]);
3300 info->status.retry_count = tx_resp->failure_frame;
3301 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
3302 info->flags |= iwl_is_tx_success(status)?
3303 IEEE80211_TX_STAT_ACK : 0;
3304 iwl4965_hwrate_to_tx_control(priv,
3305 le32_to_cpu(tx_resp->rate_n_flags),
3307 /* FIXME: code repetition end */
3309 IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
3310 status & 0xff, tx_resp->failure_frame);
3311 IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
3312 iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
3314 agg->wait_for_ba = 0;
3316 /* Two or more frames were attempted; expect block-ack */
3318 int start = agg->start_idx;
3320 /* Construct bit-map of pending frames within Tx window */
3321 for (i = 0; i < agg->frame_count; i++) {
3323 status = le16_to_cpu(frame_status[i].status);
3324 seq = le16_to_cpu(frame_status[i].sequence);
3325 idx = SEQ_TO_INDEX(seq);
3326 txq_id = SEQ_TO_QUEUE(seq);
3328 if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
3329 AGG_TX_STATE_ABORT_MSK))
3332 IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
3333 agg->frame_count, txq_id, idx);
3335 hdr = iwl_tx_queue_get_hdr(priv, txq_id, idx);
3337 sc = le16_to_cpu(hdr->seq_ctrl);
3338 if (idx != (SEQ_TO_SN(sc) & 0xff)) {
3339 IWL_ERROR("BUG_ON idx doesn't match seq control"
3340 " idx=%d, seq_idx=%d, seq=%d\n",
3346 IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
3347 i, idx, SEQ_TO_SN(sc));
3351 sh = (start - idx) + 0xff;
3352 bitmap = bitmap << sh;
3355 } else if (sh < -64)
3356 sh = 0xff - (start - idx);
3360 bitmap = bitmap << sh;
3363 bitmap |= (1 << sh);
3364 IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
3365 start, (u32)(bitmap & 0xFFFFFFFF));
3368 agg->bitmap = bitmap;
3369 agg->start_idx = start;
3370 agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
3371 IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
3372 agg->frame_count, agg->start_idx,
3373 (unsigned long long)agg->bitmap);
3376 agg->wait_for_ba = 1;
3382 * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
3384 static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
3385 struct iwl_rx_mem_buffer *rxb)
3387 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
3388 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3389 int txq_id = SEQ_TO_QUEUE(sequence);
3390 int index = SEQ_TO_INDEX(sequence);
3391 struct iwl_tx_queue *txq = &priv->txq[txq_id];
3392 struct ieee80211_tx_info *info;
3393 struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
3394 u32 status = le32_to_cpu(tx_resp->status);
3395 int tid = MAX_TID_COUNT, sta_id = IWL_INVALID_STATION;
3397 struct ieee80211_hdr *hdr;
3400 if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) {
3401 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
3402 "is out of range [0-%d] %d %d\n", txq_id,
3403 index, txq->q.n_bd, txq->q.write_ptr,
3408 info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
3409 memset(&info->status, 0, sizeof(info->status));
3411 hdr = iwl_tx_queue_get_hdr(priv, txq_id, index);
3412 fc = le16_to_cpu(hdr->frame_control);
3413 if (ieee80211_is_qos_data(fc)) {
3414 qc = ieee80211_get_qos_ctrl(hdr, ieee80211_get_hdrlen(fc));
3418 sta_id = iwl_get_ra_sta_id(priv, hdr);
3419 if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
3420 IWL_ERROR("Station not known\n");
3424 if (txq->sched_retry) {
3425 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
3426 struct iwl_ht_agg *agg = NULL;
3431 agg = &priv->stations[sta_id].tid[tid].agg;
3433 iwl4965_tx_status_reply_tx(priv, agg,
3434 (struct iwl4965_tx_resp_agg *)tx_resp, index);
3436 if ((tx_resp->frame_count == 1) && !iwl_is_tx_success(status)) {
3437 /* TODO: send BAR */
3440 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
3442 index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
3443 IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
3444 "%d index %d\n", scd_ssn , index);
3445 freed = iwl_tx_queue_reclaim(priv, txq_id, index);
3446 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
3448 if (iwl_queue_space(&txq->q) > txq->q.low_mark &&
3449 txq_id >= 0 && priv->mac80211_registered &&
3450 agg->state != IWL_EMPTYING_HW_QUEUE_DELBA) {
3451 /* calculate mac80211 ampdu sw queue to wake */
3452 ampdu_q = txq_id - IWL_BACK_QUEUE_FIRST_ID +
3454 if (agg->state == IWL_AGG_OFF)
3455 ieee80211_wake_queue(priv->hw, txq_id);
3457 ieee80211_wake_queue(priv->hw, ampdu_q);
3459 iwl_txq_check_empty(priv, sta_id, tid, txq_id);
3462 info->status.retry_count = tx_resp->failure_frame;
3464 iwl_is_tx_success(status) ? IEEE80211_TX_STAT_ACK : 0;
3465 iwl4965_hwrate_to_tx_control(priv,
3466 le32_to_cpu(tx_resp->rate_n_flags),
3469 IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags "
3470 "0x%x retries %d\n", txq_id,
3471 iwl_get_tx_fail_reason(status),
3472 status, le32_to_cpu(tx_resp->rate_n_flags),
3473 tx_resp->failure_frame);
3475 IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
3477 int freed = iwl_tx_queue_reclaim(priv, txq_id, index);
3478 if (tid != MAX_TID_COUNT)
3479 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
3480 if (iwl_queue_space(&txq->q) > txq->q.low_mark &&
3481 (txq_id >= 0) && priv->mac80211_registered)
3482 ieee80211_wake_queue(priv->hw, txq_id);
3483 if (tid != MAX_TID_COUNT)
3484 iwl_txq_check_empty(priv, sta_id, tid, txq_id);
3488 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
3489 IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
3493 /* Set up 4965-specific Rx frame reply handlers */
3494 static void iwl4965_rx_handler_setup(struct iwl_priv *priv)
3496 /* Legacy Rx frames */
3497 priv->rx_handlers[REPLY_RX] = iwl4965_rx_reply_rx;
3499 priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
3501 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl4965_rx_reply_compressed_ba;
3504 void iwl4965_hw_setup_deferred_work(struct iwl_priv *priv)
3506 INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
3507 #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
3508 INIT_WORK(&priv->sensitivity_work, iwl4965_bg_sensitivity_work);
3510 init_timer(&priv->statistics_periodic);
3511 priv->statistics_periodic.data = (unsigned long)priv;
3512 priv->statistics_periodic.function = iwl4965_bg_statistics_periodic;
3515 void iwl4965_hw_cancel_deferred_work(struct iwl_priv *priv)
3517 del_timer_sync(&priv->statistics_periodic);
3519 cancel_delayed_work(&priv->init_alive_start);
3523 static struct iwl_hcmd_ops iwl4965_hcmd = {
3524 .rxon_assoc = iwl4965_send_rxon_assoc,
3527 static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
3528 .get_hcmd_size = iwl4965_get_hcmd_size,
3529 .build_addsta_hcmd = iwl4965_build_addsta_hcmd,
3530 #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
3531 .chain_noise_reset = iwl4965_chain_noise_reset,
3532 .gain_computation = iwl4965_gain_computation,
3536 static struct iwl_lib_ops iwl4965_lib = {
3537 .set_hw_params = iwl4965_hw_set_hw_params,
3538 .alloc_shared_mem = iwl4965_alloc_shared_mem,
3539 .free_shared_mem = iwl4965_free_shared_mem,
3540 .shared_mem_rx_idx = iwl4965_shared_mem_rx_idx,
3541 .txq_update_byte_cnt_tbl = iwl4965_txq_update_byte_cnt_tbl,
3542 .txq_set_sched = iwl4965_txq_set_sched,
3543 .txq_agg_enable = iwl4965_txq_agg_enable,
3544 .txq_agg_disable = iwl4965_txq_agg_disable,
3545 .rx_handler_setup = iwl4965_rx_handler_setup,
3546 .is_valid_rtc_data_addr = iwl4965_hw_valid_rtc_data_addr,
3547 .alive_notify = iwl4965_alive_notify,
3548 .init_alive_start = iwl4965_init_alive_start,
3549 .load_ucode = iwl4965_load_bsm,
3551 .init = iwl4965_apm_init,
3552 .reset = iwl4965_apm_reset,
3553 .stop = iwl4965_apm_stop,
3554 .config = iwl4965_nic_config,
3555 .set_pwr_src = iwl4965_set_pwr_src,
3558 .regulatory_bands = {
3559 EEPROM_REGULATORY_BAND_1_CHANNELS,
3560 EEPROM_REGULATORY_BAND_2_CHANNELS,
3561 EEPROM_REGULATORY_BAND_3_CHANNELS,
3562 EEPROM_REGULATORY_BAND_4_CHANNELS,
3563 EEPROM_REGULATORY_BAND_5_CHANNELS,
3564 EEPROM_4965_REGULATORY_BAND_24_FAT_CHANNELS,
3565 EEPROM_4965_REGULATORY_BAND_52_FAT_CHANNELS
3567 .verify_signature = iwlcore_eeprom_verify_signature,
3568 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
3569 .release_semaphore = iwlcore_eeprom_release_semaphore,
3570 .check_version = iwl4965_eeprom_check_version,
3571 .query_addr = iwlcore_eeprom_query_addr,
3573 .radio_kill_sw = iwl4965_radio_kill_sw,
3574 .set_power = iwl4965_set_power,
3575 .update_chain_flags = iwl4965_update_chain_flags,
3578 static struct iwl_ops iwl4965_ops = {
3579 .lib = &iwl4965_lib,
3580 .hcmd = &iwl4965_hcmd,
3581 .utils = &iwl4965_hcmd_utils,
3584 struct iwl_cfg iwl4965_agn_cfg = {
3586 .fw_name = "iwlwifi-4965" IWL4965_UCODE_API ".ucode",
3587 .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
3588 .eeprom_size = IWL4965_EEPROM_IMG_SIZE,
3589 .ops = &iwl4965_ops,
3590 .mod_params = &iwl4965_mod_params,
3593 module_param_named(antenna, iwl4965_mod_params.antenna, int, 0444);
3594 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
3595 module_param_named(disable, iwl4965_mod_params.disable, int, 0444);
3596 MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
3597 module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, 0444);
3598 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])\n");
3599 module_param_named(debug, iwl4965_mod_params.debug, int, 0444);
3600 MODULE_PARM_DESC(debug, "debug output mask");
3602 disable_hw_scan, iwl4965_mod_params.disable_hw_scan, int, 0444);
3603 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
3605 module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, 0444);
3606 MODULE_PARM_DESC(queues_num, "number of hw queues.");
3609 module_param_named(qos_enable, iwl4965_mod_params.enable_qos, int, 0444);
3610 MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
3611 module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K, int, 0444);
3612 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
3613 module_param_named(fw_restart4965, iwl4965_mod_params.restart_fw, int, 0444);
3614 MODULE_PARM_DESC(fw_restart4965, "restart firmware in case of error");