1 /******************************************************************************
3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
21 * Contact Information:
22 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 *****************************************************************************/
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/version.h>
30 #include <linux/init.h>
31 #include <linux/pci.h>
32 #include <linux/dma-mapping.h>
33 #include <linux/delay.h>
34 #include <linux/skbuff.h>
35 #include <linux/netdevice.h>
36 #include <linux/wireless.h>
37 #include <net/mac80211.h>
38 #include <linux/etherdevice.h>
39 #include <asm/unaligned.h>
41 #include "iwl-eeprom.h"
45 #include "iwl-helpers.h"
46 #include "iwl-calib.h"
48 /* module parameters */
49 static struct iwl_mod_params iwl4965_mod_params = {
50 .num_of_queues = IWL49_NUM_QUEUES,
54 /* the rest are 0 by default */
57 #ifdef CONFIG_IWL4965_HT
59 static const u16 default_tid_to_tx_fifo[] = {
79 #endif /*CONFIG_IWL4965_HT */
81 /* check contents of special bootstrap uCode SRAM */
82 static int iwl4965_verify_bsm(struct iwl_priv *priv)
84 __le32 *image = priv->ucode_boot.v_addr;
85 u32 len = priv->ucode_boot.len;
89 IWL_DEBUG_INFO("Begin verify bsm\n");
91 /* verify BSM SRAM contents */
92 val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
93 for (reg = BSM_SRAM_LOWER_BOUND;
94 reg < BSM_SRAM_LOWER_BOUND + len;
95 reg += sizeof(u32), image++) {
96 val = iwl_read_prph(priv, reg);
97 if (val != le32_to_cpu(*image)) {
98 IWL_ERROR("BSM uCode verification failed at "
99 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
100 BSM_SRAM_LOWER_BOUND,
101 reg - BSM_SRAM_LOWER_BOUND, len,
102 val, le32_to_cpu(*image));
107 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
113 * iwl4965_load_bsm - Load bootstrap instructions
117 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
118 * in special SRAM that does not power down during RFKILL. When powering back
119 * up after power-saving sleeps (or during initial uCode load), the BSM loads
120 * the bootstrap program into the on-board processor, and starts it.
122 * The bootstrap program loads (via DMA) instructions and data for a new
123 * program from host DRAM locations indicated by the host driver in the
124 * BSM_DRAM_* registers. Once the new program is loaded, it starts
127 * When initializing the NIC, the host driver points the BSM to the
128 * "initialize" uCode image. This uCode sets up some internal data, then
129 * notifies host via "initialize alive" that it is complete.
131 * The host then replaces the BSM_DRAM_* pointer values to point to the
132 * normal runtime uCode instructions and a backup uCode data cache buffer
133 * (filled initially with starting data values for the on-board processor),
134 * then triggers the "initialize" uCode to load and launch the runtime uCode,
135 * which begins normal operation.
137 * When doing a power-save shutdown, runtime uCode saves data SRAM into
138 * the backup data cache in DRAM before SRAM is powered down.
140 * When powering back up, the BSM loads the bootstrap program. This reloads
141 * the runtime uCode instructions and the backup data cache into SRAM,
142 * and re-launches the runtime uCode from where it left off.
144 static int iwl4965_load_bsm(struct iwl_priv *priv)
146 __le32 *image = priv->ucode_boot.v_addr;
147 u32 len = priv->ucode_boot.len;
157 IWL_DEBUG_INFO("Begin load bsm\n");
159 /* make sure bootstrap program is no larger than BSM's SRAM size */
160 if (len > IWL_MAX_BSM_SIZE)
163 /* Tell bootstrap uCode where to find the "Initialize" uCode
164 * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
165 * NOTE: iwl_init_alive_start() will replace these values,
166 * after the "initialize" uCode has run, to point to
167 * runtime/protocol instructions and backup data cache.
169 pinst = priv->ucode_init.p_addr >> 4;
170 pdata = priv->ucode_init_data.p_addr >> 4;
171 inst_len = priv->ucode_init.len;
172 data_len = priv->ucode_init_data.len;
174 ret = iwl_grab_nic_access(priv);
178 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
179 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
180 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
181 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
183 /* Fill BSM memory with bootstrap instructions */
184 for (reg_offset = BSM_SRAM_LOWER_BOUND;
185 reg_offset < BSM_SRAM_LOWER_BOUND + len;
186 reg_offset += sizeof(u32), image++)
187 _iwl_write_prph(priv, reg_offset, le32_to_cpu(*image));
189 ret = iwl4965_verify_bsm(priv);
191 iwl_release_nic_access(priv);
195 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
196 iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
197 iwl_write_prph(priv, BSM_WR_MEM_DST_REG, RTC_INST_LOWER_BOUND);
198 iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
200 /* Load bootstrap code into instruction SRAM now,
201 * to prepare to load "initialize" uCode */
202 iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
204 /* Wait for load of bootstrap uCode to finish */
205 for (i = 0; i < 100; i++) {
206 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
207 if (!(done & BSM_WR_CTRL_REG_BIT_START))
212 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
214 IWL_ERROR("BSM write did not complete!\n");
218 /* Enable future boot loads whenever power management unit triggers it
219 * (e.g. when powering back up after power-save shutdown) */
220 iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
222 iwl_release_nic_access(priv);
224 priv->ucode_type = UCODE_INIT;
230 * iwl4965_set_ucode_ptrs - Set uCode address location
232 * Tell initialization uCode where to find runtime uCode.
234 * BSM registers initially contain pointers to initialization uCode.
235 * We need to replace them to load runtime uCode inst and data,
236 * and to save runtime data when powering down.
238 static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
245 /* bits 35:4 for 4965 */
246 pinst = priv->ucode_code.p_addr >> 4;
247 pdata = priv->ucode_data_backup.p_addr >> 4;
249 spin_lock_irqsave(&priv->lock, flags);
250 ret = iwl_grab_nic_access(priv);
252 spin_unlock_irqrestore(&priv->lock, flags);
256 /* Tell bootstrap uCode where to find image to load */
257 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
258 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
259 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
260 priv->ucode_data.len);
262 /* Inst bytecount must be last to set up, bit 31 signals uCode
263 * that all new ptr/size info is in place */
264 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
265 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
266 iwl_release_nic_access(priv);
268 spin_unlock_irqrestore(&priv->lock, flags);
270 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
272 priv->ucode_type = UCODE_RT;
278 * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
280 * Called after REPLY_ALIVE notification received from "initialize" uCode.
282 * The 4965 "initialize" ALIVE reply contains calibration data for:
283 * Voltage, temperature, and MIMO tx gain correction, now stored in priv
284 * (3945 does not contain this data).
286 * Tell "initialize" uCode to go ahead and load the runtime uCode.
288 static void iwl4965_init_alive_start(struct iwl_priv *priv)
290 /* Check alive response for "valid" sign from uCode */
291 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
292 /* We had an error bringing up the hardware, so take it
293 * all the way back down so we can try again */
294 IWL_DEBUG_INFO("Initialize Alive failed.\n");
298 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
299 * This is a paranoid check, because we would not have gotten the
300 * "initialize" alive if code weren't properly loaded. */
301 if (iwl_verify_ucode(priv)) {
302 /* Runtime instruction load was bad;
303 * take it all the way back down so we can try again */
304 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
308 /* Calculate temperature */
309 priv->temperature = iwl4965_get_temperature(priv);
311 /* Send pointers to protocol/runtime uCode image ... init code will
312 * load and launch runtime uCode, which will send us another "Alive"
314 IWL_DEBUG_INFO("Initialization Alive received.\n");
315 if (iwl4965_set_ucode_ptrs(priv)) {
316 /* Runtime instruction load won't happen;
317 * take it all the way back down so we can try again */
318 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
324 queue_work(priv->workqueue, &priv->restart);
327 static int is_fat_channel(__le32 rxon_flags)
329 return (rxon_flags & RXON_FLG_CHANNEL_MODE_PURE_40_MSK) ||
330 (rxon_flags & RXON_FLG_CHANNEL_MODE_MIXED_MSK);
333 int iwl4965_hwrate_to_plcp_idx(u32 rate_n_flags)
337 /* 4965 HT rate format */
338 if (rate_n_flags & RATE_MCS_HT_MSK) {
339 idx = (rate_n_flags & 0xff);
341 if (idx >= IWL_RATE_MIMO2_6M_PLCP)
342 idx = idx - IWL_RATE_MIMO2_6M_PLCP;
344 idx += IWL_FIRST_OFDM_RATE;
345 /* skip 9M not supported in ht*/
346 if (idx >= IWL_RATE_9M_INDEX)
348 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
351 /* 4965 legacy rate format, search for match in table */
353 for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
354 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
362 * translate ucode response to mac80211 tx status control values
364 void iwl4965_hwrate_to_tx_control(struct iwl_priv *priv, u32 rate_n_flags,
365 struct ieee80211_tx_info *control)
369 control->antenna_sel_tx =
370 ((rate_n_flags & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS);
371 if (rate_n_flags & RATE_MCS_HT_MSK)
372 control->flags |= IEEE80211_TX_CTL_OFDM_HT;
373 if (rate_n_flags & RATE_MCS_GF_MSK)
374 control->flags |= IEEE80211_TX_CTL_GREEN_FIELD;
375 if (rate_n_flags & RATE_MCS_FAT_MSK)
376 control->flags |= IEEE80211_TX_CTL_40_MHZ_WIDTH;
377 if (rate_n_flags & RATE_MCS_DUP_MSK)
378 control->flags |= IEEE80211_TX_CTL_DUP_DATA;
379 if (rate_n_flags & RATE_MCS_SGI_MSK)
380 control->flags |= IEEE80211_TX_CTL_SHORT_GI;
381 rate_index = iwl4965_hwrate_to_plcp_idx(rate_n_flags);
382 if (control->band == IEEE80211_BAND_5GHZ)
383 rate_index -= IWL_FIRST_OFDM_RATE;
384 control->tx_rate_idx = rate_index;
387 int iwl4965_hw_rxq_stop(struct iwl_priv *priv)
392 spin_lock_irqsave(&priv->lock, flags);
393 rc = iwl_grab_nic_access(priv);
395 spin_unlock_irqrestore(&priv->lock, flags);
400 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
401 rc = iwl_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG,
404 IWL_ERROR("Can't stop Rx DMA.\n");
406 iwl_release_nic_access(priv);
407 spin_unlock_irqrestore(&priv->lock, flags);
416 static int iwl4965_eeprom_check_version(struct iwl_priv *priv)
421 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
423 calib_ver = iwl_eeprom_query16(priv, EEPROM_4965_CALIB_VERSION_OFFSET);
425 if (eeprom_ver < EEPROM_4965_EEPROM_VERSION ||
426 calib_ver < EEPROM_4965_TX_POWER_VERSION)
431 IWL_ERROR("Unsuported EEPROM VER=0x%x < 0x%x CALIB=0x%x < 0x%x\n",
432 eeprom_ver, EEPROM_4965_EEPROM_VERSION,
433 calib_ver, EEPROM_4965_TX_POWER_VERSION);
437 int iwl4965_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
442 spin_lock_irqsave(&priv->lock, flags);
443 ret = iwl_grab_nic_access(priv);
445 spin_unlock_irqrestore(&priv->lock, flags);
449 if (src == IWL_PWR_SRC_VAUX) {
451 ret = pci_read_config_dword(priv->pci_dev, PCI_POWER_SOURCE,
454 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) {
455 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
456 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
457 ~APMG_PS_CTRL_MSK_PWR_SRC);
460 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
461 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
462 ~APMG_PS_CTRL_MSK_PWR_SRC);
465 iwl_release_nic_access(priv);
466 spin_unlock_irqrestore(&priv->lock, flags);
471 static int iwl4965_disable_tx_fifo(struct iwl_priv *priv)
476 spin_lock_irqsave(&priv->lock, flags);
478 ret = iwl_grab_nic_access(priv);
480 IWL_ERROR("Tx fifo reset failed");
481 spin_unlock_irqrestore(&priv->lock, flags);
485 iwl_write_prph(priv, IWL49_SCD_TXFACT, 0);
486 iwl_release_nic_access(priv);
487 spin_unlock_irqrestore(&priv->lock, flags);
492 static int iwl4965_apm_init(struct iwl_priv *priv)
496 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
497 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
499 /* disable L0s without affecting L1 :don't wait for ICH L0s bug W/A) */
500 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
501 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
503 /* set "initialization complete" bit to move adapter
504 * D0U* --> D0A* state */
505 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
507 /* wait for clock stabilization */
508 ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
509 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
510 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
512 IWL_DEBUG_INFO("Failed to init the card\n");
516 ret = iwl_grab_nic_access(priv);
521 iwl_write_prph(priv, APMG_CLK_CTRL_REG, APMG_CLK_VAL_DMA_CLK_RQT |
522 APMG_CLK_VAL_BSM_CLK_RQT);
526 /* disable L1-Active */
527 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
528 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
530 iwl_release_nic_access(priv);
536 static void iwl4965_nic_config(struct iwl_priv *priv)
543 spin_lock_irqsave(&priv->lock, flags);
545 if ((priv->rev_id & 0x80) == 0x80 && (priv->rev_id & 0x7f) < 8) {
546 pci_read_config_dword(priv->pci_dev, PCI_REG_WUM8, &val);
547 /* Enable No Snoop field */
548 pci_write_config_dword(priv->pci_dev, PCI_REG_WUM8,
552 pci_read_config_byte(priv->pci_dev, PCI_LINK_CTRL, &val_link);
554 /* L1 is enabled by BIOS */
555 if ((val_link & PCI_LINK_VAL_L1_EN) == PCI_LINK_VAL_L1_EN)
556 /* diable L0S disabled L1A enabled */
557 iwl_set_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
559 /* L0S enabled L1A disabled */
560 iwl_clear_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
562 radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
564 /* write radio config values to register */
565 if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
566 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
567 EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
568 EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
569 EEPROM_RF_CFG_DASH_MSK(radio_cfg));
571 /* set CSR_HW_CONFIG_REG for uCode use */
572 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
573 CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
574 CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
576 priv->calib_info = (struct iwl_eeprom_calib_info *)
577 iwl_eeprom_query_addr(priv, EEPROM_4965_CALIB_TXPOWER_OFFSET);
579 spin_unlock_irqrestore(&priv->lock, flags);
582 int iwl4965_hw_nic_stop_master(struct iwl_priv *priv)
588 spin_lock_irqsave(&priv->lock, flags);
590 /* set stop master bit */
591 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
593 reg_val = iwl_read32(priv, CSR_GP_CNTRL);
595 if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE ==
596 (reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE))
597 IWL_DEBUG_INFO("Card in power save, master is already "
600 rc = iwl_poll_bit(priv, CSR_RESET,
601 CSR_RESET_REG_FLAG_MASTER_DISABLED,
602 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
604 spin_unlock_irqrestore(&priv->lock, flags);
609 spin_unlock_irqrestore(&priv->lock, flags);
610 IWL_DEBUG_INFO("stop master\n");
616 * iwl4965_hw_txq_ctx_stop - Stop all Tx DMA channels, free Tx queue memory
618 void iwl4965_hw_txq_ctx_stop(struct iwl_priv *priv)
624 /* Stop each Tx DMA channel, and wait for it to be idle */
625 for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++) {
626 spin_lock_irqsave(&priv->lock, flags);
627 if (iwl_grab_nic_access(priv)) {
628 spin_unlock_irqrestore(&priv->lock, flags);
632 iwl_write_direct32(priv,
633 FH_TCSR_CHNL_TX_CONFIG_REG(txq_id), 0x0);
634 iwl_poll_direct_bit(priv, FH_TSSR_TX_STATUS_REG,
635 FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE
637 iwl_release_nic_access(priv);
638 spin_unlock_irqrestore(&priv->lock, flags);
641 /* Deallocate memory for all Tx queues */
642 iwl_hw_txq_ctx_free(priv);
645 int iwl4965_hw_nic_reset(struct iwl_priv *priv)
650 iwl4965_hw_nic_stop_master(priv);
652 spin_lock_irqsave(&priv->lock, flags);
654 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
658 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
659 rc = iwl_poll_bit(priv, CSR_RESET,
660 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
661 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25);
665 rc = iwl_grab_nic_access(priv);
667 iwl_write_prph(priv, APMG_CLK_EN_REG,
668 APMG_CLK_VAL_DMA_CLK_RQT |
669 APMG_CLK_VAL_BSM_CLK_RQT);
673 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
674 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
676 iwl_release_nic_access(priv);
679 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
680 wake_up_interruptible(&priv->wait_command_queue);
682 spin_unlock_irqrestore(&priv->lock, flags);
688 #define REG_RECALIB_PERIOD (60)
691 * iwl4965_bg_statistics_periodic - Timer callback to queue statistics
693 * This callback is provided in order to send a statistics request.
695 * This timer function is continually reset to execute within
696 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
697 * was received. We need to ensure we receive the statistics in order
698 * to update the temperature used for calibrating the TXPOWER.
700 static void iwl4965_bg_statistics_periodic(unsigned long data)
702 struct iwl_priv *priv = (struct iwl_priv *)data;
704 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
707 iwl_send_statistics_request(priv, CMD_ASYNC);
710 void iwl4965_rf_kill_ct_config(struct iwl_priv *priv)
712 struct iwl4965_ct_kill_config cmd;
716 spin_lock_irqsave(&priv->lock, flags);
717 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
718 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
719 spin_unlock_irqrestore(&priv->lock, flags);
721 cmd.critical_temperature_R =
722 cpu_to_le32(priv->hw_params.ct_kill_threshold);
724 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
727 IWL_ERROR("REPLY_CT_KILL_CONFIG_CMD failed\n");
729 IWL_DEBUG_INFO("REPLY_CT_KILL_CONFIG_CMD succeeded, "
730 "critical temperature is %d\n",
731 cmd.critical_temperature_R);
734 #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
736 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
737 * Called after every association, but this runs only once!
738 * ... once chain noise is calibrated the first time, it's good forever. */
739 static void iwl4965_chain_noise_reset(struct iwl_priv *priv)
741 struct iwl_chain_noise_data *data = &(priv->chain_noise_data);
743 if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) {
744 struct iwl4965_calibration_cmd cmd;
746 memset(&cmd, 0, sizeof(cmd));
747 cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
751 if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
753 IWL_ERROR("Could not send REPLY_PHY_CALIBRATION_CMD\n");
754 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
755 IWL_DEBUG_CALIB("Run chain_noise_calibrate\n");
759 static void iwl4965_gain_computation(struct iwl_priv *priv,
761 u16 min_average_noise_antenna_i,
762 u32 min_average_noise)
765 struct iwl_chain_noise_data *data = &priv->chain_noise_data;
767 data->delta_gain_code[min_average_noise_antenna_i] = 0;
769 for (i = 0; i < NUM_RX_CHAINS; i++) {
772 if (!(data->disconn_array[i]) &&
773 (data->delta_gain_code[i] ==
774 CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
775 delta_g = average_noise[i] - min_average_noise;
776 data->delta_gain_code[i] = (u8)((delta_g * 10) / 15);
777 data->delta_gain_code[i] =
778 min(data->delta_gain_code[i],
779 (u8) CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
781 data->delta_gain_code[i] =
782 (data->delta_gain_code[i] | (1 << 2));
784 data->delta_gain_code[i] = 0;
787 IWL_DEBUG_CALIB("delta_gain_codes: a %d b %d c %d\n",
788 data->delta_gain_code[0],
789 data->delta_gain_code[1],
790 data->delta_gain_code[2]);
792 /* Differential gain gets sent to uCode only once */
793 if (!data->radio_write) {
794 struct iwl4965_calibration_cmd cmd;
795 data->radio_write = 1;
797 memset(&cmd, 0, sizeof(cmd));
798 cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
799 cmd.diff_gain_a = data->delta_gain_code[0];
800 cmd.diff_gain_b = data->delta_gain_code[1];
801 cmd.diff_gain_c = data->delta_gain_code[2];
802 ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
805 IWL_DEBUG_CALIB("fail sending cmd "
806 "REPLY_PHY_CALIBRATION_CMD \n");
808 /* TODO we might want recalculate
809 * rx_chain in rxon cmd */
811 /* Mark so we run this algo only once! */
812 data->state = IWL_CHAIN_NOISE_CALIBRATED;
814 data->chain_noise_a = 0;
815 data->chain_noise_b = 0;
816 data->chain_noise_c = 0;
817 data->chain_signal_a = 0;
818 data->chain_signal_b = 0;
819 data->chain_signal_c = 0;
820 data->beacon_count = 0;
823 static void iwl4965_bg_sensitivity_work(struct work_struct *work)
825 struct iwl_priv *priv = container_of(work, struct iwl_priv,
828 mutex_lock(&priv->mutex);
830 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
831 test_bit(STATUS_SCANNING, &priv->status)) {
832 mutex_unlock(&priv->mutex);
836 if (priv->start_calib) {
837 iwl_chain_noise_calibration(priv, &priv->statistics);
839 iwl_sensitivity_calibration(priv, &priv->statistics);
842 mutex_unlock(&priv->mutex);
845 #endif /*CONFIG_IWL4965_RUN_TIME_CALIB*/
847 static void iwl4965_bg_txpower_work(struct work_struct *work)
849 struct iwl_priv *priv = container_of(work, struct iwl_priv,
852 /* If a scan happened to start before we got here
853 * then just return; the statistics notification will
854 * kick off another scheduled work to compensate for
855 * any temperature delta we missed here. */
856 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
857 test_bit(STATUS_SCANNING, &priv->status))
860 mutex_lock(&priv->mutex);
862 /* Regardless of if we are assocaited, we must reconfigure the
863 * TX power since frames can be sent on non-radar channels while
865 iwl4965_hw_reg_send_txpower(priv);
867 /* Update last_temperature to keep is_calib_needed from running
868 * when it isn't needed... */
869 priv->last_temperature = priv->temperature;
871 mutex_unlock(&priv->mutex);
875 * Acquire priv->lock before calling this function !
877 static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
879 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
880 (index & 0xff) | (txq_id << 8));
881 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(txq_id), index);
885 * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
886 * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
887 * @scd_retry: (1) Indicates queue will be used in aggregation mode
889 * NOTE: Acquire priv->lock before calling this function !
891 static void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
892 struct iwl_tx_queue *txq,
893 int tx_fifo_id, int scd_retry)
895 int txq_id = txq->q.id;
897 /* Find out whether to activate Tx queue */
898 int active = test_bit(txq_id, &priv->txq_ctx_active_msk)?1:0;
900 /* Set up and activate */
901 iwl_write_prph(priv, IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
902 (active << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
903 (tx_fifo_id << IWL49_SCD_QUEUE_STTS_REG_POS_TXF) |
904 (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_WSL) |
905 (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
906 IWL49_SCD_QUEUE_STTS_REG_MSK);
908 txq->sched_retry = scd_retry;
910 IWL_DEBUG_INFO("%s %s Queue %d on AC %d\n",
911 active ? "Activate" : "Deactivate",
912 scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
915 static const u16 default_queue_to_tx_fifo[] = {
925 int iwl4965_alive_notify(struct iwl_priv *priv)
932 spin_lock_irqsave(&priv->lock, flags);
934 ret = iwl_grab_nic_access(priv);
936 spin_unlock_irqrestore(&priv->lock, flags);
940 /* Clear 4965's internal Tx Scheduler data base */
941 priv->scd_base_addr = iwl_read_prph(priv, IWL49_SCD_SRAM_BASE_ADDR);
942 a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET;
943 for (; a < priv->scd_base_addr + IWL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
944 iwl_write_targ_mem(priv, a, 0);
945 for (; a < priv->scd_base_addr + IWL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
946 iwl_write_targ_mem(priv, a, 0);
947 for (; a < sizeof(u16) * priv->hw_params.max_txq_num; a += 4)
948 iwl_write_targ_mem(priv, a, 0);
950 /* Tel 4965 where to find Tx byte count tables */
951 iwl_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR,
953 offsetof(struct iwl4965_shared, queues_byte_cnt_tbls)) >> 10);
955 /* Disable chain mode for all queues */
956 iwl_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0);
958 /* Initialize each Tx queue (including the command queue) */
959 for (i = 0; i < priv->hw_params.max_txq_num; i++) {
961 /* TFD circular buffer read/write indexes */
962 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(i), 0);
963 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
965 /* Max Tx Window size for Scheduler-ACK mode */
966 iwl_write_targ_mem(priv, priv->scd_base_addr +
967 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i),
969 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
970 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
973 iwl_write_targ_mem(priv, priv->scd_base_addr +
974 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
977 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
978 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
981 iwl_write_prph(priv, IWL49_SCD_INTERRUPT_MASK,
982 (1 << priv->hw_params.max_txq_num) - 1);
984 /* Activate all Tx DMA/FIFO channels */
985 iwl_write_prph(priv, IWL49_SCD_TXFACT,
986 SCD_TXFACT_REG_TXFIFO_MASK(0, 7));
988 iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
990 /* Map each Tx/cmd queue to its corresponding fifo */
991 for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
992 int ac = default_queue_to_tx_fifo[i];
993 iwl_txq_ctx_activate(priv, i);
994 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
997 iwl_release_nic_access(priv);
998 spin_unlock_irqrestore(&priv->lock, flags);
1003 #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
1004 static struct iwl_sensitivity_ranges iwl4965_sensitivity = {
1008 .auto_corr_min_ofdm = 85,
1009 .auto_corr_min_ofdm_mrc = 170,
1010 .auto_corr_min_ofdm_x1 = 105,
1011 .auto_corr_min_ofdm_mrc_x1 = 220,
1013 .auto_corr_max_ofdm = 120,
1014 .auto_corr_max_ofdm_mrc = 210,
1015 .auto_corr_max_ofdm_x1 = 140,
1016 .auto_corr_max_ofdm_mrc_x1 = 270,
1018 .auto_corr_min_cck = 125,
1019 .auto_corr_max_cck = 200,
1020 .auto_corr_min_cck_mrc = 200,
1021 .auto_corr_max_cck_mrc = 400,
1029 * iwl4965_hw_set_hw_params
1031 * Called when initializing driver
1033 int iwl4965_hw_set_hw_params(struct iwl_priv *priv)
1036 if ((priv->cfg->mod_params->num_of_queues > IWL49_NUM_QUEUES) ||
1037 (priv->cfg->mod_params->num_of_queues < IWL_MIN_NUM_QUEUES)) {
1038 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
1039 IWL_MIN_NUM_QUEUES, IWL49_NUM_QUEUES);
1043 priv->hw_params.max_txq_num = priv->cfg->mod_params->num_of_queues;
1044 priv->hw_params.sw_crypto = priv->cfg->mod_params->sw_crypto;
1045 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
1046 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
1047 if (priv->cfg->mod_params->amsdu_size_8K)
1048 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_8K;
1050 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_4K;
1051 priv->hw_params.max_pkt_size = priv->hw_params.rx_buf_size - 256;
1052 priv->hw_params.max_stations = IWL4965_STATION_COUNT;
1053 priv->hw_params.bcast_sta_id = IWL4965_BROADCAST_ID;
1055 priv->hw_params.max_data_size = IWL49_RTC_DATA_SIZE;
1056 priv->hw_params.max_inst_size = IWL49_RTC_INST_SIZE;
1057 priv->hw_params.max_bsm_size = BSM_SRAM_SIZE;
1058 priv->hw_params.fat_channel = BIT(IEEE80211_BAND_5GHZ);
1060 priv->hw_params.tx_chains_num = 2;
1061 priv->hw_params.rx_chains_num = 2;
1062 priv->hw_params.valid_tx_ant = ANT_A | ANT_B;
1063 priv->hw_params.valid_rx_ant = ANT_A | ANT_B;
1064 priv->hw_params.ct_kill_threshold = CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD);
1066 #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
1067 priv->hw_params.sens = &iwl4965_sensitivity;
1073 /* set card power command */
1074 static int iwl4965_set_power(struct iwl_priv *priv,
1079 ret = iwl_send_cmd_pdu_async(priv, POWER_TABLE_CMD,
1080 sizeof(struct iwl4965_powertable_cmd),
1084 int iwl4965_hw_reg_set_txpower(struct iwl_priv *priv, s8 power)
1086 IWL_ERROR("TODO: Implement iwl4965_hw_reg_set_txpower!\n");
1090 static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
1103 *res = ((num * 2 + denom) / (denom * 2)) * sign;
1109 * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
1111 * Determines power supply voltage compensation for txpower calculations.
1112 * Returns number of 1/2-dB steps to subtract from gain table index,
1113 * to compensate for difference between power supply voltage during
1114 * factory measurements, vs. current power supply voltage.
1116 * Voltage indication is higher for lower voltage.
1117 * Lower voltage requires more gain (lower gain table index).
1119 static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
1120 s32 current_voltage)
1124 if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
1125 (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
1128 iwl4965_math_div_round(current_voltage - eeprom_voltage,
1129 TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
1131 if (current_voltage > eeprom_voltage)
1133 if ((comp < -2) || (comp > 2))
1139 static const struct iwl_channel_info *
1140 iwl4965_get_channel_txpower_info(struct iwl_priv *priv,
1141 enum ieee80211_band band, u16 channel)
1143 const struct iwl_channel_info *ch_info;
1145 ch_info = iwl_get_channel_info(priv, band, channel);
1147 if (!is_channel_valid(ch_info))
1153 static s32 iwl4965_get_tx_atten_grp(u16 channel)
1155 if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
1156 channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
1157 return CALIB_CH_GROUP_5;
1159 if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
1160 channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
1161 return CALIB_CH_GROUP_1;
1163 if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
1164 channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
1165 return CALIB_CH_GROUP_2;
1167 if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
1168 channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
1169 return CALIB_CH_GROUP_3;
1171 if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
1172 channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
1173 return CALIB_CH_GROUP_4;
1175 IWL_ERROR("Can't find txatten group for channel %d.\n", channel);
1179 static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel)
1183 for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
1184 if (priv->calib_info->band_info[b].ch_from == 0)
1187 if ((channel >= priv->calib_info->band_info[b].ch_from)
1188 && (channel <= priv->calib_info->band_info[b].ch_to))
1195 static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
1202 iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
1208 * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
1210 * Interpolates factory measurements from the two sample channels within a
1211 * sub-band, to apply to channel of interest. Interpolation is proportional to
1212 * differences in channel frequencies, which is proportional to differences
1213 * in channel number.
1215 static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel,
1216 struct iwl_eeprom_calib_ch_info *chan_info)
1221 const struct iwl_eeprom_calib_measure *m1;
1222 const struct iwl_eeprom_calib_measure *m2;
1223 struct iwl_eeprom_calib_measure *omeas;
1227 s = iwl4965_get_sub_band(priv, channel);
1228 if (s >= EEPROM_TX_POWER_BANDS) {
1229 IWL_ERROR("Tx Power can not find channel %d ", channel);
1233 ch_i1 = priv->calib_info->band_info[s].ch1.ch_num;
1234 ch_i2 = priv->calib_info->band_info[s].ch2.ch_num;
1235 chan_info->ch_num = (u8) channel;
1237 IWL_DEBUG_TXPOWER("channel %d subband %d factory cal ch %d & %d\n",
1238 channel, s, ch_i1, ch_i2);
1240 for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
1241 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
1242 m1 = &(priv->calib_info->band_info[s].ch1.
1243 measurements[c][m]);
1244 m2 = &(priv->calib_info->band_info[s].ch2.
1245 measurements[c][m]);
1246 omeas = &(chan_info->measurements[c][m]);
1249 (u8) iwl4965_interpolate_value(channel, ch_i1,
1254 (u8) iwl4965_interpolate_value(channel, ch_i1,
1255 m1->gain_idx, ch_i2,
1257 omeas->temperature =
1258 (u8) iwl4965_interpolate_value(channel, ch_i1,
1263 (s8) iwl4965_interpolate_value(channel, ch_i1,
1268 ("chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
1269 m1->actual_pow, m2->actual_pow, omeas->actual_pow);
1271 ("chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
1272 m1->gain_idx, m2->gain_idx, omeas->gain_idx);
1274 ("chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
1275 m1->pa_det, m2->pa_det, omeas->pa_det);
1277 ("chain %d meas %d T1=%d T2=%d T=%d\n", c, m,
1278 m1->temperature, m2->temperature,
1279 omeas->temperature);
1286 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
1287 * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
1288 static s32 back_off_table[] = {
1289 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
1290 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
1291 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
1292 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
1296 /* Thermal compensation values for txpower for various frequency ranges ...
1297 * ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
1298 static struct iwl4965_txpower_comp_entry {
1299 s32 degrees_per_05db_a;
1300 s32 degrees_per_05db_a_denom;
1301 } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
1302 {9, 2}, /* group 0 5.2, ch 34-43 */
1303 {4, 1}, /* group 1 5.2, ch 44-70 */
1304 {4, 1}, /* group 2 5.2, ch 71-124 */
1305 {4, 1}, /* group 3 5.2, ch 125-200 */
1306 {3, 1} /* group 4 2.4, ch all */
1309 static s32 get_min_power_index(s32 rate_power_index, u32 band)
1312 if ((rate_power_index & 7) <= 4)
1313 return MIN_TX_GAIN_INDEX_52GHZ_EXT;
1315 return MIN_TX_GAIN_INDEX;
1323 static const struct gain_entry gain_table[2][108] = {
1324 /* 5.2GHz power gain index table */
1326 {123, 0x3F}, /* highest txpower */
1435 /* 2.4GHz power gain index table */
1437 {110, 0x3f}, /* highest txpower */
1548 static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
1549 u8 is_fat, u8 ctrl_chan_high,
1550 struct iwl4965_tx_power_db *tx_power_tbl)
1552 u8 saturation_power;
1554 s32 user_target_power;
1558 s32 current_regulatory;
1559 s32 txatten_grp = CALIB_CH_GROUP_MAX;
1562 const struct iwl_channel_info *ch_info = NULL;
1563 struct iwl_eeprom_calib_ch_info ch_eeprom_info;
1564 const struct iwl_eeprom_calib_measure *measurement;
1567 s32 voltage_compensation;
1568 s32 degrees_per_05db_num;
1569 s32 degrees_per_05db_denom;
1571 s32 temperature_comp[2];
1572 s32 factory_gain_index[2];
1573 s32 factory_actual_pwr[2];
1576 /* Sanity check requested level (dBm) */
1577 if (priv->user_txpower_limit < IWL_TX_POWER_TARGET_POWER_MIN) {
1578 IWL_WARNING("Requested user TXPOWER %d below limit.\n",
1579 priv->user_txpower_limit);
1582 if (priv->user_txpower_limit > IWL_TX_POWER_TARGET_POWER_MAX) {
1583 IWL_WARNING("Requested user TXPOWER %d above limit.\n",
1584 priv->user_txpower_limit);
1588 /* user_txpower_limit is in dBm, convert to half-dBm (half-dB units
1589 * are used for indexing into txpower table) */
1590 user_target_power = 2 * priv->user_txpower_limit;
1592 /* Get current (RXON) channel, band, width */
1594 iwl4965_get_channel_txpower_info(priv, priv->band, channel);
1596 IWL_DEBUG_TXPOWER("chan %d band %d is_fat %d\n", channel, band,
1602 /* get txatten group, used to select 1) thermal txpower adjustment
1603 * and 2) mimo txpower balance between Tx chains. */
1604 txatten_grp = iwl4965_get_tx_atten_grp(channel);
1605 if (txatten_grp < 0)
1608 IWL_DEBUG_TXPOWER("channel %d belongs to txatten group %d\n",
1609 channel, txatten_grp);
1618 /* hardware txpower limits ...
1619 * saturation (clipping distortion) txpowers are in half-dBm */
1621 saturation_power = priv->calib_info->saturation_power24;
1623 saturation_power = priv->calib_info->saturation_power52;
1625 if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
1626 saturation_power > IWL_TX_POWER_SATURATION_MAX) {
1628 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
1630 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
1633 /* regulatory txpower limits ... reg_limit values are in half-dBm,
1634 * max_power_avg values are in dBm, convert * 2 */
1636 reg_limit = ch_info->fat_max_power_avg * 2;
1638 reg_limit = ch_info->max_power_avg * 2;
1640 if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
1641 (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
1643 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
1645 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
1648 /* Interpolate txpower calibration values for this channel,
1649 * based on factory calibration tests on spaced channels. */
1650 iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
1652 /* calculate tx gain adjustment based on power supply voltage */
1653 voltage = priv->calib_info->voltage;
1654 init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
1655 voltage_compensation =
1656 iwl4965_get_voltage_compensation(voltage, init_voltage);
1658 IWL_DEBUG_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n",
1660 voltage, voltage_compensation);
1662 /* get current temperature (Celsius) */
1663 current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
1664 current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
1665 current_temp = KELVIN_TO_CELSIUS(current_temp);
1667 /* select thermal txpower adjustment params, based on channel group
1668 * (same frequency group used for mimo txatten adjustment) */
1669 degrees_per_05db_num =
1670 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
1671 degrees_per_05db_denom =
1672 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
1674 /* get per-chain txpower values from factory measurements */
1675 for (c = 0; c < 2; c++) {
1676 measurement = &ch_eeprom_info.measurements[c][1];
1678 /* txgain adjustment (in half-dB steps) based on difference
1679 * between factory and current temperature */
1680 factory_temp = measurement->temperature;
1681 iwl4965_math_div_round((current_temp - factory_temp) *
1682 degrees_per_05db_denom,
1683 degrees_per_05db_num,
1684 &temperature_comp[c]);
1686 factory_gain_index[c] = measurement->gain_idx;
1687 factory_actual_pwr[c] = measurement->actual_pow;
1689 IWL_DEBUG_TXPOWER("chain = %d\n", c);
1690 IWL_DEBUG_TXPOWER("fctry tmp %d, "
1691 "curr tmp %d, comp %d steps\n",
1692 factory_temp, current_temp,
1693 temperature_comp[c]);
1695 IWL_DEBUG_TXPOWER("fctry idx %d, fctry pwr %d\n",
1696 factory_gain_index[c],
1697 factory_actual_pwr[c]);
1700 /* for each of 33 bit-rates (including 1 for CCK) */
1701 for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
1703 union iwl4965_tx_power_dual_stream tx_power;
1705 /* for mimo, reduce each chain's txpower by half
1706 * (3dB, 6 steps), so total output power is regulatory
1709 current_regulatory = reg_limit -
1710 IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
1713 current_regulatory = reg_limit;
1717 /* find txpower limit, either hardware or regulatory */
1718 power_limit = saturation_power - back_off_table[i];
1719 if (power_limit > current_regulatory)
1720 power_limit = current_regulatory;
1722 /* reduce user's txpower request if necessary
1723 * for this rate on this channel */
1724 target_power = user_target_power;
1725 if (target_power > power_limit)
1726 target_power = power_limit;
1728 IWL_DEBUG_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n",
1729 i, saturation_power - back_off_table[i],
1730 current_regulatory, user_target_power,
1733 /* for each of 2 Tx chains (radio transmitters) */
1734 for (c = 0; c < 2; c++) {
1739 (s32)le32_to_cpu(priv->card_alive_init.
1740 tx_atten[txatten_grp][c]);
1744 /* calculate index; higher index means lower txpower */
1745 power_index = (u8) (factory_gain_index[c] -
1747 factory_actual_pwr[c]) -
1748 temperature_comp[c] -
1749 voltage_compensation +
1752 /* IWL_DEBUG_TXPOWER("calculated txpower index %d\n",
1755 if (power_index < get_min_power_index(i, band))
1756 power_index = get_min_power_index(i, band);
1758 /* adjust 5 GHz index to support negative indexes */
1762 /* CCK, rate 32, reduce txpower for CCK */
1763 if (i == POWER_TABLE_CCK_ENTRY)
1765 IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
1767 /* stay within the table! */
1768 if (power_index > 107) {
1769 IWL_WARNING("txpower index %d > 107\n",
1773 if (power_index < 0) {
1774 IWL_WARNING("txpower index %d < 0\n",
1779 /* fill txpower command for this rate/chain */
1780 tx_power.s.radio_tx_gain[c] =
1781 gain_table[band][power_index].radio;
1782 tx_power.s.dsp_predis_atten[c] =
1783 gain_table[band][power_index].dsp;
1785 IWL_DEBUG_TXPOWER("chain %d mimo %d index %d "
1786 "gain 0x%02x dsp %d\n",
1787 c, atten_value, power_index,
1788 tx_power.s.radio_tx_gain[c],
1789 tx_power.s.dsp_predis_atten[c]);
1790 }/* for each chain */
1792 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
1794 }/* for each rate */
1800 * iwl4965_hw_reg_send_txpower - Configure the TXPOWER level user limit
1802 * Uses the active RXON for channel, band, and characteristics (fat, high)
1803 * The power limit is taken from priv->user_txpower_limit.
1805 int iwl4965_hw_reg_send_txpower(struct iwl_priv *priv)
1807 struct iwl4965_txpowertable_cmd cmd = { 0 };
1811 u8 ctrl_chan_high = 0;
1813 if (test_bit(STATUS_SCANNING, &priv->status)) {
1814 /* If this gets hit a lot, switch it to a BUG() and catch
1815 * the stack trace to find out who is calling this during
1817 IWL_WARNING("TX Power requested while scanning!\n");
1821 band = priv->band == IEEE80211_BAND_2GHZ;
1823 is_fat = is_fat_channel(priv->active_rxon.flags);
1826 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1830 cmd.channel = priv->active_rxon.channel;
1832 ret = iwl4965_fill_txpower_tbl(priv, band,
1833 le16_to_cpu(priv->active_rxon.channel),
1834 is_fat, ctrl_chan_high, &cmd.tx_power);
1838 ret = iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
1844 static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
1847 struct iwl4965_rxon_assoc_cmd rxon_assoc;
1848 const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
1849 const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
1851 if ((rxon1->flags == rxon2->flags) &&
1852 (rxon1->filter_flags == rxon2->filter_flags) &&
1853 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1854 (rxon1->ofdm_ht_single_stream_basic_rates ==
1855 rxon2->ofdm_ht_single_stream_basic_rates) &&
1856 (rxon1->ofdm_ht_dual_stream_basic_rates ==
1857 rxon2->ofdm_ht_dual_stream_basic_rates) &&
1858 (rxon1->rx_chain == rxon2->rx_chain) &&
1859 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1860 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
1864 rxon_assoc.flags = priv->staging_rxon.flags;
1865 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1866 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1867 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1868 rxon_assoc.reserved = 0;
1869 rxon_assoc.ofdm_ht_single_stream_basic_rates =
1870 priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1871 rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1872 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1873 rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1875 ret = iwl_send_cmd_pdu_async(priv, REPLY_RXON_ASSOC,
1876 sizeof(rxon_assoc), &rxon_assoc, NULL);
1884 int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel)
1889 u8 ctrl_chan_high = 0;
1890 struct iwl4965_channel_switch_cmd cmd = { 0 };
1891 const struct iwl_channel_info *ch_info;
1893 band = priv->band == IEEE80211_BAND_2GHZ;
1895 ch_info = iwl_get_channel_info(priv, priv->band, channel);
1897 is_fat = is_fat_channel(priv->staging_rxon.flags);
1900 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1904 cmd.expect_beacon = 0;
1905 cmd.channel = cpu_to_le16(channel);
1906 cmd.rxon_flags = priv->active_rxon.flags;
1907 cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
1908 cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
1910 cmd.expect_beacon = is_channel_radar(ch_info);
1912 cmd.expect_beacon = 1;
1914 rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_fat,
1915 ctrl_chan_high, &cmd.tx_power);
1917 IWL_DEBUG_11H("error:%d fill txpower_tbl\n", rc);
1921 rc = iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
1925 static int iwl4965_shared_mem_rx_idx(struct iwl_priv *priv)
1927 struct iwl4965_shared *s = priv->shared_virt;
1928 return le32_to_cpu(s->rb_closed) & 0xFFF;
1931 int iwl4965_hw_get_temperature(struct iwl_priv *priv)
1933 return priv->temperature;
1936 unsigned int iwl4965_hw_get_beacon_cmd(struct iwl_priv *priv,
1937 struct iwl_frame *frame, u8 rate)
1939 struct iwl4965_tx_beacon_cmd *tx_beacon_cmd;
1940 unsigned int frame_size;
1942 tx_beacon_cmd = &frame->u.beacon;
1943 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
1945 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
1946 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
1948 frame_size = iwl4965_fill_beacon_frame(priv,
1949 tx_beacon_cmd->frame,
1951 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
1953 BUG_ON(frame_size > MAX_MPDU_SIZE);
1954 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
1956 if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
1957 tx_beacon_cmd->tx.rate_n_flags =
1958 iwl4965_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
1960 tx_beacon_cmd->tx.rate_n_flags =
1961 iwl4965_hw_set_rate_n_flags(rate, 0);
1963 tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
1964 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK);
1965 return (sizeof(*tx_beacon_cmd) + frame_size);
1968 static int iwl4965_alloc_shared_mem(struct iwl_priv *priv)
1970 priv->shared_virt = pci_alloc_consistent(priv->pci_dev,
1971 sizeof(struct iwl4965_shared),
1972 &priv->shared_phys);
1973 if (!priv->shared_virt)
1976 memset(priv->shared_virt, 0, sizeof(struct iwl4965_shared));
1978 priv->rb_closed_offset = offsetof(struct iwl4965_shared, rb_closed);
1983 static void iwl4965_free_shared_mem(struct iwl_priv *priv)
1985 if (priv->shared_virt)
1986 pci_free_consistent(priv->pci_dev,
1987 sizeof(struct iwl4965_shared),
1993 * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
1995 static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
1996 struct iwl_tx_queue *txq,
2000 int txq_id = txq->q.id;
2001 struct iwl4965_shared *shared_data = priv->shared_virt;
2003 len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
2005 /* Set up byte count within first 256 entries */
2006 IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
2007 tfd_offset[txq->q.write_ptr], byte_cnt, len);
2009 /* If within first 64 entries, duplicate at end */
2010 if (txq->q.write_ptr < IWL49_MAX_WIN_SIZE)
2011 IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
2012 tfd_offset[IWL49_QUEUE_SIZE + txq->q.write_ptr],
2017 * sign_extend - Sign extend a value using specified bit as sign-bit
2019 * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
2020 * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
2022 * @param oper value to sign extend
2023 * @param index 0 based bit index (0<=index<32) to sign bit
2025 static s32 sign_extend(u32 oper, int index)
2027 u8 shift = 31 - index;
2029 return (s32)(oper << shift) >> shift;
2033 * iwl4965_get_temperature - return the calibrated temperature (in Kelvin)
2034 * @statistics: Provides the temperature reading from the uCode
2036 * A return of <0 indicates bogus data in the statistics
2038 int iwl4965_get_temperature(const struct iwl_priv *priv)
2045 if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
2046 (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)) {
2047 IWL_DEBUG_TEMP("Running FAT temperature calibration\n");
2048 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
2049 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
2050 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
2051 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
2053 IWL_DEBUG_TEMP("Running temperature calibration\n");
2054 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
2055 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
2056 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
2057 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
2061 * Temperature is only 23 bits, so sign extend out to 32.
2063 * NOTE If we haven't received a statistics notification yet
2064 * with an updated temperature, use R4 provided to us in the
2065 * "initialize" ALIVE response.
2067 if (!test_bit(STATUS_TEMPERATURE, &priv->status))
2068 vt = sign_extend(R4, 23);
2071 le32_to_cpu(priv->statistics.general.temperature), 23);
2073 IWL_DEBUG_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n",
2077 IWL_ERROR("Calibration conflict R1 == R3\n");
2081 /* Calculate temperature in degrees Kelvin, adjust by 97%.
2082 * Add offset to center the adjustment around 0 degrees Centigrade. */
2083 temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
2084 temperature /= (R3 - R1);
2085 temperature = (temperature * 97) / 100 +
2086 TEMPERATURE_CALIB_KELVIN_OFFSET;
2088 IWL_DEBUG_TEMP("Calibrated temperature: %dK, %dC\n", temperature,
2089 KELVIN_TO_CELSIUS(temperature));
2094 /* Adjust Txpower only if temperature variance is greater than threshold. */
2095 #define IWL_TEMPERATURE_THRESHOLD 3
2098 * iwl4965_is_temp_calib_needed - determines if new calibration is needed
2100 * If the temperature changed has changed sufficiently, then a recalibration
2103 * Assumes caller will replace priv->last_temperature once calibration
2106 static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv)
2110 if (!test_bit(STATUS_STATISTICS, &priv->status)) {
2111 IWL_DEBUG_TEMP("Temperature not updated -- no statistics.\n");
2115 temp_diff = priv->temperature - priv->last_temperature;
2117 /* get absolute value */
2118 if (temp_diff < 0) {
2119 IWL_DEBUG_POWER("Getting cooler, delta %d, \n", temp_diff);
2120 temp_diff = -temp_diff;
2121 } else if (temp_diff == 0)
2122 IWL_DEBUG_POWER("Same temp, \n");
2124 IWL_DEBUG_POWER("Getting warmer, delta %d, \n", temp_diff);
2126 if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
2127 IWL_DEBUG_POWER("Thermal txpower calib not needed\n");
2131 IWL_DEBUG_POWER("Thermal txpower calib needed\n");
2136 /* Calculate noise level, based on measurements during network silence just
2137 * before arriving beacon. This measurement can be done only if we know
2138 * exactly when to expect beacons, therefore only when we're associated. */
2139 static void iwl4965_rx_calc_noise(struct iwl_priv *priv)
2141 struct statistics_rx_non_phy *rx_info
2142 = &(priv->statistics.rx.general);
2143 int num_active_rx = 0;
2144 int total_silence = 0;
2146 le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER;
2148 le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER;
2150 le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER;
2152 if (bcn_silence_a) {
2153 total_silence += bcn_silence_a;
2156 if (bcn_silence_b) {
2157 total_silence += bcn_silence_b;
2160 if (bcn_silence_c) {
2161 total_silence += bcn_silence_c;
2165 /* Average among active antennas */
2167 priv->last_rx_noise = (total_silence / num_active_rx) - 107;
2169 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
2171 IWL_DEBUG_CALIB("inband silence a %u, b %u, c %u, dBm %d\n",
2172 bcn_silence_a, bcn_silence_b, bcn_silence_c,
2173 priv->last_rx_noise);
2176 void iwl4965_hw_rx_statistics(struct iwl_priv *priv,
2177 struct iwl_rx_mem_buffer *rxb)
2179 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2183 IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
2184 (int)sizeof(priv->statistics), pkt->len);
2186 change = ((priv->statistics.general.temperature !=
2187 pkt->u.stats.general.temperature) ||
2188 ((priv->statistics.flag &
2189 STATISTICS_REPLY_FLG_FAT_MODE_MSK) !=
2190 (pkt->u.stats.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)));
2192 memcpy(&priv->statistics, &pkt->u.stats, sizeof(priv->statistics));
2194 set_bit(STATUS_STATISTICS, &priv->status);
2196 /* Reschedule the statistics timer to occur in
2197 * REG_RECALIB_PERIOD seconds to ensure we get a
2198 * thermal update even if the uCode doesn't give
2200 mod_timer(&priv->statistics_periodic, jiffies +
2201 msecs_to_jiffies(REG_RECALIB_PERIOD * 1000));
2203 if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
2204 (pkt->hdr.cmd == STATISTICS_NOTIFICATION)) {
2205 iwl4965_rx_calc_noise(priv);
2206 #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
2207 queue_work(priv->workqueue, &priv->sensitivity_work);
2211 iwl_leds_background(priv);
2213 /* If the hardware hasn't reported a change in
2214 * temperature then don't bother computing a
2215 * calibrated temperature value */
2219 temp = iwl4965_get_temperature(priv);
2223 if (priv->temperature != temp) {
2224 if (priv->temperature)
2225 IWL_DEBUG_TEMP("Temperature changed "
2226 "from %dC to %dC\n",
2227 KELVIN_TO_CELSIUS(priv->temperature),
2228 KELVIN_TO_CELSIUS(temp));
2230 IWL_DEBUG_TEMP("Temperature "
2231 "initialized to %dC\n",
2232 KELVIN_TO_CELSIUS(temp));
2235 priv->temperature = temp;
2236 set_bit(STATUS_TEMPERATURE, &priv->status);
2238 if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
2239 iwl4965_is_temp_calib_needed(priv))
2240 queue_work(priv->workqueue, &priv->txpower_work);
2243 static void iwl4965_add_radiotap(struct iwl_priv *priv,
2244 struct sk_buff *skb,
2245 struct iwl4965_rx_phy_res *rx_start,
2246 struct ieee80211_rx_status *stats,
2249 s8 signal = stats->signal;
2251 int rate = stats->rate_idx;
2252 u64 tsf = stats->mactime;
2254 __le16 phy_flags_hw = rx_start->phy_flags;
2255 struct iwl4965_rt_rx_hdr {
2256 struct ieee80211_radiotap_header rt_hdr;
2257 __le64 rt_tsf; /* TSF */
2258 u8 rt_flags; /* radiotap packet flags */
2259 u8 rt_rate; /* rate in 500kb/s */
2260 __le16 rt_channelMHz; /* channel in MHz */
2261 __le16 rt_chbitmask; /* channel bitfield */
2262 s8 rt_dbmsignal; /* signal in dBm, kluged to signed */
2264 u8 rt_antenna; /* antenna number */
2265 } __attribute__ ((packed)) *iwl4965_rt;
2267 /* TODO: We won't have enough headroom for HT frames. Fix it later. */
2268 if (skb_headroom(skb) < sizeof(*iwl4965_rt)) {
2269 if (net_ratelimit())
2270 printk(KERN_ERR "not enough headroom [%d] for "
2271 "radiotap head [%zd]\n",
2272 skb_headroom(skb), sizeof(*iwl4965_rt));
2276 /* put radiotap header in front of 802.11 header and data */
2277 iwl4965_rt = (void *)skb_push(skb, sizeof(*iwl4965_rt));
2279 /* initialise radiotap header */
2280 iwl4965_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
2281 iwl4965_rt->rt_hdr.it_pad = 0;
2283 /* total header + data */
2284 put_unaligned(cpu_to_le16(sizeof(*iwl4965_rt)),
2285 &iwl4965_rt->rt_hdr.it_len);
2287 /* Indicate all the fields we add to the radiotap header */
2288 put_unaligned(cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
2289 (1 << IEEE80211_RADIOTAP_FLAGS) |
2290 (1 << IEEE80211_RADIOTAP_RATE) |
2291 (1 << IEEE80211_RADIOTAP_CHANNEL) |
2292 (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
2293 (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
2294 (1 << IEEE80211_RADIOTAP_ANTENNA)),
2295 &iwl4965_rt->rt_hdr.it_present);
2297 /* Zero the flags, we'll add to them as we go */
2298 iwl4965_rt->rt_flags = 0;
2300 put_unaligned(cpu_to_le64(tsf), &iwl4965_rt->rt_tsf);
2302 iwl4965_rt->rt_dbmsignal = signal;
2303 iwl4965_rt->rt_dbmnoise = noise;
2305 /* Convert the channel frequency and set the flags */
2306 put_unaligned(cpu_to_le16(stats->freq), &iwl4965_rt->rt_channelMHz);
2307 if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
2308 put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
2309 IEEE80211_CHAN_5GHZ),
2310 &iwl4965_rt->rt_chbitmask);
2311 else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
2312 put_unaligned(cpu_to_le16(IEEE80211_CHAN_CCK |
2313 IEEE80211_CHAN_2GHZ),
2314 &iwl4965_rt->rt_chbitmask);
2316 put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
2317 IEEE80211_CHAN_2GHZ),
2318 &iwl4965_rt->rt_chbitmask);
2321 iwl4965_rt->rt_rate = 0;
2323 iwl4965_rt->rt_rate = iwl_rates[rate].ieee;
2328 * It seems that the antenna field in the phy flags value
2329 * is actually a bitfield. This is undefined by radiotap,
2330 * it wants an actual antenna number but I always get "7"
2331 * for most legacy frames I receive indicating that the
2332 * same frame was received on all three RX chains.
2334 * I think this field should be removed in favour of a
2335 * new 802.11n radiotap field "RX chains" that is defined
2338 antenna = phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK;
2339 iwl4965_rt->rt_antenna = le16_to_cpu(antenna) >> 4;
2341 /* set the preamble flag if appropriate */
2342 if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
2343 iwl4965_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
2345 stats->flag |= RX_FLAG_RADIOTAP;
2348 static void iwl_update_rx_stats(struct iwl_priv *priv, u16 fc, u16 len)
2350 /* 0 - mgmt, 1 - cnt, 2 - data */
2351 int idx = (fc & IEEE80211_FCTL_FTYPE) >> 2;
2352 priv->rx_stats[idx].cnt++;
2353 priv->rx_stats[idx].bytes += len;
2357 * returns non-zero if packet should be dropped
2359 static int iwl4965_set_decrypted_flag(struct iwl_priv *priv,
2360 struct ieee80211_hdr *hdr,
2362 struct ieee80211_rx_status *stats)
2364 u16 fc = le16_to_cpu(hdr->frame_control);
2366 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
2369 if (!(fc & IEEE80211_FCTL_PROTECTED))
2372 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
2373 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
2374 case RX_RES_STATUS_SEC_TYPE_TKIP:
2375 /* The uCode has got a bad phase 1 Key, pushes the packet.
2376 * Decryption will be done in SW. */
2377 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2378 RX_RES_STATUS_BAD_KEY_TTAK)
2381 case RX_RES_STATUS_SEC_TYPE_WEP:
2382 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2383 RX_RES_STATUS_BAD_ICV_MIC) {
2384 /* bad ICV, the packet is destroyed since the
2385 * decryption is inplace, drop it */
2386 IWL_DEBUG_RX("Packet destroyed\n");
2389 case RX_RES_STATUS_SEC_TYPE_CCMP:
2390 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2391 RX_RES_STATUS_DECRYPT_OK) {
2392 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
2393 stats->flag |= RX_FLAG_DECRYPTED;
2403 static u32 iwl4965_translate_rx_status(struct iwl_priv *priv, u32 decrypt_in)
2405 u32 decrypt_out = 0;
2407 if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) ==
2408 RX_RES_STATUS_STATION_FOUND)
2409 decrypt_out |= (RX_RES_STATUS_STATION_FOUND |
2410 RX_RES_STATUS_NO_STATION_INFO_MISMATCH);
2412 decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK);
2414 /* packet was not encrypted */
2415 if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
2416 RX_RES_STATUS_SEC_TYPE_NONE)
2419 /* packet was encrypted with unknown alg */
2420 if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
2421 RX_RES_STATUS_SEC_TYPE_ERR)
2424 /* decryption was not done in HW */
2425 if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) !=
2426 RX_MPDU_RES_STATUS_DEC_DONE_MSK)
2429 switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) {
2431 case RX_RES_STATUS_SEC_TYPE_CCMP:
2432 /* alg is CCM: check MIC only */
2433 if (!(decrypt_in & RX_MPDU_RES_STATUS_MIC_OK))
2435 decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
2437 decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
2441 case RX_RES_STATUS_SEC_TYPE_TKIP:
2442 if (!(decrypt_in & RX_MPDU_RES_STATUS_TTAK_OK)) {
2444 decrypt_out |= RX_RES_STATUS_BAD_KEY_TTAK;
2447 /* fall through if TTAK OK */
2449 if (!(decrypt_in & RX_MPDU_RES_STATUS_ICV_OK))
2450 decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
2452 decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
2456 IWL_DEBUG_RX("decrypt_in:0x%x decrypt_out = 0x%x\n",
2457 decrypt_in, decrypt_out);
2462 static void iwl4965_handle_data_packet(struct iwl_priv *priv, int is_data,
2464 struct iwl_rx_mem_buffer *rxb,
2465 struct ieee80211_rx_status *stats)
2467 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2468 struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
2469 (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) : NULL;
2470 struct ieee80211_hdr *hdr;
2473 unsigned int skblen;
2475 u32 ampdu_status_legacy;
2477 if (!include_phy && priv->last_phy_res[0])
2478 rx_start = (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
2481 IWL_ERROR("MPDU frame without a PHY data\n");
2485 hdr = (struct ieee80211_hdr *)((u8 *) & rx_start[1] +
2486 rx_start->cfg_phy_cnt);
2488 len = le16_to_cpu(rx_start->byte_count);
2490 rx_end = (__le32 *) ((u8 *) & pkt->u.raw[0] +
2491 sizeof(struct iwl4965_rx_phy_res) +
2492 rx_start->cfg_phy_cnt + len);
2495 struct iwl4965_rx_mpdu_res_start *amsdu =
2496 (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
2498 hdr = (struct ieee80211_hdr *)(pkt->u.raw +
2499 sizeof(struct iwl4965_rx_mpdu_res_start));
2500 len = le16_to_cpu(amsdu->byte_count);
2501 rx_start->byte_count = amsdu->byte_count;
2502 rx_end = (__le32 *) (((u8 *) hdr) + len);
2504 /* In monitor mode allow 802.11 ACk frames (10 bytes) */
2505 if (len > priv->hw_params.max_pkt_size ||
2506 len < ((priv->iw_mode == IEEE80211_IF_TYPE_MNTR) ? 10 : 16)) {
2507 IWL_WARNING("byte count out of range [16,4K] : %d\n", len);
2511 ampdu_status = le32_to_cpu(*rx_end);
2512 skblen = ((u8 *) rx_end - (u8 *) & pkt->u.raw[0]) + sizeof(u32);
2515 /* New status scheme, need to translate */
2516 ampdu_status_legacy = ampdu_status;
2517 ampdu_status = iwl4965_translate_rx_status(priv, ampdu_status);
2520 /* start from MAC */
2521 skb_reserve(rxb->skb, (void *)hdr - (void *)pkt);
2522 skb_put(rxb->skb, len); /* end where data ends */
2524 /* We only process data packets if the interface is open */
2525 if (unlikely(!priv->is_open)) {
2526 IWL_DEBUG_DROP_LIMIT
2527 ("Dropping packet while interface is not open.\n");
2532 hdr = (struct ieee80211_hdr *)rxb->skb->data;
2534 /* in case of HW accelerated crypto and bad decryption, drop */
2535 if (!priv->hw_params.sw_crypto &&
2536 iwl4965_set_decrypted_flag(priv, hdr, ampdu_status, stats))
2539 if (priv->add_radiotap)
2540 iwl4965_add_radiotap(priv, rxb->skb, rx_start, stats, ampdu_status);
2542 iwl_update_rx_stats(priv, le16_to_cpu(hdr->frame_control), len);
2543 ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
2544 priv->alloc_rxb_skb--;
2548 /* Calc max signal level (dBm) among 3 possible receivers */
2549 static int iwl4965_calc_rssi(struct iwl_priv *priv,
2550 struct iwl4965_rx_phy_res *rx_resp)
2552 /* data from PHY/DSP regarding signal strength, etc.,
2553 * contents are always there, not configurable by host. */
2554 struct iwl4965_rx_non_cfg_phy *ncphy =
2555 (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy;
2556 u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL_AGC_DB_MASK)
2559 u32 valid_antennae =
2560 (le16_to_cpu(rx_resp->phy_flags) & RX_PHY_FLAGS_ANTENNAE_MASK)
2561 >> RX_PHY_FLAGS_ANTENNAE_OFFSET;
2565 /* Find max rssi among 3 possible receivers.
2566 * These values are measured by the digital signal processor (DSP).
2567 * They should stay fairly constant even as the signal strength varies,
2568 * if the radio's automatic gain control (AGC) is working right.
2569 * AGC value (see below) will provide the "interesting" info. */
2570 for (i = 0; i < 3; i++)
2571 if (valid_antennae & (1 << i))
2572 max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
2574 IWL_DEBUG_STATS("Rssi In A %d B %d C %d Max %d AGC dB %d\n",
2575 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
2578 /* dBm = max_rssi dB - agc dB - constant.
2579 * Higher AGC (higher radio gain) means lower signal. */
2580 return (max_rssi - agc - IWL_RSSI_OFFSET);
2583 static void iwl4965_sta_modify_ps_wake(struct iwl_priv *priv, int sta_id)
2585 unsigned long flags;
2587 spin_lock_irqsave(&priv->sta_lock, flags);
2588 priv->stations[sta_id].sta.station_flags &= ~STA_FLG_PWR_SAVE_MSK;
2589 priv->stations[sta_id].sta.station_flags_msk = STA_FLG_PWR_SAVE_MSK;
2590 priv->stations[sta_id].sta.sta.modify_mask = 0;
2591 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
2592 spin_unlock_irqrestore(&priv->sta_lock, flags);
2594 iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
2597 static void iwl4965_update_ps_mode(struct iwl_priv *priv, u16 ps_bit, u8 *addr)
2599 /* FIXME: need locking over ps_status ??? */
2600 u8 sta_id = iwl_find_station(priv, addr);
2602 if (sta_id != IWL_INVALID_STATION) {
2603 u8 sta_awake = priv->stations[sta_id].
2604 ps_status == STA_PS_STATUS_WAKE;
2606 if (sta_awake && ps_bit)
2607 priv->stations[sta_id].ps_status = STA_PS_STATUS_SLEEP;
2608 else if (!sta_awake && !ps_bit) {
2609 iwl4965_sta_modify_ps_wake(priv, sta_id);
2610 priv->stations[sta_id].ps_status = STA_PS_STATUS_WAKE;
2614 #ifdef CONFIG_IWLWIFI_DEBUG
2617 * iwl4965_dbg_report_frame - dump frame to syslog during debug sessions
2619 * You may hack this function to show different aspects of received frames,
2620 * including selective frame dumps.
2621 * group100 parameter selects whether to show 1 out of 100 good frames.
2623 * TODO: This was originally written for 3945, need to audit for
2624 * proper operation with 4965.
2626 static void iwl4965_dbg_report_frame(struct iwl_priv *priv,
2627 struct iwl_rx_packet *pkt,
2628 struct ieee80211_hdr *header, int group100)
2631 u32 print_summary = 0;
2632 u32 print_dump = 0; /* set to 1 to dump all frames' contents */
2649 struct iwl4965_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
2650 struct iwl4965_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
2651 struct iwl4965_rx_frame_end *rx_end = IWL_RX_END(pkt);
2652 u8 *data = IWL_RX_DATA(pkt);
2654 if (likely(!(priv->debug_level & IWL_DL_RX)))
2658 fc = le16_to_cpu(header->frame_control);
2659 seq_ctl = le16_to_cpu(header->seq_ctrl);
2662 channel = le16_to_cpu(rx_hdr->channel);
2663 phy_flags = le16_to_cpu(rx_hdr->phy_flags);
2664 rate_sym = rx_hdr->rate;
2665 length = le16_to_cpu(rx_hdr->len);
2667 /* end-of-frame status and timestamp */
2668 status = le32_to_cpu(rx_end->status);
2669 bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
2670 tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
2671 tsf = le64_to_cpu(rx_end->timestamp);
2673 /* signal statistics */
2674 rssi = rx_stats->rssi;
2675 agc = rx_stats->agc;
2676 sig_avg = le16_to_cpu(rx_stats->sig_avg);
2677 noise_diff = le16_to_cpu(rx_stats->noise_diff);
2679 to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
2681 /* if data frame is to us and all is good,
2682 * (optionally) print summary for only 1 out of every 100 */
2683 if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
2684 (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
2687 print_summary = 1; /* print each frame */
2688 else if (priv->framecnt_to_us < 100) {
2689 priv->framecnt_to_us++;
2692 priv->framecnt_to_us = 0;
2697 /* print summary for all other frames */
2701 if (print_summary) {
2707 title = "100Frames";
2708 else if (fc & IEEE80211_FCTL_RETRY)
2710 else if (ieee80211_is_assoc_response(fc))
2712 else if (ieee80211_is_reassoc_response(fc))
2714 else if (ieee80211_is_probe_response(fc)) {
2716 print_dump = 1; /* dump frame contents */
2717 } else if (ieee80211_is_beacon(fc)) {
2719 print_dump = 1; /* dump frame contents */
2720 } else if (ieee80211_is_atim(fc))
2722 else if (ieee80211_is_auth(fc))
2724 else if (ieee80211_is_deauth(fc))
2726 else if (ieee80211_is_disassoc(fc))
2731 rate_idx = iwl4965_hwrate_to_plcp_idx(rate_sym);
2732 if (unlikely(rate_idx == -1))
2735 bitrate = iwl_rates[rate_idx].ieee / 2;
2737 /* print frame summary.
2738 * MAC addresses show just the last byte (for brevity),
2739 * but you can hack it to show more, if you'd like to. */
2741 IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
2742 "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
2743 title, fc, header->addr1[5],
2744 length, rssi, channel, bitrate);
2746 /* src/dst addresses assume managed mode */
2747 IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
2748 "src=0x%02x, rssi=%u, tim=%lu usec, "
2749 "phy=0x%02x, chnl=%d\n",
2750 title, fc, header->addr1[5],
2751 header->addr3[5], rssi,
2752 tsf_low - priv->scan_start_tsf,
2753 phy_flags, channel);
2757 iwl_print_hex_dump(priv, IWL_DL_RX, data, length);
2760 static inline void iwl4965_dbg_report_frame(struct iwl_priv *priv,
2761 struct iwl_rx_packet *pkt,
2762 struct ieee80211_hdr *header,
2770 /* Called for REPLY_RX (legacy ABG frames), or
2771 * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
2772 static void iwl4965_rx_reply_rx(struct iwl_priv *priv,
2773 struct iwl_rx_mem_buffer *rxb)
2775 struct ieee80211_hdr *header;
2776 struct ieee80211_rx_status rx_status;
2777 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2778 /* Use phy data (Rx signal strength, etc.) contained within
2779 * this rx packet for legacy frames,
2780 * or phy data cached from REPLY_RX_PHY_CMD for HT frames. */
2781 int include_phy = (pkt->hdr.cmd == REPLY_RX);
2782 struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
2783 (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) :
2784 (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
2786 unsigned int len = 0;
2790 rx_status.mactime = le64_to_cpu(rx_start->timestamp);
2792 ieee80211_channel_to_frequency(le16_to_cpu(rx_start->channel));
2793 rx_status.band = (rx_start->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
2794 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
2795 rx_status.rate_idx =
2796 iwl4965_hwrate_to_plcp_idx(le32_to_cpu(rx_start->rate_n_flags));
2797 if (rx_status.band == IEEE80211_BAND_5GHZ)
2798 rx_status.rate_idx -= IWL_FIRST_OFDM_RATE;
2800 rx_status.antenna = 0;
2803 if ((unlikely(rx_start->cfg_phy_cnt > 20))) {
2804 IWL_DEBUG_DROP("dsp size out of range [0,20]: %d/n",
2805 rx_start->cfg_phy_cnt);
2810 if (priv->last_phy_res[0])
2811 rx_start = (struct iwl4965_rx_phy_res *)
2812 &priv->last_phy_res[1];
2818 IWL_ERROR("MPDU frame without a PHY data\n");
2823 header = (struct ieee80211_hdr *)((u8 *) & rx_start[1]
2824 + rx_start->cfg_phy_cnt);
2826 len = le16_to_cpu(rx_start->byte_count);
2827 rx_end = (__le32 *)(pkt->u.raw + rx_start->cfg_phy_cnt +
2828 sizeof(struct iwl4965_rx_phy_res) + len);
2830 struct iwl4965_rx_mpdu_res_start *amsdu =
2831 (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
2833 header = (void *)(pkt->u.raw +
2834 sizeof(struct iwl4965_rx_mpdu_res_start));
2835 len = le16_to_cpu(amsdu->byte_count);
2836 rx_end = (__le32 *) (pkt->u.raw +
2837 sizeof(struct iwl4965_rx_mpdu_res_start) + len);
2840 if (!(*rx_end & RX_RES_STATUS_NO_CRC32_ERROR) ||
2841 !(*rx_end & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
2842 IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n",
2843 le32_to_cpu(*rx_end));
2847 priv->ucode_beacon_time = le32_to_cpu(rx_start->beacon_time_stamp);
2849 /* Find max signal strength (dBm) among 3 antenna/receiver chains */
2850 rx_status.signal = iwl4965_calc_rssi(priv, rx_start);
2852 /* Meaningful noise values are available only from beacon statistics,
2853 * which are gathered only when associated, and indicate noise
2854 * only for the associated network channel ...
2855 * Ignore these noise values while scanning (other channels) */
2856 if (iwl_is_associated(priv) &&
2857 !test_bit(STATUS_SCANNING, &priv->status)) {
2858 rx_status.noise = priv->last_rx_noise;
2859 rx_status.qual = iwl4965_calc_sig_qual(rx_status.signal,
2862 rx_status.noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
2863 rx_status.qual = iwl4965_calc_sig_qual(rx_status.signal, 0);
2866 /* Reset beacon noise level if not associated. */
2867 if (!iwl_is_associated(priv))
2868 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
2870 /* Set "1" to report good data frames in groups of 100 */
2871 /* FIXME: need to optimze the call: */
2872 iwl4965_dbg_report_frame(priv, pkt, header, 1);
2874 IWL_DEBUG_STATS_LIMIT("Rssi %d, noise %d, qual %d, TSF %llu\n",
2875 rx_status.signal, rx_status.noise, rx_status.signal,
2876 (unsigned long long)rx_status.mactime);
2879 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
2880 iwl4965_handle_data_packet(priv, 1, include_phy,
2885 network_packet = iwl4965_is_network_packet(priv, header);
2886 if (network_packet) {
2887 priv->last_rx_rssi = rx_status.signal;
2888 priv->last_beacon_time = priv->ucode_beacon_time;
2889 priv->last_tsf = le64_to_cpu(rx_start->timestamp);
2892 fc = le16_to_cpu(header->frame_control);
2893 switch (fc & IEEE80211_FCTL_FTYPE) {
2894 case IEEE80211_FTYPE_MGMT:
2895 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
2896 iwl4965_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
2898 iwl4965_handle_data_packet(priv, 0, include_phy, rxb, &rx_status);
2901 case IEEE80211_FTYPE_CTL:
2902 #ifdef CONFIG_IWL4965_HT
2903 switch (fc & IEEE80211_FCTL_STYPE) {
2904 case IEEE80211_STYPE_BACK_REQ:
2905 IWL_DEBUG_HT("IEEE80211_STYPE_BACK_REQ arrived\n");
2906 iwl4965_handle_data_packet(priv, 0, include_phy,
2915 case IEEE80211_FTYPE_DATA: {
2916 DECLARE_MAC_BUF(mac1);
2917 DECLARE_MAC_BUF(mac2);
2918 DECLARE_MAC_BUF(mac3);
2920 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
2921 iwl4965_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
2924 if (unlikely(!network_packet))
2925 IWL_DEBUG_DROP("Dropping (non network): "
2927 print_mac(mac1, header->addr1),
2928 print_mac(mac2, header->addr2),
2929 print_mac(mac3, header->addr3));
2930 else if (unlikely(iwl4965_is_duplicate_packet(priv, header)))
2931 IWL_DEBUG_DROP("Dropping (dup): %s, %s, %s\n",
2932 print_mac(mac1, header->addr1),
2933 print_mac(mac2, header->addr2),
2934 print_mac(mac3, header->addr3));
2936 iwl4965_handle_data_packet(priv, 1, include_phy, rxb,
2946 /* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD).
2947 * This will be used later in iwl4965_rx_reply_rx() for REPLY_RX_MPDU_CMD. */
2948 static void iwl4965_rx_reply_rx_phy(struct iwl_priv *priv,
2949 struct iwl_rx_mem_buffer *rxb)
2951 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2952 priv->last_phy_res[0] = 1;
2953 memcpy(&priv->last_phy_res[1], &(pkt->u.raw[0]),
2954 sizeof(struct iwl4965_rx_phy_res));
2956 static void iwl4965_rx_missed_beacon_notif(struct iwl_priv *priv,
2957 struct iwl_rx_mem_buffer *rxb)
2960 #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
2961 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2962 struct iwl4965_missed_beacon_notif *missed_beacon;
2964 missed_beacon = &pkt->u.missed_beacon;
2965 if (le32_to_cpu(missed_beacon->consequtive_missed_beacons) > 5) {
2966 IWL_DEBUG_CALIB("missed bcn cnsq %d totl %d rcd %d expctd %d\n",
2967 le32_to_cpu(missed_beacon->consequtive_missed_beacons),
2968 le32_to_cpu(missed_beacon->total_missed_becons),
2969 le32_to_cpu(missed_beacon->num_recvd_beacons),
2970 le32_to_cpu(missed_beacon->num_expected_beacons));
2971 if (!test_bit(STATUS_SCANNING, &priv->status))
2972 iwl_init_sensitivity(priv);
2974 #endif /*CONFIG_IWL4965_RUN_TIME_CALIB*/
2976 #ifdef CONFIG_IWL4965_HT
2979 * iwl4965_sta_modify_enable_tid_tx - Enable Tx for this TID in station table
2981 static void iwl4965_sta_modify_enable_tid_tx(struct iwl_priv *priv,
2982 int sta_id, int tid)
2984 unsigned long flags;
2986 /* Remove "disable" flag, to enable Tx for this TID */
2987 spin_lock_irqsave(&priv->sta_lock, flags);
2988 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_TID_DISABLE_TX;
2989 priv->stations[sta_id].sta.tid_disable_tx &= cpu_to_le16(~(1 << tid));
2990 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
2991 spin_unlock_irqrestore(&priv->sta_lock, flags);
2993 iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
2997 * iwl4965_tx_status_reply_compressed_ba - Update tx status from block-ack
2999 * Go through block-ack's bitmap of ACK'd frames, update driver's record of
3000 * ACK vs. not. This gets sent to mac80211, then to rate scaling algo.
3002 static int iwl4965_tx_status_reply_compressed_ba(struct iwl_priv *priv,
3003 struct iwl_ht_agg *agg,
3004 struct iwl4965_compressed_ba_resp*
3009 u16 seq_ctl = le16_to_cpu(ba_resp->seq_ctl);
3010 u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
3013 struct ieee80211_tx_info *info;
3015 if (unlikely(!agg->wait_for_ba)) {
3016 IWL_ERROR("Received BA when not expected\n");
3020 /* Mark that the expected block-ack response arrived */
3021 agg->wait_for_ba = 0;
3022 IWL_DEBUG_TX_REPLY("BA %d %d\n", agg->start_idx, ba_resp->seq_ctl);
3024 /* Calculate shift to align block-ack bits with our Tx window bits */
3025 sh = agg->start_idx - SEQ_TO_INDEX(seq_ctl>>4);
3026 if (sh < 0) /* tbw something is wrong with indices */
3029 /* don't use 64-bit values for now */
3030 bitmap = le64_to_cpu(ba_resp->bitmap) >> sh;
3032 if (agg->frame_count > (64 - sh)) {
3033 IWL_DEBUG_TX_REPLY("more frames than bitmap size");
3037 /* check for success or failure according to the
3038 * transmitted bitmap and block-ack bitmap */
3039 bitmap &= agg->bitmap;
3041 /* For each frame attempted in aggregation,
3042 * update driver's record of tx frame's status. */
3043 for (i = 0; i < agg->frame_count ; i++) {
3044 ack = bitmap & (1 << i);
3046 IWL_DEBUG_TX_REPLY("%s ON i=%d idx=%d raw=%d\n",
3047 ack? "ACK":"NACK", i, (agg->start_idx + i) & 0xff,
3048 agg->start_idx + i);
3051 info = IEEE80211_SKB_CB(priv->txq[scd_flow].txb[agg->start_idx].skb[0]);
3052 memset(&info->status, 0, sizeof(info->status));
3053 info->flags = IEEE80211_TX_STAT_ACK;
3054 info->flags |= IEEE80211_TX_STAT_AMPDU;
3055 info->status.ampdu_ack_map = successes;
3056 info->status.ampdu_ack_len = agg->frame_count;
3057 iwl4965_hwrate_to_tx_control(priv, agg->rate_n_flags, info);
3059 IWL_DEBUG_TX_REPLY("Bitmap %llx\n", (unsigned long long)bitmap);
3065 * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
3067 static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv,
3070 /* Simply stop the queue, but don't change any configuration;
3071 * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
3072 iwl_write_prph(priv,
3073 IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
3074 (0 << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE)|
3075 (1 << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
3079 * txq_id must be greater than IWL_BACK_QUEUE_FIRST_ID
3080 * priv->lock must be held by the caller
3082 static int iwl4965_tx_queue_agg_disable(struct iwl_priv *priv, u16 txq_id,
3083 u16 ssn_idx, u8 tx_fifo)
3087 if (IWL_BACK_QUEUE_FIRST_ID > txq_id) {
3088 IWL_WARNING("queue number too small: %d, must be > %d\n",
3089 txq_id, IWL_BACK_QUEUE_FIRST_ID);
3093 ret = iwl_grab_nic_access(priv);
3097 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
3099 iwl_clear_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
3101 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
3102 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
3103 /* supposes that ssn_idx is valid (!= 0xFFF) */
3104 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
3106 iwl_clear_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
3107 iwl_txq_ctx_deactivate(priv, txq_id);
3108 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
3110 iwl_release_nic_access(priv);
3115 int iwl4965_check_empty_hw_queue(struct iwl_priv *priv, int sta_id,
3118 struct iwl_queue *q = &priv->txq[txq_id].q;
3119 u8 *addr = priv->stations[sta_id].sta.sta.addr;
3120 struct iwl_tid_data *tid_data = &priv->stations[sta_id].tid[tid];
3122 switch (priv->stations[sta_id].tid[tid].agg.state) {
3123 case IWL_EMPTYING_HW_QUEUE_DELBA:
3124 /* We are reclaiming the last packet of the */
3125 /* aggregated HW queue */
3126 if (txq_id == tid_data->agg.txq_id &&
3127 q->read_ptr == q->write_ptr) {
3128 u16 ssn = SEQ_TO_SN(tid_data->seq_number);
3129 int tx_fifo = default_tid_to_tx_fifo[tid];
3130 IWL_DEBUG_HT("HW queue empty: continue DELBA flow\n");
3131 iwl4965_tx_queue_agg_disable(priv, txq_id,
3133 tid_data->agg.state = IWL_AGG_OFF;
3134 ieee80211_stop_tx_ba_cb_irqsafe(priv->hw, addr, tid);
3137 case IWL_EMPTYING_HW_QUEUE_ADDBA:
3138 /* We are reclaiming the last packet of the queue */
3139 if (tid_data->tfds_in_queue == 0) {
3140 IWL_DEBUG_HT("HW queue empty: continue ADDBA flow\n");
3141 tid_data->agg.state = IWL_AGG_ON;
3142 ieee80211_start_tx_ba_cb_irqsafe(priv->hw, addr, tid);
3150 * iwl4965_rx_reply_compressed_ba - Handler for REPLY_COMPRESSED_BA
3152 * Handles block-acknowledge notification from device, which reports success
3153 * of frames sent via aggregation.
3155 static void iwl4965_rx_reply_compressed_ba(struct iwl_priv *priv,
3156 struct iwl_rx_mem_buffer *rxb)
3158 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
3159 struct iwl4965_compressed_ba_resp *ba_resp = &pkt->u.compressed_ba;
3161 struct iwl_tx_queue *txq = NULL;
3162 struct iwl_ht_agg *agg;
3163 DECLARE_MAC_BUF(mac);
3165 /* "flow" corresponds to Tx queue */
3166 u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
3168 /* "ssn" is start of block-ack Tx window, corresponds to index
3169 * (in Tx queue's circular buffer) of first TFD/frame in window */
3170 u16 ba_resp_scd_ssn = le16_to_cpu(ba_resp->scd_ssn);
3172 if (scd_flow >= priv->hw_params.max_txq_num) {
3173 IWL_ERROR("BUG_ON scd_flow is bigger than number of queues");
3177 txq = &priv->txq[scd_flow];
3178 agg = &priv->stations[ba_resp->sta_id].tid[ba_resp->tid].agg;
3180 /* Find index just before block-ack window */
3181 index = iwl_queue_dec_wrap(ba_resp_scd_ssn & 0xff, txq->q.n_bd);
3183 /* TODO: Need to get this copy more safely - now good for debug */
3185 IWL_DEBUG_TX_REPLY("REPLY_COMPRESSED_BA [%d]Received from %s, "
3188 print_mac(mac, (u8*) &ba_resp->sta_addr_lo32),
3190 IWL_DEBUG_TX_REPLY("TID = %d, SeqCtl = %d, bitmap = 0x%llx, scd_flow = "
3191 "%d, scd_ssn = %d\n",
3194 (unsigned long long)le64_to_cpu(ba_resp->bitmap),
3197 IWL_DEBUG_TX_REPLY("DAT start_idx = %d, bitmap = 0x%llx \n",
3199 (unsigned long long)agg->bitmap);
3201 /* Update driver's record of ACK vs. not for each frame in window */
3202 iwl4965_tx_status_reply_compressed_ba(priv, agg, ba_resp);
3204 /* Release all TFDs before the SSN, i.e. all TFDs in front of
3205 * block-ack window (we assume that they've been successfully
3206 * transmitted ... if not, it's too late anyway). */
3207 if (txq->q.read_ptr != (ba_resp_scd_ssn & 0xff)) {
3208 /* calculate mac80211 ampdu sw queue to wake */
3210 scd_flow - IWL_BACK_QUEUE_FIRST_ID + priv->hw->queues;
3211 int freed = iwl4965_tx_queue_reclaim(priv, scd_flow, index);
3212 priv->stations[ba_resp->sta_id].
3213 tid[ba_resp->tid].tfds_in_queue -= freed;
3214 if (iwl_queue_space(&txq->q) > txq->q.low_mark &&
3215 priv->mac80211_registered &&
3216 agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
3217 ieee80211_wake_queue(priv->hw, ampdu_q);
3218 iwl4965_check_empty_hw_queue(priv, ba_resp->sta_id,
3219 ba_resp->tid, scd_flow);
3224 * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
3226 static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
3233 scd_q2ratid = ra_tid & IWL49_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
3235 tbl_dw_addr = priv->scd_base_addr +
3236 IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
3238 tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
3241 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
3243 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
3245 iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
3252 * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
3254 * NOTE: txq_id must be greater than IWL_BACK_QUEUE_FIRST_ID,
3255 * i.e. it must be one of the higher queues used for aggregation
3257 static int iwl4965_tx_queue_agg_enable(struct iwl_priv *priv, int txq_id,
3258 int tx_fifo, int sta_id, int tid,
3261 unsigned long flags;
3265 if (IWL_BACK_QUEUE_FIRST_ID > txq_id)
3266 IWL_WARNING("queue number too small: %d, must be > %d\n",
3267 txq_id, IWL_BACK_QUEUE_FIRST_ID);
3269 ra_tid = BUILD_RAxTID(sta_id, tid);
3271 /* Modify device's station table to Tx this TID */
3272 iwl4965_sta_modify_enable_tid_tx(priv, sta_id, tid);
3274 spin_lock_irqsave(&priv->lock, flags);
3275 rc = iwl_grab_nic_access(priv);
3277 spin_unlock_irqrestore(&priv->lock, flags);
3281 /* Stop this Tx queue before configuring it */
3282 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
3284 /* Map receiver-address / traffic-ID to this queue */
3285 iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
3287 /* Set this queue as a chain-building queue */
3288 iwl_set_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
3290 /* Place first TFD at index corresponding to start sequence number.
3291 * Assumes that ssn_idx is valid (!= 0xFFF) */
3292 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
3293 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
3294 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
3296 /* Set up Tx window size and frame limit for this queue */
3297 iwl_write_targ_mem(priv,
3298 priv->scd_base_addr + IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id),
3299 (SCD_WIN_SIZE << IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
3300 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
3302 iwl_write_targ_mem(priv, priv->scd_base_addr +
3303 IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
3304 (SCD_FRAME_LIMIT << IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
3305 & IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
3307 iwl_set_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
3309 /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
3310 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
3312 iwl_release_nic_access(priv);
3313 spin_unlock_irqrestore(&priv->lock, flags);
3318 #endif /* CONFIG_IWL4965_HT */
3321 #ifdef CONFIG_IWL4965_HT
3322 static int iwl4965_rx_agg_start(struct iwl_priv *priv,
3323 const u8 *addr, int tid, u16 ssn)
3325 unsigned long flags;
3328 sta_id = iwl_find_station(priv, addr);
3329 if (sta_id == IWL_INVALID_STATION)
3332 spin_lock_irqsave(&priv->sta_lock, flags);
3333 priv->stations[sta_id].sta.station_flags_msk = 0;
3334 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_ADDBA_TID_MSK;
3335 priv->stations[sta_id].sta.add_immediate_ba_tid = (u8)tid;
3336 priv->stations[sta_id].sta.add_immediate_ba_ssn = cpu_to_le16(ssn);
3337 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3338 spin_unlock_irqrestore(&priv->sta_lock, flags);
3340 return iwl_send_add_sta(priv, &priv->stations[sta_id].sta,
3344 static int iwl4965_rx_agg_stop(struct iwl_priv *priv,
3345 const u8 *addr, int tid)
3347 unsigned long flags;
3350 sta_id = iwl_find_station(priv, addr);
3351 if (sta_id == IWL_INVALID_STATION)
3354 spin_lock_irqsave(&priv->sta_lock, flags);
3355 priv->stations[sta_id].sta.station_flags_msk = 0;
3356 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_DELBA_TID_MSK;
3357 priv->stations[sta_id].sta.remove_immediate_ba_tid = (u8)tid;
3358 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3359 spin_unlock_irqrestore(&priv->sta_lock, flags);
3361 return iwl_send_add_sta(priv, &priv->stations[sta_id].sta,
3366 * Find first available (lowest unused) Tx Queue, mark it "active".
3367 * Called only when finding queue for aggregation.
3368 * Should never return anything < 7, because they should already
3369 * be in use as EDCA AC (0-3), Command (4), HCCA (5, 6).
3371 static int iwl4965_txq_ctx_activate_free(struct iwl_priv *priv)
3375 for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++)
3376 if (!test_and_set_bit(txq_id, &priv->txq_ctx_active_msk))
3381 static int iwl4965_tx_agg_start(struct ieee80211_hw *hw, const u8 *ra,
3382 u16 tid, u16 *start_seq_num)
3384 struct iwl_priv *priv = hw->priv;
3390 unsigned long flags;
3391 struct iwl_tid_data *tid_data;
3392 DECLARE_MAC_BUF(mac);
3394 if (likely(tid < ARRAY_SIZE(default_tid_to_tx_fifo)))
3395 tx_fifo = default_tid_to_tx_fifo[tid];
3399 IWL_WARNING("%s on ra = %s tid = %d\n",
3400 __func__, print_mac(mac, ra), tid);
3402 sta_id = iwl_find_station(priv, ra);
3403 if (sta_id == IWL_INVALID_STATION)
3406 if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_OFF) {
3407 IWL_ERROR("Start AGG when state is not IWL_AGG_OFF !\n");
3411 txq_id = iwl4965_txq_ctx_activate_free(priv);
3415 spin_lock_irqsave(&priv->sta_lock, flags);
3416 tid_data = &priv->stations[sta_id].tid[tid];
3417 ssn = SEQ_TO_SN(tid_data->seq_number);
3418 tid_data->agg.txq_id = txq_id;
3419 spin_unlock_irqrestore(&priv->sta_lock, flags);
3421 *start_seq_num = ssn;
3422 ret = iwl4965_tx_queue_agg_enable(priv, txq_id, tx_fifo,
3428 if (tid_data->tfds_in_queue == 0) {
3429 printk(KERN_ERR "HW queue is empty\n");
3430 tid_data->agg.state = IWL_AGG_ON;
3431 ieee80211_start_tx_ba_cb_irqsafe(hw, ra, tid);
3433 IWL_DEBUG_HT("HW queue is NOT empty: %d packets in HW queue\n",
3434 tid_data->tfds_in_queue);
3435 tid_data->agg.state = IWL_EMPTYING_HW_QUEUE_ADDBA;
3440 static int iwl4965_tx_agg_stop(struct ieee80211_hw *hw, const u8 *ra, u16 tid)
3442 struct iwl_priv *priv = hw->priv;
3443 int tx_fifo_id, txq_id, sta_id, ssn = -1;
3444 struct iwl_tid_data *tid_data;
3445 int ret, write_ptr, read_ptr;
3446 unsigned long flags;
3447 DECLARE_MAC_BUF(mac);
3450 IWL_ERROR("ra = NULL\n");
3454 if (likely(tid < ARRAY_SIZE(default_tid_to_tx_fifo)))
3455 tx_fifo_id = default_tid_to_tx_fifo[tid];
3459 sta_id = iwl_find_station(priv, ra);
3461 if (sta_id == IWL_INVALID_STATION)
3464 if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_ON)
3465 IWL_WARNING("Stopping AGG while state not IWL_AGG_ON\n");
3467 tid_data = &priv->stations[sta_id].tid[tid];
3468 ssn = (tid_data->seq_number & IEEE80211_SCTL_SEQ) >> 4;
3469 txq_id = tid_data->agg.txq_id;
3470 write_ptr = priv->txq[txq_id].q.write_ptr;
3471 read_ptr = priv->txq[txq_id].q.read_ptr;
3473 /* The queue is not empty */
3474 if (write_ptr != read_ptr) {
3475 IWL_DEBUG_HT("Stopping a non empty AGG HW QUEUE\n");
3476 priv->stations[sta_id].tid[tid].agg.state =
3477 IWL_EMPTYING_HW_QUEUE_DELBA;
3481 IWL_DEBUG_HT("HW queue is empty\n");
3482 priv->stations[sta_id].tid[tid].agg.state = IWL_AGG_OFF;
3484 spin_lock_irqsave(&priv->lock, flags);
3485 ret = iwl4965_tx_queue_agg_disable(priv, txq_id, ssn, tx_fifo_id);
3486 spin_unlock_irqrestore(&priv->lock, flags);
3491 ieee80211_stop_tx_ba_cb_irqsafe(priv->hw, ra, tid);
3496 int iwl4965_mac_ampdu_action(struct ieee80211_hw *hw,
3497 enum ieee80211_ampdu_mlme_action action,
3498 const u8 *addr, u16 tid, u16 *ssn)
3500 struct iwl_priv *priv = hw->priv;
3501 DECLARE_MAC_BUF(mac);
3503 IWL_DEBUG_HT("A-MPDU action on addr %s tid %d\n",
3504 print_mac(mac, addr), tid);
3507 case IEEE80211_AMPDU_RX_START:
3508 IWL_DEBUG_HT("start Rx\n");
3509 return iwl4965_rx_agg_start(priv, addr, tid, *ssn);
3510 case IEEE80211_AMPDU_RX_STOP:
3511 IWL_DEBUG_HT("stop Rx\n");
3512 return iwl4965_rx_agg_stop(priv, addr, tid);
3513 case IEEE80211_AMPDU_TX_START:
3514 IWL_DEBUG_HT("start Tx\n");
3515 return iwl4965_tx_agg_start(hw, addr, tid, ssn);
3516 case IEEE80211_AMPDU_TX_STOP:
3517 IWL_DEBUG_HT("stop Tx\n");
3518 return iwl4965_tx_agg_stop(hw, addr, tid);
3520 IWL_DEBUG_HT("unknown\n");
3526 #endif /* CONFIG_IWL4965_HT */
3529 static u16 iwl4965_get_hcmd_size(u8 cmd_id, u16 len)
3533 return (u16) sizeof(struct iwl4965_rxon_cmd);
3539 static u16 iwl4965_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
3541 struct iwl4965_addsta_cmd *addsta = (struct iwl4965_addsta_cmd *)data;
3542 addsta->mode = cmd->mode;
3543 memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
3544 memcpy(&addsta->key, &cmd->key, sizeof(struct iwl4965_keyinfo));
3545 addsta->station_flags = cmd->station_flags;
3546 addsta->station_flags_msk = cmd->station_flags_msk;
3547 addsta->tid_disable_tx = cmd->tid_disable_tx;
3548 addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
3549 addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
3550 addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
3551 addsta->reserved1 = __constant_cpu_to_le16(0);
3552 addsta->reserved2 = __constant_cpu_to_le32(0);
3554 return (u16)sizeof(struct iwl4965_addsta_cmd);
3556 /* Set up 4965-specific Rx frame reply handlers */
3557 static void iwl4965_rx_handler_setup(struct iwl_priv *priv)
3559 /* Legacy Rx frames */
3560 priv->rx_handlers[REPLY_RX] = iwl4965_rx_reply_rx;
3562 /* High-throughput (HT) Rx frames */
3563 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl4965_rx_reply_rx_phy;
3564 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl4965_rx_reply_rx;
3566 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
3567 iwl4965_rx_missed_beacon_notif;
3569 #ifdef CONFIG_IWL4965_HT
3570 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl4965_rx_reply_compressed_ba;
3571 #endif /* CONFIG_IWL4965_HT */
3574 void iwl4965_hw_setup_deferred_work(struct iwl_priv *priv)
3576 INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
3577 #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
3578 INIT_WORK(&priv->sensitivity_work, iwl4965_bg_sensitivity_work);
3580 init_timer(&priv->statistics_periodic);
3581 priv->statistics_periodic.data = (unsigned long)priv;
3582 priv->statistics_periodic.function = iwl4965_bg_statistics_periodic;
3585 void iwl4965_hw_cancel_deferred_work(struct iwl_priv *priv)
3587 del_timer_sync(&priv->statistics_periodic);
3589 cancel_delayed_work(&priv->init_alive_start);
3593 static struct iwl_hcmd_ops iwl4965_hcmd = {
3594 .rxon_assoc = iwl4965_send_rxon_assoc,
3597 static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
3598 .get_hcmd_size = iwl4965_get_hcmd_size,
3599 .build_addsta_hcmd = iwl4965_build_addsta_hcmd,
3600 #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
3601 .chain_noise_reset = iwl4965_chain_noise_reset,
3602 .gain_computation = iwl4965_gain_computation,
3606 static struct iwl_lib_ops iwl4965_lib = {
3607 .set_hw_params = iwl4965_hw_set_hw_params,
3608 .alloc_shared_mem = iwl4965_alloc_shared_mem,
3609 .free_shared_mem = iwl4965_free_shared_mem,
3610 .shared_mem_rx_idx = iwl4965_shared_mem_rx_idx,
3611 .txq_update_byte_cnt_tbl = iwl4965_txq_update_byte_cnt_tbl,
3612 .disable_tx_fifo = iwl4965_disable_tx_fifo,
3613 .rx_handler_setup = iwl4965_rx_handler_setup,
3614 .is_valid_rtc_data_addr = iwl4965_hw_valid_rtc_data_addr,
3615 .alive_notify = iwl4965_alive_notify,
3616 .init_alive_start = iwl4965_init_alive_start,
3617 .load_ucode = iwl4965_load_bsm,
3619 .init = iwl4965_apm_init,
3620 .config = iwl4965_nic_config,
3621 .set_pwr_src = iwl4965_set_pwr_src,
3624 .regulatory_bands = {
3625 EEPROM_REGULATORY_BAND_1_CHANNELS,
3626 EEPROM_REGULATORY_BAND_2_CHANNELS,
3627 EEPROM_REGULATORY_BAND_3_CHANNELS,
3628 EEPROM_REGULATORY_BAND_4_CHANNELS,
3629 EEPROM_REGULATORY_BAND_5_CHANNELS,
3630 EEPROM_4965_REGULATORY_BAND_24_FAT_CHANNELS,
3631 EEPROM_4965_REGULATORY_BAND_52_FAT_CHANNELS
3633 .verify_signature = iwlcore_eeprom_verify_signature,
3634 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
3635 .release_semaphore = iwlcore_eeprom_release_semaphore,
3636 .check_version = iwl4965_eeprom_check_version,
3637 .query_addr = iwlcore_eeprom_query_addr,
3639 .radio_kill_sw = iwl4965_radio_kill_sw,
3640 .set_power = iwl4965_set_power,
3641 .update_chain_flags = iwl4965_update_chain_flags,
3644 static struct iwl_ops iwl4965_ops = {
3645 .lib = &iwl4965_lib,
3646 .hcmd = &iwl4965_hcmd,
3647 .utils = &iwl4965_hcmd_utils,
3650 struct iwl_cfg iwl4965_agn_cfg = {
3652 .fw_name = "iwlwifi-4965" IWL4965_UCODE_API ".ucode",
3653 .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
3654 .eeprom_size = IWL4965_EEPROM_IMG_SIZE,
3655 .ops = &iwl4965_ops,
3656 .mod_params = &iwl4965_mod_params,
3659 module_param_named(antenna, iwl4965_mod_params.antenna, int, 0444);
3660 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
3661 module_param_named(disable, iwl4965_mod_params.disable, int, 0444);
3662 MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
3663 module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, 0444);
3664 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])\n");
3665 module_param_named(debug, iwl4965_mod_params.debug, int, 0444);
3666 MODULE_PARM_DESC(debug, "debug output mask");
3668 disable_hw_scan, iwl4965_mod_params.disable_hw_scan, int, 0444);
3669 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
3671 module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, 0444);
3672 MODULE_PARM_DESC(queues_num, "number of hw queues.");
3675 module_param_named(qos_enable, iwl4965_mod_params.enable_qos, int, 0444);
3676 MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
3677 module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K, int, 0444);
3678 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
3679 module_param_named(fw_restart4965, iwl4965_mod_params.restart_fw, int, 0444);
3680 MODULE_PARM_DESC(fw_restart4965, "restart firmware in case of error");