drivers/net/wireless/iwlwifi/iwl-4965.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  *  Intel Linux Wireless <ilw@linux.intel.com>
  23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24  *
  25  *****************************************************************************/
  26
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/init.h>
  30 #include <linux/pci.h>
  31 #include <linux/dma-mapping.h>
  32 #include <linux/delay.h>
  33 #include <linux/skbuff.h>
  34 #include <linux/netdevice.h>
  35 #include <linux/wireless.h>
  36 #include <net/mac80211.h>
  37 #include <linux/etherdevice.h>
  38 #include <asm/unaligned.h>
  39
  40 #include "iwl-eeprom.h"
  41 #include "iwl-dev.h"
  42 #include "iwl-core.h"
  43 #include "iwl-io.h"
  44 #include "iwl-helpers.h"
  45 #include "iwl-calib.h"
  46 #include "iwl-sta.h"
  47
  48 static int iwl4965_send_tx_power(struct iwl_priv *priv);
  49 static int iwl4965_hw_get_temperature(const struct iwl_priv *priv);
  50
  51 /* Highest firmware API version supported */
  52 #define IWL4965_UCODE_API_MAX 2
  53
  54 /* Lowest firmware API version supported */
  55 #define IWL4965_UCODE_API_MIN 2
  56
  57 #define IWL4965_FW_PRE "iwlwifi-4965-"
  58 #define _IWL4965_MODULE_FIRMWARE(api) IWL4965_FW_PRE #api ".ucode"
  59 #define IWL4965_MODULE_FIRMWARE(api) _IWL4965_MODULE_FIRMWARE(api)
  60
  61
  62 /* module parameters */
  63 static struct iwl_mod_params iwl4965_mod_params = {
  64         .num_of_queues = IWL49_NUM_QUEUES,
  65         .num_of_ampdu_queues = IWL49_NUM_AMPDU_QUEUES,
  66         .amsdu_size_8K = 1,
  67         .restart_fw = 1,
  68         /* the rest are 0 by default */
  69 };
  70
  71 /* check contents of special bootstrap uCode SRAM */
  72 static int iwl4965_verify_bsm(struct iwl_priv *priv)
  73 {
  74         __le32 *image = priv->ucode_boot.v_addr;
  75         u32 len = priv->ucode_boot.len;
  76         u32 reg;
  77         u32 val;
  78
  79         IWL_DEBUG_INFO("Begin verify bsm\n");
  80
  81         /* verify BSM SRAM contents */
  82         val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
  83         for (reg = BSM_SRAM_LOWER_BOUND;
  84              reg < BSM_SRAM_LOWER_BOUND + len;
  85              reg += sizeof(u32), image++) {
  86                 val = iwl_read_prph(priv, reg);
  87                 if (val != le32_to_cpu(*image)) {
  88                         IWL_ERROR("BSM uCode verification failed at "
  89                                   "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  90                                   BSM_SRAM_LOWER_BOUND,
  91                                   reg - BSM_SRAM_LOWER_BOUND, len,
  92                                   val, le32_to_cpu(*image));
  93                         return -EIO;
  94                 }
  95         }
  96
  97         IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
  98
  99         return 0;
 100 }
 101
 102 /**
 103  * iwl4965_load_bsm - Load bootstrap instructions
 104  *
 105  * BSM operation:
 106  *
 107  * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
 108  * in special SRAM that does not power down during RFKILL.  When powering back
 109  * up after power-saving sleeps (or during initial uCode load), the BSM loads
 110  * the bootstrap program into the on-board processor, and starts it.
 111  *
 112  * The bootstrap program loads (via DMA) instructions and data for a new
 113  * program from host DRAM locations indicated by the host driver in the
 114  * BSM_DRAM_* registers.  Once the new program is loaded, it starts
 115  * automatically.
 116  *
 117  * When initializing the NIC, the host driver points the BSM to the
 118  * "initialize" uCode image.  This uCode sets up some internal data, then
 119  * notifies host via "initialize alive" that it is complete.
 120  *
 121  * The host then replaces the BSM_DRAM_* pointer values to point to the
 122  * normal runtime uCode instructions and a backup uCode data cache buffer
 123  * (filled initially with starting data values for the on-board processor),
 124  * then triggers the "initialize" uCode to load and launch the runtime uCode,
 125  * which begins normal operation.
 126  *
 127  * When doing a power-save shutdown, runtime uCode saves data SRAM into
 128  * the backup data cache in DRAM before SRAM is powered down.
 129  *
 130  * When powering back up, the BSM loads the bootstrap program.  This reloads
 131  * the runtime uCode instructions and the backup data cache into SRAM,
 132  * and re-launches the runtime uCode from where it left off.
 133  */
 134 static int iwl4965_load_bsm(struct iwl_priv *priv)
 135 {
 136         __le32 *image = priv->ucode_boot.v_addr;
 137         u32 len = priv->ucode_boot.len;
 138         dma_addr_t pinst;
 139         dma_addr_t pdata;
 140         u32 inst_len;
 141         u32 data_len;
 142         int i;
 143         u32 done;
 144         u32 reg_offset;
 145         int ret;
 146
 147         IWL_DEBUG_INFO("Begin load bsm\n");
 148
 149         priv->ucode_type = UCODE_RT;
 150
 151         /* make sure bootstrap program is no larger than BSM's SRAM size */
 152         if (len > IWL_MAX_BSM_SIZE)
 153                 return -EINVAL;
 154
 155         /* Tell bootstrap uCode where to find the "Initialize" uCode
 156          *   in host DRAM ... host DRAM physical address bits 35:4 for 4965.
 157          * NOTE:  iwl_init_alive_start() will replace these values,
 158          *        after the "initialize" uCode has run, to point to
 159          *        runtime/protocol instructions and backup data cache.
 160          */
 161         pinst = priv->ucode_init.p_addr >> 4;
 162         pdata = priv->ucode_init_data.p_addr >> 4;
 163         inst_len = priv->ucode_init.len;
 164         data_len = priv->ucode_init_data.len;
 165
 166         ret = iwl_grab_nic_access(priv);
 167         if (ret)
 168                 return ret;
 169
 170         iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
 171         iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
 172         iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
 173         iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
 174
 175         /* Fill BSM memory with bootstrap instructions */
 176         for (reg_offset = BSM_SRAM_LOWER_BOUND;
 177              reg_offset < BSM_SRAM_LOWER_BOUND + len;
 178              reg_offset += sizeof(u32), image++)
 179                 _iwl_write_prph(priv, reg_offset, le32_to_cpu(*image));
 180
 181         ret = iwl4965_verify_bsm(priv);
 182         if (ret) {
 183                 iwl_release_nic_access(priv);
 184                 return ret;
 185         }
 186
 187         /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
 188         iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
 189         iwl_write_prph(priv, BSM_WR_MEM_DST_REG, RTC_INST_LOWER_BOUND);
 190         iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
 191
 192         /* Load bootstrap code into instruction SRAM now,
 193          *   to prepare to load "initialize" uCode */
 194         iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
 195
 196         /* Wait for load of bootstrap uCode to finish */
 197         for (i = 0; i < 100; i++) {
 198                 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
 199                 if (!(done & BSM_WR_CTRL_REG_BIT_START))
 200                         break;
 201                 udelay(10);
 202         }
 203         if (i < 100)
 204                 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
 205         else {
 206                 IWL_ERROR("BSM write did not complete!\n");
 207                 return -EIO;
 208         }
 209
 210         /* Enable future boot loads whenever power management unit triggers it
 211          *   (e.g. when powering back up after power-save shutdown) */
 212         iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
 213
 214         iwl_release_nic_access(priv);
 215
 216         return 0;
 217 }
 218
 219 /**
 220  * iwl4965_set_ucode_ptrs - Set uCode address location
 221  *
 222  * Tell initialization uCode where to find runtime uCode.
 223  *
 224  * BSM registers initially contain pointers to initialization uCode.
 225  * We need to replace them to load runtime uCode inst and data,
 226  * and to save runtime data when powering down.
 227  */
 228 static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
 229 {
 230         dma_addr_t pinst;
 231         dma_addr_t pdata;
 232         unsigned long flags;
 233         int ret = 0;
 234
 235         /* bits 35:4 for 4965 */
 236         pinst = priv->ucode_code.p_addr >> 4;
 237         pdata = priv->ucode_data_backup.p_addr >> 4;
 238
 239         spin_lock_irqsave(&priv->lock, flags);
 240         ret = iwl_grab_nic_access(priv);
 241         if (ret) {
 242                 spin_unlock_irqrestore(&priv->lock, flags);
 243                 return ret;
 244         }
 245
 246         /* Tell bootstrap uCode where to find image to load */
 247         iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
 248         iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
 249         iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
 250                                  priv->ucode_data.len);
 251
 252         /* Inst byte count must be last to set up, bit 31 signals uCode
 253          *   that all new ptr/size info is in place */
 254         iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
 255                                  priv->ucode_code.len | BSM_DRAM_INST_LOAD);
 256         iwl_release_nic_access(priv);
 257
 258         spin_unlock_irqrestore(&priv->lock, flags);
 259
 260         IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
 261
 262         return ret;
 263 }
 264
 265 /**
 266  * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
 267  *
 268  * Called after REPLY_ALIVE notification received from "initialize" uCode.
 269  *
 270  * The 4965 "initialize" ALIVE reply contains calibration data for:
 271  *   Voltage, temperature, and MIMO tx gain correction, now stored in priv
 272  *   (3945 does not contain this data).
 273  *
 274  * Tell "initialize" uCode to go ahead and load the runtime uCode.
 275 */
 276 static void iwl4965_init_alive_start(struct iwl_priv *priv)
 277 {
 278         /* Check alive response for "valid" sign from uCode */
 279         if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
 280                 /* We had an error bringing up the hardware, so take it
 281                  * all the way back down so we can try again */
 282                 IWL_DEBUG_INFO("Initialize Alive failed.\n");
 283                 goto restart;
 284         }
 285
 286         /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
 287          * This is a paranoid check, because we would not have gotten the
 288          * "initialize" alive if code weren't properly loaded.  */
 289         if (iwl_verify_ucode(priv)) {
 290                 /* Runtime instruction load was bad;
 291                  * take it all the way back down so we can try again */
 292                 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
 293                 goto restart;
 294         }
 295
 296         /* Calculate temperature */
 297         priv->temperature = iwl4965_hw_get_temperature(priv);
 298
 299         /* Send pointers to protocol/runtime uCode image ... init code will
 300          * load and launch runtime uCode, which will send us another "Alive"
 301          * notification. */
 302         IWL_DEBUG_INFO("Initialization Alive received.\n");
 303         if (iwl4965_set_ucode_ptrs(priv)) {
 304                 /* Runtime instruction load won't happen;
 305                  * take it all the way back down so we can try again */
 306                 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
 307                 goto restart;
 308         }
 309         return;
 310
 311 restart:
 312         queue_work(priv->workqueue, &priv->restart);
 313 }
 314
 315 static int is_fat_channel(__le32 rxon_flags)
 316 {
 317         return (rxon_flags & RXON_FLG_CHANNEL_MODE_PURE_40_MSK) ||
 318                 (rxon_flags & RXON_FLG_CHANNEL_MODE_MIXED_MSK);
 319 }
 320
 321 /*
 322  * EEPROM handlers
 323  */
 324 static u16 iwl4965_eeprom_calib_version(struct iwl_priv *priv)
 325 {
 326         return iwl_eeprom_query16(priv, EEPROM_4965_CALIB_VERSION_OFFSET);
 327 }
 328
 329 /*
 330  * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask
 331  * must be called under priv->lock and mac access
 332  */
 333 static void iwl4965_txq_set_sched(struct iwl_priv *priv, u32 mask)
 334 {
 335         iwl_write_prph(priv, IWL49_SCD_TXFACT, mask);
 336 }
 337
 338 static int iwl4965_apm_init(struct iwl_priv *priv)
 339 {
 340         int ret = 0;
 341
 342         iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
 343                           CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
 344
 345         /* disable L0s without affecting L1 :don't wait for ICH L0s bug W/A) */
 346         iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
 347                           CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
 348
 349         /* set "initialization complete" bit to move adapter
 350          * D0U* --> D0A* state */
 351         iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 352
 353         /* wait for clock stabilization */
 354         ret = iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
 355                         CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
 356         if (ret < 0) {
 357                 IWL_DEBUG_INFO("Failed to init the card\n");
 358                 goto out;
 359         }
 360
 361         ret = iwl_grab_nic_access(priv);
 362         if (ret)
 363                 goto out;
 364
 365         /* enable DMA */
 366         iwl_write_prph(priv, APMG_CLK_CTRL_REG, APMG_CLK_VAL_DMA_CLK_RQT |
 367                                                 APMG_CLK_VAL_BSM_CLK_RQT);
 368
 369         udelay(20);
 370
 371         /* disable L1-Active */
 372         iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
 373                           APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
 374
 375         iwl_release_nic_access(priv);
 376 out:
 377         return ret;
 378 }
 379
 380
 381 static void iwl4965_nic_config(struct iwl_priv *priv)
 382 {
 383         unsigned long flags;
 384         u32 val;
 385         u16 radio_cfg;
 386         u16 link;
 387
 388         spin_lock_irqsave(&priv->lock, flags);
 389
 390         if ((priv->rev_id & 0x80) == 0x80 && (priv->rev_id & 0x7f) < 8) {
 391                 pci_read_config_dword(priv->pci_dev, PCI_REG_WUM8, &val);
 392                 /* Enable No Snoop field */
 393                 pci_write_config_dword(priv->pci_dev, PCI_REG_WUM8,
 394                                        val & ~(1 << 11));
 395         }
 396
 397         pci_read_config_word(priv->pci_dev, PCI_CFG_LINK_CTRL, &link);
 398
 399         /* L1 is enabled by BIOS */
 400         if ((link & PCI_CFG_LINK_CTRL_VAL_L1_EN) == PCI_CFG_LINK_CTRL_VAL_L1_EN)
 401                 /* disable L0S disabled L1A enabled */
 402                 iwl_set_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
 403         else
 404                 /* L0S enabled L1A disabled */
 405                 iwl_clear_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
 406
 407         radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
 408
 409         /* write radio config values to register */
 410         if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
 411                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 412                             EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
 413                             EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
 414                             EEPROM_RF_CFG_DASH_MSK(radio_cfg));
 415
 416         /* set CSR_HW_CONFIG_REG for uCode use */
 417         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 418                     CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
 419                     CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
 420
 421         priv->calib_info = (struct iwl_eeprom_calib_info *)
 422                 iwl_eeprom_query_addr(priv, EEPROM_4965_CALIB_TXPOWER_OFFSET);
 423
 424         spin_unlock_irqrestore(&priv->lock, flags);
 425 }
 426
 427 static int iwl4965_apm_stop_master(struct iwl_priv *priv)
 428 {
 429         int ret = 0;
 430         unsigned long flags;
 431
 432         spin_lock_irqsave(&priv->lock, flags);
 433
 434         /* set stop master bit */
 435         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
 436
 437         ret = iwl_poll_direct_bit(priv, CSR_RESET,
 438                         CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
 439         if (ret < 0)
 440                 goto out;
 441
 442 out:
 443         spin_unlock_irqrestore(&priv->lock, flags);
 444         IWL_DEBUG_INFO("stop master\n");
 445
 446         return ret;
 447 }
 448
 449 static void iwl4965_apm_stop(struct iwl_priv *priv)
 450 {
 451         unsigned long flags;
 452
 453         iwl4965_apm_stop_master(priv);
 454
 455         spin_lock_irqsave(&priv->lock, flags);
 456
 457         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
 458
 459         udelay(10);
 460         /* clear "init complete"  move adapter D0A* --> D0U state */
 461         iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 462         spin_unlock_irqrestore(&priv->lock, flags);
 463 }
 464
 465 static int iwl4965_apm_reset(struct iwl_priv *priv)
 466 {
 467         int ret = 0;
 468         unsigned long flags;
 469
 470         iwl4965_apm_stop_master(priv);
 471
 472         spin_lock_irqsave(&priv->lock, flags);
 473
 474         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
 475
 476         udelay(10);
 477
 478         /* FIXME: put here L1A -L0S w/a */
 479
 480         iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 481
 482         ret = iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
 483                         CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
 484         if (ret < 0)
 485                 goto out;
 486
 487         udelay(10);
 488
 489         ret = iwl_grab_nic_access(priv);
 490         if (ret)
 491                 goto out;
 492         /* Enable DMA and BSM Clock */
 493         iwl_write_prph(priv, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT |
 494                                               APMG_CLK_VAL_BSM_CLK_RQT);
 495
 496         udelay(10);
 497
 498         /* disable L1A */
 499         iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
 500                           APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
 501
 502         iwl_release_nic_access(priv);
 503
 504         clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
 505         wake_up_interruptible(&priv->wait_command_queue);
 506
 507 out:
 508         spin_unlock_irqrestore(&priv->lock, flags);
 509
 510         return ret;
 511 }
 512
 513 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
 514  * Called after every association, but this runs only once!
 515  *  ... once chain noise is calibrated the first time, it's good forever.  */
 516 static void iwl4965_chain_noise_reset(struct iwl_priv *priv)
 517 {
 518         struct iwl_chain_noise_data *data = &(priv->chain_noise_data);
 519
 520         if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) {
 521                 struct iwl_calib_diff_gain_cmd cmd;
 522
 523                 memset(&cmd, 0, sizeof(cmd));
 524                 cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
 525                 cmd.diff_gain_a = 0;
 526                 cmd.diff_gain_b = 0;
 527                 cmd.diff_gain_c = 0;
 528                 if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
 529                                  sizeof(cmd), &cmd))
 530                         IWL_ERROR("Could not send REPLY_PHY_CALIBRATION_CMD\n");
 531                 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
 532                 IWL_DEBUG_CALIB("Run chain_noise_calibrate\n");
 533         }
 534 }
 535
 536 static void iwl4965_gain_computation(struct iwl_priv *priv,
 537                 u32 *average_noise,
 538                 u16 min_average_noise_antenna_i,
 539                 u32 min_average_noise)
 540 {
 541         int i, ret;
 542         struct iwl_chain_noise_data *data = &priv->chain_noise_data;
 543
 544         data->delta_gain_code[min_average_noise_antenna_i] = 0;
 545
 546         for (i = 0; i < NUM_RX_CHAINS; i++) {
 547                 s32 delta_g = 0;
 548
 549                 if (!(data->disconn_array[i]) &&
 550                     (data->delta_gain_code[i] ==
 551                              CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
 552                         delta_g = average_noise[i] - min_average_noise;
 553                         data->delta_gain_code[i] = (u8)((delta_g * 10) / 15);
 554                         data->delta_gain_code[i] =
 555                                 min(data->delta_gain_code[i],
 556                                 (u8) CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
 557
 558                         data->delta_gain_code[i] =
 559                                 (data->delta_gain_code[i] | (1 << 2));
 560                 } else {
 561                         data->delta_gain_code[i] = 0;
 562                 }
 563         }
 564         IWL_DEBUG_CALIB("delta_gain_codes: a %d b %d c %d\n",
 565                      data->delta_gain_code[0],
 566                      data->delta_gain_code[1],
 567                      data->delta_gain_code[2]);
 568
 569         /* Differential gain gets sent to uCode only once */
 570         if (!data->radio_write) {
 571                 struct iwl_calib_diff_gain_cmd cmd;
 572                 data->radio_write = 1;
 573
 574                 memset(&cmd, 0, sizeof(cmd));
 575                 cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
 576                 cmd.diff_gain_a = data->delta_gain_code[0];
 577                 cmd.diff_gain_b = data->delta_gain_code[1];
 578                 cmd.diff_gain_c = data->delta_gain_code[2];
 579                 ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
 580                                       sizeof(cmd), &cmd);
 581                 if (ret)
 582                         IWL_DEBUG_CALIB("fail sending cmd "
 583                                      "REPLY_PHY_CALIBRATION_CMD \n");
 584
 585                 /* TODO we might want recalculate
 586                  * rx_chain in rxon cmd */
 587
 588                 /* Mark so we run this algo only once! */
 589                 data->state = IWL_CHAIN_NOISE_CALIBRATED;
 590         }
 591         data->chain_noise_a = 0;
 592         data->chain_noise_b = 0;
 593         data->chain_noise_c = 0;
 594         data->chain_signal_a = 0;
 595         data->chain_signal_b = 0;
 596         data->chain_signal_c = 0;
 597         data->beacon_count = 0;
 598 }
 599
 600 static void iwl4965_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
 601                         __le32 *tx_flags)
 602 {
 603         if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
 604                 *tx_flags |= TX_CMD_FLG_RTS_MSK;
 605                 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
 606         } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
 607                 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
 608                 *tx_flags |= TX_CMD_FLG_CTS_MSK;
 609         }
 610 }
 611
 612 static void iwl4965_bg_txpower_work(struct work_struct *work)
 613 {
 614         struct iwl_priv *priv = container_of(work, struct iwl_priv,
 615                         txpower_work);
 616
 617         /* If a scan happened to start before we got here
 618          * then just return; the statistics notification will
 619          * kick off another scheduled work to compensate for
 620          * any temperature delta we missed here. */
 621         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
 622             test_bit(STATUS_SCANNING, &priv->status))
 623                 return;
 624
 625         mutex_lock(&priv->mutex);
 626
 627         /* Regardless of if we are associated, we must reconfigure the
 628          * TX power since frames can be sent on non-radar channels while
 629          * not associated */
 630         iwl4965_send_tx_power(priv);
 631
 632         /* Update last_temperature to keep is_calib_needed from running
 633          * when it isn't needed... */
 634         priv->last_temperature = priv->temperature;
 635
 636         mutex_unlock(&priv->mutex);
 637 }
 638
 639 /*
 640  * Acquire priv->lock before calling this function !
 641  */
 642 static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
 643 {
 644         iwl_write_direct32(priv, HBUS_TARG_WRPTR,
 645                              (index & 0xff) | (txq_id << 8));
 646         iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(txq_id), index);
 647 }
 648
 649 /**
 650  * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
 651  * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
 652  * @scd_retry: (1) Indicates queue will be used in aggregation mode
 653  *
 654  * NOTE:  Acquire priv->lock before calling this function !
 655  */
 656 static void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
 657                                         struct iwl_tx_queue *txq,
 658                                         int tx_fifo_id, int scd_retry)
 659 {
 660         int txq_id = txq->q.id;
 661
 662         /* Find out whether to activate Tx queue */
 663         int active = test_bit(txq_id, &priv->txq_ctx_active_msk) ? 1 : 0;
 664
 665         /* Set up and activate */
 666         iwl_write_prph(priv, IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
 667                          (active << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
 668                          (tx_fifo_id << IWL49_SCD_QUEUE_STTS_REG_POS_TXF) |
 669                          (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_WSL) |
 670                          (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
 671                          IWL49_SCD_QUEUE_STTS_REG_MSK);
 672
 673         txq->sched_retry = scd_retry;
 674
 675         IWL_DEBUG_INFO("%s %s Queue %d on AC %d\n",
 676                        active ? "Activate" : "Deactivate",
 677                        scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
 678 }
 679
 680 static const u16 default_queue_to_tx_fifo[] = {
 681         IWL_TX_FIFO_AC3,
 682         IWL_TX_FIFO_AC2,
 683         IWL_TX_FIFO_AC1,
 684         IWL_TX_FIFO_AC0,
 685         IWL49_CMD_FIFO_NUM,
 686         IWL_TX_FIFO_HCCA_1,
 687         IWL_TX_FIFO_HCCA_2
 688 };
 689
 690 static int iwl4965_alive_notify(struct iwl_priv *priv)
 691 {
 692         u32 a;
 693         unsigned long flags;
 694         int ret;
 695         int i, chan;
 696         u32 reg_val;
 697
 698         spin_lock_irqsave(&priv->lock, flags);
 699
 700         ret = iwl_grab_nic_access(priv);
 701         if (ret) {
 702                 spin_unlock_irqrestore(&priv->lock, flags);
 703                 return ret;
 704         }
 705
 706         /* Clear 4965's internal Tx Scheduler data base */
 707         priv->scd_base_addr = iwl_read_prph(priv, IWL49_SCD_SRAM_BASE_ADDR);
 708         a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET;
 709         for (; a < priv->scd_base_addr + IWL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
 710                 iwl_write_targ_mem(priv, a, 0);
 711         for (; a < priv->scd_base_addr + IWL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
 712                 iwl_write_targ_mem(priv, a, 0);
 713         for (; a < sizeof(u16) * priv->hw_params.max_txq_num; a += 4)
 714                 iwl_write_targ_mem(priv, a, 0);
 715
 716         /* Tel 4965 where to find Tx byte count tables */
 717         iwl_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR,
 718                         priv->scd_bc_tbls.dma >> 10);
 719
 720         /* Enable DMA channel */
 721         for (chan = 0; chan < FH49_TCSR_CHNL_NUM ; chan++)
 722                 iwl_write_direct32(priv, FH_TCSR_CHNL_TX_CONFIG_REG(chan),
 723                                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
 724                                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE);
 725
 726         /* Update FH chicken bits */
 727         reg_val = iwl_read_direct32(priv, FH_TX_CHICKEN_BITS_REG);
 728         iwl_write_direct32(priv, FH_TX_CHICKEN_BITS_REG,
 729                            reg_val | FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN);
 730
 731         /* Disable chain mode for all queues */
 732         iwl_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0);
 733
 734         /* Initialize each Tx queue (including the command queue) */
 735         for (i = 0; i < priv->hw_params.max_txq_num; i++) {
 736
 737                 /* TFD circular buffer read/write indexes */
 738                 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(i), 0);
 739                 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
 740
 741                 /* Max Tx Window size for Scheduler-ACK mode */
 742                 iwl_write_targ_mem(priv, priv->scd_base_addr +
 743                                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i),
 744                                 (SCD_WIN_SIZE <<
 745                                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
 746                                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
 747
 748                 /* Frame limit */
 749                 iwl_write_targ_mem(priv, priv->scd_base_addr +
 750                                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
 751                                 sizeof(u32),
 752                                 (SCD_FRAME_LIMIT <<
 753                                 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
 754                                 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
 755
 756         }
 757         iwl_write_prph(priv, IWL49_SCD_INTERRUPT_MASK,
 758                                  (1 << priv->hw_params.max_txq_num) - 1);
 759
 760         /* Activate all Tx DMA/FIFO channels */
 761         priv->cfg->ops->lib->txq_set_sched(priv, IWL_MASK(0, 6));
 762
 763         iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
 764
 765         /* Map each Tx/cmd queue to its corresponding fifo */
 766         for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
 767                 int ac = default_queue_to_tx_fifo[i];
 768                 iwl_txq_ctx_activate(priv, i);
 769                 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
 770         }
 771
 772         iwl_release_nic_access(priv);
 773         spin_unlock_irqrestore(&priv->lock, flags);
 774
 775         return ret;
 776 }
 777
 778 static struct iwl_sensitivity_ranges iwl4965_sensitivity = {
 779         .min_nrg_cck = 97,
 780         .max_nrg_cck = 0,
 781
 782         .auto_corr_min_ofdm = 85,
 783         .auto_corr_min_ofdm_mrc = 170,
 784         .auto_corr_min_ofdm_x1 = 105,
 785         .auto_corr_min_ofdm_mrc_x1 = 220,
 786
 787         .auto_corr_max_ofdm = 120,
 788         .auto_corr_max_ofdm_mrc = 210,
 789         .auto_corr_max_ofdm_x1 = 140,
 790         .auto_corr_max_ofdm_mrc_x1 = 270,
 791
 792         .auto_corr_min_cck = 125,
 793         .auto_corr_max_cck = 200,
 794         .auto_corr_min_cck_mrc = 200,
 795         .auto_corr_max_cck_mrc = 400,
 796
 797         .nrg_th_cck = 100,
 798         .nrg_th_ofdm = 100,
 799 };
 800
 801 /**
 802  * iwl4965_hw_set_hw_params
 803  *
 804  * Called when initializing driver
 805  */
 806 static int iwl4965_hw_set_hw_params(struct iwl_priv *priv)
 807 {
 808
 809         if ((priv->cfg->mod_params->num_of_queues > IWL49_NUM_QUEUES) ||
 810             (priv->cfg->mod_params->num_of_queues < IWL_MIN_NUM_QUEUES)) {
 811                 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
 812                           IWL_MIN_NUM_QUEUES, IWL49_NUM_QUEUES);
 813                 return -EINVAL;
 814         }
 815
 816         priv->hw_params.max_txq_num = priv->cfg->mod_params->num_of_queues;
 817         priv->hw_params.dma_chnl_num = FH49_TCSR_CHNL_NUM;
 818         priv->hw_params.scd_bc_tbls_size =
 819                         IWL49_NUM_QUEUES * sizeof(struct iwl4965_scd_bc_tbl);
 820         priv->hw_params.max_stations = IWL4965_STATION_COUNT;
 821         priv->hw_params.bcast_sta_id = IWL4965_BROADCAST_ID;
 822         priv->hw_params.max_data_size = IWL49_RTC_DATA_SIZE;
 823         priv->hw_params.max_inst_size = IWL49_RTC_INST_SIZE;
 824         priv->hw_params.max_bsm_size = BSM_SRAM_SIZE;
 825         priv->hw_params.fat_channel = BIT(IEEE80211_BAND_5GHZ);
 826
 827         priv->hw_params.tx_chains_num = 2;
 828         priv->hw_params.rx_chains_num = 2;
 829         priv->hw_params.valid_tx_ant = ANT_A | ANT_B;
 830         priv->hw_params.valid_rx_ant = ANT_A | ANT_B;
 831         priv->hw_params.ct_kill_threshold = CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD);
 832
 833         priv->hw_params.sens = &iwl4965_sensitivity;
 834
 835         return 0;
 836 }
 837
 838 static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
 839 {
 840         s32 sign = 1;
 841
 842         if (num < 0) {
 843                 sign = -sign;
 844                 num = -num;
 845         }
 846         if (denom < 0) {
 847                 sign = -sign;
 848                 denom = -denom;
 849         }
 850         *res = 1;
 851         *res = ((num * 2 + denom) / (denom * 2)) * sign;
 852
 853         return 1;
 854 }
 855
 856 /**
 857  * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
 858  *
 859  * Determines power supply voltage compensation for txpower calculations.
 860  * Returns number of 1/2-dB steps to subtract from gain table index,
 861  * to compensate for difference between power supply voltage during
 862  * factory measurements, vs. current power supply voltage.
 863  *
 864  * Voltage indication is higher for lower voltage.
 865  * Lower voltage requires more gain (lower gain table index).
 866  */
 867 static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
 868                                             s32 current_voltage)
 869 {
 870         s32 comp = 0;
 871
 872         if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
 873             (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
 874                 return 0;
 875
 876         iwl4965_math_div_round(current_voltage - eeprom_voltage,
 877                                TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
 878
 879         if (current_voltage > eeprom_voltage)
 880                 comp *= 2;
 881         if ((comp < -2) || (comp > 2))
 882                 comp = 0;
 883
 884         return comp;
 885 }
 886
 887 static s32 iwl4965_get_tx_atten_grp(u16 channel)
 888 {
 889         if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
 890             channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
 891                 return CALIB_CH_GROUP_5;
 892
 893         if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
 894             channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
 895                 return CALIB_CH_GROUP_1;
 896
 897         if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
 898             channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
 899                 return CALIB_CH_GROUP_2;
 900
 901         if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
 902             channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
 903                 return CALIB_CH_GROUP_3;
 904
 905         if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
 906             channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
 907                 return CALIB_CH_GROUP_4;
 908
 909         IWL_ERROR("Can't find txatten group for channel %d.\n", channel);
 910         return -1;
 911 }
 912
 913 static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel)
 914 {
 915         s32 b = -1;
 916
 917         for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
 918                 if (priv->calib_info->band_info[b].ch_from == 0)
 919                         continue;
 920
 921                 if ((channel >= priv->calib_info->band_info[b].ch_from)
 922                     && (channel <= priv->calib_info->band_info[b].ch_to))
 923                         break;
 924         }
 925
 926         return b;
 927 }
 928
 929 static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
 930 {
 931         s32 val;
 932
 933         if (x2 == x1)
 934                 return y1;
 935         else {
 936                 iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
 937                 return val + y2;
 938         }
 939 }
 940
 941 /**
 942  * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
 943  *
 944  * Interpolates factory measurements from the two sample channels within a
 945  * sub-band, to apply to channel of interest.  Interpolation is proportional to
 946  * differences in channel frequencies, which is proportional to differences
 947  * in channel number.
 948  */
 949 static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel,
 950                                     struct iwl_eeprom_calib_ch_info *chan_info)
 951 {
 952         s32 s = -1;
 953         u32 c;
 954         u32 m;
 955         const struct iwl_eeprom_calib_measure *m1;
 956         const struct iwl_eeprom_calib_measure *m2;
 957         struct iwl_eeprom_calib_measure *omeas;
 958         u32 ch_i1;
 959         u32 ch_i2;
 960
 961         s = iwl4965_get_sub_band(priv, channel);
 962         if (s >= EEPROM_TX_POWER_BANDS) {
 963                 IWL_ERROR("Tx Power can not find channel %d\n", channel);
 964                 return -1;
 965         }
 966
 967         ch_i1 = priv->calib_info->band_info[s].ch1.ch_num;
 968         ch_i2 = priv->calib_info->band_info[s].ch2.ch_num;
 969         chan_info->ch_num = (u8) channel;
 970
 971         IWL_DEBUG_TXPOWER("channel %d subband %d factory cal ch %d & %d\n",
 972                           channel, s, ch_i1, ch_i2);
 973
 974         for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
 975                 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
 976                         m1 = &(priv->calib_info->band_info[s].ch1.
 977                                measurements[c][m]);
 978                         m2 = &(priv->calib_info->band_info[s].ch2.
 979                                measurements[c][m]);
 980                         omeas = &(chan_info->measurements[c][m]);
 981
 982                         omeas->actual_pow =
 983                             (u8) iwl4965_interpolate_value(channel, ch_i1,
 984                                                            m1->actual_pow,
 985                                                            ch_i2,
 986                                                            m2->actual_pow);
 987                         omeas->gain_idx =
 988                             (u8) iwl4965_interpolate_value(channel, ch_i1,
 989                                                            m1->gain_idx, ch_i2,
 990                                                            m2->gain_idx);
 991                         omeas->temperature =
 992                             (u8) iwl4965_interpolate_value(channel, ch_i1,
 993                                                            m1->temperature,
 994                                                            ch_i2,
 995                                                            m2->temperature);
 996                         omeas->pa_det =
 997                             (s8) iwl4965_interpolate_value(channel, ch_i1,
 998                                                            m1->pa_det, ch_i2,
 999                                                            m2->pa_det);
1000
1001                         IWL_DEBUG_TXPOWER
1002                             ("chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
1003                              m1->actual_pow, m2->actual_pow, omeas->actual_pow);
1004                         IWL_DEBUG_TXPOWER
1005                             ("chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
1006                              m1->gain_idx, m2->gain_idx, omeas->gain_idx);
1007                         IWL_DEBUG_TXPOWER
1008                             ("chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
1009                              m1->pa_det, m2->pa_det, omeas->pa_det);
1010                         IWL_DEBUG_TXPOWER
1011                             ("chain %d meas %d  T1=%d  T2=%d  T=%d\n", c, m,
1012                              m1->temperature, m2->temperature,
1013                              omeas->temperature);
1014                 }
1015         }
1016
1017         return 0;
1018 }
1019
1020 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
1021  * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
1022 static s32 back_off_table[] = {
1023         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
1024         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
1025         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
1026         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
1027         10                      /* CCK */
1028 };
1029
1030 /* Thermal compensation values for txpower for various frequency ranges ...
1031  *   ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
1032 static struct iwl4965_txpower_comp_entry {
1033         s32 degrees_per_05db_a;
1034         s32 degrees_per_05db_a_denom;
1035 } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
1036         {9, 2},                 /* group 0 5.2, ch  34-43 */
1037         {4, 1},                 /* group 1 5.2, ch  44-70 */
1038         {4, 1},                 /* group 2 5.2, ch  71-124 */
1039         {4, 1},                 /* group 3 5.2, ch 125-200 */
1040         {3, 1}                  /* group 4 2.4, ch   all */
1041 };
1042
1043 static s32 get_min_power_index(s32 rate_power_index, u32 band)
1044 {
1045         if (!band) {
1046                 if ((rate_power_index & 7) <= 4)
1047                         return MIN_TX_GAIN_INDEX_52GHZ_EXT;
1048         }
1049         return MIN_TX_GAIN_INDEX;
1050 }
1051
1052 struct gain_entry {
1053         u8 dsp;
1054         u8 radio;
1055 };
1056
1057 static const struct gain_entry gain_table[2][108] = {
1058         /* 5.2GHz power gain index table */
1059         {
1060          {123, 0x3F},           /* highest txpower */
1061          {117, 0x3F},
1062          {110, 0x3F},
1063          {104, 0x3F},
1064          {98, 0x3F},
1065          {110, 0x3E},
1066          {104, 0x3E},
1067          {98, 0x3E},
1068          {110, 0x3D},
1069          {104, 0x3D},
1070          {98, 0x3D},
1071          {110, 0x3C},
1072          {104, 0x3C},
1073          {98, 0x3C},
1074          {110, 0x3B},
1075          {104, 0x3B},
1076          {98, 0x3B},
1077          {110, 0x3A},
1078          {104, 0x3A},
1079          {98, 0x3A},
1080          {110, 0x39},
1081          {104, 0x39},
1082          {98, 0x39},
1083          {110, 0x38},
1084          {104, 0x38},
1085          {98, 0x38},
1086          {110, 0x37},
1087          {104, 0x37},
1088          {98, 0x37},
1089          {110, 0x36},
1090          {104, 0x36},
1091          {98, 0x36},
1092          {110, 0x35},
1093          {104, 0x35},
1094          {98, 0x35},
1095          {110, 0x34},
1096          {104, 0x34},
1097          {98, 0x34},
1098          {110, 0x33},
1099          {104, 0x33},
1100          {98, 0x33},
1101          {110, 0x32},
1102          {104, 0x32},
1103          {98, 0x32},
1104          {110, 0x31},
1105          {104, 0x31},
1106          {98, 0x31},
1107          {110, 0x30},
1108          {104, 0x30},
1109          {98, 0x30},
1110          {110, 0x25},
1111          {104, 0x25},
1112          {98, 0x25},
1113          {110, 0x24},
1114          {104, 0x24},
1115          {98, 0x24},
1116          {110, 0x23},
1117          {104, 0x23},
1118          {98, 0x23},
1119          {110, 0x22},
1120          {104, 0x18},
1121          {98, 0x18},
1122          {110, 0x17},
1123          {104, 0x17},
1124          {98, 0x17},
1125          {110, 0x16},
1126          {104, 0x16},
1127          {98, 0x16},
1128          {110, 0x15},
1129          {104, 0x15},
1130          {98, 0x15},
1131          {110, 0x14},
1132          {104, 0x14},
1133          {98, 0x14},
1134          {110, 0x13},
1135          {104, 0x13},
1136          {98, 0x13},
1137          {110, 0x12},
1138          {104, 0x08},
1139          {98, 0x08},
1140          {110, 0x07},
1141          {104, 0x07},
1142          {98, 0x07},
1143          {110, 0x06},
1144          {104, 0x06},
1145          {98, 0x06},
1146          {110, 0x05},
1147          {104, 0x05},
1148          {98, 0x05},
1149          {110, 0x04},
1150          {104, 0x04},
1151          {98, 0x04},
1152          {110, 0x03},
1153          {104, 0x03},
1154          {98, 0x03},
1155          {110, 0x02},
1156          {104, 0x02},
1157          {98, 0x02},
1158          {110, 0x01},
1159          {104, 0x01},
1160          {98, 0x01},
1161          {110, 0x00},
1162          {104, 0x00},
1163          {98, 0x00},
1164          {93, 0x00},
1165          {88, 0x00},
1166          {83, 0x00},
1167          {78, 0x00},
1168          },
1169         /* 2.4GHz power gain index table */
1170         {
1171          {110, 0x3f},           /* highest txpower */
1172          {104, 0x3f},
1173          {98, 0x3f},
1174          {110, 0x3e},
1175          {104, 0x3e},
1176          {98, 0x3e},
1177          {110, 0x3d},
1178          {104, 0x3d},
1179          {98, 0x3d},
1180          {110, 0x3c},
1181          {104, 0x3c},
1182          {98, 0x3c},
1183          {110, 0x3b},
1184          {104, 0x3b},
1185          {98, 0x3b},
1186          {110, 0x3a},
1187          {104, 0x3a},
1188          {98, 0x3a},
1189          {110, 0x39},
1190          {104, 0x39},
1191          {98, 0x39},
1192          {110, 0x38},
1193          {104, 0x38},
1194          {98, 0x38},
1195          {110, 0x37},
1196          {104, 0x37},
1197          {98, 0x37},
1198          {110, 0x36},
1199          {104, 0x36},
1200          {98, 0x36},
1201          {110, 0x35},
1202          {104, 0x35},
1203          {98, 0x35},
1204          {110, 0x34},
1205          {104, 0x34},
1206          {98, 0x34},
1207          {110, 0x33},
1208          {104, 0x33},
1209          {98, 0x33},
1210          {110, 0x32},
1211          {104, 0x32},
1212          {98, 0x32},
1213          {110, 0x31},
1214          {104, 0x31},
1215          {98, 0x31},
1216          {110, 0x30},
1217          {104, 0x30},
1218          {98, 0x30},
1219          {110, 0x6},
1220          {104, 0x6},
1221          {98, 0x6},
1222          {110, 0x5},
1223          {104, 0x5},
1224          {98, 0x5},
1225          {110, 0x4},
1226          {104, 0x4},
1227          {98, 0x4},
1228          {110, 0x3},
1229          {104, 0x3},
1230          {98, 0x3},
1231          {110, 0x2},
1232          {104, 0x2},
1233          {98, 0x2},
1234          {110, 0x1},
1235          {104, 0x1},
1236          {98, 0x1},
1237          {110, 0x0},
1238          {104, 0x0},
1239          {98, 0x0},
1240          {97, 0},
1241          {96, 0},
1242          {95, 0},
1243          {94, 0},
1244          {93, 0},
1245          {92, 0},
1246          {91, 0},
1247          {90, 0},
1248          {89, 0},
1249          {88, 0},
1250          {87, 0},
1251          {86, 0},
1252          {85, 0},
1253          {84, 0},
1254          {83, 0},
1255          {82, 0},
1256          {81, 0},
1257          {80, 0},
1258          {79, 0},
1259          {78, 0},
1260          {77, 0},
1261          {76, 0},
1262          {75, 0},
1263          {74, 0},
1264          {73, 0},
1265          {72, 0},
1266          {71, 0},
1267          {70, 0},
1268          {69, 0},
1269          {68, 0},
1270          {67, 0},
1271          {66, 0},
1272          {65, 0},
1273          {64, 0},
1274          {63, 0},
1275          {62, 0},
1276          {61, 0},
1277          {60, 0},
1278          {59, 0},
1279          }
1280 };
1281
1282 static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
1283                                     u8 is_fat, u8 ctrl_chan_high,
1284                                     struct iwl4965_tx_power_db *tx_power_tbl)
1285 {
1286         u8 saturation_power;
1287         s32 target_power;
1288         s32 user_target_power;
1289         s32 power_limit;
1290         s32 current_temp;
1291         s32 reg_limit;
1292         s32 current_regulatory;
1293         s32 txatten_grp = CALIB_CH_GROUP_MAX;
1294         int i;
1295         int c;
1296         const struct iwl_channel_info *ch_info = NULL;
1297         struct iwl_eeprom_calib_ch_info ch_eeprom_info;
1298         const struct iwl_eeprom_calib_measure *measurement;
1299         s16 voltage;
1300         s32 init_voltage;
1301         s32 voltage_compensation;
1302         s32 degrees_per_05db_num;
1303         s32 degrees_per_05db_denom;
1304         s32 factory_temp;
1305         s32 temperature_comp[2];
1306         s32 factory_gain_index[2];
1307         s32 factory_actual_pwr[2];
1308         s32 power_index;
1309
1310         /* user_txpower_limit is in dBm, convert to half-dBm (half-dB units
1311          *   are used for indexing into txpower table) */
1312         user_target_power = 2 * priv->tx_power_user_lmt;
1313
1314         /* Get current (RXON) channel, band, width */
1315         IWL_DEBUG_TXPOWER("chan %d band %d is_fat %d\n", channel, band,
1316                           is_fat);
1317
1318         ch_info = iwl_get_channel_info(priv, priv->band, channel);
1319
1320         if (!is_channel_valid(ch_info))
1321                 return -EINVAL;
1322
1323         /* get txatten group, used to select 1) thermal txpower adjustment
1324          *   and 2) mimo txpower balance between Tx chains. */
1325         txatten_grp = iwl4965_get_tx_atten_grp(channel);
1326         if (txatten_grp < 0)
1327                 return -EINVAL;
1328
1329         IWL_DEBUG_TXPOWER("channel %d belongs to txatten group %d\n",
1330                           channel, txatten_grp);
1331
1332         if (is_fat) {
1333                 if (ctrl_chan_high)
1334                         channel -= 2;
1335                 else
1336                         channel += 2;
1337         }
1338
1339         /* hardware txpower limits ...
1340          * saturation (clipping distortion) txpowers are in half-dBm */
1341         if (band)
1342                 saturation_power = priv->calib_info->saturation_power24;
1343         else
1344                 saturation_power = priv->calib_info->saturation_power52;
1345
1346         if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
1347             saturation_power > IWL_TX_POWER_SATURATION_MAX) {
1348                 if (band)
1349                         saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
1350                 else
1351                         saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
1352         }
1353
1354         /* regulatory txpower limits ... reg_limit values are in half-dBm,
1355          *   max_power_avg values are in dBm, convert * 2 */
1356         if (is_fat)
1357                 reg_limit = ch_info->fat_max_power_avg * 2;
1358         else
1359                 reg_limit = ch_info->max_power_avg * 2;
1360
1361         if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
1362             (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
1363                 if (band)
1364                         reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
1365                 else
1366                         reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
1367         }
1368
1369         /* Interpolate txpower calibration values for this channel,
1370          *   based on factory calibration tests on spaced channels. */
1371         iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
1372
1373         /* calculate tx gain adjustment based on power supply voltage */
1374         voltage = priv->calib_info->voltage;
1375         init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
1376         voltage_compensation =
1377             iwl4965_get_voltage_compensation(voltage, init_voltage);
1378
1379         IWL_DEBUG_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n",
1380                           init_voltage,
1381                           voltage, voltage_compensation);
1382
1383         /* get current temperature (Celsius) */
1384         current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
1385         current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
1386         current_temp = KELVIN_TO_CELSIUS(current_temp);
1387
1388         /* select thermal txpower adjustment params, based on channel group
1389          *   (same frequency group used for mimo txatten adjustment) */
1390         degrees_per_05db_num =
1391             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
1392         degrees_per_05db_denom =
1393             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
1394
1395         /* get per-chain txpower values from factory measurements */
1396         for (c = 0; c < 2; c++) {
1397                 measurement = &ch_eeprom_info.measurements[c][1];
1398
1399                 /* txgain adjustment (in half-dB steps) based on difference
1400                  *   between factory and current temperature */
1401                 factory_temp = measurement->temperature;
1402                 iwl4965_math_div_round((current_temp - factory_temp) *
1403                                        degrees_per_05db_denom,
1404                                        degrees_per_05db_num,
1405                                        &temperature_comp[c]);
1406
1407                 factory_gain_index[c] = measurement->gain_idx;
1408                 factory_actual_pwr[c] = measurement->actual_pow;
1409
1410                 IWL_DEBUG_TXPOWER("chain = %d\n", c);
1411                 IWL_DEBUG_TXPOWER("fctry tmp %d, "
1412                                   "curr tmp %d, comp %d steps\n",
1413                                   factory_temp, current_temp,
1414                                   temperature_comp[c]);
1415
1416                 IWL_DEBUG_TXPOWER("fctry idx %d, fctry pwr %d\n",
1417                                   factory_gain_index[c],
1418                                   factory_actual_pwr[c]);
1419         }
1420
1421         /* for each of 33 bit-rates (including 1 for CCK) */
1422         for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
1423                 u8 is_mimo_rate;
1424                 union iwl4965_tx_power_dual_stream tx_power;
1425
1426                 /* for mimo, reduce each chain's txpower by half
1427                  * (3dB, 6 steps), so total output power is regulatory
1428                  * compliant. */
1429                 if (i & 0x8) {
1430                         current_regulatory = reg_limit -
1431                             IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
1432                         is_mimo_rate = 1;
1433                 } else {
1434                         current_regulatory = reg_limit;
1435                         is_mimo_rate = 0;
1436                 }
1437
1438                 /* find txpower limit, either hardware or regulatory */
1439                 power_limit = saturation_power - back_off_table[i];
1440                 if (power_limit > current_regulatory)
1441                         power_limit = current_regulatory;
1442
1443                 /* reduce user's txpower request if necessary
1444                  * for this rate on this channel */
1445                 target_power = user_target_power;
1446                 if (target_power > power_limit)
1447                         target_power = power_limit;
1448
1449                 IWL_DEBUG_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n",
1450                                   i, saturation_power - back_off_table[i],
1451                                   current_regulatory, user_target_power,
1452                                   target_power);
1453
1454                 /* for each of 2 Tx chains (radio transmitters) */
1455                 for (c = 0; c < 2; c++) {
1456                         s32 atten_value;
1457
1458                         if (is_mimo_rate)
1459                                 atten_value =
1460                                     (s32)le32_to_cpu(priv->card_alive_init.
1461                                     tx_atten[txatten_grp][c]);
1462                         else
1463                                 atten_value = 0;
1464
1465                         /* calculate index; higher index means lower txpower */
1466                         power_index = (u8) (factory_gain_index[c] -
1467                                             (target_power -
1468                                              factory_actual_pwr[c]) -
1469                                             temperature_comp[c] -
1470                                             voltage_compensation +
1471                                             atten_value);
1472
1473 /*                      IWL_DEBUG_TXPOWER("calculated txpower index %d\n",
1474                                                 power_index); */
1475
1476                         if (power_index < get_min_power_index(i, band))
1477                                 power_index = get_min_power_index(i, band);
1478
1479                         /* adjust 5 GHz index to support negative indexes */
1480                         if (!band)
1481                                 power_index += 9;
1482
1483                         /* CCK, rate 32, reduce txpower for CCK */
1484                         if (i == POWER_TABLE_CCK_ENTRY)
1485                                 power_index +=
1486                                     IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
1487
1488                         /* stay within the table! */
1489                         if (power_index > 107) {
1490                                 IWL_WARNING("txpower index %d > 107\n",
1491                                             power_index);
1492                                 power_index = 107;
1493                         }
1494                         if (power_index < 0) {
1495                                 IWL_WARNING("txpower index %d < 0\n",
1496                                             power_index);
1497                                 power_index = 0;
1498                         }
1499
1500                         /* fill txpower command for this rate/chain */
1501                         tx_power.s.radio_tx_gain[c] =
1502                                 gain_table[band][power_index].radio;
1503                         tx_power.s.dsp_predis_atten[c] =
1504                                 gain_table[band][power_index].dsp;
1505
1506                         IWL_DEBUG_TXPOWER("chain %d mimo %d index %d "
1507                                           "gain 0x%02x dsp %d\n",
1508                                           c, atten_value, power_index,
1509                                         tx_power.s.radio_tx_gain[c],
1510                                         tx_power.s.dsp_predis_atten[c]);
1511                 } /* for each chain */
1512
1513                 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
1514
1515         } /* for each rate */
1516
1517         return 0;
1518 }
1519
1520 /**
1521  * iwl4965_send_tx_power - Configure the TXPOWER level user limit
1522  *
1523  * Uses the active RXON for channel, band, and characteristics (fat, high)
1524  * The power limit is taken from priv->tx_power_user_lmt.
1525  */
1526 static int iwl4965_send_tx_power(struct iwl_priv *priv)
1527 {
1528         struct iwl4965_txpowertable_cmd cmd = { 0 };
1529         int ret;
1530         u8 band = 0;
1531         u8 is_fat = 0;
1532         u8 ctrl_chan_high = 0;
1533
1534         if (test_bit(STATUS_SCANNING, &priv->status)) {
1535                 /* If this gets hit a lot, switch it to a BUG() and catch
1536                  * the stack trace to find out who is calling this during
1537                  * a scan. */
1538                 IWL_WARNING("TX Power requested while scanning!\n");
1539                 return -EAGAIN;
1540         }
1541
1542         band = priv->band == IEEE80211_BAND_2GHZ;
1543
1544         is_fat =  is_fat_channel(priv->active_rxon.flags);
1545
1546         if (is_fat &&
1547             (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1548                 ctrl_chan_high = 1;
1549
1550         cmd.band = band;
1551         cmd.channel = priv->active_rxon.channel;
1552
1553         ret = iwl4965_fill_txpower_tbl(priv, band,
1554                                 le16_to_cpu(priv->active_rxon.channel),
1555                                 is_fat, ctrl_chan_high, &cmd.tx_power);
1556         if (ret)
1557                 goto out;
1558
1559         ret = iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
1560
1561 out:
1562         return ret;
1563 }
1564
1565 static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
1566 {
1567         int ret = 0;
1568         struct iwl4965_rxon_assoc_cmd rxon_assoc;
1569         const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
1570         const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
1571
1572         if ((rxon1->flags == rxon2->flags) &&
1573             (rxon1->filter_flags == rxon2->filter_flags) &&
1574             (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1575             (rxon1->ofdm_ht_single_stream_basic_rates ==
1576              rxon2->ofdm_ht_single_stream_basic_rates) &&
1577             (rxon1->ofdm_ht_dual_stream_basic_rates ==
1578              rxon2->ofdm_ht_dual_stream_basic_rates) &&
1579             (rxon1->rx_chain == rxon2->rx_chain) &&
1580             (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1581                 IWL_DEBUG_INFO("Using current RXON_ASSOC.  Not resending.\n");
1582                 return 0;
1583         }
1584
1585         rxon_assoc.flags = priv->staging_rxon.flags;
1586         rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1587         rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1588         rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1589         rxon_assoc.reserved = 0;
1590         rxon_assoc.ofdm_ht_single_stream_basic_rates =
1591             priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1592         rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1593             priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1594         rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1595
1596         ret = iwl_send_cmd_pdu_async(priv, REPLY_RXON_ASSOC,
1597                                      sizeof(rxon_assoc), &rxon_assoc, NULL);
1598         if (ret)
1599                 return ret;
1600
1601         return ret;
1602 }
1603
1604 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
1605 static int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel)
1606 {
1607         int rc;
1608         u8 band = 0;
1609         u8 is_fat = 0;
1610         u8 ctrl_chan_high = 0;
1611         struct iwl4965_channel_switch_cmd cmd = { 0 };
1612         const struct iwl_channel_info *ch_info;
1613
1614         band = priv->band == IEEE80211_BAND_2GHZ;
1615
1616         ch_info = iwl_get_channel_info(priv, priv->band, channel);
1617
1618         is_fat = is_fat_channel(priv->staging_rxon.flags);
1619
1620         if (is_fat &&
1621             (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1622                 ctrl_chan_high = 1;
1623
1624         cmd.band = band;
1625         cmd.expect_beacon = 0;
1626         cmd.channel = cpu_to_le16(channel);
1627         cmd.rxon_flags = priv->active_rxon.flags;
1628         cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
1629         cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
1630         if (ch_info)
1631                 cmd.expect_beacon = is_channel_radar(ch_info);
1632         else
1633                 cmd.expect_beacon = 1;
1634
1635         rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_fat,
1636                                       ctrl_chan_high, &cmd.tx_power);
1637         if (rc) {
1638                 IWL_DEBUG_11H("error:%d  fill txpower_tbl\n", rc);
1639                 return rc;
1640         }
1641
1642         rc = iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
1643         return rc;
1644 }
1645 #endif
1646
1647 /**
1648  * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
1649  */
1650 static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
1651                                             struct iwl_tx_queue *txq,
1652                                             u16 byte_cnt)
1653 {
1654         struct iwl4965_scd_bc_tbl *scd_bc_tbl = priv->scd_bc_tbls.addr;
1655         int txq_id = txq->q.id;
1656         int write_ptr = txq->q.write_ptr;
1657         int len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
1658         __le16 bc_ent;
1659
1660         WARN_ON(len > 0xFFF || write_ptr >= TFD_QUEUE_SIZE_MAX);
1661
1662         bc_ent = cpu_to_le16(len & 0xFFF);
1663         /* Set up byte count within first 256 entries */
1664         scd_bc_tbl[txq_id].tfd_offset[write_ptr] = bc_ent;
1665
1666         /* If within first 64 entries, duplicate at end */
1667         if (write_ptr < TFD_QUEUE_SIZE_BC_DUP)
1668                 scd_bc_tbl[txq_id].
1669                         tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] = bc_ent;
1670 }
1671
1672 /**
1673  * sign_extend - Sign extend a value using specified bit as sign-bit
1674  *
1675  * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
1676  * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
1677  *
1678  * @param oper value to sign extend
1679  * @param index 0 based bit index (0<=index<32) to sign bit
1680  */
1681 static s32 sign_extend(u32 oper, int index)
1682 {
1683         u8 shift = 31 - index;
1684
1685         return (s32)(oper << shift) >> shift;
1686 }
1687
1688 /**
1689  * iwl4965_hw_get_temperature - return the calibrated temperature (in Kelvin)
1690  * @statistics: Provides the temperature reading from the uCode
1691  *
1692  * A return of <0 indicates bogus data in the statistics
1693  */
1694 static int iwl4965_hw_get_temperature(const struct iwl_priv *priv)
1695 {
1696         s32 temperature;
1697         s32 vt;
1698         s32 R1, R2, R3;
1699         u32 R4;
1700
1701         if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
1702                 (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)) {
1703                 IWL_DEBUG_TEMP("Running FAT temperature calibration\n");
1704                 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
1705                 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
1706                 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
1707                 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
1708         } else {
1709                 IWL_DEBUG_TEMP("Running temperature calibration\n");
1710                 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
1711                 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
1712                 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
1713                 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
1714         }
1715
1716         /*
1717          * Temperature is only 23 bits, so sign extend out to 32.
1718          *
1719          * NOTE If we haven't received a statistics notification yet
1720          * with an updated temperature, use R4 provided to us in the
1721          * "initialize" ALIVE response.
1722          */
1723         if (!test_bit(STATUS_TEMPERATURE, &priv->status))
1724                 vt = sign_extend(R4, 23);
1725         else
1726                 vt = sign_extend(
1727                         le32_to_cpu(priv->statistics.general.temperature), 23);
1728
1729         IWL_DEBUG_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt);
1730
1731         if (R3 == R1) {
1732                 IWL_ERROR("Calibration conflict R1 == R3\n");
1733                 return -1;
1734         }
1735
1736         /* Calculate temperature in degrees Kelvin, adjust by 97%.
1737          * Add offset to center the adjustment around 0 degrees Centigrade. */
1738         temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
1739         temperature /= (R3 - R1);
1740         temperature = (temperature * 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET;
1741
1742         IWL_DEBUG_TEMP("Calibrated temperature: %dK, %dC\n",
1743                         temperature, KELVIN_TO_CELSIUS(temperature));
1744
1745         return temperature;
1746 }
1747
1748 /* Adjust Txpower only if temperature variance is greater than threshold. */
1749 #define IWL_TEMPERATURE_THRESHOLD   3
1750
1751 /**
1752  * iwl4965_is_temp_calib_needed - determines if new calibration is needed
1753  *
1754  * If the temperature changed has changed sufficiently, then a recalibration
1755  * is needed.
1756  *
1757  * Assumes caller will replace priv->last_temperature once calibration
1758  * executed.
1759  */
1760 static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv)
1761 {
1762         int temp_diff;
1763
1764         if (!test_bit(STATUS_STATISTICS, &priv->status)) {
1765                 IWL_DEBUG_TEMP("Temperature not updated -- no statistics.\n");
1766                 return 0;
1767         }
1768
1769         temp_diff = priv->temperature - priv->last_temperature;
1770
1771         /* get absolute value */
1772         if (temp_diff < 0) {
1773                 IWL_DEBUG_POWER("Getting cooler, delta %d, \n", temp_diff);
1774                 temp_diff = -temp_diff;
1775         } else if (temp_diff == 0)
1776                 IWL_DEBUG_POWER("Same temp, \n");
1777         else
1778                 IWL_DEBUG_POWER("Getting warmer, delta %d, \n", temp_diff);
1779
1780         if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
1781                 IWL_DEBUG_POWER("Thermal txpower calib not needed\n");
1782                 return 0;
1783         }
1784
1785         IWL_DEBUG_POWER("Thermal txpower calib needed\n");
1786
1787         return 1;
1788 }
1789
1790 static void iwl4965_temperature_calib(struct iwl_priv *priv)
1791 {
1792         s32 temp;
1793
1794         temp = iwl4965_hw_get_temperature(priv);
1795         if (temp < 0)
1796                 return;
1797
1798         if (priv->temperature != temp) {
1799                 if (priv->temperature)
1800                         IWL_DEBUG_TEMP("Temperature changed "
1801                                        "from %dC to %dC\n",
1802                                        KELVIN_TO_CELSIUS(priv->temperature),
1803                                        KELVIN_TO_CELSIUS(temp));
1804                 else
1805                         IWL_DEBUG_TEMP("Temperature "
1806                                        "initialized to %dC\n",
1807                                        KELVIN_TO_CELSIUS(temp));
1808         }
1809
1810         priv->temperature = temp;
1811         set_bit(STATUS_TEMPERATURE, &priv->status);
1812
1813         if (!priv->disable_tx_power_cal &&
1814              unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
1815              iwl4965_is_temp_calib_needed(priv))
1816                 queue_work(priv->workqueue, &priv->txpower_work);
1817 }
1818
1819 /**
1820  * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
1821  */
1822 static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv,
1823                                             u16 txq_id)
1824 {
1825         /* Simply stop the queue, but don't change any configuration;
1826          * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
1827         iwl_write_prph(priv,
1828                 IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
1829                 (0 << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE)|
1830                 (1 << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
1831 }
1832
1833 /**
1834  * txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE
1835  * priv->lock must be held by the caller
1836  */
1837 static int iwl4965_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
1838                                    u16 ssn_idx, u8 tx_fifo)
1839 {
1840         int ret = 0;
1841
1842         if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1843             (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) {
1844                 IWL_WARNING("queue number out of range: %d, must be %d to %d\n",
1845                         txq_id, IWL49_FIRST_AMPDU_QUEUE,
1846                         IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES - 1);
1847                 return -EINVAL;
1848         }
1849
1850         ret = iwl_grab_nic_access(priv);
1851         if (ret)
1852                 return ret;
1853
1854         iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1855
1856         iwl_clear_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
1857
1858         priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1859         priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1860         /* supposes that ssn_idx is valid (!= 0xFFF) */
1861         iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1862
1863         iwl_clear_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
1864         iwl_txq_ctx_deactivate(priv, txq_id);
1865         iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
1866
1867         iwl_release_nic_access(priv);
1868
1869         return 0;
1870 }
1871
1872 /**
1873  * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
1874  */
1875 static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
1876                                         u16 txq_id)
1877 {
1878         u32 tbl_dw_addr;
1879         u32 tbl_dw;
1880         u16 scd_q2ratid;
1881
1882         scd_q2ratid = ra_tid & IWL_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
1883
1884         tbl_dw_addr = priv->scd_base_addr +
1885                         IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
1886
1887         tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
1888
1889         if (txq_id & 0x1)
1890                 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
1891         else
1892                 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
1893
1894         iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
1895
1896         return 0;
1897 }
1898
1899
1900 /**
1901  * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
1902  *
1903  * NOTE:  txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE,
1904  *        i.e. it must be one of the higher queues used for aggregation
1905  */
1906 static int iwl4965_txq_agg_enable(struct iwl_priv *priv, int txq_id,
1907                                   int tx_fifo, int sta_id, int tid, u16 ssn_idx)
1908 {
1909         unsigned long flags;
1910         int ret;
1911         u16 ra_tid;
1912
1913         if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1914             (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) {
1915                 IWL_WARNING("queue number out of range: %d, must be %d to %d\n",
1916                         txq_id, IWL49_FIRST_AMPDU_QUEUE,
1917                         IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES - 1);
1918                 return -EINVAL;
1919         }
1920
1921         ra_tid = BUILD_RAxTID(sta_id, tid);
1922
1923         /* Modify device's station table to Tx this TID */
1924         iwl_sta_tx_modify_enable_tid(priv, sta_id, tid);
1925
1926         spin_lock_irqsave(&priv->lock, flags);
1927         ret = iwl_grab_nic_access(priv);
1928         if (ret) {
1929                 spin_unlock_irqrestore(&priv->lock, flags);
1930                 return ret;
1931         }
1932
1933         /* Stop this Tx queue before configuring it */
1934         iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1935
1936         /* Map receiver-address / traffic-ID to this queue */
1937         iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
1938
1939         /* Set this queue as a chain-building queue */
1940         iwl_set_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
1941
1942         /* Place first TFD at index corresponding to start sequence number.
1943          * Assumes that ssn_idx is valid (!= 0xFFF) */
1944         priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1945         priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1946         iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1947
1948         /* Set up Tx window size and frame limit for this queue */
1949         iwl_write_targ_mem(priv,
1950                 priv->scd_base_addr + IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id),
1951                 (SCD_WIN_SIZE << IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
1952                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
1953
1954         iwl_write_targ_mem(priv, priv->scd_base_addr +
1955                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
1956                 (SCD_FRAME_LIMIT << IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
1957                 & IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
1958
1959         iwl_set_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
1960
1961         /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
1962         iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
1963
1964         iwl_release_nic_access(priv);
1965         spin_unlock_irqrestore(&priv->lock, flags);
1966
1967         return 0;
1968 }
1969
1970
1971 static u16 iwl4965_get_hcmd_size(u8 cmd_id, u16 len)
1972 {
1973         switch (cmd_id) {
1974         case REPLY_RXON:
1975                 return (u16) sizeof(struct iwl4965_rxon_cmd);
1976         default:
1977                 return len;
1978         }
1979 }
1980
1981 static u16 iwl4965_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
1982 {
1983         struct iwl4965_addsta_cmd *addsta = (struct iwl4965_addsta_cmd *)data;
1984         addsta->mode = cmd->mode;
1985         memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
1986         memcpy(&addsta->key, &cmd->key, sizeof(struct iwl4965_keyinfo));
1987         addsta->station_flags = cmd->station_flags;
1988         addsta->station_flags_msk = cmd->station_flags_msk;
1989         addsta->tid_disable_tx = cmd->tid_disable_tx;
1990         addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
1991         addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
1992         addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
1993         addsta->reserved1 = __constant_cpu_to_le16(0);
1994         addsta->reserved2 = __constant_cpu_to_le32(0);
1995
1996         return (u16)sizeof(struct iwl4965_addsta_cmd);
1997 }
1998
1999 static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
2000 {
2001         return le32_to_cpup(&tx_resp->u.status + tx_resp->frame_count) & MAX_SN;
2002 }
2003
2004 /**
2005  * iwl4965_tx_status_reply_tx - Handle Tx response for frames in aggregation queue
2006  */
2007 static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
2008                                       struct iwl_ht_agg *agg,
2009                                       struct iwl4965_tx_resp *tx_resp,
2010                                       int txq_id, u16 start_idx)
2011 {
2012         u16 status;
2013         struct agg_tx_status *frame_status = tx_resp->u.agg_status;
2014         struct ieee80211_tx_info *info = NULL;
2015         struct ieee80211_hdr *hdr = NULL;
2016         u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
2017         int i, sh, idx;
2018         u16 seq;
2019         if (agg->wait_for_ba)
2020                 IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
2021
2022         agg->frame_count = tx_resp->frame_count;
2023         agg->start_idx = start_idx;
2024         agg->rate_n_flags = rate_n_flags;
2025         agg->bitmap = 0;
2026
2027         /* num frames attempted by Tx command */
2028         if (agg->frame_count == 1) {
2029                 /* Only one frame was attempted; no block-ack will arrive */
2030                 status = le16_to_cpu(frame_status[0].status);
2031                 idx = start_idx;
2032
2033                 /* FIXME: code repetition */
2034                 IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
2035                                    agg->frame_count, agg->start_idx, idx);
2036
2037                 info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb[0]);
2038                 info->status.rates[0].count = tx_resp->failure_frame + 1;
2039                 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
2040                 info->flags |= iwl_is_tx_success(status) ?
2041                         IEEE80211_TX_STAT_ACK : 0;
2042                 iwl_hwrate_to_tx_control(priv, rate_n_flags, info);
2043                 /* FIXME: code repetition end */
2044
2045                 IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
2046                                     status & 0xff, tx_resp->failure_frame);
2047                 IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n", rate_n_flags);
2048
2049                 agg->wait_for_ba = 0;
2050         } else {
2051                 /* Two or more frames were attempted; expect block-ack */
2052                 u64 bitmap = 0;
2053                 int start = agg->start_idx;
2054
2055                 /* Construct bit-map of pending frames within Tx window */
2056                 for (i = 0; i < agg->frame_count; i++) {
2057                         u16 sc;
2058                         status = le16_to_cpu(frame_status[i].status);
2059                         seq  = le16_to_cpu(frame_status[i].sequence);
2060                         idx = SEQ_TO_INDEX(seq);
2061                         txq_id = SEQ_TO_QUEUE(seq);
2062
2063                         if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
2064                                       AGG_TX_STATE_ABORT_MSK))
2065                                 continue;
2066
2067                         IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
2068                                            agg->frame_count, txq_id, idx);
2069
2070                         hdr = iwl_tx_queue_get_hdr(priv, txq_id, idx);
2071
2072                         sc = le16_to_cpu(hdr->seq_ctrl);
2073                         if (idx != (SEQ_TO_SN(sc) & 0xff)) {
2074                                 IWL_ERROR("BUG_ON idx doesn't match seq control"
2075                                           " idx=%d, seq_idx=%d, seq=%d\n",
2076                                           idx, SEQ_TO_SN(sc),
2077                                           hdr->seq_ctrl);
2078                                 return -1;
2079                         }
2080
2081                         IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
2082                                            i, idx, SEQ_TO_SN(sc));
2083
2084                         sh = idx - start;
2085                         if (sh > 64) {
2086                                 sh = (start - idx) + 0xff;
2087                                 bitmap = bitmap << sh;
2088                                 sh = 0;
2089                                 start = idx;
2090                         } else if (sh < -64)
2091                                 sh  = 0xff - (start - idx);
2092                         else if (sh < 0) {
2093                                 sh = start - idx;
2094                                 start = idx;
2095                                 bitmap = bitmap << sh;
2096                                 sh = 0;
2097                         }
2098                         bitmap |= 1ULL << sh;
2099                         IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%llx\n",
2100                                            start, (unsigned long long)bitmap);
2101                 }
2102
2103                 agg->bitmap = bitmap;
2104                 agg->start_idx = start;
2105                 IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
2106                                    agg->frame_count, agg->start_idx,
2107                                    (unsigned long long)agg->bitmap);
2108
2109                 if (bitmap)
2110                         agg->wait_for_ba = 1;
2111         }
2112         return 0;
2113 }
2114
2115 /**
2116  * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
2117  */
2118 static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
2119                                 struct iwl_rx_mem_buffer *rxb)
2120 {
2121         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2122         u16 sequence = le16_to_cpu(pkt->hdr.sequence);
2123         int txq_id = SEQ_TO_QUEUE(sequence);
2124         int index = SEQ_TO_INDEX(sequence);
2125         struct iwl_tx_queue *txq = &priv->txq[txq_id];
2126         struct ieee80211_hdr *hdr;
2127         struct ieee80211_tx_info *info;
2128         struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
2129         u32  status = le32_to_cpu(tx_resp->u.status);
2130         int tid = MAX_TID_COUNT;
2131         int sta_id;
2132         int freed;
2133         u8 *qc = NULL;
2134
2135         if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) {
2136                 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
2137                           "is out of range [0-%d] %d %d\n", txq_id,
2138                           index, txq->q.n_bd, txq->q.write_ptr,
2139                           txq->q.read_ptr);
2140                 return;
2141         }
2142
2143         info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
2144         memset(&info->status, 0, sizeof(info->status));
2145
2146         hdr = iwl_tx_queue_get_hdr(priv, txq_id, index);
2147         if (ieee80211_is_data_qos(hdr->frame_control)) {
2148                 qc = ieee80211_get_qos_ctl(hdr);
2149                 tid = qc[0] & 0xf;
2150         }
2151
2152         sta_id = iwl_get_ra_sta_id(priv, hdr);
2153         if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
2154                 IWL_ERROR("Station not known\n");
2155                 return;
2156         }
2157
2158         if (txq->sched_retry) {
2159                 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
2160                 struct iwl_ht_agg *agg = NULL;
2161
2162                 WARN_ON(!qc);
2163
2164                 agg = &priv->stations[sta_id].tid[tid].agg;
2165
2166                 iwl4965_tx_status_reply_tx(priv, agg, tx_resp, txq_id, index);
2167
2168                 /* check if BAR is needed */
2169                 if ((tx_resp->frame_count == 1) && !iwl_is_tx_success(status))
2170                         info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
2171
2172                 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
2173                         index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
2174                         IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
2175                                            "%d index %d\n", scd_ssn , index);
2176                         freed = iwl_tx_queue_reclaim(priv, txq_id, index);
2177                         priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2178
2179                         if (priv->mac80211_registered &&
2180                             (iwl_queue_space(&txq->q) > txq->q.low_mark) &&
2181                             (agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)) {
2182                                 if (agg->state == IWL_AGG_OFF)
2183                                         ieee80211_wake_queue(priv->hw, txq_id);
2184                                 else
2185                                         ieee80211_wake_queue(priv->hw,
2186                                                              txq->swq_id);
2187                         }
2188                 }
2189         } else {
2190                 info->status.rates[0].count = tx_resp->failure_frame + 1;
2191                 info->flags |= iwl_is_tx_success(status) ?
2192                                         IEEE80211_TX_STAT_ACK : 0;
2193                 iwl_hwrate_to_tx_control(priv,
2194                                         le32_to_cpu(tx_resp->rate_n_flags),
2195                                         info);
2196
2197                 IWL_DEBUG_TX_REPLY("TXQ %d status %s (0x%08x) "
2198                                    "rate_n_flags 0x%x retries %d\n",
2199                                    txq_id,
2200                                    iwl_get_tx_fail_reason(status), status,
2201                                    le32_to_cpu(tx_resp->rate_n_flags),
2202                                    tx_resp->failure_frame);
2203
2204                 freed = iwl_tx_queue_reclaim(priv, txq_id, index);
2205                 if (qc && likely(sta_id != IWL_INVALID_STATION))
2206                         priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2207
2208                 if (priv->mac80211_registered &&
2209                     (iwl_queue_space(&txq->q) > txq->q.low_mark))
2210                         ieee80211_wake_queue(priv->hw, txq_id);
2211         }
2212
2213         if (qc && likely(sta_id != IWL_INVALID_STATION))
2214                 iwl_txq_check_empty(priv, sta_id, tid, txq_id);
2215
2216         if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
2217                 IWL_ERROR("TODO:  Implement Tx ABORT REQUIRED!!!\n");
2218 }
2219
2220 static int iwl4965_calc_rssi(struct iwl_priv *priv,
2221                              struct iwl_rx_phy_res *rx_resp)
2222 {
2223         /* data from PHY/DSP regarding signal strength, etc.,
2224          *   contents are always there, not configurable by host.  */
2225         struct iwl4965_rx_non_cfg_phy *ncphy =
2226             (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy_buf;
2227         u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL49_AGC_DB_MASK)
2228                         >> IWL49_AGC_DB_POS;
2229
2230         u32 valid_antennae =
2231             (le16_to_cpu(rx_resp->phy_flags) & IWL49_RX_PHY_FLAGS_ANTENNAE_MASK)
2232                         >> IWL49_RX_PHY_FLAGS_ANTENNAE_OFFSET;
2233         u8 max_rssi = 0;
2234         u32 i;
2235
2236         /* Find max rssi among 3 possible receivers.
2237          * These values are measured by the digital signal processor (DSP).
2238          * They should stay fairly constant even as the signal strength varies,
2239          *   if the radio's automatic gain control (AGC) is working right.
2240          * AGC value (see below) will provide the "interesting" info. */
2241         for (i = 0; i < 3; i++)
2242                 if (valid_antennae & (1 << i))
2243                         max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
2244
2245         IWL_DEBUG_STATS("Rssi In A %d B %d C %d Max %d AGC dB %d\n",
2246                 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
2247                 max_rssi, agc);
2248
2249         /* dBm = max_rssi dB - agc dB - constant.
2250          * Higher AGC (higher radio gain) means lower signal. */
2251         return max_rssi - agc - IWL_RSSI_OFFSET;
2252 }
2253
2254
2255 /* Set up 4965-specific Rx frame reply handlers */
2256 static void iwl4965_rx_handler_setup(struct iwl_priv *priv)
2257 {
2258         /* Legacy Rx frames */
2259         priv->rx_handlers[REPLY_RX] = iwl_rx_reply_rx;
2260         /* Tx response */
2261         priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
2262 }
2263
2264 static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
2265 {
2266         INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
2267 }
2268
2269 static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
2270 {
2271         cancel_work_sync(&priv->txpower_work);
2272 }
2273
2274
2275 static struct iwl_hcmd_ops iwl4965_hcmd = {
2276         .rxon_assoc = iwl4965_send_rxon_assoc,
2277 };
2278
2279 static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
2280         .get_hcmd_size = iwl4965_get_hcmd_size,
2281         .build_addsta_hcmd = iwl4965_build_addsta_hcmd,
2282         .chain_noise_reset = iwl4965_chain_noise_reset,
2283         .gain_computation = iwl4965_gain_computation,
2284         .rts_tx_cmd_flag = iwl4965_rts_tx_cmd_flag,
2285         .calc_rssi = iwl4965_calc_rssi,
2286 };
2287
2288 static struct iwl_lib_ops iwl4965_lib = {
2289         .set_hw_params = iwl4965_hw_set_hw_params,
2290         .txq_update_byte_cnt_tbl = iwl4965_txq_update_byte_cnt_tbl,
2291         .txq_set_sched = iwl4965_txq_set_sched,
2292         .txq_agg_enable = iwl4965_txq_agg_enable,
2293         .txq_agg_disable = iwl4965_txq_agg_disable,
2294         .rx_handler_setup = iwl4965_rx_handler_setup,
2295         .setup_deferred_work = iwl4965_setup_deferred_work,
2296         .cancel_deferred_work = iwl4965_cancel_deferred_work,
2297         .is_valid_rtc_data_addr = iwl4965_hw_valid_rtc_data_addr,
2298         .alive_notify = iwl4965_alive_notify,
2299         .init_alive_start = iwl4965_init_alive_start,
2300         .load_ucode = iwl4965_load_bsm,
2301         .apm_ops = {
2302                 .init = iwl4965_apm_init,
2303                 .reset = iwl4965_apm_reset,
2304                 .stop = iwl4965_apm_stop,
2305                 .config = iwl4965_nic_config,
2306                 .set_pwr_src = iwl_set_pwr_src,
2307         },
2308         .eeprom_ops = {
2309                 .regulatory_bands = {
2310                         EEPROM_REGULATORY_BAND_1_CHANNELS,
2311                         EEPROM_REGULATORY_BAND_2_CHANNELS,
2312                         EEPROM_REGULATORY_BAND_3_CHANNELS,
2313                         EEPROM_REGULATORY_BAND_4_CHANNELS,
2314                         EEPROM_REGULATORY_BAND_5_CHANNELS,
2315                         EEPROM_4965_REGULATORY_BAND_24_FAT_CHANNELS,
2316                         EEPROM_4965_REGULATORY_BAND_52_FAT_CHANNELS
2317                 },
2318                 .verify_signature  = iwlcore_eeprom_verify_signature,
2319                 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
2320                 .release_semaphore = iwlcore_eeprom_release_semaphore,
2321                 .calib_version = iwl4965_eeprom_calib_version,
2322                 .query_addr = iwlcore_eeprom_query_addr,
2323         },
2324         .send_tx_power  = iwl4965_send_tx_power,
2325         .update_chain_flags = iwl_update_chain_flags,
2326         .temperature = iwl4965_temperature_calib,
2327 };
2328
2329 static struct iwl_ops iwl4965_ops = {
2330         .lib = &iwl4965_lib,
2331         .hcmd = &iwl4965_hcmd,
2332         .utils = &iwl4965_hcmd_utils,
2333 };
2334
2335 struct iwl_cfg iwl4965_agn_cfg = {
2336         .name = "4965AGN",
2337         .fw_name_pre = IWL4965_FW_PRE,
2338         .ucode_api_max = IWL4965_UCODE_API_MAX,
2339         .ucode_api_min = IWL4965_UCODE_API_MIN,
2340         .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
2341         .eeprom_size = IWL4965_EEPROM_IMG_SIZE,
2342         .eeprom_ver = EEPROM_4965_EEPROM_VERSION,
2343         .eeprom_calib_ver = EEPROM_4965_TX_POWER_VERSION,
2344         .ops = &iwl4965_ops,
2345         .mod_params = &iwl4965_mod_params,
2346 };
2347
2348 /* Module firmware */
2349 MODULE_FIRMWARE(IWL4965_MODULE_FIRMWARE(IWL4965_UCODE_API_MAX));
2350
2351 module_param_named(antenna, iwl4965_mod_params.antenna, int, 0444);
2352 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
2353 module_param_named(disable, iwl4965_mod_params.disable, int, 0444);
2354 MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
2355 module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, 0444);
2356 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
2357 module_param_named(debug, iwl4965_mod_params.debug, uint, 0444);
2358 MODULE_PARM_DESC(debug, "debug output mask");
2359 module_param_named(
2360         disable_hw_scan, iwl4965_mod_params.disable_hw_scan, int, 0444);
2361 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
2362
2363 module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, 0444);
2364 MODULE_PARM_DESC(queues_num, "number of hw queues.");
2365 /* 11n */
2366 module_param_named(11n_disable, iwl4965_mod_params.disable_11n, int, 0444);
2367 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
2368 module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K, int, 0444);
2369 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
2370
2371 module_param_named(fw_restart4965, iwl4965_mod_params.restart_fw, int, 0444);
2372 MODULE_PARM_DESC(fw_restart4965, "restart firmware in case of error");