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p54: enforce strict tx_queue limits
[linux-2.6-omap-h63xx.git] / drivers / net / wireless / p54 / p54pci.c
1
2 /*
3  * Linux device driver for PCI based Prism54
4  *
5  * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
6  * Copyright (c) 2008, Christian Lamparter <chunkeey@web.de>
7  *
8  * Based on the islsm (softmac prism54) driver, which is:
9  * Copyright 2004-2006 Jean-Baptiste Note <jean-baptiste.note@m4x.org>, et al.
10  *
11  * This program is free software; you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License version 2 as
13  * published by the Free Software Foundation.
14  */
15
16 #include <linux/init.h>
17 #include <linux/pci.h>
18 #include <linux/firmware.h>
19 #include <linux/etherdevice.h>
20 #include <linux/delay.h>
21 #include <linux/completion.h>
22 #include <net/mac80211.h>
23
24 #include "p54.h"
25 #include "p54pci.h"
26
27 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
28 MODULE_DESCRIPTION("Prism54 PCI wireless driver");
29 MODULE_LICENSE("GPL");
30 MODULE_ALIAS("prism54pci");
31 MODULE_FIRMWARE("isl3886pci");
32
33 static struct pci_device_id p54p_table[] __devinitdata = {
34         /* Intersil PRISM Duette/Prism GT Wireless LAN adapter */
35         { PCI_DEVICE(0x1260, 0x3890) },
36         /* 3COM 3CRWE154G72 Wireless LAN adapter */
37         { PCI_DEVICE(0x10b7, 0x6001) },
38         /* Intersil PRISM Indigo Wireless LAN adapter */
39         { PCI_DEVICE(0x1260, 0x3877) },
40         /* Intersil PRISM Javelin/Xbow Wireless LAN adapter */
41         { PCI_DEVICE(0x1260, 0x3886) },
42         { },
43 };
44
45 MODULE_DEVICE_TABLE(pci, p54p_table);
46
47 static int p54p_upload_firmware(struct ieee80211_hw *dev)
48 {
49         struct p54p_priv *priv = dev->priv;
50         __le32 reg;
51         int err;
52         __le32 *data;
53         u32 remains, left, device_addr;
54
55         P54P_WRITE(int_enable, cpu_to_le32(0));
56         P54P_READ(int_enable);
57         udelay(10);
58
59         reg = P54P_READ(ctrl_stat);
60         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
61         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RAMBOOT);
62         P54P_WRITE(ctrl_stat, reg);
63         P54P_READ(ctrl_stat);
64         udelay(10);
65
66         reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RESET);
67         P54P_WRITE(ctrl_stat, reg);
68         wmb();
69         udelay(10);
70
71         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
72         P54P_WRITE(ctrl_stat, reg);
73         wmb();
74
75         /* wait for the firmware to reset properly */
76         mdelay(10);
77
78         err = p54_parse_firmware(dev, priv->firmware);
79         if (err)
80                 return err;
81
82         data = (__le32 *) priv->firmware->data;
83         remains = priv->firmware->size;
84         device_addr = ISL38XX_DEV_FIRMWARE_ADDR;
85         while (remains) {
86                 u32 i = 0;
87                 left = min((u32)0x1000, remains);
88                 P54P_WRITE(direct_mem_base, cpu_to_le32(device_addr));
89                 P54P_READ(int_enable);
90
91                 device_addr += 0x1000;
92                 while (i < left) {
93                         P54P_WRITE(direct_mem_win[i], *data++);
94                         i += sizeof(u32);
95                 }
96
97                 remains -= left;
98                 P54P_READ(int_enable);
99         }
100
101         reg = P54P_READ(ctrl_stat);
102         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_CLKRUN);
103         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
104         reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RAMBOOT);
105         P54P_WRITE(ctrl_stat, reg);
106         P54P_READ(ctrl_stat);
107         udelay(10);
108
109         reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RESET);
110         P54P_WRITE(ctrl_stat, reg);
111         wmb();
112         udelay(10);
113
114         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
115         P54P_WRITE(ctrl_stat, reg);
116         wmb();
117         udelay(10);
118
119         /* wait for the firmware to boot properly */
120         mdelay(100);
121
122         return 0;
123 }
124
125 static void p54p_refill_rx_ring(struct ieee80211_hw *dev,
126         int ring_index, struct p54p_desc *ring, u32 ring_limit,
127         struct sk_buff **rx_buf)
128 {
129         struct p54p_priv *priv = dev->priv;
130         struct p54p_ring_control *ring_control = priv->ring_control;
131         u32 limit, idx, i;
132
133         idx = le32_to_cpu(ring_control->host_idx[ring_index]);
134         limit = idx;
135         limit -= le32_to_cpu(ring_control->device_idx[ring_index]);
136         limit = ring_limit - limit;
137
138         i = idx % ring_limit;
139         while (limit-- > 1) {
140                 struct p54p_desc *desc = &ring[i];
141
142                 if (!desc->host_addr) {
143                         struct sk_buff *skb;
144                         dma_addr_t mapping;
145                         skb = dev_alloc_skb(priv->common.rx_mtu + 32);
146                         if (!skb)
147                                 break;
148
149                         mapping = pci_map_single(priv->pdev,
150                                                  skb_tail_pointer(skb),
151                                                  priv->common.rx_mtu + 32,
152                                                  PCI_DMA_FROMDEVICE);
153                         desc->host_addr = cpu_to_le32(mapping);
154                         desc->device_addr = 0;  // FIXME: necessary?
155                         desc->len = cpu_to_le16(priv->common.rx_mtu + 32);
156                         desc->flags = 0;
157                         rx_buf[i] = skb;
158                 }
159
160                 i++;
161                 idx++;
162                 i %= ring_limit;
163         }
164
165         wmb();
166         ring_control->host_idx[ring_index] = cpu_to_le32(idx);
167 }
168
169 static void p54p_check_rx_ring(struct ieee80211_hw *dev, u32 *index,
170         int ring_index, struct p54p_desc *ring, u32 ring_limit,
171         struct sk_buff **rx_buf)
172 {
173         struct p54p_priv *priv = dev->priv;
174         struct p54p_ring_control *ring_control = priv->ring_control;
175         struct p54p_desc *desc;
176         u32 idx, i;
177
178         i = (*index) % ring_limit;
179         (*index) = idx = le32_to_cpu(ring_control->device_idx[ring_index]);
180         idx %= ring_limit;
181         while (i != idx) {
182                 u16 len;
183                 struct sk_buff *skb;
184                 desc = &ring[i];
185                 len = le16_to_cpu(desc->len);
186                 skb = rx_buf[i];
187
188                 if (!skb) {
189                         i++;
190                         i %= ring_limit;
191                         continue;
192                 }
193                 skb_put(skb, len);
194
195                 if (p54_rx(dev, skb)) {
196                         pci_unmap_single(priv->pdev,
197                                          le32_to_cpu(desc->host_addr),
198                                          priv->common.rx_mtu + 32,
199                                          PCI_DMA_FROMDEVICE);
200                         rx_buf[i] = NULL;
201                         desc->host_addr = 0;
202                 } else {
203                         skb_trim(skb, 0);
204                         desc->len = cpu_to_le16(priv->common.rx_mtu + 32);
205                 }
206
207                 i++;
208                 i %= ring_limit;
209         }
210
211         p54p_refill_rx_ring(dev, ring_index, ring, ring_limit, rx_buf);
212 }
213
214 /* caller must hold priv->lock */
215 static void p54p_check_tx_ring(struct ieee80211_hw *dev, u32 *index,
216         int ring_index, struct p54p_desc *ring, u32 ring_limit,
217         void **tx_buf)
218 {
219         struct p54p_priv *priv = dev->priv;
220         struct p54p_ring_control *ring_control = priv->ring_control;
221         struct p54p_desc *desc;
222         u32 idx, i;
223
224         i = (*index) % ring_limit;
225         (*index) = idx = le32_to_cpu(ring_control->device_idx[1]);
226         idx %= ring_limit;
227
228         while (i != idx) {
229                 desc = &ring[i];
230                 p54_free_skb(dev, tx_buf[i]);
231                 tx_buf[i] = NULL;
232
233                 pci_unmap_single(priv->pdev, le32_to_cpu(desc->host_addr),
234                                  le16_to_cpu(desc->len), PCI_DMA_TODEVICE);
235
236                 desc->host_addr = 0;
237                 desc->device_addr = 0;
238                 desc->len = 0;
239                 desc->flags = 0;
240
241                 i++;
242                 i %= ring_limit;
243         }
244 }
245
246 static void p54p_rx_tasklet(unsigned long dev_id)
247 {
248         struct ieee80211_hw *dev = (struct ieee80211_hw *)dev_id;
249         struct p54p_priv *priv = dev->priv;
250         struct p54p_ring_control *ring_control = priv->ring_control;
251
252         p54p_check_rx_ring(dev, &priv->rx_idx_mgmt, 2, ring_control->rx_mgmt,
253                 ARRAY_SIZE(ring_control->rx_mgmt), priv->rx_buf_mgmt);
254
255         p54p_check_rx_ring(dev, &priv->rx_idx_data, 0, ring_control->rx_data,
256                 ARRAY_SIZE(ring_control->rx_data), priv->rx_buf_data);
257
258         wmb();
259         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
260 }
261
262 static irqreturn_t p54p_interrupt(int irq, void *dev_id)
263 {
264         struct ieee80211_hw *dev = dev_id;
265         struct p54p_priv *priv = dev->priv;
266         struct p54p_ring_control *ring_control = priv->ring_control;
267         __le32 reg;
268
269         spin_lock(&priv->lock);
270         reg = P54P_READ(int_ident);
271         if (unlikely(reg == cpu_to_le32(0xFFFFFFFF))) {
272                 spin_unlock(&priv->lock);
273                 return IRQ_HANDLED;
274         }
275
276         P54P_WRITE(int_ack, reg);
277
278         reg &= P54P_READ(int_enable);
279
280         if (reg & cpu_to_le32(ISL38XX_INT_IDENT_UPDATE)) {
281                 p54p_check_tx_ring(dev, &priv->tx_idx_mgmt,
282                                    3, ring_control->tx_mgmt,
283                                    ARRAY_SIZE(ring_control->tx_mgmt),
284                                    priv->tx_buf_mgmt);
285
286                 p54p_check_tx_ring(dev, &priv->tx_idx_data,
287                                    1, ring_control->tx_data,
288                                    ARRAY_SIZE(ring_control->tx_data),
289                                    priv->tx_buf_data);
290
291                 tasklet_schedule(&priv->rx_tasklet);
292
293         } else if (reg & cpu_to_le32(ISL38XX_INT_IDENT_INIT))
294                 complete(&priv->boot_comp);
295
296         spin_unlock(&priv->lock);
297
298         return reg ? IRQ_HANDLED : IRQ_NONE;
299 }
300
301 static void p54p_tx(struct ieee80211_hw *dev, struct sk_buff *skb,
302                     int free_on_tx)
303 {
304         struct p54p_priv *priv = dev->priv;
305         struct p54p_ring_control *ring_control = priv->ring_control;
306         unsigned long flags;
307         struct p54p_desc *desc;
308         dma_addr_t mapping;
309         u32 device_idx, idx, i;
310
311         spin_lock_irqsave(&priv->lock, flags);
312
313         device_idx = le32_to_cpu(ring_control->device_idx[1]);
314         idx = le32_to_cpu(ring_control->host_idx[1]);
315         i = idx % ARRAY_SIZE(ring_control->tx_data);
316
317         mapping = pci_map_single(priv->pdev, skb->data, skb->len,
318                                  PCI_DMA_TODEVICE);
319         desc = &ring_control->tx_data[i];
320         desc->host_addr = cpu_to_le32(mapping);
321         desc->device_addr = ((struct p54_hdr *)skb->data)->req_id;
322         desc->len = cpu_to_le16(skb->len);
323         desc->flags = 0;
324
325         wmb();
326         ring_control->host_idx[1] = cpu_to_le32(idx + 1);
327
328         if (free_on_tx)
329                 priv->tx_buf_data[i] = skb;
330
331         spin_unlock_irqrestore(&priv->lock, flags);
332
333         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
334         P54P_READ(dev_int);
335 }
336
337 static void p54p_stop(struct ieee80211_hw *dev)
338 {
339         struct p54p_priv *priv = dev->priv;
340         struct p54p_ring_control *ring_control = priv->ring_control;
341         unsigned int i;
342         struct p54p_desc *desc;
343
344         tasklet_kill(&priv->rx_tasklet);
345
346         P54P_WRITE(int_enable, cpu_to_le32(0));
347         P54P_READ(int_enable);
348         udelay(10);
349
350         free_irq(priv->pdev->irq, dev);
351
352         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
353
354         for (i = 0; i < ARRAY_SIZE(priv->rx_buf_data); i++) {
355                 desc = &ring_control->rx_data[i];
356                 if (desc->host_addr)
357                         pci_unmap_single(priv->pdev,
358                                          le32_to_cpu(desc->host_addr),
359                                          priv->common.rx_mtu + 32,
360                                          PCI_DMA_FROMDEVICE);
361                 kfree_skb(priv->rx_buf_data[i]);
362                 priv->rx_buf_data[i] = NULL;
363         }
364
365         for (i = 0; i < ARRAY_SIZE(priv->rx_buf_mgmt); i++) {
366                 desc = &ring_control->rx_mgmt[i];
367                 if (desc->host_addr)
368                         pci_unmap_single(priv->pdev,
369                                          le32_to_cpu(desc->host_addr),
370                                          priv->common.rx_mtu + 32,
371                                          PCI_DMA_FROMDEVICE);
372                 kfree_skb(priv->rx_buf_mgmt[i]);
373                 priv->rx_buf_mgmt[i] = NULL;
374         }
375
376         for (i = 0; i < ARRAY_SIZE(priv->tx_buf_data); i++) {
377                 desc = &ring_control->tx_data[i];
378                 if (desc->host_addr)
379                         pci_unmap_single(priv->pdev,
380                                          le32_to_cpu(desc->host_addr),
381                                          le16_to_cpu(desc->len),
382                                          PCI_DMA_TODEVICE);
383
384                 p54_free_skb(dev, priv->tx_buf_data[i]);
385                 priv->tx_buf_data[i] = NULL;
386         }
387
388         for (i = 0; i < ARRAY_SIZE(priv->tx_buf_mgmt); i++) {
389                 desc = &ring_control->tx_mgmt[i];
390                 if (desc->host_addr)
391                         pci_unmap_single(priv->pdev,
392                                          le32_to_cpu(desc->host_addr),
393                                          le16_to_cpu(desc->len),
394                                          PCI_DMA_TODEVICE);
395
396                 p54_free_skb(dev, priv->tx_buf_mgmt[i]);
397                 priv->tx_buf_mgmt[i] = NULL;
398         }
399
400         memset(ring_control, 0, sizeof(*ring_control));
401 }
402
403 static int p54p_open(struct ieee80211_hw *dev)
404 {
405         struct p54p_priv *priv = dev->priv;
406         int err;
407
408         init_completion(&priv->boot_comp);
409         err = request_irq(priv->pdev->irq, &p54p_interrupt,
410                           IRQF_SHARED, "p54pci", dev);
411         if (err) {
412                 printk(KERN_ERR "%s: failed to register IRQ handler\n",
413                        wiphy_name(dev->wiphy));
414                 return err;
415         }
416
417         memset(priv->ring_control, 0, sizeof(*priv->ring_control));
418         err = p54p_upload_firmware(dev);
419         if (err) {
420                 free_irq(priv->pdev->irq, dev);
421                 return err;
422         }
423         priv->rx_idx_data = priv->tx_idx_data = 0;
424         priv->rx_idx_mgmt = priv->tx_idx_mgmt = 0;
425
426         p54p_refill_rx_ring(dev, 0, priv->ring_control->rx_data,
427                 ARRAY_SIZE(priv->ring_control->rx_data), priv->rx_buf_data);
428
429         p54p_refill_rx_ring(dev, 2, priv->ring_control->rx_mgmt,
430                 ARRAY_SIZE(priv->ring_control->rx_mgmt), priv->rx_buf_mgmt);
431
432         P54P_WRITE(ring_control_base, cpu_to_le32(priv->ring_control_dma));
433         P54P_READ(ring_control_base);
434         wmb();
435         udelay(10);
436
437         P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_INIT));
438         P54P_READ(int_enable);
439         wmb();
440         udelay(10);
441
442         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
443         P54P_READ(dev_int);
444
445         if (!wait_for_completion_interruptible_timeout(&priv->boot_comp, HZ)) {
446                 printk(KERN_ERR "%s: Cannot boot firmware!\n",
447                        wiphy_name(dev->wiphy));
448                 p54p_stop(dev);
449                 return -ETIMEDOUT;
450         }
451
452         P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_UPDATE));
453         P54P_READ(int_enable);
454         wmb();
455         udelay(10);
456
457         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
458         P54P_READ(dev_int);
459         wmb();
460         udelay(10);
461
462         return 0;
463 }
464
465 static int __devinit p54p_probe(struct pci_dev *pdev,
466                                 const struct pci_device_id *id)
467 {
468         struct p54p_priv *priv;
469         struct ieee80211_hw *dev;
470         unsigned long mem_addr, mem_len;
471         int err;
472
473         err = pci_enable_device(pdev);
474         if (err) {
475                 printk(KERN_ERR "%s (p54pci): Cannot enable new PCI device\n",
476                        pci_name(pdev));
477                 return err;
478         }
479
480         mem_addr = pci_resource_start(pdev, 0);
481         mem_len = pci_resource_len(pdev, 0);
482         if (mem_len < sizeof(struct p54p_csr)) {
483                 printk(KERN_ERR "%s (p54pci): Too short PCI resources\n",
484                        pci_name(pdev));
485                 goto err_disable_dev;
486         }
487
488         err = pci_request_regions(pdev, "p54pci");
489         if (err) {
490                 printk(KERN_ERR "%s (p54pci): Cannot obtain PCI resources\n",
491                        pci_name(pdev));
492                 goto err_disable_dev;
493         }
494
495         if (pci_set_dma_mask(pdev, DMA_32BIT_MASK) ||
496             pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK)) {
497                 printk(KERN_ERR "%s (p54pci): No suitable DMA available\n",
498                        pci_name(pdev));
499                 goto err_free_reg;
500         }
501
502         pci_set_master(pdev);
503         pci_try_set_mwi(pdev);
504
505         pci_write_config_byte(pdev, 0x40, 0);
506         pci_write_config_byte(pdev, 0x41, 0);
507
508         dev = p54_init_common(sizeof(*priv));
509         if (!dev) {
510                 printk(KERN_ERR "%s (p54pci): ieee80211 alloc failed\n",
511                        pci_name(pdev));
512                 err = -ENOMEM;
513                 goto err_free_reg;
514         }
515
516         priv = dev->priv;
517         priv->pdev = pdev;
518
519         SET_IEEE80211_DEV(dev, &pdev->dev);
520         pci_set_drvdata(pdev, dev);
521
522         priv->map = ioremap(mem_addr, mem_len);
523         if (!priv->map) {
524                 printk(KERN_ERR "%s (p54pci): Cannot map device memory\n",
525                        pci_name(pdev));
526                 err = -EINVAL;  // TODO: use a better error code?
527                 goto err_free_dev;
528         }
529
530         priv->ring_control = pci_alloc_consistent(pdev, sizeof(*priv->ring_control),
531                                                   &priv->ring_control_dma);
532         if (!priv->ring_control) {
533                 printk(KERN_ERR "%s (p54pci): Cannot allocate rings\n",
534                        pci_name(pdev));
535                 err = -ENOMEM;
536                 goto err_iounmap;
537         }
538         priv->common.open = p54p_open;
539         priv->common.stop = p54p_stop;
540         priv->common.tx = p54p_tx;
541
542         spin_lock_init(&priv->lock);
543         tasklet_init(&priv->rx_tasklet, p54p_rx_tasklet, (unsigned long)dev);
544
545         err = request_firmware(&priv->firmware, "isl3886pci",
546                                &priv->pdev->dev);
547         if (err) {
548                 printk(KERN_ERR "%s (p54pci): cannot find firmware "
549                         "(isl3886pci)\n", pci_name(priv->pdev));
550                 err = request_firmware(&priv->firmware, "isl3886",
551                                        &priv->pdev->dev);
552                 if (err)
553                         goto err_free_common;
554         }
555
556         err = p54p_open(dev);
557         if (err)
558                 goto err_free_common;
559         err = p54_read_eeprom(dev);
560         p54p_stop(dev);
561         if (err)
562                 goto err_free_common;
563
564         err = ieee80211_register_hw(dev);
565         if (err) {
566                 printk(KERN_ERR "%s (p54pci): Cannot register netdevice\n",
567                        pci_name(pdev));
568                 goto err_free_common;
569         }
570
571         return 0;
572
573  err_free_common:
574         release_firmware(priv->firmware);
575         p54_free_common(dev);
576         pci_free_consistent(pdev, sizeof(*priv->ring_control),
577                             priv->ring_control, priv->ring_control_dma);
578
579  err_iounmap:
580         iounmap(priv->map);
581
582  err_free_dev:
583         pci_set_drvdata(pdev, NULL);
584         ieee80211_free_hw(dev);
585
586  err_free_reg:
587         pci_release_regions(pdev);
588  err_disable_dev:
589         pci_disable_device(pdev);
590         return err;
591 }
592
593 static void __devexit p54p_remove(struct pci_dev *pdev)
594 {
595         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
596         struct p54p_priv *priv;
597
598         if (!dev)
599                 return;
600
601         ieee80211_unregister_hw(dev);
602         priv = dev->priv;
603         release_firmware(priv->firmware);
604         pci_free_consistent(pdev, sizeof(*priv->ring_control),
605                             priv->ring_control, priv->ring_control_dma);
606         p54_free_common(dev);
607         iounmap(priv->map);
608         pci_release_regions(pdev);
609         pci_disable_device(pdev);
610         ieee80211_free_hw(dev);
611 }
612
613 #ifdef CONFIG_PM
614 static int p54p_suspend(struct pci_dev *pdev, pm_message_t state)
615 {
616         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
617         struct p54p_priv *priv = dev->priv;
618
619         if (priv->common.mode != NL80211_IFTYPE_UNSPECIFIED) {
620                 ieee80211_stop_queues(dev);
621                 p54p_stop(dev);
622         }
623
624         pci_save_state(pdev);
625         pci_set_power_state(pdev, pci_choose_state(pdev, state));
626         return 0;
627 }
628
629 static int p54p_resume(struct pci_dev *pdev)
630 {
631         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
632         struct p54p_priv *priv = dev->priv;
633
634         pci_set_power_state(pdev, PCI_D0);
635         pci_restore_state(pdev);
636
637         if (priv->common.mode != NL80211_IFTYPE_UNSPECIFIED) {
638                 p54p_open(dev);
639                 ieee80211_wake_queues(dev);
640         }
641
642         return 0;
643 }
644 #endif /* CONFIG_PM */
645
646 static struct pci_driver p54p_driver = {
647         .name           = "p54pci",
648         .id_table       = p54p_table,
649         .probe          = p54p_probe,
650         .remove         = __devexit_p(p54p_remove),
651 #ifdef CONFIG_PM
652         .suspend        = p54p_suspend,
653         .resume         = p54p_resume,
654 #endif /* CONFIG_PM */
655 };
656
657 static int __init p54p_init(void)
658 {
659         return pci_register_driver(&p54p_driver);
660 }
661
662 static void __exit p54p_exit(void)
663 {
664         pci_unregister_driver(&p54p_driver);
665 }
666
667 module_init(p54p_init);
668 module_exit(p54p_exit);