drivers/net/wireless/p54/p54pci.c

   1
   2 /*
   3  * Linux device driver for PCI based Prism54
   4  *
   5  * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
   6  * Copyright (c) 2008, Christian Lamparter <chunkeey@web.de>
   7  *
   8  * Based on the islsm (softmac prism54) driver, which is:
   9  * Copyright 2004-2006 Jean-Baptiste Note <jean-baptiste.note@m4x.org>, et al.
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License version 2 as
  13  * published by the Free Software Foundation.
  14  */
  15
  16 #include <linux/init.h>
  17 #include <linux/pci.h>
  18 #include <linux/firmware.h>
  19 #include <linux/etherdevice.h>
  20 #include <linux/delay.h>
  21 #include <linux/completion.h>
  22 #include <net/mac80211.h>
  23
  24 #include "p54.h"
  25 #include "p54pci.h"
  26
  27 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  28 MODULE_DESCRIPTION("Prism54 PCI wireless driver");
  29 MODULE_LICENSE("GPL");
  30 MODULE_ALIAS("prism54pci");
  31 MODULE_FIRMWARE("isl3886pci");
  32
  33 static struct pci_device_id p54p_table[] __devinitdata = {
  34         /* Intersil PRISM Duette/Prism GT Wireless LAN adapter */
  35         { PCI_DEVICE(0x1260, 0x3890) },
  36         /* 3COM 3CRWE154G72 Wireless LAN adapter */
  37         { PCI_DEVICE(0x10b7, 0x6001) },
  38         /* Intersil PRISM Indigo Wireless LAN adapter */
  39         { PCI_DEVICE(0x1260, 0x3877) },
  40         /* Intersil PRISM Javelin/Xbow Wireless LAN adapter */
  41         { PCI_DEVICE(0x1260, 0x3886) },
  42         { },
  43 };
  44
  45 MODULE_DEVICE_TABLE(pci, p54p_table);
  46
  47 static int p54p_upload_firmware(struct ieee80211_hw *dev)
  48 {
  49         struct p54p_priv *priv = dev->priv;
  50         __le32 reg;
  51         int err;
  52         __le32 *data;
  53         u32 remains, left, device_addr;
  54
  55         P54P_WRITE(int_enable, cpu_to_le32(0));
  56         P54P_READ(int_enable);
  57         udelay(10);
  58
  59         reg = P54P_READ(ctrl_stat);
  60         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
  61         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RAMBOOT);
  62         P54P_WRITE(ctrl_stat, reg);
  63         P54P_READ(ctrl_stat);
  64         udelay(10);
  65
  66         reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RESET);
  67         P54P_WRITE(ctrl_stat, reg);
  68         wmb();
  69         udelay(10);
  70
  71         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
  72         P54P_WRITE(ctrl_stat, reg);
  73         wmb();
  74
  75         /* wait for the firmware to reset properly */
  76         mdelay(10);
  77
  78         err = p54_parse_firmware(dev, priv->firmware);
  79         if (err)
  80                 return err;
  81
  82         data = (__le32 *) priv->firmware->data;
  83         remains = priv->firmware->size;
  84         device_addr = ISL38XX_DEV_FIRMWARE_ADDR;
  85         while (remains) {
  86                 u32 i = 0;
  87                 left = min((u32)0x1000, remains);
  88                 P54P_WRITE(direct_mem_base, cpu_to_le32(device_addr));
  89                 P54P_READ(int_enable);
  90
  91                 device_addr += 0x1000;
  92                 while (i < left) {
  93                         P54P_WRITE(direct_mem_win[i], *data++);
  94                         i += sizeof(u32);
  95                 }
  96
  97                 remains -= left;
  98                 P54P_READ(int_enable);
  99         }
 100
 101         reg = P54P_READ(ctrl_stat);
 102         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_CLKRUN);
 103         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
 104         reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RAMBOOT);
 105         P54P_WRITE(ctrl_stat, reg);
 106         P54P_READ(ctrl_stat);
 107         udelay(10);
 108
 109         reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RESET);
 110         P54P_WRITE(ctrl_stat, reg);
 111         wmb();
 112         udelay(10);
 113
 114         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
 115         P54P_WRITE(ctrl_stat, reg);
 116         wmb();
 117         udelay(10);
 118
 119         /* wait for the firmware to boot properly */
 120         mdelay(100);
 121
 122         return 0;
 123 }
 124
 125 static void p54p_refill_rx_ring(struct ieee80211_hw *dev,
 126         int ring_index, struct p54p_desc *ring, u32 ring_limit,
 127         struct sk_buff **rx_buf)
 128 {
 129         struct p54p_priv *priv = dev->priv;
 130         struct p54p_ring_control *ring_control = priv->ring_control;
 131         u32 limit, idx, i;
 132
 133         idx = le32_to_cpu(ring_control->host_idx[ring_index]);
 134         limit = idx;
 135         limit -= le32_to_cpu(ring_control->device_idx[ring_index]);
 136         limit = ring_limit - limit;
 137
 138         i = idx % ring_limit;
 139         while (limit-- > 1) {
 140                 struct p54p_desc *desc = &ring[i];
 141
 142                 if (!desc->host_addr) {
 143                         struct sk_buff *skb;
 144                         dma_addr_t mapping;
 145                         skb = dev_alloc_skb(priv->common.rx_mtu + 32);
 146                         if (!skb)
 147                                 break;
 148
 149                         mapping = pci_map_single(priv->pdev,
 150                                                  skb_tail_pointer(skb),
 151                                                  priv->common.rx_mtu + 32,
 152                                                  PCI_DMA_FROMDEVICE);
 153                         desc->host_addr = cpu_to_le32(mapping);
 154                         desc->device_addr = 0;  // FIXME: necessary?
 155                         desc->len = cpu_to_le16(priv->common.rx_mtu + 32);
 156                         desc->flags = 0;
 157                         rx_buf[i] = skb;
 158                 }
 159
 160                 i++;
 161                 idx++;
 162                 i %= ring_limit;
 163         }
 164
 165         wmb();
 166         ring_control->host_idx[ring_index] = cpu_to_le32(idx);
 167 }
 168
 169 static void p54p_check_rx_ring(struct ieee80211_hw *dev, u32 *index,
 170         int ring_index, struct p54p_desc *ring, u32 ring_limit,
 171         struct sk_buff **rx_buf)
 172 {
 173         struct p54p_priv *priv = dev->priv;
 174         struct p54p_ring_control *ring_control = priv->ring_control;
 175         struct p54p_desc *desc;
 176         u32 idx, i;
 177
 178         i = (*index) % ring_limit;
 179         (*index) = idx = le32_to_cpu(ring_control->device_idx[ring_index]);
 180         idx %= ring_limit;
 181         while (i != idx) {
 182                 u16 len;
 183                 struct sk_buff *skb;
 184                 desc = &ring[i];
 185                 len = le16_to_cpu(desc->len);
 186                 skb = rx_buf[i];
 187
 188                 if (!skb) {
 189                         i++;
 190                         i %= ring_limit;
 191                         continue;
 192                 }
 193                 skb_put(skb, len);
 194
 195                 if (p54_rx(dev, skb)) {
 196                         pci_unmap_single(priv->pdev,
 197                                          le32_to_cpu(desc->host_addr),
 198                                          priv->common.rx_mtu + 32,
 199                                          PCI_DMA_FROMDEVICE);
 200                         rx_buf[i] = NULL;
 201                         desc->host_addr = 0;
 202                 } else {
 203                         skb_trim(skb, 0);
 204                         desc->len = cpu_to_le16(priv->common.rx_mtu + 32);
 205                 }
 206
 207                 i++;
 208                 i %= ring_limit;
 209         }
 210
 211         p54p_refill_rx_ring(dev, ring_index, ring, ring_limit, rx_buf);
 212 }
 213
 214 /* caller must hold priv->lock */
 215 static void p54p_check_tx_ring(struct ieee80211_hw *dev, u32 *index,
 216         int ring_index, struct p54p_desc *ring, u32 ring_limit,
 217         void **tx_buf)
 218 {
 219         struct p54p_priv *priv = dev->priv;
 220         struct p54p_ring_control *ring_control = priv->ring_control;
 221         struct p54p_desc *desc;
 222         u32 idx, i;
 223
 224         i = (*index) % ring_limit;
 225         (*index) = idx = le32_to_cpu(ring_control->device_idx[1]);
 226         idx %= ring_limit;
 227
 228         while (i != idx) {
 229                 desc = &ring[i];
 230                 p54_free_skb(dev, tx_buf[i]);
 231                 tx_buf[i] = NULL;
 232
 233                 pci_unmap_single(priv->pdev, le32_to_cpu(desc->host_addr),
 234                                  le16_to_cpu(desc->len), PCI_DMA_TODEVICE);
 235
 236                 desc->host_addr = 0;
 237                 desc->device_addr = 0;
 238                 desc->len = 0;
 239                 desc->flags = 0;
 240
 241                 i++;
 242                 i %= ring_limit;
 243         }
 244 }
 245
 246 static void p54p_rx_tasklet(unsigned long dev_id)
 247 {
 248         struct ieee80211_hw *dev = (struct ieee80211_hw *)dev_id;
 249         struct p54p_priv *priv = dev->priv;
 250         struct p54p_ring_control *ring_control = priv->ring_control;
 251
 252         p54p_check_rx_ring(dev, &priv->rx_idx_mgmt, 2, ring_control->rx_mgmt,
 253                 ARRAY_SIZE(ring_control->rx_mgmt), priv->rx_buf_mgmt);
 254
 255         p54p_check_rx_ring(dev, &priv->rx_idx_data, 0, ring_control->rx_data,
 256                 ARRAY_SIZE(ring_control->rx_data), priv->rx_buf_data);
 257
 258         wmb();
 259         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
 260 }
 261
 262 static irqreturn_t p54p_interrupt(int irq, void *dev_id)
 263 {
 264         struct ieee80211_hw *dev = dev_id;
 265         struct p54p_priv *priv = dev->priv;
 266         struct p54p_ring_control *ring_control = priv->ring_control;
 267         __le32 reg;
 268
 269         spin_lock(&priv->lock);
 270         reg = P54P_READ(int_ident);
 271         if (unlikely(reg == cpu_to_le32(0xFFFFFFFF))) {
 272                 spin_unlock(&priv->lock);
 273                 return IRQ_HANDLED;
 274         }
 275
 276         P54P_WRITE(int_ack, reg);
 277
 278         reg &= P54P_READ(int_enable);
 279
 280         if (reg & cpu_to_le32(ISL38XX_INT_IDENT_UPDATE)) {
 281                 p54p_check_tx_ring(dev, &priv->tx_idx_mgmt,
 282                                    3, ring_control->tx_mgmt,
 283                                    ARRAY_SIZE(ring_control->tx_mgmt),
 284                                    priv->tx_buf_mgmt);
 285
 286                 p54p_check_tx_ring(dev, &priv->tx_idx_data,
 287                                    1, ring_control->tx_data,
 288                                    ARRAY_SIZE(ring_control->tx_data),
 289                                    priv->tx_buf_data);
 290
 291                 tasklet_schedule(&priv->rx_tasklet);
 292
 293         } else if (reg & cpu_to_le32(ISL38XX_INT_IDENT_INIT))
 294                 complete(&priv->boot_comp);
 295
 296         spin_unlock(&priv->lock);
 297
 298         return reg ? IRQ_HANDLED : IRQ_NONE;
 299 }
 300
 301 static void p54p_tx(struct ieee80211_hw *dev, struct sk_buff *skb,
 302                     int free_on_tx)
 303 {
 304         struct p54p_priv *priv = dev->priv;
 305         struct p54p_ring_control *ring_control = priv->ring_control;
 306         unsigned long flags;
 307         struct p54p_desc *desc;
 308         dma_addr_t mapping;
 309         u32 device_idx, idx, i;
 310
 311         spin_lock_irqsave(&priv->lock, flags);
 312
 313         device_idx = le32_to_cpu(ring_control->device_idx[1]);
 314         idx = le32_to_cpu(ring_control->host_idx[1]);
 315         i = idx % ARRAY_SIZE(ring_control->tx_data);
 316
 317         mapping = pci_map_single(priv->pdev, skb->data, skb->len,
 318                                  PCI_DMA_TODEVICE);
 319         desc = &ring_control->tx_data[i];
 320         desc->host_addr = cpu_to_le32(mapping);
 321         desc->device_addr = ((struct p54_hdr *)skb->data)->req_id;
 322         desc->len = cpu_to_le16(skb->len);
 323         desc->flags = 0;
 324
 325         wmb();
 326         ring_control->host_idx[1] = cpu_to_le32(idx + 1);
 327
 328         if (free_on_tx)
 329                 priv->tx_buf_data[i] = skb;
 330
 331         spin_unlock_irqrestore(&priv->lock, flags);
 332
 333         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
 334         P54P_READ(dev_int);
 335
 336         /* FIXME: unlikely to happen because the device usually runs out of
 337            memory before we fill the ring up, but we can make it impossible */
 338         if (idx - device_idx > ARRAY_SIZE(ring_control->tx_data) - 2) {
 339                 p54_free_skb(dev, skb);
 340                 printk(KERN_INFO "%s: tx overflow.\n", wiphy_name(dev->wiphy));
 341         }
 342 }
 343
 344 static void p54p_stop(struct ieee80211_hw *dev)
 345 {
 346         struct p54p_priv *priv = dev->priv;
 347         struct p54p_ring_control *ring_control = priv->ring_control;
 348         unsigned int i;
 349         struct p54p_desc *desc;
 350
 351         tasklet_kill(&priv->rx_tasklet);
 352
 353         P54P_WRITE(int_enable, cpu_to_le32(0));
 354         P54P_READ(int_enable);
 355         udelay(10);
 356
 357         free_irq(priv->pdev->irq, dev);
 358
 359         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
 360
 361         for (i = 0; i < ARRAY_SIZE(priv->rx_buf_data); i++) {
 362                 desc = &ring_control->rx_data[i];
 363                 if (desc->host_addr)
 364                         pci_unmap_single(priv->pdev,
 365                                          le32_to_cpu(desc->host_addr),
 366                                          priv->common.rx_mtu + 32,
 367                                          PCI_DMA_FROMDEVICE);
 368                 kfree_skb(priv->rx_buf_data[i]);
 369                 priv->rx_buf_data[i] = NULL;
 370         }
 371
 372         for (i = 0; i < ARRAY_SIZE(priv->rx_buf_mgmt); i++) {
 373                 desc = &ring_control->rx_mgmt[i];
 374                 if (desc->host_addr)
 375                         pci_unmap_single(priv->pdev,
 376                                          le32_to_cpu(desc->host_addr),
 377                                          priv->common.rx_mtu + 32,
 378                                          PCI_DMA_FROMDEVICE);
 379                 kfree_skb(priv->rx_buf_mgmt[i]);
 380                 priv->rx_buf_mgmt[i] = NULL;
 381         }
 382
 383         for (i = 0; i < ARRAY_SIZE(priv->tx_buf_data); i++) {
 384                 desc = &ring_control->tx_data[i];
 385                 if (desc->host_addr)
 386                         pci_unmap_single(priv->pdev,
 387                                          le32_to_cpu(desc->host_addr),
 388                                          le16_to_cpu(desc->len),
 389                                          PCI_DMA_TODEVICE);
 390
 391                 p54_free_skb(dev, priv->tx_buf_data[i]);
 392                 priv->tx_buf_data[i] = NULL;
 393         }
 394
 395         for (i = 0; i < ARRAY_SIZE(priv->tx_buf_mgmt); i++) {
 396                 desc = &ring_control->tx_mgmt[i];
 397                 if (desc->host_addr)
 398                         pci_unmap_single(priv->pdev,
 399                                          le32_to_cpu(desc->host_addr),
 400                                          le16_to_cpu(desc->len),
 401                                          PCI_DMA_TODEVICE);
 402
 403                 p54_free_skb(dev, priv->tx_buf_mgmt[i]);
 404                 priv->tx_buf_mgmt[i] = NULL;
 405         }
 406
 407         memset(ring_control, 0, sizeof(*ring_control));
 408 }
 409
 410 static int p54p_open(struct ieee80211_hw *dev)
 411 {
 412         struct p54p_priv *priv = dev->priv;
 413         int err;
 414
 415         init_completion(&priv->boot_comp);
 416         err = request_irq(priv->pdev->irq, &p54p_interrupt,
 417                           IRQF_SHARED, "p54pci", dev);
 418         if (err) {
 419                 printk(KERN_ERR "%s: failed to register IRQ handler\n",
 420                        wiphy_name(dev->wiphy));
 421                 return err;
 422         }
 423
 424         memset(priv->ring_control, 0, sizeof(*priv->ring_control));
 425         err = p54p_upload_firmware(dev);
 426         if (err) {
 427                 free_irq(priv->pdev->irq, dev);
 428                 return err;
 429         }
 430         priv->rx_idx_data = priv->tx_idx_data = 0;
 431         priv->rx_idx_mgmt = priv->tx_idx_mgmt = 0;
 432
 433         p54p_refill_rx_ring(dev, 0, priv->ring_control->rx_data,
 434                 ARRAY_SIZE(priv->ring_control->rx_data), priv->rx_buf_data);
 435
 436         p54p_refill_rx_ring(dev, 2, priv->ring_control->rx_mgmt,
 437                 ARRAY_SIZE(priv->ring_control->rx_mgmt), priv->rx_buf_mgmt);
 438
 439         P54P_WRITE(ring_control_base, cpu_to_le32(priv->ring_control_dma));
 440         P54P_READ(ring_control_base);
 441         wmb();
 442         udelay(10);
 443
 444         P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_INIT));
 445         P54P_READ(int_enable);
 446         wmb();
 447         udelay(10);
 448
 449         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
 450         P54P_READ(dev_int);
 451
 452         if (!wait_for_completion_interruptible_timeout(&priv->boot_comp, HZ)) {
 453                 printk(KERN_ERR "%s: Cannot boot firmware!\n",
 454                        wiphy_name(dev->wiphy));
 455                 p54p_stop(dev);
 456                 return -ETIMEDOUT;
 457         }
 458
 459         P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_UPDATE));
 460         P54P_READ(int_enable);
 461         wmb();
 462         udelay(10);
 463
 464         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
 465         P54P_READ(dev_int);
 466         wmb();
 467         udelay(10);
 468
 469         return 0;
 470 }
 471
 472 static int __devinit p54p_probe(struct pci_dev *pdev,
 473                                 const struct pci_device_id *id)
 474 {
 475         struct p54p_priv *priv;
 476         struct ieee80211_hw *dev;
 477         unsigned long mem_addr, mem_len;
 478         int err;
 479
 480         err = pci_enable_device(pdev);
 481         if (err) {
 482                 printk(KERN_ERR "%s (p54pci): Cannot enable new PCI device\n",
 483                        pci_name(pdev));
 484                 return err;
 485         }
 486
 487         mem_addr = pci_resource_start(pdev, 0);
 488         mem_len = pci_resource_len(pdev, 0);
 489         if (mem_len < sizeof(struct p54p_csr)) {
 490                 printk(KERN_ERR "%s (p54pci): Too short PCI resources\n",
 491                        pci_name(pdev));
 492                 goto err_disable_dev;
 493         }
 494
 495         err = pci_request_regions(pdev, "p54pci");
 496         if (err) {
 497                 printk(KERN_ERR "%s (p54pci): Cannot obtain PCI resources\n",
 498                        pci_name(pdev));
 499                 goto err_disable_dev;
 500         }
 501
 502         if (pci_set_dma_mask(pdev, DMA_32BIT_MASK) ||
 503             pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK)) {
 504                 printk(KERN_ERR "%s (p54pci): No suitable DMA available\n",
 505                        pci_name(pdev));
 506                 goto err_free_reg;
 507         }
 508
 509         pci_set_master(pdev);
 510         pci_try_set_mwi(pdev);
 511
 512         pci_write_config_byte(pdev, 0x40, 0);
 513         pci_write_config_byte(pdev, 0x41, 0);
 514
 515         dev = p54_init_common(sizeof(*priv));
 516         if (!dev) {
 517                 printk(KERN_ERR "%s (p54pci): ieee80211 alloc failed\n",
 518                        pci_name(pdev));
 519                 err = -ENOMEM;
 520                 goto err_free_reg;
 521         }
 522
 523         priv = dev->priv;
 524         priv->pdev = pdev;
 525
 526         SET_IEEE80211_DEV(dev, &pdev->dev);
 527         pci_set_drvdata(pdev, dev);
 528
 529         priv->map = ioremap(mem_addr, mem_len);
 530         if (!priv->map) {
 531                 printk(KERN_ERR "%s (p54pci): Cannot map device memory\n",
 532                        pci_name(pdev));
 533                 err = -EINVAL;  // TODO: use a better error code?
 534                 goto err_free_dev;
 535         }
 536
 537         priv->ring_control = pci_alloc_consistent(pdev, sizeof(*priv->ring_control),
 538                                                   &priv->ring_control_dma);
 539         if (!priv->ring_control) {
 540                 printk(KERN_ERR "%s (p54pci): Cannot allocate rings\n",
 541                        pci_name(pdev));
 542                 err = -ENOMEM;
 543                 goto err_iounmap;
 544         }
 545         priv->common.open = p54p_open;
 546         priv->common.stop = p54p_stop;
 547         priv->common.tx = p54p_tx;
 548
 549         spin_lock_init(&priv->lock);
 550         tasklet_init(&priv->rx_tasklet, p54p_rx_tasklet, (unsigned long)dev);
 551
 552         err = request_firmware(&priv->firmware, "isl3886pci",
 553                                &priv->pdev->dev);
 554         if (err) {
 555                 printk(KERN_ERR "%s (p54pci): cannot find firmware "
 556                         "(isl3886pci)\n", pci_name(priv->pdev));
 557                 err = request_firmware(&priv->firmware, "isl3886",
 558                                        &priv->pdev->dev);
 559                 if (err)
 560                         goto err_free_common;
 561         }
 562
 563         err = p54p_open(dev);
 564         if (err)
 565                 goto err_free_common;
 566         err = p54_read_eeprom(dev);
 567         p54p_stop(dev);
 568         if (err)
 569                 goto err_free_common;
 570
 571         err = ieee80211_register_hw(dev);
 572         if (err) {
 573                 printk(KERN_ERR "%s (p54pci): Cannot register netdevice\n",
 574                        pci_name(pdev));
 575                 goto err_free_common;
 576         }
 577
 578         return 0;
 579
 580  err_free_common:
 581         release_firmware(priv->firmware);
 582         p54_free_common(dev);
 583         pci_free_consistent(pdev, sizeof(*priv->ring_control),
 584                             priv->ring_control, priv->ring_control_dma);
 585
 586  err_iounmap:
 587         iounmap(priv->map);
 588
 589  err_free_dev:
 590         pci_set_drvdata(pdev, NULL);
 591         ieee80211_free_hw(dev);
 592
 593  err_free_reg:
 594         pci_release_regions(pdev);
 595  err_disable_dev:
 596         pci_disable_device(pdev);
 597         return err;
 598 }
 599
 600 static void __devexit p54p_remove(struct pci_dev *pdev)
 601 {
 602         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
 603         struct p54p_priv *priv;
 604
 605         if (!dev)
 606                 return;
 607
 608         ieee80211_unregister_hw(dev);
 609         priv = dev->priv;
 610         release_firmware(priv->firmware);
 611         pci_free_consistent(pdev, sizeof(*priv->ring_control),
 612                             priv->ring_control, priv->ring_control_dma);
 613         p54_free_common(dev);
 614         iounmap(priv->map);
 615         pci_release_regions(pdev);
 616         pci_disable_device(pdev);
 617         ieee80211_free_hw(dev);
 618 }
 619
 620 #ifdef CONFIG_PM
 621 static int p54p_suspend(struct pci_dev *pdev, pm_message_t state)
 622 {
 623         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
 624         struct p54p_priv *priv = dev->priv;
 625
 626         if (priv->common.mode != NL80211_IFTYPE_UNSPECIFIED) {
 627                 ieee80211_stop_queues(dev);
 628                 p54p_stop(dev);
 629         }
 630
 631         pci_save_state(pdev);
 632         pci_set_power_state(pdev, pci_choose_state(pdev, state));
 633         return 0;
 634 }
 635
 636 static int p54p_resume(struct pci_dev *pdev)
 637 {
 638         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
 639         struct p54p_priv *priv = dev->priv;
 640
 641         pci_set_power_state(pdev, PCI_D0);
 642         pci_restore_state(pdev);
 643
 644         if (priv->common.mode != NL80211_IFTYPE_UNSPECIFIED) {
 645                 p54p_open(dev);
 646                 ieee80211_wake_queues(dev);
 647         }
 648
 649         return 0;
 650 }
 651 #endif /* CONFIG_PM */
 652
 653 static struct pci_driver p54p_driver = {
 654         .name           = "p54pci",
 655         .id_table       = p54p_table,
 656         .probe          = p54p_probe,
 657         .remove         = __devexit_p(p54p_remove),
 658 #ifdef CONFIG_PM
 659         .suspend        = p54p_suspend,
 660         .resume         = p54p_resume,
 661 #endif /* CONFIG_PM */
 662 };
 663
 664 static int __init p54p_init(void)
 665 {
 666         return pci_register_driver(&p54p_driver);
 667 }
 668
 669 static void __exit p54p_exit(void)
 670 {
 671         pci_unregister_driver(&p54p_driver);
 672 }
 673
 674 module_init(p54p_init);
 675 module_exit(p54p_exit);