drivers/net/wireless/rt2x00/rt73usb.c

   1 /*
   2         Copyright (C) 2004 - 2007 rt2x00 SourceForge Project
   3         <http://rt2x00.serialmonkey.com>
   4
   5         This program is free software; you can redistribute it and/or modify
   6         it under the terms of the GNU General Public License as published by
   7         the Free Software Foundation; either version 2 of the License, or
   8         (at your option) any later version.
   9
  10         This program is distributed in the hope that it will be useful,
  11         but WITHOUT ANY WARRANTY; without even the implied warranty of
  12         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13         GNU General Public License for more details.
  14
  15         You should have received a copy of the GNU General Public License
  16         along with this program; if not, write to the
  17         Free Software Foundation, Inc.,
  18         59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  19  */
  20
  21 /*
  22         Module: rt73usb
  23         Abstract: rt73usb device specific routines.
  24         Supported chipsets: rt2571W & rt2671.
  25  */
  26
  27 /*
  28  * Set enviroment defines for rt2x00.h
  29  */
  30 #define DRV_NAME "rt73usb"
  31
  32 #include <linux/delay.h>
  33 #include <linux/etherdevice.h>
  34 #include <linux/init.h>
  35 #include <linux/kernel.h>
  36 #include <linux/module.h>
  37 #include <linux/usb.h>
  38
  39 #include "rt2x00.h"
  40 #include "rt2x00usb.h"
  41 #include "rt73usb.h"
  42
  43 /*
  44  * Register access.
  45  * All access to the CSR registers will go through the methods
  46  * rt73usb_register_read and rt73usb_register_write.
  47  * BBP and RF register require indirect register access,
  48  * and use the CSR registers BBPCSR and RFCSR to achieve this.
  49  * These indirect registers work with busy bits,
  50  * and we will try maximal REGISTER_BUSY_COUNT times to access
  51  * the register while taking a REGISTER_BUSY_DELAY us delay
  52  * between each attampt. When the busy bit is still set at that time,
  53  * the access attempt is considered to have failed,
  54  * and we will print an error.
  55  */
  56 static inline void rt73usb_register_read(const struct rt2x00_dev *rt2x00dev,
  57                                          const unsigned int offset, u32 *value)
  58 {
  59         __le32 reg;
  60         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
  61                                       USB_VENDOR_REQUEST_IN, offset,
  62                                       &reg, sizeof(u32), REGISTER_TIMEOUT);
  63         *value = le32_to_cpu(reg);
  64 }
  65
  66 static inline void rt73usb_register_multiread(const struct rt2x00_dev
  67                                               *rt2x00dev,
  68                                               const unsigned int offset,
  69                                               void *value, const u32 length)
  70 {
  71         int timeout = REGISTER_TIMEOUT * (length / sizeof(u32));
  72         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
  73                                       USB_VENDOR_REQUEST_IN, offset,
  74                                       value, length, timeout);
  75 }
  76
  77 static inline void rt73usb_register_write(const struct rt2x00_dev *rt2x00dev,
  78                                           const unsigned int offset, u32 value)
  79 {
  80         __le32 reg = cpu_to_le32(value);
  81         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
  82                                       USB_VENDOR_REQUEST_OUT, offset,
  83                                       &reg, sizeof(u32), REGISTER_TIMEOUT);
  84 }
  85
  86 static inline void rt73usb_register_multiwrite(const struct rt2x00_dev
  87                                                *rt2x00dev,
  88                                                const unsigned int offset,
  89                                                void *value, const u32 length)
  90 {
  91         int timeout = REGISTER_TIMEOUT * (length / sizeof(u32));
  92         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
  93                                       USB_VENDOR_REQUEST_OUT, offset,
  94                                       value, length, timeout);
  95 }
  96
  97 static u32 rt73usb_bbp_check(const struct rt2x00_dev *rt2x00dev)
  98 {
  99         u32 reg;
 100         unsigned int i;
 101
 102         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
 103                 rt73usb_register_read(rt2x00dev, PHY_CSR3, &reg);
 104                 if (!rt2x00_get_field32(reg, PHY_CSR3_BUSY))
 105                         break;
 106                 udelay(REGISTER_BUSY_DELAY);
 107         }
 108
 109         return reg;
 110 }
 111
 112 static void rt73usb_bbp_write(const struct rt2x00_dev *rt2x00dev,
 113                               const unsigned int word, const u8 value)
 114 {
 115         u32 reg;
 116
 117         /*
 118          * Wait until the BBP becomes ready.
 119          */
 120         reg = rt73usb_bbp_check(rt2x00dev);
 121         if (rt2x00_get_field32(reg, PHY_CSR3_BUSY)) {
 122                 ERROR(rt2x00dev, "PHY_CSR3 register busy. Write failed.\n");
 123                 return;
 124         }
 125
 126         /*
 127          * Write the data into the BBP.
 128          */
 129         reg = 0;
 130         rt2x00_set_field32(&reg, PHY_CSR3_VALUE, value);
 131         rt2x00_set_field32(&reg, PHY_CSR3_REGNUM, word);
 132         rt2x00_set_field32(&reg, PHY_CSR3_BUSY, 1);
 133         rt2x00_set_field32(&reg, PHY_CSR3_READ_CONTROL, 0);
 134
 135         rt73usb_register_write(rt2x00dev, PHY_CSR3, reg);
 136 }
 137
 138 static void rt73usb_bbp_read(const struct rt2x00_dev *rt2x00dev,
 139                              const unsigned int word, u8 *value)
 140 {
 141         u32 reg;
 142
 143         /*
 144          * Wait until the BBP becomes ready.
 145          */
 146         reg = rt73usb_bbp_check(rt2x00dev);
 147         if (rt2x00_get_field32(reg, PHY_CSR3_BUSY)) {
 148                 ERROR(rt2x00dev, "PHY_CSR3 register busy. Read failed.\n");
 149                 return;
 150         }
 151
 152         /*
 153          * Write the request into the BBP.
 154          */
 155         reg = 0;
 156         rt2x00_set_field32(&reg, PHY_CSR3_REGNUM, word);
 157         rt2x00_set_field32(&reg, PHY_CSR3_BUSY, 1);
 158         rt2x00_set_field32(&reg, PHY_CSR3_READ_CONTROL, 1);
 159
 160         rt73usb_register_write(rt2x00dev, PHY_CSR3, reg);
 161
 162         /*
 163          * Wait until the BBP becomes ready.
 164          */
 165         reg = rt73usb_bbp_check(rt2x00dev);
 166         if (rt2x00_get_field32(reg, PHY_CSR3_BUSY)) {
 167                 ERROR(rt2x00dev, "PHY_CSR3 register busy. Read failed.\n");
 168                 *value = 0xff;
 169                 return;
 170         }
 171
 172         *value = rt2x00_get_field32(reg, PHY_CSR3_VALUE);
 173 }
 174
 175 static void rt73usb_rf_write(const struct rt2x00_dev *rt2x00dev,
 176                              const unsigned int word, const u32 value)
 177 {
 178         u32 reg;
 179         unsigned int i;
 180
 181         if (!word)
 182                 return;
 183
 184         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
 185                 rt73usb_register_read(rt2x00dev, PHY_CSR4, &reg);
 186                 if (!rt2x00_get_field32(reg, PHY_CSR4_BUSY))
 187                         goto rf_write;
 188                 udelay(REGISTER_BUSY_DELAY);
 189         }
 190
 191         ERROR(rt2x00dev, "PHY_CSR4 register busy. Write failed.\n");
 192         return;
 193
 194 rf_write:
 195         reg = 0;
 196         rt2x00_set_field32(&reg, PHY_CSR4_VALUE, value);
 197
 198         /*
 199          * RF5225 and RF2527 contain 21 bits per RF register value,
 200          * all others contain 20 bits.
 201          */
 202         rt2x00_set_field32(&reg, PHY_CSR4_NUMBER_OF_BITS,
 203                            20 + (rt2x00_rf(&rt2x00dev->chip, RF5225) ||
 204                                  rt2x00_rf(&rt2x00dev->chip, RF2527)));
 205         rt2x00_set_field32(&reg, PHY_CSR4_IF_SELECT, 0);
 206         rt2x00_set_field32(&reg, PHY_CSR4_BUSY, 1);
 207
 208         rt73usb_register_write(rt2x00dev, PHY_CSR4, reg);
 209         rt2x00_rf_write(rt2x00dev, word, value);
 210 }
 211
 212 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
 213 #define CSR_OFFSET(__word)      ( CSR_REG_BASE + ((__word) * sizeof(u32)) )
 214
 215 static void rt73usb_read_csr(const struct rt2x00_dev *rt2x00dev,
 216                              const unsigned int word, u32 *data)
 217 {
 218         rt73usb_register_read(rt2x00dev, CSR_OFFSET(word), data);
 219 }
 220
 221 static void rt73usb_write_csr(const struct rt2x00_dev *rt2x00dev,
 222                               const unsigned int word, u32 data)
 223 {
 224         rt73usb_register_write(rt2x00dev, CSR_OFFSET(word), data);
 225 }
 226
 227 static const struct rt2x00debug rt73usb_rt2x00debug = {
 228         .owner  = THIS_MODULE,
 229         .csr    = {
 230                 .read           = rt73usb_read_csr,
 231                 .write          = rt73usb_write_csr,
 232                 .word_size      = sizeof(u32),
 233                 .word_count     = CSR_REG_SIZE / sizeof(u32),
 234         },
 235         .eeprom = {
 236                 .read           = rt2x00_eeprom_read,
 237                 .write          = rt2x00_eeprom_write,
 238                 .word_size      = sizeof(u16),
 239                 .word_count     = EEPROM_SIZE / sizeof(u16),
 240         },
 241         .bbp    = {
 242                 .read           = rt73usb_bbp_read,
 243                 .write          = rt73usb_bbp_write,
 244                 .word_size      = sizeof(u8),
 245                 .word_count     = BBP_SIZE / sizeof(u8),
 246         },
 247         .rf     = {
 248                 .read           = rt2x00_rf_read,
 249                 .write          = rt73usb_rf_write,
 250                 .word_size      = sizeof(u32),
 251                 .word_count     = RF_SIZE / sizeof(u32),
 252         },
 253 };
 254 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
 255
 256 /*
 257  * Configuration handlers.
 258  */
 259 static void rt73usb_config_mac_addr(struct rt2x00_dev *rt2x00dev, __le32 *mac)
 260 {
 261         u32 tmp;
 262
 263         tmp = le32_to_cpu(mac[1]);
 264         rt2x00_set_field32(&tmp, MAC_CSR3_UNICAST_TO_ME_MASK, 0xff);
 265         mac[1] = cpu_to_le32(tmp);
 266
 267         rt73usb_register_multiwrite(rt2x00dev, MAC_CSR2, mac,
 268                                     (2 * sizeof(__le32)));
 269 }
 270
 271 static void rt73usb_config_bssid(struct rt2x00_dev *rt2x00dev, __le32 *bssid)
 272 {
 273         u32 tmp;
 274
 275         tmp = le32_to_cpu(bssid[1]);
 276         rt2x00_set_field32(&tmp, MAC_CSR5_BSS_ID_MASK, 3);
 277         bssid[1] = cpu_to_le32(tmp);
 278
 279         rt73usb_register_multiwrite(rt2x00dev, MAC_CSR4, bssid,
 280                                     (2 * sizeof(__le32)));
 281 }
 282
 283 static void rt73usb_config_type(struct rt2x00_dev *rt2x00dev, const int type,
 284                                 const int tsf_sync)
 285 {
 286         u32 reg;
 287
 288         /*
 289          * Clear current synchronisation setup.
 290          * For the Beacon base registers we only need to clear
 291          * the first byte since that byte contains the VALID and OWNER
 292          * bits which (when set to 0) will invalidate the entire beacon.
 293          */
 294         rt73usb_register_write(rt2x00dev, TXRX_CSR9, 0);
 295         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE0, 0);
 296         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE1, 0);
 297         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE2, 0);
 298         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE3, 0);
 299
 300         /*
 301          * Enable synchronisation.
 302          */
 303         rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
 304         rt2x00_set_field32(&reg, TXRX_CSR9_TSF_TICKING, 1);
 305         rt2x00_set_field32(&reg, TXRX_CSR9_TBTT_ENABLE, 1);
 306         rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_GEN, 0);
 307         rt2x00_set_field32(&reg, TXRX_CSR9_TSF_SYNC, tsf_sync);
 308         rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
 309 }
 310
 311 static void rt73usb_config_preamble(struct rt2x00_dev *rt2x00dev,
 312                                       const int short_preamble,
 313                                       const int ack_timeout,
 314                                       const int ack_consume_time)
 315 {
 316         u32 reg;
 317
 318         /*
 319          * When in atomic context, reschedule and let rt2x00lib
 320          * call this function again.
 321          */
 322         if (in_atomic()) {
 323                 queue_work(rt2x00dev->hw->workqueue, &rt2x00dev->config_work);
 324                 return;
 325         }
 326
 327         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
 328         rt2x00_set_field32(&reg, TXRX_CSR0_RX_ACK_TIMEOUT, ack_timeout);
 329         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
 330
 331         rt73usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
 332         rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_PREAMBLE,
 333                            !!short_preamble);
 334         rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
 335 }
 336
 337 static void rt73usb_config_phymode(struct rt2x00_dev *rt2x00dev,
 338                                    const int basic_rate_mask)
 339 {
 340         rt73usb_register_write(rt2x00dev, TXRX_CSR5, basic_rate_mask);
 341 }
 342
 343 static void rt73usb_config_channel(struct rt2x00_dev *rt2x00dev,
 344                                    struct rf_channel *rf, const int txpower)
 345 {
 346         u8 r3;
 347         u8 r94;
 348         u8 smart;
 349
 350         rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
 351         rt2x00_set_field32(&rf->rf4, RF4_FREQ_OFFSET, rt2x00dev->freq_offset);
 352
 353         smart = !(rt2x00_rf(&rt2x00dev->chip, RF5225) ||
 354                   rt2x00_rf(&rt2x00dev->chip, RF2527));
 355
 356         rt73usb_bbp_read(rt2x00dev, 3, &r3);
 357         rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, smart);
 358         rt73usb_bbp_write(rt2x00dev, 3, r3);
 359
 360         r94 = 6;
 361         if (txpower > MAX_TXPOWER && txpower <= (MAX_TXPOWER + r94))
 362                 r94 += txpower - MAX_TXPOWER;
 363         else if (txpower < MIN_TXPOWER && txpower >= (MIN_TXPOWER - r94))
 364                 r94 += txpower;
 365         rt73usb_bbp_write(rt2x00dev, 94, r94);
 366
 367         rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
 368         rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
 369         rt73usb_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
 370         rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
 371
 372         rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
 373         rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
 374         rt73usb_rf_write(rt2x00dev, 3, rf->rf3 | 0x00000004);
 375         rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
 376
 377         rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
 378         rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
 379         rt73usb_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
 380         rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
 381
 382         udelay(10);
 383 }
 384
 385 static void rt73usb_config_txpower(struct rt2x00_dev *rt2x00dev,
 386                                    const int txpower)
 387 {
 388         struct rf_channel rf;
 389
 390         rt2x00_rf_read(rt2x00dev, 1, &rf.rf1);
 391         rt2x00_rf_read(rt2x00dev, 2, &rf.rf2);
 392         rt2x00_rf_read(rt2x00dev, 3, &rf.rf3);
 393         rt2x00_rf_read(rt2x00dev, 4, &rf.rf4);
 394
 395         rt73usb_config_channel(rt2x00dev, &rf, txpower);
 396 }
 397
 398 static void rt73usb_config_antenna_5x(struct rt2x00_dev *rt2x00dev,
 399                                       struct antenna_setup *ant)
 400 {
 401         u8 r3;
 402         u8 r4;
 403         u8 r77;
 404
 405         rt73usb_bbp_read(rt2x00dev, 3, &r3);
 406         rt73usb_bbp_read(rt2x00dev, 4, &r4);
 407         rt73usb_bbp_read(rt2x00dev, 77, &r77);
 408
 409         rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, 0);
 410
 411         switch (ant->rx) {
 412         case ANTENNA_HW_DIVERSITY:
 413                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 2);
 414                 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END,
 415                                   (rt2x00dev->curr_hwmode != HWMODE_A));
 416                 break;
 417         case ANTENNA_A:
 418                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 1);
 419                 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, 0);
 420
 421                 if (rt2x00dev->curr_hwmode == HWMODE_A)
 422                         rt2x00_set_field8(&r77, BBP_R77_PAIR, 0);
 423                 else
 424                         rt2x00_set_field8(&r77, BBP_R77_PAIR, 3);
 425                 break;
 426         case ANTENNA_SW_DIVERSITY:
 427                 /*
 428                  * NOTE: We should never come here because rt2x00lib is
 429                  * supposed to catch this and send us the correct antenna
 430                  * explicitely. However we are nog going to bug about this.
 431                  * Instead, just default to antenna B.
 432                  */
 433         case ANTENNA_B:
 434                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 1);
 435                 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, 0);
 436
 437                 if (rt2x00dev->curr_hwmode == HWMODE_A)
 438                         rt2x00_set_field8(&r77, BBP_R77_PAIR, 3);
 439                 else
 440                         rt2x00_set_field8(&r77, BBP_R77_PAIR, 0);
 441                 break;
 442         }
 443
 444         rt73usb_bbp_write(rt2x00dev, 77, r77);
 445         rt73usb_bbp_write(rt2x00dev, 3, r3);
 446         rt73usb_bbp_write(rt2x00dev, 4, r4);
 447 }
 448
 449 static void rt73usb_config_antenna_2x(struct rt2x00_dev *rt2x00dev,
 450                                       struct antenna_setup *ant)
 451 {
 452         u8 r3;
 453         u8 r4;
 454         u8 r77;
 455
 456         rt73usb_bbp_read(rt2x00dev, 3, &r3);
 457         rt73usb_bbp_read(rt2x00dev, 4, &r4);
 458         rt73usb_bbp_read(rt2x00dev, 77, &r77);
 459
 460         rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, 0);
 461         rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END,
 462                           !test_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags));
 463
 464         switch (ant->rx) {
 465         case ANTENNA_HW_DIVERSITY:
 466                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 2);
 467                 break;
 468         case ANTENNA_A:
 469                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 1);
 470                 rt2x00_set_field8(&r77, BBP_R77_PAIR, 3);
 471                 break;
 472         case ANTENNA_SW_DIVERSITY:
 473                 /*
 474                  * NOTE: We should never come here because rt2x00lib is
 475                  * supposed to catch this and send us the correct antenna
 476                  * explicitely. However we are nog going to bug about this.
 477                  * Instead, just default to antenna B.
 478                  */
 479         case ANTENNA_B:
 480                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 1);
 481                 rt2x00_set_field8(&r77, BBP_R77_PAIR, 0);
 482                 break;
 483         }
 484
 485         rt73usb_bbp_write(rt2x00dev, 77, r77);
 486         rt73usb_bbp_write(rt2x00dev, 3, r3);
 487         rt73usb_bbp_write(rt2x00dev, 4, r4);
 488 }
 489
 490 struct antenna_sel {
 491         u8 word;
 492         /*
 493          * value[0] -> non-LNA
 494          * value[1] -> LNA
 495          */
 496         u8 value[2];
 497 };
 498
 499 static const struct antenna_sel antenna_sel_a[] = {
 500         { 96,  { 0x58, 0x78 } },
 501         { 104, { 0x38, 0x48 } },
 502         { 75,  { 0xfe, 0x80 } },
 503         { 86,  { 0xfe, 0x80 } },
 504         { 88,  { 0xfe, 0x80 } },
 505         { 35,  { 0x60, 0x60 } },
 506         { 97,  { 0x58, 0x58 } },
 507         { 98,  { 0x58, 0x58 } },
 508 };
 509
 510 static const struct antenna_sel antenna_sel_bg[] = {
 511         { 96,  { 0x48, 0x68 } },
 512         { 104, { 0x2c, 0x3c } },
 513         { 75,  { 0xfe, 0x80 } },
 514         { 86,  { 0xfe, 0x80 } },
 515         { 88,  { 0xfe, 0x80 } },
 516         { 35,  { 0x50, 0x50 } },
 517         { 97,  { 0x48, 0x48 } },
 518         { 98,  { 0x48, 0x48 } },
 519 };
 520
 521 static void rt73usb_config_antenna(struct rt2x00_dev *rt2x00dev,
 522                                    struct antenna_setup *ant)
 523 {
 524         const struct antenna_sel *sel;
 525         unsigned int lna;
 526         unsigned int i;
 527         u32 reg;
 528
 529         rt73usb_register_read(rt2x00dev, PHY_CSR0, &reg);
 530
 531         if (rt2x00dev->curr_hwmode == HWMODE_A) {
 532                 sel = antenna_sel_a;
 533                 lna = test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags);
 534         } else {
 535                 sel = antenna_sel_bg;
 536                 lna = test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags);
 537         }
 538
 539         rt2x00_set_field32(&reg, PHY_CSR0_PA_PE_BG,
 540                            (rt2x00dev->curr_hwmode == HWMODE_B ||
 541                             rt2x00dev->curr_hwmode == HWMODE_G));
 542         rt2x00_set_field32(&reg, PHY_CSR0_PA_PE_A,
 543                            (rt2x00dev->curr_hwmode == HWMODE_A));
 544
 545         for (i = 0; i < ARRAY_SIZE(antenna_sel_a); i++)
 546                 rt73usb_bbp_write(rt2x00dev, sel[i].word, sel[i].value[lna]);
 547
 548         rt73usb_register_write(rt2x00dev, PHY_CSR0, reg);
 549
 550         if (rt2x00_rf(&rt2x00dev->chip, RF5226) ||
 551             rt2x00_rf(&rt2x00dev->chip, RF5225))
 552                 rt73usb_config_antenna_5x(rt2x00dev, ant);
 553         else if (rt2x00_rf(&rt2x00dev->chip, RF2528) ||
 554                  rt2x00_rf(&rt2x00dev->chip, RF2527))
 555                 rt73usb_config_antenna_2x(rt2x00dev, ant);
 556 }
 557
 558 static void rt73usb_config_duration(struct rt2x00_dev *rt2x00dev,
 559                                     struct rt2x00lib_conf *libconf)
 560 {
 561         u32 reg;
 562
 563         rt73usb_register_read(rt2x00dev, MAC_CSR9, &reg);
 564         rt2x00_set_field32(&reg, MAC_CSR9_SLOT_TIME, libconf->slot_time);
 565         rt73usb_register_write(rt2x00dev, MAC_CSR9, reg);
 566
 567         rt73usb_register_read(rt2x00dev, MAC_CSR8, &reg);
 568         rt2x00_set_field32(&reg, MAC_CSR8_SIFS, libconf->sifs);
 569         rt2x00_set_field32(&reg, MAC_CSR8_SIFS_AFTER_RX_OFDM, 3);
 570         rt2x00_set_field32(&reg, MAC_CSR8_EIFS, libconf->eifs);
 571         rt73usb_register_write(rt2x00dev, MAC_CSR8, reg);
 572
 573         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
 574         rt2x00_set_field32(&reg, TXRX_CSR0_TSF_OFFSET, IEEE80211_HEADER);
 575         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
 576
 577         rt73usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
 578         rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_ENABLE, 1);
 579         rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
 580
 581         rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
 582         rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_INTERVAL,
 583                            libconf->conf->beacon_int * 16);
 584         rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
 585 }
 586
 587 static void rt73usb_config(struct rt2x00_dev *rt2x00dev,
 588                            const unsigned int flags,
 589                            struct rt2x00lib_conf *libconf)
 590 {
 591         if (flags & CONFIG_UPDATE_PHYMODE)
 592                 rt73usb_config_phymode(rt2x00dev, libconf->basic_rates);
 593         if (flags & CONFIG_UPDATE_CHANNEL)
 594                 rt73usb_config_channel(rt2x00dev, &libconf->rf,
 595                                        libconf->conf->power_level);
 596         if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL))
 597                 rt73usb_config_txpower(rt2x00dev, libconf->conf->power_level);
 598         if (flags & CONFIG_UPDATE_ANTENNA)
 599                 rt73usb_config_antenna(rt2x00dev, &libconf->ant);
 600         if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT))
 601                 rt73usb_config_duration(rt2x00dev, libconf);
 602 }
 603
 604 /*
 605  * LED functions.
 606  */
 607 static void rt73usb_enable_led(struct rt2x00_dev *rt2x00dev)
 608 {
 609         u32 reg;
 610
 611         rt73usb_register_read(rt2x00dev, MAC_CSR14, &reg);
 612         rt2x00_set_field32(&reg, MAC_CSR14_ON_PERIOD, 70);
 613         rt2x00_set_field32(&reg, MAC_CSR14_OFF_PERIOD, 30);
 614         rt73usb_register_write(rt2x00dev, MAC_CSR14, reg);
 615
 616         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_RADIO_STATUS, 1);
 617         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_LINK_A_STATUS,
 618                            (rt2x00dev->rx_status.phymode == MODE_IEEE80211A));
 619         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_LINK_BG_STATUS,
 620                            (rt2x00dev->rx_status.phymode != MODE_IEEE80211A));
 621
 622         rt2x00usb_vendor_request_sw(rt2x00dev, USB_LED_CONTROL, 0x0000,
 623                                     rt2x00dev->led_reg, REGISTER_TIMEOUT);
 624 }
 625
 626 static void rt73usb_disable_led(struct rt2x00_dev *rt2x00dev)
 627 {
 628         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_RADIO_STATUS, 0);
 629         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_LINK_BG_STATUS, 0);
 630         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_LINK_A_STATUS, 0);
 631
 632         rt2x00usb_vendor_request_sw(rt2x00dev, USB_LED_CONTROL, 0x0000,
 633                                     rt2x00dev->led_reg, REGISTER_TIMEOUT);
 634 }
 635
 636 static void rt73usb_activity_led(struct rt2x00_dev *rt2x00dev, int rssi)
 637 {
 638         u32 led;
 639
 640         if (rt2x00dev->led_mode != LED_MODE_SIGNAL_STRENGTH)
 641                 return;
 642
 643         /*
 644          * Led handling requires a positive value for the rssi,
 645          * to do that correctly we need to add the correction.
 646          */
 647         rssi += rt2x00dev->rssi_offset;
 648
 649         if (rssi <= 30)
 650                 led = 0;
 651         else if (rssi <= 39)
 652                 led = 1;
 653         else if (rssi <= 49)
 654                 led = 2;
 655         else if (rssi <= 53)
 656                 led = 3;
 657         else if (rssi <= 63)
 658                 led = 4;
 659         else
 660                 led = 5;
 661
 662         rt2x00usb_vendor_request_sw(rt2x00dev, USB_LED_CONTROL, led,
 663                                     rt2x00dev->led_reg, REGISTER_TIMEOUT);
 664 }
 665
 666 /*
 667  * Link tuning
 668  */
 669 static void rt73usb_link_stats(struct rt2x00_dev *rt2x00dev,
 670                                struct link_qual *qual)
 671 {
 672         u32 reg;
 673
 674         /*
 675          * Update FCS error count from register.
 676          */
 677         rt73usb_register_read(rt2x00dev, STA_CSR0, &reg);
 678         qual->rx_failed = rt2x00_get_field32(reg, STA_CSR0_FCS_ERROR);
 679
 680         /*
 681          * Update False CCA count from register.
 682          */
 683         rt73usb_register_read(rt2x00dev, STA_CSR1, &reg);
 684         qual->false_cca = rt2x00_get_field32(reg, STA_CSR1_FALSE_CCA_ERROR);
 685 }
 686
 687 static void rt73usb_reset_tuner(struct rt2x00_dev *rt2x00dev)
 688 {
 689         rt73usb_bbp_write(rt2x00dev, 17, 0x20);
 690         rt2x00dev->link.vgc_level = 0x20;
 691 }
 692
 693 static void rt73usb_link_tuner(struct rt2x00_dev *rt2x00dev)
 694 {
 695         int rssi = rt2x00_get_link_rssi(&rt2x00dev->link);
 696         u8 r17;
 697         u8 up_bound;
 698         u8 low_bound;
 699
 700         /*
 701          * Update Led strength
 702          */
 703         rt73usb_activity_led(rt2x00dev, rssi);
 704
 705         rt73usb_bbp_read(rt2x00dev, 17, &r17);
 706
 707         /*
 708          * Determine r17 bounds.
 709          */
 710         if (rt2x00dev->rx_status.phymode == MODE_IEEE80211A) {
 711                 low_bound = 0x28;
 712                 up_bound = 0x48;
 713
 714                 if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags)) {
 715                         low_bound += 0x10;
 716                         up_bound += 0x10;
 717                 }
 718         } else {
 719                 if (rssi > -82) {
 720                         low_bound = 0x1c;
 721                         up_bound = 0x40;
 722                 } else if (rssi > -84) {
 723                         low_bound = 0x1c;
 724                         up_bound = 0x20;
 725                 } else {
 726                         low_bound = 0x1c;
 727                         up_bound = 0x1c;
 728                 }
 729
 730                 if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags)) {
 731                         low_bound += 0x14;
 732                         up_bound += 0x10;
 733                 }
 734         }
 735
 736         /*
 737          * Special big-R17 for very short distance
 738          */
 739         if (rssi > -35) {
 740                 if (r17 != 0x60)
 741                         rt73usb_bbp_write(rt2x00dev, 17, 0x60);
 742                 return;
 743         }
 744
 745         /*
 746          * Special big-R17 for short distance
 747          */
 748         if (rssi >= -58) {
 749                 if (r17 != up_bound)
 750                         rt73usb_bbp_write(rt2x00dev, 17, up_bound);
 751                 return;
 752         }
 753
 754         /*
 755          * Special big-R17 for middle-short distance
 756          */
 757         if (rssi >= -66) {
 758                 low_bound += 0x10;
 759                 if (r17 != low_bound)
 760                         rt73usb_bbp_write(rt2x00dev, 17, low_bound);
 761                 return;
 762         }
 763
 764         /*
 765          * Special mid-R17 for middle distance
 766          */
 767         if (rssi >= -74) {
 768                 if (r17 != (low_bound + 0x10))
 769                         rt73usb_bbp_write(rt2x00dev, 17, low_bound + 0x08);
 770                 return;
 771         }
 772
 773         /*
 774          * Special case: Change up_bound based on the rssi.
 775          * Lower up_bound when rssi is weaker then -74 dBm.
 776          */
 777         up_bound -= 2 * (-74 - rssi);
 778         if (low_bound > up_bound)
 779                 up_bound = low_bound;
 780
 781         if (r17 > up_bound) {
 782                 rt73usb_bbp_write(rt2x00dev, 17, up_bound);
 783                 return;
 784         }
 785
 786         /*
 787          * r17 does not yet exceed upper limit, continue and base
 788          * the r17 tuning on the false CCA count.
 789          */
 790         if (rt2x00dev->link.qual.false_cca > 512 && r17 < up_bound) {
 791                 r17 += 4;
 792                 if (r17 > up_bound)
 793                         r17 = up_bound;
 794                 rt73usb_bbp_write(rt2x00dev, 17, r17);
 795         } else if (rt2x00dev->link.qual.false_cca < 100 && r17 > low_bound) {
 796                 r17 -= 4;
 797                 if (r17 < low_bound)
 798                         r17 = low_bound;
 799                 rt73usb_bbp_write(rt2x00dev, 17, r17);
 800         }
 801 }
 802
 803 /*
 804  * Firmware name function.
 805  */
 806 static char *rt73usb_get_firmware_name(struct rt2x00_dev *rt2x00dev)
 807 {
 808         return FIRMWARE_RT2571;
 809 }
 810
 811 /*
 812  * Initialization functions.
 813  */
 814 static int rt73usb_load_firmware(struct rt2x00_dev *rt2x00dev, void *data,
 815                                  const size_t len)
 816 {
 817         unsigned int i;
 818         int status;
 819         u32 reg;
 820         char *ptr = data;
 821         char *cache;
 822         int buflen;
 823         int timeout;
 824
 825         /*
 826          * Wait for stable hardware.
 827          */
 828         for (i = 0; i < 100; i++) {
 829                 rt73usb_register_read(rt2x00dev, MAC_CSR0, &reg);
 830                 if (reg)
 831                         break;
 832                 msleep(1);
 833         }
 834
 835         if (!reg) {
 836                 ERROR(rt2x00dev, "Unstable hardware.\n");
 837                 return -EBUSY;
 838         }
 839
 840         /*
 841          * Write firmware to device.
 842          * We setup a seperate cache for this action,
 843          * since we are going to write larger chunks of data
 844          * then normally used cache size.
 845          */
 846         cache = kmalloc(CSR_CACHE_SIZE_FIRMWARE, GFP_KERNEL);
 847         if (!cache) {
 848                 ERROR(rt2x00dev, "Failed to allocate firmware cache.\n");
 849                 return -ENOMEM;
 850         }
 851
 852         for (i = 0; i < len; i += CSR_CACHE_SIZE_FIRMWARE) {
 853                 buflen = min_t(int, len - i, CSR_CACHE_SIZE_FIRMWARE);
 854                 timeout = REGISTER_TIMEOUT * (buflen / sizeof(u32));
 855
 856                 memcpy(cache, ptr, buflen);
 857
 858                 rt2x00usb_vendor_request(rt2x00dev, USB_MULTI_WRITE,
 859                                          USB_VENDOR_REQUEST_OUT,
 860                                          FIRMWARE_IMAGE_BASE + i, 0x0000,
 861                                          cache, buflen, timeout);
 862
 863                 ptr += buflen;
 864         }
 865
 866         kfree(cache);
 867
 868         /*
 869          * Send firmware request to device to load firmware,
 870          * we need to specify a long timeout time.
 871          */
 872         status = rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE,
 873                                              0x0000, USB_MODE_FIRMWARE,
 874                                              REGISTER_TIMEOUT_FIRMWARE);
 875         if (status < 0) {
 876                 ERROR(rt2x00dev, "Failed to write Firmware to device.\n");
 877                 return status;
 878         }
 879
 880         rt73usb_disable_led(rt2x00dev);
 881
 882         return 0;
 883 }
 884
 885 static int rt73usb_init_registers(struct rt2x00_dev *rt2x00dev)
 886 {
 887         u32 reg;
 888
 889         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
 890         rt2x00_set_field32(&reg, TXRX_CSR0_AUTO_TX_SEQ, 1);
 891         rt2x00_set_field32(&reg, TXRX_CSR0_DISABLE_RX, 0);
 892         rt2x00_set_field32(&reg, TXRX_CSR0_TX_WITHOUT_WAITING, 0);
 893         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
 894
 895         rt73usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
 896         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID0, 47); /* CCK Signal */
 897         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID0_VALID, 1);
 898         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID1, 30); /* Rssi */
 899         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID1_VALID, 1);
 900         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID2, 42); /* OFDM Rate */
 901         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID2_VALID, 1);
 902         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID3, 30); /* Rssi */
 903         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID3_VALID, 1);
 904         rt73usb_register_write(rt2x00dev, TXRX_CSR1, reg);
 905
 906         /*
 907          * CCK TXD BBP registers
 908          */
 909         rt73usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
 910         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID0, 13);
 911         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID0_VALID, 1);
 912         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID1, 12);
 913         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID1_VALID, 1);
 914         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID2, 11);
 915         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID2_VALID, 1);
 916         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID3, 10);
 917         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID3_VALID, 1);
 918         rt73usb_register_write(rt2x00dev, TXRX_CSR2, reg);
 919
 920         /*
 921          * OFDM TXD BBP registers
 922          */
 923         rt73usb_register_read(rt2x00dev, TXRX_CSR3, &reg);
 924         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID0, 7);
 925         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID0_VALID, 1);
 926         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID1, 6);
 927         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID1_VALID, 1);
 928         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID2, 5);
 929         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID2_VALID, 1);
 930         rt73usb_register_write(rt2x00dev, TXRX_CSR3, reg);
 931
 932         rt73usb_register_read(rt2x00dev, TXRX_CSR7, &reg);
 933         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_6MBS, 59);
 934         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_9MBS, 53);
 935         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_12MBS, 49);
 936         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_18MBS, 46);
 937         rt73usb_register_write(rt2x00dev, TXRX_CSR7, reg);
 938
 939         rt73usb_register_read(rt2x00dev, TXRX_CSR8, &reg);
 940         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_24MBS, 44);
 941         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_36MBS, 42);
 942         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_48MBS, 42);
 943         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_54MBS, 42);
 944         rt73usb_register_write(rt2x00dev, TXRX_CSR8, reg);
 945
 946         rt73usb_register_write(rt2x00dev, TXRX_CSR15, 0x0000000f);
 947
 948         rt73usb_register_read(rt2x00dev, MAC_CSR6, &reg);
 949         rt2x00_set_field32(&reg, MAC_CSR6_MAX_FRAME_UNIT, 0xfff);
 950         rt73usb_register_write(rt2x00dev, MAC_CSR6, reg);
 951
 952         rt73usb_register_write(rt2x00dev, MAC_CSR10, 0x00000718);
 953
 954         if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
 955                 return -EBUSY;
 956
 957         rt73usb_register_write(rt2x00dev, MAC_CSR13, 0x00007f00);
 958
 959         /*
 960          * Invalidate all Shared Keys (SEC_CSR0),
 961          * and clear the Shared key Cipher algorithms (SEC_CSR1 & SEC_CSR5)
 962          */
 963         rt73usb_register_write(rt2x00dev, SEC_CSR0, 0x00000000);
 964         rt73usb_register_write(rt2x00dev, SEC_CSR1, 0x00000000);
 965         rt73usb_register_write(rt2x00dev, SEC_CSR5, 0x00000000);
 966
 967         reg = 0x000023b0;
 968         if (rt2x00_rf(&rt2x00dev->chip, RF5225) ||
 969             rt2x00_rf(&rt2x00dev->chip, RF2527))
 970                 rt2x00_set_field32(&reg, PHY_CSR1_RF_RPI, 1);
 971         rt73usb_register_write(rt2x00dev, PHY_CSR1, reg);
 972
 973         rt73usb_register_write(rt2x00dev, PHY_CSR5, 0x00040a06);
 974         rt73usb_register_write(rt2x00dev, PHY_CSR6, 0x00080606);
 975         rt73usb_register_write(rt2x00dev, PHY_CSR7, 0x00000408);
 976
 977         rt73usb_register_read(rt2x00dev, AC_TXOP_CSR0, &reg);
 978         rt2x00_set_field32(&reg, AC_TXOP_CSR0_AC0_TX_OP, 0);
 979         rt2x00_set_field32(&reg, AC_TXOP_CSR0_AC1_TX_OP, 0);
 980         rt73usb_register_write(rt2x00dev, AC_TXOP_CSR0, reg);
 981
 982         rt73usb_register_read(rt2x00dev, AC_TXOP_CSR1, &reg);
 983         rt2x00_set_field32(&reg, AC_TXOP_CSR1_AC2_TX_OP, 192);
 984         rt2x00_set_field32(&reg, AC_TXOP_CSR1_AC3_TX_OP, 48);
 985         rt73usb_register_write(rt2x00dev, AC_TXOP_CSR1, reg);
 986
 987         rt73usb_register_read(rt2x00dev, MAC_CSR9, &reg);
 988         rt2x00_set_field32(&reg, MAC_CSR9_CW_SELECT, 0);
 989         rt73usb_register_write(rt2x00dev, MAC_CSR9, reg);
 990
 991         /*
 992          * We must clear the error counters.
 993          * These registers are cleared on read,
 994          * so we may pass a useless variable to store the value.
 995          */
 996         rt73usb_register_read(rt2x00dev, STA_CSR0, &reg);
 997         rt73usb_register_read(rt2x00dev, STA_CSR1, &reg);
 998         rt73usb_register_read(rt2x00dev, STA_CSR2, &reg);
 999
1000         /*
1001          * Reset MAC and BBP registers.
1002          */
1003         rt73usb_register_read(rt2x00dev, MAC_CSR1, &reg);
1004         rt2x00_set_field32(&reg, MAC_CSR1_SOFT_RESET, 1);
1005         rt2x00_set_field32(&reg, MAC_CSR1_BBP_RESET, 1);
1006         rt73usb_register_write(rt2x00dev, MAC_CSR1, reg);
1007
1008         rt73usb_register_read(rt2x00dev, MAC_CSR1, &reg);
1009         rt2x00_set_field32(&reg, MAC_CSR1_SOFT_RESET, 0);
1010         rt2x00_set_field32(&reg, MAC_CSR1_BBP_RESET, 0);
1011         rt73usb_register_write(rt2x00dev, MAC_CSR1, reg);
1012
1013         rt73usb_register_read(rt2x00dev, MAC_CSR1, &reg);
1014         rt2x00_set_field32(&reg, MAC_CSR1_HOST_READY, 1);
1015         rt73usb_register_write(rt2x00dev, MAC_CSR1, reg);
1016
1017         return 0;
1018 }
1019
1020 static int rt73usb_init_bbp(struct rt2x00_dev *rt2x00dev)
1021 {
1022         unsigned int i;
1023         u16 eeprom;
1024         u8 reg_id;
1025         u8 value;
1026
1027         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1028                 rt73usb_bbp_read(rt2x00dev, 0, &value);
1029                 if ((value != 0xff) && (value != 0x00))
1030                         goto continue_csr_init;
1031                 NOTICE(rt2x00dev, "Waiting for BBP register.\n");
1032                 udelay(REGISTER_BUSY_DELAY);
1033         }
1034
1035         ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
1036         return -EACCES;
1037
1038 continue_csr_init:
1039         rt73usb_bbp_write(rt2x00dev, 3, 0x80);
1040         rt73usb_bbp_write(rt2x00dev, 15, 0x30);
1041         rt73usb_bbp_write(rt2x00dev, 21, 0xc8);
1042         rt73usb_bbp_write(rt2x00dev, 22, 0x38);
1043         rt73usb_bbp_write(rt2x00dev, 23, 0x06);
1044         rt73usb_bbp_write(rt2x00dev, 24, 0xfe);
1045         rt73usb_bbp_write(rt2x00dev, 25, 0x0a);
1046         rt73usb_bbp_write(rt2x00dev, 26, 0x0d);
1047         rt73usb_bbp_write(rt2x00dev, 32, 0x0b);
1048         rt73usb_bbp_write(rt2x00dev, 34, 0x12);
1049         rt73usb_bbp_write(rt2x00dev, 37, 0x07);
1050         rt73usb_bbp_write(rt2x00dev, 39, 0xf8);
1051         rt73usb_bbp_write(rt2x00dev, 41, 0x60);
1052         rt73usb_bbp_write(rt2x00dev, 53, 0x10);
1053         rt73usb_bbp_write(rt2x00dev, 54, 0x18);
1054         rt73usb_bbp_write(rt2x00dev, 60, 0x10);
1055         rt73usb_bbp_write(rt2x00dev, 61, 0x04);
1056         rt73usb_bbp_write(rt2x00dev, 62, 0x04);
1057         rt73usb_bbp_write(rt2x00dev, 75, 0xfe);
1058         rt73usb_bbp_write(rt2x00dev, 86, 0xfe);
1059         rt73usb_bbp_write(rt2x00dev, 88, 0xfe);
1060         rt73usb_bbp_write(rt2x00dev, 90, 0x0f);
1061         rt73usb_bbp_write(rt2x00dev, 99, 0x00);
1062         rt73usb_bbp_write(rt2x00dev, 102, 0x16);
1063         rt73usb_bbp_write(rt2x00dev, 107, 0x04);
1064
1065         DEBUG(rt2x00dev, "Start initialization from EEPROM...\n");
1066         for (i = 0; i < EEPROM_BBP_SIZE; i++) {
1067                 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
1068
1069                 if (eeprom != 0xffff && eeprom != 0x0000) {
1070                         reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
1071                         value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
1072                         DEBUG(rt2x00dev, "BBP: 0x%02x, value: 0x%02x.\n",
1073                               reg_id, value);
1074                         rt73usb_bbp_write(rt2x00dev, reg_id, value);
1075                 }
1076         }
1077         DEBUG(rt2x00dev, "...End initialization from EEPROM.\n");
1078
1079         return 0;
1080 }
1081
1082 /*
1083  * Device state switch handlers.
1084  */
1085 static void rt73usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
1086                               enum dev_state state)
1087 {
1088         u32 reg;
1089
1090         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
1091         rt2x00_set_field32(&reg, TXRX_CSR0_DISABLE_RX,
1092                            state == STATE_RADIO_RX_OFF);
1093         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
1094 }
1095
1096 static int rt73usb_enable_radio(struct rt2x00_dev *rt2x00dev)
1097 {
1098         /*
1099          * Initialize all registers.
1100          */
1101         if (rt73usb_init_registers(rt2x00dev) ||
1102             rt73usb_init_bbp(rt2x00dev)) {
1103                 ERROR(rt2x00dev, "Register initialization failed.\n");
1104                 return -EIO;
1105         }
1106
1107         rt2x00usb_enable_radio(rt2x00dev);
1108
1109         /*
1110          * Enable LED
1111          */
1112         rt73usb_enable_led(rt2x00dev);
1113
1114         return 0;
1115 }
1116
1117 static void rt73usb_disable_radio(struct rt2x00_dev *rt2x00dev)
1118 {
1119         /*
1120          * Disable LED
1121          */
1122         rt73usb_disable_led(rt2x00dev);
1123
1124         rt73usb_register_write(rt2x00dev, MAC_CSR10, 0x00001818);
1125
1126         /*
1127          * Disable synchronisation.
1128          */
1129         rt73usb_register_write(rt2x00dev, TXRX_CSR9, 0);
1130
1131         rt2x00usb_disable_radio(rt2x00dev);
1132 }
1133
1134 static int rt73usb_set_state(struct rt2x00_dev *rt2x00dev, enum dev_state state)
1135 {
1136         u32 reg;
1137         unsigned int i;
1138         char put_to_sleep;
1139         char current_state;
1140
1141         put_to_sleep = (state != STATE_AWAKE);
1142
1143         rt73usb_register_read(rt2x00dev, MAC_CSR12, &reg);
1144         rt2x00_set_field32(&reg, MAC_CSR12_FORCE_WAKEUP, !put_to_sleep);
1145         rt2x00_set_field32(&reg, MAC_CSR12_PUT_TO_SLEEP, put_to_sleep);
1146         rt73usb_register_write(rt2x00dev, MAC_CSR12, reg);
1147
1148         /*
1149          * Device is not guaranteed to be in the requested state yet.
1150          * We must wait until the register indicates that the
1151          * device has entered the correct state.
1152          */
1153         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1154                 rt73usb_register_read(rt2x00dev, MAC_CSR12, &reg);
1155                 current_state =
1156                     rt2x00_get_field32(reg, MAC_CSR12_BBP_CURRENT_STATE);
1157                 if (current_state == !put_to_sleep)
1158                         return 0;
1159                 msleep(10);
1160         }
1161
1162         NOTICE(rt2x00dev, "Device failed to enter state %d, "
1163                "current device state %d.\n", !put_to_sleep, current_state);
1164
1165         return -EBUSY;
1166 }
1167
1168 static int rt73usb_set_device_state(struct rt2x00_dev *rt2x00dev,
1169                                     enum dev_state state)
1170 {
1171         int retval = 0;
1172
1173         switch (state) {
1174         case STATE_RADIO_ON:
1175                 retval = rt73usb_enable_radio(rt2x00dev);
1176                 break;
1177         case STATE_RADIO_OFF:
1178                 rt73usb_disable_radio(rt2x00dev);
1179                 break;
1180         case STATE_RADIO_RX_ON:
1181         case STATE_RADIO_RX_OFF:
1182                 rt73usb_toggle_rx(rt2x00dev, state);
1183                 break;
1184         case STATE_DEEP_SLEEP:
1185         case STATE_SLEEP:
1186         case STATE_STANDBY:
1187         case STATE_AWAKE:
1188                 retval = rt73usb_set_state(rt2x00dev, state);
1189                 break;
1190         default:
1191                 retval = -ENOTSUPP;
1192                 break;
1193         }
1194
1195         return retval;
1196 }
1197
1198 /*
1199  * TX descriptor initialization
1200  */
1201 static void rt73usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
1202                                   struct data_desc *txd,
1203                                   struct txdata_entry_desc *desc,
1204                                   struct ieee80211_hdr *ieee80211hdr,
1205                                   unsigned int length,
1206                                   struct ieee80211_tx_control *control)
1207 {
1208         u32 word;
1209
1210         /*
1211          * Start writing the descriptor words.
1212          */
1213         rt2x00_desc_read(txd, 1, &word);
1214         rt2x00_set_field32(&word, TXD_W1_HOST_Q_ID, desc->queue);
1215         rt2x00_set_field32(&word, TXD_W1_AIFSN, desc->aifs);
1216         rt2x00_set_field32(&word, TXD_W1_CWMIN, desc->cw_min);
1217         rt2x00_set_field32(&word, TXD_W1_CWMAX, desc->cw_max);
1218         rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER);
1219         rt2x00_set_field32(&word, TXD_W1_HW_SEQUENCE, 1);
1220         rt2x00_desc_write(txd, 1, word);
1221
1222         rt2x00_desc_read(txd, 2, &word);
1223         rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, desc->signal);
1224         rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, desc->service);
1225         rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, desc->length_low);
1226         rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, desc->length_high);
1227         rt2x00_desc_write(txd, 2, word);
1228
1229         rt2x00_desc_read(txd, 5, &word);
1230         rt2x00_set_field32(&word, TXD_W5_TX_POWER,
1231                            TXPOWER_TO_DEV(control->power_level));
1232         rt2x00_set_field32(&word, TXD_W5_WAITING_DMA_DONE_INT, 1);
1233         rt2x00_desc_write(txd, 5, word);
1234
1235         rt2x00_desc_read(txd, 0, &word);
1236         rt2x00_set_field32(&word, TXD_W0_BURST,
1237                            test_bit(ENTRY_TXD_BURST, &desc->flags));
1238         rt2x00_set_field32(&word, TXD_W0_VALID, 1);
1239         rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
1240                            test_bit(ENTRY_TXD_MORE_FRAG, &desc->flags));
1241         rt2x00_set_field32(&word, TXD_W0_ACK,
1242                            !(control->flags & IEEE80211_TXCTL_NO_ACK));
1243         rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
1244                            test_bit(ENTRY_TXD_REQ_TIMESTAMP, &desc->flags));
1245         rt2x00_set_field32(&word, TXD_W0_OFDM,
1246                            test_bit(ENTRY_TXD_OFDM_RATE, &desc->flags));
1247         rt2x00_set_field32(&word, TXD_W0_IFS, desc->ifs);
1248         rt2x00_set_field32(&word, TXD_W0_RETRY_MODE,
1249                            !!(control->flags &
1250                               IEEE80211_TXCTL_LONG_RETRY_LIMIT));
1251         rt2x00_set_field32(&word, TXD_W0_TKIP_MIC, 0);
1252         rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, length);
1253         rt2x00_set_field32(&word, TXD_W0_BURST2,
1254                            test_bit(ENTRY_TXD_BURST, &desc->flags));
1255         rt2x00_set_field32(&word, TXD_W0_CIPHER_ALG, CIPHER_NONE);
1256         rt2x00_desc_write(txd, 0, word);
1257 }
1258
1259 static int rt73usb_get_tx_data_len(struct rt2x00_dev *rt2x00dev,
1260                                    struct sk_buff *skb)
1261 {
1262         int length;
1263
1264         /*
1265          * The length _must_ be a multiple of 4,
1266          * but it must _not_ be a multiple of the USB packet size.
1267          */
1268         length = roundup(skb->len, 4);
1269         length += (4 * !(length % rt2x00dev->usb_maxpacket));
1270
1271         return length;
1272 }
1273
1274 /*
1275  * TX data initialization
1276  */
1277 static void rt73usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
1278                                   unsigned int queue)
1279 {
1280         u32 reg;
1281
1282         if (queue != IEEE80211_TX_QUEUE_BEACON)
1283                 return;
1284
1285         /*
1286          * For Wi-Fi faily generated beacons between participating stations.
1287          * Set TBTT phase adaptive adjustment step to 8us (default 16us)
1288          */
1289         rt73usb_register_write(rt2x00dev, TXRX_CSR10, 0x00001008);
1290
1291         rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
1292         if (!rt2x00_get_field32(reg, TXRX_CSR9_BEACON_GEN)) {
1293                 rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_GEN, 1);
1294                 rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
1295         }
1296 }
1297
1298 /*
1299  * RX control handlers
1300  */
1301 static int rt73usb_agc_to_rssi(struct rt2x00_dev *rt2x00dev, int rxd_w1)
1302 {
1303         u16 eeprom;
1304         u8 offset;
1305         u8 lna;
1306
1307         lna = rt2x00_get_field32(rxd_w1, RXD_W1_RSSI_LNA);
1308         switch (lna) {
1309         case 3:
1310                 offset = 90;
1311                 break;
1312         case 2:
1313                 offset = 74;
1314                 break;
1315         case 1:
1316                 offset = 64;
1317                 break;
1318         default:
1319                 return 0;
1320         }
1321
1322         if (rt2x00dev->rx_status.phymode == MODE_IEEE80211A) {
1323                 if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags)) {
1324                         if (lna == 3 || lna == 2)
1325                                 offset += 10;
1326                 } else {
1327                         if (lna == 3)
1328                                 offset += 6;
1329                         else if (lna == 2)
1330                                 offset += 8;
1331                 }
1332
1333                 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_A, &eeprom);
1334                 offset -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_A_1);
1335         } else {
1336                 if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags))
1337                         offset += 14;
1338
1339                 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_BG, &eeprom);
1340                 offset -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_BG_1);
1341         }
1342
1343         return rt2x00_get_field32(rxd_w1, RXD_W1_RSSI_AGC) * 2 - offset;
1344 }
1345
1346 static void rt73usb_fill_rxdone(struct data_entry *entry,
1347                                 struct rxdata_entry_desc *desc)
1348 {
1349         struct data_desc *rxd = (struct data_desc *)entry->skb->data;
1350         u32 word0;
1351         u32 word1;
1352
1353         rt2x00_desc_read(rxd, 0, &word0);
1354         rt2x00_desc_read(rxd, 1, &word1);
1355
1356         desc->flags = 0;
1357         if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
1358                 desc->flags |= RX_FLAG_FAILED_FCS_CRC;
1359
1360         /*
1361          * Obtain the status about this packet.
1362          */
1363         desc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
1364         desc->rssi = rt73usb_agc_to_rssi(entry->ring->rt2x00dev, word1);
1365         desc->ofdm = rt2x00_get_field32(word0, RXD_W0_OFDM);
1366         desc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
1367
1368         /*
1369          * Pull the skb to clear the descriptor area.
1370          */
1371         skb_pull(entry->skb, entry->ring->desc_size);
1372
1373         return;
1374 }
1375
1376 /*
1377  * Device probe functions.
1378  */
1379 static int rt73usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1380 {
1381         u16 word;
1382         u8 *mac;
1383         s8 value;
1384
1385         rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
1386
1387         /*
1388          * Start validation of the data that has been read.
1389          */
1390         mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1391         if (!is_valid_ether_addr(mac)) {
1392                 DECLARE_MAC_BUF(macbuf);
1393
1394                 random_ether_addr(mac);
1395                 EEPROM(rt2x00dev, "MAC: %s\n", print_mac(macbuf, mac));
1396         }
1397
1398         rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1399         if (word == 0xffff) {
1400                 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
1401                 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
1402                                    ANTENNA_B);
1403                 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
1404                                    ANTENNA_B);
1405                 rt2x00_set_field16(&word, EEPROM_ANTENNA_FRAME_TYPE, 0);
1406                 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1407                 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1408                 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF5226);
1409                 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1410                 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
1411         }
1412
1413         rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
1414         if (word == 0xffff) {
1415                 rt2x00_set_field16(&word, EEPROM_NIC_EXTERNAL_LNA, 0);
1416                 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1417                 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
1418         }
1419
1420         rt2x00_eeprom_read(rt2x00dev, EEPROM_LED, &word);
1421         if (word == 0xffff) {
1422                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_RDY_G, 0);
1423                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_RDY_A, 0);
1424                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_ACT, 0);
1425                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_0, 0);
1426                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_1, 0);
1427                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_2, 0);
1428                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_3, 0);
1429                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_4, 0);
1430                 rt2x00_set_field16(&word, EEPROM_LED_LED_MODE,
1431                                    LED_MODE_DEFAULT);
1432                 rt2x00_eeprom_write(rt2x00dev, EEPROM_LED, word);
1433                 EEPROM(rt2x00dev, "Led: 0x%04x\n", word);
1434         }
1435
1436         rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ, &word);
1437         if (word == 0xffff) {
1438                 rt2x00_set_field16(&word, EEPROM_FREQ_OFFSET, 0);
1439                 rt2x00_set_field16(&word, EEPROM_FREQ_SEQ, 0);
1440                 rt2x00_eeprom_write(rt2x00dev, EEPROM_FREQ, word);
1441                 EEPROM(rt2x00dev, "Freq: 0x%04x\n", word);
1442         }
1443
1444         rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_BG, &word);
1445         if (word == 0xffff) {
1446                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_1, 0);
1447                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_2, 0);
1448                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_BG, word);
1449                 EEPROM(rt2x00dev, "RSSI OFFSET BG: 0x%04x\n", word);
1450         } else {
1451                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_BG_1);
1452                 if (value < -10 || value > 10)
1453                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_1, 0);
1454                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_BG_2);
1455                 if (value < -10 || value > 10)
1456                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_2, 0);
1457                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_BG, word);
1458         }
1459
1460         rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_A, &word);
1461         if (word == 0xffff) {
1462                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_1, 0);
1463                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_2, 0);
1464                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_A, word);
1465                 EEPROM(rt2x00dev, "RSSI OFFSET BG: 0x%04x\n", word);
1466         } else {
1467                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_A_1);
1468                 if (value < -10 || value > 10)
1469                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_1, 0);
1470                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_A_2);
1471                 if (value < -10 || value > 10)
1472                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_2, 0);
1473                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_A, word);
1474         }
1475
1476         return 0;
1477 }
1478
1479 static int rt73usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1480 {
1481         u32 reg;
1482         u16 value;
1483         u16 eeprom;
1484
1485         /*
1486          * Read EEPROM word for configuration.
1487          */
1488         rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
1489
1490         /*
1491          * Identify RF chipset.
1492          */
1493         value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1494         rt73usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1495         rt2x00_set_chip(rt2x00dev, RT2571, value, reg);
1496
1497         if (!rt2x00_check_rev(&rt2x00dev->chip, 0x25730)) {
1498                 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
1499                 return -ENODEV;
1500         }
1501
1502         if (!rt2x00_rf(&rt2x00dev->chip, RF5226) &&
1503             !rt2x00_rf(&rt2x00dev->chip, RF2528) &&
1504             !rt2x00_rf(&rt2x00dev->chip, RF5225) &&
1505             !rt2x00_rf(&rt2x00dev->chip, RF2527)) {
1506                 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1507                 return -ENODEV;
1508         }
1509
1510         /*
1511          * Identify default antenna configuration.
1512          */
1513         rt2x00dev->default_ant.tx =
1514             rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
1515         rt2x00dev->default_ant.rx =
1516             rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
1517
1518         /*
1519          * Read the Frame type.
1520          */
1521         if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_FRAME_TYPE))
1522                 __set_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags);
1523
1524         /*
1525          * Read frequency offset.
1526          */
1527         rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ, &eeprom);
1528         rt2x00dev->freq_offset = rt2x00_get_field16(eeprom, EEPROM_FREQ_OFFSET);
1529
1530         /*
1531          * Read external LNA informations.
1532          */
1533         rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
1534
1535         if (rt2x00_get_field16(eeprom, EEPROM_NIC_EXTERNAL_LNA)) {
1536                 __set_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags);
1537                 __set_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags);
1538         }
1539
1540         /*
1541          * Store led settings, for correct led behaviour.
1542          */
1543         rt2x00_eeprom_read(rt2x00dev, EEPROM_LED, &eeprom);
1544
1545         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_LED_MODE,
1546                            rt2x00dev->led_mode);
1547         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_GPIO_0,
1548                            rt2x00_get_field16(eeprom,
1549                                               EEPROM_LED_POLARITY_GPIO_0));
1550         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_GPIO_1,
1551                            rt2x00_get_field16(eeprom,
1552                                               EEPROM_LED_POLARITY_GPIO_1));
1553         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_GPIO_2,
1554                            rt2x00_get_field16(eeprom,
1555                                               EEPROM_LED_POLARITY_GPIO_2));
1556         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_GPIO_3,
1557                            rt2x00_get_field16(eeprom,
1558                                               EEPROM_LED_POLARITY_GPIO_3));
1559         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_GPIO_4,
1560                            rt2x00_get_field16(eeprom,
1561                                               EEPROM_LED_POLARITY_GPIO_4));
1562         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_ACT,
1563                            rt2x00_get_field16(eeprom, EEPROM_LED_POLARITY_ACT));
1564         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_READY_BG,
1565                            rt2x00_get_field16(eeprom,
1566                                               EEPROM_LED_POLARITY_RDY_G));
1567         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_READY_A,
1568                            rt2x00_get_field16(eeprom,
1569                                               EEPROM_LED_POLARITY_RDY_A));
1570
1571         return 0;
1572 }
1573
1574 /*
1575  * RF value list for RF2528
1576  * Supports: 2.4 GHz
1577  */
1578 static const struct rf_channel rf_vals_bg_2528[] = {
1579         { 1,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea0b },
1580         { 2,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea1f },
1581         { 3,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea0b },
1582         { 4,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea1f },
1583         { 5,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea0b },
1584         { 6,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea1f },
1585         { 7,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea0b },
1586         { 8,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea1f },
1587         { 9,  0x00002c0c, 0x00000796, 0x00068255, 0x000fea0b },
1588         { 10, 0x00002c0c, 0x00000796, 0x00068255, 0x000fea1f },
1589         { 11, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea0b },
1590         { 12, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea1f },
1591         { 13, 0x00002c0c, 0x0000079e, 0x00068255, 0x000fea0b },
1592         { 14, 0x00002c0c, 0x000007a2, 0x00068255, 0x000fea13 },
1593 };
1594
1595 /*
1596  * RF value list for RF5226
1597  * Supports: 2.4 GHz & 5.2 GHz
1598  */
1599 static const struct rf_channel rf_vals_5226[] = {
1600         { 1,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea0b },
1601         { 2,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea1f },
1602         { 3,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea0b },
1603         { 4,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea1f },
1604         { 5,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea0b },
1605         { 6,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea1f },
1606         { 7,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea0b },
1607         { 8,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea1f },
1608         { 9,  0x00002c0c, 0x00000796, 0x00068255, 0x000fea0b },
1609         { 10, 0x00002c0c, 0x00000796, 0x00068255, 0x000fea1f },
1610         { 11, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea0b },
1611         { 12, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea1f },
1612         { 13, 0x00002c0c, 0x0000079e, 0x00068255, 0x000fea0b },
1613         { 14, 0x00002c0c, 0x000007a2, 0x00068255, 0x000fea13 },
1614
1615         /* 802.11 UNI / HyperLan 2 */
1616         { 36, 0x00002c0c, 0x0000099a, 0x00098255, 0x000fea23 },
1617         { 40, 0x00002c0c, 0x000009a2, 0x00098255, 0x000fea03 },
1618         { 44, 0x00002c0c, 0x000009a6, 0x00098255, 0x000fea0b },
1619         { 48, 0x00002c0c, 0x000009aa, 0x00098255, 0x000fea13 },
1620         { 52, 0x00002c0c, 0x000009ae, 0x00098255, 0x000fea1b },
1621         { 56, 0x00002c0c, 0x000009b2, 0x00098255, 0x000fea23 },
1622         { 60, 0x00002c0c, 0x000009ba, 0x00098255, 0x000fea03 },
1623         { 64, 0x00002c0c, 0x000009be, 0x00098255, 0x000fea0b },
1624
1625         /* 802.11 HyperLan 2 */
1626         { 100, 0x00002c0c, 0x00000a2a, 0x000b8255, 0x000fea03 },
1627         { 104, 0x00002c0c, 0x00000a2e, 0x000b8255, 0x000fea0b },
1628         { 108, 0x00002c0c, 0x00000a32, 0x000b8255, 0x000fea13 },
1629         { 112, 0x00002c0c, 0x00000a36, 0x000b8255, 0x000fea1b },
1630         { 116, 0x00002c0c, 0x00000a3a, 0x000b8255, 0x000fea23 },
1631         { 120, 0x00002c0c, 0x00000a82, 0x000b8255, 0x000fea03 },
1632         { 124, 0x00002c0c, 0x00000a86, 0x000b8255, 0x000fea0b },
1633         { 128, 0x00002c0c, 0x00000a8a, 0x000b8255, 0x000fea13 },
1634         { 132, 0x00002c0c, 0x00000a8e, 0x000b8255, 0x000fea1b },
1635         { 136, 0x00002c0c, 0x00000a92, 0x000b8255, 0x000fea23 },
1636
1637         /* 802.11 UNII */
1638         { 140, 0x00002c0c, 0x00000a9a, 0x000b8255, 0x000fea03 },
1639         { 149, 0x00002c0c, 0x00000aa2, 0x000b8255, 0x000fea1f },
1640         { 153, 0x00002c0c, 0x00000aa6, 0x000b8255, 0x000fea27 },
1641         { 157, 0x00002c0c, 0x00000aae, 0x000b8255, 0x000fea07 },
1642         { 161, 0x00002c0c, 0x00000ab2, 0x000b8255, 0x000fea0f },
1643         { 165, 0x00002c0c, 0x00000ab6, 0x000b8255, 0x000fea17 },
1644
1645         /* MMAC(Japan)J52 ch 34,38,42,46 */
1646         { 34, 0x00002c0c, 0x0008099a, 0x000da255, 0x000d3a0b },
1647         { 38, 0x00002c0c, 0x0008099e, 0x000da255, 0x000d3a13 },
1648         { 42, 0x00002c0c, 0x000809a2, 0x000da255, 0x000d3a1b },
1649         { 46, 0x00002c0c, 0x000809a6, 0x000da255, 0x000d3a23 },
1650 };
1651
1652 /*
1653  * RF value list for RF5225 & RF2527
1654  * Supports: 2.4 GHz & 5.2 GHz
1655  */
1656 static const struct rf_channel rf_vals_5225_2527[] = {
1657         { 1,  0x00002ccc, 0x00004786, 0x00068455, 0x000ffa0b },
1658         { 2,  0x00002ccc, 0x00004786, 0x00068455, 0x000ffa1f },
1659         { 3,  0x00002ccc, 0x0000478a, 0x00068455, 0x000ffa0b },
1660         { 4,  0x00002ccc, 0x0000478a, 0x00068455, 0x000ffa1f },
1661         { 5,  0x00002ccc, 0x0000478e, 0x00068455, 0x000ffa0b },
1662         { 6,  0x00002ccc, 0x0000478e, 0x00068455, 0x000ffa1f },
1663         { 7,  0x00002ccc, 0x00004792, 0x00068455, 0x000ffa0b },
1664         { 8,  0x00002ccc, 0x00004792, 0x00068455, 0x000ffa1f },
1665         { 9,  0x00002ccc, 0x00004796, 0x00068455, 0x000ffa0b },
1666         { 10, 0x00002ccc, 0x00004796, 0x00068455, 0x000ffa1f },
1667         { 11, 0x00002ccc, 0x0000479a, 0x00068455, 0x000ffa0b },
1668         { 12, 0x00002ccc, 0x0000479a, 0x00068455, 0x000ffa1f },
1669         { 13, 0x00002ccc, 0x0000479e, 0x00068455, 0x000ffa0b },
1670         { 14, 0x00002ccc, 0x000047a2, 0x00068455, 0x000ffa13 },
1671
1672         /* 802.11 UNI / HyperLan 2 */
1673         { 36, 0x00002ccc, 0x0000499a, 0x0009be55, 0x000ffa23 },
1674         { 40, 0x00002ccc, 0x000049a2, 0x0009be55, 0x000ffa03 },
1675         { 44, 0x00002ccc, 0x000049a6, 0x0009be55, 0x000ffa0b },
1676         { 48, 0x00002ccc, 0x000049aa, 0x0009be55, 0x000ffa13 },
1677         { 52, 0x00002ccc, 0x000049ae, 0x0009ae55, 0x000ffa1b },
1678         { 56, 0x00002ccc, 0x000049b2, 0x0009ae55, 0x000ffa23 },
1679         { 60, 0x00002ccc, 0x000049ba, 0x0009ae55, 0x000ffa03 },
1680         { 64, 0x00002ccc, 0x000049be, 0x0009ae55, 0x000ffa0b },
1681
1682         /* 802.11 HyperLan 2 */
1683         { 100, 0x00002ccc, 0x00004a2a, 0x000bae55, 0x000ffa03 },
1684         { 104, 0x00002ccc, 0x00004a2e, 0x000bae55, 0x000ffa0b },
1685         { 108, 0x00002ccc, 0x00004a32, 0x000bae55, 0x000ffa13 },
1686         { 112, 0x00002ccc, 0x00004a36, 0x000bae55, 0x000ffa1b },
1687         { 116, 0x00002ccc, 0x00004a3a, 0x000bbe55, 0x000ffa23 },
1688         { 120, 0x00002ccc, 0x00004a82, 0x000bbe55, 0x000ffa03 },
1689         { 124, 0x00002ccc, 0x00004a86, 0x000bbe55, 0x000ffa0b },
1690         { 128, 0x00002ccc, 0x00004a8a, 0x000bbe55, 0x000ffa13 },
1691         { 132, 0x00002ccc, 0x00004a8e, 0x000bbe55, 0x000ffa1b },
1692         { 136, 0x00002ccc, 0x00004a92, 0x000bbe55, 0x000ffa23 },
1693
1694         /* 802.11 UNII */
1695         { 140, 0x00002ccc, 0x00004a9a, 0x000bbe55, 0x000ffa03 },
1696         { 149, 0x00002ccc, 0x00004aa2, 0x000bbe55, 0x000ffa1f },
1697         { 153, 0x00002ccc, 0x00004aa6, 0x000bbe55, 0x000ffa27 },
1698         { 157, 0x00002ccc, 0x00004aae, 0x000bbe55, 0x000ffa07 },
1699         { 161, 0x00002ccc, 0x00004ab2, 0x000bbe55, 0x000ffa0f },
1700         { 165, 0x00002ccc, 0x00004ab6, 0x000bbe55, 0x000ffa17 },
1701
1702         /* MMAC(Japan)J52 ch 34,38,42,46 */
1703         { 34, 0x00002ccc, 0x0000499a, 0x0009be55, 0x000ffa0b },
1704         { 38, 0x00002ccc, 0x0000499e, 0x0009be55, 0x000ffa13 },
1705         { 42, 0x00002ccc, 0x000049a2, 0x0009be55, 0x000ffa1b },
1706         { 46, 0x00002ccc, 0x000049a6, 0x0009be55, 0x000ffa23 },
1707 };
1708
1709
1710 static void rt73usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
1711 {
1712         struct hw_mode_spec *spec = &rt2x00dev->spec;
1713         u8 *txpower;
1714         unsigned int i;
1715
1716         /*
1717          * Initialize all hw fields.
1718          */
1719         rt2x00dev->hw->flags =
1720             IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
1721             IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING;
1722         rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE;
1723         rt2x00dev->hw->max_signal = MAX_SIGNAL;
1724         rt2x00dev->hw->max_rssi = MAX_RX_SSI;
1725         rt2x00dev->hw->queues = 5;
1726
1727         SET_IEEE80211_DEV(rt2x00dev->hw, &rt2x00dev_usb(rt2x00dev)->dev);
1728         SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
1729                                 rt2x00_eeprom_addr(rt2x00dev,
1730                                                    EEPROM_MAC_ADDR_0));
1731
1732         /*
1733          * Convert tx_power array in eeprom.
1734          */
1735         txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_G_START);
1736         for (i = 0; i < 14; i++)
1737                 txpower[i] = TXPOWER_FROM_DEV(txpower[i]);
1738
1739         /*
1740          * Initialize hw_mode information.
1741          */
1742         spec->num_modes = 2;
1743         spec->num_rates = 12;
1744         spec->tx_power_a = NULL;
1745         spec->tx_power_bg = txpower;
1746         spec->tx_power_default = DEFAULT_TXPOWER;
1747
1748         if (rt2x00_rf(&rt2x00dev->chip, RF2528)) {
1749                 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2528);
1750                 spec->channels = rf_vals_bg_2528;
1751         } else if (rt2x00_rf(&rt2x00dev->chip, RF5226)) {
1752                 spec->num_channels = ARRAY_SIZE(rf_vals_5226);
1753                 spec->channels = rf_vals_5226;
1754         } else if (rt2x00_rf(&rt2x00dev->chip, RF2527)) {
1755                 spec->num_channels = 14;
1756                 spec->channels = rf_vals_5225_2527;
1757         } else if (rt2x00_rf(&rt2x00dev->chip, RF5225)) {
1758                 spec->num_channels = ARRAY_SIZE(rf_vals_5225_2527);
1759                 spec->channels = rf_vals_5225_2527;
1760         }
1761
1762         if (rt2x00_rf(&rt2x00dev->chip, RF5225) ||
1763             rt2x00_rf(&rt2x00dev->chip, RF5226)) {
1764                 spec->num_modes = 3;
1765
1766                 txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_A_START);
1767                 for (i = 0; i < 14; i++)
1768                         txpower[i] = TXPOWER_FROM_DEV(txpower[i]);
1769
1770                 spec->tx_power_a = txpower;
1771         }
1772 }
1773
1774 static int rt73usb_probe_hw(struct rt2x00_dev *rt2x00dev)
1775 {
1776         int retval;
1777
1778         /*
1779          * Allocate eeprom data.
1780          */
1781         retval = rt73usb_validate_eeprom(rt2x00dev);
1782         if (retval)
1783                 return retval;
1784
1785         retval = rt73usb_init_eeprom(rt2x00dev);
1786         if (retval)
1787                 return retval;
1788
1789         /*
1790          * Initialize hw specifications.
1791          */
1792         rt73usb_probe_hw_mode(rt2x00dev);
1793
1794         /*
1795          * This device requires firmware
1796          */
1797         __set_bit(DRIVER_REQUIRE_FIRMWARE, &rt2x00dev->flags);
1798
1799         /*
1800          * Set the rssi offset.
1801          */
1802         rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
1803
1804         return 0;
1805 }
1806
1807 /*
1808  * IEEE80211 stack callback functions.
1809  */
1810 static void rt73usb_configure_filter(struct ieee80211_hw *hw,
1811                                      unsigned int changed_flags,
1812                                      unsigned int *total_flags,
1813                                      int mc_count,
1814                                      struct dev_addr_list *mc_list)
1815 {
1816         struct rt2x00_dev *rt2x00dev = hw->priv;
1817         struct interface *intf = &rt2x00dev->interface;
1818         u32 reg;
1819
1820         /*
1821          * Mask off any flags we are going to ignore from
1822          * the total_flags field.
1823          */
1824         *total_flags &=
1825             FIF_ALLMULTI |
1826             FIF_FCSFAIL |
1827             FIF_PLCPFAIL |
1828             FIF_CONTROL |
1829             FIF_OTHER_BSS |
1830             FIF_PROMISC_IN_BSS;
1831
1832         /*
1833          * Apply some rules to the filters:
1834          * - Some filters imply different filters to be set.
1835          * - Some things we can't filter out at all.
1836          * - Some filters are set based on interface type.
1837          */
1838         if (mc_count)
1839                 *total_flags |= FIF_ALLMULTI;
1840         if (*total_flags & FIF_OTHER_BSS ||
1841             *total_flags & FIF_PROMISC_IN_BSS)
1842                 *total_flags |= FIF_PROMISC_IN_BSS | FIF_OTHER_BSS;
1843         if (is_interface_type(intf, IEEE80211_IF_TYPE_AP))
1844                 *total_flags |= FIF_PROMISC_IN_BSS;
1845
1846         /*
1847          * Check if there is any work left for us.
1848          */
1849         if (intf->filter == *total_flags)
1850                 return;
1851         intf->filter = *total_flags;
1852
1853         /*
1854          * When in atomic context, reschedule and let rt2x00lib
1855          * call this function again.
1856          */
1857         if (in_atomic()) {
1858                 queue_work(rt2x00dev->hw->workqueue, &rt2x00dev->filter_work);
1859                 return;
1860         }
1861
1862         /*
1863          * Start configuration steps.
1864          * Note that the version error will always be dropped
1865          * and broadcast frames will always be accepted since
1866          * there is no filter for it at this time.
1867          */
1868         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
1869         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_CRC,
1870                            !(*total_flags & FIF_FCSFAIL));
1871         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_PHYSICAL,
1872                            !(*total_flags & FIF_PLCPFAIL));
1873         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_CONTROL,
1874                            !(*total_flags & FIF_CONTROL));
1875         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_NOT_TO_ME,
1876                            !(*total_flags & FIF_PROMISC_IN_BSS));
1877         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_TO_DS,
1878                            !(*total_flags & FIF_PROMISC_IN_BSS));
1879         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_VERSION_ERROR, 1);
1880         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_MULTICAST,
1881                            !(*total_flags & FIF_ALLMULTI));
1882         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_BROADCAST, 0);
1883         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_ACK_CTS, 1);
1884         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
1885 }
1886
1887 static int rt73usb_set_retry_limit(struct ieee80211_hw *hw,
1888                                    u32 short_retry, u32 long_retry)
1889 {
1890         struct rt2x00_dev *rt2x00dev = hw->priv;
1891         u32 reg;
1892
1893         rt73usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
1894         rt2x00_set_field32(&reg, TXRX_CSR4_LONG_RETRY_LIMIT, long_retry);
1895         rt2x00_set_field32(&reg, TXRX_CSR4_SHORT_RETRY_LIMIT, short_retry);
1896         rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
1897
1898         return 0;
1899 }
1900
1901 #if 0
1902 /*
1903  * Mac80211 demands get_tsf must be atomic.
1904  * This is not possible for rt73usb since all register access
1905  * functions require sleeping. Untill mac80211 no longer needs
1906  * get_tsf to be atomic, this function should be disabled.
1907  */
1908 static u64 rt73usb_get_tsf(struct ieee80211_hw *hw)
1909 {
1910         struct rt2x00_dev *rt2x00dev = hw->priv;
1911         u64 tsf;
1912         u32 reg;
1913
1914         rt73usb_register_read(rt2x00dev, TXRX_CSR13, &reg);
1915         tsf = (u64) rt2x00_get_field32(reg, TXRX_CSR13_HIGH_TSFTIMER) << 32;
1916         rt73usb_register_read(rt2x00dev, TXRX_CSR12, &reg);
1917         tsf |= rt2x00_get_field32(reg, TXRX_CSR12_LOW_TSFTIMER);
1918
1919         return tsf;
1920 }
1921 #else
1922 #define rt73usb_get_tsf NULL
1923 #endif
1924
1925 static void rt73usb_reset_tsf(struct ieee80211_hw *hw)
1926 {
1927         struct rt2x00_dev *rt2x00dev = hw->priv;
1928
1929         rt73usb_register_write(rt2x00dev, TXRX_CSR12, 0);
1930         rt73usb_register_write(rt2x00dev, TXRX_CSR13, 0);
1931 }
1932
1933 static int rt73usb_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
1934                           struct ieee80211_tx_control *control)
1935 {
1936         struct rt2x00_dev *rt2x00dev = hw->priv;
1937         int timeout;
1938
1939         /*
1940          * Just in case the ieee80211 doesn't set this,
1941          * but we need this queue set for the descriptor
1942          * initialization.
1943          */
1944         control->queue = IEEE80211_TX_QUEUE_BEACON;
1945
1946         /*
1947          * First we create the beacon.
1948          */
1949         skb_push(skb, TXD_DESC_SIZE);
1950         memset(skb->data, 0, TXD_DESC_SIZE);
1951
1952         rt2x00lib_write_tx_desc(rt2x00dev, (struct data_desc *)skb->data,
1953                                 (struct ieee80211_hdr *)(skb->data +
1954                                                          TXD_DESC_SIZE),
1955                                 skb->len - TXD_DESC_SIZE, control);
1956
1957         /*
1958          * Write entire beacon with descriptor to register,
1959          * and kick the beacon generator.
1960          */
1961         timeout = REGISTER_TIMEOUT * (skb->len / sizeof(u32));
1962         rt2x00usb_vendor_request(rt2x00dev, USB_MULTI_WRITE,
1963                                  USB_VENDOR_REQUEST_OUT,
1964                                  HW_BEACON_BASE0, 0x0000,
1965                                  skb->data, skb->len, timeout);
1966         rt73usb_kick_tx_queue(rt2x00dev, IEEE80211_TX_QUEUE_BEACON);
1967
1968         return 0;
1969 }
1970
1971 static const struct ieee80211_ops rt73usb_mac80211_ops = {
1972         .tx                     = rt2x00mac_tx,
1973         .start                  = rt2x00mac_start,
1974         .stop                   = rt2x00mac_stop,
1975         .add_interface          = rt2x00mac_add_interface,
1976         .remove_interface       = rt2x00mac_remove_interface,
1977         .config                 = rt2x00mac_config,
1978         .config_interface       = rt2x00mac_config_interface,
1979         .configure_filter       = rt73usb_configure_filter,
1980         .get_stats              = rt2x00mac_get_stats,
1981         .set_retry_limit        = rt73usb_set_retry_limit,
1982         .erp_ie_changed         = rt2x00mac_erp_ie_changed,
1983         .conf_tx                = rt2x00mac_conf_tx,
1984         .get_tx_stats           = rt2x00mac_get_tx_stats,
1985         .get_tsf                = rt73usb_get_tsf,
1986         .reset_tsf              = rt73usb_reset_tsf,
1987         .beacon_update          = rt73usb_beacon_update,
1988 };
1989
1990 static const struct rt2x00lib_ops rt73usb_rt2x00_ops = {
1991         .probe_hw               = rt73usb_probe_hw,
1992         .get_firmware_name      = rt73usb_get_firmware_name,
1993         .load_firmware          = rt73usb_load_firmware,
1994         .initialize             = rt2x00usb_initialize,
1995         .uninitialize           = rt2x00usb_uninitialize,
1996         .set_device_state       = rt73usb_set_device_state,
1997         .link_stats             = rt73usb_link_stats,
1998         .reset_tuner            = rt73usb_reset_tuner,
1999         .link_tuner             = rt73usb_link_tuner,
2000         .write_tx_desc          = rt73usb_write_tx_desc,
2001         .write_tx_data          = rt2x00usb_write_tx_data,
2002         .get_tx_data_len        = rt73usb_get_tx_data_len,
2003         .kick_tx_queue          = rt73usb_kick_tx_queue,
2004         .fill_rxdone            = rt73usb_fill_rxdone,
2005         .config_mac_addr        = rt73usb_config_mac_addr,
2006         .config_bssid           = rt73usb_config_bssid,
2007         .config_type            = rt73usb_config_type,
2008         .config_preamble        = rt73usb_config_preamble,
2009         .config                 = rt73usb_config,
2010 };
2011
2012 static const struct rt2x00_ops rt73usb_ops = {
2013         .name           = DRV_NAME,
2014         .rxd_size       = RXD_DESC_SIZE,
2015         .txd_size       = TXD_DESC_SIZE,
2016         .eeprom_size    = EEPROM_SIZE,
2017         .rf_size        = RF_SIZE,
2018         .lib            = &rt73usb_rt2x00_ops,
2019         .hw             = &rt73usb_mac80211_ops,
2020 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
2021         .debugfs        = &rt73usb_rt2x00debug,
2022 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
2023 };
2024
2025 /*
2026  * rt73usb module information.
2027  */
2028 static struct usb_device_id rt73usb_device_table[] = {
2029         /* AboCom */
2030         { USB_DEVICE(0x07b8, 0xb21d), USB_DEVICE_DATA(&rt73usb_ops) },
2031         /* Askey */
2032         { USB_DEVICE(0x1690, 0x0722), USB_DEVICE_DATA(&rt73usb_ops) },
2033         /* ASUS */
2034         { USB_DEVICE(0x0b05, 0x1723), USB_DEVICE_DATA(&rt73usb_ops) },
2035         { USB_DEVICE(0x0b05, 0x1724), USB_DEVICE_DATA(&rt73usb_ops) },
2036         /* Belkin */
2037         { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt73usb_ops) },
2038         { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt73usb_ops) },
2039         { USB_DEVICE(0x050d, 0x905b), USB_DEVICE_DATA(&rt73usb_ops) },
2040         { USB_DEVICE(0x050d, 0x905c), USB_DEVICE_DATA(&rt73usb_ops) },
2041         /* Billionton */
2042         { USB_DEVICE(0x1631, 0xc019), USB_DEVICE_DATA(&rt73usb_ops) },
2043         /* Buffalo */
2044         { USB_DEVICE(0x0411, 0x00f4), USB_DEVICE_DATA(&rt73usb_ops) },
2045         /* CNet */
2046         { USB_DEVICE(0x1371, 0x9022), USB_DEVICE_DATA(&rt73usb_ops) },
2047         { USB_DEVICE(0x1371, 0x9032), USB_DEVICE_DATA(&rt73usb_ops) },
2048         /* Conceptronic */
2049         { USB_DEVICE(0x14b2, 0x3c22), USB_DEVICE_DATA(&rt73usb_ops) },
2050         /* D-Link */
2051         { USB_DEVICE(0x07d1, 0x3c03), USB_DEVICE_DATA(&rt73usb_ops) },
2052         { USB_DEVICE(0x07d1, 0x3c04), USB_DEVICE_DATA(&rt73usb_ops) },
2053         /* Gemtek */
2054         { USB_DEVICE(0x15a9, 0x0004), USB_DEVICE_DATA(&rt73usb_ops) },
2055         /* Gigabyte */
2056         { USB_DEVICE(0x1044, 0x8008), USB_DEVICE_DATA(&rt73usb_ops) },
2057         { USB_DEVICE(0x1044, 0x800a), USB_DEVICE_DATA(&rt73usb_ops) },
2058         /* Huawei-3Com */
2059         { USB_DEVICE(0x1472, 0x0009), USB_DEVICE_DATA(&rt73usb_ops) },
2060         /* Hercules */
2061         { USB_DEVICE(0x06f8, 0xe010), USB_DEVICE_DATA(&rt73usb_ops) },
2062         { USB_DEVICE(0x06f8, 0xe020), USB_DEVICE_DATA(&rt73usb_ops) },
2063         /* Linksys */
2064         { USB_DEVICE(0x13b1, 0x0020), USB_DEVICE_DATA(&rt73usb_ops) },
2065         { USB_DEVICE(0x13b1, 0x0023), USB_DEVICE_DATA(&rt73usb_ops) },
2066         /* MSI */
2067         { USB_DEVICE(0x0db0, 0x6877), USB_DEVICE_DATA(&rt73usb_ops) },
2068         { USB_DEVICE(0x0db0, 0x6874), USB_DEVICE_DATA(&rt73usb_ops) },
2069         { USB_DEVICE(0x0db0, 0xa861), USB_DEVICE_DATA(&rt73usb_ops) },
2070         { USB_DEVICE(0x0db0, 0xa874), USB_DEVICE_DATA(&rt73usb_ops) },
2071         /* Ralink */
2072         { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt73usb_ops) },
2073         { USB_DEVICE(0x148f, 0x2671), USB_DEVICE_DATA(&rt73usb_ops) },
2074         /* Qcom */
2075         { USB_DEVICE(0x18e8, 0x6196), USB_DEVICE_DATA(&rt73usb_ops) },
2076         { USB_DEVICE(0x18e8, 0x6229), USB_DEVICE_DATA(&rt73usb_ops) },
2077         { USB_DEVICE(0x18e8, 0x6238), USB_DEVICE_DATA(&rt73usb_ops) },
2078         /* Senao */
2079         { USB_DEVICE(0x1740, 0x7100), USB_DEVICE_DATA(&rt73usb_ops) },
2080         /* Sitecom */
2081         { USB_DEVICE(0x0df6, 0x9712), USB_DEVICE_DATA(&rt73usb_ops) },
2082         { USB_DEVICE(0x0df6, 0x90ac), USB_DEVICE_DATA(&rt73usb_ops) },
2083         /* Surecom */
2084         { USB_DEVICE(0x0769, 0x31f3), USB_DEVICE_DATA(&rt73usb_ops) },
2085         /* Planex */
2086         { USB_DEVICE(0x2019, 0xab01), USB_DEVICE_DATA(&rt73usb_ops) },
2087         { USB_DEVICE(0x2019, 0xab50), USB_DEVICE_DATA(&rt73usb_ops) },
2088         { 0, }
2089 };
2090
2091 MODULE_AUTHOR(DRV_PROJECT);
2092 MODULE_VERSION(DRV_VERSION);
2093 MODULE_DESCRIPTION("Ralink RT73 USB Wireless LAN driver.");
2094 MODULE_SUPPORTED_DEVICE("Ralink RT2571W & RT2671 USB chipset based cards");
2095 MODULE_DEVICE_TABLE(usb, rt73usb_device_table);
2096 MODULE_FIRMWARE(FIRMWARE_RT2571);
2097 MODULE_LICENSE("GPL");
2098
2099 static struct usb_driver rt73usb_driver = {
2100         .name           = DRV_NAME,
2101         .id_table       = rt73usb_device_table,
2102         .probe          = rt2x00usb_probe,
2103         .disconnect     = rt2x00usb_disconnect,
2104         .suspend        = rt2x00usb_suspend,
2105         .resume         = rt2x00usb_resume,
2106 };
2107
2108 static int __init rt73usb_init(void)
2109 {
2110         return usb_register(&rt73usb_driver);
2111 }
2112
2113 static void __exit rt73usb_exit(void)
2114 {
2115         usb_deregister(&rt73usb_driver);
2116 }
2117
2118 module_init(rt73usb_init);
2119 module_exit(rt73usb_exit);