drivers/net/wireless/rtl8180_dev.c

   1
   2 /*
   3  * Linux device driver for RTL8180 / RTL8185
   4  *
   5  * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
   6  * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
   7  *
   8  * Based on the r8180 driver, which is:
   9  * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
  10  *
  11  * Thanks to Realtek for their support!
  12  *
  13  * This program is free software; you can redistribute it and/or modify
  14  * it under the terms of the GNU General Public License version 2 as
  15  * published by the Free Software Foundation.
  16  */
  17
  18 #include <linux/init.h>
  19 #include <linux/pci.h>
  20 #include <linux/delay.h>
  21 #include <linux/etherdevice.h>
  22 #include <linux/eeprom_93cx6.h>
  23 #include <net/mac80211.h>
  24
  25 #include "rtl8180.h"
  26 #include "rtl8180_rtl8225.h"
  27 #include "rtl8180_sa2400.h"
  28 #include "rtl8180_max2820.h"
  29 #include "rtl8180_grf5101.h"
  30
  31 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  32 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
  33 MODULE_DESCRIPTION("RTL8180 / RTL8185 PCI wireless driver");
  34 MODULE_LICENSE("GPL");
  35
  36 static struct pci_device_id rtl8180_table[] __devinitdata = {
  37         /* rtl8185 */
  38         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8185) },
  39         { PCI_DEVICE(PCI_VENDOR_ID_BELKIN, 0x700f) },
  40         { PCI_DEVICE(PCI_VENDOR_ID_BELKIN, 0x701f) },
  41
  42         /* rtl8180 */
  43         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8180) },
  44         { PCI_DEVICE(0x1799, 0x6001) },
  45         { PCI_DEVICE(0x1799, 0x6020) },
  46         { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x3300) },
  47         { }
  48 };
  49
  50 MODULE_DEVICE_TABLE(pci, rtl8180_table);
  51
  52 void rtl8180_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
  53 {
  54         struct rtl8180_priv *priv = dev->priv;
  55         int i = 10;
  56         u32 buf;
  57
  58         buf = (data << 8) | addr;
  59
  60         rtl818x_iowrite32(priv, (__le32 __iomem *)&priv->map->PHY[0], buf | 0x80);
  61         while (i--) {
  62                 rtl818x_iowrite32(priv, (__le32 __iomem *)&priv->map->PHY[0], buf);
  63                 if (rtl818x_ioread8(priv, &priv->map->PHY[2]) == (data & 0xFF))
  64                         return;
  65         }
  66 }
  67
  68 static void rtl8180_handle_rx(struct ieee80211_hw *dev)
  69 {
  70         struct rtl8180_priv *priv = dev->priv;
  71         unsigned int count = 32;
  72
  73         while (count--) {
  74                 struct rtl8180_rx_desc *entry = &priv->rx_ring[priv->rx_idx];
  75                 struct sk_buff *skb = priv->rx_buf[priv->rx_idx];
  76                 u32 flags = le32_to_cpu(entry->flags);
  77
  78                 if (flags & RTL8180_RX_DESC_FLAG_OWN)
  79                         return;
  80
  81                 if (unlikely(flags & (RTL8180_RX_DESC_FLAG_DMA_FAIL |
  82                                       RTL8180_RX_DESC_FLAG_FOF |
  83                                       RTL8180_RX_DESC_FLAG_RX_ERR)))
  84                         goto done;
  85                 else {
  86                         u32 flags2 = le32_to_cpu(entry->flags2);
  87                         struct ieee80211_rx_status rx_status = {0};
  88                         struct sk_buff *new_skb = dev_alloc_skb(MAX_RX_SIZE);
  89
  90                         if (unlikely(!new_skb))
  91                                 goto done;
  92
  93                         pci_unmap_single(priv->pdev,
  94                                          *((dma_addr_t *)skb->cb),
  95                                          MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
  96                         skb_put(skb, flags & 0xFFF);
  97
  98                         rx_status.antenna = (flags2 >> 15) & 1;
  99                         /* TODO: improve signal/rssi reporting */
 100                         rx_status.signal = flags2 & 0xFF;
 101                         rx_status.ssi = (flags2 >> 8) & 0x7F;
 102                         rx_status.rate = (flags >> 20) & 0xF;
 103                         rx_status.freq = dev->conf.freq;
 104                         rx_status.channel = dev->conf.channel;
 105                         rx_status.phymode = dev->conf.phymode;
 106                         rx_status.mactime = le64_to_cpu(entry->tsft);
 107                         rx_status.flag |= RX_FLAG_TSFT;
 108                         if (flags & RTL8180_RX_DESC_FLAG_CRC32_ERR)
 109                                 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
 110
 111                         ieee80211_rx_irqsafe(dev, skb, &rx_status);
 112
 113                         skb = new_skb;
 114                         priv->rx_buf[priv->rx_idx] = skb;
 115                         *((dma_addr_t *) skb->cb) =
 116                                 pci_map_single(priv->pdev, skb_tail_pointer(skb),
 117                                                MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
 118                 }
 119
 120         done:
 121                 entry->rx_buf = cpu_to_le32(*((dma_addr_t *)skb->cb));
 122                 entry->flags = cpu_to_le32(RTL8180_RX_DESC_FLAG_OWN |
 123                                            MAX_RX_SIZE);
 124                 if (priv->rx_idx == 31)
 125                         entry->flags |= cpu_to_le32(RTL8180_RX_DESC_FLAG_EOR);
 126                 priv->rx_idx = (priv->rx_idx + 1) % 32;
 127         }
 128 }
 129
 130 static void rtl8180_handle_tx(struct ieee80211_hw *dev, unsigned int prio)
 131 {
 132         struct rtl8180_priv *priv = dev->priv;
 133         struct rtl8180_tx_ring *ring = &priv->tx_ring[prio];
 134
 135         while (skb_queue_len(&ring->queue)) {
 136                 struct rtl8180_tx_desc *entry = &ring->desc[ring->idx];
 137                 struct sk_buff *skb;
 138                 struct ieee80211_tx_status status = { {0} };
 139                 struct ieee80211_tx_control *control;
 140                 u32 flags = le32_to_cpu(entry->flags);
 141
 142                 if (flags & RTL8180_TX_DESC_FLAG_OWN)
 143                         return;
 144
 145                 ring->idx = (ring->idx + 1) % ring->entries;
 146                 skb = __skb_dequeue(&ring->queue);
 147                 pci_unmap_single(priv->pdev, le32_to_cpu(entry->tx_buf),
 148                                  skb->len, PCI_DMA_TODEVICE);
 149
 150                 control = *((struct ieee80211_tx_control **)skb->cb);
 151                 if (control)
 152                         memcpy(&status.control, control, sizeof(*control));
 153                 kfree(control);
 154
 155                 if (!(status.control.flags & IEEE80211_TXCTL_NO_ACK)) {
 156                         if (flags & RTL8180_TX_DESC_FLAG_TX_OK)
 157                                 status.flags = IEEE80211_TX_STATUS_ACK;
 158                         else
 159                                 status.excessive_retries = 1;
 160                 }
 161                 status.retry_count = flags & 0xFF;
 162
 163                 ieee80211_tx_status_irqsafe(dev, skb, &status);
 164                 if (ring->entries - skb_queue_len(&ring->queue) == 2)
 165                         ieee80211_wake_queue(dev, prio);
 166         }
 167 }
 168
 169 static irqreturn_t rtl8180_interrupt(int irq, void *dev_id)
 170 {
 171         struct ieee80211_hw *dev = dev_id;
 172         struct rtl8180_priv *priv = dev->priv;
 173         u16 reg;
 174
 175         spin_lock(&priv->lock);
 176         reg = rtl818x_ioread16(priv, &priv->map->INT_STATUS);
 177         if (unlikely(reg == 0xFFFF)) {
 178                 spin_unlock(&priv->lock);
 179                 return IRQ_HANDLED;
 180         }
 181
 182         rtl818x_iowrite16(priv, &priv->map->INT_STATUS, reg);
 183
 184         if (reg & (RTL818X_INT_TXB_OK | RTL818X_INT_TXB_ERR))
 185                 rtl8180_handle_tx(dev, 3);
 186
 187         if (reg & (RTL818X_INT_TXH_OK | RTL818X_INT_TXH_ERR))
 188                 rtl8180_handle_tx(dev, 2);
 189
 190         if (reg & (RTL818X_INT_TXN_OK | RTL818X_INT_TXN_ERR))
 191                 rtl8180_handle_tx(dev, 1);
 192
 193         if (reg & (RTL818X_INT_TXL_OK | RTL818X_INT_TXL_ERR))
 194                 rtl8180_handle_tx(dev, 0);
 195
 196         if (reg & (RTL818X_INT_RX_OK | RTL818X_INT_RX_ERR))
 197                 rtl8180_handle_rx(dev);
 198
 199         spin_unlock(&priv->lock);
 200
 201         return IRQ_HANDLED;
 202 }
 203
 204 static int rtl8180_tx(struct ieee80211_hw *dev, struct sk_buff *skb,
 205                       struct ieee80211_tx_control *control)
 206 {
 207         struct rtl8180_priv *priv = dev->priv;
 208         struct rtl8180_tx_ring *ring;
 209         struct rtl8180_tx_desc *entry;
 210         unsigned long flags;
 211         unsigned int idx, prio;
 212         dma_addr_t mapping;
 213         u32 tx_flags;
 214         u16 plcp_len = 0;
 215         __le16 rts_duration = 0;
 216
 217         prio = control->queue;
 218         ring = &priv->tx_ring[prio];
 219
 220         mapping = pci_map_single(priv->pdev, skb->data,
 221                                  skb->len, PCI_DMA_TODEVICE);
 222
 223         tx_flags = RTL8180_TX_DESC_FLAG_OWN | RTL8180_TX_DESC_FLAG_FS |
 224                    RTL8180_TX_DESC_FLAG_LS | (control->tx_rate << 24) |
 225                    (control->rts_cts_rate << 19) | skb->len;
 226
 227         if (priv->r8185)
 228                 tx_flags |= RTL8180_TX_DESC_FLAG_DMA |
 229                             RTL8180_TX_DESC_FLAG_NO_ENC;
 230
 231         if (control->flags & IEEE80211_TXCTL_USE_RTS_CTS)
 232                 tx_flags |= RTL8180_TX_DESC_FLAG_RTS;
 233         else if (control->flags & IEEE80211_TXCTL_USE_CTS_PROTECT)
 234                 tx_flags |= RTL8180_TX_DESC_FLAG_CTS;
 235
 236         *((struct ieee80211_tx_control **) skb->cb) =
 237                 kmemdup(control, sizeof(*control), GFP_ATOMIC);
 238
 239         if (control->flags & IEEE80211_TXCTL_USE_RTS_CTS)
 240                 rts_duration = ieee80211_rts_duration(dev, priv->vif, skb->len,
 241                                                       control);
 242
 243         if (!priv->r8185) {
 244                 unsigned int remainder;
 245
 246                 plcp_len = DIV_ROUND_UP(16 * (skb->len + 4),
 247                                         (control->rate->rate * 2) / 10);
 248                 remainder = (16 * (skb->len + 4)) %
 249                             ((control->rate->rate * 2) / 10);
 250                 if (remainder > 0 && remainder <= 6)
 251                         plcp_len |= 1 << 15;
 252         }
 253
 254         spin_lock_irqsave(&priv->lock, flags);
 255         idx = (ring->idx + skb_queue_len(&ring->queue)) % ring->entries;
 256         entry = &ring->desc[idx];
 257
 258         entry->rts_duration = rts_duration;
 259         entry->plcp_len = cpu_to_le16(plcp_len);
 260         entry->tx_buf = cpu_to_le32(mapping);
 261         entry->frame_len = cpu_to_le32(skb->len);
 262         entry->flags2 = control->alt_retry_rate != -1 ?
 263                         control->alt_retry_rate << 4 : 0;
 264         entry->retry_limit = control->retry_limit;
 265         entry->flags = cpu_to_le32(tx_flags);
 266         __skb_queue_tail(&ring->queue, skb);
 267         if (ring->entries - skb_queue_len(&ring->queue) < 2)
 268                 ieee80211_stop_queue(dev, control->queue);
 269         spin_unlock_irqrestore(&priv->lock, flags);
 270
 271         rtl818x_iowrite8(priv, &priv->map->TX_DMA_POLLING, (1 << (prio + 4)));
 272
 273         return 0;
 274 }
 275
 276 void rtl8180_set_anaparam(struct rtl8180_priv *priv, u32 anaparam)
 277 {
 278         u8 reg;
 279
 280         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 281         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 282         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
 283                  reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
 284         rtl818x_iowrite32(priv, &priv->map->ANAPARAM, anaparam);
 285         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
 286                  reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
 287         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 288 }
 289
 290 static int rtl8180_init_hw(struct ieee80211_hw *dev)
 291 {
 292         struct rtl8180_priv *priv = dev->priv;
 293         u16 reg;
 294
 295         rtl818x_iowrite8(priv, &priv->map->CMD, 0);
 296         rtl818x_ioread8(priv, &priv->map->CMD);
 297         msleep(10);
 298
 299         /* reset */
 300         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
 301         rtl818x_ioread8(priv, &priv->map->CMD);
 302
 303         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 304         reg &= (1 << 1);
 305         reg |= RTL818X_CMD_RESET;
 306         rtl818x_iowrite8(priv, &priv->map->CMD, RTL818X_CMD_RESET);
 307         rtl818x_ioread8(priv, &priv->map->CMD);
 308         msleep(200);
 309
 310         /* check success of reset */
 311         if (rtl818x_ioread8(priv, &priv->map->CMD) & RTL818X_CMD_RESET) {
 312                 printk(KERN_ERR "%s: reset timeout!\n", wiphy_name(dev->wiphy));
 313                 return -ETIMEDOUT;
 314         }
 315
 316         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
 317         rtl818x_ioread8(priv, &priv->map->CMD);
 318         msleep(200);
 319
 320         if (rtl818x_ioread8(priv, &priv->map->CONFIG3) & (1 << 3)) {
 321                 /* For cardbus */
 322                 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 323                 reg |= 1 << 1;
 324                 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 325                 reg = rtl818x_ioread16(priv, &priv->map->FEMR);
 326                 reg |= (1 << 15) | (1 << 14) | (1 << 4);
 327                 rtl818x_iowrite16(priv, &priv->map->FEMR, reg);
 328         }
 329
 330         rtl818x_iowrite8(priv, &priv->map->MSR, 0);
 331
 332         if (!priv->r8185)
 333                 rtl8180_set_anaparam(priv, priv->anaparam);
 334
 335         rtl818x_iowrite32(priv, &priv->map->RDSAR, priv->rx_ring_dma);
 336         rtl818x_iowrite32(priv, &priv->map->TBDA, priv->tx_ring[3].dma);
 337         rtl818x_iowrite32(priv, &priv->map->THPDA, priv->tx_ring[2].dma);
 338         rtl818x_iowrite32(priv, &priv->map->TNPDA, priv->tx_ring[1].dma);
 339         rtl818x_iowrite32(priv, &priv->map->TLPDA, priv->tx_ring[0].dma);
 340
 341         /* TODO: necessary? specs indicate not */
 342         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 343         reg = rtl818x_ioread8(priv, &priv->map->CONFIG2);
 344         rtl818x_iowrite8(priv, &priv->map->CONFIG2, reg & ~(1 << 3));
 345         if (priv->r8185) {
 346                 reg = rtl818x_ioread8(priv, &priv->map->CONFIG2);
 347                 rtl818x_iowrite8(priv, &priv->map->CONFIG2, reg | (1 << 4));
 348         }
 349         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 350
 351         /* TODO: set CONFIG5 for calibrating AGC on rtl8180 + philips radio? */
 352
 353         /* TODO: turn off hw wep on rtl8180 */
 354
 355         rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
 356
 357         if (priv->r8185) {
 358                 rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
 359                 rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81);
 360                 rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
 361
 362                 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
 363
 364                 /* TODO: set ClkRun enable? necessary? */
 365                 reg = rtl818x_ioread8(priv, &priv->map->GP_ENABLE);
 366                 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, reg & ~(1 << 6));
 367                 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 368                 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 369                 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | (1 << 2));
 370                 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 371         } else {
 372                 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x1);
 373                 rtl818x_iowrite8(priv, &priv->map->SECURITY, 0);
 374
 375                 rtl818x_iowrite8(priv, &priv->map->PHY_DELAY, 0x6);
 376                 rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER, 0x4C);
 377         }
 378
 379         priv->rf->init(dev);
 380         if (priv->r8185)
 381                 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
 382         return 0;
 383 }
 384
 385 static int rtl8180_init_rx_ring(struct ieee80211_hw *dev)
 386 {
 387         struct rtl8180_priv *priv = dev->priv;
 388         struct rtl8180_rx_desc *entry;
 389         int i;
 390
 391         priv->rx_ring = pci_alloc_consistent(priv->pdev,
 392                                              sizeof(*priv->rx_ring) * 32,
 393                                              &priv->rx_ring_dma);
 394
 395         if (!priv->rx_ring || (unsigned long)priv->rx_ring & 0xFF) {
 396                 printk(KERN_ERR "%s: Cannot allocate RX ring\n",
 397                        wiphy_name(dev->wiphy));
 398                 return -ENOMEM;
 399         }
 400
 401         memset(priv->rx_ring, 0, sizeof(*priv->rx_ring) * 32);
 402         priv->rx_idx = 0;
 403
 404         for (i = 0; i < 32; i++) {
 405                 struct sk_buff *skb = dev_alloc_skb(MAX_RX_SIZE);
 406                 dma_addr_t *mapping;
 407                 entry = &priv->rx_ring[i];
 408                 if (!skb)
 409                         return 0;
 410
 411                 priv->rx_buf[i] = skb;
 412                 mapping = (dma_addr_t *)skb->cb;
 413                 *mapping = pci_map_single(priv->pdev, skb_tail_pointer(skb),
 414                                           MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
 415                 entry->rx_buf = cpu_to_le32(*mapping);
 416                 entry->flags = cpu_to_le32(RTL8180_RX_DESC_FLAG_OWN |
 417                                            MAX_RX_SIZE);
 418         }
 419         entry->flags |= cpu_to_le32(RTL8180_RX_DESC_FLAG_EOR);
 420         return 0;
 421 }
 422
 423 static void rtl8180_free_rx_ring(struct ieee80211_hw *dev)
 424 {
 425         struct rtl8180_priv *priv = dev->priv;
 426         int i;
 427
 428         for (i = 0; i < 32; i++) {
 429                 struct sk_buff *skb = priv->rx_buf[i];
 430                 if (!skb)
 431                         continue;
 432
 433                 pci_unmap_single(priv->pdev,
 434                                  *((dma_addr_t *)skb->cb),
 435                                  MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
 436                 kfree_skb(skb);
 437         }
 438
 439         pci_free_consistent(priv->pdev, sizeof(*priv->rx_ring) * 32,
 440                             priv->rx_ring, priv->rx_ring_dma);
 441         priv->rx_ring = NULL;
 442 }
 443
 444 static int rtl8180_init_tx_ring(struct ieee80211_hw *dev,
 445                                 unsigned int prio, unsigned int entries)
 446 {
 447         struct rtl8180_priv *priv = dev->priv;
 448         struct rtl8180_tx_desc *ring;
 449         dma_addr_t dma;
 450         int i;
 451
 452         ring = pci_alloc_consistent(priv->pdev, sizeof(*ring) * entries, &dma);
 453         if (!ring || (unsigned long)ring & 0xFF) {
 454                 printk(KERN_ERR "%s: Cannot allocate TX ring (prio = %d)\n",
 455                        wiphy_name(dev->wiphy), prio);
 456                 return -ENOMEM;
 457         }
 458
 459         memset(ring, 0, sizeof(*ring)*entries);
 460         priv->tx_ring[prio].desc = ring;
 461         priv->tx_ring[prio].dma = dma;
 462         priv->tx_ring[prio].idx = 0;
 463         priv->tx_ring[prio].entries = entries;
 464         skb_queue_head_init(&priv->tx_ring[prio].queue);
 465
 466         for (i = 0; i < entries; i++)
 467                 ring[i].next_tx_desc =
 468                         cpu_to_le32((u32)dma + ((i + 1) % entries) * sizeof(*ring));
 469
 470         return 0;
 471 }
 472
 473 static void rtl8180_free_tx_ring(struct ieee80211_hw *dev, unsigned int prio)
 474 {
 475         struct rtl8180_priv *priv = dev->priv;
 476         struct rtl8180_tx_ring *ring = &priv->tx_ring[prio];
 477
 478         while (skb_queue_len(&ring->queue)) {
 479                 struct rtl8180_tx_desc *entry = &ring->desc[ring->idx];
 480                 struct sk_buff *skb = __skb_dequeue(&ring->queue);
 481
 482                 pci_unmap_single(priv->pdev, le32_to_cpu(entry->tx_buf),
 483                                  skb->len, PCI_DMA_TODEVICE);
 484                 kfree(*((struct ieee80211_tx_control **) skb->cb));
 485                 kfree_skb(skb);
 486                 ring->idx = (ring->idx + 1) % ring->entries;
 487         }
 488
 489         pci_free_consistent(priv->pdev, sizeof(*ring->desc)*ring->entries,
 490                             ring->desc, ring->dma);
 491         ring->desc = NULL;
 492 }
 493
 494 static int rtl8180_start(struct ieee80211_hw *dev)
 495 {
 496         struct rtl8180_priv *priv = dev->priv;
 497         int ret, i;
 498         u32 reg;
 499
 500         ret = rtl8180_init_rx_ring(dev);
 501         if (ret)
 502                 return ret;
 503
 504         for (i = 0; i < 4; i++)
 505                 if ((ret = rtl8180_init_tx_ring(dev, i, 16)))
 506                         goto err_free_rings;
 507
 508         ret = rtl8180_init_hw(dev);
 509         if (ret)
 510                 goto err_free_rings;
 511
 512         rtl818x_iowrite32(priv, &priv->map->RDSAR, priv->rx_ring_dma);
 513         rtl818x_iowrite32(priv, &priv->map->TBDA, priv->tx_ring[3].dma);
 514         rtl818x_iowrite32(priv, &priv->map->THPDA, priv->tx_ring[2].dma);
 515         rtl818x_iowrite32(priv, &priv->map->TNPDA, priv->tx_ring[1].dma);
 516         rtl818x_iowrite32(priv, &priv->map->TLPDA, priv->tx_ring[0].dma);
 517
 518         ret = request_irq(priv->pdev->irq, &rtl8180_interrupt,
 519                           IRQF_SHARED, KBUILD_MODNAME, dev);
 520         if (ret) {
 521                 printk(KERN_ERR "%s: failed to register IRQ handler\n",
 522                        wiphy_name(dev->wiphy));
 523                 goto err_free_rings;
 524         }
 525
 526         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
 527
 528         rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
 529         rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
 530
 531         reg = RTL818X_RX_CONF_ONLYERLPKT |
 532               RTL818X_RX_CONF_RX_AUTORESETPHY |
 533               RTL818X_RX_CONF_MGMT |
 534               RTL818X_RX_CONF_DATA |
 535               (7 << 8 /* MAX RX DMA */) |
 536               RTL818X_RX_CONF_BROADCAST |
 537               RTL818X_RX_CONF_NICMAC;
 538
 539         if (priv->r8185)
 540                 reg |= RTL818X_RX_CONF_CSDM1 | RTL818X_RX_CONF_CSDM2;
 541         else {
 542                 reg |= (priv->rfparam & RF_PARAM_CARRIERSENSE1)
 543                         ? RTL818X_RX_CONF_CSDM1 : 0;
 544                 reg |= (priv->rfparam & RF_PARAM_CARRIERSENSE2)
 545                         ? RTL818X_RX_CONF_CSDM2 : 0;
 546         }
 547
 548         priv->rx_conf = reg;
 549         rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
 550
 551         if (priv->r8185) {
 552                 reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
 553                 reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
 554                 reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
 555                 rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
 556
 557                 reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
 558                 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
 559                 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
 560                 reg |=  RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
 561                 rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
 562
 563                 /* disable early TX */
 564                 rtl818x_iowrite8(priv, (u8 __iomem *)priv->map + 0xec, 0x3f);
 565         }
 566
 567         reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
 568         reg |= (6 << 21 /* MAX TX DMA */) |
 569                RTL818X_TX_CONF_NO_ICV;
 570
 571         if (priv->r8185)
 572                 reg &= ~RTL818X_TX_CONF_PROBE_DTS;
 573         else
 574                 reg &= ~RTL818X_TX_CONF_HW_SEQNUM;
 575
 576         /* different meaning, same value on both rtl8185 and rtl8180 */
 577         reg &= ~RTL818X_TX_CONF_SAT_HWPLCP;
 578
 579         rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
 580
 581         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 582         reg |= RTL818X_CMD_RX_ENABLE;
 583         reg |= RTL818X_CMD_TX_ENABLE;
 584         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 585
 586         priv->mode = IEEE80211_IF_TYPE_MNTR;
 587         return 0;
 588
 589  err_free_rings:
 590         rtl8180_free_rx_ring(dev);
 591         for (i = 0; i < 4; i++)
 592                 if (priv->tx_ring[i].desc)
 593                         rtl8180_free_tx_ring(dev, i);
 594
 595         return ret;
 596 }
 597
 598 static void rtl8180_stop(struct ieee80211_hw *dev)
 599 {
 600         struct rtl8180_priv *priv = dev->priv;
 601         u8 reg;
 602         int i;
 603
 604         priv->mode = IEEE80211_IF_TYPE_INVALID;
 605
 606         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
 607
 608         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 609         reg &= ~RTL818X_CMD_TX_ENABLE;
 610         reg &= ~RTL818X_CMD_RX_ENABLE;
 611         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 612
 613         priv->rf->stop(dev);
 614
 615         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 616         reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
 617         rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
 618         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 619
 620         free_irq(priv->pdev->irq, dev);
 621
 622         rtl8180_free_rx_ring(dev);
 623         for (i = 0; i < 4; i++)
 624                 rtl8180_free_tx_ring(dev, i);
 625 }
 626
 627 static int rtl8180_add_interface(struct ieee80211_hw *dev,
 628                                  struct ieee80211_if_init_conf *conf)
 629 {
 630         struct rtl8180_priv *priv = dev->priv;
 631
 632         if (priv->mode != IEEE80211_IF_TYPE_MNTR)
 633                 return -EOPNOTSUPP;
 634
 635         switch (conf->type) {
 636         case IEEE80211_IF_TYPE_STA:
 637                 priv->mode = conf->type;
 638                 break;
 639         default:
 640                 return -EOPNOTSUPP;
 641         }
 642
 643         priv->vif = conf->vif;
 644
 645         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 646         rtl818x_iowrite32(priv, (__le32 __iomem *)&priv->map->MAC[0],
 647                           cpu_to_le32(*(u32 *)conf->mac_addr));
 648         rtl818x_iowrite16(priv, (__le16 __iomem *)&priv->map->MAC[4],
 649                           cpu_to_le16(*(u16 *)(conf->mac_addr + 4)));
 650         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 651
 652         return 0;
 653 }
 654
 655 static void rtl8180_remove_interface(struct ieee80211_hw *dev,
 656                                      struct ieee80211_if_init_conf *conf)
 657 {
 658         struct rtl8180_priv *priv = dev->priv;
 659         priv->mode = IEEE80211_IF_TYPE_MNTR;
 660         priv->vif = NULL;
 661 }
 662
 663 static int rtl8180_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf)
 664 {
 665         struct rtl8180_priv *priv = dev->priv;
 666
 667         priv->rf->set_chan(dev, conf);
 668
 669         return 0;
 670 }
 671
 672 static int rtl8180_config_interface(struct ieee80211_hw *dev,
 673                                     struct ieee80211_vif *vif,
 674                                     struct ieee80211_if_conf *conf)
 675 {
 676         struct rtl8180_priv *priv = dev->priv;
 677         int i;
 678
 679         for (i = 0; i < ETH_ALEN; i++)
 680                 rtl818x_iowrite8(priv, &priv->map->BSSID[i], conf->bssid[i]);
 681
 682         if (is_valid_ether_addr(conf->bssid))
 683                 rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_INFRA);
 684         else
 685                 rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_NO_LINK);
 686
 687         return 0;
 688 }
 689
 690 static void rtl8180_configure_filter(struct ieee80211_hw *dev,
 691                                      unsigned int changed_flags,
 692                                      unsigned int *total_flags,
 693                                      int mc_count, struct dev_addr_list *mclist)
 694 {
 695         struct rtl8180_priv *priv = dev->priv;
 696
 697         if (changed_flags & FIF_FCSFAIL)
 698                 priv->rx_conf ^= RTL818X_RX_CONF_FCS;
 699         if (changed_flags & FIF_CONTROL)
 700                 priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
 701         if (changed_flags & FIF_OTHER_BSS)
 702                 priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
 703         if (*total_flags & FIF_ALLMULTI || mc_count > 0)
 704                 priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
 705         else
 706                 priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
 707
 708         *total_flags = 0;
 709
 710         if (priv->rx_conf & RTL818X_RX_CONF_FCS)
 711                 *total_flags |= FIF_FCSFAIL;
 712         if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
 713                 *total_flags |= FIF_CONTROL;
 714         if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
 715                 *total_flags |= FIF_OTHER_BSS;
 716         if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
 717                 *total_flags |= FIF_ALLMULTI;
 718
 719         rtl818x_iowrite32(priv, &priv->map->RX_CONF, priv->rx_conf);
 720 }
 721
 722 static const struct ieee80211_ops rtl8180_ops = {
 723         .tx                     = rtl8180_tx,
 724         .start                  = rtl8180_start,
 725         .stop                   = rtl8180_stop,
 726         .add_interface          = rtl8180_add_interface,
 727         .remove_interface       = rtl8180_remove_interface,
 728         .config                 = rtl8180_config,
 729         .config_interface       = rtl8180_config_interface,
 730         .configure_filter       = rtl8180_configure_filter,
 731 };
 732
 733 static void rtl8180_eeprom_register_read(struct eeprom_93cx6 *eeprom)
 734 {
 735         struct ieee80211_hw *dev = eeprom->data;
 736         struct rtl8180_priv *priv = dev->priv;
 737         u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
 738
 739         eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
 740         eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
 741         eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
 742         eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
 743 }
 744
 745 static void rtl8180_eeprom_register_write(struct eeprom_93cx6 *eeprom)
 746 {
 747         struct ieee80211_hw *dev = eeprom->data;
 748         struct rtl8180_priv *priv = dev->priv;
 749         u8 reg = 2 << 6;
 750
 751         if (eeprom->reg_data_in)
 752                 reg |= RTL818X_EEPROM_CMD_WRITE;
 753         if (eeprom->reg_data_out)
 754                 reg |= RTL818X_EEPROM_CMD_READ;
 755         if (eeprom->reg_data_clock)
 756                 reg |= RTL818X_EEPROM_CMD_CK;
 757         if (eeprom->reg_chip_select)
 758                 reg |= RTL818X_EEPROM_CMD_CS;
 759
 760         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
 761         rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
 762         udelay(10);
 763 }
 764
 765 static int __devinit rtl8180_probe(struct pci_dev *pdev,
 766                                    const struct pci_device_id *id)
 767 {
 768         struct ieee80211_hw *dev;
 769         struct rtl8180_priv *priv;
 770         unsigned long mem_addr, mem_len;
 771         unsigned int io_addr, io_len;
 772         int err, i;
 773         struct eeprom_93cx6 eeprom;
 774         const char *chip_name, *rf_name = NULL;
 775         u32 reg;
 776         u16 eeprom_val;
 777         DECLARE_MAC_BUF(mac);
 778
 779         err = pci_enable_device(pdev);
 780         if (err) {
 781                 printk(KERN_ERR "%s (rtl8180): Cannot enable new PCI device\n",
 782                        pci_name(pdev));
 783                 return err;
 784         }
 785
 786         err = pci_request_regions(pdev, KBUILD_MODNAME);
 787         if (err) {
 788                 printk(KERN_ERR "%s (rtl8180): Cannot obtain PCI resources\n",
 789                        pci_name(pdev));
 790                 return err;
 791         }
 792
 793         io_addr = pci_resource_start(pdev, 0);
 794         io_len = pci_resource_len(pdev, 0);
 795         mem_addr = pci_resource_start(pdev, 1);
 796         mem_len = pci_resource_len(pdev, 1);
 797
 798         if (mem_len < sizeof(struct rtl818x_csr) ||
 799             io_len < sizeof(struct rtl818x_csr)) {
 800                 printk(KERN_ERR "%s (rtl8180): Too short PCI resources\n",
 801                        pci_name(pdev));
 802                 err = -ENOMEM;
 803                 goto err_free_reg;
 804         }
 805
 806         if ((err = pci_set_dma_mask(pdev, 0xFFFFFF00ULL)) ||
 807             (err = pci_set_consistent_dma_mask(pdev, 0xFFFFFF00ULL))) {
 808                 printk(KERN_ERR "%s (rtl8180): No suitable DMA available\n",
 809                        pci_name(pdev));
 810                 goto err_free_reg;
 811         }
 812
 813         pci_set_master(pdev);
 814
 815         dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8180_ops);
 816         if (!dev) {
 817                 printk(KERN_ERR "%s (rtl8180): ieee80211 alloc failed\n",
 818                        pci_name(pdev));
 819                 err = -ENOMEM;
 820                 goto err_free_reg;
 821         }
 822
 823         priv = dev->priv;
 824         priv->pdev = pdev;
 825
 826         SET_IEEE80211_DEV(dev, &pdev->dev);
 827         pci_set_drvdata(pdev, dev);
 828
 829         priv->map = pci_iomap(pdev, 1, mem_len);
 830         if (!priv->map)
 831                 priv->map = pci_iomap(pdev, 0, io_len);
 832
 833         if (!priv->map) {
 834                 printk(KERN_ERR "%s (rtl8180): Cannot map device memory\n",
 835                        pci_name(pdev));
 836                 goto err_free_dev;
 837         }
 838
 839         memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
 840         memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
 841         priv->modes[0].mode = MODE_IEEE80211G;
 842         priv->modes[0].num_rates = ARRAY_SIZE(rtl818x_rates);
 843         priv->modes[0].rates = priv->rates;
 844         priv->modes[0].num_channels = ARRAY_SIZE(rtl818x_channels);
 845         priv->modes[0].channels = priv->channels;
 846         priv->modes[1].mode = MODE_IEEE80211B;
 847         priv->modes[1].num_rates = 4;
 848         priv->modes[1].rates = priv->rates;
 849         priv->modes[1].num_channels = ARRAY_SIZE(rtl818x_channels);
 850         priv->modes[1].channels = priv->channels;
 851         priv->mode = IEEE80211_IF_TYPE_INVALID;
 852         dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
 853                      IEEE80211_HW_RX_INCLUDES_FCS;
 854         dev->queues = 1;
 855         dev->max_rssi = 65;
 856
 857         reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
 858         reg &= RTL818X_TX_CONF_HWVER_MASK;
 859         switch (reg) {
 860         case RTL818X_TX_CONF_R8180_ABCD:
 861                 chip_name = "RTL8180";
 862                 break;
 863         case RTL818X_TX_CONF_R8180_F:
 864                 chip_name = "RTL8180vF";
 865                 break;
 866         case RTL818X_TX_CONF_R8185_ABC:
 867                 chip_name = "RTL8185";
 868                 break;
 869         case RTL818X_TX_CONF_R8185_D:
 870                 chip_name = "RTL8185vD";
 871                 break;
 872         default:
 873                 printk(KERN_ERR "%s (rtl8180): Unknown chip! (0x%x)\n",
 874                        pci_name(pdev), reg >> 25);
 875                 goto err_iounmap;
 876         }
 877
 878         priv->r8185 = reg & RTL818X_TX_CONF_R8185_ABC;
 879         if (priv->r8185) {
 880                 if ((err = ieee80211_register_hwmode(dev, &priv->modes[0])))
 881                         goto err_iounmap;
 882
 883                 pci_try_set_mwi(pdev);
 884         }
 885
 886         if ((err = ieee80211_register_hwmode(dev, &priv->modes[1])))
 887                 goto err_iounmap;
 888
 889         eeprom.data = dev;
 890         eeprom.register_read = rtl8180_eeprom_register_read;
 891         eeprom.register_write = rtl8180_eeprom_register_write;
 892         if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
 893                 eeprom.width = PCI_EEPROM_WIDTH_93C66;
 894         else
 895                 eeprom.width = PCI_EEPROM_WIDTH_93C46;
 896
 897         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_PROGRAM);
 898         rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
 899         udelay(10);
 900
 901         eeprom_93cx6_read(&eeprom, 0x06, &eeprom_val);
 902         eeprom_val &= 0xFF;
 903         switch (eeprom_val) {
 904         case 1: rf_name = "Intersil";
 905                 break;
 906         case 2: rf_name = "RFMD";
 907                 break;
 908         case 3: priv->rf = &sa2400_rf_ops;
 909                 break;
 910         case 4: priv->rf = &max2820_rf_ops;
 911                 break;
 912         case 5: priv->rf = &grf5101_rf_ops;
 913                 break;
 914         case 9: priv->rf = rtl8180_detect_rf(dev);
 915                 break;
 916         case 10:
 917                 rf_name = "RTL8255";
 918                 break;
 919         default:
 920                 printk(KERN_ERR "%s (rtl8180): Unknown RF! (0x%x)\n",
 921                        pci_name(pdev), eeprom_val);
 922                 goto err_iounmap;
 923         }
 924
 925         if (!priv->rf) {
 926                 printk(KERN_ERR "%s (rtl8180): %s RF frontend not supported!\n",
 927                        pci_name(pdev), rf_name);
 928                 goto err_iounmap;
 929         }
 930
 931         eeprom_93cx6_read(&eeprom, 0x17, &eeprom_val);
 932         priv->csthreshold = eeprom_val >> 8;
 933         if (!priv->r8185) {
 934                 __le32 anaparam;
 935                 eeprom_93cx6_multiread(&eeprom, 0xD, (__le16 *)&anaparam, 2);
 936                 priv->anaparam = le32_to_cpu(anaparam);
 937                 eeprom_93cx6_read(&eeprom, 0x19, &priv->rfparam);
 938         }
 939
 940         eeprom_93cx6_multiread(&eeprom, 0x7, (__le16 *)dev->wiphy->perm_addr, 3);
 941         if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
 942                 printk(KERN_WARNING "%s (rtl8180): Invalid hwaddr! Using"
 943                        " randomly generated MAC addr\n", pci_name(pdev));
 944                 random_ether_addr(dev->wiphy->perm_addr);
 945         }
 946
 947         /* CCK TX power */
 948         for (i = 0; i < 14; i += 2) {
 949                 u16 txpwr;
 950                 eeprom_93cx6_read(&eeprom, 0x10 + (i >> 1), &txpwr);
 951                 priv->channels[i].val = txpwr & 0xFF;
 952                 priv->channels[i + 1].val = txpwr >> 8;
 953         }
 954
 955         /* OFDM TX power */
 956         if (priv->r8185) {
 957                 for (i = 0; i < 14; i += 2) {
 958                         u16 txpwr;
 959                         eeprom_93cx6_read(&eeprom, 0x20 + (i >> 1), &txpwr);
 960                         priv->channels[i].val |= (txpwr & 0xFF) << 8;
 961                         priv->channels[i + 1].val |= txpwr & 0xFF00;
 962                 }
 963         }
 964
 965         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 966
 967         spin_lock_init(&priv->lock);
 968
 969         err = ieee80211_register_hw(dev);
 970         if (err) {
 971                 printk(KERN_ERR "%s (rtl8180): Cannot register device\n",
 972                        pci_name(pdev));
 973                 goto err_iounmap;
 974         }
 975
 976         printk(KERN_INFO "%s: hwaddr %s, %s + %s\n",
 977                wiphy_name(dev->wiphy), print_mac(mac, dev->wiphy->perm_addr),
 978                chip_name, priv->rf->name);
 979
 980         return 0;
 981
 982  err_iounmap:
 983         iounmap(priv->map);
 984
 985  err_free_dev:
 986         pci_set_drvdata(pdev, NULL);
 987         ieee80211_free_hw(dev);
 988
 989  err_free_reg:
 990         pci_release_regions(pdev);
 991         pci_disable_device(pdev);
 992         return err;
 993 }
 994
 995 static void __devexit rtl8180_remove(struct pci_dev *pdev)
 996 {
 997         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
 998         struct rtl8180_priv *priv;
 999
1000         if (!dev)
1001                 return;
1002
1003         ieee80211_unregister_hw(dev);
1004
1005         priv = dev->priv;
1006
1007         pci_iounmap(pdev, priv->map);
1008         pci_release_regions(pdev);
1009         pci_disable_device(pdev);
1010         ieee80211_free_hw(dev);
1011 }
1012
1013 #ifdef CONFIG_PM
1014 static int rtl8180_suspend(struct pci_dev *pdev, pm_message_t state)
1015 {
1016         pci_save_state(pdev);
1017         pci_set_power_state(pdev, pci_choose_state(pdev, state));
1018         return 0;
1019 }
1020
1021 static int rtl8180_resume(struct pci_dev *pdev)
1022 {
1023         pci_set_power_state(pdev, PCI_D0);
1024         pci_restore_state(pdev);
1025         return 0;
1026 }
1027
1028 #endif /* CONFIG_PM */
1029
1030 static struct pci_driver rtl8180_driver = {
1031         .name           = KBUILD_MODNAME,
1032         .id_table       = rtl8180_table,
1033         .probe          = rtl8180_probe,
1034         .remove         = __devexit_p(rtl8180_remove),
1035 #ifdef CONFIG_PM
1036         .suspend        = rtl8180_suspend,
1037         .resume         = rtl8180_resume,
1038 #endif /* CONFIG_PM */
1039 };
1040
1041 static int __init rtl8180_init(void)
1042 {
1043         return pci_register_driver(&rtl8180_driver);
1044 }
1045
1046 static void __exit rtl8180_exit(void)
1047 {
1048         pci_unregister_driver(&rtl8180_driver);
1049 }
1050
1051 module_init(rtl8180_init);
1052 module_exit(rtl8180_exit);