3 * Linux MegaRAID driver for SAS based RAID controllers
5 * Copyright (c) 2003-2005 LSI Logic Corporation.
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
12 * FILE : megaraid_sas.h
15 #ifndef LSI_MEGARAID_SAS_H
16 #define LSI_MEGARAID_SAS_H
19 * MegaRAID SAS Driver meta data
21 #define MEGASAS_VERSION "00.00.02.02"
22 #define MEGASAS_RELDATE "Jan 23, 2006"
23 #define MEGASAS_EXT_VERSION "Mon Jan 23 14:09:01 PST 2006"
25 * =====================================
26 * MegaRAID SAS MFI firmware definitions
27 * =====================================
31 * MFI stands for MegaRAID SAS FW Interface. This is just a moniker for
32 * protocol between the software and firmware. Commands are issued using
37 * FW posts its state in upper 4 bits of outbound_msg_0 register
39 #define MFI_STATE_MASK 0xF0000000
40 #define MFI_STATE_UNDEFINED 0x00000000
41 #define MFI_STATE_BB_INIT 0x10000000
42 #define MFI_STATE_FW_INIT 0x40000000
43 #define MFI_STATE_WAIT_HANDSHAKE 0x60000000
44 #define MFI_STATE_FW_INIT_2 0x70000000
45 #define MFI_STATE_DEVICE_SCAN 0x80000000
46 #define MFI_STATE_FLUSH_CACHE 0xA0000000
47 #define MFI_STATE_READY 0xB0000000
48 #define MFI_STATE_OPERATIONAL 0xC0000000
49 #define MFI_STATE_FAULT 0xF0000000
51 #define MEGAMFI_FRAME_SIZE 64
54 * During FW init, clear pending cmds & reset state using inbound_msg_0
56 * ABORT : Abort all pending cmds
57 * READY : Move from OPERATIONAL to READY state; discard queue info
58 * MFIMODE : Discard (possible) low MFA posted in 64-bit mode (??)
59 * CLR_HANDSHAKE: FW is waiting for HANDSHAKE from BIOS or Driver
61 #define MFI_INIT_ABORT 0x00000000
62 #define MFI_INIT_READY 0x00000002
63 #define MFI_INIT_MFIMODE 0x00000004
64 #define MFI_INIT_CLEAR_HANDSHAKE 0x00000008
65 #define MFI_RESET_FLAGS MFI_INIT_READY|MFI_INIT_MFIMODE
70 #define MFI_FRAME_POST_IN_REPLY_QUEUE 0x0000
71 #define MFI_FRAME_DONT_POST_IN_REPLY_QUEUE 0x0001
72 #define MFI_FRAME_SGL32 0x0000
73 #define MFI_FRAME_SGL64 0x0002
74 #define MFI_FRAME_SENSE32 0x0000
75 #define MFI_FRAME_SENSE64 0x0004
76 #define MFI_FRAME_DIR_NONE 0x0000
77 #define MFI_FRAME_DIR_WRITE 0x0008
78 #define MFI_FRAME_DIR_READ 0x0010
79 #define MFI_FRAME_DIR_BOTH 0x0018
82 * Definition for cmd_status
84 #define MFI_CMD_STATUS_POLL_MODE 0xFF
89 #define MFI_CMD_INIT 0x00
90 #define MFI_CMD_LD_READ 0x01
91 #define MFI_CMD_LD_WRITE 0x02
92 #define MFI_CMD_LD_SCSI_IO 0x03
93 #define MFI_CMD_PD_SCSI_IO 0x04
94 #define MFI_CMD_DCMD 0x05
95 #define MFI_CMD_ABORT 0x06
96 #define MFI_CMD_SMP 0x07
97 #define MFI_CMD_STP 0x08
99 #define MR_DCMD_CTRL_GET_INFO 0x01010000
101 #define MR_DCMD_CTRL_CACHE_FLUSH 0x01101000
102 #define MR_FLUSH_CTRL_CACHE 0x01
103 #define MR_FLUSH_DISK_CACHE 0x02
105 #define MR_DCMD_CTRL_SHUTDOWN 0x01050000
106 #define MR_ENABLE_DRIVE_SPINDOWN 0x01
108 #define MR_DCMD_CTRL_EVENT_GET_INFO 0x01040100
109 #define MR_DCMD_CTRL_EVENT_GET 0x01040300
110 #define MR_DCMD_CTRL_EVENT_WAIT 0x01040500
111 #define MR_DCMD_LD_GET_PROPERTIES 0x03030000
113 #define MR_DCMD_CLUSTER 0x08000000
114 #define MR_DCMD_CLUSTER_RESET_ALL 0x08010100
115 #define MR_DCMD_CLUSTER_RESET_LD 0x08010200
118 * MFI command completion codes
122 MFI_STAT_INVALID_CMD = 0x01,
123 MFI_STAT_INVALID_DCMD = 0x02,
124 MFI_STAT_INVALID_PARAMETER = 0x03,
125 MFI_STAT_INVALID_SEQUENCE_NUMBER = 0x04,
126 MFI_STAT_ABORT_NOT_POSSIBLE = 0x05,
127 MFI_STAT_APP_HOST_CODE_NOT_FOUND = 0x06,
128 MFI_STAT_APP_IN_USE = 0x07,
129 MFI_STAT_APP_NOT_INITIALIZED = 0x08,
130 MFI_STAT_ARRAY_INDEX_INVALID = 0x09,
131 MFI_STAT_ARRAY_ROW_NOT_EMPTY = 0x0a,
132 MFI_STAT_CONFIG_RESOURCE_CONFLICT = 0x0b,
133 MFI_STAT_DEVICE_NOT_FOUND = 0x0c,
134 MFI_STAT_DRIVE_TOO_SMALL = 0x0d,
135 MFI_STAT_FLASH_ALLOC_FAIL = 0x0e,
136 MFI_STAT_FLASH_BUSY = 0x0f,
137 MFI_STAT_FLASH_ERROR = 0x10,
138 MFI_STAT_FLASH_IMAGE_BAD = 0x11,
139 MFI_STAT_FLASH_IMAGE_INCOMPLETE = 0x12,
140 MFI_STAT_FLASH_NOT_OPEN = 0x13,
141 MFI_STAT_FLASH_NOT_STARTED = 0x14,
142 MFI_STAT_FLUSH_FAILED = 0x15,
143 MFI_STAT_HOST_CODE_NOT_FOUNT = 0x16,
144 MFI_STAT_LD_CC_IN_PROGRESS = 0x17,
145 MFI_STAT_LD_INIT_IN_PROGRESS = 0x18,
146 MFI_STAT_LD_LBA_OUT_OF_RANGE = 0x19,
147 MFI_STAT_LD_MAX_CONFIGURED = 0x1a,
148 MFI_STAT_LD_NOT_OPTIMAL = 0x1b,
149 MFI_STAT_LD_RBLD_IN_PROGRESS = 0x1c,
150 MFI_STAT_LD_RECON_IN_PROGRESS = 0x1d,
151 MFI_STAT_LD_WRONG_RAID_LEVEL = 0x1e,
152 MFI_STAT_MAX_SPARES_EXCEEDED = 0x1f,
153 MFI_STAT_MEMORY_NOT_AVAILABLE = 0x20,
154 MFI_STAT_MFC_HW_ERROR = 0x21,
155 MFI_STAT_NO_HW_PRESENT = 0x22,
156 MFI_STAT_NOT_FOUND = 0x23,
157 MFI_STAT_NOT_IN_ENCL = 0x24,
158 MFI_STAT_PD_CLEAR_IN_PROGRESS = 0x25,
159 MFI_STAT_PD_TYPE_WRONG = 0x26,
160 MFI_STAT_PR_DISABLED = 0x27,
161 MFI_STAT_ROW_INDEX_INVALID = 0x28,
162 MFI_STAT_SAS_CONFIG_INVALID_ACTION = 0x29,
163 MFI_STAT_SAS_CONFIG_INVALID_DATA = 0x2a,
164 MFI_STAT_SAS_CONFIG_INVALID_PAGE = 0x2b,
165 MFI_STAT_SAS_CONFIG_INVALID_TYPE = 0x2c,
166 MFI_STAT_SCSI_DONE_WITH_ERROR = 0x2d,
167 MFI_STAT_SCSI_IO_FAILED = 0x2e,
168 MFI_STAT_SCSI_RESERVATION_CONFLICT = 0x2f,
169 MFI_STAT_SHUTDOWN_FAILED = 0x30,
170 MFI_STAT_TIME_NOT_SET = 0x31,
171 MFI_STAT_WRONG_STATE = 0x32,
172 MFI_STAT_LD_OFFLINE = 0x33,
173 MFI_STAT_PEER_NOTIFICATION_REJECTED = 0x34,
174 MFI_STAT_PEER_NOTIFICATION_FAILED = 0x35,
175 MFI_STAT_RESERVATION_IN_PROGRESS = 0x36,
176 MFI_STAT_I2C_ERRORS_DETECTED = 0x37,
177 MFI_STAT_PCI_ERRORS_DETECTED = 0x38,
179 MFI_STAT_INVALID_STATUS = 0xFF
183 * Number of mailbox bytes in DCMD message frame
185 #define MFI_MBOX_SIZE 12
189 MR_EVT_CLASS_DEBUG = -2,
190 MR_EVT_CLASS_PROGRESS = -1,
191 MR_EVT_CLASS_INFO = 0,
192 MR_EVT_CLASS_WARNING = 1,
193 MR_EVT_CLASS_CRITICAL = 2,
194 MR_EVT_CLASS_FATAL = 3,
195 MR_EVT_CLASS_DEAD = 4,
201 MR_EVT_LOCALE_LD = 0x0001,
202 MR_EVT_LOCALE_PD = 0x0002,
203 MR_EVT_LOCALE_ENCL = 0x0004,
204 MR_EVT_LOCALE_BBU = 0x0008,
205 MR_EVT_LOCALE_SAS = 0x0010,
206 MR_EVT_LOCALE_CTRL = 0x0020,
207 MR_EVT_LOCALE_CONFIG = 0x0040,
208 MR_EVT_LOCALE_CLUSTER = 0x0080,
209 MR_EVT_LOCALE_ALL = 0xffff,
216 MR_EVT_ARGS_CDB_SENSE,
218 MR_EVT_ARGS_LD_COUNT,
220 MR_EVT_ARGS_LD_OWNER,
221 MR_EVT_ARGS_LD_LBA_PD_LBA,
223 MR_EVT_ARGS_LD_STATE,
224 MR_EVT_ARGS_LD_STRIP,
228 MR_EVT_ARGS_PD_LBA_LD,
230 MR_EVT_ARGS_PD_STATE,
240 * SAS controller properties
242 struct megasas_ctrl_prop {
245 u16 pred_fail_poll_interval;
246 u16 intr_throttle_count;
247 u16 intr_throttle_timeouts;
253 u8 cache_flush_interval;
259 u8 disable_auto_rebuild;
260 u8 disable_battery_warn;
262 u16 ecc_bucket_leak_rate;
263 u8 restore_hotspare_on_insertion;
264 u8 expose_encl_devices;
267 } __attribute__ ((packed));
270 * SAS controller information
272 struct megasas_ctrl_info {
275 * PCI device information
285 } __attribute__ ((packed)) pci;
288 * Host interface information
301 } __attribute__ ((packed)) host_interface;
304 * Device (backend) interface information
317 } __attribute__ ((packed)) device_interface;
320 * List of components residing in flash. All str are null terminated
322 u32 image_check_word;
323 u32 image_component_count;
332 } __attribute__ ((packed)) image_component[8];
335 * List of flash components that have been flashed on the card, but
336 * are not in use, pending reset of the adapter. This list will be
337 * empty if a flash operation has not occurred. All stings are null
340 u32 pending_image_component_count;
349 } __attribute__ ((packed)) pending_image_component[8];
356 char product_name[80];
360 * Other physical/controller/operation information. Indicates the
361 * presence of the hardware
371 } __attribute__ ((packed)) hw_present;
376 * Maximum data transfer sizes
378 u16 max_concurrent_cmds;
380 u32 max_request_size;
383 * Logical and physical device counts
385 u16 ld_present_count;
386 u16 ld_degraded_count;
387 u16 ld_offline_count;
389 u16 pd_present_count;
390 u16 pd_disk_present_count;
391 u16 pd_disk_pred_failure_count;
392 u16 pd_disk_failed_count;
395 * Memory size information
404 u16 mem_correctable_error_count;
405 u16 mem_uncorrectable_error_count;
408 * Cluster information
410 u8 cluster_permitted;
414 * Additional max data transfer sizes
416 u16 max_strips_per_io;
419 * Controller capabilities structures
430 } __attribute__ ((packed)) raid_levels;
440 u32 cluster_supported:1;
442 u32 spanning_allowed:1;
443 u32 dedicated_hotspares:1;
444 u32 revertible_hotspares:1;
445 u32 foreign_config_import:1;
446 u32 self_diagnostic:1;
447 u32 mixed_redundancy_arr:1;
448 u32 global_hot_spares:1;
451 } __attribute__ ((packed)) adapter_operations;
459 u32 disk_cache_policy:1;
462 } __attribute__ ((packed)) ld_operations;
470 } __attribute__ ((packed)) stripe_sz_ops;
479 } __attribute__ ((packed)) pd_operations;
483 u32 ctrl_supports_sas:1;
484 u32 ctrl_supports_sata:1;
485 u32 allow_mix_in_encl:1;
486 u32 allow_mix_in_ld:1;
487 u32 allow_sata_in_cluster:1;
490 } __attribute__ ((packed)) pd_mix_support;
493 * Define ECC single-bit-error bucket information
499 * Include the controller properties (changeable items)
501 struct megasas_ctrl_prop properties;
504 * Define FW pkg version (set in envt v'bles on OEM basis)
506 char package_version[0x60];
508 u8 pad[0x800 - 0x6a0];
510 } __attribute__ ((packed));
513 * ===============================
514 * MegaRAID SAS driver definitions
515 * ===============================
517 #define MEGASAS_MAX_PD_CHANNELS 2
518 #define MEGASAS_MAX_LD_CHANNELS 2
519 #define MEGASAS_MAX_CHANNELS (MEGASAS_MAX_PD_CHANNELS + \
520 MEGASAS_MAX_LD_CHANNELS)
521 #define MEGASAS_MAX_DEV_PER_CHANNEL 128
522 #define MEGASAS_DEFAULT_INIT_ID -1
523 #define MEGASAS_MAX_LUN 8
524 #define MEGASAS_MAX_LD 64
527 * When SCSI mid-layer calls driver's reset routine, driver waits for
528 * MEGASAS_RESET_WAIT_TIME seconds for all outstanding IO to complete. Note
529 * that the driver cannot _actually_ abort or reset pending commands. While
530 * it is waiting for the commands to complete, it prints a diagnostic message
531 * every MEGASAS_RESET_NOTICE_INTERVAL seconds
533 #define MEGASAS_RESET_WAIT_TIME 180
534 #define MEGASAS_RESET_NOTICE_INTERVAL 5
536 #define MEGASAS_IOCTL_CMD 0
539 * FW reports the maximum of number of commands that it can accept (maximum
540 * commands that can be outstanding) at any time. The driver must report a
541 * lower number to the mid layer because it can issue a few internal commands
542 * itself (E.g, AEN, abort cmd, IOCTLs etc). The number of commands it needs
545 #define MEGASAS_INT_CMDS 32
548 * FW can accept both 32 and 64 bit SGLs. We want to allocate 32/64 bit
549 * SGLs based on the size of dma_addr_t
551 #define IS_DMA64 (sizeof(dma_addr_t) == 8)
553 #define MFI_OB_INTR_STATUS_MASK 0x00000002
554 #define MFI_POLL_TIMEOUT_SECS 10
556 struct megasas_register_set {
558 u32 reserved_0[4]; /*0000h */
560 u32 inbound_msg_0; /*0010h */
561 u32 inbound_msg_1; /*0014h */
562 u32 outbound_msg_0; /*0018h */
563 u32 outbound_msg_1; /*001Ch */
565 u32 inbound_doorbell; /*0020h */
566 u32 inbound_intr_status; /*0024h */
567 u32 inbound_intr_mask; /*0028h */
569 u32 outbound_doorbell; /*002Ch */
570 u32 outbound_intr_status; /*0030h */
571 u32 outbound_intr_mask; /*0034h */
573 u32 reserved_1[2]; /*0038h */
575 u32 inbound_queue_port; /*0040h */
576 u32 outbound_queue_port; /*0044h */
578 u32 reserved_2; /*004Ch */
580 u32 index_registers[1004]; /*0050h */
582 } __attribute__ ((packed));
584 struct megasas_sge32 {
589 } __attribute__ ((packed));
591 struct megasas_sge64 {
596 } __attribute__ ((packed));
600 struct megasas_sge32 sge32[1];
601 struct megasas_sge64 sge64[1];
603 } __attribute__ ((packed));
605 struct megasas_header {
608 u8 sense_len; /*01h */
609 u8 cmd_status; /*02h */
610 u8 scsi_status; /*03h */
612 u8 target_id; /*04h */
615 u8 sge_count; /*07h */
617 u32 context; /*08h */
621 u16 timeout; /*12h */
622 u32 data_xferlen; /*14h */
624 } __attribute__ ((packed));
626 union megasas_sgl_frame {
628 struct megasas_sge32 sge32[8];
629 struct megasas_sge64 sge64[5];
631 } __attribute__ ((packed));
633 struct megasas_init_frame {
636 u8 reserved_0; /*01h */
637 u8 cmd_status; /*02h */
639 u8 reserved_1; /*03h */
640 u32 reserved_2; /*04h */
642 u32 context; /*08h */
646 u16 reserved_3; /*12h */
647 u32 data_xfer_len; /*14h */
649 u32 queue_info_new_phys_addr_lo; /*18h */
650 u32 queue_info_new_phys_addr_hi; /*1Ch */
651 u32 queue_info_old_phys_addr_lo; /*20h */
652 u32 queue_info_old_phys_addr_hi; /*24h */
654 u32 reserved_4[6]; /*28h */
656 } __attribute__ ((packed));
658 struct megasas_init_queue_info {
660 u32 init_flags; /*00h */
661 u32 reply_queue_entries; /*04h */
663 u32 reply_queue_start_phys_addr_lo; /*08h */
664 u32 reply_queue_start_phys_addr_hi; /*0Ch */
665 u32 producer_index_phys_addr_lo; /*10h */
666 u32 producer_index_phys_addr_hi; /*14h */
667 u32 consumer_index_phys_addr_lo; /*18h */
668 u32 consumer_index_phys_addr_hi; /*1Ch */
670 } __attribute__ ((packed));
672 struct megasas_io_frame {
675 u8 sense_len; /*01h */
676 u8 cmd_status; /*02h */
677 u8 scsi_status; /*03h */
679 u8 target_id; /*04h */
680 u8 access_byte; /*05h */
681 u8 reserved_0; /*06h */
682 u8 sge_count; /*07h */
684 u32 context; /*08h */
688 u16 timeout; /*12h */
689 u32 lba_count; /*14h */
691 u32 sense_buf_phys_addr_lo; /*18h */
692 u32 sense_buf_phys_addr_hi; /*1Ch */
694 u32 start_lba_lo; /*20h */
695 u32 start_lba_hi; /*24h */
697 union megasas_sgl sgl; /*28h */
699 } __attribute__ ((packed));
701 struct megasas_pthru_frame {
704 u8 sense_len; /*01h */
705 u8 cmd_status; /*02h */
706 u8 scsi_status; /*03h */
708 u8 target_id; /*04h */
711 u8 sge_count; /*07h */
713 u32 context; /*08h */
717 u16 timeout; /*12h */
718 u32 data_xfer_len; /*14h */
720 u32 sense_buf_phys_addr_lo; /*18h */
721 u32 sense_buf_phys_addr_hi; /*1Ch */
724 union megasas_sgl sgl; /*30h */
726 } __attribute__ ((packed));
728 struct megasas_dcmd_frame {
731 u8 reserved_0; /*01h */
732 u8 cmd_status; /*02h */
733 u8 reserved_1[4]; /*03h */
734 u8 sge_count; /*07h */
736 u32 context; /*08h */
740 u16 timeout; /*12h */
742 u32 data_xfer_len; /*14h */
751 union megasas_sgl sgl; /*28h */
753 } __attribute__ ((packed));
755 struct megasas_abort_frame {
758 u8 reserved_0; /*01h */
759 u8 cmd_status; /*02h */
761 u8 reserved_1; /*03h */
762 u32 reserved_2; /*04h */
764 u32 context; /*08h */
768 u16 reserved_3; /*12h */
769 u32 reserved_4; /*14h */
771 u32 abort_context; /*18h */
774 u32 abort_mfi_phys_addr_lo; /*20h */
775 u32 abort_mfi_phys_addr_hi; /*24h */
777 u32 reserved_5[6]; /*28h */
779 } __attribute__ ((packed));
781 struct megasas_smp_frame {
784 u8 reserved_1; /*01h */
785 u8 cmd_status; /*02h */
786 u8 connection_status; /*03h */
788 u8 reserved_2[3]; /*04h */
789 u8 sge_count; /*07h */
791 u32 context; /*08h */
795 u16 timeout; /*12h */
797 u32 data_xfer_len; /*14h */
798 u64 sas_addr; /*18h */
801 struct megasas_sge32 sge32[2]; /* [0]: resp [1]: req */
802 struct megasas_sge64 sge64[2]; /* [0]: resp [1]: req */
805 } __attribute__ ((packed));
807 struct megasas_stp_frame {
810 u8 reserved_1; /*01h */
811 u8 cmd_status; /*02h */
812 u8 reserved_2; /*03h */
814 u8 target_id; /*04h */
815 u8 reserved_3[2]; /*05h */
816 u8 sge_count; /*07h */
818 u32 context; /*08h */
822 u16 timeout; /*12h */
824 u32 data_xfer_len; /*14h */
826 u16 fis[10]; /*18h */
830 struct megasas_sge32 sge32[2]; /* [0]: resp [1]: data */
831 struct megasas_sge64 sge64[2]; /* [0]: resp [1]: data */
834 } __attribute__ ((packed));
836 union megasas_frame {
838 struct megasas_header hdr;
839 struct megasas_init_frame init;
840 struct megasas_io_frame io;
841 struct megasas_pthru_frame pthru;
842 struct megasas_dcmd_frame dcmd;
843 struct megasas_abort_frame abort;
844 struct megasas_smp_frame smp;
845 struct megasas_stp_frame stp;
852 union megasas_evt_class_locale {
858 } __attribute__ ((packed)) members;
862 } __attribute__ ((packed));
864 struct megasas_evt_log_info {
868 u32 shutdown_seq_num;
871 } __attribute__ ((packed));
873 struct megasas_progress {
878 } __attribute__ ((packed));
880 struct megasas_evtarg_ld {
886 } __attribute__ ((packed));
888 struct megasas_evtarg_pd {
893 } __attribute__ ((packed));
895 struct megasas_evt_detail {
900 union megasas_evt_class_locale cl;
906 struct megasas_evtarg_pd pd;
912 } __attribute__ ((packed)) cdbSense;
914 struct megasas_evtarg_ld ld;
917 struct megasas_evtarg_ld ld;
919 } __attribute__ ((packed)) ld_count;
923 struct megasas_evtarg_ld ld;
924 } __attribute__ ((packed)) ld_lba;
927 struct megasas_evtarg_ld ld;
930 } __attribute__ ((packed)) ld_owner;
935 struct megasas_evtarg_ld ld;
936 struct megasas_evtarg_pd pd;
937 } __attribute__ ((packed)) ld_lba_pd_lba;
940 struct megasas_evtarg_ld ld;
941 struct megasas_progress prog;
942 } __attribute__ ((packed)) ld_prog;
945 struct megasas_evtarg_ld ld;
948 } __attribute__ ((packed)) ld_state;
952 struct megasas_evtarg_ld ld;
953 } __attribute__ ((packed)) ld_strip;
955 struct megasas_evtarg_pd pd;
958 struct megasas_evtarg_pd pd;
960 } __attribute__ ((packed)) pd_err;
964 struct megasas_evtarg_pd pd;
965 } __attribute__ ((packed)) pd_lba;
969 struct megasas_evtarg_pd pd;
970 struct megasas_evtarg_ld ld;
971 } __attribute__ ((packed)) pd_lba_ld;
974 struct megasas_evtarg_pd pd;
975 struct megasas_progress prog;
976 } __attribute__ ((packed)) pd_prog;
979 struct megasas_evtarg_pd pd;
982 } __attribute__ ((packed)) pd_state;
989 } __attribute__ ((packed)) pci;
997 } __attribute__ ((packed)) time;
1003 } __attribute__ ((packed)) ecc;
1011 char description[128];
1013 } __attribute__ ((packed));
1015 struct megasas_instance_template {
1016 void (*fire_cmd)(dma_addr_t ,u32 ,struct megasas_register_set __iomem *);
1018 void (*enable_intr)(struct megasas_register_set __iomem *) ;
1020 int (*clear_intr)(struct megasas_register_set __iomem *);
1022 u32 (*read_fw_status_reg)(struct megasas_register_set __iomem *);
1025 struct megasas_instance {
1028 dma_addr_t producer_h;
1030 dma_addr_t consumer_h;
1033 dma_addr_t reply_queue_h;
1035 unsigned long base_addr;
1036 struct megasas_register_set __iomem *reg_set;
1043 u32 max_sectors_per_req;
1045 struct megasas_cmd **cmd_list;
1046 struct list_head cmd_pool;
1047 spinlock_t cmd_pool_lock;
1048 struct dma_pool *frame_dma_pool;
1049 struct dma_pool *sense_dma_pool;
1051 struct megasas_evt_detail *evt_detail;
1052 dma_addr_t evt_detail_h;
1053 struct megasas_cmd *aen_cmd;
1054 struct semaphore aen_mutex;
1055 struct semaphore ioctl_sem;
1057 struct Scsi_Host *host;
1059 wait_queue_head_t int_cmd_wait_q;
1060 wait_queue_head_t abort_cmd_wait_q;
1062 struct pci_dev *pdev;
1067 spinlock_t instance_lock;
1069 struct megasas_instance_template *instancet;
1072 #define MEGASAS_IS_LOGICAL(scp) \
1073 (scp->device->channel < MEGASAS_MAX_PD_CHANNELS) ? 0 : 1
1075 #define MEGASAS_DEV_INDEX(inst, scp) \
1076 ((scp->device->channel % 2) * MEGASAS_MAX_DEV_PER_CHANNEL) + \
1079 struct megasas_cmd {
1081 union megasas_frame *frame;
1082 dma_addr_t frame_phys_addr;
1084 dma_addr_t sense_phys_addr;
1091 struct list_head list;
1092 struct scsi_cmnd *scmd;
1093 struct megasas_instance *instance;
1097 #define MAX_MGMT_ADAPTERS 1024
1098 #define MAX_IOCTL_SGE 16
1100 struct megasas_iocpacket {
1110 struct megasas_header hdr;
1113 struct iovec sgl[MAX_IOCTL_SGE];
1115 } __attribute__ ((packed));
1117 struct megasas_aen {
1121 u32 class_locale_word;
1122 } __attribute__ ((packed));
1124 #ifdef CONFIG_COMPAT
1125 struct compat_megasas_iocpacket {
1134 struct megasas_header hdr;
1136 struct compat_iovec sgl[MAX_IOCTL_SGE];
1137 } __attribute__ ((packed));
1141 #define MEGASAS_IOC_FIRMWARE _IOWR('M', 1, struct megasas_iocpacket)
1142 #define MEGASAS_IOC_FIRMWARE32 _IOWR('M', 1, struct compat_megasas_iocpacket)
1143 #define MEGASAS_IOC_GET_AEN _IOW('M', 3, struct megasas_aen)
1145 struct megasas_mgmt_info {
1148 struct megasas_instance *instance[MAX_MGMT_ADAPTERS];
1152 #endif /*LSI_MEGARAID_SAS_H */