drivers/spi/tsc2102.c

   1 /*
   2  * drivers/spi/tsc2102.c
   3  *
   4  * TSC2102 interface driver.
   5  *
   6  * Copyright (c) 2005 Andrzej Zaborowski  <balrog@zabor.org>
   7  *
   8  * This package is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This package is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this package; if not, write to the Free Software
  20  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  21  */
  22
  23 #include <linux/module.h>
  24 #include <linux/init.h>
  25 #include <linux/sched.h>
  26 #include <linux/errno.h>
  27 #include <linux/platform_device.h>
  28 #include <linux/delay.h>
  29 #include <linux/suspend.h>
  30 #include <linux/interrupt.h>
  31 #include <linux/clk.h>
  32 #include <linux/spi/spi.h>
  33 #include <linux/spi/tsc2102.h>
  34 #include <linux/err.h>
  35 #include <linux/hwmon.h>
  36 #include <linux/hwmon-sysfs.h>
  37
  38 #include <asm/system.h>
  39 #include <asm/irq.h>
  40 #include <asm/io.h>
  41 #include <asm/mach-types.h>
  42 #include <asm/hardware.h>
  43
  44 #ifdef CONFIG_APM
  45 #include <asm/apm.h>
  46 #endif
  47
  48 /* Bit field definitions for chip registers */
  49 #define TSC2102_ADC_TS_CONTROL          0x8bf4
  50 #define TSC2102_ADC_SCAN_CONTROL        0x2ff4
  51 #define TSC2102_ADC_T1_CONTROL          0x2bf4
  52 #define TSC2102_ADC_T2_CONTROL          0x33f4
  53 #define TSC2102_ADC_DAV                 0x4000
  54 #define TSC2102_ADC_INT_REF             0x0016
  55 #define TSC2102_ADC_EXT_REF             0x0002
  56 #define TSC2102_CONFIG_TIMES            0x0008
  57 #define TSC2102_RESET                   0xbb00
  58 #define TSC2102_ADC_PSTCM               (1 << 15)
  59 #define TSC2102_ADC_ADST                (1 << 14)
  60 #define TSC2102_TS_DAV                  0x0780
  61 #define TSC2102_PS_DAV                  0x0078
  62 #define TSC2102_T1_DAV                  0x0004
  63 #define TSC2102_T2_DAV                  0x0002
  64 #define TSC2102_DAC_ON                  0x3ba0
  65 #define TSC2102_DAC_OFF                 0xafa0
  66 #define TSC2102_FS44K                   (1 << 13)
  67 #define TSC2102_PLL1_OFF                0x0000
  68 #define TSC2102_PLL1_44K                0x811c
  69 #define TSC2102_PLL1_48K                0x8120
  70 #define TSC2102_PLL2_44K                (5462 << 2)
  71 #define TSC2102_PLL2_48K                (1920 << 2)
  72 #define TSC2102_SLVMS                   (1 << 11)
  73 #define TSC2102_DEEMPF                  (1 << 0)
  74 #define TSC2102_BASSBC                  (1 << 1)
  75 #define TSC2102_KEYCLICK_OFF            0x0000
  76
  77 #define CS_CHANGE(val)                  0
  78
  79 struct tsc2102_spi_req {
  80         struct spi_device *dev;
  81         uint16_t command;
  82         uint16_t data;
  83         struct spi_transfer *transfer;
  84         struct spi_message message;
  85 };
  86
  87 struct tsc2102_dev {
  88         struct tsc2102_config *pdata;
  89         spinlock_t lock, lock_sync;
  90         struct clk *bclk_ck;
  91
  92         int state;                      /* 0: TS, 1: Portscan, 2-3: Temps */
  93         struct timer_list ts_timer;     /* Busy-wait for PEN UP */
  94         struct timer_list mode_timer;   /* Change .state every some time */
  95         int pendown;
  96         int data_pending;
  97         uint16_t status, adc_status, adc_data[4];
  98         tsc2102_touch_t touch_cb;
  99         tsc2102_coords_t coords_cb;
 100         tsc2102_ports_t ports_cb;
 101         tsc2102_temp_t temp1_cb;
 102         tsc2102_temp_t temp2_cb;
 103         unsigned int ts_msecs;          /* Interval for .ts_timer */
 104         unsigned int mode_msecs;        /* Interval for .mode_timer */
 105
 106         struct spi_device *spi;
 107         struct spi_transfer *transfers;
 108         struct tsc2102_spi_req req_adc;
 109         struct tsc2102_spi_req req_status;
 110         struct tsc2102_spi_req req_pressure;
 111         struct tsc2102_spi_req req_stopadc;
 112         struct tsc2102_spi_req req_mode;
 113
 114         int bat[2], aux[1], temp[2];
 115         struct class_device *hwmondev;
 116 };
 117
 118 static struct tsc2102_dev tsc;
 119
 120 module_param_named(touch_check_msecs, tsc.ts_msecs, uint, 0);
 121 MODULE_PARM_DESC(touch_check_msecs, "Pen-up polling interval in msecs");
 122
 123 module_param_named(sensor_scan_msecs, tsc.mode_msecs, uint, 0);
 124 MODULE_PARM_DESC(sensor_scan_msecs, "Temperature & battery scan interval");
 125
 126 void tsc2102_write_sync(int page, u8 address, u16 data)
 127 {
 128         static struct tsc2102_spi_req req;
 129         static struct spi_transfer transfer[2];
 130         int ret;
 131
 132         spi_message_init(&req.message);
 133         req.transfer = transfer;
 134
 135         /* Address */
 136         req.command = (page << 11) | (address << 5);
 137         req.transfer[0].tx_buf = &req.command;
 138         req.transfer[0].rx_buf = 0;
 139         req.transfer[0].len = 2;
 140         spi_message_add_tail(&req.transfer[0], &req.message);
 141
 142         /* Data */
 143         req.transfer[1].tx_buf = &data;
 144         req.transfer[1].rx_buf = 0;
 145         req.transfer[1].len = 2;
 146         req.transfer[1].cs_change = CS_CHANGE(1);
 147         spi_message_add_tail(&req.transfer[1], &req.message);
 148
 149         ret = spi_sync(tsc.spi, &req.message);
 150         if (!ret && req.message.status)
 151                 ret = req.message.status;
 152
 153         if (ret)
 154                 printk(KERN_ERR "%s: error %i in SPI request\n",
 155                                 __FUNCTION__, ret);
 156 }
 157
 158 void tsc2102_reads_sync(int page, u8 startaddress, u16 *data, int numregs)
 159 {
 160         static struct tsc2102_spi_req req;
 161         static struct spi_transfer transfer[6];
 162         int ret, i, j;
 163
 164         BUG_ON(numregs + 1 > ARRAY_SIZE(transfer));
 165
 166         spi_message_init(&req.message);
 167         req.transfer = transfer;
 168         i = 0;
 169         j = 0;
 170
 171         /* Address */
 172         req.command = 0x8000 | (page << 11) | (startaddress << 5);
 173         req.transfer[i].tx_buf = &req.command;
 174         req.transfer[i].rx_buf = 0;
 175         req.transfer[i].len = 2;
 176         spi_message_add_tail(&req.transfer[i ++], &req.message);
 177
 178         /* Data */
 179         while (j < numregs) {
 180                 req.transfer[i].tx_buf = 0;
 181                 req.transfer[i].rx_buf = &data[j ++];
 182                 req.transfer[i].len = 2;
 183                 req.transfer[i].cs_change = CS_CHANGE(j == numregs);
 184                 spi_message_add_tail(&req.transfer[i ++], &req.message);
 185         }
 186
 187         ret = spi_sync(tsc.spi, &req.message);
 188         if (!ret && req.message.status)
 189                 ret = req.message.status;
 190
 191         if (ret)
 192                 printk(KERN_ERR "%s: error %i in SPI request\n",
 193                                 __FUNCTION__, ret);
 194 }
 195
 196 u16 tsc2102_read_sync(int page, u8 address)
 197 {
 198         u16 ret;
 199         tsc2102_reads_sync(page, address, &ret, 1);
 200         return ret;
 201 }
 202
 203 static void tsc2102_write_async(
 204                 struct tsc2102_spi_req *spi, int page, u8 address, u16 data,
 205                 void (*complete)(struct tsc2102_dev *context))
 206 {
 207         int ret;
 208
 209         spi_message_init(&spi->message);
 210         spi->message.complete = (void (*)(void *)) complete;
 211         spi->message.context = &tsc;
 212
 213         /* Address */
 214         spi->command = (page << 11) | (address << 5);
 215         spi->transfer[0].tx_buf = &spi->command;
 216         spi->transfer[0].rx_buf = 0;
 217         spi->transfer[0].len = 2;
 218         spi_message_add_tail(&spi->transfer[0], &spi->message);
 219
 220         /* Data */
 221         spi->data = data;
 222         spi->transfer[1].tx_buf = &spi->data;
 223         spi->transfer[1].rx_buf = 0;
 224         spi->transfer[1].len = 2;
 225         spi->transfer[1].cs_change = CS_CHANGE(1);
 226         spi_message_add_tail(&spi->transfer[1], &spi->message);
 227
 228         ret = spi_async(spi->dev, &spi->message);
 229         if (ret)
 230                 printk(KERN_ERR "%s: error %i in SPI request\n",
 231                                 __FUNCTION__, ret);
 232 }
 233
 234 static void tsc2102_reads_async(struct tsc2102_spi_req *spi,
 235                 int page, u8 startaddress, u16 *data, int numregs,
 236                 void (*complete)(struct tsc2102_dev *context))
 237 {
 238         int ret, i, j;
 239
 240         spi_message_init(&spi->message);
 241         spi->message.complete = (void (*)(void *)) complete;
 242         spi->message.context = &tsc;
 243         i = 0;
 244         j = 0;
 245
 246         /* Address */
 247         spi->command = 0x8000 | (page << 11) | (startaddress << 5);
 248         spi->transfer[i].tx_buf = &spi->command;
 249         spi->transfer[i].rx_buf = 0;
 250         spi->transfer[i].len = 2;
 251         spi_message_add_tail(&spi->transfer[i ++], &spi->message);
 252
 253         /* Data */
 254         while (j < numregs) {
 255                 spi->transfer[i].tx_buf = 0;
 256                 spi->transfer[i].rx_buf = &data[j ++];
 257                 spi->transfer[i].len = 2;
 258                 spi->transfer[i].cs_change = CS_CHANGE(j == numregs);
 259                 spi_message_add_tail(&spi->transfer[i ++], &spi->message);
 260         }
 261
 262         ret = spi_async(spi->dev, &spi->message);
 263         if (ret)
 264                 printk(KERN_ERR "%s: error %i in SPI request\n",
 265                                 __FUNCTION__, ret);
 266 }
 267
 268 static void tsc2102_read_async(struct tsc2102_spi_req *spi,
 269                 int page, u8 address, u16 *ret,
 270                 void (*complete)(struct tsc2102_dev *context))
 271 {
 272         tsc2102_reads_async(spi, page, address, ret, 1, complete);
 273 }
 274
 275 static void tsc2102_request_alloc(struct tsc2102_dev *dev,
 276                 struct tsc2102_spi_req *spi, int direction, int numregs,
 277                 struct spi_transfer **buffer)
 278 {
 279         spi->dev = dev->spi;
 280
 281         if (direction == 1)     /* Write */
 282                 numregs = 2;
 283         else                    /* Read */
 284                 numregs += 1;
 285
 286         spi->transfer = *buffer;
 287         *buffer += numregs;
 288 }
 289
 290 #define tsc2102_cb_register_func(cb, cb_t)      \
 291 int tsc2102_ ## cb(cb_t handler)        \
 292 {       \
 293         spin_lock(&tsc.lock);   \
 294         \
 295         /* Lock the module */   \
 296         if (handler && !tsc.cb) \
 297                 if (!try_module_get(THIS_MODULE)) {     \
 298                         printk(KERN_INFO "Failed to get TSC module\n"); \
 299                 }       \
 300         if (!handler && tsc.cb) \
 301                 module_put(THIS_MODULE);        \
 302         \
 303         tsc.cb = handler;       \
 304         \
 305         spin_unlock(&tsc.lock); \
 306         return 0;       \
 307 }
 308
 309 tsc2102_cb_register_func(touch_cb, tsc2102_touch_t)
 310 tsc2102_cb_register_func(coords_cb, tsc2102_coords_t)
 311 tsc2102_cb_register_func(ports_cb, tsc2102_ports_t)
 312 tsc2102_cb_register_func(temp1_cb, tsc2102_temp_t)
 313 tsc2102_cb_register_func(temp2_cb, tsc2102_temp_t)
 314
 315 #ifdef DEBUG
 316 static void tsc2102_print_dav(void)
 317 {
 318         u16 status = tsc2102_read_sync(TSC2102_TS_STATUS_CTRL);
 319         if (status & 0x0fff)
 320                 printk("TSC2102: data in");
 321         if (status & 0x0400)
 322                 printk(" X");
 323         if (status & 0x0200)
 324                 printk(" Y");
 325         if (status & 0x0100)
 326                 printk(" Z1");
 327         if (status & 0x0080)
 328                 printk(" Z2");
 329         if (status & 0x0040)
 330                 printk(" BAT1");
 331         if (status & 0x0020)
 332                 printk(" BAT2");
 333         if (status & 0x0010)
 334                 printk(" AUX1");
 335         if (status & 0x0008)
 336                 printk(" AUX2");
 337         if (status & 0x0004)
 338                 printk(" TEMP1");
 339         if (status & 0x0002)
 340                 printk(" TEMP2");
 341         if (status & 0x0001)
 342                 printk(" KP");
 343         if (status & 0x0fff)
 344                 printk(".\n");
 345 }
 346 #endif
 347
 348 static void tsc2102_complete_dummy(struct tsc2102_dev *dev)
 349 {
 350 }
 351
 352 static inline void tsc2102_touchscreen_mode(struct tsc2102_dev *dev)
 353 {
 354         /* Scan X, Y, Z1, Z2, chip controlled, 12-bit, 16 samples, 500 usec */
 355         tsc2102_write_async(&dev->req_mode,
 356                         TSC2102_TS_ADC_CTRL, TSC2102_ADC_TS_CONTROL,
 357                         tsc2102_complete_dummy);
 358 }
 359
 360 static inline void tsc2102_portscan_mode(struct tsc2102_dev *dev)
 361 {
 362         /* Scan BAT1, BAT2, AUX, 12-bit, 16 samples, 500 usec */
 363         tsc2102_write_async(&dev->req_mode,
 364                         TSC2102_TS_ADC_CTRL, TSC2102_ADC_SCAN_CONTROL,
 365                         tsc2102_complete_dummy);
 366 }
 367
 368 static inline void tsc2102_temp1_mode(struct tsc2102_dev *dev)
 369 {
 370         /* Scan TEMP1, 12-bit, 16 samples, 500 usec */
 371         tsc2102_write_async(&dev->req_mode,
 372                         TSC2102_TS_ADC_CTRL, TSC2102_ADC_T1_CONTROL,
 373                         tsc2102_complete_dummy);
 374 }
 375
 376 static inline void tsc2102_temp2_mode(struct tsc2102_dev *dev)
 377 {
 378         /* Scan TEMP2, 12-bit, 16 samples, 500 usec */
 379         tsc2102_write_async(&dev->req_mode,
 380                         TSC2102_TS_ADC_CTRL, TSC2102_ADC_T2_CONTROL,
 381                         tsc2102_complete_dummy);
 382 }
 383
 384 static void tsc2102_mode(struct tsc2102_dev *dev)
 385 {
 386         switch (dev->state) {
 387         case 0:
 388                 tsc2102_touchscreen_mode(dev);
 389                 break;
 390         case 1:
 391                 tsc2102_portscan_mode(dev);
 392                 break;
 393         case 2:
 394                 tsc2102_temp1_mode(dev);
 395                 break;
 396         case 3:
 397                 tsc2102_temp2_mode(dev);
 398                 break;
 399         default:
 400                 dev->state = 0;
 401                 tsc2102_touchscreen_mode(dev);
 402                 break;
 403         }
 404 }
 405
 406 /* Lock is held when this is called.  */
 407 static void tsc2102_new_mode(struct tsc2102_dev *dev)
 408 {
 409         /* Abort current conversion if any */
 410         tsc2102_write_async(&dev->req_stopadc,
 411                         TSC2102_TS_ADC_CTRL, TSC2102_ADC_ADST,
 412                         tsc2102_complete_dummy);
 413
 414         dev->state ++;
 415         tsc2102_mode(dev);
 416 }
 417
 418 static void tsc2102_check_status(struct tsc2102_dev *dev);
 419
 420 /* TSC has new data for us availiable.  */
 421 static irqreturn_t tsc2102_handler(int irq, void *dev_id)
 422 {
 423         struct tsc2102_dev *dev = (struct tsc2102_dev *) dev_id;
 424         spin_lock_irq(&dev->lock);
 425
 426         if (!dev->data_pending)
 427                 tsc2102_check_status(dev);
 428
 429         dev->data_pending ++;
 430
 431         spin_unlock_irq(&dev->lock);
 432         return IRQ_HANDLED;
 433 }
 434
 435 static void tsc2102_data_report(struct tsc2102_dev *dev)
 436 {
 437         if (dev->status & TSC2102_TS_DAV) {
 438                 if (dev->coords_cb)
 439                         dev->coords_cb(
 440                                         dev->adc_data[0], dev->adc_data[1],
 441                                         dev->adc_data[2], dev->adc_data[3]);
 442         }
 443
 444         if (dev->status & TSC2102_PS_DAV) {
 445                 if (dev->ports_cb)
 446                         dev->ports_cb(dev->adc_data[0],
 447                                         dev->adc_data[1], dev->adc_data[2]);
 448                 dev->bat[0] = dev->adc_data[0];
 449                 dev->bat[1] = dev->adc_data[1];
 450                 dev->aux[0] = dev->adc_data[2];
 451         }
 452
 453         if (dev->status & TSC2102_T1_DAV) {
 454                 if (dev->temp1_cb)
 455                         dev->temp1_cb(*dev->adc_data);
 456                 dev->temp[0] = *dev->adc_data;
 457         }
 458
 459         if (dev->status & TSC2102_T2_DAV) {
 460                 if (dev->temp2_cb)
 461                         dev->temp2_cb(*dev->adc_data);
 462                 dev->temp[1] = *dev->adc_data;
 463         }
 464
 465         spin_lock_irq(&dev->lock);
 466
 467         dev->data_pending --;
 468
 469         /*
 470          * This may happen if the registers were successfully read and a
 471          * new conversion was started and completed by the TSC before the
 472          * completion for SPI read was called.
 473          */
 474         if (dev->data_pending)
 475                 tsc2102_check_status(dev);
 476
 477         if (dev->status & (TSC2102_PS_DAV | TSC2102_T1_DAV | TSC2102_T2_DAV))
 478                 tsc2102_new_mode(dev);
 479
 480         spin_unlock_irq(&dev->lock);
 481 }
 482
 483 static void tsc2102_status_report(struct tsc2102_dev *dev)
 484 {
 485         /*
 486          * Read all converted data from corresponding registers
 487          * so that the ADC can move on to a new conversion.
 488          */
 489         if (dev->status & TSC2102_TS_DAV) {
 490                 tsc2102_reads_async(&dev->req_adc, TSC2102_TS_X,
 491                                 dev->adc_data, 4, tsc2102_data_report);
 492                 if (!dev->pendown) {
 493                         dev->pendown = 1;
 494                         if (dev->touch_cb)
 495                                 dev->touch_cb(1);
 496
 497                         mod_timer(&dev->ts_timer, jiffies +
 498                                 msecs_to_jiffies(dev->ts_msecs));
 499                 }
 500         }
 501
 502         if (dev->status & TSC2102_PS_DAV) {
 503                 tsc2102_reads_async(&dev->req_adc, TSC2102_TS_BAT1,
 504                                 dev->adc_data, 3, tsc2102_data_report);
 505         }
 506
 507         if (dev->status & TSC2102_T1_DAV) {
 508                 tsc2102_read_async(&dev->req_adc, TSC2102_TS_TEMP1,
 509                                 dev->adc_data, tsc2102_data_report);
 510         }
 511
 512         if (dev->status & TSC2102_T2_DAV) {
 513                 tsc2102_read_async(&dev->req_adc, TSC2102_TS_TEMP2,
 514                                 dev->adc_data, tsc2102_data_report);
 515         }
 516
 517         if (!(dev->status & (TSC2102_TS_DAV | TSC2102_PS_DAV |
 518                                         TSC2102_T1_DAV | TSC2102_T2_DAV))) {
 519                 spin_lock_irq(&dev->lock);
 520                 dev->data_pending --;
 521                 spin_unlock_irq(&dev->lock);
 522
 523                 WARN_ON(!dev->state);
 524         }
 525 }
 526
 527 static void tsc2102_check_status(struct tsc2102_dev *dev)
 528 {
 529         tsc2102_read_async(&dev->req_status, TSC2102_TS_STATUS_CTRL,
 530                         &dev->status, tsc2102_status_report);
 531 }
 532
 533 static void tsc2102_mode_timer(unsigned long data)
 534 {
 535         struct tsc2102_dev *dev = (struct tsc2102_dev *) data;
 536         spin_lock_irq(&dev->lock);
 537
 538         BUG_ON(dev->state);
 539
 540         tsc2102_new_mode(dev);
 541
 542         mod_timer(&dev->mode_timer, jiffies +
 543                         msecs_to_jiffies(dev->mode_msecs));
 544         spin_unlock_irq(&dev->lock);
 545 }
 546
 547 /*
 548  * There are at least three ways to check for pen-up:
 549  *      - the PINT/DAV pin state,
 550  *      - reading PSTCM bit in ADC Control register (D15, offset 0x00),
 551  *      - reading ADST bit in ADC Control register (D14, offset 0x00),
 552  *              ADC idle would indicate no screen touch.
 553  * Unfortunately none of them seems to be 100% accurate and you will
 554  * find they are totally inconsistent, i.e. you get to see any arbitrary
 555  * combination of values in these three bits.  So we will busy-wait
 556  * for a moment when all three indicate a pen-up, using a timer, before
 557  * we report a pen-up.
 558  */
 559 static void tsc2102_pressure_report(struct tsc2102_dev *dev)
 560 {
 561         if (!dev->pendown)
 562                 return;
 563
 564         if (dev->state ||
 565                         (dev->adc_status & TSC2102_ADC_PSTCM) ||
 566                         !(dev->adc_status & TSC2102_ADC_ADST)) {
 567                 mod_timer(&dev->ts_timer, jiffies +
 568                                 msecs_to_jiffies(dev->ts_msecs));
 569         } else {
 570                 dev->pendown = 0;
 571                 if (dev->touch_cb)
 572                         dev->touch_cb(0);
 573         }
 574 }
 575
 576 static void tsc2102_pressure(unsigned long data)
 577 {
 578         struct tsc2102_dev *dev = (struct tsc2102_dev *) data;
 579
 580         BUG_ON(!dev->pendown);
 581
 582         tsc2102_read_async(&dev->req_pressure, TSC2102_TS_ADC_CTRL,
 583                         &dev->adc_status, tsc2102_pressure_report);
 584 }
 585
 586 #ifdef CONFIG_SOUND
 587 /*
 588  * Volume level values should be in the range [0, 127].
 589  * Higher values mean lower volume.
 590  */
 591 void tsc2102_set_volume(uint8_t left_ch, uint8_t right_ch)
 592 {
 593         u16 val;
 594         if (left_ch == 0x00 || left_ch == 0x7f) /* All 0's or all 1's */
 595                 left_ch ^= 0x7f;
 596         if (right_ch == 0x00 || right_ch == 0x7f)
 597                 right_ch ^= 0x7f;
 598
 599         spin_lock(&tsc.lock_sync);
 600
 601         val = tsc2102_read_sync(TSC2102_DAC_GAIN_CTRL);
 602
 603         val &= 0x8080;  /* Preserve mute-bits */
 604         val |= (left_ch << 8) | right_ch;
 605
 606         tsc2102_write_sync(TSC2102_DAC_GAIN_CTRL, val);
 607
 608         spin_unlock(&tsc.lock_sync);
 609 }
 610
 611 void tsc2102_set_mute(int left_ch, int right_ch)
 612 {
 613         u16 val;
 614         spin_lock(&tsc.lock_sync);
 615
 616         val = tsc2102_read_sync(TSC2102_DAC_GAIN_CTRL);
 617
 618         val &= 0x7f7f;  /* Preserve volume settings */
 619         val |= (left_ch << 15) | (right_ch << 7);
 620
 621         tsc2102_write_sync(TSC2102_DAC_GAIN_CTRL, val);
 622
 623         spin_unlock(&tsc.lock_sync);
 624 }
 625
 626 void tsc2102_get_mute(int *left_ch, int *right_ch)
 627 {
 628         u16 val;
 629         spin_lock(&tsc.lock_sync);
 630
 631         val = tsc2102_read_sync(TSC2102_DAC_GAIN_CTRL);
 632
 633         spin_unlock(&tsc.lock_sync);
 634
 635         *left_ch = !!(val & (1 << 15));
 636         *right_ch = !!(val & (1 << 7));
 637 }
 638
 639 void tsc2102_set_deemphasis(int enable)
 640 {
 641         u16 val;
 642         spin_lock(&tsc.lock_sync);
 643         val = tsc2102_read_sync(TSC2102_DAC_POWER_CTRL);
 644
 645         if (enable)
 646                 val &= ~TSC2102_DEEMPF;
 647         else
 648                 val |= TSC2102_DEEMPF;
 649
 650         tsc2102_write_sync(TSC2102_DAC_POWER_CTRL, val);
 651         spin_unlock(&tsc.lock_sync);
 652 }
 653
 654 void tsc2102_set_bassboost(int enable)
 655 {
 656         u16 val;
 657         spin_lock(&tsc.lock_sync);
 658         val = tsc2102_read_sync(TSC2102_DAC_POWER_CTRL);
 659
 660         if (enable)
 661                 val &= ~TSC2102_BASSBC;
 662         else
 663                 val |= TSC2102_BASSBC;
 664
 665         tsc2102_write_sync(TSC2102_DAC_POWER_CTRL, val);
 666         spin_unlock(&tsc.lock_sync);
 667 }
 668
 669 /*      {rate, dsor, fsref}     */
 670 static const struct tsc2102_rate_info_s tsc2102_rates[] = {
 671         /* Fsref / 6.0 */
 672         {7350,  63,     1},
 673         {8000,  63,     0},
 674         /* Fsref / 6.0 */
 675         {7350,  54,     1},
 676         {8000,  54,     0},
 677         /* Fsref / 5.0 */
 678         {8820,  45,     1},
 679         {9600,  45,     0},
 680         /* Fsref / 4.0 */
 681         {11025, 36,     1},
 682         {12000, 36,     0},
 683         /* Fsref / 3.0 */
 684         {14700, 27,     1},
 685         {16000, 27,     0},
 686         /* Fsref / 2.0 */
 687         {22050, 18,     1},
 688         {24000, 18,     0},
 689         /* Fsref / 1.5 */
 690         {29400, 9,      1},
 691         {32000, 9,      0},
 692         /* Fsref */
 693         {44100, 0,      1},
 694         {48000, 0,      0},
 695
 696         {0,     0,      0},
 697 };
 698
 699 int tsc2102_set_rate(int rate)
 700 {
 701         int i;
 702         uint16_t val;
 703
 704         for (i = 0; tsc2102_rates[i].sample_rate; i ++)
 705                 if (tsc2102_rates[i].sample_rate == rate)
 706                         break;
 707         if (tsc2102_rates[i].sample_rate == 0) {
 708                 printk(KERN_ERR "Unknown sampling rate %i.0 Hz\n", rate);
 709                 return -EINVAL;
 710         }
 711
 712         spin_lock(&tsc.lock_sync);
 713
 714         tsc2102_write_sync(TSC2102_AUDIO1_CTRL, tsc2102_rates[i].divisor);
 715
 716         val = tsc2102_read_sync(TSC2102_AUDIO3_CTRL);
 717
 718         if (tsc2102_rates[i].fs_44k) {
 719                 tsc2102_write_sync(TSC2102_AUDIO3_CTRL, val | TSC2102_FS44K);
 720                 /* Enable Phase-locked-loop, set up clock dividers */
 721                 tsc2102_write_sync(TSC2102_PLL1_CTRL, TSC2102_PLL1_44K);
 722                 tsc2102_write_sync(TSC2102_PLL2_CTRL, TSC2102_PLL2_44K);
 723         } else {
 724                 tsc2102_write_sync(TSC2102_AUDIO3_CTRL, val & ~TSC2102_FS44K);
 725                 /* Enable Phase-locked-loop, set up clock dividers */
 726                 tsc2102_write_sync(TSC2102_PLL1_CTRL, TSC2102_PLL1_48K);
 727                 tsc2102_write_sync(TSC2102_PLL2_CTRL, TSC2102_PLL2_48K);
 728         }
 729
 730         spin_unlock(&tsc.lock_sync);
 731         return 0;
 732 }
 733
 734 /*
 735  * Perform basic set-up with default values and power the DAC on.
 736  */
 737 void tsc2102_dac_power(int state)
 738 {
 739         spin_lock(&tsc.lock_sync);
 740
 741         if (state) {
 742                 /* 16-bit words, DSP mode, sample at Fsref */
 743                 tsc2102_write_sync(TSC2102_AUDIO1_CTRL, 0x0100);
 744                 /* Keyclicks off, soft-stepping at normal rate */
 745                 tsc2102_write_sync(TSC2102_AUDIO2_CTRL, TSC2102_KEYCLICK_OFF);
 746                 /* 44.1 kHz Fsref, continuous transfer mode, master DAC */
 747                 tsc2102_write_sync(TSC2102_AUDIO3_CTRL, 0x2800);
 748                 /* Soft-stepping enabled */
 749                 tsc2102_write_sync(TSC2102_AUDIO4_CTRL, 0x0000);
 750
 751                 /* PLL generates 44.1 kHz */
 752                 tsc2102_write_sync(TSC2102_PLL1_CTRL, TSC2102_PLL1_44K);
 753                 tsc2102_write_sync(TSC2102_PLL2_CTRL, TSC2102_PLL2_44K);
 754
 755                 /* Codec & DAC power up, virtual ground disabled */
 756                 tsc2102_write_sync(TSC2102_DAC_POWER_CTRL, TSC2102_DAC_ON);
 757         } else {
 758                 /* All off */
 759                 tsc2102_write_sync(TSC2102_AUDIO4_CTRL, TSC2102_KEYCLICK_OFF);
 760                 tsc2102_write_sync(TSC2102_PLL1_CTRL, TSC2102_PLL1_OFF);
 761         }
 762
 763         spin_unlock(&tsc.lock_sync);
 764 }
 765
 766 void tsc2102_set_i2s_master(int state)
 767 {
 768         uint16_t val;
 769         spin_lock(&tsc.lock_sync);
 770
 771         val = tsc2102_read_sync(TSC2102_AUDIO3_CTRL);
 772
 773         if (state)
 774                 tsc2102_write_sync(TSC2102_AUDIO3_CTRL, val | TSC2102_SLVMS);
 775         else
 776                 tsc2102_write_sync(TSC2102_AUDIO3_CTRL, val & ~TSC2102_SLVMS);
 777
 778         spin_unlock(&tsc.lock_sync);
 779 }
 780 #endif  /* CONFIG_SOUND */
 781
 782 static int tsc2102_configure(struct tsc2102_dev *dev)
 783 {
 784         /* Reset the chip */
 785         tsc2102_write_sync(TSC2102_TS_RESET_CTRL, TSC2102_RESET);
 786
 787         /* Reference mode, 100 usec delay, 1.25 V reference */
 788         if (dev->pdata->use_internal)
 789                 tsc2102_write_sync(TSC2102_TS_REF_CTRL, TSC2102_ADC_INT_REF);
 790         else
 791                 tsc2102_write_sync(TSC2102_TS_REF_CTRL, TSC2102_ADC_EXT_REF);
 792
 793         /* 84 usec precharge time, 32 usec sense time */
 794         tsc2102_write_sync(TSC2102_TS_CONFIG_CTRL, TSC2102_CONFIG_TIMES);
 795
 796         /* PINT/DAV acts as DAV */
 797         tsc2102_write_sync(TSC2102_TS_STATUS_CTRL, TSC2102_ADC_DAV);
 798
 799         tsc2102_mode(dev);
 800         mod_timer(&dev->mode_timer, jiffies +
 801                         msecs_to_jiffies(dev->mode_msecs));
 802         return 0;
 803 }
 804
 805 /*
 806  * Retrieves chip revision.  Should be always 1.
 807  */
 808 int tsc2102_get_revision(void)
 809 {
 810         return tsc2102_read_sync(TSC2102_AUDIO3_CTRL) & 7;
 811 }
 812
 813 /*
 814  * Emit a short keyclick typically in order to give feedback to
 815  * user on specific events.
 816  *
 817  * amplitude must be between 0 (lowest) and 2 (highest).
 818  * freq must be between 0 (corresponds to 62.5 Hz) and 7 (8 kHz).
 819  * length should be between 2 and 32 periods.
 820  *
 821  * This function sleeps but doesn't sleep until the sound has
 822  * finished.
 823  */
 824 void tsc2102_keyclick(int amplitude, int freq, int length)
 825 {
 826         u16 val;
 827         spin_lock(&tsc.lock_sync);
 828         val = tsc2102_read_sync(TSC2102_AUDIO2_CTRL);
 829         val &= 0x800f;
 830
 831         /* Set amplitude */
 832         switch (amplitude) {
 833         case 1:
 834                 val |= 4 << 12;
 835                 break;
 836         case 2:
 837                 val |= 7 << 12;
 838                 break;
 839         default:
 840                 break;
 841         }
 842
 843         /* Frequency */
 844         val |= (freq & 0x7) << 8;
 845
 846         /* Round to nearest supported length */
 847         if (length > 20)
 848                 val |= 4 << 4;
 849         else if (length > 6)
 850                 val |= 3 << 4;
 851         else if (length > 4)
 852                 val |= 2 << 4;
 853         else if (length > 2)
 854                 val |= 1 << 4;
 855
 856         /* Enable keyclick */
 857         val |= 0x8000;
 858
 859         tsc2102_write_sync(TSC2102_AUDIO2_CTRL, val);
 860         spin_unlock(&tsc.lock_sync);
 861 }
 862
 863 #ifdef CONFIG_HWMON
 864 #define TSC2102_INPUT(devname, field)   \
 865 static ssize_t show_ ## devname(struct device *dev,     \
 866                 struct device_attribute *devattr, char *buf)    \
 867 {       \
 868         struct tsc2102_dev *devhwmon = dev_get_drvdata(dev);    \
 869         int value = devhwmon->field;    \
 870         return sprintf(buf, "%i\n", value);     \
 871 }       \
 872 static DEVICE_ATTR(devname ## _input, S_IRUGO, show_ ## devname, NULL);
 873
 874 TSC2102_INPUT(in0, bat[0])
 875 TSC2102_INPUT(in1, bat[1])
 876 TSC2102_INPUT(in2, aux[0])
 877 TSC2102_INPUT(in3, temp[0])
 878 TSC2102_INPUT(in4, temp[1])
 879
 880 static ssize_t show_temp1(struct device *dev,
 881                 struct device_attribute *devattr, char *buf)
 882 {
 883         struct tsc2102_dev *devhwmon = dev_get_drvdata(dev);
 884         int t1, t2;
 885         int value, diff;
 886
 887         t1 = devhwmon->temp[0];
 888         t2 = devhwmon->temp[1];
 889
 890         /*
 891          * Use method #2 (differential) to calculate current temperature.
 892          * The difference between TEMP2 and TEMP1 input values is
 893          * multiplied by a constant to obtain current temperature.
 894          * To find this constant we use the values measured at 25 C as
 895          * thermometer calibration data.
 896          *
 897          * 298150 is 25 degrees Celcius represented in Kelvins and
 898          * multiplied by 1000 for fixed point precision (273.15 + 25).
 899          * 273150 is zero degrees Celcius.
 900          */
 901         diff = devhwmon->pdata->temp_at25c[1] - devhwmon->pdata->temp_at25c[0];
 902         BUG_ON(diff == 0);
 903         value = (t2 - t1) * 298150 / diff;      /* This is in Kelvins now */
 904
 905         t1 = value - 273150;                    /* Celcius millidegree */
 906         return sprintf(buf, "%i\n", t1);
 907 }
 908 static DEVICE_ATTR(temp1_input, S_IRUGO, show_temp1, NULL);
 909 #endif  /* CONFIG_HWMON */
 910
 911 #ifdef CONFIG_APM
 912 static void tsc2102_get_power_status(struct apm_power_info *info)
 913 {
 914         tsc.pdata->apm_report(info, tsc.bat);
 915 }
 916 #endif
 917
 918 #ifdef CONFIG_PM
 919 /*
 920  * Suspend the chip.
 921  */
 922 static int
 923 tsc2102_suspend(struct spi_device *spi, pm_message_t state)
 924 {
 925         struct tsc2102_dev *dev = dev_get_drvdata(&spi->dev);
 926
 927         if (!dev)
 928                 return 0;
 929
 930         spin_lock(&dev->lock_sync);
 931
 932         del_timer(&dev->mode_timer);
 933         del_timer(&dev->ts_timer);
 934
 935         if (dev->pendown && dev->touch_cb)
 936                 dev->touch_cb(0);
 937
 938         /* Abort current conversion and power down the ADC */
 939         tsc2102_write_sync(TSC2102_TS_ADC_CTRL, TSC2102_ADC_ADST);
 940
 941         dev->spi->dev.power.power_state = state;
 942
 943         spin_unlock(&dev->lock_sync);
 944         return 0;
 945 }
 946
 947 /*
 948  * Resume chip operation.
 949  */
 950 static int tsc2102_resume(struct spi_device *spi)
 951 {
 952         struct tsc2102_dev *dev = dev_get_drvdata(&spi->dev);
 953         int err;
 954
 955         if (!dev)
 956                 return 0;
 957
 958         spin_lock(&dev->lock_sync);
 959
 960         dev->spi->dev.power.power_state = PMSG_ON;
 961
 962         dev->state = 0;
 963         dev->pendown = 0;
 964
 965         err = tsc2102_configure(dev);
 966
 967         spin_unlock(&dev->lock_sync);
 968         return err;
 969 }
 970 #else
 971 #define tsc2102_suspend NULL
 972 #define tsc2102_resume  NULL
 973 #endif
 974
 975 static struct platform_device tsc2102_ts_device = {
 976         .name           = "tsc2102-ts",
 977         .id             = -1,
 978 };
 979
 980 static struct platform_device tsc2102_alsa_device = {
 981         .name           = "tsc2102-alsa",
 982         .id             = -1,
 983 };
 984
 985 static int tsc2102_probe(struct spi_device *spi)
 986 {
 987         struct tsc2102_config *pdata = spi->dev.platform_data;
 988         struct spi_transfer *spi_buffer;
 989         int err = 0;
 990
 991         if (!pdata) {
 992                 printk(KERN_ERR "TSC2102: Platform data not supplied\n");
 993                 return -ENOENT;
 994         }
 995
 996         if (!spi->irq) {
 997                 printk(KERN_ERR "TSC2102: Invalid irq value\n");
 998                 return -ENOENT;
 999         }
1000
1001         tsc.pdata = pdata;
1002         tsc.state = 0;
1003         tsc.pendown = 0;
1004         tsc.data_pending = 0;
1005         tsc.ts_msecs = 20;
1006         tsc.mode_msecs = 1000;
1007         tsc.spi = spi;
1008
1009         /* Allocate enough struct spi_transfer's for all requests */
1010         spi_buffer = kzalloc(sizeof(struct spi_transfer) * 16, GFP_KERNEL);
1011         if (!spi_buffer) {
1012                 printk(KERN_ERR "TSC2102: No memory for SPI buffers\n");
1013                 return -ENOMEM;
1014         }
1015
1016         tsc.transfers = spi_buffer;
1017         tsc2102_request_alloc(&tsc, &tsc.req_adc, 0, 4, &spi_buffer);
1018         tsc2102_request_alloc(&tsc, &tsc.req_status, 0, 1, &spi_buffer);
1019         tsc2102_request_alloc(&tsc, &tsc.req_pressure, 0, 1, &spi_buffer);
1020         tsc2102_request_alloc(&tsc, &tsc.req_stopadc, 1, 1, &spi_buffer);
1021         tsc2102_request_alloc(&tsc, &tsc.req_mode, 1, 1, &spi_buffer);
1022
1023         spin_lock_init(&tsc.lock);
1024         spin_lock(&tsc.lock_sync);
1025
1026         /* Get the BCLK - assuming the rate is at 12000000 */
1027         tsc.bclk_ck = clk_get(0, "bclk");
1028         if (!tsc.bclk_ck) {
1029                 printk(KERN_ERR "Unable to get the clock BCLK\n");
1030                 err = -EPERM;
1031                 goto done;
1032         }
1033
1034         clk_enable(tsc.bclk_ck);
1035
1036         if (request_irq(spi->irq, tsc2102_handler, IRQF_SAMPLE_RANDOM |
1037                                 IRQF_TRIGGER_FALLING, "tsc2102", &tsc)) {
1038                 printk(KERN_ERR "Could not allocate touchscreen IRQ!\n");
1039                 err = -EINVAL;
1040                 goto err_clk;
1041         }
1042
1043         setup_timer(&tsc.ts_timer,
1044                         tsc2102_pressure, (unsigned long) &tsc);
1045         setup_timer(&tsc.mode_timer,
1046                         tsc2102_mode_timer, (unsigned long) &tsc);
1047
1048         /* Set up the communication bus */
1049         dev_set_drvdata(&spi->dev, &tsc);
1050         spi->dev.power.power_state = PMSG_ON;
1051         spi->mode = SPI_MODE_1;
1052         spi->bits_per_word = 16;
1053         err = spi_setup(spi);
1054         if (err)
1055                 goto err_timer;
1056
1057         /* Now try to detect the chip, make first contact */
1058         if (tsc2102_get_revision() != 0x1) {
1059                 printk(KERN_ERR "No TI TSC2102 chip found!\n");
1060                 goto err_timer;
1061         }
1062
1063         err = tsc2102_configure(&tsc);
1064         if (err)
1065                 goto err_timer;
1066
1067         /* Register devices controlled by TSC 2102 */
1068         tsc2102_ts_device.dev.platform_data = pdata;
1069         tsc2102_ts_device.dev.parent = &spi->dev;
1070         err = platform_device_register(&tsc2102_ts_device);
1071         if (err)
1072                 goto err_timer;
1073
1074         tsc2102_alsa_device.dev.platform_data = pdata->alsa_config;
1075         tsc2102_alsa_device.dev.parent = &spi->dev;
1076         err = platform_device_register(&tsc2102_alsa_device);
1077         if (err)
1078                 goto err_ts;
1079
1080 #ifdef CONFIG_HWMON
1081         tsc.hwmondev = hwmon_device_register(&spi->dev);
1082         if (IS_ERR(tsc.hwmondev)) {
1083                 printk(KERN_ERR "tsc2102_hwmon: Device registration failed\n");
1084                 err = PTR_ERR(tsc.hwmondev);
1085                 goto err_alsa;
1086         }
1087
1088         if (pdata->monitor & TSC_BAT1)
1089                 err |= device_create_file(&spi->dev, &dev_attr_in0_input);
1090         if (pdata->monitor & TSC_BAT2)
1091                 err |= device_create_file(&spi->dev, &dev_attr_in1_input);
1092         if (pdata->monitor & TSC_AUX)
1093                 err |= device_create_file(&spi->dev, &dev_attr_in2_input);
1094         if (pdata->monitor & TSC_TEMP) {
1095                 err |= device_create_file(&spi->dev, &dev_attr_temp1_input);
1096                 err |= device_create_file(&spi->dev, &dev_attr_in3_input);
1097                 err |= device_create_file(&spi->dev, &dev_attr_in4_input);
1098         }
1099
1100         if (err)
1101                 printk(KERN_ERR "tsc2102_hwmon: Creating one or more "
1102                                 "attribute files failed\n");
1103         err = 0;        /* Not fatal */
1104 #endif
1105
1106 #ifdef CONFIG_APM
1107         if (pdata->apm_report)
1108                 apm_get_power_status = tsc2102_get_power_status;
1109 #endif
1110
1111         if (!err)
1112                 goto done;
1113
1114 err_alsa:
1115         platform_device_unregister(&tsc2102_alsa_device);
1116 err_ts:
1117         platform_device_unregister(&tsc2102_ts_device);
1118 err_timer:
1119         del_timer(&tsc.ts_timer);
1120         del_timer(&tsc.mode_timer);
1121         dev_set_drvdata(&spi->dev, NULL);
1122 err_clk:
1123         clk_disable(tsc.bclk_ck);
1124         clk_put(tsc.bclk_ck);
1125 done:
1126         spin_unlock(&tsc.lock_sync);
1127         return err;
1128 }
1129
1130 static int tsc2102_remove(struct spi_device *spi)
1131 {
1132         struct tsc2102_dev *dev = dev_get_drvdata(&spi->dev);
1133
1134         spin_lock(&dev->lock_sync);
1135
1136         platform_device_unregister(&tsc2102_ts_device);
1137         platform_device_unregister(&tsc2102_alsa_device);
1138
1139         dev_set_drvdata(&spi->dev, NULL);
1140
1141         /* Release the BCLK */
1142         clk_disable(dev->bclk_ck);
1143         clk_put(dev->bclk_ck);
1144
1145         del_timer(&tsc.mode_timer);
1146         del_timer(&tsc.ts_timer);
1147
1148         kfree(tsc.transfers);
1149
1150 #ifdef CONFIG_HWMON
1151         hwmon_device_unregister(dev->hwmondev);
1152 #endif
1153
1154 #ifdef CONFIG_APM
1155         apm_get_power_status = 0;
1156 #endif
1157
1158         spin_unlock(&dev->lock_sync);
1159
1160         return 0;
1161 }
1162
1163 static struct spi_driver tsc2102_driver = {
1164         .probe          = tsc2102_probe,
1165         .remove         = tsc2102_remove,
1166         .suspend        = tsc2102_suspend,
1167         .resume         = tsc2102_resume,
1168         .driver         = {
1169                 .name   = "tsc2102",
1170                 .owner  = THIS_MODULE,
1171                 .bus    = &spi_bus_type,
1172         },
1173 };
1174
1175 static char __initdata banner[] = KERN_INFO "TI TSC2102 driver initializing\n";
1176
1177 static int __init tsc2102_init(void)
1178 {
1179         printk(banner);
1180         return spi_register_driver(&tsc2102_driver);
1181 }
1182
1183 static void __exit tsc2102_exit(void)
1184 {
1185         spi_unregister_driver(&tsc2102_driver);
1186 }
1187
1188 module_init(tsc2102_init);
1189 module_exit(tsc2102_exit);
1190
1191 EXPORT_SYMBOL(tsc2102_read_sync);
1192 EXPORT_SYMBOL(tsc2102_reads_sync);
1193 EXPORT_SYMBOL(tsc2102_write_sync);
1194 EXPORT_SYMBOL(tsc2102_keyclick);
1195
1196 MODULE_AUTHOR("Andrzej Zaborowski");
1197 MODULE_DESCRIPTION("Interface driver for TI TSC2102 chips.");
1198 MODULE_LICENSE("GPL");