drivers/staging/me4000/me4000.c

   1 /* Device driver for Meilhaus ME-4000 board family.
   2  * ================================================
   3  *
   4  *  Copyright (C) 2003 Meilhaus Electronic GmbH (support@meilhaus.de)
   5  *
   6  *  This file is free software; you can redistribute it and/or modify
   7  *  it under the terms of the GNU General Public License as published by
   8  *  the Free Software Foundation; either version 2 of the License, or
   9  *  (at your option) any later version.
  10  *
  11  *  This program is distributed in the hope that it will be useful,
  12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  *  GNU General Public License for more details.
  15  *
  16  *  You should have received a copy of the GNU General Public License
  17  *  along with this program; if not, write to the Free Software
  18  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19  *
  20  *  Author:     Guenter Gebhardt        <g.gebhardt@meilhaus.de>
  21  */
  22
  23 #include <linux/module.h>
  24 #include <linux/fs.h>
  25 #include <linux/sched.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/pci.h>
  28 #include <linux/errno.h>
  29 #include <linux/delay.h>
  30 #include <linux/mm.h>
  31 #include <linux/unistd.h>
  32 #include <linux/list.h>
  33 #include <linux/proc_fs.h>
  34 #include <linux/types.h>
  35 #include <linux/poll.h>
  36 #include <linux/vmalloc.h>
  37 #include <linux/slab.h>
  38 #include <asm/pgtable.h>
  39 #include <linux/uaccess.h>
  40 #include <linux/io.h>
  41 #include <asm/system.h>
  42
  43 /* Include-File for the Meilhaus ME-4000 I/O board */
  44 #include "me4000.h"
  45 #include "me4000_firmware.h"
  46 #include "me4610_firmware.h"
  47
  48 /* Administrative stuff for modinfo */
  49 MODULE_AUTHOR("Guenter Gebhardt <g.gebhardt@meilhaus.de>");
  50 MODULE_DESCRIPTION
  51     ("Device Driver Module for Meilhaus ME-4000 boards version 1.0.5");
  52 MODULE_SUPPORTED_DEVICE("Meilhaus ME-4000 Multi I/O boards");
  53 MODULE_LICENSE("GPL");
  54
  55 /* Board specific data are kept in a global list */
  56 static LIST_HEAD(me4000_board_info_list);
  57
  58 /* Major Device Numbers. 0 means to get it automatically from the System */
  59 static int me4000_ao_major_driver_no;
  60 static int me4000_ai_major_driver_no;
  61 static int me4000_dio_major_driver_no;
  62 static int me4000_cnt_major_driver_no;
  63 static int me4000_ext_int_major_driver_no;
  64
  65 /* Let the user specify a custom major driver number */
  66 module_param(me4000_ao_major_driver_no, int, 0);
  67 MODULE_PARM_DESC(me4000_ao_major_driver_no,
  68                  "Major driver number for analog output (default 0)");
  69
  70 module_param(me4000_ai_major_driver_no, int, 0);
  71 MODULE_PARM_DESC(me4000_ai_major_driver_no,
  72                  "Major driver number for analog input (default 0)");
  73
  74 module_param(me4000_dio_major_driver_no, int, 0);
  75 MODULE_PARM_DESC(me4000_dio_major_driver_no,
  76                  "Major driver number digital I/O (default 0)");
  77
  78 module_param(me4000_cnt_major_driver_no, int, 0);
  79 MODULE_PARM_DESC(me4000_cnt_major_driver_no,
  80                  "Major driver number for counter (default 0)");
  81
  82 module_param(me4000_ext_int_major_driver_no, int, 0);
  83 MODULE_PARM_DESC(me4000_ext_int_major_driver_no,
  84                  "Major driver number for external interrupt (default 0)");
  85
  86 /*-----------------------------------------------------------------------------
  87   Board detection and initialization
  88   ---------------------------------------------------------------------------*/
  89 static int me4000_probe(struct pci_dev *dev, const struct pci_device_id *id);
  90 static int me4000_xilinx_download(struct me4000_info *);
  91 static int me4000_reset_board(struct me4000_info *);
  92
  93 static void clear_board_info_list(void);
  94 static void release_ao_contexts(struct me4000_info *board_info);
  95 /*-----------------------------------------------------------------------------
  96   Stuff used by all device parts
  97   ---------------------------------------------------------------------------*/
  98 static int me4000_open(struct inode *, struct file *);
  99 static int me4000_release(struct inode *, struct file *);
 100
 101 static int me4000_get_user_info(struct me4000_user_info *,
 102                                 struct me4000_info *board_info);
 103 static int me4000_read_procmem(char *, char **, off_t, int, int *, void *);
 104
 105 /*-----------------------------------------------------------------------------
 106   Analog output stuff
 107   ---------------------------------------------------------------------------*/
 108 static ssize_t me4000_ao_write_sing(struct file *, const char *, size_t,
 109                                     loff_t *);
 110 static ssize_t me4000_ao_write_wrap(struct file *, const char *, size_t,
 111                                     loff_t *);
 112 static ssize_t me4000_ao_write_cont(struct file *, const char *, size_t,
 113                                     loff_t *);
 114
 115 static int me4000_ao_ioctl_sing(struct inode *, struct file *, unsigned int,
 116                                 unsigned long);
 117 static int me4000_ao_ioctl_wrap(struct inode *, struct file *, unsigned int,
 118                                 unsigned long);
 119 static int me4000_ao_ioctl_cont(struct inode *, struct file *, unsigned int,
 120                                 unsigned long);
 121
 122 static unsigned int me4000_ao_poll_cont(struct file *, poll_table *);
 123 static int me4000_ao_fsync_cont(struct file *, struct dentry *, int);
 124
 125 static int me4000_ao_start(unsigned long *, struct me4000_ao_context *);
 126 static int me4000_ao_stop(struct me4000_ao_context *);
 127 static int me4000_ao_immediate_stop(struct me4000_ao_context *);
 128 static int me4000_ao_timer_set_divisor(u32 *, struct me4000_ao_context *);
 129 static int me4000_ao_preload(struct me4000_ao_context *);
 130 static int me4000_ao_preload_update(struct me4000_ao_context *);
 131 static int me4000_ao_ex_trig_set_edge(int *, struct me4000_ao_context *);
 132 static int me4000_ao_ex_trig_enable(struct me4000_ao_context *);
 133 static int me4000_ao_ex_trig_disable(struct me4000_ao_context *);
 134 static int me4000_ao_prepare(struct me4000_ao_context *ao_info);
 135 static int me4000_ao_reset(struct me4000_ao_context *ao_info);
 136 static int me4000_ao_enable_do(struct me4000_ao_context *);
 137 static int me4000_ao_disable_do(struct me4000_ao_context *);
 138 static int me4000_ao_fsm_state(int *, struct me4000_ao_context *);
 139
 140 static int me4000_ao_simultaneous_ex_trig(struct me4000_ao_context *ao_context);
 141 static int me4000_ao_simultaneous_sw(struct me4000_ao_context *ao_context);
 142 static int me4000_ao_simultaneous_disable(struct me4000_ao_context *ao_context);
 143 static int me4000_ao_simultaneous_update(
 144                                         struct me4000_ao_channel_list *channels,
 145                                         struct me4000_ao_context *ao_context);
 146
 147 static int me4000_ao_synchronous_ex_trig(struct me4000_ao_context *ao_context);
 148 static int me4000_ao_synchronous_sw(struct me4000_ao_context *ao_context);
 149 static int me4000_ao_synchronous_disable(struct me4000_ao_context *ao_context);
 150
 151 static int me4000_ao_ex_trig_timeout(unsigned long *arg,
 152                                      struct me4000_ao_context *ao_context);
 153 static int me4000_ao_get_free_buffer(unsigned long *arg,
 154                                      struct me4000_ao_context *ao_context);
 155
 156 /*-----------------------------------------------------------------------------
 157   Analog input stuff
 158   ---------------------------------------------------------------------------*/
 159 static int me4000_ai_single(struct me4000_ai_single *,
 160                                 struct me4000_ai_context *);
 161 static int me4000_ai_ioctl_sing(struct inode *, struct file *, unsigned int,
 162                                 unsigned long);
 163
 164 static ssize_t me4000_ai_read(struct file *, char *, size_t, loff_t *);
 165 static int me4000_ai_ioctl_sw(struct inode *, struct file *, unsigned int,
 166                               unsigned long);
 167 static unsigned int me4000_ai_poll(struct file *, poll_table *);
 168 static int me4000_ai_fasync(int fd, struct file *file_p, int mode);
 169
 170 static int me4000_ai_ioctl_ext(struct inode *, struct file *, unsigned int,
 171                                unsigned long);
 172
 173 static int me4000_ai_prepare(struct me4000_ai_context *ai_context);
 174 static int me4000_ai_reset(struct me4000_ai_context *ai_context);
 175 static int me4000_ai_config(struct me4000_ai_config *,
 176                                 struct me4000_ai_context *);
 177 static int me4000_ai_start(struct me4000_ai_context *);
 178 static int me4000_ai_start_ex(unsigned long *, struct me4000_ai_context *);
 179 static int me4000_ai_stop(struct me4000_ai_context *);
 180 static int me4000_ai_immediate_stop(struct me4000_ai_context *);
 181 static int me4000_ai_ex_trig_enable(struct me4000_ai_context *);
 182 static int me4000_ai_ex_trig_disable(struct me4000_ai_context *);
 183 static int me4000_ai_ex_trig_setup(struct me4000_ai_trigger *,
 184                                    struct me4000_ai_context *);
 185 static int me4000_ai_sc_setup(struct me4000_ai_sc *arg,
 186                               struct me4000_ai_context *ai_context);
 187 static int me4000_ai_offset_enable(struct me4000_ai_context *ai_context);
 188 static int me4000_ai_offset_disable(struct me4000_ai_context *ai_context);
 189 static int me4000_ai_fullscale_enable(struct me4000_ai_context *ai_context);
 190 static int me4000_ai_fullscale_disable(struct me4000_ai_context *ai_context);
 191 static int me4000_ai_fsm_state(int *arg, struct me4000_ai_context *ai_context);
 192 static int me4000_ai_get_count_buffer(unsigned long *arg,
 193                                       struct me4000_ai_context *ai_context);
 194
 195 /*-----------------------------------------------------------------------------
 196   EEPROM stuff
 197   ---------------------------------------------------------------------------*/
 198 static int me4000_eeprom_read(struct me4000_eeprom *arg,
 199                               struct me4000_ai_context *ai_context);
 200 static int me4000_eeprom_write(struct me4000_eeprom *arg,
 201                                struct me4000_ai_context *ai_context);
 202
 203 /*-----------------------------------------------------------------------------
 204   Digital I/O stuff
 205   ---------------------------------------------------------------------------*/
 206 static int me4000_dio_ioctl(struct inode *, struct file *, unsigned int,
 207                             unsigned long);
 208 static int me4000_dio_config(struct me4000_dio_config *,
 209                                 struct me4000_dio_context *);
 210 static int me4000_dio_get_byte(struct me4000_dio_byte *,
 211                                 struct me4000_dio_context *);
 212 static int me4000_dio_set_byte(struct me4000_dio_byte *,
 213                                 struct me4000_dio_context *);
 214 static int me4000_dio_reset(struct me4000_dio_context *);
 215
 216 /*-----------------------------------------------------------------------------
 217   Counter stuff
 218   ---------------------------------------------------------------------------*/
 219 static int me4000_cnt_ioctl(struct inode *, struct file *, unsigned int,
 220                             unsigned long);
 221 static int me4000_cnt_config(struct me4000_cnt_config *,
 222                                 struct me4000_cnt_context *);
 223 static int me4000_cnt_read(struct me4000_cnt *, struct me4000_cnt_context *);
 224 static int me4000_cnt_write(struct me4000_cnt *, struct me4000_cnt_context *);
 225 static int me4000_cnt_reset(struct me4000_cnt_context *);
 226
 227 /*-----------------------------------------------------------------------------
 228   External interrupt routines
 229   ---------------------------------------------------------------------------*/
 230 static int me4000_ext_int_ioctl(struct inode *, struct file *, unsigned int,
 231                                 unsigned long);
 232 static int me4000_ext_int_enable(struct me4000_ext_int_context *);
 233 static int me4000_ext_int_disable(struct me4000_ext_int_context *);
 234 static int me4000_ext_int_count(unsigned long *arg,
 235                                 struct me4000_ext_int_context *ext_int_context);
 236 static int me4000_ext_int_fasync(int fd, struct file *file_ptr, int mode);
 237
 238 /*-----------------------------------------------------------------------------
 239   The interrupt service routines
 240   ---------------------------------------------------------------------------*/
 241 static irqreturn_t me4000_ao_isr(int, void *);
 242 static irqreturn_t me4000_ai_isr(int, void *);
 243 static irqreturn_t me4000_ext_int_isr(int, void *);
 244
 245 /*-----------------------------------------------------------------------------
 246   Inline functions
 247   ---------------------------------------------------------------------------*/
 248
 249 static inline int me4000_buf_count(struct me4000_circ_buf buf, int size)
 250 {
 251         return (buf.head - buf.tail) & (size - 1);
 252 }
 253
 254 static inline int me4000_buf_space(struct me4000_circ_buf buf, int size)
 255 {
 256         return (buf.tail - (buf.head + 1)) & (size - 1);
 257 }
 258
 259 static inline int me4000_values_to_end(struct me4000_circ_buf buf, int size)
 260 {
 261         int end;
 262         int n;
 263         end = size - buf.tail;
 264         n = (buf.head + end) & (size - 1);
 265         return (n < end) ? n : end;
 266 }
 267
 268 static inline int me4000_space_to_end(struct me4000_circ_buf buf, int size)
 269 {
 270         int end;
 271         int n;
 272
 273         end = size - 1 - buf.head;
 274         n = (end + buf.tail) & (size - 1);
 275         return (n <= end) ? n : (end + 1);
 276 }
 277
 278 static inline void me4000_outb(unsigned char value, unsigned long port)
 279 {
 280         PORT_PDEBUG("--> 0x%02X port 0x%04lX\n", value, port);
 281         outb(value, port);
 282 }
 283
 284 static inline void me4000_outl(unsigned long value, unsigned long port)
 285 {
 286         PORT_PDEBUG("--> 0x%08lX port 0x%04lX\n", value, port);
 287         outl(value, port);
 288 }
 289
 290 static inline unsigned long me4000_inl(unsigned long port)
 291 {
 292         unsigned long value;
 293         value = inl(port);
 294         PORT_PDEBUG("<-- 0x%08lX port 0x%04lX\n", value, port);
 295         return value;
 296 }
 297
 298 static inline unsigned char me4000_inb(unsigned long port)
 299 {
 300         unsigned char value;
 301         value = inb(port);
 302         PORT_PDEBUG("<-- 0x%08X port 0x%04lX\n", value, port);
 303         return value;
 304 }
 305
 306 static struct pci_driver me4000_driver = {
 307         .name = ME4000_NAME,
 308         .id_table = me4000_pci_table,
 309         .probe = me4000_probe
 310 };
 311
 312 static struct file_operations me4000_ao_fops_sing = {
 313       .owner = THIS_MODULE,
 314       .write = me4000_ao_write_sing,
 315       .ioctl = me4000_ao_ioctl_sing,
 316       .open = me4000_open,
 317       .release = me4000_release,
 318 };
 319
 320 static struct file_operations me4000_ao_fops_wrap = {
 321       .owner = THIS_MODULE,
 322       .write = me4000_ao_write_wrap,
 323       .ioctl = me4000_ao_ioctl_wrap,
 324       .open = me4000_open,
 325       .release = me4000_release,
 326 };
 327
 328 static struct file_operations me4000_ao_fops_cont = {
 329       .owner = THIS_MODULE,
 330       .write = me4000_ao_write_cont,
 331       .poll = me4000_ao_poll_cont,
 332       .ioctl = me4000_ao_ioctl_cont,
 333       .open = me4000_open,
 334       .release = me4000_release,
 335       .fsync = me4000_ao_fsync_cont,
 336 };
 337
 338 static struct file_operations me4000_ai_fops_sing = {
 339       .owner = THIS_MODULE,
 340       .ioctl = me4000_ai_ioctl_sing,
 341       .open = me4000_open,
 342       .release = me4000_release,
 343 };
 344
 345 static struct file_operations me4000_ai_fops_cont_sw = {
 346       .owner = THIS_MODULE,
 347       .read = me4000_ai_read,
 348       .poll = me4000_ai_poll,
 349       .ioctl = me4000_ai_ioctl_sw,
 350       .open = me4000_open,
 351       .release = me4000_release,
 352       .fasync = me4000_ai_fasync,
 353 };
 354
 355 static struct file_operations me4000_ai_fops_cont_et = {
 356       .owner = THIS_MODULE,
 357       .read = me4000_ai_read,
 358       .poll = me4000_ai_poll,
 359       .ioctl = me4000_ai_ioctl_ext,
 360       .open = me4000_open,
 361       .release = me4000_release,
 362 };
 363
 364 static struct file_operations me4000_ai_fops_cont_et_value = {
 365       .owner = THIS_MODULE,
 366       .read = me4000_ai_read,
 367       .poll = me4000_ai_poll,
 368       .ioctl = me4000_ai_ioctl_ext,
 369       .open = me4000_open,
 370       .release = me4000_release,
 371 };
 372
 373 static struct file_operations me4000_ai_fops_cont_et_chanlist = {
 374       .owner = THIS_MODULE,
 375       .read = me4000_ai_read,
 376       .poll = me4000_ai_poll,
 377       .ioctl = me4000_ai_ioctl_ext,
 378       .open = me4000_open,
 379       .release = me4000_release,
 380 };
 381
 382 static struct file_operations me4000_dio_fops = {
 383       .owner = THIS_MODULE,
 384       .ioctl = me4000_dio_ioctl,
 385       .open = me4000_open,
 386       .release = me4000_release,
 387 };
 388
 389 static struct file_operations me4000_cnt_fops = {
 390       .owner = THIS_MODULE,
 391       .ioctl = me4000_cnt_ioctl,
 392       .open = me4000_open,
 393       .release = me4000_release,
 394 };
 395
 396 static struct file_operations me4000_ext_int_fops = {
 397       .owner = THIS_MODULE,
 398       .ioctl = me4000_ext_int_ioctl,
 399       .open = me4000_open,
 400       .release = me4000_release,
 401       .fasync = me4000_ext_int_fasync,
 402 };
 403
 404 static struct file_operations *me4000_ao_fops_array[] = {
 405         &me4000_ao_fops_sing,   // single operations
 406         &me4000_ao_fops_wrap,   // wraparound operations
 407         &me4000_ao_fops_cont,   // continous operations
 408 };
 409
 410 static struct file_operations *me4000_ai_fops_array[] = {
 411         &me4000_ai_fops_sing,   // single operations
 412         &me4000_ai_fops_cont_sw,        // continuous operations with software start
 413         &me4000_ai_fops_cont_et,        // continous operations with external trigger
 414         &me4000_ai_fops_cont_et_value,  // sample values by external trigger
 415         &me4000_ai_fops_cont_et_chanlist,       // work through one channel list by external trigger
 416 };
 417
 418 static int __init me4000_init_module(void)
 419 {
 420         int result;
 421
 422         CALL_PDEBUG("init_module() is executed\n");
 423
 424         /* Register driver capabilities */
 425         result = pci_register_driver(&me4000_driver);
 426         PDEBUG("init_module():%d devices detected\n", result);
 427         if (result < 0) {
 428                 printk(KERN_ERR "ME4000:init_module():Can't register driver\n");
 429                 goto INIT_ERROR_1;
 430         }
 431
 432         /* Allocate major number for analog output */
 433         result =
 434             register_chrdev(me4000_ao_major_driver_no, ME4000_AO_NAME,
 435                             &me4000_ao_fops_sing);
 436         if (result < 0) {
 437                 printk(KERN_ERR "ME4000:init_module():Can't get AO major no\n");
 438                 goto INIT_ERROR_2;
 439         } else {
 440                 me4000_ao_major_driver_no = result;
 441         }
 442         PDEBUG("init_module():Major driver number for AO = %ld\n",
 443                me4000_ao_major_driver_no);
 444
 445         /* Allocate major number for analog input  */
 446         result =
 447             register_chrdev(me4000_ai_major_driver_no, ME4000_AI_NAME,
 448                             &me4000_ai_fops_sing);
 449         if (result < 0) {
 450                 printk(KERN_ERR "ME4000:init_module():Can't get AI major no\n");
 451                 goto INIT_ERROR_3;
 452         } else {
 453                 me4000_ai_major_driver_no = result;
 454         }
 455         PDEBUG("init_module():Major driver number for AI = %ld\n",
 456                me4000_ai_major_driver_no);
 457
 458         /* Allocate major number for digital I/O */
 459         result =
 460             register_chrdev(me4000_dio_major_driver_no, ME4000_DIO_NAME,
 461                             &me4000_dio_fops);
 462         if (result < 0) {
 463                 printk(KERN_ERR
 464                        "ME4000:init_module():Can't get DIO major no\n");
 465                 goto INIT_ERROR_4;
 466         } else {
 467                 me4000_dio_major_driver_no = result;
 468         }
 469         PDEBUG("init_module():Major driver number for DIO = %ld\n",
 470                me4000_dio_major_driver_no);
 471
 472         /* Allocate major number for counter */
 473         result =
 474             register_chrdev(me4000_cnt_major_driver_no, ME4000_CNT_NAME,
 475                             &me4000_cnt_fops);
 476         if (result < 0) {
 477                 printk(KERN_ERR
 478                        "ME4000:init_module():Can't get CNT major no\n");
 479                 goto INIT_ERROR_5;
 480         } else {
 481                 me4000_cnt_major_driver_no = result;
 482         }
 483         PDEBUG("init_module():Major driver number for CNT = %ld\n",
 484                me4000_cnt_major_driver_no);
 485
 486         /* Allocate major number for external interrupt */
 487         result =
 488             register_chrdev(me4000_ext_int_major_driver_no, ME4000_EXT_INT_NAME,
 489                             &me4000_ext_int_fops);
 490         if (result < 0) {
 491                 printk(KERN_ERR
 492                        "ME4000:init_module():Can't get major no for external interrupt\n");
 493                 goto INIT_ERROR_6;
 494         } else {
 495                 me4000_ext_int_major_driver_no = result;
 496         }
 497         PDEBUG
 498             ("init_module():Major driver number for external interrupt = %ld\n",
 499              me4000_ext_int_major_driver_no);
 500
 501         /* Create the /proc/me4000 entry */
 502         if (!create_proc_read_entry
 503             ("me4000", 0, NULL, me4000_read_procmem, NULL)) {
 504                 result = -ENODEV;
 505                 printk(KERN_ERR
 506                        "ME4000:init_module():Can't create proc entry\n");
 507                 goto INIT_ERROR_7;
 508         }
 509
 510         return 0;
 511
 512 INIT_ERROR_7:
 513         unregister_chrdev(me4000_ext_int_major_driver_no, ME4000_EXT_INT_NAME);
 514
 515 INIT_ERROR_6:
 516         unregister_chrdev(me4000_cnt_major_driver_no, ME4000_CNT_NAME);
 517
 518 INIT_ERROR_5:
 519         unregister_chrdev(me4000_dio_major_driver_no, ME4000_DIO_NAME);
 520
 521 INIT_ERROR_4:
 522         unregister_chrdev(me4000_ai_major_driver_no, ME4000_AI_NAME);
 523
 524 INIT_ERROR_3:
 525         unregister_chrdev(me4000_ao_major_driver_no, ME4000_AO_NAME);
 526
 527 INIT_ERROR_2:
 528         pci_unregister_driver(&me4000_driver);
 529         clear_board_info_list();
 530
 531 INIT_ERROR_1:
 532         return result;
 533 }
 534
 535 module_init(me4000_init_module);
 536
 537 static void clear_board_info_list(void)
 538 {
 539         struct me4000_info *board_info, *board_info_safe;
 540         struct me4000_ao_context *ao_context, *ao_context_safe;
 541
 542         /* Clear context lists */
 543         list_for_each_entry(board_info, &me4000_board_info_list, list) {
 544                 /* Clear analog output context list */
 545                 list_for_each_entry_safe(ao_context, ao_context_safe,
 546                                 &board_info->ao_context_list, list) {
 547                         me4000_ao_reset(ao_context);
 548                         free_irq(ao_context->irq, ao_context);
 549                         if (ao_context->circ_buf.buf)
 550                                 kfree(ao_context->circ_buf.buf);
 551                         list_del(&ao_context->list);
 552                         kfree(ao_context);
 553                 }
 554
 555                 /* Clear analog input context */
 556                 if (board_info->ai_context->circ_buf.buf)
 557                         kfree(board_info->ai_context->circ_buf.buf);
 558                 kfree(board_info->ai_context);
 559
 560                 /* Clear digital I/O context */
 561                 kfree(board_info->dio_context);
 562
 563                 /* Clear counter context */
 564                 kfree(board_info->cnt_context);
 565
 566                 /* Clear external interrupt context */
 567                 kfree(board_info->ext_int_context);
 568         }
 569
 570         /* Clear the board info list */
 571         list_for_each_entry_safe(board_info, board_info_safe,
 572                         &me4000_board_info_list, list) {
 573                 pci_release_regions(board_info->pci_dev_p);
 574                 list_del(&board_info->list);
 575                 kfree(board_info);
 576         }
 577 }
 578
 579 static int get_registers(struct pci_dev *dev, struct me4000_info *board_info)
 580 {
 581
 582         /*--------------------------- plx regbase ---------------------------------*/
 583
 584         board_info->plx_regbase = pci_resource_start(dev, 1);
 585         if (board_info->plx_regbase == 0) {
 586                 printk(KERN_ERR
 587                        "ME4000:get_registers():PCI base address 1 is not available\n");
 588                 return -ENODEV;
 589         }
 590         board_info->plx_regbase_size = pci_resource_len(dev, 1);
 591
 592         PDEBUG
 593             ("get_registers():PLX configuration registers at address 0x%4lX [0x%4lX]\n",
 594              board_info->plx_regbase, board_info->plx_regbase_size);
 595
 596         /*--------------------------- me4000 regbase ------------------------------*/
 597
 598         board_info->me4000_regbase = pci_resource_start(dev, 2);
 599         if (board_info->me4000_regbase == 0) {
 600                 printk(KERN_ERR
 601                        "ME4000:get_registers():PCI base address 2 is not available\n");
 602                 return -ENODEV;
 603         }
 604         board_info->me4000_regbase_size = pci_resource_len(dev, 2);
 605
 606         PDEBUG("get_registers():ME4000 registers at address 0x%4lX [0x%4lX]\n",
 607                board_info->me4000_regbase, board_info->me4000_regbase_size);
 608
 609         /*--------------------------- timer regbase ------------------------------*/
 610
 611         board_info->timer_regbase = pci_resource_start(dev, 3);
 612         if (board_info->timer_regbase == 0) {
 613                 printk(KERN_ERR
 614                        "ME4000:get_registers():PCI base address 3 is not available\n");
 615                 return -ENODEV;
 616         }
 617         board_info->timer_regbase_size = pci_resource_len(dev, 3);
 618
 619         PDEBUG("get_registers():Timer registers at address 0x%4lX [0x%4lX]\n",
 620                board_info->timer_regbase, board_info->timer_regbase_size);
 621
 622         /*--------------------------- program regbase ------------------------------*/
 623
 624         board_info->program_regbase = pci_resource_start(dev, 5);
 625         if (board_info->program_regbase == 0) {
 626                 printk(KERN_ERR
 627                        "get_registers():ME4000:PCI base address 5 is not available\n");
 628                 return -ENODEV;
 629         }
 630         board_info->program_regbase_size = pci_resource_len(dev, 5);
 631
 632         PDEBUG("get_registers():Program registers at address 0x%4lX [0x%4lX]\n",
 633                board_info->program_regbase, board_info->program_regbase_size);
 634
 635         return 0;
 636 }
 637
 638 static int init_board_info(struct pci_dev *pci_dev_p,
 639                            struct me4000_info *board_info)
 640 {
 641         int i;
 642         int result;
 643         struct list_head *board_p;
 644         board_info->pci_dev_p = pci_dev_p;
 645
 646         for (i = 0; i < ARRAY_SIZE(me4000_boards); i++) {
 647                 if (me4000_boards[i].device_id == pci_dev_p->device) {
 648                         board_info->board_p = &me4000_boards[i];
 649                         break;
 650                 }
 651         }
 652         if (i == ARRAY_SIZE(me4000_boards)) {
 653                 printk(KERN_ERR
 654                        "ME4000:init_board_info():Device ID not valid\n");
 655                 return -ENODEV;
 656         }
 657
 658         /* Get the index of the board in the global list */
 659         i = 0;
 660         list_for_each(board_p, &me4000_board_info_list) {
 661                 if (board_p == &board_info->list) {
 662                         board_info->board_count = i;
 663                         break;
 664                 }
 665                 i++;
 666         }
 667         if (board_p == &me4000_board_info_list) {
 668                 printk(KERN_ERR
 669                        "ME4000:init_board_info():Cannot get index of board\n");
 670                 return -ENODEV;
 671         }
 672
 673         /* Init list head for analog output contexts */
 674         INIT_LIST_HEAD(&board_info->ao_context_list);
 675
 676         /* Init spin locks */
 677         spin_lock_init(&board_info->preload_lock);
 678         spin_lock_init(&board_info->ai_ctrl_lock);
 679
 680         /* Get the serial number */
 681         result = pci_read_config_dword(pci_dev_p, 0x2C, &board_info->serial_no);
 682         if (result != PCIBIOS_SUCCESSFUL) {
 683                 printk(KERN_WARNING
 684                        "ME4000:init_board_info: Can't get serial_no\n");
 685                 return result;
 686         }
 687         PDEBUG("init_board_info():serial_no = 0x%x\n", board_info->serial_no);
 688
 689         /* Get the hardware revision */
 690         result =
 691             pci_read_config_byte(pci_dev_p, 0x08, &board_info->hw_revision);
 692         if (result != PCIBIOS_SUCCESSFUL) {
 693                 printk(KERN_WARNING
 694                        "ME4000:init_board_info():Can't get hw_revision\n");
 695                 return result;
 696         }
 697         PDEBUG("init_board_info():hw_revision = 0x%x\n",
 698                board_info->hw_revision);
 699
 700         /* Get the vendor id */
 701         board_info->vendor_id = pci_dev_p->vendor;
 702         PDEBUG("init_board_info():vendor_id = 0x%x\n", board_info->vendor_id);
 703
 704         /* Get the device id */
 705         board_info->device_id = pci_dev_p->device;
 706         PDEBUG("init_board_info():device_id = 0x%x\n", board_info->device_id);
 707
 708         /* Get the pci device number */
 709         board_info->pci_dev_no = PCI_FUNC(pci_dev_p->devfn);
 710         PDEBUG("init_board_info():pci_func_no = 0x%x\n",
 711                board_info->pci_func_no);
 712
 713         /* Get the pci slot number */
 714         board_info->pci_dev_no = PCI_SLOT(pci_dev_p->devfn);
 715         PDEBUG("init_board_info():pci_dev_no = 0x%x\n", board_info->pci_dev_no);
 716
 717         /* Get the pci bus number */
 718         board_info->pci_bus_no = pci_dev_p->bus->number;
 719         PDEBUG("init_board_info():pci_bus_no = 0x%x\n", board_info->pci_bus_no);
 720
 721         /* Get the irq assigned to the board */
 722         board_info->irq = pci_dev_p->irq;
 723         PDEBUG("init_board_info():irq = %d\n", board_info->irq);
 724
 725         return 0;
 726 }
 727
 728 static int alloc_ao_contexts(struct me4000_info *info)
 729 {
 730         int i;
 731         int err;
 732         struct me4000_ao_context *ao_context;
 733
 734         for (i = 0; i < info->board_p->ao.count; i++) {
 735                 ao_context = kzalloc(sizeof(struct me4000_ao_context),
 736                                                                 GFP_KERNEL);
 737                 if (!ao_context) {
 738                         printk(KERN_ERR
 739                                "alloc_ao_contexts():Can't get memory for ao context\n");
 740                         release_ao_contexts(info);
 741                         return -ENOMEM;
 742                 }
 743
 744                 spin_lock_init(&ao_context->use_lock);
 745                 spin_lock_init(&ao_context->int_lock);
 746                 ao_context->irq = info->irq;
 747                 init_waitqueue_head(&ao_context->wait_queue);
 748                 ao_context->board_info = info;
 749
 750                 if (info->board_p->ao.fifo_count) {
 751                         /* Allocate circular buffer */
 752                         ao_context->circ_buf.buf =
 753                             kzalloc(ME4000_AO_BUFFER_SIZE, GFP_KERNEL);
 754                         if (!ao_context->circ_buf.buf) {
 755                                 printk(KERN_ERR
 756                                        "alloc_ao_contexts():Can't get circular buffer\n");
 757                                 release_ao_contexts(info);
 758                                 return -ENOMEM;
 759                         }
 760
 761                         /* Clear the circular buffer */
 762                         ao_context->circ_buf.head = 0;
 763                         ao_context->circ_buf.tail = 0;
 764                 }
 765
 766                 switch (i) {
 767                 case 0:
 768                         ao_context->ctrl_reg =
 769                             info->me4000_regbase + ME4000_AO_00_CTRL_REG;
 770                         ao_context->status_reg =
 771                             info->me4000_regbase + ME4000_AO_00_STATUS_REG;
 772                         ao_context->fifo_reg =
 773                             info->me4000_regbase + ME4000_AO_00_FIFO_REG;
 774                         ao_context->single_reg =
 775                             info->me4000_regbase + ME4000_AO_00_SINGLE_REG;
 776                         ao_context->timer_reg =
 777                             info->me4000_regbase + ME4000_AO_00_TIMER_REG;
 778                         ao_context->irq_status_reg =
 779                             info->me4000_regbase + ME4000_IRQ_STATUS_REG;
 780                         ao_context->preload_reg =
 781                             info->me4000_regbase + ME4000_AO_LOADSETREG_XX;
 782                         break;
 783                 case 1:
 784                         ao_context->ctrl_reg =
 785                             info->me4000_regbase + ME4000_AO_01_CTRL_REG;
 786                         ao_context->status_reg =
 787                             info->me4000_regbase + ME4000_AO_01_STATUS_REG;
 788                         ao_context->fifo_reg =
 789                             info->me4000_regbase + ME4000_AO_01_FIFO_REG;
 790                         ao_context->single_reg =
 791                             info->me4000_regbase + ME4000_AO_01_SINGLE_REG;
 792                         ao_context->timer_reg =
 793                             info->me4000_regbase + ME4000_AO_01_TIMER_REG;
 794                         ao_context->irq_status_reg =
 795                             info->me4000_regbase + ME4000_IRQ_STATUS_REG;
 796                         ao_context->preload_reg =
 797                             info->me4000_regbase + ME4000_AO_LOADSETREG_XX;
 798                         break;
 799                 case 2:
 800                         ao_context->ctrl_reg =
 801                             info->me4000_regbase + ME4000_AO_02_CTRL_REG;
 802                         ao_context->status_reg =
 803                             info->me4000_regbase + ME4000_AO_02_STATUS_REG;
 804                         ao_context->fifo_reg =
 805                             info->me4000_regbase + ME4000_AO_02_FIFO_REG;
 806                         ao_context->single_reg =
 807                             info->me4000_regbase + ME4000_AO_02_SINGLE_REG;
 808                         ao_context->timer_reg =
 809                             info->me4000_regbase + ME4000_AO_02_TIMER_REG;
 810                         ao_context->irq_status_reg =
 811                             info->me4000_regbase + ME4000_IRQ_STATUS_REG;
 812                         ao_context->preload_reg =
 813                             info->me4000_regbase + ME4000_AO_LOADSETREG_XX;
 814                         break;
 815                 case 3:
 816                         ao_context->ctrl_reg =
 817                             info->me4000_regbase + ME4000_AO_03_CTRL_REG;
 818                         ao_context->status_reg =
 819                             info->me4000_regbase + ME4000_AO_03_STATUS_REG;
 820                         ao_context->fifo_reg =
 821                             info->me4000_regbase + ME4000_AO_03_FIFO_REG;
 822                         ao_context->single_reg =
 823                             info->me4000_regbase + ME4000_AO_03_SINGLE_REG;
 824                         ao_context->timer_reg =
 825                             info->me4000_regbase + ME4000_AO_03_TIMER_REG;
 826                         ao_context->irq_status_reg =
 827                             info->me4000_regbase + ME4000_IRQ_STATUS_REG;
 828                         ao_context->preload_reg =
 829                             info->me4000_regbase + ME4000_AO_LOADSETREG_XX;
 830                         break;
 831                 default:
 832                         break;
 833                 }
 834
 835                 if (info->board_p->ao.fifo_count) {
 836                         /* Request the interrupt line */
 837                         err =
 838                             request_irq(ao_context->irq, me4000_ao_isr,
 839                                         IRQF_DISABLED | IRQF_SHARED,
 840                                         ME4000_NAME, ao_context);
 841                         if (err) {
 842                                 printk(KERN_ERR
 843                                        "%s:Can't get interrupt line", __func__);
 844                                 kfree(ao_context->circ_buf.buf);
 845                                 kfree(ao_context);
 846                                 release_ao_contexts(info);
 847                                 return -ENODEV;
 848                         }
 849                 }
 850
 851                 list_add_tail(&ao_context->list, &info->ao_context_list);
 852                 ao_context->index = i;
 853         }
 854
 855         return 0;
 856 }
 857
 858 static void release_ao_contexts(struct me4000_info *board_info)
 859 {
 860         struct me4000_ao_context *ao_context, *ao_context_safe;
 861
 862         /* Clear analog output context list */
 863         list_for_each_entry_safe(ao_context, ao_context_safe,
 864                         &board_info->ao_context_list, list) {
 865                 free_irq(ao_context->irq, ao_context);
 866                 kfree(ao_context->circ_buf.buf);
 867                 list_del(&ao_context->list);
 868                 kfree(ao_context);
 869         }
 870 }
 871
 872 static int alloc_ai_context(struct me4000_info *info)
 873 {
 874         struct me4000_ai_context *ai_context;
 875
 876         if (info->board_p->ai.count) {
 877                 ai_context = kzalloc(sizeof(struct me4000_ai_context),
 878                                                                 GFP_KERNEL);
 879                 if (!ai_context) {
 880                         printk(KERN_ERR
 881                                "ME4000:alloc_ai_context():Can't get memory for ai context\n");
 882                         return -ENOMEM;
 883                 }
 884
 885                 info->ai_context = ai_context;
 886
 887                 spin_lock_init(&ai_context->use_lock);
 888                 spin_lock_init(&ai_context->int_lock);
 889                 ai_context->number = 0;
 890                 ai_context->irq = info->irq;
 891                 init_waitqueue_head(&ai_context->wait_queue);
 892                 ai_context->board_info = info;
 893
 894                 ai_context->ctrl_reg =
 895                     info->me4000_regbase + ME4000_AI_CTRL_REG;
 896                 ai_context->status_reg =
 897                     info->me4000_regbase + ME4000_AI_STATUS_REG;
 898                 ai_context->channel_list_reg =
 899                     info->me4000_regbase + ME4000_AI_CHANNEL_LIST_REG;
 900                 ai_context->data_reg =
 901                     info->me4000_regbase + ME4000_AI_DATA_REG;
 902                 ai_context->chan_timer_reg =
 903                     info->me4000_regbase + ME4000_AI_CHAN_TIMER_REG;
 904                 ai_context->chan_pre_timer_reg =
 905                     info->me4000_regbase + ME4000_AI_CHAN_PRE_TIMER_REG;
 906                 ai_context->scan_timer_low_reg =
 907                     info->me4000_regbase + ME4000_AI_SCAN_TIMER_LOW_REG;
 908                 ai_context->scan_timer_high_reg =
 909                     info->me4000_regbase + ME4000_AI_SCAN_TIMER_HIGH_REG;
 910                 ai_context->scan_pre_timer_low_reg =
 911                     info->me4000_regbase + ME4000_AI_SCAN_PRE_TIMER_LOW_REG;
 912                 ai_context->scan_pre_timer_high_reg =
 913                     info->me4000_regbase + ME4000_AI_SCAN_PRE_TIMER_HIGH_REG;
 914                 ai_context->start_reg =
 915                     info->me4000_regbase + ME4000_AI_START_REG;
 916                 ai_context->irq_status_reg =
 917                     info->me4000_regbase + ME4000_IRQ_STATUS_REG;
 918                 ai_context->sample_counter_reg =
 919                     info->me4000_regbase + ME4000_AI_SAMPLE_COUNTER_REG;
 920         }
 921
 922         return 0;
 923 }
 924
 925 static int alloc_dio_context(struct me4000_info *info)
 926 {
 927         struct me4000_dio_context *dio_context;
 928
 929         if (info->board_p->dio.count) {
 930                 dio_context = kzalloc(sizeof(struct me4000_dio_context),
 931                                                                 GFP_KERNEL);
 932                 if (!dio_context) {
 933                         printk(KERN_ERR
 934                                "ME4000:alloc_dio_context():Can't get memory for dio context\n");
 935                         return -ENOMEM;
 936                 }
 937
 938                 info->dio_context = dio_context;
 939
 940                 spin_lock_init(&dio_context->use_lock);
 941                 dio_context->board_info = info;
 942
 943                 dio_context->dio_count = info->board_p->dio.count;
 944
 945                 dio_context->dir_reg =
 946                     info->me4000_regbase + ME4000_DIO_DIR_REG;
 947                 dio_context->ctrl_reg =
 948                     info->me4000_regbase + ME4000_DIO_CTRL_REG;
 949                 dio_context->port_0_reg =
 950                     info->me4000_regbase + ME4000_DIO_PORT_0_REG;
 951                 dio_context->port_1_reg =
 952                     info->me4000_regbase + ME4000_DIO_PORT_1_REG;
 953                 dio_context->port_2_reg =
 954                     info->me4000_regbase + ME4000_DIO_PORT_2_REG;
 955                 dio_context->port_3_reg =
 956                     info->me4000_regbase + ME4000_DIO_PORT_3_REG;
 957         }
 958
 959         return 0;
 960 }
 961
 962 static int alloc_cnt_context(struct me4000_info *info)
 963 {
 964         struct me4000_cnt_context *cnt_context;
 965
 966         if (info->board_p->cnt.count) {
 967                 cnt_context = kzalloc(sizeof(struct me4000_cnt_context),
 968                                                                 GFP_KERNEL);
 969                 if (!cnt_context) {
 970                         printk(KERN_ERR
 971                                "ME4000:alloc_cnt_context():Can't get memory for cnt context\n");
 972                         return -ENOMEM;
 973                 }
 974
 975                 info->cnt_context = cnt_context;
 976
 977                 spin_lock_init(&cnt_context->use_lock);
 978                 cnt_context->board_info = info;
 979
 980                 cnt_context->ctrl_reg =
 981                     info->timer_regbase + ME4000_CNT_CTRL_REG;
 982                 cnt_context->counter_0_reg =
 983                     info->timer_regbase + ME4000_CNT_COUNTER_0_REG;
 984                 cnt_context->counter_1_reg =
 985                     info->timer_regbase + ME4000_CNT_COUNTER_1_REG;
 986                 cnt_context->counter_2_reg =
 987                     info->timer_regbase + ME4000_CNT_COUNTER_2_REG;
 988         }
 989
 990         return 0;
 991 }
 992
 993 static int alloc_ext_int_context(struct me4000_info *info)
 994 {
 995         struct me4000_ext_int_context *ext_int_context;
 996
 997         if (info->board_p->cnt.count) {
 998                 ext_int_context =
 999                     kzalloc(sizeof(struct me4000_ext_int_context), GFP_KERNEL);
1000                 if (!ext_int_context) {
1001                         printk(KERN_ERR
1002                                "ME4000:alloc_ext_int_context():Can't get memory for cnt context\n");
1003                         return -ENOMEM;
1004                 }
1005
1006                 info->ext_int_context = ext_int_context;
1007
1008                 spin_lock_init(&ext_int_context->use_lock);
1009                 ext_int_context->board_info = info;
1010
1011                 ext_int_context->fasync_ptr = NULL;
1012                 ext_int_context->irq = info->irq;
1013
1014                 ext_int_context->ctrl_reg =
1015                     info->me4000_regbase + ME4000_AI_CTRL_REG;
1016                 ext_int_context->irq_status_reg =
1017                     info->me4000_regbase + ME4000_IRQ_STATUS_REG;
1018         }
1019
1020         return 0;
1021 }
1022
1023 static int me4000_probe(struct pci_dev *dev, const struct pci_device_id *id)
1024 {
1025         int result = 0;
1026         struct me4000_info *board_info;
1027
1028         CALL_PDEBUG("me4000_probe() is executed\n");
1029
1030         /* Allocate structure for board context */
1031         board_info = kzalloc(sizeof(struct me4000_info), GFP_KERNEL);
1032         if (!board_info) {
1033                 printk(KERN_ERR
1034                        "ME4000:Can't get memory for board info structure\n");
1035                 result = -ENOMEM;
1036                 goto PROBE_ERROR_1;
1037         }
1038
1039         /* Add to global linked list */
1040         list_add_tail(&board_info->list, &me4000_board_info_list);
1041
1042         /* Get the PCI base registers */
1043         result = get_registers(dev, board_info);
1044         if (result) {
1045                 printk(KERN_ERR "%s:Cannot get registers\n", __func__);
1046                 goto PROBE_ERROR_2;
1047         }
1048
1049         /* Enable the device */
1050         result = pci_enable_device(dev);
1051         if (result < 0) {
1052                 printk(KERN_ERR "%s:Cannot enable PCI device\n", __func__);
1053                 goto PROBE_ERROR_2;
1054         }
1055
1056         /* Request the PCI register regions */
1057         result = pci_request_regions(dev, ME4000_NAME);
1058         if (result < 0) {
1059                 printk(KERN_ERR "%s:Cannot request I/O regions\n", __func__);
1060                 goto PROBE_ERROR_2;
1061         }
1062
1063         /* Initialize board info */
1064         result = init_board_info(dev, board_info);
1065         if (result) {
1066                 printk(KERN_ERR "%s:Cannot init baord info\n", __func__);
1067                 goto PROBE_ERROR_3;
1068         }
1069
1070         /* Download the xilinx firmware */
1071         result = me4000_xilinx_download(board_info);
1072         if (result) {
1073                 printk(KERN_ERR "%s:Can't download firmware\n", __func__);
1074                 goto PROBE_ERROR_3;
1075         }
1076
1077         /* Make a hardware reset */
1078         result = me4000_reset_board(board_info);
1079         if (result) {
1080                 printk(KERN_ERR "%s :Can't reset board\n", __func__);
1081                 goto PROBE_ERROR_3;
1082         }
1083
1084         /* Allocate analog output context structures */
1085         result = alloc_ao_contexts(board_info);
1086         if (result) {
1087                 printk(KERN_ERR "%s:Cannot allocate ao contexts\n", __func__);
1088                 goto PROBE_ERROR_3;
1089         }
1090
1091         /* Allocate analog input context */
1092         result = alloc_ai_context(board_info);
1093         if (result) {
1094                 printk(KERN_ERR "%s:Cannot allocate ai context\n", __func__);
1095                 goto PROBE_ERROR_4;
1096         }
1097
1098         /* Allocate digital I/O context */
1099         result = alloc_dio_context(board_info);
1100         if (result) {
1101                 printk(KERN_ERR "%s:Cannot allocate dio context\n", __func__);
1102                 goto PROBE_ERROR_5;
1103         }
1104
1105         /* Allocate counter context */
1106         result = alloc_cnt_context(board_info);
1107         if (result) {
1108                 printk(KERN_ERR "%s:Cannot allocate cnt context\n", __func__);
1109                 goto PROBE_ERROR_6;
1110         }
1111
1112         /* Allocate external interrupt context */
1113         result = alloc_ext_int_context(board_info);
1114         if (result) {
1115                 printk(KERN_ERR
1116                        "%s:Cannot allocate ext_int context\n", __func__);
1117                 goto PROBE_ERROR_7;
1118         }
1119
1120         return 0;
1121
1122 PROBE_ERROR_7:
1123         kfree(board_info->cnt_context);
1124
1125 PROBE_ERROR_6:
1126         kfree(board_info->dio_context);
1127
1128 PROBE_ERROR_5:
1129         kfree(board_info->ai_context);
1130
1131 PROBE_ERROR_4:
1132         release_ao_contexts(board_info);
1133
1134 PROBE_ERROR_3:
1135         pci_release_regions(dev);
1136
1137 PROBE_ERROR_2:
1138         list_del(&board_info->list);
1139         kfree(board_info);
1140
1141 PROBE_ERROR_1:
1142         return result;
1143 }
1144
1145 static int me4000_xilinx_download(struct me4000_info *info)
1146 {
1147         int size = 0;
1148         u32 value = 0;
1149         int idx = 0;
1150         unsigned char *firm;
1151         wait_queue_head_t queue;
1152
1153         CALL_PDEBUG("me4000_xilinx_download() is executed\n");
1154
1155         init_waitqueue_head(&queue);
1156
1157         firm = (info->device_id == 0x4610) ? xilinx_firm_4610 : xilinx_firm;
1158
1159         /*
1160          * Set PLX local interrupt 2 polarity to high.
1161          * Interrupt is thrown by init pin of xilinx.
1162          */
1163         outl(0x10, info->plx_regbase + PLX_INTCSR);
1164
1165         /* Set /CS and /WRITE of the Xilinx */
1166         value = inl(info->plx_regbase + PLX_ICR);
1167         value |= 0x100;
1168         outl(value, info->plx_regbase + PLX_ICR);
1169
1170         /* Init Xilinx with CS1 */
1171         inb(info->program_regbase + 0xC8);
1172
1173         /* Wait until /INIT pin is set */
1174         udelay(20);
1175         if (!(inl(info->plx_regbase + PLX_INTCSR) & 0x20)) {
1176                 printk(KERN_ERR "%s:Can't init Xilinx\n", __func__);
1177                 return -EIO;
1178         }
1179
1180         /* Reset /CS and /WRITE of the Xilinx */
1181         value = inl(info->plx_regbase + PLX_ICR);
1182         value &= ~0x100;
1183         outl(value, info->plx_regbase + PLX_ICR);
1184
1185         /* Download Xilinx firmware */
1186         size = (firm[0] << 24) + (firm[1] << 16) + (firm[2] << 8) + firm[3];
1187         udelay(10);
1188
1189         for (idx = 0; idx < size; idx++) {
1190                 outb(firm[16 + idx], info->program_regbase);
1191
1192                 udelay(10);
1193
1194                 /* Check if BUSY flag is low */
1195                 if (inl(info->plx_regbase + PLX_ICR) & 0x20) {
1196                         printk(KERN_ERR
1197                                "%s:Xilinx is still busy (idx = %d)\n", __func__,
1198                                idx);
1199                         return -EIO;
1200                 }
1201         }
1202
1203         PDEBUG("me4000_xilinx_download():%d bytes written\n", idx);
1204
1205         /* If done flag is high download was successful */
1206         if (inl(info->plx_regbase + PLX_ICR) & 0x4) {
1207                 PDEBUG("me4000_xilinx_download():Done flag is set\n");
1208                 PDEBUG("me4000_xilinx_download():Download was successful\n");
1209         } else {
1210                 printk(KERN_ERR
1211                        "ME4000:%s:DONE flag is not set\n", __func__);
1212                 printk(KERN_ERR
1213                        "ME4000:%s:Download not succesful\n", __func__);
1214                 return -EIO;
1215         }
1216
1217         /* Set /CS and /WRITE */
1218         value = inl(info->plx_regbase + PLX_ICR);
1219         value |= 0x100;
1220         outl(value, info->plx_regbase + PLX_ICR);
1221
1222         return 0;
1223 }
1224
1225 static int me4000_reset_board(struct me4000_info *info)
1226 {
1227         unsigned long icr;
1228
1229         CALL_PDEBUG("me4000_reset_board() is executed\n");
1230
1231         /* Make a hardware reset */
1232         icr = me4000_inl(info->plx_regbase + PLX_ICR);
1233         icr |= 0x40000000;
1234         me4000_outl(icr, info->plx_regbase + PLX_ICR);
1235         icr &= ~0x40000000;
1236         me4000_outl(icr, info->plx_regbase + PLX_ICR);
1237
1238         /* Set both stop bits in the analog input control register */
1239         me4000_outl(ME4000_AI_CTRL_BIT_IMMEDIATE_STOP | ME4000_AI_CTRL_BIT_STOP,
1240                     info->me4000_regbase + ME4000_AI_CTRL_REG);
1241
1242         /* Set both stop bits in the analog output control register */
1243         me4000_outl(ME4000_AO_CTRL_BIT_IMMEDIATE_STOP | ME4000_AO_CTRL_BIT_STOP,
1244                     info->me4000_regbase + ME4000_AO_00_CTRL_REG);
1245         me4000_outl(ME4000_AO_CTRL_BIT_IMMEDIATE_STOP | ME4000_AO_CTRL_BIT_STOP,
1246                     info->me4000_regbase + ME4000_AO_01_CTRL_REG);
1247         me4000_outl(ME4000_AO_CTRL_BIT_IMMEDIATE_STOP | ME4000_AO_CTRL_BIT_STOP,
1248                     info->me4000_regbase + ME4000_AO_02_CTRL_REG);
1249         me4000_outl(ME4000_AO_CTRL_BIT_IMMEDIATE_STOP | ME4000_AO_CTRL_BIT_STOP,
1250                     info->me4000_regbase + ME4000_AO_03_CTRL_REG);
1251
1252         /* 0x8000 to the DACs means an output voltage of 0V */
1253         me4000_outl(0x8000, info->me4000_regbase + ME4000_AO_00_SINGLE_REG);
1254         me4000_outl(0x8000, info->me4000_regbase + ME4000_AO_01_SINGLE_REG);
1255         me4000_outl(0x8000, info->me4000_regbase + ME4000_AO_02_SINGLE_REG);
1256         me4000_outl(0x8000, info->me4000_regbase + ME4000_AO_03_SINGLE_REG);
1257
1258         /* Enable interrupts on the PLX */
1259         me4000_outl(0x43, info->plx_regbase + PLX_INTCSR);
1260
1261         /* Set the adustment register for AO demux */
1262         me4000_outl(ME4000_AO_DEMUX_ADJUST_VALUE,
1263                     info->me4000_regbase + ME4000_AO_DEMUX_ADJUST_REG);
1264
1265         /* Set digital I/O direction for port 0 to output on isolated versions */
1266         if (!(me4000_inl(info->me4000_regbase + ME4000_DIO_DIR_REG) & 0x1)) {
1267                 me4000_outl(0x1, info->me4000_regbase + ME4000_DIO_CTRL_REG);
1268         }
1269
1270         return 0;
1271 }
1272
1273 static int me4000_open(struct inode *inode_p, struct file *file_p)
1274 {
1275         int board, dev, mode;
1276         int err = 0;
1277         int i;
1278         struct list_head *ptr;
1279         struct me4000_info *board_info = NULL;
1280         struct me4000_ao_context *ao_context = NULL;
1281         struct me4000_ai_context *ai_context = NULL;
1282         struct me4000_dio_context *dio_context = NULL;
1283         struct me4000_cnt_context *cnt_context = NULL;
1284         struct me4000_ext_int_context *ext_int_context = NULL;
1285
1286         CALL_PDEBUG("me4000_open() is executed\n");
1287
1288         /* Analog output */
1289         if (MAJOR(inode_p->i_rdev) == me4000_ao_major_driver_no) {
1290                 board = AO_BOARD(inode_p->i_rdev);
1291                 dev = AO_PORT(inode_p->i_rdev);
1292                 mode = AO_MODE(inode_p->i_rdev);
1293
1294                 PDEBUG("me4000_open():board = %d ao = %d mode = %d\n", board,
1295                        dev, mode);
1296
1297                 /* Search for the board context */
1298                 i = 0;
1299                 list_for_each(ptr, &me4000_board_info_list) {
1300                         if (i == board)
1301                                 break;
1302                         i++;
1303                 }
1304                 board_info = list_entry(ptr, struct me4000_info, list);
1305
1306                 if (ptr == &me4000_board_info_list) {
1307                         printk(KERN_ERR
1308                                "ME4000:me4000_open():Board %d not in device list\n",
1309                                board);
1310                         return -ENODEV;
1311                 }
1312
1313                 /* Search for the dac context */
1314                 i = 0;
1315                 list_for_each(ptr, &board_info->ao_context_list) {
1316                         if (i == dev)
1317                                 break;
1318                         i++;
1319                 }
1320                 ao_context = list_entry(ptr, struct me4000_ao_context, list);
1321
1322                 if (ptr == &board_info->ao_context_list) {
1323                         printk(KERN_ERR
1324                                "ME4000:me4000_open():Device %d not in device list\n",
1325                                dev);
1326                         return -ENODEV;
1327                 }
1328
1329                 /* Check if mode is valid */
1330                 if (mode > 2) {
1331                         printk(KERN_ERR
1332                                "ME4000:me4000_open():Mode is not valid\n");
1333                         return -ENODEV;
1334                 }
1335
1336                 /* Check if mode is valid for this AO */
1337                 if ((mode != ME4000_AO_CONV_MODE_SINGLE)
1338                     && (dev >= board_info->board_p->ao.fifo_count)) {
1339                         printk(KERN_ERR
1340                                "ME4000:me4000_open():AO %d only in single mode available\n",
1341                                dev);
1342                         return -ENODEV;
1343                 }
1344
1345                 /* Check if already opened */
1346                 spin_lock(&ao_context->use_lock);
1347                 if (ao_context->dac_in_use) {
1348                         printk(KERN_ERR
1349                                "ME4000:me4000_open():AO %d already in use\n",
1350                                dev);
1351                         spin_unlock(&ao_context->use_lock);
1352                         return -EBUSY;
1353                 }
1354                 ao_context->dac_in_use = 1;
1355                 spin_unlock(&ao_context->use_lock);
1356
1357                 ao_context->mode = mode;
1358
1359                 /* Hold the context in private data */
1360                 file_p->private_data = ao_context;
1361
1362                 /* Set file operations pointer */
1363                 file_p->f_op = me4000_ao_fops_array[mode];
1364
1365                 err = me4000_ao_prepare(ao_context);
1366                 if (err) {
1367                         ao_context->dac_in_use = 0;
1368                         return 1;
1369                 }
1370         }
1371         /* Analog input */
1372         else if (MAJOR(inode_p->i_rdev) == me4000_ai_major_driver_no) {
1373                 board = AI_BOARD(inode_p->i_rdev);
1374                 mode = AI_MODE(inode_p->i_rdev);
1375
1376                 PDEBUG("me4000_open():ai board = %d mode = %d\n", board, mode);
1377
1378                 /* Search for the board context */
1379                 i = 0;
1380                 list_for_each(ptr, &me4000_board_info_list) {
1381                         if (i == board)
1382                                 break;
1383                         i++;
1384                 }
1385                 board_info = list_entry(ptr, struct me4000_info, list);
1386
1387                 if (ptr == &me4000_board_info_list) {
1388                         printk(KERN_ERR
1389                                "ME4000:me4000_open():Board %d not in device list\n",
1390                                board);
1391                         return -ENODEV;
1392                 }
1393
1394                 ai_context = board_info->ai_context;
1395
1396                 /* Check if mode is valid */
1397                 if (mode > 5) {
1398                         printk(KERN_ERR
1399                                "ME4000:me4000_open():Mode is not valid\n");
1400                         return -EINVAL;
1401                 }
1402
1403                 /* Check if already opened */
1404                 spin_lock(&ai_context->use_lock);
1405                 if (ai_context->in_use) {
1406                         printk(KERN_ERR
1407                                "ME4000:me4000_open():AI already in use\n");
1408                         spin_unlock(&ai_context->use_lock);
1409                         return -EBUSY;
1410                 }
1411                 ai_context->in_use = 1;
1412                 spin_unlock(&ai_context->use_lock);
1413
1414                 ai_context->mode = mode;
1415
1416                 /* Hold the context in private data */
1417                 file_p->private_data = ai_context;
1418
1419                 /* Set file operations pointer */
1420                 file_p->f_op = me4000_ai_fops_array[mode];
1421
1422                 /* Prepare analog input */
1423                 me4000_ai_prepare(ai_context);
1424         }
1425         /* Digital I/O */
1426         else if (MAJOR(inode_p->i_rdev) == me4000_dio_major_driver_no) {
1427                 board = DIO_BOARD(inode_p->i_rdev);
1428                 dev = 0;
1429                 mode = 0;
1430
1431                 PDEBUG("me4000_open():board = %d\n", board);
1432
1433                 /* Search for the board context */
1434                 list_for_each_entry(board_info, &me4000_board_info_list, list) {
1435                         if (board_info->board_count == board)
1436                                 break;
1437                 }
1438
1439                 if (&board_info->list == &me4000_board_info_list) {
1440                         printk(KERN_ERR
1441                                "ME4000:me4000_open():Board %d not in device list\n",
1442                                board);
1443                         return -ENODEV;
1444                 }
1445
1446                 /* Search for the dio context */
1447                 dio_context = board_info->dio_context;
1448
1449                 /* Check if already opened */
1450                 spin_lock(&dio_context->use_lock);
1451                 if (dio_context->in_use) {
1452                         printk(KERN_ERR
1453                                "ME4000:me4000_open():DIO already in use\n");
1454                         spin_unlock(&dio_context->use_lock);
1455                         return -EBUSY;
1456                 }
1457                 dio_context->in_use = 1;
1458                 spin_unlock(&dio_context->use_lock);
1459
1460                 /* Hold the context in private data */
1461                 file_p->private_data = dio_context;
1462
1463                 /* Set file operations pointer to single functions */
1464                 file_p->f_op = &me4000_dio_fops;
1465
1466                 //me4000_dio_reset(dio_context);
1467         }
1468         /* Counters */
1469         else if (MAJOR(inode_p->i_rdev) == me4000_cnt_major_driver_no) {
1470                 board = CNT_BOARD(inode_p->i_rdev);
1471                 dev = 0;
1472                 mode = 0;
1473
1474                 PDEBUG("me4000_open():board = %d\n", board);
1475
1476                 /* Search for the board context */
1477                 list_for_each_entry(board_info, &me4000_board_info_list, list) {
1478                         if (board_info->board_count == board)
1479                                 break;
1480                 }
1481
1482                 if (&board_info->list == &me4000_board_info_list) {
1483                         printk(KERN_ERR
1484                                "ME4000:me4000_open():Board %d not in device list\n",
1485                                board);
1486                         return -ENODEV;
1487                 }
1488
1489                 /* Get the cnt context */
1490                 cnt_context = board_info->cnt_context;
1491
1492                 /* Check if already opened */
1493                 spin_lock(&cnt_context->use_lock);
1494                 if (cnt_context->in_use) {
1495                         printk(KERN_ERR
1496                                "ME4000:me4000_open():CNT already in use\n");
1497                         spin_unlock(&cnt_context->use_lock);
1498                         return -EBUSY;
1499                 }
1500                 cnt_context->in_use = 1;
1501                 spin_unlock(&cnt_context->use_lock);
1502
1503                 /* Hold the context in private data */
1504                 file_p->private_data = cnt_context;
1505
1506                 /* Set file operations pointer to single functions */
1507                 file_p->f_op = &me4000_cnt_fops;
1508         }
1509         /* External Interrupt */
1510         else if (MAJOR(inode_p->i_rdev) == me4000_ext_int_major_driver_no) {
1511                 board = EXT_INT_BOARD(inode_p->i_rdev);
1512                 dev = 0;
1513                 mode = 0;
1514
1515                 PDEBUG("me4000_open():board = %d\n", board);
1516
1517                 /* Search for the board context */
1518                 list_for_each_entry(board_info, &me4000_board_info_list, list) {
1519                         if (board_info->board_count == board)
1520                                 break;
1521                 }
1522
1523                 if (&board_info->list == &me4000_board_info_list) {
1524                         printk(KERN_ERR
1525                                "ME4000:me4000_open():Board %d not in device list\n",
1526                                board);
1527                         return -ENODEV;
1528                 }
1529
1530                 /* Get the external interrupt context */
1531                 ext_int_context = board_info->ext_int_context;
1532
1533                 /* Check if already opened */
1534                 spin_lock(&cnt_context->use_lock);
1535                 if (ext_int_context->in_use) {
1536                         printk(KERN_ERR
1537                                "ME4000:me4000_open():External interrupt already in use\n");
1538                         spin_unlock(&ext_int_context->use_lock);
1539                         return -EBUSY;
1540                 }
1541                 ext_int_context->in_use = 1;
1542                 spin_unlock(&ext_int_context->use_lock);
1543
1544                 /* Hold the context in private data */
1545                 file_p->private_data = ext_int_context;
1546
1547                 /* Set file operations pointer to single functions */
1548                 file_p->f_op = &me4000_ext_int_fops;
1549
1550                 /* Request the interrupt line */
1551                 err =
1552                     request_irq(ext_int_context->irq, me4000_ext_int_isr,
1553                                 IRQF_DISABLED | IRQF_SHARED, ME4000_NAME,
1554                                 ext_int_context);
1555                 if (err) {
1556                         printk(KERN_ERR
1557                                "ME4000:me4000_open():Can't get interrupt line");
1558                         ext_int_context->in_use = 0;
1559                         return -ENODEV;
1560                 }
1561
1562                 /* Reset the counter */
1563                 me4000_ext_int_disable(ext_int_context);
1564         } else {
1565                 printk(KERN_ERR "ME4000:me4000_open():Major number unknown\n");
1566                 return -EINVAL;
1567         }
1568
1569         return 0;
1570 }
1571
1572 static int me4000_release(struct inode *inode_p, struct file *file_p)
1573 {
1574         struct me4000_ao_context *ao_context;
1575         struct me4000_ai_context *ai_context;
1576         struct me4000_dio_context *dio_context;
1577         struct me4000_cnt_context *cnt_context;
1578         struct me4000_ext_int_context *ext_int_context;
1579
1580         CALL_PDEBUG("me4000_release() is executed\n");
1581
1582         if (MAJOR(inode_p->i_rdev) == me4000_ao_major_driver_no) {
1583                 ao_context = file_p->private_data;
1584
1585                 /* Mark DAC as unused */
1586                 ao_context->dac_in_use = 0;
1587         } else if (MAJOR(inode_p->i_rdev) == me4000_ai_major_driver_no) {
1588                 ai_context = file_p->private_data;
1589
1590                 /* Reset the analog input */
1591                 me4000_ai_reset(ai_context);
1592
1593                 /* Free the interrupt and the circular buffer */
1594                 if (ai_context->mode) {
1595                         free_irq(ai_context->irq, ai_context);
1596                         kfree(ai_context->circ_buf.buf);
1597                         ai_context->circ_buf.buf = NULL;
1598                         ai_context->circ_buf.head = 0;
1599                         ai_context->circ_buf.tail = 0;
1600                 }
1601
1602                 /* Mark AI as unused */
1603                 ai_context->in_use = 0;
1604         } else if (MAJOR(inode_p->i_rdev) == me4000_dio_major_driver_no) {
1605                 dio_context = file_p->private_data;
1606
1607                 /* Mark digital I/O as unused */
1608                 dio_context->in_use = 0;
1609         } else if (MAJOR(inode_p->i_rdev) == me4000_cnt_major_driver_no) {
1610                 cnt_context = file_p->private_data;
1611
1612                 /* Mark counters as unused */
1613                 cnt_context->in_use = 0;
1614         } else if (MAJOR(inode_p->i_rdev) == me4000_ext_int_major_driver_no) {
1615                 ext_int_context = file_p->private_data;
1616
1617                 /* Disable the externel interrupt */
1618                 me4000_ext_int_disable(ext_int_context);
1619
1620                 free_irq(ext_int_context->irq, ext_int_context);
1621
1622                 /* Mark as unused */
1623                 ext_int_context->in_use = 0;
1624         } else {
1625                 printk(KERN_ERR
1626                        "ME4000:me4000_release():Major number unknown\n");
1627                 return -EINVAL;
1628         }
1629
1630         return 0;
1631 }
1632
1633 /*------------------------------- Analog output stuff --------------------------------------*/
1634
1635 static int me4000_ao_prepare(struct me4000_ao_context *ao_context)
1636 {
1637         unsigned long flags;
1638
1639         CALL_PDEBUG("me4000_ao_prepare() is executed\n");
1640
1641         if (ao_context->mode == ME4000_AO_CONV_MODE_CONTINUOUS) {
1642                 /* Only do anything if not already in the correct mode */
1643                 unsigned long mode = me4000_inl(ao_context->ctrl_reg);
1644                 if ((mode & ME4000_AO_CONV_MODE_CONTINUOUS)
1645                     && (mode & ME4000_AO_CTRL_BIT_ENABLE_FIFO)) {
1646                         return 0;
1647                 }
1648
1649                 /* Stop any conversion */
1650                 me4000_ao_immediate_stop(ao_context);
1651
1652                 /* Set the control register to default state  */
1653                 spin_lock_irqsave(&ao_context->int_lock, flags);
1654                 me4000_outl(ME4000_AO_CONV_MODE_CONTINUOUS |
1655                             ME4000_AO_CTRL_BIT_ENABLE_FIFO |
1656                             ME4000_AO_CTRL_BIT_STOP |
1657                             ME4000_AO_CTRL_BIT_IMMEDIATE_STOP,
1658                             ao_context->ctrl_reg);
1659                 spin_unlock_irqrestore(&ao_context->int_lock, flags);
1660
1661                 /* Set to fastest sample rate */
1662                 me4000_outl(65, ao_context->timer_reg);
1663         } else if (ao_context->mode == ME4000_AO_CONV_MODE_WRAPAROUND) {
1664                 /* Only do anything if not already in the correct mode */
1665                 unsigned long mode = me4000_inl(ao_context->ctrl_reg);
1666                 if ((mode & ME4000_AO_CONV_MODE_WRAPAROUND)
1667                     && (mode & ME4000_AO_CTRL_BIT_ENABLE_FIFO)) {
1668                         return 0;
1669                 }
1670
1671                 /* Stop any conversion */
1672                 me4000_ao_immediate_stop(ao_context);
1673
1674                 /* Set the control register to default state  */
1675                 spin_lock_irqsave(&ao_context->int_lock, flags);
1676                 me4000_outl(ME4000_AO_CONV_MODE_WRAPAROUND |
1677                             ME4000_AO_CTRL_BIT_ENABLE_FIFO |
1678                             ME4000_AO_CTRL_BIT_STOP |
1679                             ME4000_AO_CTRL_BIT_IMMEDIATE_STOP,
1680                             ao_context->ctrl_reg);
1681                 spin_unlock_irqrestore(&ao_context->int_lock, flags);
1682
1683                 /* Set to fastest sample rate */
1684                 me4000_outl(65, ao_context->timer_reg);
1685         } else if (ao_context->mode == ME4000_AO_CONV_MODE_SINGLE) {
1686                 /* Only do anything if not already in the correct mode */
1687                 unsigned long mode = me4000_inl(ao_context->ctrl_reg);
1688                 if (!
1689                     (mode &
1690                      (ME4000_AO_CONV_MODE_WRAPAROUND |
1691                       ME4000_AO_CONV_MODE_CONTINUOUS))) {
1692                         return 0;
1693                 }
1694
1695                 /* Stop any conversion */
1696                 me4000_ao_immediate_stop(ao_context);
1697
1698                 /* Clear the control register */
1699                 spin_lock_irqsave(&ao_context->int_lock, flags);
1700                 me4000_outl(0x0, ao_context->ctrl_reg);
1701                 spin_unlock_irqrestore(&ao_context->int_lock, flags);
1702
1703                 /* Set voltage to 0V */
1704                 me4000_outl(0x8000, ao_context->single_reg);
1705         } else {
1706                 printk(KERN_ERR
1707                        "ME4000:me4000_ao_prepare():Invalid mode specified\n");
1708                 return -EINVAL;
1709         }
1710
1711         return 0;
1712 }
1713
1714 static int me4000_ao_reset(struct me4000_ao_context *ao_context)
1715 {
1716         u32 tmp;
1717         wait_queue_head_t queue;
1718         unsigned long flags;
1719
1720         CALL_PDEBUG("me4000_ao_reset() is executed\n");
1721
1722         init_waitqueue_head(&queue);
1723
1724         if (ao_context->mode == ME4000_AO_CONV_MODE_WRAPAROUND) {
1725                 /*
1726                  * First stop conversion of the DAC before reconfigure.
1727                  * This is essantial, cause of the state machine.
1728                  * If not stopped before configuring mode, it could
1729                  * walk in a undefined state.
1730                  */
1731                 tmp = me4000_inl(ao_context->ctrl_reg);
1732                 tmp |= ME4000_AO_CTRL_BIT_IMMEDIATE_STOP;
1733                 me4000_outl(tmp, ao_context->ctrl_reg);
1734
1735                 wait_event_timeout(queue,
1736                         (inl(ao_context->status_reg) &
1737                                 ME4000_AO_STATUS_BIT_FSM) == 0,
1738                         1);
1739
1740                 /* Set to transparent mode */
1741                 me4000_ao_simultaneous_disable(ao_context);
1742
1743                 /* Set to single mode in order to set default voltage */
1744                 me4000_outl(0x0, ao_context->ctrl_reg);
1745
1746                 /* Set voltage to 0V */
1747                 me4000_outl(0x8000, ao_context->single_reg);
1748
1749                 /* Set to fastest sample rate */
1750                 me4000_outl(65, ao_context->timer_reg);
1751
1752                 /* Set the original mode and enable FIFO */
1753                 me4000_outl(ME4000_AO_CONV_MODE_WRAPAROUND |
1754                             ME4000_AO_CTRL_BIT_ENABLE_FIFO |
1755                             ME4000_AO_CTRL_BIT_STOP |
1756                             ME4000_AO_CTRL_BIT_IMMEDIATE_STOP,
1757                             ao_context->ctrl_reg);
1758         } else if (ao_context->mode == ME4000_AO_CONV_MODE_CONTINUOUS) {
1759                 /*
1760                  * First stop conversion of the DAC before reconfigure.
1761                  * This is essantial, cause of the state machine.
1762                  * If not stopped before configuring mode, it could
1763                  * walk in a undefined state.
1764                  */
1765                 spin_lock_irqsave(&ao_context->int_lock, flags);
1766                 tmp = me4000_inl(ao_context->ctrl_reg);
1767                 tmp |= ME4000_AO_CTRL_BIT_STOP;
1768                 me4000_outl(tmp, ao_context->ctrl_reg);
1769                 spin_unlock_irqrestore(&ao_context->int_lock, flags);
1770
1771                 wait_event_timeout(queue,
1772                         (inl(ao_context->status_reg) &
1773                                 ME4000_AO_STATUS_BIT_FSM) == 0,
1774                         1);
1775
1776                 /* Clear the circular buffer */
1777                 ao_context->circ_buf.head = 0;
1778                 ao_context->circ_buf.tail = 0;
1779
1780                 /* Set to transparent mode */
1781                 me4000_ao_simultaneous_disable(ao_context);
1782
1783                 /* Set to single mode in order to set default voltage */
1784                 spin_lock_irqsave(&ao_context->int_lock, flags);
1785                 tmp = me4000_inl(ao_context->ctrl_reg);
1786                 me4000_outl(0x0, ao_context->ctrl_reg);
1787
1788                 /* Set voltage to 0V */
1789                 me4000_outl(0x8000, ao_context->single_reg);
1790
1791                 /* Set to fastest sample rate */
1792                 me4000_outl(65, ao_context->timer_reg);
1793
1794                 /* Set the original mode and enable FIFO */
1795                 me4000_outl(ME4000_AO_CONV_MODE_CONTINUOUS |
1796                             ME4000_AO_CTRL_BIT_ENABLE_FIFO |
1797                             ME4000_AO_CTRL_BIT_STOP |
1798                             ME4000_AO_CTRL_BIT_IMMEDIATE_STOP,
1799                             ao_context->ctrl_reg);
1800                 spin_unlock_irqrestore(&ao_context->int_lock, flags);
1801         } else {
1802                 /* Set to transparent mode */
1803                 me4000_ao_simultaneous_disable(ao_context);
1804
1805                 /* Set voltage to 0V */
1806                 me4000_outl(0x8000, ao_context->single_reg);
1807         }
1808
1809         return 0;
1810 }
1811
1812 static ssize_t me4000_ao_write_sing(struct file *filep, const char *buff,
1813                                     size_t cnt, loff_t *offp)
1814 {
1815         struct me4000_ao_context *ao_context = filep->private_data;
1816         u32 value;
1817         const u16 *buffer = (const u16 *)buff;
1818
1819         CALL_PDEBUG("me4000_ao_write_sing() is executed\n");
1820
1821         if (cnt != 2) {
1822                 printk(KERN_ERR
1823                        "%s:Write count is not 2\n", __func__);
1824                 return -EINVAL;
1825         }
1826
1827         if (get_user(value, buffer)) {
1828                 printk(KERN_ERR
1829                        "%s:Cannot copy data from user\n", __func__);
1830                 return -EFAULT;
1831         }
1832
1833         me4000_outl(value, ao_context->single_reg);
1834
1835         return 2;
1836 }
1837
1838 static ssize_t me4000_ao_write_wrap(struct file *filep, const char *buff,
1839                                     size_t cnt, loff_t *offp)
1840 {
1841         struct me4000_ao_context *ao_context = filep->private_data;
1842         size_t i;
1843         u32 value;
1844         u32 tmp;
1845         const u16 *buffer = (const u16 *)buff;
1846         size_t count = cnt / 2;
1847
1848         CALL_PDEBUG("me4000_ao_write_wrap() is executed\n");
1849
1850         /* Check if a conversion is already running */
1851         if (inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM) {
1852                 printk(KERN_ERR
1853                        "%s:There is already a conversion running\n", __func__);
1854                 return -EBUSY;
1855         }
1856
1857         if (count > ME4000_AO_FIFO_COUNT) {
1858                 printk(KERN_ERR
1859                        "%s:Can't load more than %d values\n", __func__,
1860                        ME4000_AO_FIFO_COUNT);
1861                 return -ENOSPC;
1862         }
1863
1864         /* Reset the FIFO */
1865         tmp = inl(ao_context->ctrl_reg);
1866         tmp &= ~ME4000_AO_CTRL_BIT_ENABLE_FIFO;
1867         outl(tmp, ao_context->ctrl_reg);
1868         tmp |= ME4000_AO_CTRL_BIT_ENABLE_FIFO;
1869         outl(tmp, ao_context->ctrl_reg);
1870
1871         for (i = 0; i < count; i++) {
1872                 if (get_user(value, buffer + i)) {
1873                         printk(KERN_ERR
1874                                "%s:Cannot copy data from user\n", __func__);
1875                         return -EFAULT;
1876                 }
1877                 if (((ao_context->fifo_reg & 0xFF) == ME4000_AO_01_FIFO_REG)
1878                     || ((ao_context->fifo_reg & 0xFF) == ME4000_AO_03_FIFO_REG))
1879                         value = value << 16;
1880                 outl(value, ao_context->fifo_reg);
1881         }
1882         CALL_PDEBUG("me4000_ao_write_wrap() is leaved with %d\n", i * 2);
1883
1884         return i * 2;
1885 }
1886
1887 static ssize_t me4000_ao_write_cont(struct file *filep, const char *buff,
1888                                     size_t cnt, loff_t *offp)
1889 {
1890         struct me4000_ao_context *ao_context = filep->private_data;
1891         const u16 *buffer = (const u16 *)buff;
1892         size_t count = cnt / 2;
1893         unsigned long flags;
1894         u32 tmp;
1895         int c = 0;
1896         int k = 0;
1897         int ret = 0;
1898         u16 svalue;
1899         u32 lvalue;
1900         int i;
1901         wait_queue_head_t queue;
1902
1903         CALL_PDEBUG("me4000_ao_write_cont() is executed\n");
1904
1905         init_waitqueue_head(&queue);
1906
1907         /* Check count */
1908         if (count <= 0) {
1909                 PDEBUG("me4000_ao_write_cont():Count is 0\n");
1910                 return 0;
1911         }
1912
1913         if (filep->f_flags & O_APPEND) {
1914                 PDEBUG("me4000_ao_write_cont():Append data to data stream\n");
1915                 while (count > 0) {
1916                         if (filep->f_flags & O_NONBLOCK) {
1917                                 if (ao_context->pipe_flag) {
1918                                         printk(KERN_ERR
1919                                                "ME4000:me4000_ao_write_cont():Broken pipe in nonblocking write\n");
1920                                         return -EPIPE;
1921                                 }
1922                                 c = me4000_space_to_end(ao_context->circ_buf,
1923                                                         ME4000_AO_BUFFER_COUNT);
1924                                 if (!c) {
1925                                         PDEBUG
1926                                             ("me4000_ao_write_cont():Returning from nonblocking write\n");
1927                                         break;
1928                                 }
1929                         } else {
1930                                 wait_event_interruptible(ao_context->wait_queue,
1931                                                          (c =
1932                                                           me4000_space_to_end
1933                                                           (ao_context->circ_buf,
1934                                                            ME4000_AO_BUFFER_COUNT)));
1935                                 if (ao_context->pipe_flag) {
1936                                         printk(KERN_ERR
1937                                                "me4000_ao_write_cont():Broken pipe in blocking write\n");
1938                                         return -EPIPE;
1939                                 }
1940                                 if (signal_pending(current)) {
1941                                         printk(KERN_ERR
1942                                                "me4000_ao_write_cont():Wait for free buffer interrupted from signal\n");
1943                                         return -EINTR;
1944                                 }
1945                         }
1946
1947                         PDEBUG("me4000_ao_write_cont():Space to end = %d\n", c);
1948
1949                         /* Only able to write size of free buffer or size of count */
1950                         if (count < c)
1951                                 c = count;
1952
1953                         k = 2 * c;
1954                         k -= copy_from_user(ao_context->circ_buf.buf +
1955                                             ao_context->circ_buf.head, buffer,
1956                                             k);
1957                         c = k / 2;
1958                         PDEBUG
1959                             ("me4000_ao_write_cont():Copy %d values from user space\n",
1960                              c);
1961
1962                         if (!c)
1963                                 return -EFAULT;
1964
1965                         ao_context->circ_buf.head =
1966                             (ao_context->circ_buf.head +
1967                              c) & (ME4000_AO_BUFFER_COUNT - 1);
1968                         buffer += c;
1969                         count -= c;
1970                         ret += c;
1971
1972                         /* Values are now available so enable interrupts */
1973                         spin_lock_irqsave(&ao_context->int_lock, flags);
1974                         if (me4000_buf_count
1975                             (ao_context->circ_buf, ME4000_AO_BUFFER_COUNT)) {
1976                                 tmp = me4000_inl(ao_context->ctrl_reg);
1977                                 tmp |= ME4000_AO_CTRL_BIT_ENABLE_IRQ;
1978                                 me4000_outl(tmp, ao_context->ctrl_reg);
1979                         }
1980                         spin_unlock_irqrestore(&ao_context->int_lock, flags);
1981                 }
1982
1983                 /* Wait until the state machine is stopped if O_SYNC is set */
1984                 if (filep->f_flags & O_SYNC) {
1985                         while (inl(ao_context->status_reg) &
1986                                ME4000_AO_STATUS_BIT_FSM) {
1987                                 interruptible_sleep_on_timeout(&queue, 1);
1988                                 if (ao_context->pipe_flag) {
1989                                         PDEBUG
1990                                             ("me4000_ao_write_cont():Broken pipe detected after sync\n");
1991                                         return -EPIPE;
1992                                 }
1993                                 if (signal_pending(current)) {
1994                                         printk(KERN_ERR
1995                                                "me4000_ao_write_cont():Wait on state machine after sync interrupted\n");
1996                                         return -EINTR;
1997                                 }
1998                         }
1999                 }
2000         } else {
2001                 PDEBUG("me4000_ao_write_cont():Preload DAC FIFO\n");
2002                 if ((me4000_inl(ao_context->status_reg) &
2003                      ME4000_AO_STATUS_BIT_FSM)) {
2004                         printk(KERN_ERR
2005                                "me4000_ao_write_cont():Can't Preload DAC FIFO while conversion is running\n");
2006                         return -EBUSY;
2007                 }
2008
2009                 /* Clear the FIFO */
2010                 spin_lock_irqsave(&ao_context->int_lock, flags);
2011                 tmp = me4000_inl(ao_context->ctrl_reg);
2012                 tmp &=
2013                     ~(ME4000_AO_CTRL_BIT_ENABLE_FIFO |
2014                       ME4000_AO_CTRL_BIT_ENABLE_IRQ);
2015                 me4000_outl(tmp, ao_context->ctrl_reg);
2016                 tmp |= ME4000_AO_CTRL_BIT_ENABLE_FIFO;
2017                 me4000_outl(tmp, ao_context->ctrl_reg);
2018                 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2019
2020                 /* Clear the circular buffer */
2021                 ao_context->circ_buf.head = 0;
2022                 ao_context->circ_buf.tail = 0;
2023
2024                 /* Reset the broken pipe flag */
2025                 ao_context->pipe_flag = 0;
2026
2027                 /* Only able to write size of fifo or count */
2028                 c = ME4000_AO_FIFO_COUNT;
2029                 if (count < c)
2030                         c = count;
2031
2032                 PDEBUG
2033                     ("me4000_ao_write_cont():Write %d values to DAC on 0x%lX\n",
2034                      c, ao_context->fifo_reg);
2035
2036                 /* Write values to the fifo */
2037                 for (i = 0; i < c; i++) {
2038                         if (get_user(svalue, buffer))
2039                                 return -EFAULT;
2040
2041                         if (((ao_context->fifo_reg & 0xFF) ==
2042                              ME4000_AO_01_FIFO_REG)
2043                             || ((ao_context->fifo_reg & 0xFF) ==
2044                                 ME4000_AO_03_FIFO_REG)) {
2045                                 lvalue = ((u32) svalue) << 16;
2046                         } else
2047                                 lvalue = (u32) svalue;
2048
2049                         outl(lvalue, ao_context->fifo_reg);
2050                         buffer++;
2051                 }
2052                 count -= c;
2053                 ret += c;
2054
2055                 while (1) {
2056                         /* Get free buffer */
2057                         c = me4000_space_to_end(ao_context->circ_buf,
2058                                                 ME4000_AO_BUFFER_COUNT);
2059
2060                         if (c == 0)
2061                                 return 2 * ret;
2062
2063                         /* Only able to write size of free buffer or size of count */
2064                         if (count < c)
2065                                 c = count;
2066
2067                         /* If count = 0 return to user */
2068                         if (c <= 0) {
2069                                 PDEBUG
2070                                     ("me4000_ao_write_cont():Count reached 0\n");
2071                                 break;
2072                         }
2073
2074                         k = 2 * c;
2075                         k -= copy_from_user(ao_context->circ_buf.buf +
2076                                             ao_context->circ_buf.head, buffer,
2077                                             k);
2078                         c = k / 2;
2079                         PDEBUG
2080                             ("me4000_ao_write_cont():Wrote %d values to buffer\n",
2081                              c);
2082
2083                         if (!c)
2084                                 return -EFAULT;
2085
2086                         ao_context->circ_buf.head =
2087                             (ao_context->circ_buf.head +
2088                              c) & (ME4000_AO_BUFFER_COUNT - 1);
2089                         buffer += c;
2090                         count -= c;
2091                         ret += c;
2092
2093                         /* If values in the buffer are available so enable interrupts */
2094                         spin_lock_irqsave(&ao_context->int_lock, flags);
2095                         if (me4000_buf_count
2096                             (ao_context->circ_buf, ME4000_AO_BUFFER_COUNT)) {
2097                                 PDEBUG
2098                                     ("me4000_ao_write_cont():Enable Interrupts\n");
2099                                 tmp = me4000_inl(ao_context->ctrl_reg);
2100                                 tmp |= ME4000_AO_CTRL_BIT_ENABLE_IRQ;
2101                                 me4000_outl(tmp, ao_context->ctrl_reg);
2102                         }
2103                         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2104                 }
2105         }
2106
2107         if (filep->f_flags & O_NONBLOCK) {
2108                 return (ret == 0) ? -EAGAIN : 2 * ret;
2109         }
2110
2111         return 2 * ret;
2112 }
2113
2114 static unsigned int me4000_ao_poll_cont(struct file *file_p, poll_table *wait)
2115 {
2116         struct me4000_ao_context *ao_context;
2117         unsigned long mask = 0;
2118
2119         CALL_PDEBUG("me4000_ao_poll_cont() is executed\n");
2120
2121         ao_context = file_p->private_data;
2122
2123         poll_wait(file_p, &ao_context->wait_queue, wait);
2124
2125         /* Get free buffer */
2126         if (me4000_space_to_end(ao_context->circ_buf, ME4000_AO_BUFFER_COUNT))
2127                 mask |= POLLOUT | POLLWRNORM;
2128
2129         CALL_PDEBUG("me4000_ao_poll_cont():Return mask %lX\n", mask);
2130
2131         return mask;
2132 }
2133
2134 static int me4000_ao_fsync_cont(struct file *file_p, struct dentry *dentry_p,
2135                                 int datasync)
2136 {
2137         struct me4000_ao_context *ao_context;
2138         wait_queue_head_t queue;
2139
2140         CALL_PDEBUG("me4000_ao_fsync_cont() is executed\n");
2141
2142         ao_context = file_p->private_data;
2143         init_waitqueue_head(&queue);
2144
2145         while (inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM) {
2146                 interruptible_sleep_on_timeout(&queue, 1);
2147                         wait_event_interruptible_timeout(queue,
2148                         !(inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM),
2149                         1);
2150                 if (ao_context->pipe_flag) {
2151                         printk(KERN_ERR
2152                                "%s:Broken pipe detected\n", __func__);
2153                         return -EPIPE;
2154                 }
2155
2156                 if (signal_pending(current)) {
2157                         printk(KERN_ERR
2158                                "%s:Wait on state machine interrupted\n",
2159                                __func__);
2160                         return -EINTR;
2161                 }
2162         }
2163
2164         return 0;
2165 }
2166
2167 static int me4000_ao_ioctl_sing(struct inode *inode_p, struct file *file_p,
2168                                 unsigned int service, unsigned long arg)
2169 {
2170         struct me4000_ao_context *ao_context;
2171
2172         CALL_PDEBUG("me4000_ao_ioctl_sing() is executed\n");
2173
2174         ao_context = file_p->private_data;
2175
2176         if (_IOC_TYPE(service) != ME4000_MAGIC) {
2177                 return -ENOTTY;
2178                 PDEBUG("me4000_ao_ioctl_sing():Wrong magic number\n");
2179         }
2180
2181         switch (service) {
2182         case ME4000_AO_EX_TRIG_SETUP:
2183                 return me4000_ao_ex_trig_set_edge((int *)arg, ao_context);
2184         case ME4000_AO_EX_TRIG_ENABLE:
2185                 return me4000_ao_ex_trig_enable(ao_context);
2186         case ME4000_AO_EX_TRIG_DISABLE:
2187                 return me4000_ao_ex_trig_disable(ao_context);
2188         case ME4000_AO_PRELOAD:
2189                 return me4000_ao_preload(ao_context);
2190         case ME4000_AO_PRELOAD_UPDATE:
2191                 return me4000_ao_preload_update(ao_context);
2192         case ME4000_GET_USER_INFO:
2193                 return me4000_get_user_info((struct me4000_user_info *)arg,
2194                                             ao_context->board_info);
2195         case ME4000_AO_SIMULTANEOUS_EX_TRIG:
2196                 return me4000_ao_simultaneous_ex_trig(ao_context);
2197         case ME4000_AO_SIMULTANEOUS_SW:
2198                 return me4000_ao_simultaneous_sw(ao_context);
2199         case ME4000_AO_SIMULTANEOUS_DISABLE:
2200                 return me4000_ao_simultaneous_disable(ao_context);
2201         case ME4000_AO_SIMULTANEOUS_UPDATE:
2202                 return
2203                     me4000_ao_simultaneous_update(
2204                                 (struct me4000_ao_channel_list *)arg,
2205                                 ao_context);
2206         case ME4000_AO_EX_TRIG_TIMEOUT:
2207                 return me4000_ao_ex_trig_timeout((unsigned long *)arg,
2208                                                  ao_context);
2209         case ME4000_AO_DISABLE_DO:
2210                 return me4000_ao_disable_do(ao_context);
2211         default:
2212                 printk(KERN_ERR
2213                        "me4000_ao_ioctl_sing():Service number invalid\n");
2214                 return -ENOTTY;
2215         }
2216
2217         return 0;
2218 }
2219
2220 static int me4000_ao_ioctl_wrap(struct inode *inode_p, struct file *file_p,
2221                                 unsigned int service, unsigned long arg)
2222 {
2223         struct me4000_ao_context *ao_context;
2224
2225         CALL_PDEBUG("me4000_ao_ioctl_wrap() is executed\n");
2226
2227         ao_context = file_p->private_data;
2228
2229         if (_IOC_TYPE(service) != ME4000_MAGIC) {
2230                 return -ENOTTY;
2231                 PDEBUG("me4000_ao_ioctl_wrap():Wrong magic number\n");
2232         }
2233
2234         switch (service) {
2235         case ME4000_AO_START:
2236                 return me4000_ao_start((unsigned long *)arg, ao_context);
2237         case ME4000_AO_STOP:
2238                 return me4000_ao_stop(ao_context);
2239         case ME4000_AO_IMMEDIATE_STOP:
2240                 return me4000_ao_immediate_stop(ao_context);
2241         case ME4000_AO_RESET:
2242                 return me4000_ao_reset(ao_context);
2243         case ME4000_AO_TIMER_SET_DIVISOR:
2244                 return me4000_ao_timer_set_divisor((u32 *) arg, ao_context);
2245         case ME4000_AO_EX_TRIG_SETUP:
2246                 return me4000_ao_ex_trig_set_edge((int *)arg, ao_context);
2247         case ME4000_AO_EX_TRIG_ENABLE:
2248                 return me4000_ao_ex_trig_enable(ao_context);
2249         case ME4000_AO_EX_TRIG_DISABLE:
2250                 return me4000_ao_ex_trig_disable(ao_context);
2251         case ME4000_GET_USER_INFO:
2252                 return me4000_get_user_info((struct me4000_user_info *)arg,
2253                                             ao_context->board_info);
2254         case ME4000_AO_FSM_STATE:
2255                 return me4000_ao_fsm_state((int *)arg, ao_context);
2256         case ME4000_AO_ENABLE_DO:
2257                 return me4000_ao_enable_do(ao_context);
2258         case ME4000_AO_DISABLE_DO:
2259                 return me4000_ao_disable_do(ao_context);
2260         case ME4000_AO_SYNCHRONOUS_EX_TRIG:
2261                 return me4000_ao_synchronous_ex_trig(ao_context);
2262         case ME4000_AO_SYNCHRONOUS_SW:
2263                 return me4000_ao_synchronous_sw(ao_context);
2264         case ME4000_AO_SYNCHRONOUS_DISABLE:
2265                 return me4000_ao_synchronous_disable(ao_context);
2266         default:
2267                 return -ENOTTY;
2268         }
2269         return 0;
2270 }
2271
2272 static int me4000_ao_ioctl_cont(struct inode *inode_p, struct file *file_p,
2273                                 unsigned int service, unsigned long arg)
2274 {
2275         struct me4000_ao_context *ao_context;
2276
2277         CALL_PDEBUG("me4000_ao_ioctl_cont() is executed\n");
2278
2279         ao_context = file_p->private_data;
2280
2281         if (_IOC_TYPE(service) != ME4000_MAGIC) {
2282                 return -ENOTTY;
2283                 PDEBUG("me4000_ao_ioctl_cont():Wrong magic number\n");
2284         }
2285
2286         switch (service) {
2287         case ME4000_AO_START:
2288                 return me4000_ao_start((unsigned long *)arg, ao_context);
2289         case ME4000_AO_STOP:
2290                 return me4000_ao_stop(ao_context);
2291         case ME4000_AO_IMMEDIATE_STOP:
2292                 return me4000_ao_immediate_stop(ao_context);
2293         case ME4000_AO_RESET:
2294                 return me4000_ao_reset(ao_context);
2295         case ME4000_AO_TIMER_SET_DIVISOR:
2296                 return me4000_ao_timer_set_divisor((u32 *) arg, ao_context);
2297         case ME4000_AO_EX_TRIG_SETUP:
2298                 return me4000_ao_ex_trig_set_edge((int *)arg, ao_context);
2299         case ME4000_AO_EX_TRIG_ENABLE:
2300                 return me4000_ao_ex_trig_enable(ao_context);
2301         case ME4000_AO_EX_TRIG_DISABLE:
2302                 return me4000_ao_ex_trig_disable(ao_context);
2303         case ME4000_AO_ENABLE_DO:
2304                 return me4000_ao_enable_do(ao_context);
2305         case ME4000_AO_DISABLE_DO:
2306                 return me4000_ao_disable_do(ao_context);
2307         case ME4000_AO_FSM_STATE:
2308                 return me4000_ao_fsm_state((int *)arg, ao_context);
2309         case ME4000_GET_USER_INFO:
2310                 return me4000_get_user_info((struct me4000_user_info *)arg,
2311                                             ao_context->board_info);
2312         case ME4000_AO_SYNCHRONOUS_EX_TRIG:
2313                 return me4000_ao_synchronous_ex_trig(ao_context);
2314         case ME4000_AO_SYNCHRONOUS_SW:
2315                 return me4000_ao_synchronous_sw(ao_context);
2316         case ME4000_AO_SYNCHRONOUS_DISABLE:
2317                 return me4000_ao_synchronous_disable(ao_context);
2318         case ME4000_AO_GET_FREE_BUFFER:
2319                 return me4000_ao_get_free_buffer((unsigned long *)arg,
2320                                                  ao_context);
2321         default:
2322                 return -ENOTTY;
2323         }
2324         return 0;
2325 }
2326
2327 static int me4000_ao_start(unsigned long *arg,
2328                            struct me4000_ao_context *ao_context)
2329 {
2330         u32 tmp;
2331         wait_queue_head_t queue;
2332         unsigned long ref;
2333         unsigned long timeout;
2334         unsigned long flags;
2335
2336         CALL_PDEBUG("me4000_ao_start() is executed\n");
2337
2338         if (get_user(timeout, arg)) {
2339                 printk(KERN_ERR
2340                        "me4000_ao_start():Cannot copy data from user\n");
2341                 return -EFAULT;
2342         }
2343
2344         init_waitqueue_head(&queue);
2345
2346         spin_lock_irqsave(&ao_context->int_lock, flags);
2347         tmp = inl(ao_context->ctrl_reg);
2348         tmp &= ~(ME4000_AO_CTRL_BIT_STOP | ME4000_AO_CTRL_BIT_IMMEDIATE_STOP);
2349         me4000_outl(tmp, ao_context->ctrl_reg);
2350         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2351
2352         if ((tmp & ME4000_AO_CTRL_BIT_ENABLE_EX_TRIG)) {
2353                 if (timeout) {
2354                         ref = jiffies;
2355                         while (!
2356                                (inl(ao_context->status_reg) &
2357                                 ME4000_AO_STATUS_BIT_FSM)) {
2358                                 interruptible_sleep_on_timeout(&queue, 1);
2359                                 if (signal_pending(current)) {
2360                                         printk(KERN_ERR
2361                                                "ME4000:me4000_ao_start():Wait on start of state machine interrupted\n");
2362                                         return -EINTR;
2363                                 }
2364                                 /* kernel 2.6 has different definitions for HZ
2365                                  * in user and kernel space */
2366                                 if ((jiffies - ref) > (timeout * HZ / USER_HZ)) {
2367                                         printk(KERN_ERR
2368                                                "ME4000:me4000_ao_start():Timeout reached\n");
2369                                         return -EIO;
2370                                 }
2371                         }
2372                 }
2373         } else {
2374                 me4000_outl(0x8000, ao_context->single_reg);
2375         }
2376
2377         return 0;
2378 }
2379
2380 static int me4000_ao_stop(struct me4000_ao_context *ao_context)
2381 {
2382         u32 tmp;
2383         wait_queue_head_t queue;
2384         unsigned long flags;
2385
2386         init_waitqueue_head(&queue);
2387
2388         CALL_PDEBUG("me4000_ao_stop() is executed\n");
2389
2390         /* Set the stop bit */
2391         spin_lock_irqsave(&ao_context->int_lock, flags);
2392         tmp = inl(ao_context->ctrl_reg);
2393         tmp |= ME4000_AO_CTRL_BIT_STOP;
2394         me4000_outl(tmp, ao_context->ctrl_reg);
2395         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2396
2397         while (inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM) {
2398                 interruptible_sleep_on_timeout(&queue, 1);
2399                 if (signal_pending(current)) {
2400                         printk(KERN_ERR
2401                                "me4000_ao_stop():Wait on state machine after stop interrupted\n");
2402                         return -EINTR;
2403                 }
2404         }
2405
2406         /* Clear the stop bit */
2407         //tmp &= ~ME4000_AO_CTRL_BIT_STOP;
2408         //me4000_outl(tmp, ao_context->ctrl_reg);
2409
2410         return 0;
2411 }
2412
2413 static int me4000_ao_immediate_stop(struct me4000_ao_context *ao_context)
2414 {
2415         u32 tmp;
2416         wait_queue_head_t queue;
2417         unsigned long flags;
2418
2419         init_waitqueue_head(&queue);
2420
2421         CALL_PDEBUG("me4000_ao_immediate_stop() is executed\n");
2422
2423         spin_lock_irqsave(&ao_context->int_lock, flags);
2424         tmp = inl(ao_context->ctrl_reg);
2425         tmp |= ME4000_AO_CTRL_BIT_STOP | ME4000_AO_CTRL_BIT_IMMEDIATE_STOP;
2426         me4000_outl(tmp, ao_context->ctrl_reg);
2427         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2428
2429         while (inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM) {
2430                 interruptible_sleep_on_timeout(&queue, 1);
2431                 if (signal_pending(current)) {
2432                         printk(KERN_ERR
2433                                "me4000_ao_immediate_stop():Wait on state machine after stop interrupted\n");
2434                         return -EINTR;
2435                 }
2436         }
2437
2438         /* Clear the stop bits */
2439         //tmp &= ~(ME4000_AO_CTRL_BIT_STOP | ME4000_AO_CTRL_BIT_IMMEDIATE_STOP);
2440         //me4000_outl(tmp, ao_context->ctrl_reg);
2441
2442         return 0;
2443 }
2444
2445 static int me4000_ao_timer_set_divisor(u32 *arg,
2446                                        struct me4000_ao_context *ao_context)
2447 {
2448         u32 divisor;
2449         u32 tmp;
2450
2451         CALL_PDEBUG("me4000_ao_timer set_divisor() is executed\n");
2452
2453         if (get_user(divisor, arg))
2454                 return -EFAULT;
2455
2456         /* Check if the state machine is stopped */
2457         tmp = me4000_inl(ao_context->status_reg);
2458         if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2459                 printk(KERN_ERR
2460                        "me4000_ao_timer_set_divisor():Can't set timer while DAC is running\n");
2461                 return -EBUSY;
2462         }
2463
2464         PDEBUG("me4000_ao_timer set_divisor():Divisor from user = %d\n",
2465                divisor);
2466
2467         /* Check if the divisor is right. ME4000_AO_MIN_TICKS is the lowest */
2468         if (divisor < ME4000_AO_MIN_TICKS) {
2469                 printk(KERN_ERR
2470                        "ME4000:me4000_ao_timer set_divisor():Divisor to low\n");
2471                 return -EINVAL;
2472         }
2473
2474         /* Fix bug in Firmware */
2475         divisor -= 2;
2476
2477         PDEBUG("me4000_ao_timer set_divisor():Divisor to HW = %d\n", divisor);
2478
2479         /* Write the divisor */
2480         me4000_outl(divisor, ao_context->timer_reg);
2481
2482         return 0;
2483 }
2484
2485 static int me4000_ao_ex_trig_set_edge(int *arg,
2486                                       struct me4000_ao_context *ao_context)
2487 {
2488         int mode;
2489         u32 tmp;
2490         unsigned long flags;
2491
2492         CALL_PDEBUG("me4000_ao_ex_trig_set_edge() is executed\n");
2493
2494         if (get_user(mode, arg))
2495                 return -EFAULT;
2496
2497         /* Check if the state machine is stopped */
2498         tmp = me4000_inl(ao_context->status_reg);
2499         if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2500                 printk(KERN_ERR
2501                        "me4000_ao_ex_trig_set_edge():Can't set trigger while DAC is running\n");
2502                 return -EBUSY;
2503         }
2504
2505         if (mode == ME4000_AO_TRIGGER_EXT_EDGE_RISING) {
2506                 spin_lock_irqsave(&ao_context->int_lock, flags);
2507                 tmp = me4000_inl(ao_context->ctrl_reg);
2508                 tmp &=
2509                     ~(ME4000_AO_CTRL_BIT_EX_TRIG_EDGE |
2510                       ME4000_AO_CTRL_BIT_EX_TRIG_BOTH);
2511                 me4000_outl(tmp, ao_context->ctrl_reg);
2512                 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2513         } else if (mode == ME4000_AO_TRIGGER_EXT_EDGE_FALLING) {
2514                 spin_lock_irqsave(&ao_context->int_lock, flags);
2515                 tmp = me4000_inl(ao_context->ctrl_reg);
2516                 tmp &= ~ME4000_AO_CTRL_BIT_EX_TRIG_BOTH;
2517                 tmp |= ME4000_AO_CTRL_BIT_EX_TRIG_EDGE;
2518                 me4000_outl(tmp, ao_context->ctrl_reg);
2519                 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2520         } else if (mode == ME4000_AO_TRIGGER_EXT_EDGE_BOTH) {
2521                 spin_lock_irqsave(&ao_context->int_lock, flags);
2522                 tmp = me4000_inl(ao_context->ctrl_reg);
2523                 tmp |=
2524                     ME4000_AO_CTRL_BIT_EX_TRIG_EDGE |
2525                     ME4000_AO_CTRL_BIT_EX_TRIG_BOTH;
2526                 me4000_outl(tmp, ao_context->ctrl_reg);
2527                 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2528         } else {
2529                 printk(KERN_ERR
2530                        "me4000_ao_ex_trig_set_edge():Invalid trigger mode\n");
2531                 return -EINVAL;
2532         }
2533
2534         return 0;
2535 }
2536
2537 static int me4000_ao_ex_trig_enable(struct me4000_ao_context *ao_context)
2538 {
2539         u32 tmp;
2540         unsigned long flags;
2541
2542         CALL_PDEBUG("me4000_ao_ex_trig_enable() is executed\n");
2543
2544         /* Check if the state machine is stopped */
2545         tmp = me4000_inl(ao_context->status_reg);
2546         if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2547                 printk(KERN_ERR
2548                        "me4000_ao_ex_trig_enable():Can't enable trigger while DAC is running\n");
2549                 return -EBUSY;
2550         }
2551
2552         spin_lock_irqsave(&ao_context->int_lock, flags);
2553         tmp = me4000_inl(ao_context->ctrl_reg);
2554         tmp |= ME4000_AO_CTRL_BIT_ENABLE_EX_TRIG;
2555         me4000_outl(tmp, ao_context->ctrl_reg);
2556         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2557
2558         return 0;
2559 }
2560
2561 static int me4000_ao_ex_trig_disable(struct me4000_ao_context *ao_context)
2562 {
2563         u32 tmp;
2564         unsigned long flags;
2565
2566         CALL_PDEBUG("me4000_ao_ex_trig_disable() is executed\n");
2567
2568         /* Check if the state machine is stopped */
2569         tmp = me4000_inl(ao_context->status_reg);
2570         if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2571                 printk(KERN_ERR
2572                        "me4000_ao_ex_trig_disable():Can't disable trigger while DAC is running\n");
2573                 return -EBUSY;
2574         }
2575
2576         spin_lock_irqsave(&ao_context->int_lock, flags);
2577         tmp = me4000_inl(ao_context->ctrl_reg);
2578         tmp &= ~ME4000_AO_CTRL_BIT_ENABLE_EX_TRIG;
2579         me4000_outl(tmp, ao_context->ctrl_reg);
2580         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2581
2582         return 0;
2583 }
2584
2585 static int me4000_ao_simultaneous_disable(struct me4000_ao_context *ao_context)
2586 {
2587         u32 tmp;
2588
2589         CALL_PDEBUG("me4000_ao_simultaneous_disable() is executed\n");
2590
2591         /* Check if the state machine is stopped */
2592         /* Be careful here because this function is called from
2593            me4000_ao_synchronous disable */
2594         tmp = me4000_inl(ao_context->status_reg);
2595         if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2596                 printk(KERN_ERR
2597                        "me4000_ao_simultaneous_disable():Can't disable while DAC is running\n");
2598                 return -EBUSY;
2599         }
2600
2601         spin_lock(&ao_context->board_info->preload_lock);
2602         tmp = me4000_inl(ao_context->preload_reg);
2603         tmp &= ~(0x1 << ao_context->index);     // Disable preload bit
2604         tmp &= ~(0x1 << (ao_context->index + 16));      // Disable hw simultaneous bit
2605         me4000_outl(tmp, ao_context->preload_reg);
2606         spin_unlock(&ao_context->board_info->preload_lock);
2607
2608         return 0;
2609 }
2610
2611 static int me4000_ao_simultaneous_ex_trig(struct me4000_ao_context *ao_context)
2612 {
2613         u32 tmp;
2614
2615         CALL_PDEBUG("me4000_ao_simultaneous_ex_trig() is executed\n");
2616
2617         spin_lock(&ao_context->board_info->preload_lock);
2618         tmp = me4000_inl(ao_context->preload_reg);
2619         tmp |= (0x1 << ao_context->index);      // Enable preload bit
2620         tmp |= (0x1 << (ao_context->index + 16));       // Enable hw simultaneous bit
2621         me4000_outl(tmp, ao_context->preload_reg);
2622         spin_unlock(&ao_context->board_info->preload_lock);
2623
2624         return 0;
2625 }
2626
2627 static int me4000_ao_simultaneous_sw(struct me4000_ao_context *ao_context)
2628 {
2629         u32 tmp;
2630
2631         CALL_PDEBUG("me4000_ao_simultaneous_sw() is executed\n");
2632
2633         spin_lock(&ao_context->board_info->preload_lock);
2634         tmp = me4000_inl(ao_context->preload_reg);
2635         tmp |= (0x1 << ao_context->index);      // Enable preload bit
2636         tmp &= ~(0x1 << (ao_context->index + 16));      // Disable hw simultaneous bit
2637         me4000_outl(tmp, ao_context->preload_reg);
2638         spin_unlock(&ao_context->board_info->preload_lock);
2639
2640         return 0;
2641 }
2642
2643 static int me4000_ao_preload(struct me4000_ao_context *ao_context)
2644 {
2645         CALL_PDEBUG("me4000_ao_preload() is executed\n");
2646         return me4000_ao_simultaneous_sw(ao_context);
2647 }
2648
2649 static int me4000_ao_preload_update(struct me4000_ao_context *ao_context)
2650 {
2651         u32 tmp;
2652         u32 ctrl;
2653         struct list_head *entry;
2654
2655         CALL_PDEBUG("me4000_ao_preload_update() is executed\n");
2656
2657         spin_lock(&ao_context->board_info->preload_lock);
2658         tmp = me4000_inl(ao_context->preload_reg);
2659         list_for_each(entry, &ao_context->board_info->ao_context_list) {
2660                 /* The channels we update must be in the following state :
2661                    - Mode A
2662                    - Hardware trigger is disabled
2663                    - Corresponding simultaneous bit is reset
2664                  */
2665                 ctrl = me4000_inl(ao_context->ctrl_reg);
2666                 if (!
2667                     (ctrl &
2668                      (ME4000_AO_CTRL_BIT_MODE_0 | ME4000_AO_CTRL_BIT_MODE_1 |
2669                       ME4000_AO_CTRL_BIT_ENABLE_EX_TRIG))) {
2670                         if (!
2671                             (tmp &
2672                              (0x1 <<
2673                               (((struct me4000_ao_context *)entry)->index
2674                                                                       + 16)))) {
2675                                 tmp &=
2676                                     ~(0x1 <<
2677                                       (((struct me4000_ao_context *)entry)->
2678                                                                         index));
2679                         }
2680                 }
2681         }
2682         me4000_outl(tmp, ao_context->preload_reg);
2683         spin_unlock(&ao_context->board_info->preload_lock);
2684
2685         return 0;
2686 }
2687
2688 static int me4000_ao_simultaneous_update(struct me4000_ao_channel_list *arg,
2689                                          struct me4000_ao_context *ao_context)
2690 {
2691         int err;
2692         int i;
2693         u32 tmp;
2694         struct me4000_ao_channel_list channels;
2695
2696         CALL_PDEBUG("me4000_ao_simultaneous_update() is executed\n");
2697
2698         /* Copy data from user */
2699         err = copy_from_user(&channels, arg,
2700                         sizeof(struct me4000_ao_channel_list));
2701         if (err) {
2702                 printk(KERN_ERR
2703                        "ME4000:me4000_ao_simultaneous_update():Can't copy command\n");
2704                 return -EFAULT;
2705         }
2706
2707         channels.list =
2708             kzalloc(sizeof(unsigned long) * channels.count, GFP_KERNEL);
2709         if (!channels.list) {
2710                 printk(KERN_ERR
2711                        "ME4000:me4000_ao_simultaneous_update():Can't get buffer\n");
2712                 return -ENOMEM;
2713         }
2714
2715         /* Copy channel list from user */
2716         err =
2717             copy_from_user(channels.list, arg->list,
2718                            sizeof(unsigned long) * channels.count);
2719         if (err) {
2720                 printk(KERN_ERR
2721                        "ME4000:me4000_ao_simultaneous_update():Can't copy list\n");
2722                 kfree(channels.list);
2723                 return -EFAULT;
2724         }
2725
2726         spin_lock(&ao_context->board_info->preload_lock);
2727         tmp = me4000_inl(ao_context->preload_reg);
2728         for (i = 0; i < channels.count; i++) {
2729                 if (channels.list[i] >
2730                     ao_context->board_info->board_p->ao.count) {
2731                         spin_unlock(&ao_context->board_info->preload_lock);
2732                         kfree(channels.list);
2733                         printk(KERN_ERR
2734                                "ME4000:me4000_ao_simultaneous_update():Invalid board number specified\n");
2735                         return -EFAULT;
2736                 }
2737                 tmp &= ~(0x1 << channels.list[i]);      // Clear the preload bit
2738                 tmp &= ~(0x1 << (channels.list[i] + 16));       // Clear the hw simultaneous bit
2739         }
2740         me4000_outl(tmp, ao_context->preload_reg);
2741         spin_unlock(&ao_context->board_info->preload_lock);
2742         kfree(channels.list);
2743
2744         return 0;
2745 }
2746
2747 static int me4000_ao_synchronous_ex_trig(struct me4000_ao_context *ao_context)
2748 {
2749         u32 tmp;
2750         unsigned long flags;
2751
2752         CALL_PDEBUG("me4000_ao_synchronous_ex_trig() is executed\n");
2753
2754         /* Check if the state machine is stopped */
2755         tmp = me4000_inl(ao_context->status_reg);
2756         if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2757                 printk(KERN_ERR
2758                        "me4000_ao_synchronous_ex_trig(): DAC is running\n");
2759                 return -EBUSY;
2760         }
2761
2762         spin_lock(&ao_context->board_info->preload_lock);
2763         tmp = me4000_inl(ao_context->preload_reg);
2764         tmp &= ~(0x1 << ao_context->index);     // Disable synchronous sw bit
2765         tmp |= 0x1 << (ao_context->index + 16); // Enable synchronous hw bit
2766         me4000_outl(tmp, ao_context->preload_reg);
2767         spin_unlock(&ao_context->board_info->preload_lock);
2768
2769         /* Make runnable */
2770         spin_lock_irqsave(&ao_context->int_lock, flags);
2771         tmp = me4000_inl(ao_context->ctrl_reg);
2772         if (tmp & (ME4000_AO_CTRL_BIT_MODE_0 | ME4000_AO_CTRL_BIT_MODE_1)) {
2773                 tmp &=
2774                     ~(ME4000_AO_CTRL_BIT_STOP |
2775                       ME4000_AO_CTRL_BIT_IMMEDIATE_STOP);
2776                 me4000_outl(tmp, ao_context->ctrl_reg);
2777         }
2778         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2779
2780         return 0;
2781 }
2782
2783 static int me4000_ao_synchronous_sw(struct me4000_ao_context *ao_context)
2784 {
2785         u32 tmp;
2786         unsigned long flags;
2787
2788         CALL_PDEBUG("me4000_ao_synchronous_sw() is executed\n");
2789
2790         /* Check if the state machine is stopped */
2791         tmp = me4000_inl(ao_context->status_reg);
2792         if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2793                 printk(KERN_ERR "me4000_ao_synchronous_sw(): DAC is running\n");
2794                 return -EBUSY;
2795         }
2796
2797         spin_lock(&ao_context->board_info->preload_lock);
2798         tmp = me4000_inl(ao_context->preload_reg);
2799         tmp |= 0x1 << ao_context->index;        // Enable synchronous sw bit
2800         tmp &= ~(0x1 << (ao_context->index + 16));      // Disable synchronous hw bit
2801         me4000_outl(tmp, ao_context->preload_reg);
2802         spin_unlock(&ao_context->board_info->preload_lock);
2803
2804         /* Make runnable */
2805         spin_lock_irqsave(&ao_context->int_lock, flags);
2806         tmp = me4000_inl(ao_context->ctrl_reg);
2807         if (tmp & (ME4000_AO_CTRL_BIT_MODE_0 | ME4000_AO_CTRL_BIT_MODE_1)) {
2808                 tmp &=
2809                     ~(ME4000_AO_CTRL_BIT_STOP |
2810                       ME4000_AO_CTRL_BIT_IMMEDIATE_STOP);
2811                 me4000_outl(tmp, ao_context->ctrl_reg);
2812         }
2813         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2814
2815         return 0;
2816 }
2817
2818 static int me4000_ao_synchronous_disable(struct me4000_ao_context *ao_context)
2819 {
2820         return me4000_ao_simultaneous_disable(ao_context);
2821 }
2822
2823 static int me4000_ao_get_free_buffer(unsigned long *arg,
2824                                      struct me4000_ao_context *ao_context)
2825 {
2826         unsigned long c;
2827         int err;
2828
2829         c = me4000_buf_space(ao_context->circ_buf, ME4000_AO_BUFFER_COUNT);
2830
2831         err = copy_to_user(arg, &c, sizeof(unsigned long));
2832         if (err) {
2833                 printk(KERN_ERR
2834                        "%s:Can't copy to user space\n", __func__);
2835                 return -EFAULT;
2836         }
2837
2838         return 0;
2839 }
2840
2841 static int me4000_ao_ex_trig_timeout(unsigned long *arg,
2842                                      struct me4000_ao_context *ao_context)
2843 {
2844         u32 tmp;
2845         wait_queue_head_t queue;
2846         unsigned long ref;
2847         unsigned long timeout;
2848
2849         CALL_PDEBUG("me4000_ao_ex_trig_timeout() is executed\n");
2850
2851         if (get_user(timeout, arg)) {
2852                 printk(KERN_ERR
2853                        "me4000_ao_ex_trig_timeout():Cannot copy data from user\n");
2854                 return -EFAULT;
2855         }
2856
2857         init_waitqueue_head(&queue);
2858
2859         tmp = inl(ao_context->ctrl_reg);
2860
2861         if ((tmp & ME4000_AO_CTRL_BIT_ENABLE_EX_TRIG)) {
2862                 if (timeout) {
2863                         ref = jiffies;
2864                         while ((inl(ao_context->status_reg) &
2865                                 ME4000_AO_STATUS_BIT_FSM)) {
2866                                 interruptible_sleep_on_timeout(&queue, 1);
2867                                 if (signal_pending(current)) {
2868                                         printk(KERN_ERR
2869                                                "ME4000:me4000_ao_ex_trig_timeout():Wait on start of state machine interrupted\n");
2870                                         return -EINTR;
2871                                 }
2872                                 /* kernel 2.6 has different definitions for HZ
2873                                  * in user and kernel space */
2874                                 if ((jiffies - ref) > (timeout * HZ / USER_HZ)) {
2875                                         printk(KERN_ERR
2876                                                "ME4000:me4000_ao_ex_trig_timeout():Timeout reached\n");
2877                                         return -EIO;
2878                                 }
2879                         }
2880                 } else {
2881                         while ((inl(ao_context->status_reg) &
2882                                 ME4000_AO_STATUS_BIT_FSM)) {
2883                                 interruptible_sleep_on_timeout(&queue, 1);
2884                                 if (signal_pending(current)) {
2885                                         printk(KERN_ERR
2886                                                "ME4000:me4000_ao_ex_trig_timeout():Wait on start of state machine interrupted\n");
2887                                         return -EINTR;
2888                                 }
2889                         }
2890                 }
2891         } else {
2892                 printk(KERN_ERR
2893                        "ME4000:me4000_ao_ex_trig_timeout():External Trigger is not enabled\n");
2894                 return -EINVAL;
2895         }
2896
2897         return 0;
2898 }
2899
2900 static int me4000_ao_enable_do(struct me4000_ao_context *ao_context)
2901 {
2902         u32 tmp;
2903         unsigned long flags;
2904
2905         CALL_PDEBUG("me4000_ao_enable_do() is executed\n");
2906
2907         /* Only available for analog output 3 */
2908         if (ao_context->index != 3) {
2909                 printk(KERN_ERR
2910                        "me4000_ao_enable_do():Only available for analog output 3\n");
2911                 return -ENOTTY;
2912         }
2913
2914         /* Check if the state machine is stopped */
2915         tmp = me4000_inl(ao_context->status_reg);
2916         if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2917                 printk(KERN_ERR "me4000_ao_enable_do(): DAC is running\n");
2918                 return -EBUSY;
2919         }
2920
2921         /* Set the stop bit */
2922         spin_lock_irqsave(&ao_context->int_lock, flags);
2923         tmp = inl(ao_context->ctrl_reg);
2924         tmp |= ME4000_AO_CTRL_BIT_ENABLE_DO;
2925         me4000_outl(tmp, ao_context->ctrl_reg);
2926         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2927
2928         return 0;
2929 }
2930
2931 static int me4000_ao_disable_do(struct me4000_ao_context *ao_context)
2932 {
2933         u32 tmp;
2934         unsigned long flags;
2935
2936         CALL_PDEBUG("me4000_ao_disable_do() is executed\n");
2937
2938         /* Only available for analog output 3 */
2939         if (ao_context->index != 3) {
2940                 printk(KERN_ERR
2941                        "me4000_ao_disable():Only available for analog output 3\n");
2942                 return -ENOTTY;
2943         }
2944
2945         /* Check if the state machine is stopped */
2946         tmp = me4000_inl(ao_context->status_reg);
2947         if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2948                 printk(KERN_ERR "me4000_ao_disable_do(): DAC is running\n");
2949                 return -EBUSY;
2950         }
2951
2952         spin_lock_irqsave(&ao_context->int_lock, flags);
2953         tmp = inl(ao_context->ctrl_reg);
2954         tmp &= ~(ME4000_AO_CTRL_BIT_ENABLE_DO);
2955         me4000_outl(tmp, ao_context->ctrl_reg);
2956         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2957
2958         return 0;
2959 }
2960
2961 static int me4000_ao_fsm_state(int *arg, struct me4000_ao_context *ao_context)
2962 {
2963         unsigned long tmp;
2964
2965         CALL_PDEBUG("me4000_ao_fsm_state() is executed\n");
2966
2967         tmp =
2968             (me4000_inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM) ? 1
2969             : 0;
2970
2971         if (ao_context->pipe_flag) {
2972                 printk(KERN_ERR "me4000_ao_fsm_state():Broken pipe detected\n");
2973                 return -EPIPE;
2974         }
2975
2976         if (put_user(tmp, arg)) {
2977                 printk(KERN_ERR "me4000_ao_fsm_state():Cannot copy to user\n");
2978                 return -EFAULT;
2979         }
2980
2981         return 0;
2982 }
2983
2984 /*------------------------- Analog input stuff -------------------------------*/
2985
2986 static int me4000_ai_prepare(struct me4000_ai_context *ai_context)
2987 {
2988         wait_queue_head_t queue;
2989         int err;
2990
2991         CALL_PDEBUG("me4000_ai_prepare() is executed\n");
2992
2993         init_waitqueue_head(&queue);
2994
2995         /* Set the new mode and stop bits */
2996         me4000_outl(ai_context->
2997                     mode | ME4000_AI_CTRL_BIT_STOP |
2998                     ME4000_AI_CTRL_BIT_IMMEDIATE_STOP, ai_context->ctrl_reg);
2999
3000         /* Set the timer registers */
3001         ai_context->chan_timer = 66;
3002         ai_context->chan_pre_timer = 66;
3003         ai_context->scan_timer_low = 0;
3004         ai_context->scan_timer_high = 0;
3005
3006         me4000_outl(65, ai_context->chan_timer_reg);
3007         me4000_outl(65, ai_context->chan_pre_timer_reg);
3008         me4000_outl(0, ai_context->scan_timer_low_reg);
3009         me4000_outl(0, ai_context->scan_timer_high_reg);
3010         me4000_outl(0, ai_context->scan_pre_timer_low_reg);
3011         me4000_outl(0, ai_context->scan_pre_timer_high_reg);
3012
3013         ai_context->channel_list_count = 0;
3014
3015         if (ai_context->mode) {
3016                 /* Request the interrupt line */
3017                 err =
3018                     request_irq(ai_context->irq, me4000_ai_isr,
3019                                 IRQF_DISABLED | IRQF_SHARED, ME4000_NAME,
3020                                 ai_context);
3021                 if (err) {
3022                         printk(KERN_ERR
3023                                "ME4000:me4000_ai_prepare():Can't get interrupt line");
3024                         return -ENODEV;
3025                 }
3026
3027                 /* Allocate circular buffer */
3028                 ai_context->circ_buf.buf =
3029                     kzalloc(ME4000_AI_BUFFER_SIZE, GFP_KERNEL);
3030                 if (!ai_context->circ_buf.buf) {
3031                         printk(KERN_ERR
3032                                "ME4000:me4000_ai_prepare():Can't get circular buffer\n");
3033                         free_irq(ai_context->irq, ai_context);
3034                         return -ENOMEM;
3035                 }
3036
3037                 /* Clear the circular buffer */
3038                 ai_context->circ_buf.head = 0;
3039                 ai_context->circ_buf.tail = 0;
3040         }
3041
3042         return 0;
3043 }
3044
3045 static int me4000_ai_reset(struct me4000_ai_context *ai_context)
3046 {
3047         wait_queue_head_t queue;
3048         u32 tmp;
3049         unsigned long flags;
3050
3051         CALL_PDEBUG("me4000_ai_reset() is executed\n");
3052
3053         init_waitqueue_head(&queue);
3054
3055         /*
3056          * First stop conversion of the state machine before reconfigure.
3057          * If not stopped before configuring mode, it could
3058          * walk in a undefined state.
3059          */
3060         spin_lock_irqsave(&ai_context->int_lock, flags);
3061         tmp = me4000_inl(ai_context->ctrl_reg);
3062         tmp |= ME4000_AI_CTRL_BIT_IMMEDIATE_STOP;
3063         me4000_outl(tmp, ai_context->ctrl_reg);
3064         spin_unlock_irqrestore(&ai_context->int_lock, flags);
3065
3066         while (inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM) {
3067                 interruptible_sleep_on_timeout(&queue, 1);
3068                 if (signal_pending(current)) {
3069                         printk(KERN_ERR
3070                                "me4000_ai_reset():Wait on state machine after stop interrupted\n");
3071                         return -EINTR;
3072                 }
3073         }
3074
3075         /* Clear the control register and set the stop bits */
3076         spin_lock_irqsave(&ai_context->int_lock, flags);
3077         tmp = me4000_inl(ai_context->ctrl_reg);
3078         me4000_outl(ME4000_AI_CTRL_BIT_IMMEDIATE_STOP | ME4000_AI_CTRL_BIT_STOP,
3079                     ai_context->ctrl_reg);
3080         spin_unlock_irqrestore(&ai_context->int_lock, flags);
3081
3082         /* Reset timer registers */
3083         ai_context->chan_timer = 66;
3084         ai_context->chan_pre_timer = 66;
3085         ai_context->scan_timer_low = 0;
3086         ai_context->scan_timer_high = 0;
3087         ai_context->sample_counter = 0;
3088         ai_context->sample_counter_reload = 0;
3089
3090         me4000_outl(65, ai_context->chan_timer_reg);
3091         me4000_outl(65, ai_context->chan_pre_timer_reg);
3092         me4000_outl(0, ai_context->scan_timer_low_reg);
3093         me4000_outl(0, ai_context->scan_timer_high_reg);
3094         me4000_outl(0, ai_context->scan_pre_timer_low_reg);
3095         me4000_outl(0, ai_context->scan_pre_timer_high_reg);
3096         me4000_outl(0, ai_context->sample_counter_reg);
3097
3098         ai_context->channel_list_count = 0;
3099
3100         /* Clear the circular buffer */
3101         ai_context->circ_buf.head = 0;
3102         ai_context->circ_buf.tail = 0;
3103
3104         return 0;
3105 }
3106
3107 static int me4000_ai_ioctl_sing(struct inode *inode_p, struct file *file_p,
3108                                 unsigned int service, unsigned long arg)
3109 {
3110         struct me4000_ai_context *ai_context;
3111
3112         CALL_PDEBUG("me4000_ai_ioctl_sing() is executed\n");
3113
3114         ai_context = file_p->private_data;
3115
3116         if (_IOC_TYPE(service) != ME4000_MAGIC) {
3117                 printk(KERN_ERR "me4000_ai_ioctl_sing():Wrong magic number\n");
3118                 return -ENOTTY;
3119         }
3120         if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
3121                 printk(KERN_ERR
3122                        "me4000_ai_ioctl_sing():Service number to high\n");
3123                 return -ENOTTY;
3124         }
3125
3126         switch (service) {
3127         case ME4000_AI_SINGLE:
3128                 return me4000_ai_single((struct me4000_ai_single *)arg,
3129                                                                 ai_context);
3130         case ME4000_AI_EX_TRIG_ENABLE:
3131                 return me4000_ai_ex_trig_enable(ai_context);
3132         case ME4000_AI_EX_TRIG_DISABLE:
3133                 return me4000_ai_ex_trig_disable(ai_context);
3134         case ME4000_AI_EX_TRIG_SETUP:
3135                 return me4000_ai_ex_trig_setup((struct me4000_ai_trigger *)arg,
3136                                                ai_context);
3137         case ME4000_GET_USER_INFO:
3138                 return me4000_get_user_info((struct me4000_user_info *)arg,
3139                                             ai_context->board_info);
3140         case ME4000_AI_OFFSET_ENABLE:
3141                 return me4000_ai_offset_enable(ai_context);
3142         case ME4000_AI_OFFSET_DISABLE:
3143                 return me4000_ai_offset_disable(ai_context);
3144         case ME4000_AI_FULLSCALE_ENABLE:
3145                 return me4000_ai_fullscale_enable(ai_context);
3146         case ME4000_AI_FULLSCALE_DISABLE:
3147                 return me4000_ai_fullscale_disable(ai_context);
3148         case ME4000_AI_EEPROM_READ:
3149                 return me4000_eeprom_read((struct me4000_eeprom *)arg,
3150                                                                 ai_context);
3151         case ME4000_AI_EEPROM_WRITE:
3152                 return me4000_eeprom_write((struct me4000_eeprom *)arg,
3153                                                                 ai_context);
3154         default:
3155                 printk(KERN_ERR
3156                        "me4000_ai_ioctl_sing():Invalid service number\n");
3157                 return -ENOTTY;
3158         }
3159         return 0;
3160 }
3161
3162 static int me4000_ai_single(struct me4000_ai_single *arg,
3163                             struct me4000_ai_context *ai_context)
3164 {
3165         struct me4000_ai_single cmd;
3166         int err;
3167         u32 tmp;
3168         wait_queue_head_t queue;
3169         unsigned long jiffy;
3170
3171         CALL_PDEBUG("me4000_ai_single() is executed\n");
3172
3173         init_waitqueue_head(&queue);
3174
3175         /* Copy data from user */
3176         err = copy_from_user(&cmd, arg, sizeof(struct me4000_ai_single));
3177         if (err) {
3178                 printk(KERN_ERR
3179                        "ME4000:me4000_ai_single():Can't copy from user space\n");
3180                 return -EFAULT;
3181         }
3182
3183         /* Check range parameter */
3184         switch (cmd.range) {
3185         case ME4000_AI_LIST_RANGE_BIPOLAR_10:
3186         case ME4000_AI_LIST_RANGE_BIPOLAR_2_5:
3187         case ME4000_AI_LIST_RANGE_UNIPOLAR_10:
3188         case ME4000_AI_LIST_RANGE_UNIPOLAR_2_5:
3189                 break;
3190         default:
3191                 printk(KERN_ERR
3192                        "ME4000:me4000_ai_single():Invalid range specified\n");
3193                 return -EINVAL;
3194         }
3195
3196         /* Check mode and channel number */
3197         switch (cmd.mode) {
3198         case ME4000_AI_LIST_INPUT_SINGLE_ENDED:
3199                 if (cmd.channel >= ai_context->board_info->board_p->ai.count) {
3200                         printk(KERN_ERR
3201                                "ME4000:me4000_ai_single():Analog input is not available\n");
3202                         return -EINVAL;
3203                 }
3204                 break;
3205         case ME4000_AI_LIST_INPUT_DIFFERENTIAL:
3206                 if (cmd.channel >=
3207                     ai_context->board_info->board_p->ai.diff_count) {
3208                         printk(KERN_ERR
3209                                "ME4000:me4000_ai_single():Analog input is not available in differential mode\n");
3210                         return -EINVAL;
3211                 }
3212                 break;
3213         default:
3214                 printk(KERN_ERR
3215                        "ME4000:me4000_ai_single():Invalid mode specified\n");
3216                 return -EINVAL;
3217         }
3218
3219         /* Clear channel list, data fifo and both stop bits */
3220         tmp = me4000_inl(ai_context->ctrl_reg);
3221         tmp &=
3222             ~(ME4000_AI_CTRL_BIT_CHANNEL_FIFO | ME4000_AI_CTRL_BIT_DATA_FIFO |
3223               ME4000_AI_CTRL_BIT_STOP | ME4000_AI_CTRL_BIT_IMMEDIATE_STOP);
3224         me4000_outl(tmp, ai_context->ctrl_reg);
3225
3226         /* Enable channel list and data fifo */
3227         tmp |= ME4000_AI_CTRL_BIT_CHANNEL_FIFO | ME4000_AI_CTRL_BIT_DATA_FIFO;
3228         me4000_outl(tmp, ai_context->ctrl_reg);
3229
3230         /* Generate channel list entry */
3231         me4000_outl(cmd.channel | cmd.range | cmd.
3232                     mode | ME4000_AI_LIST_LAST_ENTRY,
3233                     ai_context->channel_list_reg);
3234
3235         /* Set the timer to maximum */
3236         me4000_outl(66, ai_context->chan_timer_reg);
3237         me4000_outl(66, ai_context->chan_pre_timer_reg);
3238
3239         if (tmp & ME4000_AI_CTRL_BIT_EX_TRIG) {
3240                 jiffy = jiffies;
3241                 while (!
3242                        (me4000_inl(ai_context->status_reg) &
3243                         ME4000_AI_STATUS_BIT_EF_DATA)) {
3244                         interruptible_sleep_on_timeout(&queue, 1);
3245                         if (signal_pending(current)) {
3246                                 printk(KERN_ERR
3247                                        "ME4000:me4000_ai_single():Wait on start of state machine interrupted\n");
3248                                 return -EINTR;
3249                         }
3250                         /* 2.6 has different definitions for HZ in user and kernel space */
3251                         if (((jiffies - jiffy) > (cmd.timeout * HZ / USER_HZ)) && cmd.timeout) {
3252                                 printk(KERN_ERR
3253                                        "ME4000:me4000_ai_single():Timeout reached\n");
3254                                 return -EIO;
3255                         }
3256                 }
3257         } else {
3258                 /* Start conversion */
3259                 me4000_inl(ai_context->start_reg);
3260
3261                 /* Wait until ready */
3262                 udelay(10);
3263                 if (!
3264                     (me4000_inl(ai_context->status_reg) &
3265                      ME4000_AI_STATUS_BIT_EF_DATA)) {
3266                         printk(KERN_ERR
3267                                "ME4000:me4000_ai_single():Value not available after wait\n");
3268                         return -EIO;
3269                 }
3270         }
3271
3272         /* Read value from data fifo */
3273         cmd.value = me4000_inl(ai_context->data_reg) & 0xFFFF;
3274
3275         /* Copy result back to user */
3276         err = copy_to_user(arg, &cmd, sizeof(struct me4000_ai_single));
3277         if (err) {
3278                 printk(KERN_ERR
3279                        "ME4000:me4000_ai_single():Can't copy to user space\n");
3280                 return -EFAULT;
3281         }
3282
3283         return 0;
3284 }
3285
3286 static int me4000_ai_ioctl_sw(struct inode *inode_p, struct file *file_p,
3287                               unsigned int service, unsigned long arg)
3288 {
3289         struct me4000_ai_context *ai_context;
3290
3291         CALL_PDEBUG("me4000_ai_ioctl_sw() is executed\n");
3292
3293         ai_context = file_p->private_data;
3294
3295         if (_IOC_TYPE(service) != ME4000_MAGIC) {
3296                 printk(KERN_ERR "me4000_ai_ioctl_sw():Wrong magic number\n");
3297                 return -ENOTTY;
3298         }
3299         if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
3300                 printk(KERN_ERR
3301                        "me4000_ai_ioctl_sw():Service number to high\n");
3302                 return -ENOTTY;
3303         }
3304
3305         switch (service) {
3306         case ME4000_AI_SC_SETUP:
3307                 return me4000_ai_sc_setup((struct me4000_ai_sc *)arg,
3308                                                                 ai_context);
3309         case ME4000_AI_CONFIG:
3310                 return me4000_ai_config((struct me4000_ai_config *)arg,
3311                                                                 ai_context);
3312         case ME4000_AI_START:
3313                 return me4000_ai_start(ai_context);
3314         case ME4000_AI_STOP:
3315                 return me4000_ai_stop(ai_context);
3316         case ME4000_AI_IMMEDIATE_STOP:
3317                 return me4000_ai_immediate_stop(ai_context);
3318         case ME4000_AI_FSM_STATE:
3319                 return me4000_ai_fsm_state((int *)arg, ai_context);
3320         case ME4000_GET_USER_INFO:
3321                 return me4000_get_user_info((struct me4000_user_info *)arg,
3322                                             ai_context->board_info);
3323         case ME4000_AI_EEPROM_READ:
3324                 return me4000_eeprom_read((struct me4000_eeprom *)arg,
3325                                                                 ai_context);
3326         case ME4000_AI_EEPROM_WRITE:
3327                 return me4000_eeprom_write((struct me4000_eeprom *)arg,
3328                                                                 ai_context);
3329         case ME4000_AI_GET_COUNT_BUFFER:
3330                 return me4000_ai_get_count_buffer((unsigned long *)arg,
3331                                                   ai_context);
3332         default:
3333                 printk(KERN_ERR
3334                        "%s:Invalid service number %d\n", __func__, service);
3335                 return -ENOTTY;
3336         }
3337         return 0;
3338 }
3339
3340 static int me4000_ai_ioctl_ext(struct inode *inode_p, struct file *file_p,
3341                                unsigned int service, unsigned long arg)
3342 {
3343         struct me4000_ai_context *ai_context;
3344
3345         CALL_PDEBUG("me4000_ai_ioctl_ext() is executed\n");
3346
3347         ai_context = file_p->private_data;
3348
3349         if (_IOC_TYPE(service) != ME4000_MAGIC) {
3350                 printk(KERN_ERR "me4000_ai_ioctl_ext():Wrong magic number\n");
3351                 return -ENOTTY;
3352         }
3353         if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
3354                 printk(KERN_ERR
3355                        "me4000_ai_ioctl_ext():Service number to high\n");
3356                 return -ENOTTY;
3357         }
3358
3359         switch (service) {
3360         case ME4000_AI_SC_SETUP:
3361                 return me4000_ai_sc_setup((struct me4000_ai_sc *)arg,
3362                                                                 ai_context);
3363         case ME4000_AI_CONFIG:
3364                 return me4000_ai_config((struct me4000_ai_config *)arg,
3365                                                                 ai_context);
3366         case ME4000_AI_START:
3367                 return me4000_ai_start_ex((unsigned long *)arg, ai_context);
3368         case ME4000_AI_STOP:
3369                 return me4000_ai_stop(ai_context);
3370         case ME4000_AI_IMMEDIATE_STOP:
3371                 return me4000_ai_immediate_stop(ai_context);
3372         case ME4000_AI_EX_TRIG_ENABLE:
3373                 return me4000_ai_ex_trig_enable(ai_context);
3374         case ME4000_AI_EX_TRIG_DISABLE:
3375                 return me4000_ai_ex_trig_disable(ai_context);
3376         case ME4000_AI_EX_TRIG_SETUP:
3377                 return me4000_ai_ex_trig_setup((struct me4000_ai_trigger *)arg,
3378                                                ai_context);
3379         case ME4000_AI_FSM_STATE:
3380                 return me4000_ai_fsm_state((int *)arg, ai_context);
3381         case ME4000_GET_USER_INFO:
3382                 return me4000_get_user_info((struct me4000_user_info *)arg,
3383                                             ai_context->board_info);
3384         case ME4000_AI_GET_COUNT_BUFFER:
3385                 return me4000_ai_get_count_buffer((unsigned long *)arg,
3386                                                   ai_context);
3387         default:
3388                 printk(KERN_ERR
3389                        "%s:Invalid service number %d\n", __func__ , service);
3390                 return -ENOTTY;
3391         }
3392         return 0;
3393 }
3394
3395 static int me4000_ai_fasync(int fd, struct file *file_p, int mode)
3396 {
3397         struct me4000_ai_context *ai_context;
3398
3399         CALL_PDEBUG("me4000_ao_fasync_cont() is executed\n");
3400
3401         ai_context = file_p->private_data;
3402         return fasync_helper(fd, file_p, mode, &ai_context->fasync_p);
3403 }
3404
3405 static int me4000_ai_config(struct me4000_ai_config *arg,
3406                             struct me4000_ai_context *ai_context)
3407 {
3408         struct me4000_ai_config cmd;
3409         u32 *list = NULL;
3410         u32 mode;
3411         int i;
3412         int err;
3413         wait_queue_head_t queue;
3414         u64 scan;
3415         u32 tmp;
3416
3417         CALL_PDEBUG("me4000_ai_config() is executed\n");
3418
3419         init_waitqueue_head(&queue);
3420
3421         /* Check if conversion is stopped */
3422         if (inl(ai_context->ctrl_reg) & ME4000_AI_STATUS_BIT_FSM) {
3423                 printk(KERN_ERR
3424                        "ME4000:me4000_ai_config():Conversion is not stopped\n");
3425                 err = -EBUSY;
3426                 goto AI_CONFIG_ERR;
3427         }
3428
3429         /* Copy data from user */
3430         err = copy_from_user(&cmd, arg, sizeof(struct me4000_ai_config));
3431         if (err) {
3432                 printk(KERN_ERR
3433                        "ME4000:me4000_ai_config():Can't copy from user space\n");
3434                 err = -EFAULT;
3435                 goto AI_CONFIG_ERR;
3436         }
3437
3438         PDEBUG
3439             ("me4000_ai_config():chan = %ld, pre_chan = %ld, scan_low = %ld, scan_high = %ld, count = %ld\n",
3440              cmd.timer.chan, cmd.timer.pre_chan, cmd.timer.scan_low,
3441              cmd.timer.scan_high, cmd.channel_list.count);
3442
3443         /* Check whether sample and hold is available for this board */
3444         if (cmd.sh) {
3445                 if (!ai_context->board_info->board_p->ai.sh_count) {
3446                         printk(KERN_ERR
3447                                "ME4000:me4000_ai_config():Sample and Hold is not available for this board\n");
3448                         err = -ENODEV;
3449                         goto AI_CONFIG_ERR;
3450                 }
3451         }
3452
3453         /* Check the channel list size */
3454         if (cmd.channel_list.count > ME4000_AI_CHANNEL_LIST_COUNT) {
3455                 printk(KERN_ERR
3456                        "me4000_ai_config():Channel list is to large\n");
3457                 err = -EINVAL;
3458                 goto AI_CONFIG_ERR;
3459         }
3460
3461         /* Copy channel list from user */
3462         list = kmalloc(sizeof(u32) * cmd.channel_list.count, GFP_KERNEL);
3463         if (!list) {
3464                 printk(KERN_ERR
3465                        "ME4000:me4000_ai_config():Can't get memory for channel list\n");
3466                 err = -ENOMEM;
3467                 goto AI_CONFIG_ERR;
3468         }
3469         err =
3470             copy_from_user(list, cmd.channel_list.list,
3471                            sizeof(u32) * cmd.channel_list.count);
3472         if (err) {
3473                 printk(KERN_ERR
3474                        "ME4000:me4000_ai_config():Can't copy from user space\n");
3475                 err = -EFAULT;
3476                 goto AI_CONFIG_ERR;
3477         }
3478
3479         /* Check if last entry bit is set */
3480         if (!(list[cmd.channel_list.count - 1] & ME4000_AI_LIST_LAST_ENTRY)) {
3481                 printk(KERN_WARNING
3482                        "me4000_ai_config():Last entry bit is not set\n");
3483                 list[cmd.channel_list.count - 1] |= ME4000_AI_LIST_LAST_ENTRY;
3484         }
3485
3486         /* Check whether mode is equal for all entries */
3487         mode = list[0] & 0x20;
3488         for (i = 0; i < cmd.channel_list.count; i++) {
3489                 if ((list[i] & 0x20) != mode) {
3490                         printk(KERN_ERR
3491                                "ME4000:me4000_ai_config():Mode is not equal for all entries\n");
3492                         err = -EINVAL;
3493                         goto AI_CONFIG_ERR;
3494                 }
3495         }
3496
3497         /* Check whether channels are available for this mode */
3498         if (mode == ME4000_AI_LIST_INPUT_SINGLE_ENDED) {
3499                 for (i = 0; i < cmd.channel_list.count; i++) {
3500                         if ((list[i] & 0x1F) >=
3501                             ai_context->board_info->board_p->ai.count) {
3502                                 printk(KERN_ERR
3503                                        "ME4000:me4000_ai_config():Channel is not available for single ended\n");
3504                                 err = -EINVAL;
3505                                 goto AI_CONFIG_ERR;
3506                         }
3507                 }
3508         } else if (mode == ME4000_AI_LIST_INPUT_DIFFERENTIAL) {
3509                 for (i = 0; i < cmd.channel_list.count; i++) {
3510                         if ((list[i] & 0x1F) >=
3511                             ai_context->board_info->board_p->ai.diff_count) {
3512                                 printk(KERN_ERR
3513                                        "ME4000:me4000_ai_config():Channel is not available for differential\n");
3514                                 err = -EINVAL;
3515                                 goto AI_CONFIG_ERR;
3516                         }
3517                 }
3518         }
3519
3520         /* Check if bipolar is set for all entries when in differential mode */
3521         if (mode == ME4000_AI_LIST_INPUT_DIFFERENTIAL) {
3522                 for (i = 0; i < cmd.channel_list.count; i++) {
3523                         if ((list[i] & 0xC0) != ME4000_AI_LIST_RANGE_BIPOLAR_10
3524                             && (list[i] & 0xC0) !=
3525                             ME4000_AI_LIST_RANGE_BIPOLAR_2_5) {
3526                                 printk(KERN_ERR
3527                                        "ME4000:me4000_ai_config():Bipolar is not selected in differential mode\n");
3528                                 err = -EINVAL;
3529                                 goto AI_CONFIG_ERR;
3530                         }
3531                 }
3532         }
3533
3534         if (ai_context->mode != ME4000_AI_ACQ_MODE_EXT_SINGLE_VALUE) {
3535                 /* Check for minimum channel divisor */
3536                 if (cmd.timer.chan < ME4000_AI_MIN_TICKS) {
3537                         printk(KERN_ERR
3538                                "ME4000:me4000_ai_config():Channel timer divisor is to low\n");
3539                         err = -EINVAL;
3540                         goto AI_CONFIG_ERR;
3541                 }
3542
3543                 /* Check if minimum channel divisor is adjusted when sample and hold is activated */
3544                 if ((cmd.sh) && (cmd.timer.chan != ME4000_AI_MIN_TICKS)) {
3545                         printk(KERN_ERR
3546                                "ME4000:me4000_ai_config():Channel timer divisor must be at minimum when sample and hold is activated\n");
3547                         err = -EINVAL;
3548                         goto AI_CONFIG_ERR;
3549                 }
3550
3551                 /* Check for minimum channel pre divisor */
3552                 if (cmd.timer.pre_chan < ME4000_AI_MIN_TICKS) {
3553                         printk(KERN_ERR
3554                                "ME4000:me4000_ai_config():Channel pre timer divisor is to low\n");
3555                         err = -EINVAL;
3556                         goto AI_CONFIG_ERR;
3557                 }
3558
3559                 /* Write the channel timers */
3560                 me4000_outl(cmd.timer.chan - 1, ai_context->chan_timer_reg);
3561                 me4000_outl(cmd.timer.pre_chan - 1,
3562                             ai_context->chan_pre_timer_reg);
3563
3564                 /* Save the timer values in the board context */
3565                 ai_context->chan_timer = cmd.timer.chan;
3566                 ai_context->chan_pre_timer = cmd.timer.pre_chan;
3567
3568                 if (ai_context->mode != ME4000_AI_ACQ_MODE_EXT_SINGLE_CHANLIST) {
3569                         /* Check for scan timer divisor */
3570                         scan =
3571                             (u64) cmd.timer.scan_low | ((u64) cmd.timer.
3572                                                         scan_high << 32);
3573                         if (scan != 0) {
3574                                 if (scan <
3575                                     cmd.channel_list.count * cmd.timer.chan +
3576                                     1) {
3577                                         printk(KERN_ERR
3578                                                "ME4000:me4000_ai_config():Scan timer divisor is to low\n");
3579                                         err = -EINVAL;
3580                                         goto AI_CONFIG_ERR;
3581                                 }
3582                         }
3583
3584                         /* Write the scan timers */
3585                         if (scan != 0) {
3586                                 scan--;
3587                                 tmp = (u32) (scan & 0xFFFFFFFF);
3588                                 me4000_outl(tmp,
3589                                             ai_context->scan_timer_low_reg);
3590                                 tmp = (u32) ((scan >> 32) & 0xFFFFFFFF);
3591                                 me4000_outl(tmp,
3592                                             ai_context->scan_timer_high_reg);
3593
3594                                 scan =
3595                                     scan - (cmd.timer.chan - 1) +
3596                                     (cmd.timer.pre_chan - 1);
3597                                 tmp = (u32) (scan & 0xFFFFFFFF);
3598                                 me4000_outl(tmp,
3599                                             ai_context->scan_pre_timer_low_reg);
3600                                 tmp = (u32) ((scan >> 32) & 0xFFFFFFFF);
3601                                 me4000_outl(tmp,
3602                                             ai_context->
3603                                             scan_pre_timer_high_reg);
3604                         } else {
3605                                 me4000_outl(0x0,
3606                                             ai_context->scan_timer_low_reg);
3607                                 me4000_outl(0x0,
3608                                             ai_context->scan_timer_high_reg);
3609
3610                                 me4000_outl(0x0,
3611                                             ai_context->scan_pre_timer_low_reg);
3612                                 me4000_outl(0x0,
3613                                             ai_context->
3614                                             scan_pre_timer_high_reg);
3615                         }
3616
3617                         ai_context->scan_timer_low = cmd.timer.scan_low;
3618                         ai_context->scan_timer_high = cmd.timer.scan_high;
3619                 }
3620         }
3621
3622         /* Clear the channel list */
3623         tmp = me4000_inl(ai_context->ctrl_reg);
3624         tmp &= ~ME4000_AI_CTRL_BIT_CHANNEL_FIFO;
3625         me4000_outl(tmp, ai_context->ctrl_reg);
3626         tmp |= ME4000_AI_CTRL_BIT_CHANNEL_FIFO;
3627         me4000_outl(tmp, ai_context->ctrl_reg);
3628
3629         /* Write the channel list */
3630         for (i = 0; i < cmd.channel_list.count; i++) {
3631                 me4000_outl(list[i], ai_context->channel_list_reg);
3632         }
3633
3634         /* Setup sample and hold */
3635         if (cmd.sh) {
3636                 tmp |= ME4000_AI_CTRL_BIT_SAMPLE_HOLD;
3637                 me4000_outl(tmp, ai_context->ctrl_reg);
3638         } else {
3639                 tmp &= ~ME4000_AI_CTRL_BIT_SAMPLE_HOLD;
3640                 me4000_outl(tmp, ai_context->ctrl_reg);
3641         }
3642
3643         /* Save the channel list size in the board context */
3644         ai_context->channel_list_count = cmd.channel_list.count;
3645
3646         kfree(list);
3647
3648         return 0;
3649
3650 AI_CONFIG_ERR:
3651
3652         /* Reset the timers */
3653         ai_context->chan_timer = 66;
3654         ai_context->chan_pre_timer = 66;
3655         ai_context->scan_timer_low = 0;
3656         ai_context->scan_timer_high = 0;
3657
3658         me4000_outl(65, ai_context->chan_timer_reg);
3659         me4000_outl(65, ai_context->chan_pre_timer_reg);
3660         me4000_outl(0, ai_context->scan_timer_high_reg);
3661         me4000_outl(0, ai_context->scan_timer_low_reg);
3662         me4000_outl(0, ai_context->scan_pre_timer_high_reg);
3663         me4000_outl(0, ai_context->scan_pre_timer_low_reg);
3664
3665         ai_context->channel_list_count = 0;
3666
3667         tmp = me4000_inl(ai_context->ctrl_reg);
3668         tmp &=
3669             ~(ME4000_AI_CTRL_BIT_CHANNEL_FIFO | ME4000_AI_CTRL_BIT_SAMPLE_HOLD);
3670
3671         if (list)
3672                 kfree(list);
3673
3674         return err;
3675
3676 }
3677
3678 static int ai_common_start(struct me4000_ai_context *ai_context)
3679 {
3680         u32 tmp;
3681         CALL_PDEBUG("ai_common_start() is executed\n");
3682
3683         tmp = me4000_inl(ai_context->ctrl_reg);
3684
3685         /* Check if conversion is stopped */
3686         if (tmp & ME4000_AI_STATUS_BIT_FSM) {
3687                 printk(KERN_ERR
3688                        "ME4000:ai_common_start():Conversion is not stopped\n");
3689                 return -EBUSY;
3690         }
3691
3692         /* Clear data fifo, disable all interrupts, clear sample counter reload */
3693         tmp &= ~(ME4000_AI_CTRL_BIT_DATA_FIFO | ME4000_AI_CTRL_BIT_LE_IRQ |
3694                  ME4000_AI_CTRL_BIT_HF_IRQ | ME4000_AI_CTRL_BIT_SC_IRQ |
3695                  ME4000_AI_CTRL_BIT_SC_RELOAD);
3696
3697         me4000_outl(tmp, ai_context->ctrl_reg);
3698
3699         /* Clear circular buffer */
3700         ai_context->circ_buf.head = 0;
3701         ai_context->circ_buf.tail = 0;
3702
3703         /* Enable data fifo */
3704         tmp |= ME4000_AI_CTRL_BIT_DATA_FIFO;
3705
3706         /* Determine interrupt setup */
3707         if (ai_context->sample_counter && !ai_context->sample_counter_reload) {
3708                 /* Enable Half Full Interrupt and Sample Counter Interrupt */
3709                 tmp |= ME4000_AI_CTRL_BIT_SC_IRQ | ME4000_AI_CTRL_BIT_HF_IRQ;
3710         } else if (ai_context->sample_counter
3711                    && ai_context->sample_counter_reload) {
3712                 if (ai_context->sample_counter <= ME4000_AI_FIFO_COUNT / 2) {
3713                         /* Enable only Sample Counter Interrupt */
3714                         tmp |=
3715                             ME4000_AI_CTRL_BIT_SC_IRQ |
3716                             ME4000_AI_CTRL_BIT_SC_RELOAD;
3717                 } else {
3718                         /* Enable Half Full Interrupt and Sample Counter Interrupt */
3719                         tmp |=
3720                             ME4000_AI_CTRL_BIT_SC_IRQ |
3721                             ME4000_AI_CTRL_BIT_HF_IRQ |
3722                             ME4000_AI_CTRL_BIT_SC_RELOAD;
3723                 }
3724         } else {
3725                 /* Enable only Half Full Interrupt */
3726                 tmp |= ME4000_AI_CTRL_BIT_HF_IRQ;
3727         }
3728
3729         /* Clear the stop bits */
3730         tmp &= ~(ME4000_AI_CTRL_BIT_STOP | ME4000_AI_CTRL_BIT_IMMEDIATE_STOP);
3731
3732         /* Write setup to hardware */
3733         me4000_outl(tmp, ai_context->ctrl_reg);
3734
3735         /* Write sample counter */
3736         me4000_outl(ai_context->sample_counter, ai_context->sample_counter_reg);
3737
3738         return 0;
3739 }
3740
3741 static int me4000_ai_start(struct me4000_ai_context *ai_context)
3742 {
3743         int err;
3744         CALL_PDEBUG("me4000_ai_start() is executed\n");
3745
3746         /* Prepare Hardware */
3747         err = ai_common_start(ai_context);
3748         if (err)
3749                 return err;
3750
3751         /* Start conversion by dummy read */
3752         me4000_inl(ai_context->start_reg);
3753
3754         return 0;
3755 }
3756
3757 static int me4000_ai_start_ex(unsigned long *arg,
3758                               struct me4000_ai_context *ai_context)
3759 {
3760         int err;
3761         wait_queue_head_t queue;
3762         unsigned long ref;
3763         unsigned long timeout;
3764
3765         CALL_PDEBUG("me4000_ai_start_ex() is executed\n");
3766
3767         if (get_user(timeout, arg)) {
3768                 printk(KERN_ERR
3769                        "me4000_ai_start_ex():Cannot copy data from user\n");
3770                 return -EFAULT;
3771         }
3772
3773         init_waitqueue_head(&queue);
3774
3775         /* Prepare Hardware */
3776         err = ai_common_start(ai_context);
3777         if (err)
3778                 return err;
3779
3780         if (timeout) {
3781                 ref = jiffies;
3782                 while (!
3783                        (inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM))
3784                 {
3785                         interruptible_sleep_on_timeout(&queue, 1);
3786                         if (signal_pending(current)) {
3787                                 printk(KERN_ERR
3788                                        "ME4000:me4000_ai_start_ex():Wait on start of state machine interrupted\n");
3789                                 return -EINTR;
3790                         }
3791                         /* 2.6 has different definitions for HZ in user and kernel space */
3792                         if ((jiffies - ref) > (timeout * HZ / USER_HZ)) {
3793                                 printk(KERN_ERR
3794                                        "ME4000:me4000_ai_start_ex():Timeout reached\n");
3795                                 return -EIO;
3796                         }
3797                 }
3798         } else {
3799                 while (!
3800                        (inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM))
3801                 {
3802                         interruptible_sleep_on_timeout(&queue, 1);
3803                         if (signal_pending(current)) {
3804                                 printk(KERN_ERR
3805                                        "ME4000:me4000_ai_start_ex():Wait on start of state machine interrupted\n");
3806                                 return -EINTR;
3807                         }
3808                 }
3809         }
3810
3811         return 0;
3812 }
3813
3814 static int me4000_ai_stop(struct me4000_ai_context *ai_context)
3815 {
3816         wait_queue_head_t queue;
3817         u32 tmp;
3818         unsigned long flags;
3819
3820         CALL_PDEBUG("me4000_ai_stop() is executed\n");
3821
3822         init_waitqueue_head(&queue);
3823
3824         /* Disable irqs and clear data fifo */
3825         spin_lock_irqsave(&ai_context->int_lock, flags);
3826         tmp = me4000_inl(ai_context->ctrl_reg);
3827         tmp &=
3828             ~(ME4000_AI_CTRL_BIT_HF_IRQ | ME4000_AI_CTRL_BIT_SC_IRQ |
3829               ME4000_AI_CTRL_BIT_DATA_FIFO);
3830         /* Stop conversion of the state machine */
3831         tmp |= ME4000_AI_CTRL_BIT_STOP;
3832         me4000_outl(tmp, ai_context->ctrl_reg);
3833         spin_unlock_irqrestore(&ai_context->int_lock, flags);
3834
3835         /* Clear circular buffer */
3836         ai_context->circ_buf.head = 0;
3837         ai_context->circ_buf.tail = 0;
3838
3839         while (inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM) {
3840                 interruptible_sleep_on_timeout(&queue, 1);
3841                 if (signal_pending(current)) {
3842                         printk(KERN_ERR
3843                                "ME4000:me4000_ai_stop():Wait on state machine after stop interrupted\n");
3844                         return -EINTR;
3845                 }
3846         }
3847
3848         return 0;
3849 }
3850
3851 static int me4000_ai_immediate_stop(struct me4000_ai_context *ai_context)
3852 {
3853         wait_queue_head_t queue;
3854         u32 tmp;
3855         unsigned long flags;
3856
3857         CALL_PDEBUG("me4000_ai_stop() is executed\n");
3858
3859         init_waitqueue_head(&queue);
3860
3861         /* Disable irqs and clear data fifo */
3862         spin_lock_irqsave(&ai_context->int_lock, flags);
3863         tmp = me4000_inl(ai_context->ctrl_reg);
3864         tmp &=
3865             ~(ME4000_AI_CTRL_BIT_HF_IRQ | ME4000_AI_CTRL_BIT_SC_IRQ |
3866               ME4000_AI_CTRL_BIT_DATA_FIFO);
3867         /* Stop conversion of the state machine */
3868         tmp |= ME4000_AI_CTRL_BIT_IMMEDIATE_STOP;
3869         me4000_outl(tmp, ai_context->ctrl_reg);
3870         spin_unlock_irqrestore(&ai_context->int_lock, flags);
3871
3872         /* Clear circular buffer */
3873         ai_context->circ_buf.head = 0;
3874         ai_context->circ_buf.tail = 0;
3875
3876         while (inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM) {
3877                 interruptible_sleep_on_timeout(&queue, 1);
3878                 if (signal_pending(current)) {
3879                         printk(KERN_ERR
3880                                "ME4000:me4000_ai_stop():Wait on state machine after stop interrupted\n");
3881                         return -EINTR;
3882                 }
3883         }
3884
3885         return 0;
3886 }
3887
3888 static int me4000_ai_ex_trig_enable(struct me4000_ai_context *ai_context)
3889 {
3890         u32 tmp;
3891         unsigned long flags;
3892
3893         CALL_PDEBUG("me4000_ai_ex_trig_enable() is executed\n");
3894
3895         spin_lock_irqsave(&ai_context->int_lock, flags);
3896         tmp = me4000_inl(ai_context->ctrl_reg);
3897         tmp |= ME4000_AI_CTRL_BIT_EX_TRIG;
3898         me4000_outl(tmp, ai_context->ctrl_reg);
3899         spin_unlock_irqrestore(&ai_context->int_lock, flags);
3900
3901         return 0;
3902 }
3903
3904 static int me4000_ai_ex_trig_disable(struct me4000_ai_context *ai_context)
3905 {
3906         u32 tmp;
3907         unsigned long flags;
3908
3909         CALL_PDEBUG("me4000_ai_ex_trig_disable() is executed\n");
3910
3911         spin_lock_irqsave(&ai_context->int_lock, flags);
3912         tmp = me4000_inl(ai_context->ctrl_reg);
3913         tmp &= ~ME4000_AI_CTRL_BIT_EX_TRIG;
3914         me4000_outl(tmp, ai_context->ctrl_reg);
3915         spin_unlock_irqrestore(&ai_context->int_lock, flags);
3916
3917         return 0;
3918 }
3919
3920 static int me4000_ai_ex_trig_setup(struct me4000_ai_trigger *arg,
3921                                    struct me4000_ai_context *ai_context)
3922 {
3923         struct me4000_ai_trigger cmd;
3924         int err;
3925         u32 tmp;
3926         unsigned long flags;
3927
3928         CALL_PDEBUG("me4000_ai_ex_trig_setup() is executed\n");
3929
3930         /* Copy data from user */
3931         err = copy_from_user(&cmd, arg, sizeof(struct me4000_ai_trigger));
3932         if (err) {
3933                 printk(KERN_ERR
3934                        "ME4000:me4000_ai_ex_trig_setup():Can't copy from user space\n");
3935                 return -EFAULT;
3936         }
3937
3938         spin_lock_irqsave(&ai_context->int_lock, flags);
3939         tmp = me4000_inl(ai_context->ctrl_reg);
3940
3941         if (cmd.mode == ME4000_AI_TRIGGER_EXT_DIGITAL) {
3942                 tmp &= ~ME4000_AI_CTRL_BIT_EX_TRIG_ANALOG;
3943         } else if (cmd.mode == ME4000_AI_TRIGGER_EXT_ANALOG) {
3944                 if (!ai_context->board_info->board_p->ai.ex_trig_analog) {
3945                         printk(KERN_ERR
3946                                "ME4000:me4000_ai_ex_trig_setup():No analog trigger available\n");
3947                         return -EINVAL;
3948                 }
3949                 tmp |= ME4000_AI_CTRL_BIT_EX_TRIG_ANALOG;
3950         } else {
3951                 spin_unlock_irqrestore(&ai_context->int_lock, flags);
3952                 printk(KERN_ERR
3953                        "ME4000:me4000_ai_ex_trig_setup():Invalid trigger mode specified\n");
3954                 return -EINVAL;
3955         }
3956
3957         if (cmd.edge == ME4000_AI_TRIGGER_EXT_EDGE_RISING) {
3958                 tmp &=
3959                     ~(ME4000_AI_CTRL_BIT_EX_TRIG_BOTH |
3960                       ME4000_AI_CTRL_BIT_EX_TRIG_FALLING);
3961         } else if (cmd.edge == ME4000_AI_TRIGGER_EXT_EDGE_FALLING) {
3962                 tmp |= ME4000_AI_CTRL_BIT_EX_TRIG_FALLING;
3963                 tmp &= ~ME4000_AI_CTRL_BIT_EX_TRIG_BOTH;
3964         } else if (cmd.edge == ME4000_AI_TRIGGER_EXT_EDGE_BOTH) {
3965                 tmp |=
3966                     ME4000_AI_CTRL_BIT_EX_TRIG_BOTH |
3967                     ME4000_AI_CTRL_BIT_EX_TRIG_FALLING;
3968         } else {
3969                 spin_unlock_irqrestore(&ai_context->int_lock, flags);
3970                 printk(KERN_ERR
3971                        "ME4000:me4000_ai_ex_trig_setup():Invalid trigger edge specified\n");
3972                 return -EINVAL;
3973         }
3974
3975         me4000_outl(tmp, ai_context->ctrl_reg);
3976         spin_unlock_irqrestore(&ai_context->int_lock, flags);
3977         return 0;
3978 }
3979
3980 static int me4000_ai_sc_setup(struct me4000_ai_sc *arg,
3981                               struct me4000_ai_context *ai_context)
3982 {
3983         struct me4000_ai_sc cmd;
3984         int err;
3985
3986         CALL_PDEBUG("me4000_ai_sc_setup() is executed\n");
3987
3988         /* Copy data from user */
3989         err = copy_from_user(&cmd, arg, sizeof(struct me4000_ai_sc));
3990         if (err) {
3991                 printk(KERN_ERR
3992                        "ME4000:me4000_ai_sc_setup():Can't copy from user space\n");
3993                 return -EFAULT;
3994         }
3995
3996         ai_context->sample_counter = cmd.value;
3997         ai_context->sample_counter_reload = cmd.reload;
3998
3999         return 0;
4000 }
4001
4002 static ssize_t me4000_ai_read(struct file *filep, char *buff, size_t cnt,
4003                               loff_t *offp)
4004 {
4005         struct me4000_ai_context *ai_context = filep->private_data;
4006         s16 *buffer = (s16 *) buff;
4007         size_t count = cnt / 2;
4008         unsigned long flags;
4009         int tmp;
4010         int c = 0;
4011         int k = 0;
4012         int ret = 0;
4013         wait_queue_t wait;
4014
4015         CALL_PDEBUG("me4000_ai_read() is executed\n");
4016
4017         init_waitqueue_entry(&wait, current);
4018
4019         /* Check count */
4020         if (count <= 0) {
4021                 PDEBUG("me4000_ai_read():Count is 0\n");
4022                 return 0;
4023         }
4024
4025         while (count > 0) {
4026                 if (filep->f_flags & O_NONBLOCK) {
4027                         c = me4000_values_to_end(ai_context->circ_buf,
4028                                                  ME4000_AI_BUFFER_COUNT);
4029                         if (!c) {
4030                                 PDEBUG
4031                                     ("me4000_ai_read():Returning from nonblocking read\n");
4032                                 break;
4033                         }
4034                 } else {
4035                         /* Check if conversion is still running */
4036                         if (!
4037                             (me4000_inl(ai_context->status_reg) &
4038                              ME4000_AI_STATUS_BIT_FSM)) {
4039                                 printk(KERN_ERR
4040                                        "ME4000:me4000_ai_read():Conversion interrupted\n");
4041                                 return -EPIPE;
4042                         }
4043
4044                         wait_event_interruptible(ai_context->wait_queue,
4045                                                  (me4000_values_to_end
4046                                                   (ai_context->circ_buf,
4047                                                    ME4000_AI_BUFFER_COUNT)));
4048                         if (signal_pending(current)) {
4049                                 printk(KERN_ERR
4050                                        "ME4000:me4000_ai_read():Wait on values interrupted from signal\n");
4051                                 return -EINTR;
4052                         }
4053                 }
4054
4055                 /* Only read count values or as much as available */
4056                 c = me4000_values_to_end(ai_context->circ_buf,
4057                                          ME4000_AI_BUFFER_COUNT);
4058                 PDEBUG("me4000_ai_read():%d values to end\n", c);
4059                 if (count < c)
4060                         c = count;
4061
4062                 PDEBUG("me4000_ai_read():Copy %d values to user space\n", c);
4063                 k = 2 * c;
4064                 k -= copy_to_user(buffer,
4065                                   ai_context->circ_buf.buf +
4066                                   ai_context->circ_buf.tail, k);
4067                 c = k / 2;
4068                 if (!c) {
4069                         printk(KERN_ERR
4070                                "ME4000:me4000_ai_read():Cannot copy new values to user\n");
4071                         return -EFAULT;
4072                 }
4073
4074                 ai_context->circ_buf.tail =
4075                     (ai_context->circ_buf.tail + c) & (ME4000_AI_BUFFER_COUNT -
4076                                                        1);
4077                 buffer += c;
4078                 count -= c;
4079                 ret += c;
4080
4081                 spin_lock_irqsave(&ai_context->int_lock, flags);
4082                 if (me4000_buf_space
4083                     (ai_context->circ_buf, ME4000_AI_BUFFER_COUNT)) {
4084                         tmp = me4000_inl(ai_context->ctrl_reg);
4085
4086                         /* Determine interrupt setup */
4087                         if (ai_context->sample_counter
4088                             && !ai_context->sample_counter_reload) {
4089                                 /* Enable Half Full Interrupt and Sample Counter Interrupt */
4090                                 tmp |=
4091                                     ME4000_AI_CTRL_BIT_SC_IRQ |
4092                                     ME4000_AI_CTRL_BIT_HF_IRQ;
4093                         } else if (ai_context->sample_counter
4094                                    && ai_context->sample_counter_reload) {
4095                                 if (ai_context->sample_counter <
4096                                     ME4000_AI_FIFO_COUNT / 2) {
4097                                         /* Enable only Sample Counter Interrupt */
4098                                         tmp |= ME4000_AI_CTRL_BIT_SC_IRQ;
4099                                 } else {
4100                                         /* Enable Half Full Interrupt and Sample Counter Interrupt */
4101                                         tmp |=
4102                                             ME4000_AI_CTRL_BIT_SC_IRQ |
4103                                             ME4000_AI_CTRL_BIT_HF_IRQ;
4104                                 }
4105                         } else {
4106                                 /* Enable only Half Full Interrupt */
4107                                 tmp |= ME4000_AI_CTRL_BIT_HF_IRQ;
4108                         }
4109
4110                         me4000_outl(tmp, ai_context->ctrl_reg);
4111                 }
4112                 spin_unlock_irqrestore(&ai_context->int_lock, flags);
4113         }
4114
4115         /* Check if conversion is still running */
4116         if (!(me4000_inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM)) {
4117                 printk(KERN_ERR
4118                        "ME4000:me4000_ai_read():Conversion not running after complete read\n");
4119                 return -EPIPE;
4120         }
4121
4122         if (filep->f_flags & O_NONBLOCK) {
4123                 return (k == 0) ? -EAGAIN : 2 * ret;
4124         }
4125
4126         CALL_PDEBUG("me4000_ai_read() is leaved\n");
4127         return ret * 2;
4128 }
4129
4130 static unsigned int me4000_ai_poll(struct file *file_p, poll_table *wait)
4131 {
4132         struct me4000_ai_context *ai_context;
4133         unsigned long mask = 0;
4134
4135         CALL_PDEBUG("me4000_ai_poll() is executed\n");
4136
4137         ai_context = file_p->private_data;
4138
4139         /* Register wait queue */
4140         poll_wait(file_p, &ai_context->wait_queue, wait);
4141
4142         /* Get available values */
4143         if (me4000_values_to_end(ai_context->circ_buf, ME4000_AI_BUFFER_COUNT))
4144                 mask |= POLLIN | POLLRDNORM;
4145
4146         PDEBUG("me4000_ai_poll():Return mask %lX\n", mask);
4147
4148         return mask;
4149 }
4150
4151 static int me4000_ai_offset_enable(struct me4000_ai_context *ai_context)
4152 {
4153         unsigned long tmp;
4154
4155         CALL_PDEBUG("me4000_ai_offset_enable() is executed\n");
4156
4157         tmp = me4000_inl(ai_context->ctrl_reg);
4158         tmp |= ME4000_AI_CTRL_BIT_OFFSET;
4159         me4000_outl(tmp, ai_context->ctrl_reg);
4160
4161         return 0;
4162 }
4163
4164 static int me4000_ai_offset_disable(struct me4000_ai_context *ai_context)
4165 {
4166         unsigned long tmp;
4167
4168         CALL_PDEBUG("me4000_ai_offset_disable() is executed\n");
4169
4170         tmp = me4000_inl(ai_context->ctrl_reg);
4171         tmp &= ~ME4000_AI_CTRL_BIT_OFFSET;
4172         me4000_outl(tmp, ai_context->ctrl_reg);
4173
4174         return 0;
4175 }
4176
4177 static int me4000_ai_fullscale_enable(struct me4000_ai_context *ai_context)
4178 {
4179         unsigned long tmp;
4180
4181         CALL_PDEBUG("me4000_ai_fullscale_enable() is executed\n");
4182
4183         tmp = me4000_inl(ai_context->ctrl_reg);
4184         tmp |= ME4000_AI_CTRL_BIT_FULLSCALE;
4185         me4000_outl(tmp, ai_context->ctrl_reg);
4186
4187         return 0;
4188 }
4189
4190 static int me4000_ai_fullscale_disable(struct me4000_ai_context *ai_context)
4191 {
4192         unsigned long tmp;
4193
4194         CALL_PDEBUG("me4000_ai_fullscale_disable() is executed\n");
4195
4196         tmp = me4000_inl(ai_context->ctrl_reg);
4197         tmp &= ~ME4000_AI_CTRL_BIT_FULLSCALE;
4198         me4000_outl(tmp, ai_context->ctrl_reg);
4199
4200         return 0;
4201 }
4202
4203 static int me4000_ai_fsm_state(int *arg, struct me4000_ai_context *ai_context)
4204 {
4205         unsigned long tmp;
4206
4207         CALL_PDEBUG("me4000_ai_fsm_state() is executed\n");
4208
4209         tmp =
4210             (me4000_inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM) ? 1
4211             : 0;
4212
4213         if (put_user(tmp, arg)) {
4214                 printk(KERN_ERR "me4000_ai_fsm_state():Cannot copy to user\n");
4215                 return -EFAULT;
4216         }
4217
4218         return 0;
4219 }
4220
4221 static int me4000_ai_get_count_buffer(unsigned long *arg,
4222                                       struct me4000_ai_context *ai_context)
4223 {
4224         unsigned long c;
4225         int err;
4226
4227         c = me4000_buf_count(ai_context->circ_buf, ME4000_AI_BUFFER_COUNT);
4228
4229         err = copy_to_user(arg, &c, sizeof(unsigned long));
4230         if (err) {
4231                 printk(KERN_ERR
4232                        "%s:Can't copy to user space\n", __func__);
4233                 return -EFAULT;
4234         }
4235
4236         return 0;
4237 }
4238
4239 /*---------------------------------- EEPROM stuff ---------------------------*/
4240
4241 static int eeprom_write_cmd(struct me4000_ai_context *ai_context, unsigned long cmd,
4242                             int length)
4243 {
4244         int i;
4245         unsigned long value;
4246
4247         CALL_PDEBUG("eeprom_write_cmd() is executed\n");
4248
4249         PDEBUG("eeprom_write_cmd():Write command 0x%08lX with length = %d\n",
4250                cmd, length);
4251
4252         /* Get the ICR register and clear the related bits */
4253         value = me4000_inl(ai_context->board_info->plx_regbase + PLX_ICR);
4254         value &= ~(PLX_ICR_MASK_EEPROM);
4255         me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4256
4257         /* Raise the chip select */
4258         value |= PLX_ICR_BIT_EEPROM_CHIP_SELECT;
4259         me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4260         udelay(EEPROM_DELAY);
4261
4262         for (i = 0; i < length; i++) {
4263                 if (cmd & ((0x1 << (length - 1)) >> i)) {
4264                         value |= PLX_ICR_BIT_EEPROM_WRITE;
4265                 } else {
4266                         value &= ~PLX_ICR_BIT_EEPROM_WRITE;
4267                 }
4268
4269                 /* Write to EEPROM */
4270                 me4000_outl(value,
4271                             ai_context->board_info->plx_regbase + PLX_ICR);
4272                 udelay(EEPROM_DELAY);
4273
4274                 /* Raising edge of the clock */
4275                 value |= PLX_ICR_BIT_EEPROM_CLOCK_SET;
4276                 me4000_outl(value,
4277                             ai_context->board_info->plx_regbase + PLX_ICR);
4278                 udelay(EEPROM_DELAY);
4279
4280                 /* Falling edge of the clock */
4281                 value &= ~PLX_ICR_BIT_EEPROM_CLOCK_SET;
4282                 me4000_outl(value,
4283                             ai_context->board_info->plx_regbase + PLX_ICR);
4284                 udelay(EEPROM_DELAY);
4285         }
4286
4287         /* Clear the chip select */
4288         value &= ~PLX_ICR_BIT_EEPROM_CHIP_SELECT;
4289         me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4290         udelay(EEPROM_DELAY);
4291
4292         /* Wait until hardware is ready for sure */
4293         mdelay(10);
4294
4295         return 0;
4296 }
4297
4298 static unsigned short eeprom_read_cmd(struct me4000_ai_context *ai_context,
4299                                       unsigned long cmd, int length)
4300 {
4301         int i;
4302         unsigned long value;
4303         unsigned short id = 0;
4304
4305         CALL_PDEBUG("eeprom_read_cmd() is executed\n");
4306
4307         PDEBUG("eeprom_read_cmd():Read command 0x%08lX with length = %d\n", cmd,
4308                length);
4309
4310         /* Get the ICR register and clear the related bits */
4311         value = me4000_inl(ai_context->board_info->plx_regbase + PLX_ICR);
4312         value &= ~(PLX_ICR_MASK_EEPROM);
4313
4314         me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4315
4316         /* Raise the chip select */
4317         value |= PLX_ICR_BIT_EEPROM_CHIP_SELECT;
4318         me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4319         udelay(EEPROM_DELAY);
4320
4321         /* Write the read command to the eeprom */
4322         for (i = 0; i < length; i++) {
4323                 if (cmd & ((0x1 << (length - 1)) >> i)) {
4324                         value |= PLX_ICR_BIT_EEPROM_WRITE;
4325                 } else {
4326                         value &= ~PLX_ICR_BIT_EEPROM_WRITE;
4327                 }
4328                 me4000_outl(value,
4329                             ai_context->board_info->plx_regbase + PLX_ICR);
4330                 udelay(EEPROM_DELAY);
4331
4332                 /* Raising edge of the clock */
4333                 value |= PLX_ICR_BIT_EEPROM_CLOCK_SET;
4334                 me4000_outl(value,
4335                             ai_context->board_info->plx_regbase + PLX_ICR);
4336                 udelay(EEPROM_DELAY);
4337
4338                 /* Falling edge of the clock */
4339                 value &= ~PLX_ICR_BIT_EEPROM_CLOCK_SET;
4340                 me4000_outl(value,
4341                             ai_context->board_info->plx_regbase + PLX_ICR);
4342                 udelay(EEPROM_DELAY);
4343         }
4344
4345         /* Read the value from the eeprom */
4346         for (i = 0; i < 16; i++) {
4347                 /* Raising edge of the clock */
4348                 value |= PLX_ICR_BIT_EEPROM_CLOCK_SET;
4349                 me4000_outl(value,
4350                             ai_context->board_info->plx_regbase + PLX_ICR);
4351                 udelay(EEPROM_DELAY);
4352
4353                 if (me4000_inl(ai_context->board_info->plx_regbase + PLX_ICR) &
4354                     PLX_ICR_BIT_EEPROM_READ) {
4355                         id |= (0x8000 >> i);
4356                         PDEBUG("eeprom_read_cmd():OR with 0x%04X\n",
4357                                (0x8000 >> i));
4358                 } else {
4359                         PDEBUG("eeprom_read_cmd():Dont't OR\n");
4360                 }
4361
4362                 /* Falling edge of the clock */
4363                 value &= ~PLX_ICR_BIT_EEPROM_CLOCK_SET;
4364                 me4000_outl(value,
4365                             ai_context->board_info->plx_regbase + PLX_ICR);
4366                 udelay(EEPROM_DELAY);
4367         }
4368
4369         /* Clear the chip select */
4370         value &= ~PLX_ICR_BIT_EEPROM_CHIP_SELECT;
4371         me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4372         udelay(EEPROM_DELAY);
4373
4374         return id;
4375 }
4376
4377 static int me4000_eeprom_write(struct me4000_eeprom *arg,
4378                                struct me4000_ai_context *ai_context)
4379 {
4380         int err;
4381         struct me4000_eeprom setup;
4382         unsigned long cmd;
4383         unsigned long date_high;
4384         unsigned long date_low;
4385
4386         CALL_PDEBUG("me4000_eeprom_write() is executed\n");
4387
4388         err = copy_from_user(&setup, arg, sizeof(setup));
4389         if (err) {
4390                 printk(KERN_ERR
4391                        "ME4000:me4000_eeprom_write():Cannot copy from user\n");
4392                 return err;
4393         }
4394
4395         /* Enable writing */
4396         eeprom_write_cmd(ai_context, ME4000_EEPROM_CMD_WRITE_ENABLE,
4397                          ME4000_EEPROM_CMD_LENGTH_WRITE_ENABLE);
4398
4399         /* Command for date */
4400         date_high = (setup.date & 0xFFFF0000) >> 16;
4401         date_low = (setup.date & 0x0000FFFF);
4402
4403         cmd =
4404             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_DATE_HIGH <<
4405                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4406                                                                      (unsigned
4407                                                                       long)
4408                                                                      date_high);
4409         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4410         if (err)
4411                 return err;
4412
4413         cmd =
4414             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_DATE_LOW <<
4415                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4416                                                                      (unsigned
4417                                                                       long)
4418                                                                      date_low);
4419         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4420         if (err)
4421                 return err;
4422
4423         /* Command for unipolar 10V offset */
4424         cmd =
4425             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_UNI_OFFSET <<
4426                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4427                                                                      (unsigned
4428                                                                       long)
4429                                                                      setup.
4430                                                                      uni_10_offset);
4431         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4432         if (err)
4433                 return err;
4434
4435         /* Command for unipolar 10V fullscale */
4436         cmd =
4437             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_UNI_FULLSCALE <<
4438                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4439                                                                      (unsigned
4440                                                                       long)
4441                                                                      setup.
4442                                                                      uni_10_fullscale);
4443         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4444         if (err)
4445                 return err;
4446
4447         /* Command for unipolar 2,5V offset */
4448         cmd =
4449             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_UNI_OFFSET <<
4450                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4451                                                                      (unsigned
4452                                                                       long)
4453                                                                      setup.
4454                                                                      uni_2_5_offset);
4455         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4456         if (err)
4457                 return err;
4458
4459         /* Command for unipolar 2,5V fullscale */
4460         cmd =
4461             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_UNI_FULLSCALE <<
4462                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4463                                                                      (unsigned
4464                                                                       long)
4465                                                                      setup.
4466                                                                      uni_2_5_fullscale);
4467         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4468         if (err)
4469                 return err;
4470
4471         /* Command for bipolar 10V offset */
4472         cmd =
4473             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_BI_OFFSET <<
4474                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4475                                                                      (unsigned
4476                                                                       long)
4477                                                                      setup.
4478                                                                      bi_10_offset);
4479         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4480         if (err)
4481                 return err;
4482
4483         /* Command for bipolar 10V fullscale */
4484         cmd =
4485             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_BI_FULLSCALE <<
4486                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4487                                                                      (unsigned
4488                                                                       long)
4489                                                                      setup.
4490                                                                      bi_10_fullscale);
4491         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4492         if (err)
4493                 return err;
4494
4495         /* Command for bipolar 2,5V offset */
4496         cmd =
4497             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_BI_OFFSET <<
4498                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4499                                                                      (unsigned
4500                                                                       long)
4501                                                                      setup.
4502                                                                      bi_2_5_offset);
4503         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4504         if (err)
4505                 return err;
4506
4507         /* Command for bipolar 2,5V fullscale */
4508         cmd =
4509             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_BI_FULLSCALE <<
4510                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4511                                                                      (unsigned
4512                                                                       long)
4513                                                                      setup.
4514                                                                      bi_2_5_fullscale);
4515         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4516         if (err)
4517                 return err;
4518
4519         /* Command for differential 10V offset */
4520         cmd =
4521             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_DIFF_OFFSET <<
4522                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4523                                                                      (unsigned
4524                                                                       long)
4525                                                                      setup.
4526                                                                      diff_10_offset);
4527         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4528         if (err)
4529                 return err;
4530
4531         /* Command for differential 10V fullscale */
4532         cmd =
4533             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_DIFF_FULLSCALE
4534                                        << ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4535                                                                         (unsigned
4536                                                                          long)
4537                                                                         setup.
4538                                                                         diff_10_fullscale);
4539         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4540         if (err)
4541                 return err;
4542
4543         /* Command for differential 2,5V offset */
4544         cmd =
4545             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_DIFF_OFFSET <<
4546                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4547                                                                      (unsigned
4548                                                                       long)
4549                                                                      setup.
4550                                                                      diff_2_5_offset);
4551         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4552         if (err)
4553                 return err;
4554
4555         /* Command for differential 2,5V fullscale */
4556         cmd =
4557             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_DIFF_FULLSCALE
4558                                        << ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4559                                                                         (unsigned
4560                                                                          long)
4561                                                                         setup.
4562                                                                         diff_2_5_fullscale);
4563         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4564         if (err)
4565                 return err;
4566
4567         /* Disable writing */
4568         eeprom_write_cmd(ai_context, ME4000_EEPROM_CMD_WRITE_DISABLE,
4569                          ME4000_EEPROM_CMD_LENGTH_WRITE_DISABLE);
4570
4571         return 0;
4572 }
4573
4574 static int me4000_eeprom_read(struct me4000_eeprom *arg,
4575                               struct me4000_ai_context *ai_context)
4576 {
4577         int err;
4578         unsigned long cmd;
4579         struct me4000_eeprom setup;
4580
4581         CALL_PDEBUG("me4000_eeprom_read() is executed\n");
4582
4583         /* Command for date */
4584         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_DATE_HIGH;
4585         setup.date =
4586             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4587         setup.date <<= 16;
4588         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_DATE_LOW;
4589         setup.date |=
4590             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4591
4592         /* Command for unipolar 10V offset */
4593         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_UNI_OFFSET;
4594         setup.uni_10_offset =
4595             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4596
4597         /* Command for unipolar 10V fullscale */
4598         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_UNI_FULLSCALE;
4599         setup.uni_10_fullscale =
4600             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4601
4602         /* Command for unipolar 2,5V offset */
4603         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_UNI_OFFSET;
4604         setup.uni_2_5_offset =
4605             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4606
4607         /* Command for unipolar 2,5V fullscale */
4608         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_UNI_FULLSCALE;
4609         setup.uni_2_5_fullscale =
4610             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4611
4612         /* Command for bipolar 10V offset */
4613         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_BI_OFFSET;
4614         setup.bi_10_offset =
4615             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4616
4617         /* Command for bipolar 10V fullscale */
4618         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_BI_FULLSCALE;
4619         setup.bi_10_fullscale =
4620             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4621
4622         /* Command for bipolar 2,5V offset */
4623         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_BI_OFFSET;
4624         setup.bi_2_5_offset =
4625             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4626
4627         /* Command for bipolar 2,5V fullscale */
4628         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_BI_FULLSCALE;
4629         setup.bi_2_5_fullscale =
4630             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4631
4632         /* Command for differntial 10V offset */
4633         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_DIFF_OFFSET;
4634         setup.diff_10_offset =
4635             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4636
4637         /* Command for differential 10V fullscale */
4638         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_DIFF_FULLSCALE;
4639         setup.diff_10_fullscale =
4640             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4641
4642         /* Command for differntial 2,5V offset */
4643         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_DIFF_OFFSET;
4644         setup.diff_2_5_offset =
4645             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4646
4647         /* Command for differential 2,5V fullscale */
4648         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_DIFF_FULLSCALE;
4649         setup.diff_2_5_fullscale =
4650             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4651
4652         err = copy_to_user(arg, &setup, sizeof(setup));
4653         if (err) {
4654                 printk(KERN_ERR
4655                        "ME4000:me4000_eeprom_read():Cannot copy to user\n");
4656                 return err;
4657         }
4658
4659         return 0;
4660 }
4661
4662 /*------------------------------------ DIO stuff ----------------------------------------------*/
4663
4664 static int me4000_dio_ioctl(struct inode *inode_p, struct file *file_p,
4665                             unsigned int service, unsigned long arg)
4666 {
4667         struct me4000_dio_context *dio_context;
4668
4669         CALL_PDEBUG("me4000_dio_ioctl() is executed\n");
4670
4671         dio_context = file_p->private_data;
4672
4673         if (_IOC_TYPE(service) != ME4000_MAGIC) {
4674                 printk(KERN_ERR "me4000_dio_ioctl():Wrong magic number\n");
4675                 return -ENOTTY;
4676         }
4677         if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
4678                 printk(KERN_ERR "me4000_dio_ioctl():Service number to high\n");
4679                 return -ENOTTY;
4680         }
4681
4682         switch (service) {
4683         case ME4000_DIO_CONFIG:
4684                 return me4000_dio_config((struct me4000_dio_config *)arg,
4685                                          dio_context);
4686         case ME4000_DIO_SET_BYTE:
4687                 return me4000_dio_set_byte((struct me4000_dio_byte *)arg,
4688                                            dio_context);
4689         case ME4000_DIO_GET_BYTE:
4690                 return me4000_dio_get_byte((struct me4000_dio_byte *)arg,
4691                                            dio_context);
4692         case ME4000_DIO_RESET:
4693                 return me4000_dio_reset(dio_context);
4694         default:
4695                 printk(KERN_ERR
4696                        "ME4000:me4000_dio_ioctl():Invalid service number %d\n",
4697                        service);
4698                 return -ENOTTY;
4699         }
4700         return 0;
4701 }
4702
4703 static int me4000_dio_config(struct me4000_dio_config *arg,
4704                              struct me4000_dio_context *dio_context)
4705 {
4706         struct me4000_dio_config cmd;
4707         u32 tmp;
4708         int err;
4709
4710         CALL_PDEBUG("me4000_dio_config() is executed\n");
4711
4712         /* Copy data from user */
4713         err = copy_from_user(&cmd, arg, sizeof(struct me4000_dio_config));
4714         if (err) {
4715                 printk(KERN_ERR
4716                        "ME4000:me4000_dio_config():Can't copy from user space\n");
4717                 return -EFAULT;
4718         }
4719
4720         /* Check port parameter */
4721         if (cmd.port >= dio_context->dio_count) {
4722                 printk(KERN_ERR
4723                        "ME4000:me4000_dio_config():Port %d is not available\n",
4724                        cmd.port);
4725                 return -EINVAL;
4726         }
4727
4728         PDEBUG("me4000_dio_config(): port %d, mode %d, function %d\n", cmd.port,
4729                cmd.mode, cmd.function);
4730
4731         if (cmd.port == ME4000_DIO_PORT_A) {
4732                 if (cmd.mode == ME4000_DIO_PORT_INPUT) {
4733                         /* Check if opto isolated version */
4734                         if (!(me4000_inl(dio_context->dir_reg) & 0x1)) {
4735                                 printk(KERN_ERR
4736                                        "ME4000:me4000_dio_config():Cannot set to input on opto isolated versions\n");
4737                                 return -EIO;
4738                         }
4739
4740                         tmp = me4000_inl(dio_context->ctrl_reg);
4741                         tmp &=
4742                             ~(ME4000_DIO_CTRL_BIT_MODE_0 |
4743                               ME4000_DIO_CTRL_BIT_MODE_1);
4744                         me4000_outl(tmp, dio_context->ctrl_reg);
4745                 } else if (cmd.mode == ME4000_DIO_PORT_OUTPUT) {
4746                         tmp = me4000_inl(dio_context->ctrl_reg);
4747                         tmp &=
4748                             ~(ME4000_DIO_CTRL_BIT_MODE_0 |
4749                               ME4000_DIO_CTRL_BIT_MODE_1);
4750                         tmp |= ME4000_DIO_CTRL_BIT_MODE_0;
4751                         me4000_outl(tmp, dio_context->ctrl_reg);
4752                 } else if (cmd.mode == ME4000_DIO_FIFO_LOW) {
4753                         tmp = me4000_inl(dio_context->ctrl_reg);
4754                         tmp &=
4755                             ~(ME4000_DIO_CTRL_BIT_MODE_0 |
4756                               ME4000_DIO_CTRL_BIT_MODE_1 |
4757                               ME4000_DIO_CTRL_BIT_FIFO_HIGH_0);
4758                         tmp |=
4759                             ME4000_DIO_CTRL_BIT_MODE_0 |
4760                             ME4000_DIO_CTRL_BIT_MODE_1;
4761                         me4000_outl(tmp, dio_context->ctrl_reg);
4762                 } else if (cmd.mode == ME4000_DIO_FIFO_HIGH) {
4763                         tmp = me4000_inl(dio_context->ctrl_reg);
4764                         tmp |=
4765                             ME4000_DIO_CTRL_BIT_MODE_0 |
4766                             ME4000_DIO_CTRL_BIT_MODE_1 |
4767                             ME4000_DIO_CTRL_BIT_FIFO_HIGH_0;
4768                         me4000_outl(tmp, dio_context->ctrl_reg);
4769                 } else {
4770                         printk(KERN_ERR
4771                                "ME4000:me4000_dio_config():Mode %d is not available\n",
4772                                cmd.mode);
4773                         return -EINVAL;
4774                 }
4775         } else if (cmd.port == ME4000_DIO_PORT_B) {
4776                 if (cmd.mode == ME4000_DIO_PORT_INPUT) {
4777                         /* Only do anything when TTL version is installed */
4778                         if ((me4000_inl(dio_context->dir_reg) & 0x1)) {
4779                                 tmp = me4000_inl(dio_context->ctrl_reg);
4780                                 tmp &=
4781                                     ~(ME4000_DIO_CTRL_BIT_MODE_2 |
4782                                       ME4000_DIO_CTRL_BIT_MODE_3);
4783                                 me4000_outl(tmp, dio_context->ctrl_reg);
4784                         }
4785                 } else if (cmd.mode == ME4000_DIO_PORT_OUTPUT) {
4786                         /* Check if opto isolated version */
4787                         if (!(me4000_inl(dio_context->dir_reg) & 0x1)) {
4788                                 printk(KERN_ERR
4789                                        "ME4000:me4000_dio_config():Cannot set to output on opto isolated versions\n");
4790                                 return -EIO;
4791                         }
4792
4793                         tmp = me4000_inl(dio_context->ctrl_reg);
4794                         tmp &=
4795                             ~(ME4000_DIO_CTRL_BIT_MODE_2 |
4796                               ME4000_DIO_CTRL_BIT_MODE_3);
4797                         tmp |= ME4000_DIO_CTRL_BIT_MODE_2;
4798                         me4000_outl(tmp, dio_context->ctrl_reg);
4799                 } else if (cmd.mode == ME4000_DIO_FIFO_LOW) {
4800                         /* Check if opto isolated version */
4801                         if (!(me4000_inl(dio_context->dir_reg) & 0x1)) {
4802                                 printk(KERN_ERR
4803                                        "ME4000:me4000_dio_config():Cannot set to FIFO low output on opto isolated versions\n");
4804                                 return -EIO;
4805                         }
4806
4807                         tmp = me4000_inl(dio_context->ctrl_reg);
4808                         tmp &=
4809                             ~(ME4000_DIO_CTRL_BIT_MODE_2 |
4810                               ME4000_DIO_CTRL_BIT_MODE_3 |
4811                               ME4000_DIO_CTRL_BIT_FIFO_HIGH_1);
4812                         tmp |=
4813                             ME4000_DIO_CTRL_BIT_MODE_2 |
4814                             ME4000_DIO_CTRL_BIT_MODE_3;
4815                         me4000_outl(tmp, dio_context->ctrl_reg);
4816                 } else if (cmd.mode == ME4000_DIO_FIFO_HIGH) {
4817                         /* Check if opto isolated version */
4818                         if (!(me4000_inl(dio_context->dir_reg) & 0x1)) {
4819                                 printk(KERN_ERR
4820                                        "ME4000:me4000_dio_config():Cannot set to FIFO high output on opto isolated versions\n");
4821                                 return -EIO;
4822                         }
4823
4824                         tmp = me4000_inl(dio_context->ctrl_reg);
4825                         tmp |=
4826                             ME4000_DIO_CTRL_BIT_MODE_2 |
4827                             ME4000_DIO_CTRL_BIT_MODE_3 |
4828                             ME4000_DIO_CTRL_BIT_FIFO_HIGH_1;
4829                         me4000_outl(tmp, dio_context->ctrl_reg);
4830                 } else {
4831                         printk(KERN_ERR
4832                                "ME4000:me4000_dio_config():Mode %d is not available\n",
4833                                cmd.mode);
4834                         return -EINVAL;
4835                 }
4836         } else if (cmd.port == ME4000_DIO_PORT_C) {
4837                 if (cmd.mode == ME4000_DIO_PORT_INPUT) {
4838                         tmp = me4000_inl(dio_context->ctrl_reg);
4839                         tmp &=
4840                             ~(ME4000_DIO_CTRL_BIT_MODE_4 |
4841                               ME4000_DIO_CTRL_BIT_MODE_5);
4842                         me4000_outl(tmp, dio_context->ctrl_reg);
4843                 } else if (cmd.mode == ME4000_DIO_PORT_OUTPUT) {
4844                         tmp = me4000_inl(dio_context->ctrl_reg);
4845                         tmp &=
4846                             ~(ME4000_DIO_CTRL_BIT_MODE_4 |
4847                               ME4000_DIO_CTRL_BIT_MODE_5);
4848                         tmp |= ME4000_DIO_CTRL_BIT_MODE_4;
4849                         me4000_outl(tmp, dio_context->ctrl_reg);
4850                 } else if (cmd.mode == ME4000_DIO_FIFO_LOW) {
4851                         tmp = me4000_inl(dio_context->ctrl_reg);
4852                         tmp &=
4853                             ~(ME4000_DIO_CTRL_BIT_MODE_4 |
4854                               ME4000_DIO_CTRL_BIT_MODE_5 |
4855                               ME4000_DIO_CTRL_BIT_FIFO_HIGH_2);
4856                         tmp |=
4857                             ME4000_DIO_CTRL_BIT_MODE_4 |
4858                             ME4000_DIO_CTRL_BIT_MODE_5;
4859                         me4000_outl(tmp, dio_context->ctrl_reg);
4860                 } else if (cmd.mode == ME4000_DIO_FIFO_HIGH) {
4861                         tmp = me4000_inl(dio_context->ctrl_reg);
4862                         tmp |=
4863                             ME4000_DIO_CTRL_BIT_MODE_4 |
4864                             ME4000_DIO_CTRL_BIT_MODE_5 |
4865                             ME4000_DIO_CTRL_BIT_FIFO_HIGH_2;
4866                         me4000_outl(tmp, dio_context->ctrl_reg);
4867                 } else {
4868                         printk(KERN_ERR
4869                                "ME4000:me4000_dio_config():Mode %d is not available\n",
4870                                cmd.mode);
4871                         return -EINVAL;
4872                 }
4873         } else if (cmd.port == ME4000_DIO_PORT_D) {
4874                 if (cmd.mode == ME4000_DIO_PORT_INPUT) {
4875                         tmp = me4000_inl(dio_context->ctrl_reg);
4876                         tmp &=
4877                             ~(ME4000_DIO_CTRL_BIT_MODE_6 |
4878                               ME4000_DIO_CTRL_BIT_MODE_7);
4879                         me4000_outl(tmp, dio_context->ctrl_reg);
4880                 } else if (cmd.mode == ME4000_DIO_PORT_OUTPUT) {
4881                         tmp = me4000_inl(dio_context->ctrl_reg);
4882                         tmp &=
4883                             ~(ME4000_DIO_CTRL_BIT_MODE_6 |
4884                               ME4000_DIO_CTRL_BIT_MODE_7);
4885                         tmp |= ME4000_DIO_CTRL_BIT_MODE_6;
4886                         me4000_outl(tmp, dio_context->ctrl_reg);
4887                 } else if (cmd.mode == ME4000_DIO_FIFO_LOW) {
4888                         tmp = me4000_inl(dio_context->ctrl_reg);
4889                         tmp &=
4890                             ~(ME4000_DIO_CTRL_BIT_MODE_6 |
4891                               ME4000_DIO_CTRL_BIT_MODE_7 |
4892                               ME4000_DIO_CTRL_BIT_FIFO_HIGH_3);
4893                         tmp |=
4894                             ME4000_DIO_CTRL_BIT_MODE_6 |
4895                             ME4000_DIO_CTRL_BIT_MODE_7;
4896                         me4000_outl(tmp, dio_context->ctrl_reg);
4897                 } else if (cmd.mode == ME4000_DIO_FIFO_HIGH) {
4898                         tmp = me4000_inl(dio_context->ctrl_reg);
4899                         tmp |=
4900                             ME4000_DIO_CTRL_BIT_MODE_6 |
4901                             ME4000_DIO_CTRL_BIT_MODE_7 |
4902                             ME4000_DIO_CTRL_BIT_FIFO_HIGH_3;
4903                         me4000_outl(tmp, dio_context->ctrl_reg);
4904                 } else {
4905                         printk(KERN_ERR
4906                                "ME4000:me4000_dio_config():Mode %d is not available\n",
4907                                cmd.mode);
4908                         return -EINVAL;
4909                 }
4910         } else {
4911                 printk(KERN_ERR
4912                        "ME4000:me4000_dio_config():Port %d is not available\n",
4913                        cmd.port);
4914                 return -EINVAL;
4915         }
4916
4917         PDEBUG("me4000_dio_config(): port %d, mode %d, function %d\n", cmd.port,
4918                cmd.mode, cmd.function);
4919
4920         if ((cmd.mode == ME4000_DIO_FIFO_HIGH)
4921             || (cmd.mode == ME4000_DIO_FIFO_LOW)) {
4922                 tmp = me4000_inl(dio_context->ctrl_reg);
4923                 tmp &=
4924                     ~(ME4000_DIO_CTRL_BIT_FUNCTION_0 |
4925                       ME4000_DIO_CTRL_BIT_FUNCTION_1);
4926                 if (cmd.function == ME4000_DIO_FUNCTION_PATTERN) {
4927                         me4000_outl(tmp, dio_context->ctrl_reg);
4928                 } else if (cmd.function == ME4000_DIO_FUNCTION_DEMUX) {
4929                         tmp |= ME4000_DIO_CTRL_BIT_FUNCTION_0;
4930                         me4000_outl(tmp, dio_context->ctrl_reg);
4931                 } else if (cmd.function == ME4000_DIO_FUNCTION_MUX) {
4932                         tmp |= ME4000_DIO_CTRL_BIT_FUNCTION_1;
4933                         me4000_outl(tmp, dio_context->ctrl_reg);
4934                 } else {
4935                         printk(KERN_ERR
4936                                "ME4000:me4000_dio_config():Invalid port function specified\n");
4937                         return -EINVAL;
4938                 }
4939         }
4940
4941         return 0;
4942 }
4943
4944 static int me4000_dio_set_byte(struct me4000_dio_byte *arg,
4945                                struct me4000_dio_context *dio_context)
4946 {
4947         struct me4000_dio_byte cmd;
4948         int err;
4949
4950         CALL_PDEBUG("me4000_dio_set_byte() is executed\n");
4951
4952         /* Copy data from user */
4953         err = copy_from_user(&cmd, arg, sizeof(struct me4000_dio_byte));
4954         if (err) {
4955                 printk(KERN_ERR
4956                        "ME4000:me4000_dio_set_byte():Can't copy from user space\n");
4957                 return -EFAULT;
4958         }
4959
4960         /* Check port parameter */
4961         if (cmd.port >= dio_context->dio_count) {
4962                 printk(KERN_ERR
4963                        "ME4000:me4000_dio_set_byte():Port %d is not available\n",
4964                        cmd.port);
4965                 return -EINVAL;
4966         }
4967
4968         if (cmd.port == ME4000_DIO_PORT_A) {
4969                 if ((me4000_inl(dio_context->ctrl_reg) & 0x3) != 0x1) {
4970                         printk(KERN_ERR
4971                                "ME4000:me4000_dio_set_byte():Port %d is not in output mode\n",
4972                                cmd.port);
4973                         return -EIO;
4974                 }
4975                 me4000_outl(cmd.byte, dio_context->port_0_reg);
4976         } else if (cmd.port == ME4000_DIO_PORT_B) {
4977                 if ((me4000_inl(dio_context->ctrl_reg) & 0xC) != 0x4) {
4978                         printk(KERN_ERR
4979                                "ME4000:me4000_dio_set_byte():Port %d is not in output mode\n",
4980                                cmd.port);
4981                         return -EIO;
4982                 }
4983                 me4000_outl(cmd.byte, dio_context->port_1_reg);
4984         } else if (cmd.port == ME4000_DIO_PORT_C) {
4985                 if ((me4000_inl(dio_context->ctrl_reg) & 0x30) != 0x10) {
4986                         printk(KERN_ERR
4987                                "ME4000:me4000_dio_set_byte():Port %d is not in output mode\n",
4988                                cmd.port);
4989                         return -EIO;
4990                 }
4991                 me4000_outl(cmd.byte, dio_context->port_2_reg);
4992         } else if (cmd.port == ME4000_DIO_PORT_D) {
4993                 if ((me4000_inl(dio_context->ctrl_reg) & 0xC0) != 0x40) {
4994                         printk(KERN_ERR
4995                                "ME4000:me4000_dio_set_byte():Port %d is not in output mode\n",
4996                                cmd.port);
4997                         return -EIO;
4998                 }
4999                 me4000_outl(cmd.byte, dio_context->port_3_reg);
5000         } else {
5001                 printk(KERN_ERR
5002                        "ME4000:me4000_dio_set_byte():Port %d is not available\n",
5003                        cmd.port);
5004                 return -EINVAL;
5005         }
5006
5007         return 0;
5008 }
5009
5010 static int me4000_dio_get_byte(struct me4000_dio_byte *arg,
5011                                struct me4000_dio_context *dio_context)
5012 {
5013         struct me4000_dio_byte cmd;
5014         int err;
5015
5016         CALL_PDEBUG("me4000_dio_get_byte() is executed\n");
5017
5018         /* Copy data from user */
5019         err = copy_from_user(&cmd, arg, sizeof(struct me4000_dio_byte));
5020         if (err) {
5021                 printk(KERN_ERR
5022                        "ME4000:me4000_dio_get_byte():Can't copy from user space\n");
5023                 return -EFAULT;
5024         }
5025
5026         /* Check port parameter */
5027         if (cmd.port >= dio_context->dio_count) {
5028                 printk(KERN_ERR
5029                        "ME4000:me4000_dio_get_byte():Port %d is not available\n",
5030                        cmd.port);
5031                 return -EINVAL;
5032         }
5033
5034         if (cmd.port == ME4000_DIO_PORT_A) {
5035                 cmd.byte = me4000_inl(dio_context->port_0_reg) & 0xFF;
5036         } else if (cmd.port == ME4000_DIO_PORT_B) {
5037                 cmd.byte = me4000_inl(dio_context->port_1_reg) & 0xFF;
5038         } else if (cmd.port == ME4000_DIO_PORT_C) {
5039                 cmd.byte = me4000_inl(dio_context->port_2_reg) & 0xFF;
5040         } else if (cmd.port == ME4000_DIO_PORT_D) {
5041                 cmd.byte = me4000_inl(dio_context->port_3_reg) & 0xFF;
5042         } else {
5043                 printk(KERN_ERR
5044                        "ME4000:me4000_dio_get_byte():Port %d is not available\n",
5045                        cmd.port);
5046                 return -EINVAL;
5047         }
5048
5049         /* Copy result back to user */
5050         err = copy_to_user(arg, &cmd, sizeof(struct me4000_dio_byte));
5051         if (err) {
5052                 printk(KERN_ERR
5053                        "ME4000:me4000_dio_get_byte():Can't copy to user space\n");
5054                 return -EFAULT;
5055         }
5056
5057         return 0;
5058 }
5059
5060 static int me4000_dio_reset(struct me4000_dio_context *dio_context)
5061 {
5062         CALL_PDEBUG("me4000_dio_reset() is executed\n");
5063
5064         /* Clear the control register */
5065         me4000_outl(0, dio_context->ctrl_reg);
5066
5067         /* Check for opto isolated version */
5068         if (!(me4000_inl(dio_context->dir_reg) & 0x1)) {
5069                 me4000_outl(0x1, dio_context->ctrl_reg);
5070                 me4000_outl(0x0, dio_context->port_0_reg);
5071         }
5072
5073         return 0;
5074 }
5075
5076 /*------------------------------------ COUNTER STUFF ------------------------------------*/
5077
5078 static int me4000_cnt_ioctl(struct inode *inode_p, struct file *file_p,
5079                             unsigned int service, unsigned long arg)
5080 {
5081         struct me4000_cnt_context *cnt_context;
5082
5083         CALL_PDEBUG("me4000_cnt_ioctl() is executed\n");
5084
5085         cnt_context = file_p->private_data;
5086
5087         if (_IOC_TYPE(service) != ME4000_MAGIC) {
5088                 printk(KERN_ERR "me4000_dio_ioctl():Wrong magic number\n");
5089                 return -ENOTTY;
5090         }
5091         if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
5092                 printk(KERN_ERR "me4000_dio_ioctl():Service number to high\n");
5093                 return -ENOTTY;
5094         }
5095
5096         switch (service) {
5097         case ME4000_CNT_READ:
5098                 return me4000_cnt_read((struct me4000_cnt *)arg, cnt_context);
5099         case ME4000_CNT_WRITE:
5100                 return me4000_cnt_write((struct me4000_cnt *)arg, cnt_context);
5101         case ME4000_CNT_CONFIG:
5102                 return me4000_cnt_config((struct me4000_cnt_config *)arg,
5103                                          cnt_context);
5104         case ME4000_CNT_RESET:
5105                 return me4000_cnt_reset(cnt_context);
5106         default:
5107                 printk(KERN_ERR
5108                        "ME4000:me4000_dio_ioctl():Invalid service number %d\n",
5109                        service);
5110                 return -ENOTTY;
5111         }
5112         return 0;
5113 }
5114
5115 static int me4000_cnt_config(struct me4000_cnt_config *arg,
5116                              struct me4000_cnt_context *cnt_context)
5117 {
5118         struct me4000_cnt_config cmd;
5119         u8 counter;
5120         u8 mode;
5121         int err;
5122
5123         CALL_PDEBUG("me4000_cnt_config() is executed\n");
5124
5125         /* Copy data from user */
5126         err = copy_from_user(&cmd, arg, sizeof(struct me4000_cnt_config));
5127         if (err) {
5128                 printk(KERN_ERR
5129                        "ME4000:me4000_cnt_config():Can't copy from user space\n");
5130                 return -EFAULT;
5131         }
5132
5133         /* Check counter parameter */
5134         switch (cmd.counter) {
5135         case ME4000_CNT_COUNTER_0:
5136                 counter = ME4000_CNT_CTRL_BIT_COUNTER_0;
5137                 break;
5138         case ME4000_CNT_COUNTER_1:
5139                 counter = ME4000_CNT_CTRL_BIT_COUNTER_1;
5140                 break;
5141         case ME4000_CNT_COUNTER_2:
5142                 counter = ME4000_CNT_CTRL_BIT_COUNTER_2;
5143                 break;
5144         default:
5145                 printk(KERN_ERR
5146                        "ME4000:me4000_cnt_config():Counter %d is not available\n",
5147                        cmd.counter);
5148                 return -EINVAL;
5149         }
5150
5151         /* Check mode parameter */
5152         switch (cmd.mode) {
5153         case ME4000_CNT_MODE_0:
5154                 mode = ME4000_CNT_CTRL_BIT_MODE_0;
5155                 break;
5156         case ME4000_CNT_MODE_1:
5157                 mode = ME4000_CNT_CTRL_BIT_MODE_1;
5158                 break;
5159         case ME4000_CNT_MODE_2:
5160                 mode = ME4000_CNT_CTRL_BIT_MODE_2;
5161                 break;
5162         case ME4000_CNT_MODE_3:
5163                 mode = ME4000_CNT_CTRL_BIT_MODE_3;
5164                 break;
5165         case ME4000_CNT_MODE_4:
5166                 mode = ME4000_CNT_CTRL_BIT_MODE_4;
5167                 break;
5168         case ME4000_CNT_MODE_5:
5169                 mode = ME4000_CNT_CTRL_BIT_MODE_5;
5170                 break;
5171         default:
5172                 printk(KERN_ERR
5173                        "ME4000:me4000_cnt_config():Mode %d is not available\n",
5174                        cmd.mode);
5175                 return -EINVAL;
5176         }
5177
5178         /* Write the control word */
5179         me4000_outb((counter | mode | 0x30), cnt_context->ctrl_reg);
5180
5181         return 0;
5182 }
5183
5184 static int me4000_cnt_read(struct me4000_cnt *arg,
5185                            struct me4000_cnt_context *cnt_context)
5186 {
5187         struct me4000_cnt cmd;
5188         u8 tmp;
5189         int err;
5190
5191         CALL_PDEBUG("me4000_cnt_read() is executed\n");
5192
5193         /* Copy data from user */
5194         err = copy_from_user(&cmd, arg, sizeof(struct me4000_cnt));
5195         if (err) {
5196                 printk(KERN_ERR
5197                        "ME4000:me4000_cnt_read():Can't copy from user space\n");
5198                 return -EFAULT;
5199         }
5200
5201         /* Read counter */
5202         switch (cmd.counter) {
5203         case ME4000_CNT_COUNTER_0:
5204                 tmp = me4000_inb(cnt_context->counter_0_reg);
5205                 cmd.value = tmp;
5206                 tmp = me4000_inb(cnt_context->counter_0_reg);
5207                 cmd.value |= ((u16) tmp) << 8;
5208                 break;
5209         case ME4000_CNT_COUNTER_1:
5210                 tmp = me4000_inb(cnt_context->counter_1_reg);
5211                 cmd.value = tmp;
5212                 tmp = me4000_inb(cnt_context->counter_1_reg);
5213                 cmd.value |= ((u16) tmp) << 8;
5214                 break;
5215         case ME4000_CNT_COUNTER_2:
5216                 tmp = me4000_inb(cnt_context->counter_2_reg);
5217                 cmd.value = tmp;
5218                 tmp = me4000_inb(cnt_context->counter_2_reg);
5219                 cmd.value |= ((u16) tmp) << 8;
5220                 break;
5221         default:
5222                 printk(KERN_ERR
5223                        "ME4000:me4000_cnt_read():Counter %d is not available\n",
5224                        cmd.counter);
5225                 return -EINVAL;
5226         }
5227
5228         /* Copy result back to user */
5229         err = copy_to_user(arg, &cmd, sizeof(struct me4000_cnt));
5230         if (err) {
5231                 printk(KERN_ERR
5232                        "ME4000:me4000_cnt_read():Can't copy to user space\n");
5233                 return -EFAULT;
5234         }
5235
5236         return 0;
5237 }
5238
5239 static int me4000_cnt_write(struct me4000_cnt *arg,
5240                             struct me4000_cnt_context *cnt_context)
5241 {
5242         struct me4000_cnt cmd;
5243         u8 tmp;
5244         int err;
5245
5246         CALL_PDEBUG("me4000_cnt_write() is executed\n");
5247
5248         /* Copy data from user */
5249         err = copy_from_user(&cmd, arg, sizeof(struct me4000_cnt));
5250         if (err) {
5251                 printk(KERN_ERR
5252                        "ME4000:me4000_cnt_write():Can't copy from user space\n");
5253                 return -EFAULT;
5254         }
5255
5256         /* Write counter */
5257         switch (cmd.counter) {
5258         case ME4000_CNT_COUNTER_0:
5259                 tmp = cmd.value & 0xFF;
5260                 me4000_outb(tmp, cnt_context->counter_0_reg);
5261                 tmp = (cmd.value >> 8) & 0xFF;
5262                 me4000_outb(tmp, cnt_context->counter_0_reg);
5263                 break;
5264         case ME4000_CNT_COUNTER_1:
5265                 tmp = cmd.value & 0xFF;
5266                 me4000_outb(tmp, cnt_context->counter_1_reg);
5267                 tmp = (cmd.value >> 8) & 0xFF;
5268                 me4000_outb(tmp, cnt_context->counter_1_reg);
5269                 break;
5270         case ME4000_CNT_COUNTER_2:
5271                 tmp = cmd.value & 0xFF;
5272                 me4000_outb(tmp, cnt_context->counter_2_reg);
5273                 tmp = (cmd.value >> 8) & 0xFF;
5274                 me4000_outb(tmp, cnt_context->counter_2_reg);
5275                 break;
5276         default:
5277                 printk(KERN_ERR
5278                        "ME4000:me4000_cnt_write():Counter %d is not available\n",
5279                        cmd.counter);
5280                 return -EINVAL;
5281         }
5282
5283         return 0;
5284 }
5285
5286 static int me4000_cnt_reset(struct me4000_cnt_context *cnt_context)
5287 {
5288         CALL_PDEBUG("me4000_cnt_reset() is executed\n");
5289
5290         /* Set the mode and value for counter 0 */
5291         me4000_outb(0x30, cnt_context->ctrl_reg);
5292         me4000_outb(0x00, cnt_context->counter_0_reg);
5293         me4000_outb(0x00, cnt_context->counter_0_reg);
5294
5295         /* Set the mode and value for counter 1 */
5296         me4000_outb(0x70, cnt_context->ctrl_reg);
5297         me4000_outb(0x00, cnt_context->counter_1_reg);
5298         me4000_outb(0x00, cnt_context->counter_1_reg);
5299
5300         /* Set the mode and value for counter 2 */
5301         me4000_outb(0xB0, cnt_context->ctrl_reg);
5302         me4000_outb(0x00, cnt_context->counter_2_reg);
5303         me4000_outb(0x00, cnt_context->counter_2_reg);
5304
5305         return 0;
5306 }
5307
5308 /*------------------------------------ External Interrupt stuff ------------------------------------*/
5309
5310 static int me4000_ext_int_ioctl(struct inode *inode_p, struct file *file_p,
5311                                 unsigned int service, unsigned long arg)
5312 {
5313         struct me4000_ext_int_context *ext_int_context;
5314
5315         CALL_PDEBUG("me4000_ext_int_ioctl() is executed\n");
5316
5317         ext_int_context = file_p->private_data;
5318
5319         if (_IOC_TYPE(service) != ME4000_MAGIC) {
5320                 printk(KERN_ERR "me4000_ext_int_ioctl():Wrong magic number\n");
5321                 return -ENOTTY;
5322         }
5323         if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
5324                 printk(KERN_ERR
5325                        "me4000_ext_int_ioctl():Service number to high\n");
5326                 return -ENOTTY;
5327         }
5328
5329         switch (service) {
5330         case ME4000_EXT_INT_ENABLE:
5331                 return me4000_ext_int_enable(ext_int_context);
5332         case ME4000_EXT_INT_DISABLE:
5333                 return me4000_ext_int_disable(ext_int_context);
5334         case ME4000_EXT_INT_COUNT:
5335                 return me4000_ext_int_count((unsigned long *)arg,
5336                                             ext_int_context);
5337         default:
5338                 printk(KERN_ERR
5339                        "ME4000:me4000_ext_int_ioctl():Invalid service number %d\n",
5340                        service);
5341                 return -ENOTTY;
5342         }
5343         return 0;
5344 }
5345
5346 static int me4000_ext_int_enable(struct me4000_ext_int_context *ext_int_context)
5347 {
5348         unsigned long tmp;
5349
5350         CALL_PDEBUG("me4000_ext_int_enable() is executed\n");
5351
5352         tmp = me4000_inl(ext_int_context->ctrl_reg);
5353         tmp |= ME4000_AI_CTRL_BIT_EX_IRQ;
5354         me4000_outl(tmp, ext_int_context->ctrl_reg);
5355
5356         return 0;
5357 }
5358
5359 static int me4000_ext_int_disable(struct me4000_ext_int_context *ext_int_context)
5360 {
5361         unsigned long tmp;
5362
5363         CALL_PDEBUG("me4000_ext_int_disable() is executed\n");
5364
5365         tmp = me4000_inl(ext_int_context->ctrl_reg);
5366         tmp &= ~ME4000_AI_CTRL_BIT_EX_IRQ;
5367         me4000_outl(tmp, ext_int_context->ctrl_reg);
5368
5369         return 0;
5370 }
5371
5372 static int me4000_ext_int_count(unsigned long *arg,
5373                                 struct me4000_ext_int_context *ext_int_context)
5374 {
5375
5376         CALL_PDEBUG("me4000_ext_int_count() is executed\n");
5377
5378         put_user(ext_int_context->int_count, arg);
5379         return 0;
5380 }
5381
5382 /*------------------------------------ General stuff ------------------------------------*/
5383
5384 static int me4000_get_user_info(struct me4000_user_info *arg,
5385                                 struct me4000_info *board_info)
5386 {
5387         struct me4000_user_info user_info;
5388
5389         CALL_PDEBUG("me4000_get_user_info() is executed\n");
5390
5391         user_info.board_count = board_info->board_count;
5392         user_info.plx_regbase = board_info->plx_regbase;
5393         user_info.plx_regbase_size = board_info->plx_regbase_size;
5394         user_info.me4000_regbase = board_info->me4000_regbase;
5395         user_info.me4000_regbase_size = board_info->me4000_regbase_size;
5396         user_info.serial_no = board_info->serial_no;
5397         user_info.hw_revision = board_info->hw_revision;
5398         user_info.vendor_id = board_info->vendor_id;
5399         user_info.device_id = board_info->device_id;
5400         user_info.pci_bus_no = board_info->pci_bus_no;
5401         user_info.pci_dev_no = board_info->pci_dev_no;
5402         user_info.pci_func_no = board_info->pci_func_no;
5403         user_info.irq = board_info->irq;
5404         user_info.irq_count = board_info->irq_count;
5405         user_info.driver_version = ME4000_DRIVER_VERSION;
5406         user_info.ao_count = board_info->board_p->ao.count;
5407         user_info.ao_fifo_count = board_info->board_p->ao.fifo_count;
5408
5409         user_info.ai_count = board_info->board_p->ai.count;
5410         user_info.ai_sh_count = board_info->board_p->ai.sh_count;
5411         user_info.ai_ex_trig_analog = board_info->board_p->ai.ex_trig_analog;
5412
5413         user_info.dio_count = board_info->board_p->dio.count;
5414
5415         user_info.cnt_count = board_info->board_p->cnt.count;
5416
5417         if (copy_to_user(arg, &user_info, sizeof(struct me4000_user_info)))
5418                 return -EFAULT;
5419
5420         return 0;
5421 }
5422
5423 /*------------------------------------ ISR STUFF ------------------------------------*/
5424
5425 static int me4000_ext_int_fasync(int fd, struct file *file_ptr, int mode)
5426 {
5427         int result = 0;
5428         struct me4000_ext_int_context *ext_int_context;
5429
5430         CALL_PDEBUG("me4000_ext_int_fasync() is executed\n");
5431
5432         ext_int_context = file_ptr->private_data;
5433
5434         result =
5435             fasync_helper(fd, file_ptr, mode, &ext_int_context->fasync_ptr);
5436
5437         CALL_PDEBUG("me4000_ext_int_fasync() is leaved\n");
5438         return result;
5439 }
5440
5441 static irqreturn_t me4000_ao_isr(int irq, void *dev_id)
5442 {
5443         u32 tmp;
5444         u32 value;
5445         struct me4000_ao_context *ao_context;
5446         int i;
5447         int c = 0;
5448         int c1 = 0;
5449         //unsigned long before;
5450         //unsigned long after;
5451
5452         ISR_PDEBUG("me4000_ao_isr() is executed\n");
5453
5454         ao_context = dev_id;
5455
5456         /* Check if irq number is right */
5457         if (irq != ao_context->irq) {
5458                 ISR_PDEBUG("me4000_ao_isr():incorrect interrupt num: %d\n",
5459                            irq);
5460                 return IRQ_NONE;
5461         }
5462
5463         /* Check if this DAC rised an interrupt */
5464         if (!
5465             ((0x1 << (ao_context->index + 3)) &
5466              me4000_inl(ao_context->irq_status_reg))) {
5467                 ISR_PDEBUG("me4000_ao_isr():Not this DAC\n");
5468                 return IRQ_NONE;
5469         }
5470
5471         /* Read status register to find out what happened */
5472         tmp = me4000_inl(ao_context->status_reg);
5473
5474         if (!(tmp & ME4000_AO_STATUS_BIT_EF) && (tmp & ME4000_AO_STATUS_BIT_HF)
5475             && (tmp & ME4000_AO_STATUS_BIT_HF)) {
5476                 c = ME4000_AO_FIFO_COUNT;
5477                 ISR_PDEBUG("me4000_ao_isr():Fifo empty\n");
5478         } else if ((tmp & ME4000_AO_STATUS_BIT_EF)
5479                    && (tmp & ME4000_AO_STATUS_BIT_HF)
5480                    && (tmp & ME4000_AO_STATUS_BIT_HF)) {
5481                 c = ME4000_AO_FIFO_COUNT / 2;
5482                 ISR_PDEBUG("me4000_ao_isr():Fifo under half full\n");
5483         } else {
5484                 c = 0;
5485                 ISR_PDEBUG("me4000_ao_isr():Fifo full\n");
5486         }
5487
5488         ISR_PDEBUG("me4000_ao_isr():Try to write 0x%04X values\n", c);
5489
5490         while (1) {
5491                 c1 = me4000_values_to_end(ao_context->circ_buf,
5492                                           ME4000_AO_BUFFER_COUNT);
5493                 ISR_PDEBUG("me4000_ao_isr():Values to end = %d\n", c1);
5494                 if (c1 > c)
5495                         c1 = c;
5496
5497                 if (c1 <= 0) {
5498                         ISR_PDEBUG
5499                             ("me4000_ao_isr():Work done or buffer empty\n");
5500                         break;
5501                 }
5502                 //rdtscl(before);
5503                 if (((ao_context->fifo_reg & 0xFF) == ME4000_AO_01_FIFO_REG) ||
5504                     ((ao_context->fifo_reg & 0xFF) == ME4000_AO_03_FIFO_REG)) {
5505                         for (i = 0; i < c1; i++) {
5506                                 value =
5507                                     ((u32)
5508                                      (*
5509                                       (ao_context->circ_buf.buf +
5510                                        ao_context->circ_buf.tail + i))) << 16;
5511                                 outl(value, ao_context->fifo_reg);
5512                         }
5513                 } else
5514                         outsw(ao_context->fifo_reg,
5515                               ao_context->circ_buf.buf +
5516                               ao_context->circ_buf.tail, c1);
5517
5518                 //rdtscl(after);
5519                 //printk(KERN_ERR"ME4000:me4000_ao_isr():Time lapse = %lu\n", after - before);
5520
5521                 ao_context->circ_buf.tail =
5522                     (ao_context->circ_buf.tail + c1) & (ME4000_AO_BUFFER_COUNT -
5523                                                         1);
5524                 ISR_PDEBUG("me4000_ao_isr():%d values wrote to port 0x%04X\n",
5525                            c1, ao_context->fifo_reg);
5526                 c -= c1;
5527         }
5528
5529         /* If there are no values left in the buffer, disable interrupts */
5530         spin_lock(&ao_context->int_lock);
5531         if (!me4000_buf_count(ao_context->circ_buf, ME4000_AO_BUFFER_COUNT)) {
5532                 ISR_PDEBUG
5533                     ("me4000_ao_isr():Disable Interrupt because no values left in buffer\n");
5534                 tmp = me4000_inl(ao_context->ctrl_reg);
5535                 tmp &= ~ME4000_AO_CTRL_BIT_ENABLE_IRQ;
5536                 me4000_outl(tmp, ao_context->ctrl_reg);
5537         }
5538         spin_unlock(&ao_context->int_lock);
5539
5540         /* Reset the interrupt */
5541         spin_lock(&ao_context->int_lock);
5542         tmp = me4000_inl(ao_context->ctrl_reg);
5543         tmp |= ME4000_AO_CTRL_BIT_RESET_IRQ;
5544         me4000_outl(tmp, ao_context->ctrl_reg);
5545         tmp &= ~ME4000_AO_CTRL_BIT_RESET_IRQ;
5546         me4000_outl(tmp, ao_context->ctrl_reg);
5547
5548         /* If state machine is stopped, flow was interrupted */
5549         if (!(me4000_inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM)) {
5550                 printk(KERN_ERR "ME4000:me4000_ao_isr():Broken pipe\n");
5551                 ao_context->pipe_flag = 1;      // Set flag in order to inform write routine
5552                 tmp &= ~ME4000_AO_CTRL_BIT_ENABLE_IRQ;  // Disable interrupt
5553         }
5554         me4000_outl(tmp, ao_context->ctrl_reg);
5555         spin_unlock(&ao_context->int_lock);
5556
5557         /* Wake up waiting process */
5558         wake_up_interruptible(&(ao_context->wait_queue));
5559
5560         /* Count the interrupt */
5561         ao_context->board_info->irq_count++;
5562
5563         return IRQ_HANDLED;
5564 }
5565
5566 static irqreturn_t me4000_ai_isr(int irq, void *dev_id)
5567 {
5568         u32 tmp;
5569         struct me4000_ai_context *ai_context;
5570         int i;
5571         int c = 0;
5572         int c1 = 0;
5573 #ifdef ME4000_ISR_DEBUG
5574         unsigned long before;
5575         unsigned long after;
5576 #endif
5577
5578         ISR_PDEBUG("me4000_ai_isr() is executed\n");
5579
5580 #ifdef ME4000_ISR_DEBUG
5581         rdtscl(before);
5582 #endif
5583
5584         ai_context = dev_id;
5585
5586         /* Check if irq number is right */
5587         if (irq != ai_context->irq) {
5588                 ISR_PDEBUG("me4000_ai_isr():incorrect interrupt num: %d\n",
5589                            irq);
5590                 return IRQ_NONE;
5591         }
5592
5593         if (me4000_inl(ai_context->irq_status_reg) &
5594             ME4000_IRQ_STATUS_BIT_AI_HF) {
5595                 ISR_PDEBUG
5596                     ("me4000_ai_isr():Fifo half full interrupt occured\n");
5597
5598                 /* Read status register to find out what happened */
5599                 tmp = me4000_inl(ai_context->ctrl_reg);
5600
5601                 if (!(tmp & ME4000_AI_STATUS_BIT_FF_DATA) &&
5602                     !(tmp & ME4000_AI_STATUS_BIT_HF_DATA)
5603                     && (tmp & ME4000_AI_STATUS_BIT_EF_DATA)) {
5604                         ISR_PDEBUG("me4000_ai_isr():Fifo full\n");
5605                         c = ME4000_AI_FIFO_COUNT;
5606
5607                         /* FIFO overflow, so stop conversion and disable all interrupts */
5608                         spin_lock(&ai_context->int_lock);
5609                         tmp = me4000_inl(ai_context->ctrl_reg);
5610                         tmp |= ME4000_AI_CTRL_BIT_IMMEDIATE_STOP;
5611                         tmp &=
5612                             ~(ME4000_AI_CTRL_BIT_HF_IRQ |
5613                               ME4000_AI_CTRL_BIT_SC_IRQ);
5614                         outl(tmp, ai_context->ctrl_reg);
5615                         spin_unlock(&ai_context->int_lock);
5616                 } else if ((tmp & ME4000_AI_STATUS_BIT_FF_DATA) &&
5617                            !(tmp & ME4000_AI_STATUS_BIT_HF_DATA)
5618                            && (tmp & ME4000_AI_STATUS_BIT_EF_DATA)) {
5619                         ISR_PDEBUG("me4000_ai_isr():Fifo half full\n");
5620                         c = ME4000_AI_FIFO_COUNT / 2;
5621                 } else {
5622                         c = 0;
5623                         ISR_PDEBUG
5624                             ("me4000_ai_isr():Can't determine state of fifo\n");
5625                 }
5626
5627                 ISR_PDEBUG("me4000_ai_isr():Try to read %d values\n", c);
5628
5629                 while (1) {
5630                         c1 = me4000_space_to_end(ai_context->circ_buf,
5631                                                  ME4000_AI_BUFFER_COUNT);
5632                         ISR_PDEBUG("me4000_ai_isr():Space to end = %d\n", c1);
5633                         if (c1 > c)
5634                                 c1 = c;
5635
5636                         if (c1 <= 0) {
5637                                 ISR_PDEBUG
5638                                     ("me4000_ai_isr():Work done or buffer full\n");
5639                                 break;
5640                         }
5641
5642                         insw(ai_context->data_reg,
5643                              ai_context->circ_buf.buf +
5644                              ai_context->circ_buf.head, c1);
5645                         ai_context->circ_buf.head =
5646                             (ai_context->circ_buf.head +
5647                              c1) & (ME4000_AI_BUFFER_COUNT - 1);
5648                         c -= c1;
5649                 }
5650
5651                 /* Work is done, so reset the interrupt */
5652                 ISR_PDEBUG
5653                     ("me4000_ai_isr():reset interrupt fifo half full interrupt\n");
5654                 spin_lock(&ai_context->int_lock);
5655                 tmp = me4000_inl(ai_context->ctrl_reg);
5656                 tmp |= ME4000_AI_CTRL_BIT_HF_IRQ_RESET;
5657                 me4000_outl(tmp, ai_context->ctrl_reg);
5658                 tmp &= ~ME4000_AI_CTRL_BIT_HF_IRQ_RESET;
5659                 me4000_outl(tmp, ai_context->ctrl_reg);
5660                 spin_unlock(&ai_context->int_lock);
5661         }
5662
5663         if (me4000_inl(ai_context->irq_status_reg) & ME4000_IRQ_STATUS_BIT_SC) {
5664                 ISR_PDEBUG
5665                     ("me4000_ai_isr():Sample counter interrupt occured\n");
5666
5667                 if (!ai_context->sample_counter_reload) {
5668                         ISR_PDEBUG
5669                             ("me4000_ai_isr():Single data block available\n");
5670
5671                         /* Poll data until fifo empty */
5672                         for (i = 0;
5673                              (i < ME4000_AI_FIFO_COUNT / 2)
5674                              && (inl(ai_context->ctrl_reg) &
5675                                  ME4000_AI_STATUS_BIT_EF_DATA); i++) {
5676                                 if (me4000_space_to_end
5677                                     (ai_context->circ_buf,
5678                                      ME4000_AI_BUFFER_COUNT)) {
5679                                         *(ai_context->circ_buf.buf +
5680                                           ai_context->circ_buf.head) =
5681                  inw(ai_context->data_reg);
5682                                         ai_context->circ_buf.head =
5683                                             (ai_context->circ_buf.head +
5684                                              1) & (ME4000_AI_BUFFER_COUNT - 1);
5685                                 } else
5686                                         break;
5687                         }
5688                         ISR_PDEBUG("me4000_ai_isr():%d values read\n", i);
5689                 } else {
5690                         if (ai_context->sample_counter <=
5691                             ME4000_AI_FIFO_COUNT / 2) {
5692                                 ISR_PDEBUG
5693                                     ("me4000_ai_isr():Interrupt from adjustable half full threshold\n");
5694
5695                                 /* Read status register to find out what happened */
5696                                 tmp = me4000_inl(ai_context->ctrl_reg);
5697
5698                                 if (!(tmp & ME4000_AI_STATUS_BIT_FF_DATA) &&
5699                                     !(tmp & ME4000_AI_STATUS_BIT_HF_DATA)
5700                                     && (tmp & ME4000_AI_STATUS_BIT_EF_DATA)) {
5701                                         ISR_PDEBUG
5702                                             ("me4000_ai_isr():Fifo full\n");
5703                                         c = ME4000_AI_FIFO_COUNT;
5704
5705                                         /* FIFO overflow, so stop conversion */
5706                                         spin_lock(&ai_context->int_lock);
5707                                         tmp = me4000_inl(ai_context->ctrl_reg);
5708                                         tmp |=
5709                                             ME4000_AI_CTRL_BIT_IMMEDIATE_STOP;
5710                                         outl(tmp, ai_context->ctrl_reg);
5711                                         spin_unlock(&ai_context->int_lock);
5712                                 } else if ((tmp & ME4000_AI_STATUS_BIT_FF_DATA)
5713                                            && !(tmp &
5714                                                 ME4000_AI_STATUS_BIT_HF_DATA)
5715                                            && (tmp &
5716                                                ME4000_AI_STATUS_BIT_EF_DATA)) {
5717                                         ISR_PDEBUG
5718                                             ("me4000_ai_isr():Fifo half full\n");
5719                                         c = ME4000_AI_FIFO_COUNT / 2;
5720                                 } else {
5721                                         c = ai_context->sample_counter;
5722                                         ISR_PDEBUG
5723                                             ("me4000_ai_isr():Sample count values\n");
5724                                 }
5725
5726                                 ISR_PDEBUG
5727                                     ("me4000_ai_isr():Try to read %d values\n",
5728                                      c);
5729
5730                                 while (1) {
5731                                         c1 = me4000_space_to_end(ai_context->
5732                                                                  circ_buf,
5733                                                                  ME4000_AI_BUFFER_COUNT);
5734                                         ISR_PDEBUG
5735                                             ("me4000_ai_isr():Space to end = %d\n",
5736                                              c1);
5737                                         if (c1 > c)
5738                                                 c1 = c;
5739
5740                                         if (c1 <= 0) {
5741                                                 ISR_PDEBUG
5742                                                     ("me4000_ai_isr():Work done or buffer full\n");
5743                                                 break;
5744                                         }
5745
5746                                         insw(ai_context->data_reg,
5747                                              ai_context->circ_buf.buf +
5748                                              ai_context->circ_buf.head, c1);
5749                                         ai_context->circ_buf.head =
5750                                             (ai_context->circ_buf.head +
5751                                              c1) & (ME4000_AI_BUFFER_COUNT - 1);
5752                                         c -= c1;
5753                                 }
5754                         } else {
5755                                 ISR_PDEBUG
5756                                     ("me4000_ai_isr():Multiple data block available\n");
5757
5758                                 /* Read status register to find out what happened */
5759                                 tmp = me4000_inl(ai_context->ctrl_reg);
5760
5761                                 if (!(tmp & ME4000_AI_STATUS_BIT_FF_DATA) &&
5762                                     !(tmp & ME4000_AI_STATUS_BIT_HF_DATA)
5763                                     && (tmp & ME4000_AI_STATUS_BIT_EF_DATA)) {
5764                                         ISR_PDEBUG
5765                                             ("me4000_ai_isr():Fifo full\n");
5766                                         c = ME4000_AI_FIFO_COUNT;
5767
5768                                         /* FIFO overflow, so stop conversion */
5769                                         spin_lock(&ai_context->int_lock);
5770                                         tmp = me4000_inl(ai_context->ctrl_reg);
5771                                         tmp |=
5772                                             ME4000_AI_CTRL_BIT_IMMEDIATE_STOP;
5773                                         outl(tmp, ai_context->ctrl_reg);
5774                                         spin_unlock(&ai_context->int_lock);
5775
5776                                         while (1) {
5777                                                 c1 = me4000_space_to_end
5778                                                     (ai_context->circ_buf,
5779                                                      ME4000_AI_BUFFER_COUNT);
5780                                                 ISR_PDEBUG
5781                                                     ("me4000_ai_isr():Space to end = %d\n",
5782                                                      c1);
5783                                                 if (c1 > c)
5784                                                         c1 = c;
5785
5786                                                 if (c1 <= 0) {
5787                                                         ISR_PDEBUG
5788                                                             ("me4000_ai_isr():Work done or buffer full\n");
5789                                                         break;
5790                                                 }
5791
5792                                                 insw(ai_context->data_reg,
5793                                                      ai_context->circ_buf.buf +
5794                                                      ai_context->circ_buf.head,
5795                                                      c1);
5796                                                 ai_context->circ_buf.head =
5797                                                     (ai_context->circ_buf.head +
5798                                                      c1) &
5799                                                     (ME4000_AI_BUFFER_COUNT -
5800                                                      1);
5801                                                 c -= c1;
5802                                         }
5803                                 } else if ((tmp & ME4000_AI_STATUS_BIT_FF_DATA)
5804                                            && !(tmp &
5805                                                 ME4000_AI_STATUS_BIT_HF_DATA)
5806                                            && (tmp &
5807                                                ME4000_AI_STATUS_BIT_EF_DATA)) {
5808                                         ISR_PDEBUG
5809                                             ("me4000_ai_isr():Fifo half full\n");
5810                                         c = ME4000_AI_FIFO_COUNT / 2;
5811
5812                                         while (1) {
5813                                                 c1 = me4000_space_to_end
5814                                                     (ai_context->circ_buf,
5815                                                      ME4000_AI_BUFFER_COUNT);
5816                                                 ISR_PDEBUG
5817                                                     ("me4000_ai_isr():Space to end = %d\n",
5818                                                      c1);
5819                                                 if (c1 > c)
5820                                                         c1 = c;
5821
5822                                                 if (c1 <= 0) {
5823                                                         ISR_PDEBUG
5824                                                             ("me4000_ai_isr():Work done or buffer full\n");
5825                                                         break;
5826                                                 }
5827
5828                                                 insw(ai_context->data_reg,
5829                                                      ai_context->circ_buf.buf +
5830                                                      ai_context->circ_buf.head,
5831                                                      c1);
5832                                                 ai_context->circ_buf.head =
5833                                                     (ai_context->circ_buf.head +
5834                                                      c1) &
5835                                                     (ME4000_AI_BUFFER_COUNT -
5836                                                      1);
5837                                                 c -= c1;
5838                                         }
5839                                 } else {
5840                                         /* Poll data until fifo empty */
5841                                         for (i = 0;
5842                                              (i < ME4000_AI_FIFO_COUNT / 2)
5843                                              && (inl(ai_context->ctrl_reg) &
5844                                                  ME4000_AI_STATUS_BIT_EF_DATA);
5845                                              i++) {
5846                                                 if (me4000_space_to_end
5847                                                     (ai_context->circ_buf,
5848                                                      ME4000_AI_BUFFER_COUNT)) {
5849                                                         *(ai_context->circ_buf.
5850                                                           buf +
5851                                                           ai_context->circ_buf.
5852                                                           head) =
5853                                        inw(ai_context->data_reg);
5854                                                         ai_context->circ_buf.
5855                                                             head =
5856                                                             (ai_context->
5857                                                              circ_buf.head +
5858                                                              1) &
5859                                                             (ME4000_AI_BUFFER_COUNT
5860                                                              - 1);
5861                                                 } else
5862                                                         break;
5863                                         }
5864                                         ISR_PDEBUG
5865                                             ("me4000_ai_isr():%d values read\n",
5866                                              i);
5867                                 }
5868                         }
5869                 }
5870
5871                 /* Work is done, so reset the interrupt */
5872                 ISR_PDEBUG
5873                     ("me4000_ai_isr():reset interrupt from sample counter\n");
5874                 spin_lock(&ai_context->int_lock);
5875                 tmp = me4000_inl(ai_context->ctrl_reg);
5876                 tmp |= ME4000_AI_CTRL_BIT_SC_IRQ_RESET;
5877                 me4000_outl(tmp, ai_context->ctrl_reg);
5878                 tmp &= ~ME4000_AI_CTRL_BIT_SC_IRQ_RESET;
5879                 me4000_outl(tmp, ai_context->ctrl_reg);
5880                 spin_unlock(&ai_context->int_lock);
5881         }
5882
5883         /* Values are now available, so wake up waiting process */
5884         if (me4000_buf_count(ai_context->circ_buf, ME4000_AI_BUFFER_COUNT)) {
5885                 ISR_PDEBUG("me4000_ai_isr():Wake up waiting process\n");
5886                 wake_up_interruptible(&(ai_context->wait_queue));
5887         }
5888
5889         /* If there is no space left in the buffer, disable interrupts */
5890         spin_lock(&ai_context->int_lock);
5891         if (!me4000_buf_space(ai_context->circ_buf, ME4000_AI_BUFFER_COUNT)) {
5892                 ISR_PDEBUG
5893                     ("me4000_ai_isr():Disable Interrupt because no space left in buffer\n");
5894                 tmp = me4000_inl(ai_context->ctrl_reg);
5895                 tmp &=
5896                     ~(ME4000_AI_CTRL_BIT_SC_IRQ | ME4000_AI_CTRL_BIT_HF_IRQ |
5897                       ME4000_AI_CTRL_BIT_LE_IRQ);
5898                 me4000_outl(tmp, ai_context->ctrl_reg);
5899         }
5900         spin_unlock(&ai_context->int_lock);
5901
5902 #ifdef ME4000_ISR_DEBUG
5903         rdtscl(after);
5904         printk(KERN_ERR "ME4000:me4000_ai_isr():Time lapse = %lu\n",
5905                after - before);
5906 #endif
5907
5908         return IRQ_HANDLED;
5909 }
5910
5911 static irqreturn_t me4000_ext_int_isr(int irq, void *dev_id)
5912 {
5913         struct me4000_ext_int_context *ext_int_context;
5914         unsigned long tmp;
5915
5916         ISR_PDEBUG("me4000_ext_int_isr() is executed\n");
5917
5918         ext_int_context = dev_id;
5919
5920         /* Check if irq number is right */
5921         if (irq != ext_int_context->irq) {
5922                 ISR_PDEBUG("me4000_ext_int_isr():incorrect interrupt num: %d\n",
5923                            irq);
5924                 return IRQ_NONE;
5925         }
5926
5927         if (me4000_inl(ext_int_context->irq_status_reg) &
5928             ME4000_IRQ_STATUS_BIT_EX) {
5929                 ISR_PDEBUG("me4000_ext_int_isr():External interrupt occured\n");
5930                 tmp = me4000_inl(ext_int_context->ctrl_reg);
5931                 tmp |= ME4000_AI_CTRL_BIT_EX_IRQ_RESET;
5932                 me4000_outl(tmp, ext_int_context->ctrl_reg);
5933                 tmp &= ~ME4000_AI_CTRL_BIT_EX_IRQ_RESET;
5934                 me4000_outl(tmp, ext_int_context->ctrl_reg);
5935
5936                 ext_int_context->int_count++;
5937
5938                 if (ext_int_context->fasync_ptr) {
5939                         ISR_PDEBUG
5940                             ("me2600_ext_int_isr():Send signal to process\n");
5941                         kill_fasync(&ext_int_context->fasync_ptr, SIGIO,
5942                                     POLL_IN);
5943                 }
5944         }
5945
5946         return IRQ_HANDLED;
5947 }
5948
5949 static void __exit me4000_module_exit(void)
5950 {
5951         struct me4000_info *board_info;
5952
5953         CALL_PDEBUG("cleanup_module() is executed\n");
5954
5955         unregister_chrdev(me4000_ext_int_major_driver_no, ME4000_EXT_INT_NAME);
5956
5957         unregister_chrdev(me4000_cnt_major_driver_no, ME4000_CNT_NAME);
5958
5959         unregister_chrdev(me4000_dio_major_driver_no, ME4000_DIO_NAME);
5960
5961         unregister_chrdev(me4000_ai_major_driver_no, ME4000_AI_NAME);
5962
5963         unregister_chrdev(me4000_ao_major_driver_no, ME4000_AO_NAME);
5964
5965         remove_proc_entry("me4000", NULL);
5966
5967         pci_unregister_driver(&me4000_driver);
5968
5969         /* Reset the boards */
5970         list_for_each_entry(board_info, &me4000_board_info_list, list) {
5971                 me4000_reset_board(board_info);
5972         }
5973
5974         clear_board_info_list();
5975 }
5976
5977 module_exit(me4000_module_exit);
5978
5979 static int me4000_read_procmem(char *buf, char **start, off_t offset, int count,
5980                                int *eof, void *data)
5981 {
5982         int len = 0;
5983         int limit = count - 1000;
5984         struct me4000_info *board_info;
5985
5986         len += sprintf(buf + len, "\nME4000 DRIVER VERSION %X.%X.%X\n\n",
5987                        (ME4000_DRIVER_VERSION & 0xFF0000) >> 16,
5988                        (ME4000_DRIVER_VERSION & 0xFF00) >> 8,
5989                        (ME4000_DRIVER_VERSION & 0xFF));
5990
5991         /* Search for the board context */
5992         list_for_each_entry(board_info, &me4000_board_info_list, list) {
5993                 len +=
5994                     sprintf(buf + len, "Board number %d:\n",
5995                             board_info->board_count);
5996                 len += sprintf(buf + len, "---------------\n");
5997                 len +=
5998                     sprintf(buf + len, "PLX base register = 0x%lX\n",
5999                             board_info->plx_regbase);
6000                 len +=
6001                     sprintf(buf + len, "PLX base register size = 0x%X\n",
6002                             (unsigned int)board_info->plx_regbase_size);
6003                 len +=
6004                     sprintf(buf + len, "ME4000 base register = 0x%X\n",
6005                             (unsigned int)board_info->me4000_regbase);
6006                 len +=
6007                     sprintf(buf + len, "ME4000 base register size = 0x%X\n",
6008                             (unsigned int)board_info->me4000_regbase_size);
6009                 len +=
6010                     sprintf(buf + len, "Serial number = 0x%X\n",
6011                             board_info->serial_no);
6012                 len +=
6013                     sprintf(buf + len, "Hardware revision = 0x%X\n",
6014                             board_info->hw_revision);
6015                 len +=
6016                     sprintf(buf + len, "Vendor id = 0x%X\n",
6017                             board_info->vendor_id);
6018                 len +=
6019                     sprintf(buf + len, "Device id = 0x%X\n",
6020                             board_info->device_id);
6021                 len +=
6022                     sprintf(buf + len, "PCI bus number = %d\n",
6023                             board_info->pci_bus_no);
6024                 len +=
6025                     sprintf(buf + len, "PCI device number = %d\n",
6026                             board_info->pci_dev_no);
6027                 len +=
6028                     sprintf(buf + len, "PCI function number = %d\n",
6029                             board_info->pci_func_no);
6030                 len += sprintf(buf + len, "IRQ = %u\n", board_info->irq);
6031                 len +=
6032                     sprintf(buf + len,
6033                             "Count of interrupts since module was loaded = %d\n",
6034                             board_info->irq_count);
6035
6036                 len +=
6037                     sprintf(buf + len, "Count of analog outputs = %d\n",
6038                             board_info->board_p->ao.count);
6039                 len +=
6040                     sprintf(buf + len, "Count of analog output fifos = %d\n",
6041                             board_info->board_p->ao.fifo_count);
6042
6043                 len +=
6044                     sprintf(buf + len, "Count of analog inputs = %d\n",
6045                             board_info->board_p->ai.count);
6046                 len +=
6047                     sprintf(buf + len,
6048                             "Count of sample and hold devices for analog input = %d\n",
6049                             board_info->board_p->ai.sh_count);
6050                 len +=
6051                     sprintf(buf + len,
6052                             "Analog external trigger available for analog input = %d\n",
6053                             board_info->board_p->ai.ex_trig_analog);
6054
6055                 len +=
6056                     sprintf(buf + len, "Count of digital ports = %d\n",
6057                             board_info->board_p->dio.count);
6058
6059                 len +=
6060                     sprintf(buf + len, "Count of counter devices = %d\n",
6061                             board_info->board_p->cnt.count);
6062                 len +=
6063                     sprintf(buf + len, "AI control register = 0x%08X\n",
6064                             inl(board_info->me4000_regbase +
6065                                 ME4000_AI_CTRL_REG));
6066
6067                 len += sprintf(buf + len, "AO 0 control register = 0x%08X\n",
6068                                inl(board_info->me4000_regbase +
6069                                    ME4000_AO_00_CTRL_REG));
6070                 len +=
6071                     sprintf(buf + len, "AO 0 status register = 0x%08X\n",
6072                             inl(board_info->me4000_regbase +
6073                                 ME4000_AO_00_STATUS_REG));
6074                 len +=
6075                     sprintf(buf + len, "AO 1 control register = 0x%08X\n",
6076                             inl(board_info->me4000_regbase +
6077                                 ME4000_AO_01_CTRL_REG));
6078                 len +=
6079                     sprintf(buf + len, "AO 1 status register = 0x%08X\n",
6080                             inl(board_info->me4000_regbase +
6081                                 ME4000_AO_01_STATUS_REG));
6082                 len +=
6083                     sprintf(buf + len, "AO 2 control register = 0x%08X\n",
6084                             inl(board_info->me4000_regbase +
6085                                 ME4000_AO_02_CTRL_REG));
6086                 len +=
6087                     sprintf(buf + len, "AO 2 status register = 0x%08X\n",
6088                             inl(board_info->me4000_regbase +
6089                                 ME4000_AO_02_STATUS_REG));
6090                 len +=
6091                     sprintf(buf + len, "AO 3 control register = 0x%08X\n",
6092                             inl(board_info->me4000_regbase +
6093                                 ME4000_AO_03_CTRL_REG));
6094                 len +=
6095                     sprintf(buf + len, "AO 3 status register = 0x%08X\n",
6096                             inl(board_info->me4000_regbase +
6097                                 ME4000_AO_03_STATUS_REG));
6098                 if (len >= limit)
6099                         break;
6100         }
6101
6102         *eof = 1;
6103         return len;
6104 }