1 /* Device driver for Meilhaus ME-4000 board family.
2 * ================================================
4 * Copyright (C) 2003 Meilhaus Electronic GmbH (support@meilhaus.de)
6 * This file is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 * Author: Guenter Gebhardt <g.gebhardt@meilhaus.de>
23 #include <linux/module.h>
25 #include <linux/sched.h>
26 #include <linux/interrupt.h>
27 #include <linux/pci.h>
28 #include <linux/errno.h>
29 #include <linux/delay.h>
31 #include <linux/unistd.h>
32 #include <linux/list.h>
33 #include <linux/proc_fs.h>
34 #include <linux/types.h>
35 #include <linux/poll.h>
36 #include <linux/vmalloc.h>
37 #include <linux/slab.h>
38 #include <asm/pgtable.h>
39 #include <asm/uaccess.h>
41 #include <asm/system.h>
42 #include <asm/uaccess.h>
44 /* Include-File for the Meilhaus ME-4000 I/O board */
46 #include "me4000_firmware.h"
47 #include "me4610_firmware.h"
49 /* Administrative stuff for modinfo */
50 MODULE_AUTHOR("Guenter Gebhardt <g.gebhardt@meilhaus.de>");
52 ("Device Driver Module for Meilhaus ME-4000 boards version 1.0.5");
53 MODULE_SUPPORTED_DEVICE("Meilhaus ME-4000 Multi I/O boards");
54 MODULE_LICENSE("GPL");
56 /* Board specific data are kept in a global list */
57 static LIST_HEAD(me4000_board_info_list);
59 /* Major Device Numbers. 0 means to get it automatically from the System */
60 static int me4000_ao_major_driver_no;
61 static int me4000_ai_major_driver_no;
62 static int me4000_dio_major_driver_no;
63 static int me4000_cnt_major_driver_no;
64 static int me4000_ext_int_major_driver_no;
66 /* Let the user specify a custom major driver number */
67 module_param(me4000_ao_major_driver_no, int, 0);
68 MODULE_PARM_DESC(me4000_ao_major_driver_no,
69 "Major driver number for analog output (default 0)");
71 module_param(me4000_ai_major_driver_no, int, 0);
72 MODULE_PARM_DESC(me4000_ai_major_driver_no,
73 "Major driver number for analog input (default 0)");
75 module_param(me4000_dio_major_driver_no, int, 0);
76 MODULE_PARM_DESC(me4000_dio_major_driver_no,
77 "Major driver number digital I/O (default 0)");
79 module_param(me4000_cnt_major_driver_no, int, 0);
80 MODULE_PARM_DESC(me4000_cnt_major_driver_no,
81 "Major driver number for counter (default 0)");
83 module_param(me4000_ext_int_major_driver_no, int, 0);
84 MODULE_PARM_DESC(me4000_ext_int_major_driver_no,
85 "Major driver number for external interrupt (default 0)");
87 /*-----------------------------------------------------------------------------
88 Board detection and initialization
89 ---------------------------------------------------------------------------*/
90 static int me4000_probe(struct pci_dev *dev, const struct pci_device_id *id);
91 static int me4000_xilinx_download(struct me4000_info *);
92 static int me4000_reset_board(struct me4000_info *);
94 static void clear_board_info_list(void);
95 static void release_ao_contexts(struct me4000_info *board_info);
96 /*-----------------------------------------------------------------------------
97 Stuff used by all device parts
98 ---------------------------------------------------------------------------*/
99 static int me4000_open(struct inode *, struct file *);
100 static int me4000_release(struct inode *, struct file *);
102 static int me4000_get_user_info(struct me4000_user_info *,
103 struct me4000_info *board_info);
104 static int me4000_read_procmem(char *, char **, off_t, int, int *, void *);
106 /*-----------------------------------------------------------------------------
108 ---------------------------------------------------------------------------*/
109 static ssize_t me4000_ao_write_sing(struct file *, const char *, size_t,
111 static ssize_t me4000_ao_write_wrap(struct file *, const char *, size_t,
113 static ssize_t me4000_ao_write_cont(struct file *, const char *, size_t,
116 static int me4000_ao_ioctl_sing(struct inode *, struct file *, unsigned int,
118 static int me4000_ao_ioctl_wrap(struct inode *, struct file *, unsigned int,
120 static int me4000_ao_ioctl_cont(struct inode *, struct file *, unsigned int,
123 static unsigned int me4000_ao_poll_cont(struct file *, poll_table *);
124 static int me4000_ao_fsync_cont(struct file *, struct dentry *, int);
126 static int me4000_ao_start(unsigned long *, struct me4000_ao_context *);
127 static int me4000_ao_stop(struct me4000_ao_context *);
128 static int me4000_ao_immediate_stop(struct me4000_ao_context *);
129 static int me4000_ao_timer_set_divisor(u32 *, struct me4000_ao_context *);
130 static int me4000_ao_preload(struct me4000_ao_context *);
131 static int me4000_ao_preload_update(struct me4000_ao_context *);
132 static int me4000_ao_ex_trig_set_edge(int *, struct me4000_ao_context *);
133 static int me4000_ao_ex_trig_enable(struct me4000_ao_context *);
134 static int me4000_ao_ex_trig_disable(struct me4000_ao_context *);
135 static int me4000_ao_prepare(struct me4000_ao_context *ao_info);
136 static int me4000_ao_reset(struct me4000_ao_context *ao_info);
137 static int me4000_ao_enable_do(struct me4000_ao_context *);
138 static int me4000_ao_disable_do(struct me4000_ao_context *);
139 static int me4000_ao_fsm_state(int *, struct me4000_ao_context *);
141 static int me4000_ao_simultaneous_ex_trig(struct me4000_ao_context *ao_context);
142 static int me4000_ao_simultaneous_sw(struct me4000_ao_context *ao_context);
143 static int me4000_ao_simultaneous_disable(struct me4000_ao_context *ao_context);
144 static int me4000_ao_simultaneous_update(
145 struct me4000_ao_channel_list *channels,
146 struct me4000_ao_context *ao_context);
148 static int me4000_ao_synchronous_ex_trig(struct me4000_ao_context *ao_context);
149 static int me4000_ao_synchronous_sw(struct me4000_ao_context *ao_context);
150 static int me4000_ao_synchronous_disable(struct me4000_ao_context *ao_context);
152 static int me4000_ao_ex_trig_timeout(unsigned long *arg,
153 struct me4000_ao_context *ao_context);
154 static int me4000_ao_get_free_buffer(unsigned long *arg,
155 struct me4000_ao_context *ao_context);
157 /*-----------------------------------------------------------------------------
159 ---------------------------------------------------------------------------*/
160 static int me4000_ai_single(struct me4000_ai_single *,
161 struct me4000_ai_context *);
162 static int me4000_ai_ioctl_sing(struct inode *, struct file *, unsigned int,
165 static ssize_t me4000_ai_read(struct file *, char *, size_t, loff_t *);
166 static int me4000_ai_ioctl_sw(struct inode *, struct file *, unsigned int,
168 static unsigned int me4000_ai_poll(struct file *, poll_table *);
169 static int me4000_ai_fasync(int fd, struct file *file_p, int mode);
171 static int me4000_ai_ioctl_ext(struct inode *, struct file *, unsigned int,
174 static int me4000_ai_prepare(struct me4000_ai_context *ai_context);
175 static int me4000_ai_reset(struct me4000_ai_context *ai_context);
176 static int me4000_ai_config(struct me4000_ai_config *,
177 struct me4000_ai_context *);
178 static int me4000_ai_start(struct me4000_ai_context *);
179 static int me4000_ai_start_ex(unsigned long *, struct me4000_ai_context *);
180 static int me4000_ai_stop(struct me4000_ai_context *);
181 static int me4000_ai_immediate_stop(struct me4000_ai_context *);
182 static int me4000_ai_ex_trig_enable(struct me4000_ai_context *);
183 static int me4000_ai_ex_trig_disable(struct me4000_ai_context *);
184 static int me4000_ai_ex_trig_setup(struct me4000_ai_trigger *,
185 struct me4000_ai_context *);
186 static int me4000_ai_sc_setup(struct me4000_ai_sc *arg,
187 struct me4000_ai_context *ai_context);
188 static int me4000_ai_offset_enable(struct me4000_ai_context *ai_context);
189 static int me4000_ai_offset_disable(struct me4000_ai_context *ai_context);
190 static int me4000_ai_fullscale_enable(struct me4000_ai_context *ai_context);
191 static int me4000_ai_fullscale_disable(struct me4000_ai_context *ai_context);
192 static int me4000_ai_fsm_state(int *arg, struct me4000_ai_context *ai_context);
193 static int me4000_ai_get_count_buffer(unsigned long *arg,
194 struct me4000_ai_context *ai_context);
196 /*-----------------------------------------------------------------------------
198 ---------------------------------------------------------------------------*/
199 static int me4000_eeprom_read(struct me4000_eeprom *arg,
200 struct me4000_ai_context *ai_context);
201 static int me4000_eeprom_write(struct me4000_eeprom *arg,
202 struct me4000_ai_context *ai_context);
204 /*-----------------------------------------------------------------------------
206 ---------------------------------------------------------------------------*/
207 static int me4000_dio_ioctl(struct inode *, struct file *, unsigned int,
209 static int me4000_dio_config(struct me4000_dio_config *,
210 struct me4000_dio_context *);
211 static int me4000_dio_get_byte(struct me4000_dio_byte *,
212 struct me4000_dio_context *);
213 static int me4000_dio_set_byte(struct me4000_dio_byte *,
214 struct me4000_dio_context *);
215 static int me4000_dio_reset(struct me4000_dio_context *);
217 /*-----------------------------------------------------------------------------
219 ---------------------------------------------------------------------------*/
220 static int me4000_cnt_ioctl(struct inode *, struct file *, unsigned int,
222 static int me4000_cnt_config(struct me4000_cnt_config *,
223 struct me4000_cnt_context *);
224 static int me4000_cnt_read(struct me4000_cnt *, struct me4000_cnt_context *);
225 static int me4000_cnt_write(struct me4000_cnt *, struct me4000_cnt_context *);
226 static int me4000_cnt_reset(struct me4000_cnt_context *);
228 /*-----------------------------------------------------------------------------
229 External interrupt routines
230 ---------------------------------------------------------------------------*/
231 static int me4000_ext_int_ioctl(struct inode *, struct file *, unsigned int,
233 static int me4000_ext_int_enable(struct me4000_ext_int_context *);
234 static int me4000_ext_int_disable(struct me4000_ext_int_context *);
235 static int me4000_ext_int_count(unsigned long *arg,
236 struct me4000_ext_int_context *ext_int_context);
237 static int me4000_ext_int_fasync(int fd, struct file *file_ptr, int mode);
239 /*-----------------------------------------------------------------------------
240 The interrupt service routines
241 ---------------------------------------------------------------------------*/
242 static irqreturn_t me4000_ao_isr(int, void *);
243 static irqreturn_t me4000_ai_isr(int, void *);
244 static irqreturn_t me4000_ext_int_isr(int, void *);
246 /*-----------------------------------------------------------------------------
248 ---------------------------------------------------------------------------*/
250 static int inline me4000_buf_count(struct me4000_circ_buf buf, int size)
252 return ((buf.head - buf.tail) & (size - 1));
255 static int inline me4000_buf_space(struct me4000_circ_buf buf, int size)
257 return ((buf.tail - (buf.head + 1)) & (size - 1));
260 static int inline me4000_values_to_end(struct me4000_circ_buf buf, int size)
264 end = size - buf.tail;
265 n = (buf.head + end) & (size - 1);
266 return (n < end) ? n : end;
269 static int inline me4000_space_to_end(struct me4000_circ_buf buf, int size)
274 end = size - 1 - buf.head;
275 n = (end + buf.tail) & (size - 1);
276 return (n <= end) ? n : (end + 1);
279 static void inline me4000_outb(unsigned char value, unsigned long port)
281 PORT_PDEBUG("--> 0x%02X port 0x%04lX\n", value, port);
285 static void inline me4000_outl(unsigned long value, unsigned long port)
287 PORT_PDEBUG("--> 0x%08lX port 0x%04lX\n", value, port);
291 static unsigned long inline me4000_inl(unsigned long port)
295 PORT_PDEBUG("<-- 0x%08lX port 0x%04lX\n", value, port);
299 static unsigned char inline me4000_inb(unsigned long port)
303 PORT_PDEBUG("<-- 0x%08X port 0x%04lX\n", value, port);
307 static struct pci_driver me4000_driver = {
309 .id_table = me4000_pci_table,
310 .probe = me4000_probe
313 static struct file_operations me4000_ao_fops_sing = {
314 .owner = THIS_MODULE,
315 .write = me4000_ao_write_sing,
316 .ioctl = me4000_ao_ioctl_sing,
318 .release = me4000_release,
321 static struct file_operations me4000_ao_fops_wrap = {
322 .owner = THIS_MODULE,
323 .write = me4000_ao_write_wrap,
324 .ioctl = me4000_ao_ioctl_wrap,
326 .release = me4000_release,
329 static struct file_operations me4000_ao_fops_cont = {
330 .owner = THIS_MODULE,
331 .write = me4000_ao_write_cont,
332 .poll = me4000_ao_poll_cont,
333 .ioctl = me4000_ao_ioctl_cont,
335 .release = me4000_release,
336 .fsync = me4000_ao_fsync_cont,
339 static struct file_operations me4000_ai_fops_sing = {
340 .owner = THIS_MODULE,
341 .ioctl = me4000_ai_ioctl_sing,
343 .release = me4000_release,
346 static struct file_operations me4000_ai_fops_cont_sw = {
347 .owner = THIS_MODULE,
348 .read = me4000_ai_read,
349 .poll = me4000_ai_poll,
350 .ioctl = me4000_ai_ioctl_sw,
352 .release = me4000_release,
353 .fasync = me4000_ai_fasync,
356 static struct file_operations me4000_ai_fops_cont_et = {
357 .owner = THIS_MODULE,
358 .read = me4000_ai_read,
359 .poll = me4000_ai_poll,
360 .ioctl = me4000_ai_ioctl_ext,
362 .release = me4000_release,
365 static struct file_operations me4000_ai_fops_cont_et_value = {
366 .owner = THIS_MODULE,
367 .read = me4000_ai_read,
368 .poll = me4000_ai_poll,
369 .ioctl = me4000_ai_ioctl_ext,
371 .release = me4000_release,
374 static struct file_operations me4000_ai_fops_cont_et_chanlist = {
375 .owner = THIS_MODULE,
376 .read = me4000_ai_read,
377 .poll = me4000_ai_poll,
378 .ioctl = me4000_ai_ioctl_ext,
380 .release = me4000_release,
383 static struct file_operations me4000_dio_fops = {
384 .owner = THIS_MODULE,
385 .ioctl = me4000_dio_ioctl,
387 .release = me4000_release,
390 static struct file_operations me4000_cnt_fops = {
391 .owner = THIS_MODULE,
392 .ioctl = me4000_cnt_ioctl,
394 .release = me4000_release,
397 static struct file_operations me4000_ext_int_fops = {
398 .owner = THIS_MODULE,
399 .ioctl = me4000_ext_int_ioctl,
401 .release = me4000_release,
402 .fasync = me4000_ext_int_fasync,
405 static struct file_operations *me4000_ao_fops_array[] = {
406 &me4000_ao_fops_sing, // single operations
407 &me4000_ao_fops_wrap, // wraparound operations
408 &me4000_ao_fops_cont, // continous operations
411 static struct file_operations *me4000_ai_fops_array[] = {
412 &me4000_ai_fops_sing, // single operations
413 &me4000_ai_fops_cont_sw, // continuous operations with software start
414 &me4000_ai_fops_cont_et, // continous operations with external trigger
415 &me4000_ai_fops_cont_et_value, // sample values by external trigger
416 &me4000_ai_fops_cont_et_chanlist, // work through one channel list by external trigger
419 static int __init me4000_init_module(void)
423 CALL_PDEBUG("init_module() is executed\n");
425 /* Register driver capabilities */
426 result = pci_register_driver(&me4000_driver);
427 PDEBUG("init_module():%d devices detected\n", result);
429 printk(KERN_ERR "ME4000:init_module():Can't register driver\n");
433 /* Allocate major number for analog output */
435 register_chrdev(me4000_ao_major_driver_no, ME4000_AO_NAME,
436 &me4000_ao_fops_sing);
438 printk(KERN_ERR "ME4000:init_module():Can't get AO major no\n");
441 me4000_ao_major_driver_no = result;
443 PDEBUG("init_module():Major driver number for AO = %ld\n",
444 me4000_ao_major_driver_no);
446 /* Allocate major number for analog input */
448 register_chrdev(me4000_ai_major_driver_no, ME4000_AI_NAME,
449 &me4000_ai_fops_sing);
451 printk(KERN_ERR "ME4000:init_module():Can't get AI major no\n");
454 me4000_ai_major_driver_no = result;
456 PDEBUG("init_module():Major driver number for AI = %ld\n",
457 me4000_ai_major_driver_no);
459 /* Allocate major number for digital I/O */
461 register_chrdev(me4000_dio_major_driver_no, ME4000_DIO_NAME,
465 "ME4000:init_module():Can't get DIO major no\n");
468 me4000_dio_major_driver_no = result;
470 PDEBUG("init_module():Major driver number for DIO = %ld\n",
471 me4000_dio_major_driver_no);
473 /* Allocate major number for counter */
475 register_chrdev(me4000_cnt_major_driver_no, ME4000_CNT_NAME,
479 "ME4000:init_module():Can't get CNT major no\n");
482 me4000_cnt_major_driver_no = result;
484 PDEBUG("init_module():Major driver number for CNT = %ld\n",
485 me4000_cnt_major_driver_no);
487 /* Allocate major number for external interrupt */
489 register_chrdev(me4000_ext_int_major_driver_no, ME4000_EXT_INT_NAME,
490 &me4000_ext_int_fops);
493 "ME4000:init_module():Can't get major no for external interrupt\n");
496 me4000_ext_int_major_driver_no = result;
499 ("init_module():Major driver number for external interrupt = %ld\n",
500 me4000_ext_int_major_driver_no);
502 /* Create the /proc/me4000 entry */
503 if (!create_proc_read_entry
504 ("me4000", 0, NULL, me4000_read_procmem, NULL)) {
507 "ME4000:init_module():Can't create proc entry\n");
514 unregister_chrdev(me4000_ext_int_major_driver_no, ME4000_EXT_INT_NAME);
517 unregister_chrdev(me4000_cnt_major_driver_no, ME4000_CNT_NAME);
520 unregister_chrdev(me4000_dio_major_driver_no, ME4000_DIO_NAME);
523 unregister_chrdev(me4000_ai_major_driver_no, ME4000_AI_NAME);
526 unregister_chrdev(me4000_ao_major_driver_no, ME4000_AO_NAME);
529 pci_unregister_driver(&me4000_driver);
530 clear_board_info_list();
536 module_init(me4000_init_module);
538 static void clear_board_info_list(void)
540 struct list_head *board_p;
541 struct list_head *dac_p;
542 struct me4000_info *board_info;
543 struct me4000_ao_context *ao_context;
545 /* Clear context lists */
546 for (board_p = me4000_board_info_list.next;
547 board_p != &me4000_board_info_list; board_p = board_p->next) {
548 board_info = list_entry(board_p, struct me4000_info, list);
549 /* Clear analog output context list */
550 while (!list_empty(&board_info->ao_context_list)) {
551 dac_p = board_info->ao_context_list.next;
553 list_entry(dac_p, struct me4000_ao_context, list);
554 me4000_ao_reset(ao_context);
555 free_irq(ao_context->irq, ao_context);
556 if (ao_context->circ_buf.buf)
557 kfree(ao_context->circ_buf.buf);
562 /* Clear analog input context */
563 if (board_info->ai_context->circ_buf.buf)
564 kfree(board_info->ai_context->circ_buf.buf);
565 kfree(board_info->ai_context);
567 /* Clear digital I/O context */
568 kfree(board_info->dio_context);
570 /* Clear counter context */
571 kfree(board_info->cnt_context);
573 /* Clear external interrupt context */
574 kfree(board_info->ext_int_context);
577 /* Clear the board info list */
578 while (!list_empty(&me4000_board_info_list)) {
579 board_p = me4000_board_info_list.next;
580 board_info = list_entry(board_p, struct me4000_info, list);
581 pci_release_regions(board_info->pci_dev_p);
587 static int get_registers(struct pci_dev *dev, struct me4000_info *board_info)
590 /*--------------------------- plx regbase ---------------------------------*/
592 board_info->plx_regbase = pci_resource_start(dev, 1);
593 if (board_info->plx_regbase == 0) {
595 "ME4000:get_registers():PCI base address 1 is not available\n");
598 board_info->plx_regbase_size = pci_resource_len(dev, 1);
601 ("get_registers():PLX configuration registers at address 0x%4lX [0x%4lX]\n",
602 board_info->plx_regbase, board_info->plx_regbase_size);
604 /*--------------------------- me4000 regbase ------------------------------*/
606 board_info->me4000_regbase = pci_resource_start(dev, 2);
607 if (board_info->me4000_regbase == 0) {
609 "ME4000:get_registers():PCI base address 2 is not available\n");
612 board_info->me4000_regbase_size = pci_resource_len(dev, 2);
614 PDEBUG("get_registers():ME4000 registers at address 0x%4lX [0x%4lX]\n",
615 board_info->me4000_regbase, board_info->me4000_regbase_size);
617 /*--------------------------- timer regbase ------------------------------*/
619 board_info->timer_regbase = pci_resource_start(dev, 3);
620 if (board_info->timer_regbase == 0) {
622 "ME4000:get_registers():PCI base address 3 is not available\n");
625 board_info->timer_regbase_size = pci_resource_len(dev, 3);
627 PDEBUG("get_registers():Timer registers at address 0x%4lX [0x%4lX]\n",
628 board_info->timer_regbase, board_info->timer_regbase_size);
630 /*--------------------------- program regbase ------------------------------*/
632 board_info->program_regbase = pci_resource_start(dev, 5);
633 if (board_info->program_regbase == 0) {
635 "get_registers():ME4000:PCI base address 5 is not available\n");
638 board_info->program_regbase_size = pci_resource_len(dev, 5);
640 PDEBUG("get_registers():Program registers at address 0x%4lX [0x%4lX]\n",
641 board_info->program_regbase, board_info->program_regbase_size);
646 static int init_board_info(struct pci_dev *pci_dev_p,
647 struct me4000_info *board_info)
651 struct list_head *board_p;
652 board_info->pci_dev_p = pci_dev_p;
654 for (i = 0; i < ARRAY_SIZE(me4000_boards); i++) {
655 if (me4000_boards[i].device_id == pci_dev_p->device) {
656 board_info->board_p = &me4000_boards[i];
660 if (i == ARRAY_SIZE(me4000_boards)) {
662 "ME4000:init_board_info():Device ID not valid\n");
666 /* Get the index of the board in the global list */
667 for (board_p = me4000_board_info_list.next, i = 0;
668 board_p != &me4000_board_info_list; board_p = board_p->next, i++) {
669 if (board_p == &board_info->list) {
670 board_info->board_count = i;
674 if (board_p == &me4000_board_info_list) {
676 "ME4000:init_board_info():Cannot get index of baord\n");
680 /* Init list head for analog output contexts */
681 INIT_LIST_HEAD(&board_info->ao_context_list);
683 /* Init spin locks */
684 spin_lock_init(&board_info->preload_lock);
685 spin_lock_init(&board_info->ai_ctrl_lock);
687 /* Get the serial number */
688 result = pci_read_config_dword(pci_dev_p, 0x2C, &board_info->serial_no);
689 if (result != PCIBIOS_SUCCESSFUL) {
691 "ME4000:init_board_info: Can't get serial_no\n");
694 PDEBUG("init_board_info():serial_no = 0x%x\n", board_info->serial_no);
696 /* Get the hardware revision */
698 pci_read_config_byte(pci_dev_p, 0x08, &board_info->hw_revision);
699 if (result != PCIBIOS_SUCCESSFUL) {
701 "ME4000:init_board_info():Can't get hw_revision\n");
704 PDEBUG("init_board_info():hw_revision = 0x%x\n",
705 board_info->hw_revision);
707 /* Get the vendor id */
708 board_info->vendor_id = pci_dev_p->vendor;
709 PDEBUG("init_board_info():vendor_id = 0x%x\n", board_info->vendor_id);
711 /* Get the device id */
712 board_info->device_id = pci_dev_p->device;
713 PDEBUG("init_board_info():device_id = 0x%x\n", board_info->device_id);
715 /* Get the pci device number */
716 board_info->pci_dev_no = PCI_FUNC(pci_dev_p->devfn);
717 PDEBUG("init_board_info():pci_func_no = 0x%x\n",
718 board_info->pci_func_no);
720 /* Get the pci slot number */
721 board_info->pci_dev_no = PCI_SLOT(pci_dev_p->devfn);
722 PDEBUG("init_board_info():pci_dev_no = 0x%x\n", board_info->pci_dev_no);
724 /* Get the pci bus number */
725 board_info->pci_bus_no = pci_dev_p->bus->number;
726 PDEBUG("init_board_info():pci_bus_no = 0x%x\n", board_info->pci_bus_no);
728 /* Get the irq assigned to the board */
729 board_info->irq = pci_dev_p->irq;
730 PDEBUG("init_board_info():irq = %d\n", board_info->irq);
735 static int alloc_ao_contexts(struct me4000_info *info)
739 struct me4000_ao_context *ao_context;
741 for (i = 0; i < info->board_p->ao.count; i++) {
742 ao_context = kzalloc(sizeof(struct me4000_ao_context),
746 "alloc_ao_contexts():Can't get memory for ao context\n");
747 release_ao_contexts(info);
751 spin_lock_init(&ao_context->use_lock);
752 spin_lock_init(&ao_context->int_lock);
753 ao_context->irq = info->irq;
754 init_waitqueue_head(&ao_context->wait_queue);
755 ao_context->board_info = info;
757 if (info->board_p->ao.fifo_count) {
758 /* Allocate circular buffer */
759 ao_context->circ_buf.buf =
760 kzalloc(ME4000_AO_BUFFER_SIZE, GFP_KERNEL);
761 if (!ao_context->circ_buf.buf) {
763 "alloc_ao_contexts():Can't get circular buffer\n");
764 release_ao_contexts(info);
768 /* Clear the circular buffer */
769 ao_context->circ_buf.head = 0;
770 ao_context->circ_buf.tail = 0;
775 ao_context->ctrl_reg =
776 info->me4000_regbase + ME4000_AO_00_CTRL_REG;
777 ao_context->status_reg =
778 info->me4000_regbase + ME4000_AO_00_STATUS_REG;
779 ao_context->fifo_reg =
780 info->me4000_regbase + ME4000_AO_00_FIFO_REG;
781 ao_context->single_reg =
782 info->me4000_regbase + ME4000_AO_00_SINGLE_REG;
783 ao_context->timer_reg =
784 info->me4000_regbase + ME4000_AO_00_TIMER_REG;
785 ao_context->irq_status_reg =
786 info->me4000_regbase + ME4000_IRQ_STATUS_REG;
787 ao_context->preload_reg =
788 info->me4000_regbase + ME4000_AO_LOADSETREG_XX;
791 ao_context->ctrl_reg =
792 info->me4000_regbase + ME4000_AO_01_CTRL_REG;
793 ao_context->status_reg =
794 info->me4000_regbase + ME4000_AO_01_STATUS_REG;
795 ao_context->fifo_reg =
796 info->me4000_regbase + ME4000_AO_01_FIFO_REG;
797 ao_context->single_reg =
798 info->me4000_regbase + ME4000_AO_01_SINGLE_REG;
799 ao_context->timer_reg =
800 info->me4000_regbase + ME4000_AO_01_TIMER_REG;
801 ao_context->irq_status_reg =
802 info->me4000_regbase + ME4000_IRQ_STATUS_REG;
803 ao_context->preload_reg =
804 info->me4000_regbase + ME4000_AO_LOADSETREG_XX;
807 ao_context->ctrl_reg =
808 info->me4000_regbase + ME4000_AO_02_CTRL_REG;
809 ao_context->status_reg =
810 info->me4000_regbase + ME4000_AO_02_STATUS_REG;
811 ao_context->fifo_reg =
812 info->me4000_regbase + ME4000_AO_02_FIFO_REG;
813 ao_context->single_reg =
814 info->me4000_regbase + ME4000_AO_02_SINGLE_REG;
815 ao_context->timer_reg =
816 info->me4000_regbase + ME4000_AO_02_TIMER_REG;
817 ao_context->irq_status_reg =
818 info->me4000_regbase + ME4000_IRQ_STATUS_REG;
819 ao_context->preload_reg =
820 info->me4000_regbase + ME4000_AO_LOADSETREG_XX;
823 ao_context->ctrl_reg =
824 info->me4000_regbase + ME4000_AO_03_CTRL_REG;
825 ao_context->status_reg =
826 info->me4000_regbase + ME4000_AO_03_STATUS_REG;
827 ao_context->fifo_reg =
828 info->me4000_regbase + ME4000_AO_03_FIFO_REG;
829 ao_context->single_reg =
830 info->me4000_regbase + ME4000_AO_03_SINGLE_REG;
831 ao_context->timer_reg =
832 info->me4000_regbase + ME4000_AO_03_TIMER_REG;
833 ao_context->irq_status_reg =
834 info->me4000_regbase + ME4000_IRQ_STATUS_REG;
835 ao_context->preload_reg =
836 info->me4000_regbase + ME4000_AO_LOADSETREG_XX;
842 if (info->board_p->ao.fifo_count) {
843 /* Request the interrupt line */
845 request_irq(ao_context->irq, me4000_ao_isr,
846 IRQF_DISABLED | IRQF_SHARED,
847 ME4000_NAME, ao_context);
850 "%s:Can't get interrupt line", __func__);
851 kfree(ao_context->circ_buf.buf);
853 release_ao_contexts(info);
858 list_add_tail(&ao_context->list, &info->ao_context_list);
859 ao_context->index = i;
865 static void release_ao_contexts(struct me4000_info *board_info)
867 struct list_head *dac_p;
868 struct me4000_ao_context *ao_context;
870 /* Clear analog output context list */
871 while (!list_empty(&board_info->ao_context_list)) {
872 dac_p = board_info->ao_context_list.next;
873 ao_context = list_entry(dac_p, struct me4000_ao_context, list);
874 free_irq(ao_context->irq, ao_context);
875 kfree(ao_context->circ_buf.buf);
881 static int alloc_ai_context(struct me4000_info *info)
883 struct me4000_ai_context *ai_context;
885 if (info->board_p->ai.count) {
886 ai_context = kzalloc(sizeof(struct me4000_ai_context),
890 "ME4000:alloc_ai_context():Can't get memory for ai context\n");
894 info->ai_context = ai_context;
896 spin_lock_init(&ai_context->use_lock);
897 spin_lock_init(&ai_context->int_lock);
898 ai_context->number = 0;
899 ai_context->irq = info->irq;
900 init_waitqueue_head(&ai_context->wait_queue);
901 ai_context->board_info = info;
903 ai_context->ctrl_reg =
904 info->me4000_regbase + ME4000_AI_CTRL_REG;
905 ai_context->status_reg =
906 info->me4000_regbase + ME4000_AI_STATUS_REG;
907 ai_context->channel_list_reg =
908 info->me4000_regbase + ME4000_AI_CHANNEL_LIST_REG;
909 ai_context->data_reg =
910 info->me4000_regbase + ME4000_AI_DATA_REG;
911 ai_context->chan_timer_reg =
912 info->me4000_regbase + ME4000_AI_CHAN_TIMER_REG;
913 ai_context->chan_pre_timer_reg =
914 info->me4000_regbase + ME4000_AI_CHAN_PRE_TIMER_REG;
915 ai_context->scan_timer_low_reg =
916 info->me4000_regbase + ME4000_AI_SCAN_TIMER_LOW_REG;
917 ai_context->scan_timer_high_reg =
918 info->me4000_regbase + ME4000_AI_SCAN_TIMER_HIGH_REG;
919 ai_context->scan_pre_timer_low_reg =
920 info->me4000_regbase + ME4000_AI_SCAN_PRE_TIMER_LOW_REG;
921 ai_context->scan_pre_timer_high_reg =
922 info->me4000_regbase + ME4000_AI_SCAN_PRE_TIMER_HIGH_REG;
923 ai_context->start_reg =
924 info->me4000_regbase + ME4000_AI_START_REG;
925 ai_context->irq_status_reg =
926 info->me4000_regbase + ME4000_IRQ_STATUS_REG;
927 ai_context->sample_counter_reg =
928 info->me4000_regbase + ME4000_AI_SAMPLE_COUNTER_REG;
934 static int alloc_dio_context(struct me4000_info *info)
936 struct me4000_dio_context *dio_context;
938 if (info->board_p->dio.count) {
939 dio_context = kzalloc(sizeof(struct me4000_dio_context),
943 "ME4000:alloc_dio_context():Can't get memory for dio context\n");
947 info->dio_context = dio_context;
949 spin_lock_init(&dio_context->use_lock);
950 dio_context->board_info = info;
952 dio_context->dio_count = info->board_p->dio.count;
954 dio_context->dir_reg =
955 info->me4000_regbase + ME4000_DIO_DIR_REG;
956 dio_context->ctrl_reg =
957 info->me4000_regbase + ME4000_DIO_CTRL_REG;
958 dio_context->port_0_reg =
959 info->me4000_regbase + ME4000_DIO_PORT_0_REG;
960 dio_context->port_1_reg =
961 info->me4000_regbase + ME4000_DIO_PORT_1_REG;
962 dio_context->port_2_reg =
963 info->me4000_regbase + ME4000_DIO_PORT_2_REG;
964 dio_context->port_3_reg =
965 info->me4000_regbase + ME4000_DIO_PORT_3_REG;
971 static int alloc_cnt_context(struct me4000_info *info)
973 struct me4000_cnt_context *cnt_context;
975 if (info->board_p->cnt.count) {
976 cnt_context = kzalloc(sizeof(struct me4000_cnt_context),
980 "ME4000:alloc_cnt_context():Can't get memory for cnt context\n");
984 info->cnt_context = cnt_context;
986 spin_lock_init(&cnt_context->use_lock);
987 cnt_context->board_info = info;
989 cnt_context->ctrl_reg =
990 info->timer_regbase + ME4000_CNT_CTRL_REG;
991 cnt_context->counter_0_reg =
992 info->timer_regbase + ME4000_CNT_COUNTER_0_REG;
993 cnt_context->counter_1_reg =
994 info->timer_regbase + ME4000_CNT_COUNTER_1_REG;
995 cnt_context->counter_2_reg =
996 info->timer_regbase + ME4000_CNT_COUNTER_2_REG;
1002 static int alloc_ext_int_context(struct me4000_info *info)
1004 struct me4000_ext_int_context *ext_int_context;
1006 if (info->board_p->cnt.count) {
1008 kzalloc(sizeof(struct me4000_ext_int_context), GFP_KERNEL);
1009 if (!ext_int_context) {
1011 "ME4000:alloc_ext_int_context():Can't get memory for cnt context\n");
1015 info->ext_int_context = ext_int_context;
1017 spin_lock_init(&ext_int_context->use_lock);
1018 ext_int_context->board_info = info;
1020 ext_int_context->fasync_ptr = NULL;
1021 ext_int_context->irq = info->irq;
1023 ext_int_context->ctrl_reg =
1024 info->me4000_regbase + ME4000_AI_CTRL_REG;
1025 ext_int_context->irq_status_reg =
1026 info->me4000_regbase + ME4000_IRQ_STATUS_REG;
1032 static int me4000_probe(struct pci_dev *dev, const struct pci_device_id *id)
1035 struct me4000_info *board_info;
1037 CALL_PDEBUG("me4000_probe() is executed\n");
1039 /* Allocate structure for board context */
1040 board_info = kzalloc(sizeof(struct me4000_info), GFP_KERNEL);
1043 "ME4000:Can't get memory for board info structure\n");
1048 /* Add to global linked list */
1049 list_add_tail(&board_info->list, &me4000_board_info_list);
1051 /* Get the PCI base registers */
1052 result = get_registers(dev, board_info);
1054 printk(KERN_ERR "%s:Cannot get registers\n", __func__);
1058 /* Enable the device */
1059 result = pci_enable_device(dev);
1061 printk(KERN_ERR "%s:Cannot enable PCI device\n", __func__);
1065 /* Request the PCI register regions */
1066 result = pci_request_regions(dev, ME4000_NAME);
1068 printk(KERN_ERR "%s:Cannot request I/O regions\n", __func__);
1072 /* Initialize board info */
1073 result = init_board_info(dev, board_info);
1075 printk(KERN_ERR "%s:Cannot init baord info\n", __func__);
1079 /* Download the xilinx firmware */
1080 result = me4000_xilinx_download(board_info);
1082 printk(KERN_ERR "%s:Can't download firmware\n", __func__);
1086 /* Make a hardware reset */
1087 result = me4000_reset_board(board_info);
1089 printk(KERN_ERR "%s :Can't reset board\n", __func__);
1093 /* Allocate analog output context structures */
1094 result = alloc_ao_contexts(board_info);
1096 printk(KERN_ERR "%s:Cannot allocate ao contexts\n", __func__);
1100 /* Allocate analog input context */
1101 result = alloc_ai_context(board_info);
1103 printk(KERN_ERR "%s:Cannot allocate ai context\n", __func__);
1107 /* Allocate digital I/O context */
1108 result = alloc_dio_context(board_info);
1110 printk(KERN_ERR "%s:Cannot allocate dio context\n", __func__);
1114 /* Allocate counter context */
1115 result = alloc_cnt_context(board_info);
1117 printk(KERN_ERR "%s:Cannot allocate cnt context\n", __func__);
1121 /* Allocate external interrupt context */
1122 result = alloc_ext_int_context(board_info);
1125 "%s:Cannot allocate ext_int context\n", __func__);
1132 kfree(board_info->cnt_context);
1135 kfree(board_info->dio_context);
1138 kfree(board_info->ai_context);
1141 release_ao_contexts(board_info);
1144 pci_release_regions(dev);
1147 list_del(&board_info->list);
1154 static int me4000_xilinx_download(struct me4000_info *info)
1159 unsigned char *firm;
1160 wait_queue_head_t queue;
1162 CALL_PDEBUG("me4000_xilinx_download() is executed\n");
1164 init_waitqueue_head(&queue);
1166 firm = (info->device_id == 0x4610) ? xilinx_firm_4610 : xilinx_firm;
1169 * Set PLX local interrupt 2 polarity to high.
1170 * Interrupt is thrown by init pin of xilinx.
1172 outl(0x10, info->plx_regbase + PLX_INTCSR);
1174 /* Set /CS and /WRITE of the Xilinx */
1175 value = inl(info->plx_regbase + PLX_ICR);
1177 outl(value, info->plx_regbase + PLX_ICR);
1179 /* Init Xilinx with CS1 */
1180 inb(info->program_regbase + 0xC8);
1182 /* Wait until /INIT pin is set */
1184 if (!inl(info->plx_regbase + PLX_INTCSR) & 0x20) {
1185 printk(KERN_ERR "%s:Can't init Xilinx\n", __func__);
1189 /* Reset /CS and /WRITE of the Xilinx */
1190 value = inl(info->plx_regbase + PLX_ICR);
1192 outl(value, info->plx_regbase + PLX_ICR);
1194 /* Download Xilinx firmware */
1195 size = (firm[0] << 24) + (firm[1] << 16) + (firm[2] << 8) + firm[3];
1198 for (idx = 0; idx < size; idx++) {
1199 outb(firm[16 + idx], info->program_regbase);
1203 /* Check if BUSY flag is low */
1204 if (inl(info->plx_regbase + PLX_ICR) & 0x20) {
1206 "%s:Xilinx is still busy (idx = %d)\n", __func__,
1212 PDEBUG("me4000_xilinx_download():%d bytes written\n", idx);
1214 /* If done flag is high download was successful */
1215 if (inl(info->plx_regbase + PLX_ICR) & 0x4) {
1216 PDEBUG("me4000_xilinx_download():Done flag is set\n");
1217 PDEBUG("me4000_xilinx_download():Download was successful\n");
1220 "ME4000:%s:DONE flag is not set\n", __func__);
1222 "ME4000:%s:Download not succesful\n", __func__);
1226 /* Set /CS and /WRITE */
1227 value = inl(info->plx_regbase + PLX_ICR);
1229 outl(value, info->plx_regbase + PLX_ICR);
1234 static int me4000_reset_board(struct me4000_info *info)
1238 CALL_PDEBUG("me4000_reset_board() is executed\n");
1240 /* Make a hardware reset */
1241 icr = me4000_inl(info->plx_regbase + PLX_ICR);
1243 me4000_outl(icr, info->plx_regbase + PLX_ICR);
1245 me4000_outl(icr, info->plx_regbase + PLX_ICR);
1247 /* Set both stop bits in the analog input control register */
1248 me4000_outl(ME4000_AI_CTRL_BIT_IMMEDIATE_STOP | ME4000_AI_CTRL_BIT_STOP,
1249 info->me4000_regbase + ME4000_AI_CTRL_REG);
1251 /* Set both stop bits in the analog output control register */
1252 me4000_outl(ME4000_AO_CTRL_BIT_IMMEDIATE_STOP | ME4000_AO_CTRL_BIT_STOP,
1253 info->me4000_regbase + ME4000_AO_00_CTRL_REG);
1254 me4000_outl(ME4000_AO_CTRL_BIT_IMMEDIATE_STOP | ME4000_AO_CTRL_BIT_STOP,
1255 info->me4000_regbase + ME4000_AO_01_CTRL_REG);
1256 me4000_outl(ME4000_AO_CTRL_BIT_IMMEDIATE_STOP | ME4000_AO_CTRL_BIT_STOP,
1257 info->me4000_regbase + ME4000_AO_02_CTRL_REG);
1258 me4000_outl(ME4000_AO_CTRL_BIT_IMMEDIATE_STOP | ME4000_AO_CTRL_BIT_STOP,
1259 info->me4000_regbase + ME4000_AO_03_CTRL_REG);
1261 /* 0x8000 to the DACs means an output voltage of 0V */
1262 me4000_outl(0x8000, info->me4000_regbase + ME4000_AO_00_SINGLE_REG);
1263 me4000_outl(0x8000, info->me4000_regbase + ME4000_AO_01_SINGLE_REG);
1264 me4000_outl(0x8000, info->me4000_regbase + ME4000_AO_02_SINGLE_REG);
1265 me4000_outl(0x8000, info->me4000_regbase + ME4000_AO_03_SINGLE_REG);
1267 /* Enable interrupts on the PLX */
1268 me4000_outl(0x43, info->plx_regbase + PLX_INTCSR);
1270 /* Set the adustment register for AO demux */
1271 me4000_outl(ME4000_AO_DEMUX_ADJUST_VALUE,
1272 info->me4000_regbase + ME4000_AO_DEMUX_ADJUST_REG);
1274 /* Set digital I/O direction for port 0 to output on isolated versions */
1275 if (!(me4000_inl(info->me4000_regbase + ME4000_DIO_DIR_REG) & 0x1)) {
1276 me4000_outl(0x1, info->me4000_regbase + ME4000_DIO_CTRL_REG);
1282 static int me4000_open(struct inode *inode_p, struct file *file_p)
1284 int board, dev, mode;
1287 struct list_head *ptr;
1288 struct me4000_info *board_info = NULL;
1289 struct me4000_ao_context *ao_context = NULL;
1290 struct me4000_ai_context *ai_context = NULL;
1291 struct me4000_dio_context *dio_context = NULL;
1292 struct me4000_cnt_context *cnt_context = NULL;
1293 struct me4000_ext_int_context *ext_int_context = NULL;
1295 CALL_PDEBUG("me4000_open() is executed\n");
1298 if (MAJOR(inode_p->i_rdev) == me4000_ao_major_driver_no) {
1299 board = AO_BOARD(inode_p->i_rdev);
1300 dev = AO_PORT(inode_p->i_rdev);
1301 mode = AO_MODE(inode_p->i_rdev);
1303 PDEBUG("me4000_open():board = %d ao = %d mode = %d\n", board,
1306 /* Search for the board context */
1307 for (ptr = me4000_board_info_list.next, i = 0;
1308 ptr != &me4000_board_info_list; ptr = ptr->next, i++) {
1309 board_info = list_entry(ptr, struct me4000_info, list);
1314 if (ptr == &me4000_board_info_list) {
1316 "ME4000:me4000_open():Board %d not in device list\n",
1321 /* Search for the dac context */
1322 for (ptr = board_info->ao_context_list.next, i = 0;
1323 ptr != &board_info->ao_context_list;
1324 ptr = ptr->next, i++) {
1325 ao_context = list_entry(ptr, struct me4000_ao_context,
1331 if (ptr == &board_info->ao_context_list) {
1333 "ME4000:me4000_open():Device %d not in device list\n",
1338 /* Check if mode is valid */
1341 "ME4000:me4000_open():Mode is not valid\n");
1345 /* Check if mode is valid for this AO */
1346 if ((mode != ME4000_AO_CONV_MODE_SINGLE)
1347 && (dev >= board_info->board_p->ao.fifo_count)) {
1349 "ME4000:me4000_open():AO %d only in single mode available\n",
1354 /* Check if already opened */
1355 spin_lock(&ao_context->use_lock);
1356 if (ao_context->dac_in_use) {
1358 "ME4000:me4000_open():AO %d already in use\n",
1360 spin_unlock(&ao_context->use_lock);
1363 ao_context->dac_in_use = 1;
1364 spin_unlock(&ao_context->use_lock);
1366 ao_context->mode = mode;
1368 /* Hold the context in private data */
1369 file_p->private_data = ao_context;
1371 /* Set file operations pointer */
1372 file_p->f_op = me4000_ao_fops_array[mode];
1374 err = me4000_ao_prepare(ao_context);
1376 ao_context->dac_in_use = 0;
1381 else if (MAJOR(inode_p->i_rdev) == me4000_ai_major_driver_no) {
1382 board = AI_BOARD(inode_p->i_rdev);
1383 mode = AI_MODE(inode_p->i_rdev);
1385 PDEBUG("me4000_open():ai board = %d mode = %d\n", board, mode);
1387 /* Search for the board context */
1388 for (ptr = me4000_board_info_list.next, i = 0;
1389 ptr != &me4000_board_info_list; ptr = ptr->next, i++) {
1390 board_info = list_entry(ptr, struct me4000_info, list);
1395 if (ptr == &me4000_board_info_list) {
1397 "ME4000:me4000_open():Board %d not in device list\n",
1402 ai_context = board_info->ai_context;
1404 /* Check if mode is valid */
1407 "ME4000:me4000_open():Mode is not valid\n");
1411 /* Check if already opened */
1412 spin_lock(&ai_context->use_lock);
1413 if (ai_context->in_use) {
1415 "ME4000:me4000_open():AI already in use\n");
1416 spin_unlock(&ai_context->use_lock);
1419 ai_context->in_use = 1;
1420 spin_unlock(&ai_context->use_lock);
1422 ai_context->mode = mode;
1424 /* Hold the context in private data */
1425 file_p->private_data = ai_context;
1427 /* Set file operations pointer */
1428 file_p->f_op = me4000_ai_fops_array[mode];
1430 /* Prepare analog input */
1431 me4000_ai_prepare(ai_context);
1434 else if (MAJOR(inode_p->i_rdev) == me4000_dio_major_driver_no) {
1435 board = DIO_BOARD(inode_p->i_rdev);
1439 PDEBUG("me4000_open():board = %d\n", board);
1441 /* Search for the board context */
1442 for (ptr = me4000_board_info_list.next;
1443 ptr != &me4000_board_info_list; ptr = ptr->next) {
1444 board_info = list_entry(ptr, struct me4000_info, list);
1445 if (board_info->board_count == board)
1449 if (ptr == &me4000_board_info_list) {
1451 "ME4000:me4000_open():Board %d not in device list\n",
1456 /* Search for the dio context */
1457 dio_context = board_info->dio_context;
1459 /* Check if already opened */
1460 spin_lock(&dio_context->use_lock);
1461 if (dio_context->in_use) {
1463 "ME4000:me4000_open():DIO already in use\n");
1464 spin_unlock(&dio_context->use_lock);
1467 dio_context->in_use = 1;
1468 spin_unlock(&dio_context->use_lock);
1470 /* Hold the context in private data */
1471 file_p->private_data = dio_context;
1473 /* Set file operations pointer to single functions */
1474 file_p->f_op = &me4000_dio_fops;
1476 //me4000_dio_reset(dio_context);
1479 else if (MAJOR(inode_p->i_rdev) == me4000_cnt_major_driver_no) {
1480 board = CNT_BOARD(inode_p->i_rdev);
1484 PDEBUG("me4000_open():board = %d\n", board);
1486 /* Search for the board context */
1487 for (ptr = me4000_board_info_list.next;
1488 ptr != &me4000_board_info_list; ptr = ptr->next) {
1489 board_info = list_entry(ptr, struct me4000_info, list);
1490 if (board_info->board_count == board)
1494 if (ptr == &me4000_board_info_list) {
1496 "ME4000:me4000_open():Board %d not in device list\n",
1501 /* Get the cnt context */
1502 cnt_context = board_info->cnt_context;
1504 /* Check if already opened */
1505 spin_lock(&cnt_context->use_lock);
1506 if (cnt_context->in_use) {
1508 "ME4000:me4000_open():CNT already in use\n");
1509 spin_unlock(&cnt_context->use_lock);
1512 cnt_context->in_use = 1;
1513 spin_unlock(&cnt_context->use_lock);
1515 /* Hold the context in private data */
1516 file_p->private_data = cnt_context;
1518 /* Set file operations pointer to single functions */
1519 file_p->f_op = &me4000_cnt_fops;
1521 /* External Interrupt */
1522 else if (MAJOR(inode_p->i_rdev) == me4000_ext_int_major_driver_no) {
1523 board = EXT_INT_BOARD(inode_p->i_rdev);
1527 PDEBUG("me4000_open():board = %d\n", board);
1529 /* Search for the board context */
1530 for (ptr = me4000_board_info_list.next;
1531 ptr != &me4000_board_info_list; ptr = ptr->next) {
1532 board_info = list_entry(ptr, struct me4000_info, list);
1533 if (board_info->board_count == board)
1537 if (ptr == &me4000_board_info_list) {
1539 "ME4000:me4000_open():Board %d not in device list\n",
1544 /* Get the external interrupt context */
1545 ext_int_context = board_info->ext_int_context;
1547 /* Check if already opened */
1548 spin_lock(&cnt_context->use_lock);
1549 if (ext_int_context->in_use) {
1551 "ME4000:me4000_open():External interrupt already in use\n");
1552 spin_unlock(&ext_int_context->use_lock);
1555 ext_int_context->in_use = 1;
1556 spin_unlock(&ext_int_context->use_lock);
1558 /* Hold the context in private data */
1559 file_p->private_data = ext_int_context;
1561 /* Set file operations pointer to single functions */
1562 file_p->f_op = &me4000_ext_int_fops;
1564 /* Request the interrupt line */
1566 request_irq(ext_int_context->irq, me4000_ext_int_isr,
1567 IRQF_DISABLED | IRQF_SHARED, ME4000_NAME,
1571 "ME4000:me4000_open():Can't get interrupt line");
1572 ext_int_context->in_use = 0;
1576 /* Reset the counter */
1577 me4000_ext_int_disable(ext_int_context);
1579 printk(KERN_ERR "ME4000:me4000_open():Major number unknown\n");
1586 static int me4000_release(struct inode *inode_p, struct file *file_p)
1588 struct me4000_ao_context *ao_context;
1589 struct me4000_ai_context *ai_context;
1590 struct me4000_dio_context *dio_context;
1591 struct me4000_cnt_context *cnt_context;
1592 struct me4000_ext_int_context *ext_int_context;
1594 CALL_PDEBUG("me4000_release() is executed\n");
1596 if (MAJOR(inode_p->i_rdev) == me4000_ao_major_driver_no) {
1597 ao_context = file_p->private_data;
1599 /* Mark DAC as unused */
1600 ao_context->dac_in_use = 0;
1601 } else if (MAJOR(inode_p->i_rdev) == me4000_ai_major_driver_no) {
1602 ai_context = file_p->private_data;
1604 /* Reset the analog input */
1605 me4000_ai_reset(ai_context);
1607 /* Free the interrupt and the circular buffer */
1608 if (ai_context->mode) {
1609 free_irq(ai_context->irq, ai_context);
1610 kfree(ai_context->circ_buf.buf);
1611 ai_context->circ_buf.buf = NULL;
1612 ai_context->circ_buf.head = 0;
1613 ai_context->circ_buf.tail = 0;
1616 /* Mark AI as unused */
1617 ai_context->in_use = 0;
1618 } else if (MAJOR(inode_p->i_rdev) == me4000_dio_major_driver_no) {
1619 dio_context = file_p->private_data;
1621 /* Mark digital I/O as unused */
1622 dio_context->in_use = 0;
1623 } else if (MAJOR(inode_p->i_rdev) == me4000_cnt_major_driver_no) {
1624 cnt_context = file_p->private_data;
1626 /* Mark counters as unused */
1627 cnt_context->in_use = 0;
1628 } else if (MAJOR(inode_p->i_rdev) == me4000_ext_int_major_driver_no) {
1629 ext_int_context = file_p->private_data;
1631 /* Disable the externel interrupt */
1632 me4000_ext_int_disable(ext_int_context);
1634 free_irq(ext_int_context->irq, ext_int_context);
1636 /* Delete the fasync structure and free memory */
1637 me4000_ext_int_fasync(0, file_p, 0);
1639 /* Mark as unused */
1640 ext_int_context->in_use = 0;
1643 "ME4000:me4000_release():Major number unknown\n");
1650 /*------------------------------- Analog output stuff --------------------------------------*/
1652 static int me4000_ao_prepare(struct me4000_ao_context *ao_context)
1654 unsigned long flags;
1656 CALL_PDEBUG("me4000_ao_prepare() is executed\n");
1658 if (ao_context->mode == ME4000_AO_CONV_MODE_CONTINUOUS) {
1659 /* Only do anything if not already in the correct mode */
1660 unsigned long mode = me4000_inl(ao_context->ctrl_reg);
1661 if ((mode & ME4000_AO_CONV_MODE_CONTINUOUS)
1662 && (mode & ME4000_AO_CTRL_BIT_ENABLE_FIFO)) {
1666 /* Stop any conversion */
1667 me4000_ao_immediate_stop(ao_context);
1669 /* Set the control register to default state */
1670 spin_lock_irqsave(&ao_context->int_lock, flags);
1671 me4000_outl(ME4000_AO_CONV_MODE_CONTINUOUS |
1672 ME4000_AO_CTRL_BIT_ENABLE_FIFO |
1673 ME4000_AO_CTRL_BIT_STOP |
1674 ME4000_AO_CTRL_BIT_IMMEDIATE_STOP,
1675 ao_context->ctrl_reg);
1676 spin_unlock_irqrestore(&ao_context->int_lock, flags);
1678 /* Set to fastest sample rate */
1679 me4000_outl(65, ao_context->timer_reg);
1680 } else if (ao_context->mode == ME4000_AO_CONV_MODE_WRAPAROUND) {
1681 /* Only do anything if not already in the correct mode */
1682 unsigned long mode = me4000_inl(ao_context->ctrl_reg);
1683 if ((mode & ME4000_AO_CONV_MODE_WRAPAROUND)
1684 && (mode & ME4000_AO_CTRL_BIT_ENABLE_FIFO)) {
1688 /* Stop any conversion */
1689 me4000_ao_immediate_stop(ao_context);
1691 /* Set the control register to default state */
1692 spin_lock_irqsave(&ao_context->int_lock, flags);
1693 me4000_outl(ME4000_AO_CONV_MODE_WRAPAROUND |
1694 ME4000_AO_CTRL_BIT_ENABLE_FIFO |
1695 ME4000_AO_CTRL_BIT_STOP |
1696 ME4000_AO_CTRL_BIT_IMMEDIATE_STOP,
1697 ao_context->ctrl_reg);
1698 spin_unlock_irqrestore(&ao_context->int_lock, flags);
1700 /* Set to fastest sample rate */
1701 me4000_outl(65, ao_context->timer_reg);
1702 } else if (ao_context->mode == ME4000_AO_CONV_MODE_SINGLE) {
1703 /* Only do anything if not already in the correct mode */
1704 unsigned long mode = me4000_inl(ao_context->ctrl_reg);
1707 (ME4000_AO_CONV_MODE_WRAPAROUND |
1708 ME4000_AO_CONV_MODE_CONTINUOUS))) {
1712 /* Stop any conversion */
1713 me4000_ao_immediate_stop(ao_context);
1715 /* Clear the control register */
1716 spin_lock_irqsave(&ao_context->int_lock, flags);
1717 me4000_outl(0x0, ao_context->ctrl_reg);
1718 spin_unlock_irqrestore(&ao_context->int_lock, flags);
1720 /* Set voltage to 0V */
1721 me4000_outl(0x8000, ao_context->single_reg);
1724 "ME4000:me4000_ao_prepare():Invalid mode specified\n");
1731 static int me4000_ao_reset(struct me4000_ao_context *ao_context)
1734 wait_queue_head_t queue;
1735 unsigned long flags;
1737 CALL_PDEBUG("me4000_ao_reset() is executed\n");
1739 init_waitqueue_head(&queue);
1741 if (ao_context->mode == ME4000_AO_CONV_MODE_WRAPAROUND) {
1743 * First stop conversion of the DAC before reconfigure.
1744 * This is essantial, cause of the state machine.
1745 * If not stopped before configuring mode, it could
1746 * walk in a undefined state.
1748 tmp = me4000_inl(ao_context->ctrl_reg);
1749 tmp |= ME4000_AO_CTRL_BIT_IMMEDIATE_STOP;
1750 me4000_outl(tmp, ao_context->ctrl_reg);
1752 wait_event_timeout(queue,
1753 (inl(ao_context->status_reg) &
1754 ME4000_AO_STATUS_BIT_FSM) == 0,
1757 /* Set to transparent mode */
1758 me4000_ao_simultaneous_disable(ao_context);
1760 /* Set to single mode in order to set default voltage */
1761 me4000_outl(0x0, ao_context->ctrl_reg);
1763 /* Set voltage to 0V */
1764 me4000_outl(0x8000, ao_context->single_reg);
1766 /* Set to fastest sample rate */
1767 me4000_outl(65, ao_context->timer_reg);
1769 /* Set the original mode and enable FIFO */
1770 me4000_outl(ME4000_AO_CONV_MODE_WRAPAROUND |
1771 ME4000_AO_CTRL_BIT_ENABLE_FIFO |
1772 ME4000_AO_CTRL_BIT_STOP |
1773 ME4000_AO_CTRL_BIT_IMMEDIATE_STOP,
1774 ao_context->ctrl_reg);
1775 } else if (ao_context->mode == ME4000_AO_CONV_MODE_CONTINUOUS) {
1777 * First stop conversion of the DAC before reconfigure.
1778 * This is essantial, cause of the state machine.
1779 * If not stopped before configuring mode, it could
1780 * walk in a undefined state.
1782 spin_lock_irqsave(&ao_context->int_lock, flags);
1783 tmp = me4000_inl(ao_context->ctrl_reg);
1784 tmp |= ME4000_AO_CTRL_BIT_STOP;
1785 me4000_outl(tmp, ao_context->ctrl_reg);
1786 spin_unlock_irqrestore(&ao_context->int_lock, flags);
1788 wait_event_timeout(queue,
1789 (inl(ao_context->status_reg) &
1790 ME4000_AO_STATUS_BIT_FSM) == 0,
1793 /* Clear the circular buffer */
1794 ao_context->circ_buf.head = 0;
1795 ao_context->circ_buf.tail = 0;
1797 /* Set to transparent mode */
1798 me4000_ao_simultaneous_disable(ao_context);
1800 /* Set to single mode in order to set default voltage */
1801 spin_lock_irqsave(&ao_context->int_lock, flags);
1802 tmp = me4000_inl(ao_context->ctrl_reg);
1803 me4000_outl(0x0, ao_context->ctrl_reg);
1805 /* Set voltage to 0V */
1806 me4000_outl(0x8000, ao_context->single_reg);
1808 /* Set to fastest sample rate */
1809 me4000_outl(65, ao_context->timer_reg);
1811 /* Set the original mode and enable FIFO */
1812 me4000_outl(ME4000_AO_CONV_MODE_CONTINUOUS |
1813 ME4000_AO_CTRL_BIT_ENABLE_FIFO |
1814 ME4000_AO_CTRL_BIT_STOP |
1815 ME4000_AO_CTRL_BIT_IMMEDIATE_STOP,
1816 ao_context->ctrl_reg);
1817 spin_unlock_irqrestore(&ao_context->int_lock, flags);
1819 /* Set to transparent mode */
1820 me4000_ao_simultaneous_disable(ao_context);
1822 /* Set voltage to 0V */
1823 me4000_outl(0x8000, ao_context->single_reg);
1829 static ssize_t me4000_ao_write_sing(struct file *filep, const char *buff,
1830 size_t cnt, loff_t *offp)
1832 struct me4000_ao_context *ao_context = filep->private_data;
1834 const u16 *buffer = (const u16 *)buff;
1836 CALL_PDEBUG("me4000_ao_write_sing() is executed\n");
1840 "%s:Write count is not 2\n", __func__);
1844 if (get_user(value, buffer)) {
1846 "%s:Cannot copy data from user\n", __func__);
1850 me4000_outl(value, ao_context->single_reg);
1855 static ssize_t me4000_ao_write_wrap(struct file *filep, const char *buff,
1856 size_t cnt, loff_t *offp)
1858 struct me4000_ao_context *ao_context = filep->private_data;
1862 const u16 *buffer = (const u16 *)buff;
1863 size_t count = cnt / 2;
1865 CALL_PDEBUG("me4000_ao_write_wrap() is executed\n");
1867 /* Check if a conversion is already running */
1868 if (inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM) {
1870 "%s:There is already a conversion running\n", __func__);
1874 if (count > ME4000_AO_FIFO_COUNT) {
1876 "%s:Can't load more than %d values\n", __func__,
1877 ME4000_AO_FIFO_COUNT);
1881 /* Reset the FIFO */
1882 tmp = inl(ao_context->ctrl_reg);
1883 tmp &= ~ME4000_AO_CTRL_BIT_ENABLE_FIFO;
1884 outl(tmp, ao_context->ctrl_reg);
1885 tmp |= ME4000_AO_CTRL_BIT_ENABLE_FIFO;
1886 outl(tmp, ao_context->ctrl_reg);
1888 for (i = 0; i < count; i++) {
1889 if (get_user(value, buffer + i)) {
1891 "%s:Cannot copy data from user\n", __func__);
1894 if (((ao_context->fifo_reg & 0xFF) == ME4000_AO_01_FIFO_REG)
1895 || ((ao_context->fifo_reg & 0xFF) == ME4000_AO_03_FIFO_REG))
1896 value = value << 16;
1897 outl(value, ao_context->fifo_reg);
1899 CALL_PDEBUG("me4000_ao_write_wrap() is leaved with %d\n", i * 2);
1904 static ssize_t me4000_ao_write_cont(struct file *filep, const char *buff,
1905 size_t cnt, loff_t *offp)
1907 struct me4000_ao_context *ao_context = filep->private_data;
1908 const u16 *buffer = (const u16 *)buff;
1909 size_t count = cnt / 2;
1910 unsigned long flags;
1918 wait_queue_head_t queue;
1920 CALL_PDEBUG("me4000_ao_write_cont() is executed\n");
1922 init_waitqueue_head(&queue);
1926 PDEBUG("me4000_ao_write_cont():Count is 0\n");
1930 if (filep->f_flags & O_APPEND) {
1931 PDEBUG("me4000_ao_write_cont():Append data to data stream\n");
1933 if (filep->f_flags & O_NONBLOCK) {
1934 if (ao_context->pipe_flag) {
1936 "ME4000:me4000_ao_write_cont():Broken pipe in nonblocking write\n");
1939 c = me4000_space_to_end(ao_context->circ_buf,
1940 ME4000_AO_BUFFER_COUNT);
1943 ("me4000_ao_write_cont():Returning from nonblocking write\n");
1947 wait_event_interruptible(ao_context->wait_queue,
1950 (ao_context->circ_buf,
1951 ME4000_AO_BUFFER_COUNT)));
1952 if (ao_context->pipe_flag) {
1954 "me4000_ao_write_cont():Broken pipe in blocking write\n");
1957 if (signal_pending(current)) {
1959 "me4000_ao_write_cont():Wait for free buffer interrupted from signal\n");
1964 PDEBUG("me4000_ao_write_cont():Space to end = %d\n", c);
1966 /* Only able to write size of free buffer or size of count */
1971 k -= copy_from_user(ao_context->circ_buf.buf +
1972 ao_context->circ_buf.head, buffer,
1976 ("me4000_ao_write_cont():Copy %d values from user space\n",
1982 ao_context->circ_buf.head =
1983 (ao_context->circ_buf.head +
1984 c) & (ME4000_AO_BUFFER_COUNT - 1);
1989 /* Values are now available so enable interrupts */
1990 spin_lock_irqsave(&ao_context->int_lock, flags);
1991 if (me4000_buf_count
1992 (ao_context->circ_buf, ME4000_AO_BUFFER_COUNT)) {
1993 tmp = me4000_inl(ao_context->ctrl_reg);
1994 tmp |= ME4000_AO_CTRL_BIT_ENABLE_IRQ;
1995 me4000_outl(tmp, ao_context->ctrl_reg);
1997 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2000 /* Wait until the state machine is stopped if O_SYNC is set */
2001 if (filep->f_flags & O_SYNC) {
2002 while (inl(ao_context->status_reg) &
2003 ME4000_AO_STATUS_BIT_FSM) {
2004 interruptible_sleep_on_timeout(&queue, 1);
2005 if (ao_context->pipe_flag) {
2007 ("me4000_ao_write_cont():Broken pipe detected after sync\n");
2010 if (signal_pending(current)) {
2012 "me4000_ao_write_cont():Wait on state machine after sync interrupted\n");
2018 PDEBUG("me4000_ao_write_cont():Preload DAC FIFO\n");
2019 if ((me4000_inl(ao_context->status_reg) &
2020 ME4000_AO_STATUS_BIT_FSM)) {
2022 "me4000_ao_write_cont():Can't Preload DAC FIFO while conversion is running\n");
2026 /* Clear the FIFO */
2027 spin_lock_irqsave(&ao_context->int_lock, flags);
2028 tmp = me4000_inl(ao_context->ctrl_reg);
2030 ~(ME4000_AO_CTRL_BIT_ENABLE_FIFO |
2031 ME4000_AO_CTRL_BIT_ENABLE_IRQ);
2032 me4000_outl(tmp, ao_context->ctrl_reg);
2033 tmp |= ME4000_AO_CTRL_BIT_ENABLE_FIFO;
2034 me4000_outl(tmp, ao_context->ctrl_reg);
2035 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2037 /* Clear the circular buffer */
2038 ao_context->circ_buf.head = 0;
2039 ao_context->circ_buf.tail = 0;
2041 /* Reset the broken pipe flag */
2042 ao_context->pipe_flag = 0;
2044 /* Only able to write size of fifo or count */
2045 c = ME4000_AO_FIFO_COUNT;
2050 ("me4000_ao_write_cont():Write %d values to DAC on 0x%lX\n",
2051 c, ao_context->fifo_reg);
2053 /* Write values to the fifo */
2054 for (i = 0; i < c; i++) {
2055 if (get_user(svalue, buffer))
2058 if (((ao_context->fifo_reg & 0xFF) ==
2059 ME4000_AO_01_FIFO_REG)
2060 || ((ao_context->fifo_reg & 0xFF) ==
2061 ME4000_AO_03_FIFO_REG)) {
2062 lvalue = ((u32) svalue) << 16;
2064 lvalue = (u32) svalue;
2066 outl(lvalue, ao_context->fifo_reg);
2073 /* Get free buffer */
2074 c = me4000_space_to_end(ao_context->circ_buf,
2075 ME4000_AO_BUFFER_COUNT);
2080 /* Only able to write size of free buffer or size of count */
2084 /* If count = 0 return to user */
2087 ("me4000_ao_write_cont():Count reached 0\n");
2092 k -= copy_from_user(ao_context->circ_buf.buf +
2093 ao_context->circ_buf.head, buffer,
2097 ("me4000_ao_write_cont():Wrote %d values to buffer\n",
2103 ao_context->circ_buf.head =
2104 (ao_context->circ_buf.head +
2105 c) & (ME4000_AO_BUFFER_COUNT - 1);
2110 /* If values in the buffer are available so enable interrupts */
2111 spin_lock_irqsave(&ao_context->int_lock, flags);
2112 if (me4000_buf_count
2113 (ao_context->circ_buf, ME4000_AO_BUFFER_COUNT)) {
2115 ("me4000_ao_write_cont():Enable Interrupts\n");
2116 tmp = me4000_inl(ao_context->ctrl_reg);
2117 tmp |= ME4000_AO_CTRL_BIT_ENABLE_IRQ;
2118 me4000_outl(tmp, ao_context->ctrl_reg);
2120 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2124 if (filep->f_flags & O_NONBLOCK) {
2125 return (ret == 0) ? -EAGAIN : 2 * ret;
2131 static unsigned int me4000_ao_poll_cont(struct file *file_p, poll_table *wait)
2133 struct me4000_ao_context *ao_context;
2134 unsigned long mask = 0;
2136 CALL_PDEBUG("me4000_ao_poll_cont() is executed\n");
2138 ao_context = file_p->private_data;
2140 poll_wait(file_p, &ao_context->wait_queue, wait);
2142 /* Get free buffer */
2143 if (me4000_space_to_end(ao_context->circ_buf, ME4000_AO_BUFFER_COUNT))
2144 mask |= POLLOUT | POLLWRNORM;
2146 CALL_PDEBUG("me4000_ao_poll_cont():Return mask %lX\n", mask);
2151 static int me4000_ao_fsync_cont(struct file *file_p, struct dentry *dentry_p,
2154 struct me4000_ao_context *ao_context;
2155 wait_queue_head_t queue;
2157 CALL_PDEBUG("me4000_ao_fsync_cont() is executed\n");
2159 ao_context = file_p->private_data;
2160 init_waitqueue_head(&queue);
2162 while (inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM) {
2163 interruptible_sleep_on_timeout(&queue, 1);
2164 wait_event_interruptible_timeout(queue,
2165 !(inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM),
2167 if (ao_context->pipe_flag) {
2169 "%s:Broken pipe detected\n", __func__);
2173 if (signal_pending(current)) {
2175 "%s:Wait on state machine interrupted\n",
2184 static int me4000_ao_ioctl_sing(struct inode *inode_p, struct file *file_p,
2185 unsigned int service, unsigned long arg)
2187 struct me4000_ao_context *ao_context;
2189 CALL_PDEBUG("me4000_ao_ioctl_sing() is executed\n");
2191 ao_context = file_p->private_data;
2193 if (_IOC_TYPE(service) != ME4000_MAGIC) {
2195 PDEBUG("me4000_ao_ioctl_sing():Wrong magic number\n");
2199 case ME4000_AO_EX_TRIG_SETUP:
2200 return me4000_ao_ex_trig_set_edge((int *)arg, ao_context);
2201 case ME4000_AO_EX_TRIG_ENABLE:
2202 return me4000_ao_ex_trig_enable(ao_context);
2203 case ME4000_AO_EX_TRIG_DISABLE:
2204 return me4000_ao_ex_trig_disable(ao_context);
2205 case ME4000_AO_PRELOAD:
2206 return me4000_ao_preload(ao_context);
2207 case ME4000_AO_PRELOAD_UPDATE:
2208 return me4000_ao_preload_update(ao_context);
2209 case ME4000_GET_USER_INFO:
2210 return me4000_get_user_info((struct me4000_user_info *)arg,
2211 ao_context->board_info);
2212 case ME4000_AO_SIMULTANEOUS_EX_TRIG:
2213 return me4000_ao_simultaneous_ex_trig(ao_context);
2214 case ME4000_AO_SIMULTANEOUS_SW:
2215 return me4000_ao_simultaneous_sw(ao_context);
2216 case ME4000_AO_SIMULTANEOUS_DISABLE:
2217 return me4000_ao_simultaneous_disable(ao_context);
2218 case ME4000_AO_SIMULTANEOUS_UPDATE:
2220 me4000_ao_simultaneous_update(
2221 (struct me4000_ao_channel_list *)arg,
2223 case ME4000_AO_EX_TRIG_TIMEOUT:
2224 return me4000_ao_ex_trig_timeout((unsigned long *)arg,
2226 case ME4000_AO_DISABLE_DO:
2227 return me4000_ao_disable_do(ao_context);
2230 "me4000_ao_ioctl_sing():Service number invalid\n");
2237 static int me4000_ao_ioctl_wrap(struct inode *inode_p, struct file *file_p,
2238 unsigned int service, unsigned long arg)
2240 struct me4000_ao_context *ao_context;
2242 CALL_PDEBUG("me4000_ao_ioctl_wrap() is executed\n");
2244 ao_context = file_p->private_data;
2246 if (_IOC_TYPE(service) != ME4000_MAGIC) {
2248 PDEBUG("me4000_ao_ioctl_wrap():Wrong magic number\n");
2252 case ME4000_AO_START:
2253 return me4000_ao_start((unsigned long *)arg, ao_context);
2254 case ME4000_AO_STOP:
2255 return me4000_ao_stop(ao_context);
2256 case ME4000_AO_IMMEDIATE_STOP:
2257 return me4000_ao_immediate_stop(ao_context);
2258 case ME4000_AO_RESET:
2259 return me4000_ao_reset(ao_context);
2260 case ME4000_AO_TIMER_SET_DIVISOR:
2261 return me4000_ao_timer_set_divisor((u32 *) arg, ao_context);
2262 case ME4000_AO_EX_TRIG_SETUP:
2263 return me4000_ao_ex_trig_set_edge((int *)arg, ao_context);
2264 case ME4000_AO_EX_TRIG_ENABLE:
2265 return me4000_ao_ex_trig_enable(ao_context);
2266 case ME4000_AO_EX_TRIG_DISABLE:
2267 return me4000_ao_ex_trig_disable(ao_context);
2268 case ME4000_GET_USER_INFO:
2269 return me4000_get_user_info((struct me4000_user_info *)arg,
2270 ao_context->board_info);
2271 case ME4000_AO_FSM_STATE:
2272 return me4000_ao_fsm_state((int *)arg, ao_context);
2273 case ME4000_AO_ENABLE_DO:
2274 return me4000_ao_enable_do(ao_context);
2275 case ME4000_AO_DISABLE_DO:
2276 return me4000_ao_disable_do(ao_context);
2277 case ME4000_AO_SYNCHRONOUS_EX_TRIG:
2278 return me4000_ao_synchronous_ex_trig(ao_context);
2279 case ME4000_AO_SYNCHRONOUS_SW:
2280 return me4000_ao_synchronous_sw(ao_context);
2281 case ME4000_AO_SYNCHRONOUS_DISABLE:
2282 return me4000_ao_synchronous_disable(ao_context);
2289 static int me4000_ao_ioctl_cont(struct inode *inode_p, struct file *file_p,
2290 unsigned int service, unsigned long arg)
2292 struct me4000_ao_context *ao_context;
2294 CALL_PDEBUG("me4000_ao_ioctl_cont() is executed\n");
2296 ao_context = file_p->private_data;
2298 if (_IOC_TYPE(service) != ME4000_MAGIC) {
2300 PDEBUG("me4000_ao_ioctl_cont():Wrong magic number\n");
2304 case ME4000_AO_START:
2305 return me4000_ao_start((unsigned long *)arg, ao_context);
2306 case ME4000_AO_STOP:
2307 return me4000_ao_stop(ao_context);
2308 case ME4000_AO_IMMEDIATE_STOP:
2309 return me4000_ao_immediate_stop(ao_context);
2310 case ME4000_AO_RESET:
2311 return me4000_ao_reset(ao_context);
2312 case ME4000_AO_TIMER_SET_DIVISOR:
2313 return me4000_ao_timer_set_divisor((u32 *) arg, ao_context);
2314 case ME4000_AO_EX_TRIG_SETUP:
2315 return me4000_ao_ex_trig_set_edge((int *)arg, ao_context);
2316 case ME4000_AO_EX_TRIG_ENABLE:
2317 return me4000_ao_ex_trig_enable(ao_context);
2318 case ME4000_AO_EX_TRIG_DISABLE:
2319 return me4000_ao_ex_trig_disable(ao_context);
2320 case ME4000_AO_ENABLE_DO:
2321 return me4000_ao_enable_do(ao_context);
2322 case ME4000_AO_DISABLE_DO:
2323 return me4000_ao_disable_do(ao_context);
2324 case ME4000_AO_FSM_STATE:
2325 return me4000_ao_fsm_state((int *)arg, ao_context);
2326 case ME4000_GET_USER_INFO:
2327 return me4000_get_user_info((struct me4000_user_info *)arg,
2328 ao_context->board_info);
2329 case ME4000_AO_SYNCHRONOUS_EX_TRIG:
2330 return me4000_ao_synchronous_ex_trig(ao_context);
2331 case ME4000_AO_SYNCHRONOUS_SW:
2332 return me4000_ao_synchronous_sw(ao_context);
2333 case ME4000_AO_SYNCHRONOUS_DISABLE:
2334 return me4000_ao_synchronous_disable(ao_context);
2335 case ME4000_AO_GET_FREE_BUFFER:
2336 return me4000_ao_get_free_buffer((unsigned long *)arg,
2344 static int me4000_ao_start(unsigned long *arg,
2345 struct me4000_ao_context *ao_context)
2348 wait_queue_head_t queue;
2350 unsigned long timeout;
2351 unsigned long flags;
2353 CALL_PDEBUG("me4000_ao_start() is executed\n");
2355 if (get_user(timeout, arg)) {
2357 "me4000_ao_start():Cannot copy data from user\n");
2361 init_waitqueue_head(&queue);
2363 spin_lock_irqsave(&ao_context->int_lock, flags);
2364 tmp = inl(ao_context->ctrl_reg);
2365 tmp &= ~(ME4000_AO_CTRL_BIT_STOP | ME4000_AO_CTRL_BIT_IMMEDIATE_STOP);
2366 me4000_outl(tmp, ao_context->ctrl_reg);
2367 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2369 if ((tmp & ME4000_AO_CTRL_BIT_ENABLE_EX_TRIG)) {
2373 (inl(ao_context->status_reg) &
2374 ME4000_AO_STATUS_BIT_FSM)) {
2375 interruptible_sleep_on_timeout(&queue, 1);
2376 if (signal_pending(current)) {
2378 "ME4000:me4000_ao_start():Wait on start of state machine interrupted\n");
2381 if (((jiffies - ref) > (timeout * HZ / USER_HZ))) { // 2.6 has diffrent definitions for HZ in user and kernel space
2383 "ME4000:me4000_ao_start():Timeout reached\n");
2389 me4000_outl(0x8000, ao_context->single_reg);
2395 static int me4000_ao_stop(struct me4000_ao_context *ao_context)
2398 wait_queue_head_t queue;
2399 unsigned long flags;
2401 init_waitqueue_head(&queue);
2403 CALL_PDEBUG("me4000_ao_stop() is executed\n");
2405 /* Set the stop bit */
2406 spin_lock_irqsave(&ao_context->int_lock, flags);
2407 tmp = inl(ao_context->ctrl_reg);
2408 tmp |= ME4000_AO_CTRL_BIT_STOP;
2409 me4000_outl(tmp, ao_context->ctrl_reg);
2410 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2412 while (inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM) {
2413 interruptible_sleep_on_timeout(&queue, 1);
2414 if (signal_pending(current)) {
2416 "me4000_ao_stop():Wait on state machine after stop interrupted\n");
2421 /* Clear the stop bit */
2422 //tmp &= ~ME4000_AO_CTRL_BIT_STOP;
2423 //me4000_outl(tmp, ao_context->ctrl_reg);
2428 static int me4000_ao_immediate_stop(struct me4000_ao_context *ao_context)
2431 wait_queue_head_t queue;
2432 unsigned long flags;
2434 init_waitqueue_head(&queue);
2436 CALL_PDEBUG("me4000_ao_immediate_stop() is executed\n");
2438 spin_lock_irqsave(&ao_context->int_lock, flags);
2439 tmp = inl(ao_context->ctrl_reg);
2440 tmp |= ME4000_AO_CTRL_BIT_STOP | ME4000_AO_CTRL_BIT_IMMEDIATE_STOP;
2441 me4000_outl(tmp, ao_context->ctrl_reg);
2442 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2444 while (inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM) {
2445 interruptible_sleep_on_timeout(&queue, 1);
2446 if (signal_pending(current)) {
2448 "me4000_ao_immediate_stop():Wait on state machine after stop interrupted\n");
2453 /* Clear the stop bits */
2454 //tmp &= ~(ME4000_AO_CTRL_BIT_STOP | ME4000_AO_CTRL_BIT_IMMEDIATE_STOP);
2455 //me4000_outl(tmp, ao_context->ctrl_reg);
2460 static int me4000_ao_timer_set_divisor(u32 *arg,
2461 struct me4000_ao_context *ao_context)
2466 CALL_PDEBUG("me4000_ao_timer set_divisor() is executed\n");
2468 if (get_user(divisor, arg))
2471 /* Check if the state machine is stopped */
2472 tmp = me4000_inl(ao_context->status_reg);
2473 if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2475 "me4000_ao_timer_set_divisor():Can't set timer while DAC is running\n");
2479 PDEBUG("me4000_ao_timer set_divisor():Divisor from user = %d\n",
2482 /* Check if the divisor is right. ME4000_AO_MIN_TICKS is the lowest */
2483 if (divisor < ME4000_AO_MIN_TICKS) {
2485 "ME4000:me4000_ao_timer set_divisor():Divisor to low\n");
2489 /* Fix bug in Firmware */
2492 PDEBUG("me4000_ao_timer set_divisor():Divisor to HW = %d\n", divisor);
2494 /* Write the divisor */
2495 me4000_outl(divisor, ao_context->timer_reg);
2500 static int me4000_ao_ex_trig_set_edge(int *arg,
2501 struct me4000_ao_context *ao_context)
2505 unsigned long flags;
2507 CALL_PDEBUG("me4000_ao_ex_trig_set_edge() is executed\n");
2509 if (get_user(mode, arg))
2512 /* Check if the state machine is stopped */
2513 tmp = me4000_inl(ao_context->status_reg);
2514 if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2516 "me4000_ao_ex_trig_set_edge():Can't set trigger while DAC is running\n");
2520 if (mode == ME4000_AO_TRIGGER_EXT_EDGE_RISING) {
2521 spin_lock_irqsave(&ao_context->int_lock, flags);
2522 tmp = me4000_inl(ao_context->ctrl_reg);
2524 ~(ME4000_AO_CTRL_BIT_EX_TRIG_EDGE |
2525 ME4000_AO_CTRL_BIT_EX_TRIG_BOTH);
2526 me4000_outl(tmp, ao_context->ctrl_reg);
2527 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2528 } else if (mode == ME4000_AO_TRIGGER_EXT_EDGE_FALLING) {
2529 spin_lock_irqsave(&ao_context->int_lock, flags);
2530 tmp = me4000_inl(ao_context->ctrl_reg);
2531 tmp &= ~ME4000_AO_CTRL_BIT_EX_TRIG_BOTH;
2532 tmp |= ME4000_AO_CTRL_BIT_EX_TRIG_EDGE;
2533 me4000_outl(tmp, ao_context->ctrl_reg);
2534 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2535 } else if (mode == ME4000_AO_TRIGGER_EXT_EDGE_BOTH) {
2536 spin_lock_irqsave(&ao_context->int_lock, flags);
2537 tmp = me4000_inl(ao_context->ctrl_reg);
2539 ME4000_AO_CTRL_BIT_EX_TRIG_EDGE |
2540 ME4000_AO_CTRL_BIT_EX_TRIG_BOTH;
2541 me4000_outl(tmp, ao_context->ctrl_reg);
2542 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2545 "me4000_ao_ex_trig_set_edge():Invalid trigger mode\n");
2552 static int me4000_ao_ex_trig_enable(struct me4000_ao_context *ao_context)
2555 unsigned long flags;
2557 CALL_PDEBUG("me4000_ao_ex_trig_enable() is executed\n");
2559 /* Check if the state machine is stopped */
2560 tmp = me4000_inl(ao_context->status_reg);
2561 if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2563 "me4000_ao_ex_trig_enable():Can't enable trigger while DAC is running\n");
2567 spin_lock_irqsave(&ao_context->int_lock, flags);
2568 tmp = me4000_inl(ao_context->ctrl_reg);
2569 tmp |= ME4000_AO_CTRL_BIT_ENABLE_EX_TRIG;
2570 me4000_outl(tmp, ao_context->ctrl_reg);
2571 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2576 static int me4000_ao_ex_trig_disable(struct me4000_ao_context *ao_context)
2579 unsigned long flags;
2581 CALL_PDEBUG("me4000_ao_ex_trig_disable() is executed\n");
2583 /* Check if the state machine is stopped */
2584 tmp = me4000_inl(ao_context->status_reg);
2585 if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2587 "me4000_ao_ex_trig_disable():Can't disable trigger while DAC is running\n");
2591 spin_lock_irqsave(&ao_context->int_lock, flags);
2592 tmp = me4000_inl(ao_context->ctrl_reg);
2593 tmp &= ~ME4000_AO_CTRL_BIT_ENABLE_EX_TRIG;
2594 me4000_outl(tmp, ao_context->ctrl_reg);
2595 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2600 static int me4000_ao_simultaneous_disable(struct me4000_ao_context *ao_context)
2604 CALL_PDEBUG("me4000_ao_simultaneous_disable() is executed\n");
2606 /* Check if the state machine is stopped */
2607 /* Be careful here because this function is called from
2608 me4000_ao_synchronous disable */
2609 tmp = me4000_inl(ao_context->status_reg);
2610 if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2612 "me4000_ao_simultaneous_disable():Can't disable while DAC is running\n");
2616 spin_lock(&ao_context->board_info->preload_lock);
2617 tmp = me4000_inl(ao_context->preload_reg);
2618 tmp &= ~(0x1 << ao_context->index); // Disable preload bit
2619 tmp &= ~(0x1 << (ao_context->index + 16)); // Disable hw simultaneous bit
2620 me4000_outl(tmp, ao_context->preload_reg);
2621 spin_unlock(&ao_context->board_info->preload_lock);
2626 static int me4000_ao_simultaneous_ex_trig(struct me4000_ao_context *ao_context)
2630 CALL_PDEBUG("me4000_ao_simultaneous_ex_trig() is executed\n");
2632 spin_lock(&ao_context->board_info->preload_lock);
2633 tmp = me4000_inl(ao_context->preload_reg);
2634 tmp |= (0x1 << ao_context->index); // Enable preload bit
2635 tmp |= (0x1 << (ao_context->index + 16)); // Enable hw simultaneous bit
2636 me4000_outl(tmp, ao_context->preload_reg);
2637 spin_unlock(&ao_context->board_info->preload_lock);
2642 static int me4000_ao_simultaneous_sw(struct me4000_ao_context *ao_context)
2646 CALL_PDEBUG("me4000_ao_simultaneous_sw() is executed\n");
2648 spin_lock(&ao_context->board_info->preload_lock);
2649 tmp = me4000_inl(ao_context->preload_reg);
2650 tmp |= (0x1 << ao_context->index); // Enable preload bit
2651 tmp &= ~(0x1 << (ao_context->index + 16)); // Disable hw simultaneous bit
2652 me4000_outl(tmp, ao_context->preload_reg);
2653 spin_unlock(&ao_context->board_info->preload_lock);
2658 static int me4000_ao_preload(struct me4000_ao_context *ao_context)
2660 CALL_PDEBUG("me4000_ao_preload() is executed\n");
2661 return me4000_ao_simultaneous_sw(ao_context);
2664 static int me4000_ao_preload_update(struct me4000_ao_context *ao_context)
2668 struct list_head *entry;
2670 CALL_PDEBUG("me4000_ao_preload_update() is executed\n");
2672 spin_lock(&ao_context->board_info->preload_lock);
2673 tmp = me4000_inl(ao_context->preload_reg);
2674 list_for_each(entry, &ao_context->board_info->ao_context_list) {
2675 /* The channels we update must be in the following state :
2677 - Hardware trigger is disabled
2678 - Corresponding simultaneous bit is reset
2680 ctrl = me4000_inl(ao_context->ctrl_reg);
2683 (ME4000_AO_CTRL_BIT_MODE_0 | ME4000_AO_CTRL_BIT_MODE_1 |
2684 ME4000_AO_CTRL_BIT_ENABLE_EX_TRIG))) {
2688 (((struct me4000_ao_context *)entry)->index
2692 (((struct me4000_ao_context *)entry)->
2697 me4000_outl(tmp, ao_context->preload_reg);
2698 spin_unlock(&ao_context->board_info->preload_lock);
2703 static int me4000_ao_simultaneous_update(struct me4000_ao_channel_list *arg,
2704 struct me4000_ao_context *ao_context)
2709 struct me4000_ao_channel_list channels;
2711 CALL_PDEBUG("me4000_ao_simultaneous_update() is executed\n");
2713 /* Copy data from user */
2714 err = copy_from_user(&channels, arg,
2715 sizeof(struct me4000_ao_channel_list));
2718 "ME4000:me4000_ao_simultaneous_update():Can't copy command\n");
2723 kzalloc(sizeof(unsigned long) * channels.count, GFP_KERNEL);
2724 if (!channels.list) {
2726 "ME4000:me4000_ao_simultaneous_update():Can't get buffer\n");
2730 /* Copy channel list from user */
2732 copy_from_user(channels.list, arg->list,
2733 sizeof(unsigned long) * channels.count);
2736 "ME4000:me4000_ao_simultaneous_update():Can't copy list\n");
2737 kfree(channels.list);
2741 spin_lock(&ao_context->board_info->preload_lock);
2742 tmp = me4000_inl(ao_context->preload_reg);
2743 for (i = 0; i < channels.count; i++) {
2744 if (channels.list[i] >
2745 ao_context->board_info->board_p->ao.count) {
2746 spin_unlock(&ao_context->board_info->preload_lock);
2747 kfree(channels.list);
2749 "ME4000:me4000_ao_simultaneous_update():Invalid board number specified\n");
2752 tmp &= ~(0x1 << channels.list[i]); // Clear the preload bit
2753 tmp &= ~(0x1 << (channels.list[i] + 16)); // Clear the hw simultaneous bit
2755 me4000_outl(tmp, ao_context->preload_reg);
2756 spin_unlock(&ao_context->board_info->preload_lock);
2757 kfree(channels.list);
2762 static int me4000_ao_synchronous_ex_trig(struct me4000_ao_context *ao_context)
2765 unsigned long flags;
2767 CALL_PDEBUG("me4000_ao_synchronous_ex_trig() is executed\n");
2769 /* Check if the state machine is stopped */
2770 tmp = me4000_inl(ao_context->status_reg);
2771 if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2773 "me4000_ao_synchronous_ex_trig(): DAC is running\n");
2777 spin_lock(&ao_context->board_info->preload_lock);
2778 tmp = me4000_inl(ao_context->preload_reg);
2779 tmp &= ~(0x1 << ao_context->index); // Disable synchronous sw bit
2780 tmp |= 0x1 << (ao_context->index + 16); // Enable synchronous hw bit
2781 me4000_outl(tmp, ao_context->preload_reg);
2782 spin_unlock(&ao_context->board_info->preload_lock);
2785 spin_lock_irqsave(&ao_context->int_lock, flags);
2786 tmp = me4000_inl(ao_context->ctrl_reg);
2787 if (tmp & (ME4000_AO_CTRL_BIT_MODE_0 | ME4000_AO_CTRL_BIT_MODE_1)) {
2789 ~(ME4000_AO_CTRL_BIT_STOP |
2790 ME4000_AO_CTRL_BIT_IMMEDIATE_STOP);
2791 me4000_outl(tmp, ao_context->ctrl_reg);
2793 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2798 static int me4000_ao_synchronous_sw(struct me4000_ao_context *ao_context)
2801 unsigned long flags;
2803 CALL_PDEBUG("me4000_ao_synchronous_sw() is executed\n");
2805 /* Check if the state machine is stopped */
2806 tmp = me4000_inl(ao_context->status_reg);
2807 if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2808 printk(KERN_ERR "me4000_ao_synchronous_sw(): DAC is running\n");
2812 spin_lock(&ao_context->board_info->preload_lock);
2813 tmp = me4000_inl(ao_context->preload_reg);
2814 tmp |= 0x1 << ao_context->index; // Enable synchronous sw bit
2815 tmp &= ~(0x1 << (ao_context->index + 16)); // Disable synchronous hw bit
2816 me4000_outl(tmp, ao_context->preload_reg);
2817 spin_unlock(&ao_context->board_info->preload_lock);
2820 spin_lock_irqsave(&ao_context->int_lock, flags);
2821 tmp = me4000_inl(ao_context->ctrl_reg);
2822 if (tmp & (ME4000_AO_CTRL_BIT_MODE_0 | ME4000_AO_CTRL_BIT_MODE_1)) {
2824 ~(ME4000_AO_CTRL_BIT_STOP |
2825 ME4000_AO_CTRL_BIT_IMMEDIATE_STOP);
2826 me4000_outl(tmp, ao_context->ctrl_reg);
2828 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2833 static int me4000_ao_synchronous_disable(struct me4000_ao_context *ao_context)
2835 return me4000_ao_simultaneous_disable(ao_context);
2838 static int me4000_ao_get_free_buffer(unsigned long *arg,
2839 struct me4000_ao_context *ao_context)
2844 c = me4000_buf_space(ao_context->circ_buf, ME4000_AO_BUFFER_COUNT);
2846 err = copy_to_user(arg, &c, sizeof(unsigned long));
2849 "%s:Can't copy to user space\n", __func__);
2856 static int me4000_ao_ex_trig_timeout(unsigned long *arg,
2857 struct me4000_ao_context *ao_context)
2860 wait_queue_head_t queue;
2862 unsigned long timeout;
2864 CALL_PDEBUG("me4000_ao_ex_trig_timeout() is executed\n");
2866 if (get_user(timeout, arg)) {
2868 "me4000_ao_ex_trig_timeout():Cannot copy data from user\n");
2872 init_waitqueue_head(&queue);
2874 tmp = inl(ao_context->ctrl_reg);
2876 if ((tmp & ME4000_AO_CTRL_BIT_ENABLE_EX_TRIG)) {
2879 while ((inl(ao_context->status_reg) &
2880 ME4000_AO_STATUS_BIT_FSM)) {
2881 interruptible_sleep_on_timeout(&queue, 1);
2882 if (signal_pending(current)) {
2884 "ME4000:me4000_ao_ex_trig_timeout():Wait on start of state machine interrupted\n");
2887 if (((jiffies - ref) > (timeout * HZ / USER_HZ))) { // 2.6 has diffrent definitions for HZ in user and kernel space
2889 "ME4000:me4000_ao_ex_trig_timeout():Timeout reached\n");
2894 while ((inl(ao_context->status_reg) &
2895 ME4000_AO_STATUS_BIT_FSM)) {
2896 interruptible_sleep_on_timeout(&queue, 1);
2897 if (signal_pending(current)) {
2899 "ME4000:me4000_ao_ex_trig_timeout():Wait on start of state machine interrupted\n");
2906 "ME4000:me4000_ao_ex_trig_timeout():External Trigger is not enabled\n");
2913 static int me4000_ao_enable_do(struct me4000_ao_context *ao_context)
2916 unsigned long flags;
2918 CALL_PDEBUG("me4000_ao_enable_do() is executed\n");
2920 /* Only available for analog output 3 */
2921 if (ao_context->index != 3) {
2923 "me4000_ao_enable_do():Only available for analog output 3\n");
2927 /* Check if the state machine is stopped */
2928 tmp = me4000_inl(ao_context->status_reg);
2929 if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2930 printk(KERN_ERR "me4000_ao_enable_do(): DAC is running\n");
2934 /* Set the stop bit */
2935 spin_lock_irqsave(&ao_context->int_lock, flags);
2936 tmp = inl(ao_context->ctrl_reg);
2937 tmp |= ME4000_AO_CTRL_BIT_ENABLE_DO;
2938 me4000_outl(tmp, ao_context->ctrl_reg);
2939 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2944 static int me4000_ao_disable_do(struct me4000_ao_context *ao_context)
2947 unsigned long flags;
2949 CALL_PDEBUG("me4000_ao_disable_do() is executed\n");
2951 /* Only available for analog output 3 */
2952 if (ao_context->index != 3) {
2954 "me4000_ao_disable():Only available for analog output 3\n");
2958 /* Check if the state machine is stopped */
2959 tmp = me4000_inl(ao_context->status_reg);
2960 if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2961 printk(KERN_ERR "me4000_ao_disable_do(): DAC is running\n");
2965 spin_lock_irqsave(&ao_context->int_lock, flags);
2966 tmp = inl(ao_context->ctrl_reg);
2967 tmp &= ~(ME4000_AO_CTRL_BIT_ENABLE_DO);
2968 me4000_outl(tmp, ao_context->ctrl_reg);
2969 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2974 static int me4000_ao_fsm_state(int *arg, struct me4000_ao_context *ao_context)
2978 CALL_PDEBUG("me4000_ao_fsm_state() is executed\n");
2981 (me4000_inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM) ? 1
2984 if (ao_context->pipe_flag) {
2985 printk(KERN_ERR "me4000_ao_fsm_state():Broken pipe detected\n");
2989 if (put_user(tmp, arg)) {
2990 printk(KERN_ERR "me4000_ao_fsm_state():Cannot copy to user\n");
2997 /*------------------------- Analog input stuff -------------------------------*/
2999 static int me4000_ai_prepare(struct me4000_ai_context *ai_context)
3001 wait_queue_head_t queue;
3004 CALL_PDEBUG("me4000_ai_prepare() is executed\n");
3006 init_waitqueue_head(&queue);
3008 /* Set the new mode and stop bits */
3009 me4000_outl(ai_context->
3010 mode | ME4000_AI_CTRL_BIT_STOP |
3011 ME4000_AI_CTRL_BIT_IMMEDIATE_STOP, ai_context->ctrl_reg);
3013 /* Set the timer registers */
3014 ai_context->chan_timer = 66;
3015 ai_context->chan_pre_timer = 66;
3016 ai_context->scan_timer_low = 0;
3017 ai_context->scan_timer_high = 0;
3019 me4000_outl(65, ai_context->chan_timer_reg);
3020 me4000_outl(65, ai_context->chan_pre_timer_reg);
3021 me4000_outl(0, ai_context->scan_timer_low_reg);
3022 me4000_outl(0, ai_context->scan_timer_high_reg);
3023 me4000_outl(0, ai_context->scan_pre_timer_low_reg);
3024 me4000_outl(0, ai_context->scan_pre_timer_high_reg);
3026 ai_context->channel_list_count = 0;
3028 if (ai_context->mode) {
3029 /* Request the interrupt line */
3031 request_irq(ai_context->irq, me4000_ai_isr,
3032 IRQF_DISABLED | IRQF_SHARED, ME4000_NAME,
3036 "ME4000:me4000_ai_prepare():Can't get interrupt line");
3040 /* Allocate circular buffer */
3041 ai_context->circ_buf.buf =
3042 kzalloc(ME4000_AI_BUFFER_SIZE, GFP_KERNEL);
3043 if (!ai_context->circ_buf.buf) {
3045 "ME4000:me4000_ai_prepare():Can't get circular buffer\n");
3046 free_irq(ai_context->irq, ai_context);
3050 /* Clear the circular buffer */
3051 ai_context->circ_buf.head = 0;
3052 ai_context->circ_buf.tail = 0;
3058 static int me4000_ai_reset(struct me4000_ai_context *ai_context)
3060 wait_queue_head_t queue;
3062 unsigned long flags;
3064 CALL_PDEBUG("me4000_ai_reset() is executed\n");
3066 init_waitqueue_head(&queue);
3069 * First stop conversion of the state machine before reconfigure.
3070 * If not stopped before configuring mode, it could
3071 * walk in a undefined state.
3073 spin_lock_irqsave(&ai_context->int_lock, flags);
3074 tmp = me4000_inl(ai_context->ctrl_reg);
3075 tmp |= ME4000_AI_CTRL_BIT_IMMEDIATE_STOP;
3076 me4000_outl(tmp, ai_context->ctrl_reg);
3077 spin_unlock_irqrestore(&ai_context->int_lock, flags);
3079 while (inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM) {
3080 interruptible_sleep_on_timeout(&queue, 1);
3081 if (signal_pending(current)) {
3083 "me4000_ai_reset():Wait on state machine after stop interrupted\n");
3088 /* Clear the control register and set the stop bits */
3089 spin_lock_irqsave(&ai_context->int_lock, flags);
3090 tmp = me4000_inl(ai_context->ctrl_reg);
3091 me4000_outl(ME4000_AI_CTRL_BIT_IMMEDIATE_STOP | ME4000_AI_CTRL_BIT_STOP,
3092 ai_context->ctrl_reg);
3093 spin_unlock_irqrestore(&ai_context->int_lock, flags);
3095 /* Reset timer registers */
3096 ai_context->chan_timer = 66;
3097 ai_context->chan_pre_timer = 66;
3098 ai_context->scan_timer_low = 0;
3099 ai_context->scan_timer_high = 0;
3100 ai_context->sample_counter = 0;
3101 ai_context->sample_counter_reload = 0;
3103 me4000_outl(65, ai_context->chan_timer_reg);
3104 me4000_outl(65, ai_context->chan_pre_timer_reg);
3105 me4000_outl(0, ai_context->scan_timer_low_reg);
3106 me4000_outl(0, ai_context->scan_timer_high_reg);
3107 me4000_outl(0, ai_context->scan_pre_timer_low_reg);
3108 me4000_outl(0, ai_context->scan_pre_timer_high_reg);
3109 me4000_outl(0, ai_context->sample_counter_reg);
3111 ai_context->channel_list_count = 0;
3113 /* Clear the circular buffer */
3114 ai_context->circ_buf.head = 0;
3115 ai_context->circ_buf.tail = 0;
3120 static int me4000_ai_ioctl_sing(struct inode *inode_p, struct file *file_p,
3121 unsigned int service, unsigned long arg)
3123 struct me4000_ai_context *ai_context;
3125 CALL_PDEBUG("me4000_ai_ioctl_sing() is executed\n");
3127 ai_context = file_p->private_data;
3129 if (_IOC_TYPE(service) != ME4000_MAGIC) {
3130 printk(KERN_ERR "me4000_ai_ioctl_sing():Wrong magic number\n");
3133 if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
3135 "me4000_ai_ioctl_sing():Service number to high\n");
3140 case ME4000_AI_SINGLE:
3141 return me4000_ai_single((struct me4000_ai_single *)arg,
3143 case ME4000_AI_EX_TRIG_ENABLE:
3144 return me4000_ai_ex_trig_enable(ai_context);
3145 case ME4000_AI_EX_TRIG_DISABLE:
3146 return me4000_ai_ex_trig_disable(ai_context);
3147 case ME4000_AI_EX_TRIG_SETUP:
3148 return me4000_ai_ex_trig_setup((struct me4000_ai_trigger *)arg,
3150 case ME4000_GET_USER_INFO:
3151 return me4000_get_user_info((struct me4000_user_info *)arg,
3152 ai_context->board_info);
3153 case ME4000_AI_OFFSET_ENABLE:
3154 return me4000_ai_offset_enable(ai_context);
3155 case ME4000_AI_OFFSET_DISABLE:
3156 return me4000_ai_offset_disable(ai_context);
3157 case ME4000_AI_FULLSCALE_ENABLE:
3158 return me4000_ai_fullscale_enable(ai_context);
3159 case ME4000_AI_FULLSCALE_DISABLE:
3160 return me4000_ai_fullscale_disable(ai_context);
3161 case ME4000_AI_EEPROM_READ:
3162 return me4000_eeprom_read((struct me4000_eeprom *)arg,
3164 case ME4000_AI_EEPROM_WRITE:
3165 return me4000_eeprom_write((struct me4000_eeprom *)arg,
3169 "me4000_ai_ioctl_sing():Invalid service number\n");
3175 static int me4000_ai_single(struct me4000_ai_single *arg,
3176 struct me4000_ai_context *ai_context)
3178 struct me4000_ai_single cmd;
3181 wait_queue_head_t queue;
3182 unsigned long jiffy;
3184 CALL_PDEBUG("me4000_ai_single() is executed\n");
3186 init_waitqueue_head(&queue);
3188 /* Copy data from user */
3189 err = copy_from_user(&cmd, arg, sizeof(struct me4000_ai_single));
3192 "ME4000:me4000_ai_single():Can't copy from user space\n");
3196 /* Check range parameter */
3197 switch (cmd.range) {
3198 case ME4000_AI_LIST_RANGE_BIPOLAR_10:
3199 case ME4000_AI_LIST_RANGE_BIPOLAR_2_5:
3200 case ME4000_AI_LIST_RANGE_UNIPOLAR_10:
3201 case ME4000_AI_LIST_RANGE_UNIPOLAR_2_5:
3205 "ME4000:me4000_ai_single():Invalid range specified\n");
3209 /* Check mode and channel number */
3211 case ME4000_AI_LIST_INPUT_SINGLE_ENDED:
3212 if (cmd.channel >= ai_context->board_info->board_p->ai.count) {
3214 "ME4000:me4000_ai_single():Analog input is not available\n");
3218 case ME4000_AI_LIST_INPUT_DIFFERENTIAL:
3220 ai_context->board_info->board_p->ai.diff_count) {
3222 "ME4000:me4000_ai_single():Analog input is not available in differential mode\n");
3228 "ME4000:me4000_ai_single():Invalid mode specified\n");
3232 /* Clear channel list, data fifo and both stop bits */
3233 tmp = me4000_inl(ai_context->ctrl_reg);
3235 ~(ME4000_AI_CTRL_BIT_CHANNEL_FIFO | ME4000_AI_CTRL_BIT_DATA_FIFO |
3236 ME4000_AI_CTRL_BIT_STOP | ME4000_AI_CTRL_BIT_IMMEDIATE_STOP);
3237 me4000_outl(tmp, ai_context->ctrl_reg);
3239 /* Enable channel list and data fifo */
3240 tmp |= ME4000_AI_CTRL_BIT_CHANNEL_FIFO | ME4000_AI_CTRL_BIT_DATA_FIFO;
3241 me4000_outl(tmp, ai_context->ctrl_reg);
3243 /* Generate channel list entry */
3244 me4000_outl(cmd.channel | cmd.range | cmd.
3245 mode | ME4000_AI_LIST_LAST_ENTRY,
3246 ai_context->channel_list_reg);
3248 /* Set the timer to maximum */
3249 me4000_outl(66, ai_context->chan_timer_reg);
3250 me4000_outl(66, ai_context->chan_pre_timer_reg);
3252 if (tmp & ME4000_AI_CTRL_BIT_EX_TRIG) {
3255 (me4000_inl(ai_context->status_reg) &
3256 ME4000_AI_STATUS_BIT_EF_DATA)) {
3257 interruptible_sleep_on_timeout(&queue, 1);
3258 if (signal_pending(current)) {
3260 "ME4000:me4000_ai_single():Wait on start of state machine interrupted\n");
3263 if (((jiffies - jiffy) > (cmd.timeout * HZ / USER_HZ)) && cmd.timeout) { // 2.6 has diffrent definitions for HZ in user and kernel space
3265 "ME4000:me4000_ai_single():Timeout reached\n");
3270 /* Start conversion */
3271 me4000_inl(ai_context->start_reg);
3273 /* Wait until ready */
3276 (me4000_inl(ai_context->status_reg) &
3277 ME4000_AI_STATUS_BIT_EF_DATA)) {
3279 "ME4000:me4000_ai_single():Value not available after wait\n");
3284 /* Read value from data fifo */
3285 cmd.value = me4000_inl(ai_context->data_reg) & 0xFFFF;
3287 /* Copy result back to user */
3288 err = copy_to_user(arg, &cmd, sizeof(struct me4000_ai_single));
3291 "ME4000:me4000_ai_single():Can't copy to user space\n");
3298 static int me4000_ai_ioctl_sw(struct inode *inode_p, struct file *file_p,
3299 unsigned int service, unsigned long arg)
3301 struct me4000_ai_context *ai_context;
3303 CALL_PDEBUG("me4000_ai_ioctl_sw() is executed\n");
3305 ai_context = file_p->private_data;
3307 if (_IOC_TYPE(service) != ME4000_MAGIC) {
3308 printk(KERN_ERR "me4000_ai_ioctl_sw():Wrong magic number\n");
3311 if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
3313 "me4000_ai_ioctl_sw():Service number to high\n");
3318 case ME4000_AI_SC_SETUP:
3319 return me4000_ai_sc_setup((struct me4000_ai_sc *)arg,
3321 case ME4000_AI_CONFIG:
3322 return me4000_ai_config((struct me4000_ai_config *)arg,
3324 case ME4000_AI_START:
3325 return me4000_ai_start(ai_context);
3326 case ME4000_AI_STOP:
3327 return me4000_ai_stop(ai_context);
3328 case ME4000_AI_IMMEDIATE_STOP:
3329 return me4000_ai_immediate_stop(ai_context);
3330 case ME4000_AI_FSM_STATE:
3331 return me4000_ai_fsm_state((int *)arg, ai_context);
3332 case ME4000_GET_USER_INFO:
3333 return me4000_get_user_info((struct me4000_user_info *)arg,
3334 ai_context->board_info);
3335 case ME4000_AI_EEPROM_READ:
3336 return me4000_eeprom_read((struct me4000_eeprom *)arg,
3338 case ME4000_AI_EEPROM_WRITE:
3339 return me4000_eeprom_write((struct me4000_eeprom *)arg,
3341 case ME4000_AI_GET_COUNT_BUFFER:
3342 return me4000_ai_get_count_buffer((unsigned long *)arg,
3346 "%s:Invalid service number %d\n", __func__, service);
3352 static int me4000_ai_ioctl_ext(struct inode *inode_p, struct file *file_p,
3353 unsigned int service, unsigned long arg)
3355 struct me4000_ai_context *ai_context;
3357 CALL_PDEBUG("me4000_ai_ioctl_ext() is executed\n");
3359 ai_context = file_p->private_data;
3361 if (_IOC_TYPE(service) != ME4000_MAGIC) {
3362 printk(KERN_ERR "me4000_ai_ioctl_ext():Wrong magic number\n");
3365 if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
3367 "me4000_ai_ioctl_ext():Service number to high\n");
3372 case ME4000_AI_SC_SETUP:
3373 return me4000_ai_sc_setup((struct me4000_ai_sc *)arg,
3375 case ME4000_AI_CONFIG:
3376 return me4000_ai_config((struct me4000_ai_config *)arg,
3378 case ME4000_AI_START:
3379 return me4000_ai_start_ex((unsigned long *)arg, ai_context);
3380 case ME4000_AI_STOP:
3381 return me4000_ai_stop(ai_context);
3382 case ME4000_AI_IMMEDIATE_STOP:
3383 return me4000_ai_immediate_stop(ai_context);
3384 case ME4000_AI_EX_TRIG_ENABLE:
3385 return me4000_ai_ex_trig_enable(ai_context);
3386 case ME4000_AI_EX_TRIG_DISABLE:
3387 return me4000_ai_ex_trig_disable(ai_context);
3388 case ME4000_AI_EX_TRIG_SETUP:
3389 return me4000_ai_ex_trig_setup((struct me4000_ai_trigger *)arg,
3391 case ME4000_AI_FSM_STATE:
3392 return me4000_ai_fsm_state((int *)arg, ai_context);
3393 case ME4000_GET_USER_INFO:
3394 return me4000_get_user_info((struct me4000_user_info *)arg,
3395 ai_context->board_info);
3396 case ME4000_AI_GET_COUNT_BUFFER:
3397 return me4000_ai_get_count_buffer((unsigned long *)arg,
3401 "%s:Invalid service number %d\n", __func__ , service);
3407 static int me4000_ai_fasync(int fd, struct file *file_p, int mode)
3409 struct me4000_ai_context *ai_context;
3411 CALL_PDEBUG("me4000_ao_fasync_cont() is executed\n");
3413 ai_context = file_p->private_data;
3414 return fasync_helper(fd, file_p, mode, &ai_context->fasync_p);
3417 static int me4000_ai_config(struct me4000_ai_config *arg,
3418 struct me4000_ai_context *ai_context)
3420 struct me4000_ai_config cmd;
3425 wait_queue_head_t queue;
3429 CALL_PDEBUG("me4000_ai_config() is executed\n");
3431 init_waitqueue_head(&queue);
3433 /* Check if conversion is stopped */
3434 if (inl(ai_context->ctrl_reg) & ME4000_AI_STATUS_BIT_FSM) {
3436 "ME4000:me4000_ai_config():Conversion is not stopped\n");
3441 /* Copy data from user */
3442 err = copy_from_user(&cmd, arg, sizeof(struct me4000_ai_config));
3445 "ME4000:me4000_ai_config():Can't copy from user space\n");
3451 ("me4000_ai_config():chan = %ld, pre_chan = %ld, scan_low = %ld, scan_high = %ld, count = %ld\n",
3452 cmd.timer.chan, cmd.timer.pre_chan, cmd.timer.scan_low,
3453 cmd.timer.scan_high, cmd.channel_list.count);
3455 /* Check whether sample and hold is available for this board */
3457 if (!ai_context->board_info->board_p->ai.sh_count) {
3459 "ME4000:me4000_ai_config():Sample and Hold is not available for this board\n");
3465 /* Check the channel list size */
3466 if (cmd.channel_list.count > ME4000_AI_CHANNEL_LIST_COUNT) {
3468 "me4000_ai_config():Channel list is to large\n");
3473 /* Copy channel list from user */
3474 list = kmalloc(sizeof(u32) * cmd.channel_list.count, GFP_KERNEL);
3477 "ME4000:me4000_ai_config():Can't get memory for channel list\n");
3482 copy_from_user(list, cmd.channel_list.list,
3483 sizeof(u32) * cmd.channel_list.count);
3486 "ME4000:me4000_ai_config():Can't copy from user space\n");
3491 /* Check if last entry bit is set */
3492 if (!(list[cmd.channel_list.count - 1] & ME4000_AI_LIST_LAST_ENTRY)) {
3494 "me4000_ai_config():Last entry bit is not set\n");
3495 list[cmd.channel_list.count - 1] |= ME4000_AI_LIST_LAST_ENTRY;
3498 /* Check whether mode is equal for all entries */
3499 mode = list[0] & 0x20;
3500 for (i = 0; i < cmd.channel_list.count; i++) {
3501 if ((list[i] & 0x20) != mode) {
3503 "ME4000:me4000_ai_config():Mode is not equal for all entries\n");
3509 /* Check whether channels are available for this mode */
3510 if (mode == ME4000_AI_LIST_INPUT_SINGLE_ENDED) {
3511 for (i = 0; i < cmd.channel_list.count; i++) {
3512 if ((list[i] & 0x1F) >=
3513 ai_context->board_info->board_p->ai.count) {
3515 "ME4000:me4000_ai_config():Channel is not available for single ended\n");
3520 } else if (mode == ME4000_AI_LIST_INPUT_DIFFERENTIAL) {
3521 for (i = 0; i < cmd.channel_list.count; i++) {
3522 if ((list[i] & 0x1F) >=
3523 ai_context->board_info->board_p->ai.diff_count) {
3525 "ME4000:me4000_ai_config():Channel is not available for differential\n");
3532 /* Check if bipolar is set for all entries when in differential mode */
3533 if (mode == ME4000_AI_LIST_INPUT_DIFFERENTIAL) {
3534 for (i = 0; i < cmd.channel_list.count; i++) {
3535 if ((list[i] & 0xC0) != ME4000_AI_LIST_RANGE_BIPOLAR_10
3536 && (list[i] & 0xC0) !=
3537 ME4000_AI_LIST_RANGE_BIPOLAR_2_5) {
3539 "ME4000:me4000_ai_config():Bipolar is not selected in differential mode\n");
3546 if (ai_context->mode != ME4000_AI_ACQ_MODE_EXT_SINGLE_VALUE) {
3547 /* Check for minimum channel divisor */
3548 if (cmd.timer.chan < ME4000_AI_MIN_TICKS) {
3550 "ME4000:me4000_ai_config():Channel timer divisor is to low\n");
3555 /* Check if minimum channel divisor is adjusted when sample and hold is activated */
3556 if ((cmd.sh) && (cmd.timer.chan != ME4000_AI_MIN_TICKS)) {
3558 "ME4000:me4000_ai_config():Channel timer divisor must be at minimum when sample and hold is activated\n");
3563 /* Check for minimum channel pre divisor */
3564 if (cmd.timer.pre_chan < ME4000_AI_MIN_TICKS) {
3566 "ME4000:me4000_ai_config():Channel pre timer divisor is to low\n");
3571 /* Write the channel timers */
3572 me4000_outl(cmd.timer.chan - 1, ai_context->chan_timer_reg);
3573 me4000_outl(cmd.timer.pre_chan - 1,
3574 ai_context->chan_pre_timer_reg);
3576 /* Save the timer values in the board context */
3577 ai_context->chan_timer = cmd.timer.chan;
3578 ai_context->chan_pre_timer = cmd.timer.pre_chan;
3580 if (ai_context->mode != ME4000_AI_ACQ_MODE_EXT_SINGLE_CHANLIST) {
3581 /* Check for scan timer divisor */
3583 (u64) cmd.timer.scan_low | ((u64) cmd.timer.
3587 cmd.channel_list.count * cmd.timer.chan +
3590 "ME4000:me4000_ai_config():Scan timer divisor is to low\n");
3596 /* Write the scan timers */
3599 tmp = (u32) (scan & 0xFFFFFFFF);
3601 ai_context->scan_timer_low_reg);
3602 tmp = (u32) ((scan >> 32) & 0xFFFFFFFF);
3604 ai_context->scan_timer_high_reg);
3607 scan - (cmd.timer.chan - 1) +
3608 (cmd.timer.pre_chan - 1);
3609 tmp = (u32) (scan & 0xFFFFFFFF);
3611 ai_context->scan_pre_timer_low_reg);
3612 tmp = (u32) ((scan >> 32) & 0xFFFFFFFF);
3615 scan_pre_timer_high_reg);
3618 ai_context->scan_timer_low_reg);
3620 ai_context->scan_timer_high_reg);
3623 ai_context->scan_pre_timer_low_reg);
3626 scan_pre_timer_high_reg);
3629 ai_context->scan_timer_low = cmd.timer.scan_low;
3630 ai_context->scan_timer_high = cmd.timer.scan_high;
3634 /* Clear the channel list */
3635 tmp = me4000_inl(ai_context->ctrl_reg);
3636 tmp &= ~ME4000_AI_CTRL_BIT_CHANNEL_FIFO;
3637 me4000_outl(tmp, ai_context->ctrl_reg);
3638 tmp |= ME4000_AI_CTRL_BIT_CHANNEL_FIFO;
3639 me4000_outl(tmp, ai_context->ctrl_reg);
3641 /* Write the channel list */
3642 for (i = 0; i < cmd.channel_list.count; i++) {
3643 me4000_outl(list[i], ai_context->channel_list_reg);
3646 /* Setup sample and hold */
3648 tmp |= ME4000_AI_CTRL_BIT_SAMPLE_HOLD;
3649 me4000_outl(tmp, ai_context->ctrl_reg);
3651 tmp &= ~ME4000_AI_CTRL_BIT_SAMPLE_HOLD;
3652 me4000_outl(tmp, ai_context->ctrl_reg);
3655 /* Save the channel list size in the board context */
3656 ai_context->channel_list_count = cmd.channel_list.count;
3664 /* Reset the timers */
3665 ai_context->chan_timer = 66;
3666 ai_context->chan_pre_timer = 66;
3667 ai_context->scan_timer_low = 0;
3668 ai_context->scan_timer_high = 0;
3670 me4000_outl(65, ai_context->chan_timer_reg);
3671 me4000_outl(65, ai_context->chan_pre_timer_reg);
3672 me4000_outl(0, ai_context->scan_timer_high_reg);
3673 me4000_outl(0, ai_context->scan_timer_low_reg);
3674 me4000_outl(0, ai_context->scan_pre_timer_high_reg);
3675 me4000_outl(0, ai_context->scan_pre_timer_low_reg);
3677 ai_context->channel_list_count = 0;
3679 tmp = me4000_inl(ai_context->ctrl_reg);
3681 ~(ME4000_AI_CTRL_BIT_CHANNEL_FIFO | ME4000_AI_CTRL_BIT_SAMPLE_HOLD);
3690 static int ai_common_start(struct me4000_ai_context *ai_context)
3693 CALL_PDEBUG("ai_common_start() is executed\n");
3695 tmp = me4000_inl(ai_context->ctrl_reg);
3697 /* Check if conversion is stopped */
3698 if (tmp & ME4000_AI_STATUS_BIT_FSM) {
3700 "ME4000:ai_common_start():Conversion is not stopped\n");
3704 /* Clear data fifo, disable all interrupts, clear sample counter reload */
3705 tmp &= ~(ME4000_AI_CTRL_BIT_DATA_FIFO | ME4000_AI_CTRL_BIT_LE_IRQ |
3706 ME4000_AI_CTRL_BIT_HF_IRQ | ME4000_AI_CTRL_BIT_SC_IRQ |
3707 ME4000_AI_CTRL_BIT_SC_RELOAD);
3709 me4000_outl(tmp, ai_context->ctrl_reg);
3711 /* Clear circular buffer */
3712 ai_context->circ_buf.head = 0;
3713 ai_context->circ_buf.tail = 0;
3715 /* Enable data fifo */
3716 tmp |= ME4000_AI_CTRL_BIT_DATA_FIFO;
3718 /* Determine interrupt setup */
3719 if (ai_context->sample_counter && !ai_context->sample_counter_reload) {
3720 /* Enable Half Full Interrupt and Sample Counter Interrupt */
3721 tmp |= ME4000_AI_CTRL_BIT_SC_IRQ | ME4000_AI_CTRL_BIT_HF_IRQ;
3722 } else if (ai_context->sample_counter
3723 && ai_context->sample_counter_reload) {
3724 if (ai_context->sample_counter <= ME4000_AI_FIFO_COUNT / 2) {
3725 /* Enable only Sample Counter Interrupt */
3727 ME4000_AI_CTRL_BIT_SC_IRQ |
3728 ME4000_AI_CTRL_BIT_SC_RELOAD;
3730 /* Enable Half Full Interrupt and Sample Counter Interrupt */
3732 ME4000_AI_CTRL_BIT_SC_IRQ |
3733 ME4000_AI_CTRL_BIT_HF_IRQ |
3734 ME4000_AI_CTRL_BIT_SC_RELOAD;
3737 /* Enable only Half Full Interrupt */
3738 tmp |= ME4000_AI_CTRL_BIT_HF_IRQ;
3741 /* Clear the stop bits */
3742 tmp &= ~(ME4000_AI_CTRL_BIT_STOP | ME4000_AI_CTRL_BIT_IMMEDIATE_STOP);
3744 /* Write setup to hardware */
3745 me4000_outl(tmp, ai_context->ctrl_reg);
3747 /* Write sample counter */
3748 me4000_outl(ai_context->sample_counter, ai_context->sample_counter_reg);
3753 static int me4000_ai_start(struct me4000_ai_context *ai_context)
3756 CALL_PDEBUG("me4000_ai_start() is executed\n");
3758 /* Prepare Hardware */
3759 err = ai_common_start(ai_context);
3763 /* Start conversion by dummy read */
3764 me4000_inl(ai_context->start_reg);
3769 static int me4000_ai_start_ex(unsigned long *arg,
3770 struct me4000_ai_context *ai_context)
3773 wait_queue_head_t queue;
3775 unsigned long timeout;
3777 CALL_PDEBUG("me4000_ai_start_ex() is executed\n");
3779 if (get_user(timeout, arg)) {
3781 "me4000_ai_start_ex():Cannot copy data from user\n");
3785 init_waitqueue_head(&queue);
3787 /* Prepare Hardware */
3788 err = ai_common_start(ai_context);
3795 (inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM))
3797 interruptible_sleep_on_timeout(&queue, 1);
3798 if (signal_pending(current)) {
3800 "ME4000:me4000_ai_start_ex():Wait on start of state machine interrupted\n");
3803 if (((jiffies - ref) > (timeout * HZ / USER_HZ))) { // 2.6 has diffrent definitions for HZ in user and kernel space
3805 "ME4000:me4000_ai_start_ex():Timeout reached\n");
3811 (inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM))
3813 interruptible_sleep_on_timeout(&queue, 1);
3814 if (signal_pending(current)) {
3816 "ME4000:me4000_ai_start_ex():Wait on start of state machine interrupted\n");
3825 static int me4000_ai_stop(struct me4000_ai_context *ai_context)
3827 wait_queue_head_t queue;
3829 unsigned long flags;
3831 CALL_PDEBUG("me4000_ai_stop() is executed\n");
3833 init_waitqueue_head(&queue);
3835 /* Disable irqs and clear data fifo */
3836 spin_lock_irqsave(&ai_context->int_lock, flags);
3837 tmp = me4000_inl(ai_context->ctrl_reg);
3839 ~(ME4000_AI_CTRL_BIT_HF_IRQ | ME4000_AI_CTRL_BIT_SC_IRQ |
3840 ME4000_AI_CTRL_BIT_DATA_FIFO);
3841 /* Stop conversion of the state machine */
3842 tmp |= ME4000_AI_CTRL_BIT_STOP;
3843 me4000_outl(tmp, ai_context->ctrl_reg);
3844 spin_unlock_irqrestore(&ai_context->int_lock, flags);
3846 /* Clear circular buffer */
3847 ai_context->circ_buf.head = 0;
3848 ai_context->circ_buf.tail = 0;
3850 while (inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM) {
3851 interruptible_sleep_on_timeout(&queue, 1);
3852 if (signal_pending(current)) {
3854 "ME4000:me4000_ai_stop():Wait on state machine after stop interrupted\n");
3862 static int me4000_ai_immediate_stop(struct me4000_ai_context *ai_context)
3864 wait_queue_head_t queue;
3866 unsigned long flags;
3868 CALL_PDEBUG("me4000_ai_stop() is executed\n");
3870 init_waitqueue_head(&queue);
3872 /* Disable irqs and clear data fifo */
3873 spin_lock_irqsave(&ai_context->int_lock, flags);
3874 tmp = me4000_inl(ai_context->ctrl_reg);
3876 ~(ME4000_AI_CTRL_BIT_HF_IRQ | ME4000_AI_CTRL_BIT_SC_IRQ |
3877 ME4000_AI_CTRL_BIT_DATA_FIFO);
3878 /* Stop conversion of the state machine */
3879 tmp |= ME4000_AI_CTRL_BIT_IMMEDIATE_STOP;
3880 me4000_outl(tmp, ai_context->ctrl_reg);
3881 spin_unlock_irqrestore(&ai_context->int_lock, flags);
3883 /* Clear circular buffer */
3884 ai_context->circ_buf.head = 0;
3885 ai_context->circ_buf.tail = 0;
3887 while (inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM) {
3888 interruptible_sleep_on_timeout(&queue, 1);
3889 if (signal_pending(current)) {
3891 "ME4000:me4000_ai_stop():Wait on state machine after stop interrupted\n");
3899 static int me4000_ai_ex_trig_enable(struct me4000_ai_context *ai_context)
3902 unsigned long flags;
3904 CALL_PDEBUG("me4000_ai_ex_trig_enable() is executed\n");
3906 spin_lock_irqsave(&ai_context->int_lock, flags);
3907 tmp = me4000_inl(ai_context->ctrl_reg);
3908 tmp |= ME4000_AI_CTRL_BIT_EX_TRIG;
3909 me4000_outl(tmp, ai_context->ctrl_reg);
3910 spin_unlock_irqrestore(&ai_context->int_lock, flags);
3915 static int me4000_ai_ex_trig_disable(struct me4000_ai_context *ai_context)
3918 unsigned long flags;
3920 CALL_PDEBUG("me4000_ai_ex_trig_disable() is executed\n");
3922 spin_lock_irqsave(&ai_context->int_lock, flags);
3923 tmp = me4000_inl(ai_context->ctrl_reg);
3924 tmp &= ~ME4000_AI_CTRL_BIT_EX_TRIG;
3925 me4000_outl(tmp, ai_context->ctrl_reg);
3926 spin_unlock_irqrestore(&ai_context->int_lock, flags);
3931 static int me4000_ai_ex_trig_setup(struct me4000_ai_trigger *arg,
3932 struct me4000_ai_context *ai_context)
3934 struct me4000_ai_trigger cmd;
3937 unsigned long flags;
3939 CALL_PDEBUG("me4000_ai_ex_trig_setup() is executed\n");
3941 /* Copy data from user */
3942 err = copy_from_user(&cmd, arg, sizeof(struct me4000_ai_trigger));
3945 "ME4000:me4000_ai_ex_trig_setup():Can't copy from user space\n");
3949 spin_lock_irqsave(&ai_context->int_lock, flags);
3950 tmp = me4000_inl(ai_context->ctrl_reg);
3952 if (cmd.mode == ME4000_AI_TRIGGER_EXT_DIGITAL) {
3953 tmp &= ~ME4000_AI_CTRL_BIT_EX_TRIG_ANALOG;
3954 } else if (cmd.mode == ME4000_AI_TRIGGER_EXT_ANALOG) {
3955 if (!ai_context->board_info->board_p->ai.ex_trig_analog) {
3957 "ME4000:me4000_ai_ex_trig_setup():No analog trigger available\n");
3960 tmp |= ME4000_AI_CTRL_BIT_EX_TRIG_ANALOG;
3962 spin_unlock_irqrestore(&ai_context->int_lock, flags);
3964 "ME4000:me4000_ai_ex_trig_setup():Invalid trigger mode specified\n");
3968 if (cmd.edge == ME4000_AI_TRIGGER_EXT_EDGE_RISING) {
3970 ~(ME4000_AI_CTRL_BIT_EX_TRIG_BOTH |
3971 ME4000_AI_CTRL_BIT_EX_TRIG_FALLING);
3972 } else if (cmd.edge == ME4000_AI_TRIGGER_EXT_EDGE_FALLING) {
3973 tmp |= ME4000_AI_CTRL_BIT_EX_TRIG_FALLING;
3974 tmp &= ~ME4000_AI_CTRL_BIT_EX_TRIG_BOTH;
3975 } else if (cmd.edge == ME4000_AI_TRIGGER_EXT_EDGE_BOTH) {
3977 ME4000_AI_CTRL_BIT_EX_TRIG_BOTH |
3978 ME4000_AI_CTRL_BIT_EX_TRIG_FALLING;
3980 spin_unlock_irqrestore(&ai_context->int_lock, flags);
3982 "ME4000:me4000_ai_ex_trig_setup():Invalid trigger edge specified\n");
3986 me4000_outl(tmp, ai_context->ctrl_reg);
3987 spin_unlock_irqrestore(&ai_context->int_lock, flags);
3991 static int me4000_ai_sc_setup(struct me4000_ai_sc *arg,
3992 struct me4000_ai_context *ai_context)
3994 struct me4000_ai_sc cmd;
3997 CALL_PDEBUG("me4000_ai_sc_setup() is executed\n");
3999 /* Copy data from user */
4000 err = copy_from_user(&cmd, arg, sizeof(struct me4000_ai_sc));
4003 "ME4000:me4000_ai_sc_setup():Can't copy from user space\n");
4007 ai_context->sample_counter = cmd.value;
4008 ai_context->sample_counter_reload = cmd.reload;
4013 static ssize_t me4000_ai_read(struct file *filep, char *buff, size_t cnt,
4016 struct me4000_ai_context *ai_context = filep->private_data;
4017 s16 *buffer = (s16 *) buff;
4018 size_t count = cnt / 2;
4019 unsigned long flags;
4026 CALL_PDEBUG("me4000_ai_read() is executed\n");
4028 init_waitqueue_entry(&wait, current);
4032 PDEBUG("me4000_ai_read():Count is 0\n");
4037 if (filep->f_flags & O_NONBLOCK) {
4038 c = me4000_values_to_end(ai_context->circ_buf,
4039 ME4000_AI_BUFFER_COUNT);
4042 ("me4000_ai_read():Returning from nonblocking read\n");
4046 /* Check if conversion is still running */
4048 (me4000_inl(ai_context->status_reg) &
4049 ME4000_AI_STATUS_BIT_FSM)) {
4051 "ME4000:me4000_ai_read():Conversion interrupted\n");
4055 wait_event_interruptible(ai_context->wait_queue,
4056 (me4000_values_to_end
4057 (ai_context->circ_buf,
4058 ME4000_AI_BUFFER_COUNT)));
4059 if (signal_pending(current)) {
4061 "ME4000:me4000_ai_read():Wait on values interrupted from signal\n");
4066 /* Only read count values or as much as available */
4067 c = me4000_values_to_end(ai_context->circ_buf,
4068 ME4000_AI_BUFFER_COUNT);
4069 PDEBUG("me4000_ai_read():%d values to end\n", c);
4073 PDEBUG("me4000_ai_read():Copy %d values to user space\n", c);
4075 k -= copy_to_user(buffer,
4076 ai_context->circ_buf.buf +
4077 ai_context->circ_buf.tail, k);
4081 "ME4000:me4000_ai_read():Cannot copy new values to user\n");
4085 ai_context->circ_buf.tail =
4086 (ai_context->circ_buf.tail + c) & (ME4000_AI_BUFFER_COUNT -
4092 spin_lock_irqsave(&ai_context->int_lock, flags);
4093 if (me4000_buf_space
4094 (ai_context->circ_buf, ME4000_AI_BUFFER_COUNT)) {
4095 tmp = me4000_inl(ai_context->ctrl_reg);
4097 /* Determine interrupt setup */
4098 if (ai_context->sample_counter
4099 && !ai_context->sample_counter_reload) {
4100 /* Enable Half Full Interrupt and Sample Counter Interrupt */
4102 ME4000_AI_CTRL_BIT_SC_IRQ |
4103 ME4000_AI_CTRL_BIT_HF_IRQ;
4104 } else if (ai_context->sample_counter
4105 && ai_context->sample_counter_reload) {
4106 if (ai_context->sample_counter <
4107 ME4000_AI_FIFO_COUNT / 2) {
4108 /* Enable only Sample Counter Interrupt */
4109 tmp |= ME4000_AI_CTRL_BIT_SC_IRQ;
4111 /* Enable Half Full Interrupt and Sample Counter Interrupt */
4113 ME4000_AI_CTRL_BIT_SC_IRQ |
4114 ME4000_AI_CTRL_BIT_HF_IRQ;
4117 /* Enable only Half Full Interrupt */
4118 tmp |= ME4000_AI_CTRL_BIT_HF_IRQ;
4121 me4000_outl(tmp, ai_context->ctrl_reg);
4123 spin_unlock_irqrestore(&ai_context->int_lock, flags);
4126 /* Check if conversion is still running */
4127 if (!(me4000_inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM)) {
4129 "ME4000:me4000_ai_read():Conversion not running after complete read\n");
4133 if (filep->f_flags & O_NONBLOCK) {
4134 return (k == 0) ? -EAGAIN : 2 * ret;
4137 CALL_PDEBUG("me4000_ai_read() is leaved\n");
4141 static unsigned int me4000_ai_poll(struct file *file_p, poll_table *wait)
4143 struct me4000_ai_context *ai_context;
4144 unsigned long mask = 0;
4146 CALL_PDEBUG("me4000_ai_poll() is executed\n");
4148 ai_context = file_p->private_data;
4150 /* Register wait queue */
4151 poll_wait(file_p, &ai_context->wait_queue, wait);
4153 /* Get available values */
4154 if (me4000_values_to_end(ai_context->circ_buf, ME4000_AI_BUFFER_COUNT))
4155 mask |= POLLIN | POLLRDNORM;
4157 PDEBUG("me4000_ai_poll():Return mask %lX\n", mask);
4162 static int me4000_ai_offset_enable(struct me4000_ai_context *ai_context)
4166 CALL_PDEBUG("me4000_ai_offset_enable() is executed\n");
4168 tmp = me4000_inl(ai_context->ctrl_reg);
4169 tmp |= ME4000_AI_CTRL_BIT_OFFSET;
4170 me4000_outl(tmp, ai_context->ctrl_reg);
4175 static int me4000_ai_offset_disable(struct me4000_ai_context *ai_context)
4179 CALL_PDEBUG("me4000_ai_offset_disable() is executed\n");
4181 tmp = me4000_inl(ai_context->ctrl_reg);
4182 tmp &= ~ME4000_AI_CTRL_BIT_OFFSET;
4183 me4000_outl(tmp, ai_context->ctrl_reg);
4188 static int me4000_ai_fullscale_enable(struct me4000_ai_context *ai_context)
4192 CALL_PDEBUG("me4000_ai_fullscale_enable() is executed\n");
4194 tmp = me4000_inl(ai_context->ctrl_reg);
4195 tmp |= ME4000_AI_CTRL_BIT_FULLSCALE;
4196 me4000_outl(tmp, ai_context->ctrl_reg);
4201 static int me4000_ai_fullscale_disable(struct me4000_ai_context *ai_context)
4205 CALL_PDEBUG("me4000_ai_fullscale_disable() is executed\n");
4207 tmp = me4000_inl(ai_context->ctrl_reg);
4208 tmp &= ~ME4000_AI_CTRL_BIT_FULLSCALE;
4209 me4000_outl(tmp, ai_context->ctrl_reg);
4214 static int me4000_ai_fsm_state(int *arg, struct me4000_ai_context *ai_context)
4218 CALL_PDEBUG("me4000_ai_fsm_state() is executed\n");
4221 (me4000_inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM) ? 1
4224 if (put_user(tmp, arg)) {
4225 printk(KERN_ERR "me4000_ai_fsm_state():Cannot copy to user\n");
4232 static int me4000_ai_get_count_buffer(unsigned long *arg,
4233 struct me4000_ai_context *ai_context)
4238 c = me4000_buf_count(ai_context->circ_buf, ME4000_AI_BUFFER_COUNT);
4240 err = copy_to_user(arg, &c, sizeof(unsigned long));
4243 "%s:Can't copy to user space\n", __func__);
4250 /*---------------------------------- EEPROM stuff ---------------------------*/
4252 static int eeprom_write_cmd(struct me4000_ai_context *ai_context, unsigned long cmd,
4256 unsigned long value;
4258 CALL_PDEBUG("eeprom_write_cmd() is executed\n");
4260 PDEBUG("eeprom_write_cmd():Write command 0x%08lX with length = %d\n",
4263 /* Get the ICR register and clear the related bits */
4264 value = me4000_inl(ai_context->board_info->plx_regbase + PLX_ICR);
4265 value &= ~(PLX_ICR_MASK_EEPROM);
4266 me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4268 /* Raise the chip select */
4269 value |= PLX_ICR_BIT_EEPROM_CHIP_SELECT;
4270 me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4271 udelay(EEPROM_DELAY);
4273 for (i = 0; i < length; i++) {
4274 if (cmd & ((0x1 << (length - 1)) >> i)) {
4275 value |= PLX_ICR_BIT_EEPROM_WRITE;
4277 value &= ~PLX_ICR_BIT_EEPROM_WRITE;
4280 /* Write to EEPROM */
4282 ai_context->board_info->plx_regbase + PLX_ICR);
4283 udelay(EEPROM_DELAY);
4285 /* Raising edge of the clock */
4286 value |= PLX_ICR_BIT_EEPROM_CLOCK_SET;
4288 ai_context->board_info->plx_regbase + PLX_ICR);
4289 udelay(EEPROM_DELAY);
4291 /* Falling edge of the clock */
4292 value &= ~PLX_ICR_BIT_EEPROM_CLOCK_SET;
4294 ai_context->board_info->plx_regbase + PLX_ICR);
4295 udelay(EEPROM_DELAY);
4298 /* Clear the chip select */
4299 value &= ~PLX_ICR_BIT_EEPROM_CHIP_SELECT;
4300 me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4301 udelay(EEPROM_DELAY);
4303 /* Wait until hardware is ready for sure */
4309 static unsigned short eeprom_read_cmd(struct me4000_ai_context *ai_context,
4310 unsigned long cmd, int length)
4313 unsigned long value;
4314 unsigned short id = 0;
4316 CALL_PDEBUG("eeprom_read_cmd() is executed\n");
4318 PDEBUG("eeprom_read_cmd():Read command 0x%08lX with length = %d\n", cmd,
4321 /* Get the ICR register and clear the related bits */
4322 value = me4000_inl(ai_context->board_info->plx_regbase + PLX_ICR);
4323 value &= ~(PLX_ICR_MASK_EEPROM);
4325 me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4327 /* Raise the chip select */
4328 value |= PLX_ICR_BIT_EEPROM_CHIP_SELECT;
4329 me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4330 udelay(EEPROM_DELAY);
4332 /* Write the read command to the eeprom */
4333 for (i = 0; i < length; i++) {
4334 if (cmd & ((0x1 << (length - 1)) >> i)) {
4335 value |= PLX_ICR_BIT_EEPROM_WRITE;
4337 value &= ~PLX_ICR_BIT_EEPROM_WRITE;
4340 ai_context->board_info->plx_regbase + PLX_ICR);
4341 udelay(EEPROM_DELAY);
4343 /* Raising edge of the clock */
4344 value |= PLX_ICR_BIT_EEPROM_CLOCK_SET;
4346 ai_context->board_info->plx_regbase + PLX_ICR);
4347 udelay(EEPROM_DELAY);
4349 /* Falling edge of the clock */
4350 value &= ~PLX_ICR_BIT_EEPROM_CLOCK_SET;
4352 ai_context->board_info->plx_regbase + PLX_ICR);
4353 udelay(EEPROM_DELAY);
4356 /* Read the value from the eeprom */
4357 for (i = 0; i < 16; i++) {
4358 /* Raising edge of the clock */
4359 value |= PLX_ICR_BIT_EEPROM_CLOCK_SET;
4361 ai_context->board_info->plx_regbase + PLX_ICR);
4362 udelay(EEPROM_DELAY);
4364 if (me4000_inl(ai_context->board_info->plx_regbase + PLX_ICR) &
4365 PLX_ICR_BIT_EEPROM_READ) {
4366 id |= (0x8000 >> i);
4367 PDEBUG("eeprom_read_cmd():OR with 0x%04X\n",
4370 PDEBUG("eeprom_read_cmd():Dont't OR\n");
4373 /* Falling edge of the clock */
4374 value &= ~PLX_ICR_BIT_EEPROM_CLOCK_SET;
4376 ai_context->board_info->plx_regbase + PLX_ICR);
4377 udelay(EEPROM_DELAY);
4380 /* Clear the chip select */
4381 value &= ~PLX_ICR_BIT_EEPROM_CHIP_SELECT;
4382 me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4383 udelay(EEPROM_DELAY);
4388 static int me4000_eeprom_write(struct me4000_eeprom *arg,
4389 struct me4000_ai_context *ai_context)
4392 struct me4000_eeprom setup;
4394 unsigned long date_high;
4395 unsigned long date_low;
4397 CALL_PDEBUG("me4000_eeprom_write() is executed\n");
4399 err = copy_from_user(&setup, arg, sizeof(setup));
4402 "ME4000:me4000_eeprom_write():Cannot copy from user\n");
4406 /* Enable writing */
4407 eeprom_write_cmd(ai_context, ME4000_EEPROM_CMD_WRITE_ENABLE,
4408 ME4000_EEPROM_CMD_LENGTH_WRITE_ENABLE);
4410 /* Command for date */
4411 date_high = (setup.date & 0xFFFF0000) >> 16;
4412 date_low = (setup.date & 0x0000FFFF);
4415 ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_DATE_HIGH <<
4416 ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4420 err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4425 ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_DATE_LOW <<
4426 ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4430 err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4434 /* Command for unipolar 10V offset */
4436 ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_UNI_OFFSET <<
4437 ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4442 err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4446 /* Command for unipolar 10V fullscale */
4448 ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_UNI_FULLSCALE <<
4449 ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4454 err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4458 /* Command for unipolar 2,5V offset */
4460 ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_UNI_OFFSET <<
4461 ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4466 err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4470 /* Command for unipolar 2,5V fullscale */
4472 ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_UNI_FULLSCALE <<
4473 ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4478 err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4482 /* Command for bipolar 10V offset */
4484 ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_BI_OFFSET <<
4485 ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4490 err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4494 /* Command for bipolar 10V fullscale */
4496 ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_BI_FULLSCALE <<
4497 ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4502 err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4506 /* Command for bipolar 2,5V offset */
4508 ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_BI_OFFSET <<
4509 ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4514 err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4518 /* Command for bipolar 2,5V fullscale */
4520 ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_BI_FULLSCALE <<
4521 ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4526 err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4530 /* Command for differential 10V offset */
4532 ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_DIFF_OFFSET <<
4533 ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4538 err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4542 /* Command for differential 10V fullscale */
4544 ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_DIFF_FULLSCALE
4545 << ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4550 err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4554 /* Command for differential 2,5V offset */
4556 ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_DIFF_OFFSET <<
4557 ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4562 err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4566 /* Command for differential 2,5V fullscale */
4568 ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_DIFF_FULLSCALE
4569 << ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4573 diff_2_5_fullscale);
4574 err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4578 /* Disable writing */
4579 eeprom_write_cmd(ai_context, ME4000_EEPROM_CMD_WRITE_DISABLE,
4580 ME4000_EEPROM_CMD_LENGTH_WRITE_DISABLE);
4585 static int me4000_eeprom_read(struct me4000_eeprom *arg,
4586 struct me4000_ai_context *ai_context)
4590 struct me4000_eeprom setup;
4592 CALL_PDEBUG("me4000_eeprom_read() is executed\n");
4594 /* Command for date */
4595 cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_DATE_HIGH;
4597 eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4599 cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_DATE_LOW;
4601 eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4603 /* Command for unipolar 10V offset */
4604 cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_UNI_OFFSET;
4605 setup.uni_10_offset =
4606 eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4608 /* Command for unipolar 10V fullscale */
4609 cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_UNI_FULLSCALE;
4610 setup.uni_10_fullscale =
4611 eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4613 /* Command for unipolar 2,5V offset */
4614 cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_UNI_OFFSET;
4615 setup.uni_2_5_offset =
4616 eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4618 /* Command for unipolar 2,5V fullscale */
4619 cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_UNI_FULLSCALE;
4620 setup.uni_2_5_fullscale =
4621 eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4623 /* Command for bipolar 10V offset */
4624 cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_BI_OFFSET;
4625 setup.bi_10_offset =
4626 eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4628 /* Command for bipolar 10V fullscale */
4629 cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_BI_FULLSCALE;
4630 setup.bi_10_fullscale =
4631 eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4633 /* Command for bipolar 2,5V offset */
4634 cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_BI_OFFSET;
4635 setup.bi_2_5_offset =
4636 eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4638 /* Command for bipolar 2,5V fullscale */
4639 cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_BI_FULLSCALE;
4640 setup.bi_2_5_fullscale =
4641 eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4643 /* Command for differntial 10V offset */
4644 cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_DIFF_OFFSET;
4645 setup.diff_10_offset =
4646 eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4648 /* Command for differential 10V fullscale */
4649 cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_DIFF_FULLSCALE;
4650 setup.diff_10_fullscale =
4651 eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4653 /* Command for differntial 2,5V offset */
4654 cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_DIFF_OFFSET;
4655 setup.diff_2_5_offset =
4656 eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4658 /* Command for differential 2,5V fullscale */
4659 cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_DIFF_FULLSCALE;
4660 setup.diff_2_5_fullscale =
4661 eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4663 err = copy_to_user(arg, &setup, sizeof(setup));
4666 "ME4000:me4000_eeprom_read():Cannot copy to user\n");
4673 /*------------------------------------ DIO stuff ----------------------------------------------*/
4675 static int me4000_dio_ioctl(struct inode *inode_p, struct file *file_p,
4676 unsigned int service, unsigned long arg)
4678 struct me4000_dio_context *dio_context;
4680 CALL_PDEBUG("me4000_dio_ioctl() is executed\n");
4682 dio_context = file_p->private_data;
4684 if (_IOC_TYPE(service) != ME4000_MAGIC) {
4685 printk(KERN_ERR "me4000_dio_ioctl():Wrong magic number\n");
4688 if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
4689 printk(KERN_ERR "me4000_dio_ioctl():Service number to high\n");
4694 case ME4000_DIO_CONFIG:
4695 return me4000_dio_config((struct me4000_dio_config *)arg,
4697 case ME4000_DIO_SET_BYTE:
4698 return me4000_dio_set_byte((struct me4000_dio_byte *)arg,
4700 case ME4000_DIO_GET_BYTE:
4701 return me4000_dio_get_byte((struct me4000_dio_byte *)arg,
4703 case ME4000_DIO_RESET:
4704 return me4000_dio_reset(dio_context);
4707 "ME4000:me4000_dio_ioctl():Invalid service number %d\n",
4714 static int me4000_dio_config(struct me4000_dio_config *arg,
4715 struct me4000_dio_context *dio_context)
4717 struct me4000_dio_config cmd;
4721 CALL_PDEBUG("me4000_dio_config() is executed\n");
4723 /* Copy data from user */
4724 err = copy_from_user(&cmd, arg, sizeof(struct me4000_dio_config));
4727 "ME4000:me4000_dio_config():Can't copy from user space\n");
4731 /* Check port parameter */
4732 if (cmd.port >= dio_context->dio_count) {
4734 "ME4000:me4000_dio_config():Port %d is not available\n",
4739 PDEBUG("me4000_dio_config(): port %d, mode %d, function %d\n", cmd.port,
4740 cmd.mode, cmd.function);
4742 if (cmd.port == ME4000_DIO_PORT_A) {
4743 if (cmd.mode == ME4000_DIO_PORT_INPUT) {
4744 /* Check if opto isolated version */
4745 if (!(me4000_inl(dio_context->dir_reg) & 0x1)) {
4747 "ME4000:me4000_dio_config():Cannot set to input on opto isolated versions\n");
4751 tmp = me4000_inl(dio_context->ctrl_reg);
4753 ~(ME4000_DIO_CTRL_BIT_MODE_0 |
4754 ME4000_DIO_CTRL_BIT_MODE_1);
4755 me4000_outl(tmp, dio_context->ctrl_reg);
4756 } else if (cmd.mode == ME4000_DIO_PORT_OUTPUT) {
4757 tmp = me4000_inl(dio_context->ctrl_reg);
4759 ~(ME4000_DIO_CTRL_BIT_MODE_0 |
4760 ME4000_DIO_CTRL_BIT_MODE_1);
4761 tmp |= ME4000_DIO_CTRL_BIT_MODE_0;
4762 me4000_outl(tmp, dio_context->ctrl_reg);
4763 } else if (cmd.mode == ME4000_DIO_FIFO_LOW) {
4764 tmp = me4000_inl(dio_context->ctrl_reg);
4766 ~(ME4000_DIO_CTRL_BIT_MODE_0 |
4767 ME4000_DIO_CTRL_BIT_MODE_1 |
4768 ME4000_DIO_CTRL_BIT_FIFO_HIGH_0);
4770 ME4000_DIO_CTRL_BIT_MODE_0 |
4771 ME4000_DIO_CTRL_BIT_MODE_1;
4772 me4000_outl(tmp, dio_context->ctrl_reg);
4773 } else if (cmd.mode == ME4000_DIO_FIFO_HIGH) {
4774 tmp = me4000_inl(dio_context->ctrl_reg);
4776 ME4000_DIO_CTRL_BIT_MODE_0 |
4777 ME4000_DIO_CTRL_BIT_MODE_1 |
4778 ME4000_DIO_CTRL_BIT_FIFO_HIGH_0;
4779 me4000_outl(tmp, dio_context->ctrl_reg);
4782 "ME4000:me4000_dio_config():Mode %d is not available\n",
4786 } else if (cmd.port == ME4000_DIO_PORT_B) {
4787 if (cmd.mode == ME4000_DIO_PORT_INPUT) {
4788 /* Only do anything when TTL version is installed */
4789 if ((me4000_inl(dio_context->dir_reg) & 0x1)) {
4790 tmp = me4000_inl(dio_context->ctrl_reg);
4792 ~(ME4000_DIO_CTRL_BIT_MODE_2 |
4793 ME4000_DIO_CTRL_BIT_MODE_3);
4794 me4000_outl(tmp, dio_context->ctrl_reg);
4796 } else if (cmd.mode == ME4000_DIO_PORT_OUTPUT) {
4797 /* Check if opto isolated version */
4798 if (!(me4000_inl(dio_context->dir_reg) & 0x1)) {
4800 "ME4000:me4000_dio_config():Cannot set to output on opto isolated versions\n");
4804 tmp = me4000_inl(dio_context->ctrl_reg);
4806 ~(ME4000_DIO_CTRL_BIT_MODE_2 |
4807 ME4000_DIO_CTRL_BIT_MODE_3);
4808 tmp |= ME4000_DIO_CTRL_BIT_MODE_2;
4809 me4000_outl(tmp, dio_context->ctrl_reg);
4810 } else if (cmd.mode == ME4000_DIO_FIFO_LOW) {
4811 /* Check if opto isolated version */
4812 if (!(me4000_inl(dio_context->dir_reg) & 0x1)) {
4814 "ME4000:me4000_dio_config():Cannot set to FIFO low output on opto isolated versions\n");
4818 tmp = me4000_inl(dio_context->ctrl_reg);
4820 ~(ME4000_DIO_CTRL_BIT_MODE_2 |
4821 ME4000_DIO_CTRL_BIT_MODE_3 |
4822 ME4000_DIO_CTRL_BIT_FIFO_HIGH_1);
4824 ME4000_DIO_CTRL_BIT_MODE_2 |
4825 ME4000_DIO_CTRL_BIT_MODE_3;
4826 me4000_outl(tmp, dio_context->ctrl_reg);
4827 } else if (cmd.mode == ME4000_DIO_FIFO_HIGH) {
4828 /* Check if opto isolated version */
4829 if (!(me4000_inl(dio_context->dir_reg) & 0x1)) {
4831 "ME4000:me4000_dio_config():Cannot set to FIFO high output on opto isolated versions\n");
4835 tmp = me4000_inl(dio_context->ctrl_reg);
4837 ME4000_DIO_CTRL_BIT_MODE_2 |
4838 ME4000_DIO_CTRL_BIT_MODE_3 |
4839 ME4000_DIO_CTRL_BIT_FIFO_HIGH_1;
4840 me4000_outl(tmp, dio_context->ctrl_reg);
4843 "ME4000:me4000_dio_config():Mode %d is not available\n",
4847 } else if (cmd.port == ME4000_DIO_PORT_C) {
4848 if (cmd.mode == ME4000_DIO_PORT_INPUT) {
4849 tmp = me4000_inl(dio_context->ctrl_reg);
4851 ~(ME4000_DIO_CTRL_BIT_MODE_4 |
4852 ME4000_DIO_CTRL_BIT_MODE_5);
4853 me4000_outl(tmp, dio_context->ctrl_reg);
4854 } else if (cmd.mode == ME4000_DIO_PORT_OUTPUT) {
4855 tmp = me4000_inl(dio_context->ctrl_reg);
4857 ~(ME4000_DIO_CTRL_BIT_MODE_4 |
4858 ME4000_DIO_CTRL_BIT_MODE_5);
4859 tmp |= ME4000_DIO_CTRL_BIT_MODE_4;
4860 me4000_outl(tmp, dio_context->ctrl_reg);
4861 } else if (cmd.mode == ME4000_DIO_FIFO_LOW) {
4862 tmp = me4000_inl(dio_context->ctrl_reg);
4864 ~(ME4000_DIO_CTRL_BIT_MODE_4 |
4865 ME4000_DIO_CTRL_BIT_MODE_5 |
4866 ME4000_DIO_CTRL_BIT_FIFO_HIGH_2);
4868 ME4000_DIO_CTRL_BIT_MODE_4 |
4869 ME4000_DIO_CTRL_BIT_MODE_5;
4870 me4000_outl(tmp, dio_context->ctrl_reg);
4871 } else if (cmd.mode == ME4000_DIO_FIFO_HIGH) {
4872 tmp = me4000_inl(dio_context->ctrl_reg);
4874 ME4000_DIO_CTRL_BIT_MODE_4 |
4875 ME4000_DIO_CTRL_BIT_MODE_5 |
4876 ME4000_DIO_CTRL_BIT_FIFO_HIGH_2;
4877 me4000_outl(tmp, dio_context->ctrl_reg);
4880 "ME4000:me4000_dio_config():Mode %d is not available\n",
4884 } else if (cmd.port == ME4000_DIO_PORT_D) {
4885 if (cmd.mode == ME4000_DIO_PORT_INPUT) {
4886 tmp = me4000_inl(dio_context->ctrl_reg);
4888 ~(ME4000_DIO_CTRL_BIT_MODE_6 |
4889 ME4000_DIO_CTRL_BIT_MODE_7);
4890 me4000_outl(tmp, dio_context->ctrl_reg);
4891 } else if (cmd.mode == ME4000_DIO_PORT_OUTPUT) {
4892 tmp = me4000_inl(dio_context->ctrl_reg);
4894 ~(ME4000_DIO_CTRL_BIT_MODE_6 |
4895 ME4000_DIO_CTRL_BIT_MODE_7);
4896 tmp |= ME4000_DIO_CTRL_BIT_MODE_6;
4897 me4000_outl(tmp, dio_context->ctrl_reg);
4898 } else if (cmd.mode == ME4000_DIO_FIFO_LOW) {
4899 tmp = me4000_inl(dio_context->ctrl_reg);
4901 ~(ME4000_DIO_CTRL_BIT_MODE_6 |
4902 ME4000_DIO_CTRL_BIT_MODE_7 |
4903 ME4000_DIO_CTRL_BIT_FIFO_HIGH_3);
4905 ME4000_DIO_CTRL_BIT_MODE_6 |
4906 ME4000_DIO_CTRL_BIT_MODE_7;
4907 me4000_outl(tmp, dio_context->ctrl_reg);
4908 } else if (cmd.mode == ME4000_DIO_FIFO_HIGH) {
4909 tmp = me4000_inl(dio_context->ctrl_reg);
4911 ME4000_DIO_CTRL_BIT_MODE_6 |
4912 ME4000_DIO_CTRL_BIT_MODE_7 |
4913 ME4000_DIO_CTRL_BIT_FIFO_HIGH_3;
4914 me4000_outl(tmp, dio_context->ctrl_reg);
4917 "ME4000:me4000_dio_config():Mode %d is not available\n",
4923 "ME4000:me4000_dio_config():Port %d is not available\n",
4928 PDEBUG("me4000_dio_config(): port %d, mode %d, function %d\n", cmd.port,
4929 cmd.mode, cmd.function);
4931 if ((cmd.mode == ME4000_DIO_FIFO_HIGH)
4932 || (cmd.mode == ME4000_DIO_FIFO_LOW)) {
4933 tmp = me4000_inl(dio_context->ctrl_reg);
4935 ~(ME4000_DIO_CTRL_BIT_FUNCTION_0 |
4936 ME4000_DIO_CTRL_BIT_FUNCTION_1);
4937 if (cmd.function == ME4000_DIO_FUNCTION_PATTERN) {
4938 me4000_outl(tmp, dio_context->ctrl_reg);
4939 } else if (cmd.function == ME4000_DIO_FUNCTION_DEMUX) {
4940 tmp |= ME4000_DIO_CTRL_BIT_FUNCTION_0;
4941 me4000_outl(tmp, dio_context->ctrl_reg);
4942 } else if (cmd.function == ME4000_DIO_FUNCTION_MUX) {
4943 tmp |= ME4000_DIO_CTRL_BIT_FUNCTION_1;
4944 me4000_outl(tmp, dio_context->ctrl_reg);
4947 "ME4000:me4000_dio_config():Invalid port function specified\n");
4955 static int me4000_dio_set_byte(struct me4000_dio_byte *arg,
4956 struct me4000_dio_context *dio_context)
4958 struct me4000_dio_byte cmd;
4961 CALL_PDEBUG("me4000_dio_set_byte() is executed\n");
4963 /* Copy data from user */
4964 err = copy_from_user(&cmd, arg, sizeof(struct me4000_dio_byte));
4967 "ME4000:me4000_dio_set_byte():Can't copy from user space\n");
4971 /* Check port parameter */
4972 if (cmd.port >= dio_context->dio_count) {
4974 "ME4000:me4000_dio_set_byte():Port %d is not available\n",
4979 if (cmd.port == ME4000_DIO_PORT_A) {
4980 if ((me4000_inl(dio_context->ctrl_reg) & 0x3) != 0x1) {
4982 "ME4000:me4000_dio_set_byte():Port %d is not in output mode\n",
4986 me4000_outl(cmd.byte, dio_context->port_0_reg);
4987 } else if (cmd.port == ME4000_DIO_PORT_B) {
4988 if ((me4000_inl(dio_context->ctrl_reg) & 0xC) != 0x4) {
4990 "ME4000:me4000_dio_set_byte():Port %d is not in output mode\n",
4994 me4000_outl(cmd.byte, dio_context->port_1_reg);
4995 } else if (cmd.port == ME4000_DIO_PORT_C) {
4996 if ((me4000_inl(dio_context->ctrl_reg) & 0x30) != 0x10) {
4998 "ME4000:me4000_dio_set_byte():Port %d is not in output mode\n",
5002 me4000_outl(cmd.byte, dio_context->port_2_reg);
5003 } else if (cmd.port == ME4000_DIO_PORT_D) {
5004 if ((me4000_inl(dio_context->ctrl_reg) & 0xC0) != 0x40) {
5006 "ME4000:me4000_dio_set_byte():Port %d is not in output mode\n",
5010 me4000_outl(cmd.byte, dio_context->port_3_reg);
5013 "ME4000:me4000_dio_set_byte():Port %d is not available\n",
5021 static int me4000_dio_get_byte(struct me4000_dio_byte *arg,
5022 struct me4000_dio_context *dio_context)
5024 struct me4000_dio_byte cmd;
5027 CALL_PDEBUG("me4000_dio_get_byte() is executed\n");
5029 /* Copy data from user */
5030 err = copy_from_user(&cmd, arg, sizeof(struct me4000_dio_byte));
5033 "ME4000:me4000_dio_get_byte():Can't copy from user space\n");
5037 /* Check port parameter */
5038 if (cmd.port >= dio_context->dio_count) {
5040 "ME4000:me4000_dio_get_byte():Port %d is not available\n",
5045 if (cmd.port == ME4000_DIO_PORT_A) {
5046 cmd.byte = me4000_inl(dio_context->port_0_reg) & 0xFF;
5047 } else if (cmd.port == ME4000_DIO_PORT_B) {
5048 cmd.byte = me4000_inl(dio_context->port_1_reg) & 0xFF;
5049 } else if (cmd.port == ME4000_DIO_PORT_C) {
5050 cmd.byte = me4000_inl(dio_context->port_2_reg) & 0xFF;
5051 } else if (cmd.port == ME4000_DIO_PORT_D) {
5052 cmd.byte = me4000_inl(dio_context->port_3_reg) & 0xFF;
5055 "ME4000:me4000_dio_get_byte():Port %d is not available\n",
5060 /* Copy result back to user */
5061 err = copy_to_user(arg, &cmd, sizeof(struct me4000_dio_byte));
5064 "ME4000:me4000_dio_get_byte():Can't copy to user space\n");
5071 static int me4000_dio_reset(struct me4000_dio_context *dio_context)
5073 CALL_PDEBUG("me4000_dio_reset() is executed\n");
5075 /* Clear the control register */
5076 me4000_outl(0, dio_context->ctrl_reg);
5078 /* Check for opto isolated version */
5079 if (!(me4000_inl(dio_context->dir_reg) & 0x1)) {
5080 me4000_outl(0x1, dio_context->ctrl_reg);
5081 me4000_outl(0x0, dio_context->port_0_reg);
5087 /*------------------------------------ COUNTER STUFF ------------------------------------*/
5089 static int me4000_cnt_ioctl(struct inode *inode_p, struct file *file_p,
5090 unsigned int service, unsigned long arg)
5092 struct me4000_cnt_context *cnt_context;
5094 CALL_PDEBUG("me4000_cnt_ioctl() is executed\n");
5096 cnt_context = file_p->private_data;
5098 if (_IOC_TYPE(service) != ME4000_MAGIC) {
5099 printk(KERN_ERR "me4000_dio_ioctl():Wrong magic number\n");
5102 if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
5103 printk(KERN_ERR "me4000_dio_ioctl():Service number to high\n");
5108 case ME4000_CNT_READ:
5109 return me4000_cnt_read((struct me4000_cnt *)arg, cnt_context);
5110 case ME4000_CNT_WRITE:
5111 return me4000_cnt_write((struct me4000_cnt *)arg, cnt_context);
5112 case ME4000_CNT_CONFIG:
5113 return me4000_cnt_config((struct me4000_cnt_config *)arg,
5115 case ME4000_CNT_RESET:
5116 return me4000_cnt_reset(cnt_context);
5119 "ME4000:me4000_dio_ioctl():Invalid service number %d\n",
5126 static int me4000_cnt_config(struct me4000_cnt_config *arg,
5127 struct me4000_cnt_context *cnt_context)
5129 struct me4000_cnt_config cmd;
5134 CALL_PDEBUG("me4000_cnt_config() is executed\n");
5136 /* Copy data from user */
5137 err = copy_from_user(&cmd, arg, sizeof(struct me4000_cnt_config));
5140 "ME4000:me4000_cnt_config():Can't copy from user space\n");
5144 /* Check counter parameter */
5145 switch (cmd.counter) {
5146 case ME4000_CNT_COUNTER_0:
5147 counter = ME4000_CNT_CTRL_BIT_COUNTER_0;
5149 case ME4000_CNT_COUNTER_1:
5150 counter = ME4000_CNT_CTRL_BIT_COUNTER_1;
5152 case ME4000_CNT_COUNTER_2:
5153 counter = ME4000_CNT_CTRL_BIT_COUNTER_2;
5157 "ME4000:me4000_cnt_config():Counter %d is not available\n",
5162 /* Check mode parameter */
5164 case ME4000_CNT_MODE_0:
5165 mode = ME4000_CNT_CTRL_BIT_MODE_0;
5167 case ME4000_CNT_MODE_1:
5168 mode = ME4000_CNT_CTRL_BIT_MODE_1;
5170 case ME4000_CNT_MODE_2:
5171 mode = ME4000_CNT_CTRL_BIT_MODE_2;
5173 case ME4000_CNT_MODE_3:
5174 mode = ME4000_CNT_CTRL_BIT_MODE_3;
5176 case ME4000_CNT_MODE_4:
5177 mode = ME4000_CNT_CTRL_BIT_MODE_4;
5179 case ME4000_CNT_MODE_5:
5180 mode = ME4000_CNT_CTRL_BIT_MODE_5;
5184 "ME4000:me4000_cnt_config():Mode %d is not available\n",
5189 /* Write the control word */
5190 me4000_outb((counter | mode | 0x30), cnt_context->ctrl_reg);
5195 static int me4000_cnt_read(struct me4000_cnt *arg,
5196 struct me4000_cnt_context *cnt_context)
5198 struct me4000_cnt cmd;
5202 CALL_PDEBUG("me4000_cnt_read() is executed\n");
5204 /* Copy data from user */
5205 err = copy_from_user(&cmd, arg, sizeof(struct me4000_cnt));
5208 "ME4000:me4000_cnt_read():Can't copy from user space\n");
5213 switch (cmd.counter) {
5214 case ME4000_CNT_COUNTER_0:
5215 tmp = me4000_inb(cnt_context->counter_0_reg);
5217 tmp = me4000_inb(cnt_context->counter_0_reg);
5218 cmd.value |= ((u16) tmp) << 8;
5220 case ME4000_CNT_COUNTER_1:
5221 tmp = me4000_inb(cnt_context->counter_1_reg);
5223 tmp = me4000_inb(cnt_context->counter_1_reg);
5224 cmd.value |= ((u16) tmp) << 8;
5226 case ME4000_CNT_COUNTER_2:
5227 tmp = me4000_inb(cnt_context->counter_2_reg);
5229 tmp = me4000_inb(cnt_context->counter_2_reg);
5230 cmd.value |= ((u16) tmp) << 8;
5234 "ME4000:me4000_cnt_read():Counter %d is not available\n",
5239 /* Copy result back to user */
5240 err = copy_to_user(arg, &cmd, sizeof(struct me4000_cnt));
5243 "ME4000:me4000_cnt_read():Can't copy to user space\n");
5250 static int me4000_cnt_write(struct me4000_cnt *arg,
5251 struct me4000_cnt_context *cnt_context)
5253 struct me4000_cnt cmd;
5257 CALL_PDEBUG("me4000_cnt_write() is executed\n");
5259 /* Copy data from user */
5260 err = copy_from_user(&cmd, arg, sizeof(struct me4000_cnt));
5263 "ME4000:me4000_cnt_write():Can't copy from user space\n");
5268 switch (cmd.counter) {
5269 case ME4000_CNT_COUNTER_0:
5270 tmp = cmd.value & 0xFF;
5271 me4000_outb(tmp, cnt_context->counter_0_reg);
5272 tmp = (cmd.value >> 8) & 0xFF;
5273 me4000_outb(tmp, cnt_context->counter_0_reg);
5275 case ME4000_CNT_COUNTER_1:
5276 tmp = cmd.value & 0xFF;
5277 me4000_outb(tmp, cnt_context->counter_1_reg);
5278 tmp = (cmd.value >> 8) & 0xFF;
5279 me4000_outb(tmp, cnt_context->counter_1_reg);
5281 case ME4000_CNT_COUNTER_2:
5282 tmp = cmd.value & 0xFF;
5283 me4000_outb(tmp, cnt_context->counter_2_reg);
5284 tmp = (cmd.value >> 8) & 0xFF;
5285 me4000_outb(tmp, cnt_context->counter_2_reg);
5289 "ME4000:me4000_cnt_write():Counter %d is not available\n",
5297 static int me4000_cnt_reset(struct me4000_cnt_context *cnt_context)
5299 CALL_PDEBUG("me4000_cnt_reset() is executed\n");
5301 /* Set the mode and value for counter 0 */
5302 me4000_outb(0x30, cnt_context->ctrl_reg);
5303 me4000_outb(0x00, cnt_context->counter_0_reg);
5304 me4000_outb(0x00, cnt_context->counter_0_reg);
5306 /* Set the mode and value for counter 1 */
5307 me4000_outb(0x70, cnt_context->ctrl_reg);
5308 me4000_outb(0x00, cnt_context->counter_1_reg);
5309 me4000_outb(0x00, cnt_context->counter_1_reg);
5311 /* Set the mode and value for counter 2 */
5312 me4000_outb(0xB0, cnt_context->ctrl_reg);
5313 me4000_outb(0x00, cnt_context->counter_2_reg);
5314 me4000_outb(0x00, cnt_context->counter_2_reg);
5319 /*------------------------------------ External Interrupt stuff ------------------------------------*/
5321 static int me4000_ext_int_ioctl(struct inode *inode_p, struct file *file_p,
5322 unsigned int service, unsigned long arg)
5324 struct me4000_ext_int_context *ext_int_context;
5326 CALL_PDEBUG("me4000_ext_int_ioctl() is executed\n");
5328 ext_int_context = file_p->private_data;
5330 if (_IOC_TYPE(service) != ME4000_MAGIC) {
5331 printk(KERN_ERR "me4000_ext_int_ioctl():Wrong magic number\n");
5334 if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
5336 "me4000_ext_int_ioctl():Service number to high\n");
5341 case ME4000_EXT_INT_ENABLE:
5342 return me4000_ext_int_enable(ext_int_context);
5343 case ME4000_EXT_INT_DISABLE:
5344 return me4000_ext_int_disable(ext_int_context);
5345 case ME4000_EXT_INT_COUNT:
5346 return me4000_ext_int_count((unsigned long *)arg,
5350 "ME4000:me4000_ext_int_ioctl():Invalid service number %d\n",
5357 static int me4000_ext_int_enable(struct me4000_ext_int_context *ext_int_context)
5361 CALL_PDEBUG("me4000_ext_int_enable() is executed\n");
5363 tmp = me4000_inl(ext_int_context->ctrl_reg);
5364 tmp |= ME4000_AI_CTRL_BIT_EX_IRQ;
5365 me4000_outl(tmp, ext_int_context->ctrl_reg);
5370 static int me4000_ext_int_disable(struct me4000_ext_int_context *ext_int_context)
5374 CALL_PDEBUG("me4000_ext_int_disable() is executed\n");
5376 tmp = me4000_inl(ext_int_context->ctrl_reg);
5377 tmp &= ~ME4000_AI_CTRL_BIT_EX_IRQ;
5378 me4000_outl(tmp, ext_int_context->ctrl_reg);
5383 static int me4000_ext_int_count(unsigned long *arg,
5384 struct me4000_ext_int_context *ext_int_context)
5387 CALL_PDEBUG("me4000_ext_int_count() is executed\n");
5389 put_user(ext_int_context->int_count, arg);
5393 /*------------------------------------ General stuff ------------------------------------*/
5395 static int me4000_get_user_info(struct me4000_user_info *arg,
5396 struct me4000_info *board_info)
5398 struct me4000_user_info user_info;
5400 CALL_PDEBUG("me4000_get_user_info() is executed\n");
5402 user_info.board_count = board_info->board_count;
5403 user_info.plx_regbase = board_info->plx_regbase;
5404 user_info.plx_regbase_size = board_info->plx_regbase_size;
5405 user_info.me4000_regbase = board_info->me4000_regbase;
5406 user_info.me4000_regbase_size = board_info->me4000_regbase_size;
5407 user_info.serial_no = board_info->serial_no;
5408 user_info.hw_revision = board_info->hw_revision;
5409 user_info.vendor_id = board_info->vendor_id;
5410 user_info.device_id = board_info->device_id;
5411 user_info.pci_bus_no = board_info->pci_bus_no;
5412 user_info.pci_dev_no = board_info->pci_dev_no;
5413 user_info.pci_func_no = board_info->pci_func_no;
5414 user_info.irq = board_info->irq;
5415 user_info.irq_count = board_info->irq_count;
5416 user_info.driver_version = ME4000_DRIVER_VERSION;
5417 user_info.ao_count = board_info->board_p->ao.count;
5418 user_info.ao_fifo_count = board_info->board_p->ao.fifo_count;
5420 user_info.ai_count = board_info->board_p->ai.count;
5421 user_info.ai_sh_count = board_info->board_p->ai.sh_count;
5422 user_info.ai_ex_trig_analog = board_info->board_p->ai.ex_trig_analog;
5424 user_info.dio_count = board_info->board_p->dio.count;
5426 user_info.cnt_count = board_info->board_p->cnt.count;
5428 if (copy_to_user(arg, &user_info, sizeof(struct me4000_user_info)))
5434 /*------------------------------------ ISR STUFF ------------------------------------*/
5436 static int me4000_ext_int_fasync(int fd, struct file *file_ptr, int mode)
5439 struct me4000_ext_int_context *ext_int_context;
5441 CALL_PDEBUG("me4000_ext_int_fasync() is executed\n");
5443 ext_int_context = file_ptr->private_data;
5446 fasync_helper(fd, file_ptr, mode, &ext_int_context->fasync_ptr);
5448 CALL_PDEBUG("me4000_ext_int_fasync() is leaved\n");
5452 static irqreturn_t me4000_ao_isr(int irq, void *dev_id)
5456 struct me4000_ao_context *ao_context;
5460 //unsigned long before;
5461 //unsigned long after;
5463 ISR_PDEBUG("me4000_ao_isr() is executed\n");
5465 ao_context = dev_id;
5467 /* Check if irq number is right */
5468 if (irq != ao_context->irq) {
5469 ISR_PDEBUG("me4000_ao_isr():incorrect interrupt num: %d\n",
5474 /* Check if this DAC rised an interrupt */
5476 ((0x1 << (ao_context->index + 3)) &
5477 me4000_inl(ao_context->irq_status_reg))) {
5478 ISR_PDEBUG("me4000_ao_isr():Not this DAC\n");
5482 /* Read status register to find out what happened */
5483 tmp = me4000_inl(ao_context->status_reg);
5485 if (!(tmp & ME4000_AO_STATUS_BIT_EF) && (tmp & ME4000_AO_STATUS_BIT_HF)
5486 && (tmp & ME4000_AO_STATUS_BIT_HF)) {
5487 c = ME4000_AO_FIFO_COUNT;
5488 ISR_PDEBUG("me4000_ao_isr():Fifo empty\n");
5489 } else if ((tmp & ME4000_AO_STATUS_BIT_EF)
5490 && (tmp & ME4000_AO_STATUS_BIT_HF)
5491 && (tmp & ME4000_AO_STATUS_BIT_HF)) {
5492 c = ME4000_AO_FIFO_COUNT / 2;
5493 ISR_PDEBUG("me4000_ao_isr():Fifo under half full\n");
5496 ISR_PDEBUG("me4000_ao_isr():Fifo full\n");
5499 ISR_PDEBUG("me4000_ao_isr():Try to write 0x%04X values\n", c);
5502 c1 = me4000_values_to_end(ao_context->circ_buf,
5503 ME4000_AO_BUFFER_COUNT);
5504 ISR_PDEBUG("me4000_ao_isr():Values to end = %d\n", c1);
5510 ("me4000_ao_isr():Work done or buffer empty\n");
5514 if (((ao_context->fifo_reg & 0xFF) == ME4000_AO_01_FIFO_REG) ||
5515 ((ao_context->fifo_reg & 0xFF) == ME4000_AO_03_FIFO_REG)) {
5516 for (i = 0; i < c1; i++) {
5520 (ao_context->circ_buf.buf +
5521 ao_context->circ_buf.tail + i))) << 16;
5522 outl(value, ao_context->fifo_reg);
5525 outsw(ao_context->fifo_reg,
5526 ao_context->circ_buf.buf +
5527 ao_context->circ_buf.tail, c1);
5530 //printk(KERN_ERR"ME4000:me4000_ao_isr():Time lapse = %lu\n", after - before);
5532 ao_context->circ_buf.tail =
5533 (ao_context->circ_buf.tail + c1) & (ME4000_AO_BUFFER_COUNT -
5535 ISR_PDEBUG("me4000_ao_isr():%d values wrote to port 0x%04X\n",
5536 c1, ao_context->fifo_reg);
5540 /* If there are no values left in the buffer, disable interrupts */
5541 spin_lock(&ao_context->int_lock);
5542 if (!me4000_buf_count(ao_context->circ_buf, ME4000_AO_BUFFER_COUNT)) {
5544 ("me4000_ao_isr():Disable Interrupt because no values left in buffer\n");
5545 tmp = me4000_inl(ao_context->ctrl_reg);
5546 tmp &= ~ME4000_AO_CTRL_BIT_ENABLE_IRQ;
5547 me4000_outl(tmp, ao_context->ctrl_reg);
5549 spin_unlock(&ao_context->int_lock);
5551 /* Reset the interrupt */
5552 spin_lock(&ao_context->int_lock);
5553 tmp = me4000_inl(ao_context->ctrl_reg);
5554 tmp |= ME4000_AO_CTRL_BIT_RESET_IRQ;
5555 me4000_outl(tmp, ao_context->ctrl_reg);
5556 tmp &= ~ME4000_AO_CTRL_BIT_RESET_IRQ;
5557 me4000_outl(tmp, ao_context->ctrl_reg);
5559 /* If state machine is stopped, flow was interrupted */
5560 if (!(me4000_inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM)) {
5561 printk(KERN_ERR "ME4000:me4000_ao_isr():Broken pipe\n");
5562 ao_context->pipe_flag = 1; // Set flag in order to inform write routine
5563 tmp &= ~ME4000_AO_CTRL_BIT_ENABLE_IRQ; // Disable interrupt
5565 me4000_outl(tmp, ao_context->ctrl_reg);
5566 spin_unlock(&ao_context->int_lock);
5568 /* Wake up waiting process */
5569 wake_up_interruptible(&(ao_context->wait_queue));
5571 /* Count the interrupt */
5572 ao_context->board_info->irq_count++;
5577 static irqreturn_t me4000_ai_isr(int irq, void *dev_id)
5580 struct me4000_ai_context *ai_context;
5584 #ifdef ME4000_ISR_DEBUG
5585 unsigned long before;
5586 unsigned long after;
5589 ISR_PDEBUG("me4000_ai_isr() is executed\n");
5591 #ifdef ME4000_ISR_DEBUG
5595 ai_context = dev_id;
5597 /* Check if irq number is right */
5598 if (irq != ai_context->irq) {
5599 ISR_PDEBUG("me4000_ai_isr():incorrect interrupt num: %d\n",
5604 if (me4000_inl(ai_context->irq_status_reg) &
5605 ME4000_IRQ_STATUS_BIT_AI_HF) {
5607 ("me4000_ai_isr():Fifo half full interrupt occured\n");
5609 /* Read status register to find out what happened */
5610 tmp = me4000_inl(ai_context->ctrl_reg);
5612 if (!(tmp & ME4000_AI_STATUS_BIT_FF_DATA) &&
5613 !(tmp & ME4000_AI_STATUS_BIT_HF_DATA)
5614 && (tmp & ME4000_AI_STATUS_BIT_EF_DATA)) {
5615 ISR_PDEBUG("me4000_ai_isr():Fifo full\n");
5616 c = ME4000_AI_FIFO_COUNT;
5618 /* FIFO overflow, so stop conversion and disable all interrupts */
5619 spin_lock(&ai_context->int_lock);
5620 tmp = me4000_inl(ai_context->ctrl_reg);
5621 tmp |= ME4000_AI_CTRL_BIT_IMMEDIATE_STOP;
5623 ~(ME4000_AI_CTRL_BIT_HF_IRQ |
5624 ME4000_AI_CTRL_BIT_SC_IRQ);
5625 outl(tmp, ai_context->ctrl_reg);
5626 spin_unlock(&ai_context->int_lock);
5627 } else if ((tmp & ME4000_AI_STATUS_BIT_FF_DATA) &&
5628 !(tmp & ME4000_AI_STATUS_BIT_HF_DATA)
5629 && (tmp & ME4000_AI_STATUS_BIT_EF_DATA)) {
5630 ISR_PDEBUG("me4000_ai_isr():Fifo half full\n");
5631 c = ME4000_AI_FIFO_COUNT / 2;
5635 ("me4000_ai_isr():Can't determine state of fifo\n");
5638 ISR_PDEBUG("me4000_ai_isr():Try to read %d values\n", c);
5641 c1 = me4000_space_to_end(ai_context->circ_buf,
5642 ME4000_AI_BUFFER_COUNT);
5643 ISR_PDEBUG("me4000_ai_isr():Space to end = %d\n", c1);
5649 ("me4000_ai_isr():Work done or buffer full\n");
5653 insw(ai_context->data_reg,
5654 ai_context->circ_buf.buf +
5655 ai_context->circ_buf.head, c1);
5656 ai_context->circ_buf.head =
5657 (ai_context->circ_buf.head +
5658 c1) & (ME4000_AI_BUFFER_COUNT - 1);
5662 /* Work is done, so reset the interrupt */
5664 ("me4000_ai_isr():reset interrupt fifo half full interrupt\n");
5665 spin_lock(&ai_context->int_lock);
5666 tmp = me4000_inl(ai_context->ctrl_reg);
5667 tmp |= ME4000_AI_CTRL_BIT_HF_IRQ_RESET;
5668 me4000_outl(tmp, ai_context->ctrl_reg);
5669 tmp &= ~ME4000_AI_CTRL_BIT_HF_IRQ_RESET;
5670 me4000_outl(tmp, ai_context->ctrl_reg);
5671 spin_unlock(&ai_context->int_lock);
5674 if (me4000_inl(ai_context->irq_status_reg) & ME4000_IRQ_STATUS_BIT_SC) {
5676 ("me4000_ai_isr():Sample counter interrupt occured\n");
5678 if (!ai_context->sample_counter_reload) {
5680 ("me4000_ai_isr():Single data block available\n");
5682 /* Poll data until fifo empty */
5684 (i < ME4000_AI_FIFO_COUNT / 2)
5685 && (inl(ai_context->ctrl_reg) &
5686 ME4000_AI_STATUS_BIT_EF_DATA); i++) {
5687 if (me4000_space_to_end
5688 (ai_context->circ_buf,
5689 ME4000_AI_BUFFER_COUNT)) {
5690 *(ai_context->circ_buf.buf +
5691 ai_context->circ_buf.head) =
5692 inw(ai_context->data_reg);
5693 ai_context->circ_buf.head =
5694 (ai_context->circ_buf.head +
5695 1) & (ME4000_AI_BUFFER_COUNT - 1);
5699 ISR_PDEBUG("me4000_ai_isr():%d values read\n", i);
5701 if (ai_context->sample_counter <=
5702 ME4000_AI_FIFO_COUNT / 2) {
5704 ("me4000_ai_isr():Interrupt from adjustable half full threshold\n");
5706 /* Read status register to find out what happened */
5707 tmp = me4000_inl(ai_context->ctrl_reg);
5709 if (!(tmp & ME4000_AI_STATUS_BIT_FF_DATA) &&
5710 !(tmp & ME4000_AI_STATUS_BIT_HF_DATA)
5711 && (tmp & ME4000_AI_STATUS_BIT_EF_DATA)) {
5713 ("me4000_ai_isr():Fifo full\n");
5714 c = ME4000_AI_FIFO_COUNT;
5716 /* FIFO overflow, so stop conversion */
5717 spin_lock(&ai_context->int_lock);
5718 tmp = me4000_inl(ai_context->ctrl_reg);
5720 ME4000_AI_CTRL_BIT_IMMEDIATE_STOP;
5721 outl(tmp, ai_context->ctrl_reg);
5722 spin_unlock(&ai_context->int_lock);
5723 } else if ((tmp & ME4000_AI_STATUS_BIT_FF_DATA)
5725 ME4000_AI_STATUS_BIT_HF_DATA)
5727 ME4000_AI_STATUS_BIT_EF_DATA)) {
5729 ("me4000_ai_isr():Fifo half full\n");
5730 c = ME4000_AI_FIFO_COUNT / 2;
5732 c = ai_context->sample_counter;
5734 ("me4000_ai_isr():Sample count values\n");
5738 ("me4000_ai_isr():Try to read %d values\n",
5742 c1 = me4000_space_to_end(ai_context->
5744 ME4000_AI_BUFFER_COUNT);
5746 ("me4000_ai_isr():Space to end = %d\n",
5753 ("me4000_ai_isr():Work done or buffer full\n");
5757 insw(ai_context->data_reg,
5758 ai_context->circ_buf.buf +
5759 ai_context->circ_buf.head, c1);
5760 ai_context->circ_buf.head =
5761 (ai_context->circ_buf.head +
5762 c1) & (ME4000_AI_BUFFER_COUNT - 1);
5767 ("me4000_ai_isr():Multiple data block available\n");
5769 /* Read status register to find out what happened */
5770 tmp = me4000_inl(ai_context->ctrl_reg);
5772 if (!(tmp & ME4000_AI_STATUS_BIT_FF_DATA) &&
5773 !(tmp & ME4000_AI_STATUS_BIT_HF_DATA)
5774 && (tmp & ME4000_AI_STATUS_BIT_EF_DATA)) {
5776 ("me4000_ai_isr():Fifo full\n");
5777 c = ME4000_AI_FIFO_COUNT;
5779 /* FIFO overflow, so stop conversion */
5780 spin_lock(&ai_context->int_lock);
5781 tmp = me4000_inl(ai_context->ctrl_reg);
5783 ME4000_AI_CTRL_BIT_IMMEDIATE_STOP;
5784 outl(tmp, ai_context->ctrl_reg);
5785 spin_unlock(&ai_context->int_lock);
5788 c1 = me4000_space_to_end
5789 (ai_context->circ_buf,
5790 ME4000_AI_BUFFER_COUNT);
5792 ("me4000_ai_isr():Space to end = %d\n",
5799 ("me4000_ai_isr():Work done or buffer full\n");
5803 insw(ai_context->data_reg,
5804 ai_context->circ_buf.buf +
5805 ai_context->circ_buf.head,
5807 ai_context->circ_buf.head =
5808 (ai_context->circ_buf.head +
5810 (ME4000_AI_BUFFER_COUNT -
5814 } else if ((tmp & ME4000_AI_STATUS_BIT_FF_DATA)
5816 ME4000_AI_STATUS_BIT_HF_DATA)
5818 ME4000_AI_STATUS_BIT_EF_DATA)) {
5820 ("me4000_ai_isr():Fifo half full\n");
5821 c = ME4000_AI_FIFO_COUNT / 2;
5824 c1 = me4000_space_to_end
5825 (ai_context->circ_buf,
5826 ME4000_AI_BUFFER_COUNT);
5828 ("me4000_ai_isr():Space to end = %d\n",
5835 ("me4000_ai_isr():Work done or buffer full\n");
5839 insw(ai_context->data_reg,
5840 ai_context->circ_buf.buf +
5841 ai_context->circ_buf.head,
5843 ai_context->circ_buf.head =
5844 (ai_context->circ_buf.head +
5846 (ME4000_AI_BUFFER_COUNT -
5851 /* Poll data until fifo empty */
5853 (i < ME4000_AI_FIFO_COUNT / 2)
5854 && (inl(ai_context->ctrl_reg) &
5855 ME4000_AI_STATUS_BIT_EF_DATA);
5857 if (me4000_space_to_end
5858 (ai_context->circ_buf,
5859 ME4000_AI_BUFFER_COUNT)) {
5860 *(ai_context->circ_buf.
5862 ai_context->circ_buf.
5864 inw(ai_context->data_reg);
5865 ai_context->circ_buf.
5870 (ME4000_AI_BUFFER_COUNT
5876 ("me4000_ai_isr():%d values read\n",
5882 /* Work is done, so reset the interrupt */
5884 ("me4000_ai_isr():reset interrupt from sample counter\n");
5885 spin_lock(&ai_context->int_lock);
5886 tmp = me4000_inl(ai_context->ctrl_reg);
5887 tmp |= ME4000_AI_CTRL_BIT_SC_IRQ_RESET;
5888 me4000_outl(tmp, ai_context->ctrl_reg);
5889 tmp &= ~ME4000_AI_CTRL_BIT_SC_IRQ_RESET;
5890 me4000_outl(tmp, ai_context->ctrl_reg);
5891 spin_unlock(&ai_context->int_lock);
5894 /* Values are now available, so wake up waiting process */
5895 if (me4000_buf_count(ai_context->circ_buf, ME4000_AI_BUFFER_COUNT)) {
5896 ISR_PDEBUG("me4000_ai_isr():Wake up waiting process\n");
5897 wake_up_interruptible(&(ai_context->wait_queue));
5900 /* If there is no space left in the buffer, disable interrupts */
5901 spin_lock(&ai_context->int_lock);
5902 if (!me4000_buf_space(ai_context->circ_buf, ME4000_AI_BUFFER_COUNT)) {
5904 ("me4000_ai_isr():Disable Interrupt because no space left in buffer\n");
5905 tmp = me4000_inl(ai_context->ctrl_reg);
5907 ~(ME4000_AI_CTRL_BIT_SC_IRQ | ME4000_AI_CTRL_BIT_HF_IRQ |
5908 ME4000_AI_CTRL_BIT_LE_IRQ);
5909 me4000_outl(tmp, ai_context->ctrl_reg);
5911 spin_unlock(&ai_context->int_lock);
5913 #ifdef ME4000_ISR_DEBUG
5915 printk(KERN_ERR "ME4000:me4000_ai_isr():Time lapse = %lu\n",
5922 static irqreturn_t me4000_ext_int_isr(int irq, void *dev_id)
5924 struct me4000_ext_int_context *ext_int_context;
5927 ISR_PDEBUG("me4000_ext_int_isr() is executed\n");
5929 ext_int_context = dev_id;
5931 /* Check if irq number is right */
5932 if (irq != ext_int_context->irq) {
5933 ISR_PDEBUG("me4000_ext_int_isr():incorrect interrupt num: %d\n",
5938 if (me4000_inl(ext_int_context->irq_status_reg) &
5939 ME4000_IRQ_STATUS_BIT_EX) {
5940 ISR_PDEBUG("me4000_ext_int_isr():External interrupt occured\n");
5941 tmp = me4000_inl(ext_int_context->ctrl_reg);
5942 tmp |= ME4000_AI_CTRL_BIT_EX_IRQ_RESET;
5943 me4000_outl(tmp, ext_int_context->ctrl_reg);
5944 tmp &= ~ME4000_AI_CTRL_BIT_EX_IRQ_RESET;
5945 me4000_outl(tmp, ext_int_context->ctrl_reg);
5947 ext_int_context->int_count++;
5949 if (ext_int_context->fasync_ptr) {
5951 ("me2600_ext_int_isr():Send signal to process\n");
5952 kill_fasync(&ext_int_context->fasync_ptr, SIGIO,
5960 static void __exit me4000_module_exit(void)
5962 struct list_head *board_p;
5963 struct me4000_info *board_info;
5965 CALL_PDEBUG("cleanup_module() is executed\n");
5967 unregister_chrdev(me4000_ext_int_major_driver_no, ME4000_EXT_INT_NAME);
5969 unregister_chrdev(me4000_cnt_major_driver_no, ME4000_CNT_NAME);
5971 unregister_chrdev(me4000_dio_major_driver_no, ME4000_DIO_NAME);
5973 unregister_chrdev(me4000_ai_major_driver_no, ME4000_AI_NAME);
5975 unregister_chrdev(me4000_ao_major_driver_no, ME4000_AO_NAME);
5977 remove_proc_entry("me4000", NULL);
5979 pci_unregister_driver(&me4000_driver);
5981 /* Reset the boards */
5982 for (board_p = me4000_board_info_list.next;
5983 board_p != &me4000_board_info_list; board_p = board_p->next) {
5984 board_info = list_entry(board_p, struct me4000_info, list);
5985 me4000_reset_board(board_info);
5988 clear_board_info_list();
5991 module_exit(me4000_module_exit);
5993 static int me4000_read_procmem(char *buf, char **start, off_t offset, int count,
5994 int *eof, void *data)
5997 int limit = count - 1000;
5998 struct me4000_info *board_info;
5999 struct list_head *ptr;
6001 len += sprintf(buf + len, "\nME4000 DRIVER VERSION %X.%X.%X\n\n",
6002 (ME4000_DRIVER_VERSION & 0xFF0000) >> 16,
6003 (ME4000_DRIVER_VERSION & 0xFF00) >> 8,
6004 (ME4000_DRIVER_VERSION & 0xFF));
6006 /* Search for the board context */
6007 for (ptr = me4000_board_info_list.next;
6008 (ptr != &me4000_board_info_list) && (len < limit);
6010 board_info = list_entry(ptr, struct me4000_info, list);
6013 sprintf(buf + len, "Board number %d:\n",
6014 board_info->board_count);
6015 len += sprintf(buf + len, "---------------\n");
6017 sprintf(buf + len, "PLX base register = 0x%lX\n",
6018 board_info->plx_regbase);
6020 sprintf(buf + len, "PLX base register size = 0x%X\n",
6021 (unsigned int)board_info->plx_regbase_size);
6023 sprintf(buf + len, "ME4000 base register = 0x%X\n",
6024 (unsigned int)board_info->me4000_regbase);
6026 sprintf(buf + len, "ME4000 base register size = 0x%X\n",
6027 (unsigned int)board_info->me4000_regbase_size);
6029 sprintf(buf + len, "Serial number = 0x%X\n",
6030 board_info->serial_no);
6032 sprintf(buf + len, "Hardware revision = 0x%X\n",
6033 board_info->hw_revision);
6035 sprintf(buf + len, "Vendor id = 0x%X\n",
6036 board_info->vendor_id);
6038 sprintf(buf + len, "Device id = 0x%X\n",
6039 board_info->device_id);
6041 sprintf(buf + len, "PCI bus number = %d\n",
6042 board_info->pci_bus_no);
6044 sprintf(buf + len, "PCI device number = %d\n",
6045 board_info->pci_dev_no);
6047 sprintf(buf + len, "PCI function number = %d\n",
6048 board_info->pci_func_no);
6049 len += sprintf(buf + len, "IRQ = %u\n", board_info->irq);
6052 "Count of interrupts since module was loaded = %d\n",
6053 board_info->irq_count);
6056 sprintf(buf + len, "Count of analog outputs = %d\n",
6057 board_info->board_p->ao.count);
6059 sprintf(buf + len, "Count of analog output fifos = %d\n",
6060 board_info->board_p->ao.fifo_count);
6063 sprintf(buf + len, "Count of analog inputs = %d\n",
6064 board_info->board_p->ai.count);
6067 "Count of sample and hold devices for analog input = %d\n",
6068 board_info->board_p->ai.sh_count);
6071 "Analog external trigger available for analog input = %d\n",
6072 board_info->board_p->ai.ex_trig_analog);
6075 sprintf(buf + len, "Count of digital ports = %d\n",
6076 board_info->board_p->dio.count);
6079 sprintf(buf + len, "Count of counter devices = %d\n",
6080 board_info->board_p->cnt.count);
6082 sprintf(buf + len, "AI control register = 0x%08X\n",
6083 inl(board_info->me4000_regbase +
6084 ME4000_AI_CTRL_REG));
6086 len += sprintf(buf + len, "AO 0 control register = 0x%08X\n",
6087 inl(board_info->me4000_regbase +
6088 ME4000_AO_00_CTRL_REG));
6090 sprintf(buf + len, "AO 0 status register = 0x%08X\n",
6091 inl(board_info->me4000_regbase +
6092 ME4000_AO_00_STATUS_REG));
6094 sprintf(buf + len, "AO 1 control register = 0x%08X\n",
6095 inl(board_info->me4000_regbase +
6096 ME4000_AO_01_CTRL_REG));
6098 sprintf(buf + len, "AO 1 status register = 0x%08X\n",
6099 inl(board_info->me4000_regbase +
6100 ME4000_AO_01_STATUS_REG));
6102 sprintf(buf + len, "AO 2 control register = 0x%08X\n",
6103 inl(board_info->me4000_regbase +
6104 ME4000_AO_02_CTRL_REG));
6106 sprintf(buf + len, "AO 2 status register = 0x%08X\n",
6107 inl(board_info->me4000_regbase +
6108 ME4000_AO_02_STATUS_REG));
6110 sprintf(buf + len, "AO 3 control register = 0x%08X\n",
6111 inl(board_info->me4000_regbase +
6112 ME4000_AO_03_CTRL_REG));
6114 sprintf(buf + len, "AO 3 status register = 0x%08X\n",
6115 inl(board_info->me4000_regbase +
6116 ME4000_AO_03_STATUS_REG));