2 * Copyright (c) 2001-2004 by David Brownell
3 * Copyright (c) 2003 Michal Sojka, for high-speed iso transfers
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
12 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software Foundation,
17 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 /* this file is part of ehci-hcd.c */
22 /*-------------------------------------------------------------------------*/
25 * EHCI scheduled transaction support: interrupt, iso, split iso
26 * These are called "periodic" transactions in the EHCI spec.
28 * Note that for interrupt transfers, the QH/QTD manipulation is shared
29 * with the "asynchronous" transaction support (control/bulk transfers).
30 * The only real difference is in how interrupt transfers are scheduled.
32 * For ISO, we make an "iso_stream" head to serve the same role as a QH.
33 * It keeps track of every ITD (or SITD) that's linked, and holds enough
34 * pre-calculated schedule data to make appending to the queue be quick.
37 static int ehci_get_frame (struct usb_hcd *hcd);
39 /*-------------------------------------------------------------------------*/
42 * periodic_next_shadow - return "next" pointer on shadow list
43 * @periodic: host pointer to qh/itd/sitd
44 * @tag: hardware tag for type of this record
46 static union ehci_shadow *
47 periodic_next_shadow (union ehci_shadow *periodic, __le32 tag)
51 return &periodic->qh->qh_next;
53 return &periodic->fstn->fstn_next;
55 return &periodic->itd->itd_next;
58 return &periodic->sitd->sitd_next;
62 /* caller must hold ehci->lock */
63 static void periodic_unlink (struct ehci_hcd *ehci, unsigned frame, void *ptr)
65 union ehci_shadow *prev_p = &ehci->pshadow [frame];
66 __le32 *hw_p = &ehci->periodic [frame];
67 union ehci_shadow here = *prev_p;
69 /* find predecessor of "ptr"; hw and shadow lists are in sync */
70 while (here.ptr && here.ptr != ptr) {
71 prev_p = periodic_next_shadow (prev_p, Q_NEXT_TYPE (*hw_p));
75 /* an interrupt entry (at list end) could have been shared */
79 /* update shadow and hardware lists ... the old "next" pointers
80 * from ptr may still be in use, the caller updates them.
82 *prev_p = *periodic_next_shadow (&here, Q_NEXT_TYPE (*hw_p));
83 *hw_p = *here.hw_next;
86 /* how many of the uframe's 125 usecs are allocated? */
88 periodic_usecs (struct ehci_hcd *ehci, unsigned frame, unsigned uframe)
90 __le32 *hw_p = &ehci->periodic [frame];
91 union ehci_shadow *q = &ehci->pshadow [frame];
95 switch (Q_NEXT_TYPE (*hw_p)) {
97 /* is it in the S-mask? */
98 if (q->qh->hw_info2 & cpu_to_le32 (1 << uframe))
99 usecs += q->qh->usecs;
101 if (q->qh->hw_info2 & cpu_to_le32 (1 << (8 + uframe)))
102 usecs += q->qh->c_usecs;
103 hw_p = &q->qh->hw_next;
108 /* for "save place" FSTNs, count the relevant INTR
109 * bandwidth from the previous frame
111 if (q->fstn->hw_prev != EHCI_LIST_END) {
112 ehci_dbg (ehci, "ignoring FSTN cost ...\n");
114 hw_p = &q->fstn->hw_next;
115 q = &q->fstn->fstn_next;
118 usecs += q->itd->usecs [uframe];
119 hw_p = &q->itd->hw_next;
120 q = &q->itd->itd_next;
123 /* is it in the S-mask? (count SPLIT, DATA) */
124 if (q->sitd->hw_uframe & cpu_to_le32 (1 << uframe)) {
125 if (q->sitd->hw_fullspeed_ep &
126 __constant_cpu_to_le32 (1<<31))
127 usecs += q->sitd->stream->usecs;
128 else /* worst case for OUT start-split */
129 usecs += HS_USECS_ISO (188);
132 /* ... C-mask? (count CSPLIT, DATA) */
133 if (q->sitd->hw_uframe &
134 cpu_to_le32 (1 << (8 + uframe))) {
135 /* worst case for IN complete-split */
136 usecs += q->sitd->stream->c_usecs;
139 hw_p = &q->sitd->hw_next;
140 q = &q->sitd->sitd_next;
146 ehci_err (ehci, "uframe %d sched overrun: %d usecs\n",
147 frame * 8 + uframe, usecs);
152 /*-------------------------------------------------------------------------*/
154 static int same_tt (struct usb_device *dev1, struct usb_device *dev2)
156 if (!dev1->tt || !dev2->tt)
158 if (dev1->tt != dev2->tt)
161 return dev1->ttport == dev2->ttport;
166 /* return true iff the device's transaction translator is available
167 * for a periodic transfer starting at the specified frame, using
168 * all the uframes in the mask.
170 static int tt_no_collision (
171 struct ehci_hcd *ehci,
173 struct usb_device *dev,
178 if (period == 0) /* error */
181 /* note bandwidth wastage: split never follows csplit
182 * (different dev or endpoint) until the next uframe.
183 * calling convention doesn't make that distinction.
185 for (; frame < ehci->periodic_size; frame += period) {
186 union ehci_shadow here;
189 here = ehci->pshadow [frame];
190 type = Q_NEXT_TYPE (ehci->periodic [frame]);
194 type = Q_NEXT_TYPE (here.itd->hw_next);
195 here = here.itd->itd_next;
198 if (same_tt (dev, here.qh->dev)) {
201 mask = le32_to_cpu (here.qh->hw_info2);
202 /* "knows" no gap is needed */
207 type = Q_NEXT_TYPE (here.qh->hw_next);
208 here = here.qh->qh_next;
211 if (same_tt (dev, here.sitd->urb->dev)) {
214 mask = le32_to_cpu (here.sitd
216 /* FIXME assumes no gap for IN! */
221 type = Q_NEXT_TYPE (here.sitd->hw_next);
222 here = here.sitd->sitd_next;
227 "periodic frame %d bogus type %d\n",
231 /* collision or error */
240 /*-------------------------------------------------------------------------*/
242 static int enable_periodic (struct ehci_hcd *ehci)
247 /* did clearing PSE did take effect yet?
248 * takes effect only at frame boundaries...
250 status = handshake (&ehci->regs->status, STS_PSS, 0, 9 * 125);
252 ehci_to_hcd(ehci)->state = HC_STATE_HALT;
256 cmd = readl (&ehci->regs->command) | CMD_PSE;
257 writel (cmd, &ehci->regs->command);
258 /* posted write ... PSS happens later */
259 ehci_to_hcd(ehci)->state = HC_STATE_RUNNING;
261 /* make sure ehci_work scans these */
262 ehci->next_uframe = readl (&ehci->regs->frame_index)
263 % (ehci->periodic_size << 3);
267 static int disable_periodic (struct ehci_hcd *ehci)
272 /* did setting PSE not take effect yet?
273 * takes effect only at frame boundaries...
275 status = handshake (&ehci->regs->status, STS_PSS, STS_PSS, 9 * 125);
277 ehci_to_hcd(ehci)->state = HC_STATE_HALT;
281 cmd = readl (&ehci->regs->command) & ~CMD_PSE;
282 writel (cmd, &ehci->regs->command);
283 /* posted write ... */
285 ehci->next_uframe = -1;
289 /*-------------------------------------------------------------------------*/
291 /* periodic schedule slots have iso tds (normal or split) first, then a
292 * sparse tree for active interrupt transfers.
294 * this just links in a qh; caller guarantees uframe masks are set right.
295 * no FSTN support (yet; ehci 0.96+)
297 static int qh_link_periodic (struct ehci_hcd *ehci, struct ehci_qh *qh)
300 unsigned period = qh->period;
302 dev_dbg (&qh->dev->dev,
303 "link qh%d-%04x/%p start %d [%d/%d us]\n",
304 period, le32_to_cpup (&qh->hw_info2) & (QH_CMASK | QH_SMASK),
305 qh, qh->start, qh->usecs, qh->c_usecs);
307 /* high bandwidth, or otherwise every microframe */
311 for (i = qh->start; i < ehci->periodic_size; i += period) {
312 union ehci_shadow *prev = &ehci->pshadow [i];
313 __le32 *hw_p = &ehci->periodic [i];
314 union ehci_shadow here = *prev;
317 /* skip the iso nodes at list head */
319 type = Q_NEXT_TYPE (*hw_p);
320 if (type == Q_TYPE_QH)
322 prev = periodic_next_shadow (prev, type);
323 hw_p = &here.qh->hw_next;
327 /* sorting each branch by period (slow-->fast)
328 * enables sharing interior tree nodes
330 while (here.ptr && qh != here.qh) {
331 if (qh->period > here.qh->period)
333 prev = &here.qh->qh_next;
334 hw_p = &here.qh->hw_next;
337 /* link in this qh, unless some earlier pass did that */
344 *hw_p = QH_NEXT (qh->qh_dma);
347 qh->qh_state = QH_STATE_LINKED;
350 /* update per-qh bandwidth for usbfs */
351 ehci_to_hcd(ehci)->self.bandwidth_allocated += qh->period
352 ? ((qh->usecs + qh->c_usecs) / qh->period)
355 /* maybe enable periodic schedule processing */
356 if (!ehci->periodic_sched++)
357 return enable_periodic (ehci);
362 static void qh_unlink_periodic (struct ehci_hcd *ehci, struct ehci_qh *qh)
368 // IF this isn't high speed
369 // and this qh is active in the current uframe
370 // (and overlay token SplitXstate is false?)
372 // qh->hw_info1 |= __constant_cpu_to_le32 (1 << 7 /* "ignore" */);
374 /* high bandwidth, or otherwise part of every microframe */
375 if ((period = qh->period) == 0)
378 for (i = qh->start; i < ehci->periodic_size; i += period)
379 periodic_unlink (ehci, i, qh);
381 /* update per-qh bandwidth for usbfs */
382 ehci_to_hcd(ehci)->self.bandwidth_allocated -= qh->period
383 ? ((qh->usecs + qh->c_usecs) / qh->period)
386 dev_dbg (&qh->dev->dev,
387 "unlink qh%d-%04x/%p start %d [%d/%d us]\n",
389 le32_to_cpup (&qh->hw_info2) & (QH_CMASK | QH_SMASK),
390 qh, qh->start, qh->usecs, qh->c_usecs);
392 /* qh->qh_next still "live" to HC */
393 qh->qh_state = QH_STATE_UNLINK;
394 qh->qh_next.ptr = NULL;
397 /* maybe turn off periodic schedule */
398 ehci->periodic_sched--;
399 if (!ehci->periodic_sched)
400 (void) disable_periodic (ehci);
403 static void intr_deschedule (struct ehci_hcd *ehci, struct ehci_qh *qh)
407 qh_unlink_periodic (ehci, qh);
409 /* simple/paranoid: always delay, expecting the HC needs to read
410 * qh->hw_next or finish a writeback after SPLIT/CSPLIT ... and
411 * expect khubd to clean up after any CSPLITs we won't issue.
412 * active high speed queues may need bigger delays...
414 if (list_empty (&qh->qtd_list)
415 || (__constant_cpu_to_le32 (QH_CMASK)
416 & qh->hw_info2) != 0)
419 wait = 55; /* worst case: 3 * 1024 */
422 qh->qh_state = QH_STATE_IDLE;
423 qh->hw_next = EHCI_LIST_END;
427 /*-------------------------------------------------------------------------*/
429 static int check_period (
430 struct ehci_hcd *ehci,
438 /* complete split running into next frame?
439 * given FSTN support, we could sometimes check...
445 * 80% periodic == 100 usec/uframe available
446 * convert "usecs we need" to "max already claimed"
450 /* we "know" 2 and 4 uframe intervals were rejected; so
451 * for period 0, check _every_ microframe in the schedule.
453 if (unlikely (period == 0)) {
455 for (uframe = 0; uframe < 7; uframe++) {
456 claimed = periodic_usecs (ehci, frame, uframe);
460 } while ((frame += 1) < ehci->periodic_size);
462 /* just check the specified uframe, at that period */
465 claimed = periodic_usecs (ehci, frame, uframe);
468 } while ((frame += period) < ehci->periodic_size);
475 static int check_intr_schedule (
476 struct ehci_hcd *ehci,
479 const struct ehci_qh *qh,
483 int retval = -ENOSPC;
486 if (qh->c_usecs && uframe >= 6) /* FSTN territory? */
489 if (!check_period (ehci, frame, uframe, qh->period, qh->usecs))
497 /* Make sure this tt's buffer is also available for CSPLITs.
498 * We pessimize a bit; probably the typical full speed case
499 * doesn't need the second CSPLIT.
501 * NOTE: both SPLIT and CSPLIT could be checked in just
504 mask = 0x03 << (uframe + qh->gap_uf);
505 *c_maskp = cpu_to_le32 (mask << 8);
508 if (tt_no_collision (ehci, qh->period, qh->dev, frame, mask)) {
509 if (!check_period (ehci, frame, uframe + qh->gap_uf + 1,
510 qh->period, qh->c_usecs))
512 if (!check_period (ehci, frame, uframe + qh->gap_uf,
513 qh->period, qh->c_usecs))
521 /* "first fit" scheduling policy used the first time through,
522 * or when the previous schedule slot can't be re-used.
524 static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh)
529 unsigned frame; /* 0..(qh->period - 1), or NO_FRAME */
531 qh_refresh(ehci, qh);
532 qh->hw_next = EHCI_LIST_END;
535 /* reuse the previous schedule slots, if we can */
536 if (frame < qh->period) {
537 uframe = ffs (le32_to_cpup (&qh->hw_info2) & QH_SMASK);
538 status = check_intr_schedule (ehci, frame, --uframe,
546 /* else scan the schedule to find a group of slots such that all
547 * uframes have enough periodic bandwidth available.
550 /* "normal" case, uframing flexible except with splits */
552 frame = qh->period - 1;
554 for (uframe = 0; uframe < 8; uframe++) {
555 status = check_intr_schedule (ehci,
561 } while (status && frame--);
563 /* qh->period == 0 means every uframe */
566 status = check_intr_schedule (ehci, 0, 0, qh, &c_mask);
572 /* reset S-frame and (maybe) C-frame masks */
573 qh->hw_info2 &= __constant_cpu_to_le32(~(QH_CMASK | QH_SMASK));
574 qh->hw_info2 |= qh->period
575 ? cpu_to_le32 (1 << uframe)
576 : __constant_cpu_to_le32 (QH_SMASK);
577 qh->hw_info2 |= c_mask;
579 ehci_dbg (ehci, "reused qh %p schedule\n", qh);
581 /* stuff into the periodic schedule */
582 status = qh_link_periodic (ehci, qh);
587 static int intr_submit (
588 struct ehci_hcd *ehci,
589 struct usb_host_endpoint *ep,
591 struct list_head *qtd_list,
598 struct list_head empty;
600 /* get endpoint and transfer/schedule data */
601 epnum = ep->desc.bEndpointAddress;
603 spin_lock_irqsave (&ehci->lock, flags);
605 if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE,
606 &ehci_to_hcd(ehci)->flags))) {
611 /* get qh and force any scheduling errors */
612 INIT_LIST_HEAD (&empty);
613 qh = qh_append_tds (ehci, urb, &empty, epnum, &ep->hcpriv);
618 if (qh->qh_state == QH_STATE_IDLE) {
619 if ((status = qh_schedule (ehci, qh)) != 0)
623 /* then queue the urb's tds to the qh */
624 qh = qh_append_tds (ehci, urb, qtd_list, epnum, &ep->hcpriv);
627 /* ... update usbfs periodic stats */
628 ehci_to_hcd(ehci)->self.bandwidth_int_reqs++;
631 spin_unlock_irqrestore (&ehci->lock, flags);
633 qtd_list_free (ehci, urb, qtd_list);
638 /*-------------------------------------------------------------------------*/
640 /* ehci_iso_stream ops work with both ITD and SITD */
642 static struct ehci_iso_stream *
643 iso_stream_alloc (gfp_t mem_flags)
645 struct ehci_iso_stream *stream;
647 stream = kzalloc(sizeof *stream, mem_flags);
648 if (likely (stream != NULL)) {
649 INIT_LIST_HEAD(&stream->td_list);
650 INIT_LIST_HEAD(&stream->free_list);
651 stream->next_uframe = -1;
652 stream->refcount = 1;
659 struct ehci_hcd *ehci,
660 struct ehci_iso_stream *stream,
661 struct usb_device *dev,
666 static const u8 smask_out [] = { 0x01, 0x03, 0x07, 0x0f, 0x1f, 0x3f };
669 unsigned epnum, maxp;
674 * this might be a "high bandwidth" highspeed endpoint,
675 * as encoded in the ep descriptor's wMaxPacket field
677 epnum = usb_pipeendpoint (pipe);
678 is_input = usb_pipein (pipe) ? USB_DIR_IN : 0;
679 maxp = usb_maxpacket(dev, pipe, !is_input);
686 /* knows about ITD vs SITD */
687 if (dev->speed == USB_SPEED_HIGH) {
688 unsigned multi = hb_mult(maxp);
690 stream->highspeed = 1;
692 maxp = max_packet(maxp);
696 stream->buf0 = cpu_to_le32 ((epnum << 8) | dev->devnum);
697 stream->buf1 = cpu_to_le32 (buf1);
698 stream->buf2 = cpu_to_le32 (multi);
700 /* usbfs wants to report the average usecs per frame tied up
701 * when transfers on this endpoint are scheduled ...
703 stream->usecs = HS_USECS_ISO (maxp);
704 bandwidth = stream->usecs * 8;
705 bandwidth /= 1 << (interval - 1);
712 addr = dev->ttport << 24;
713 if (!ehci_is_TDI(ehci)
715 ehci_to_hcd(ehci)->self.root_hub))
716 addr |= dev->tt->hub->devnum << 16;
719 stream->usecs = HS_USECS_ISO (maxp);
720 think_time = dev->tt ? dev->tt->think_time : 0;
721 stream->tt_usecs = NS_TO_US (think_time + usb_calc_bus_time (
722 dev->speed, is_input, 1, maxp));
723 hs_transfers = max (1u, (maxp + 187) / 188);
728 stream->c_usecs = stream->usecs;
729 stream->usecs = HS_USECS_ISO (1);
730 stream->raw_mask = 1;
732 /* c-mask as specified in USB 2.0 11.18.4 3.c */
733 tmp = (1 << (hs_transfers + 2)) - 1;
734 stream->raw_mask |= tmp << (8 + 2);
736 stream->raw_mask = smask_out [hs_transfers - 1];
737 bandwidth = stream->usecs + stream->c_usecs;
738 bandwidth /= 1 << (interval + 2);
740 /* stream->splits gets created from raw_mask later */
741 stream->address = cpu_to_le32 (addr);
743 stream->bandwidth = bandwidth;
747 stream->bEndpointAddress = is_input | epnum;
748 stream->interval = interval;
753 iso_stream_put(struct ehci_hcd *ehci, struct ehci_iso_stream *stream)
757 /* free whenever just a dev->ep reference remains.
758 * not like a QH -- no persistent state (toggle, halt)
760 if (stream->refcount == 1) {
763 // BUG_ON (!list_empty(&stream->td_list));
765 while (!list_empty (&stream->free_list)) {
766 struct list_head *entry;
768 entry = stream->free_list.next;
771 /* knows about ITD vs SITD */
772 if (stream->highspeed) {
773 struct ehci_itd *itd;
775 itd = list_entry (entry, struct ehci_itd,
777 dma_pool_free (ehci->itd_pool, itd,
780 struct ehci_sitd *sitd;
782 sitd = list_entry (entry, struct ehci_sitd,
784 dma_pool_free (ehci->sitd_pool, sitd,
789 is_in = (stream->bEndpointAddress & USB_DIR_IN) ? 0x10 : 0;
790 stream->bEndpointAddress &= 0x0f;
791 stream->ep->hcpriv = NULL;
793 if (stream->rescheduled) {
794 ehci_info (ehci, "ep%d%s-iso rescheduled "
795 "%lu times in %lu seconds\n",
796 stream->bEndpointAddress, is_in ? "in" : "out",
798 ((jiffies - stream->start)/HZ)
806 static inline struct ehci_iso_stream *
807 iso_stream_get (struct ehci_iso_stream *stream)
809 if (likely (stream != NULL))
814 static struct ehci_iso_stream *
815 iso_stream_find (struct ehci_hcd *ehci, struct urb *urb)
818 struct ehci_iso_stream *stream;
819 struct usb_host_endpoint *ep;
822 epnum = usb_pipeendpoint (urb->pipe);
823 if (usb_pipein(urb->pipe))
824 ep = urb->dev->ep_in[epnum];
826 ep = urb->dev->ep_out[epnum];
828 spin_lock_irqsave (&ehci->lock, flags);
831 if (unlikely (stream == NULL)) {
832 stream = iso_stream_alloc(GFP_ATOMIC);
833 if (likely (stream != NULL)) {
834 /* dev->ep owns the initial refcount */
837 iso_stream_init(ehci, stream, urb->dev, urb->pipe,
841 /* if dev->ep [epnum] is a QH, info1.maxpacket is nonzero */
842 } else if (unlikely (stream->hw_info1 != 0)) {
843 ehci_dbg (ehci, "dev %s ep%d%s, not iso??\n",
844 urb->dev->devpath, epnum,
845 usb_pipein(urb->pipe) ? "in" : "out");
849 /* caller guarantees an eventual matching iso_stream_put */
850 stream = iso_stream_get (stream);
852 spin_unlock_irqrestore (&ehci->lock, flags);
856 /*-------------------------------------------------------------------------*/
858 /* ehci_iso_sched ops can be ITD-only or SITD-only */
860 static struct ehci_iso_sched *
861 iso_sched_alloc (unsigned packets, gfp_t mem_flags)
863 struct ehci_iso_sched *iso_sched;
864 int size = sizeof *iso_sched;
866 size += packets * sizeof (struct ehci_iso_packet);
867 iso_sched = kmalloc (size, mem_flags);
868 if (likely (iso_sched != NULL)) {
869 memset(iso_sched, 0, size);
870 INIT_LIST_HEAD (&iso_sched->td_list);
877 struct ehci_iso_sched *iso_sched,
878 struct ehci_iso_stream *stream,
883 dma_addr_t dma = urb->transfer_dma;
885 /* how many uframes are needed for these transfers */
886 iso_sched->span = urb->number_of_packets * stream->interval;
888 /* figure out per-uframe itd fields that we'll need later
889 * when we fit new itds into the schedule.
891 for (i = 0; i < urb->number_of_packets; i++) {
892 struct ehci_iso_packet *uframe = &iso_sched->packet [i];
897 length = urb->iso_frame_desc [i].length;
898 buf = dma + urb->iso_frame_desc [i].offset;
900 trans = EHCI_ISOC_ACTIVE;
901 trans |= buf & 0x0fff;
902 if (unlikely (((i + 1) == urb->number_of_packets))
903 && !(urb->transfer_flags & URB_NO_INTERRUPT))
904 trans |= EHCI_ITD_IOC;
905 trans |= length << 16;
906 uframe->transaction = cpu_to_le32 (trans);
908 /* might need to cross a buffer page within a uframe */
909 uframe->bufp = (buf & ~(u64)0x0fff);
911 if (unlikely ((uframe->bufp != (buf & ~(u64)0x0fff))))
918 struct ehci_iso_stream *stream,
919 struct ehci_iso_sched *iso_sched
924 // caller must hold ehci->lock!
925 list_splice (&iso_sched->td_list, &stream->free_list);
930 itd_urb_transaction (
931 struct ehci_iso_stream *stream,
932 struct ehci_hcd *ehci,
937 struct ehci_itd *itd;
941 struct ehci_iso_sched *sched;
944 sched = iso_sched_alloc (urb->number_of_packets, mem_flags);
945 if (unlikely (sched == NULL))
948 itd_sched_init (sched, stream, urb);
950 if (urb->interval < 8)
951 num_itds = 1 + (sched->span + 7) / 8;
953 num_itds = urb->number_of_packets;
955 /* allocate/init ITDs */
956 spin_lock_irqsave (&ehci->lock, flags);
957 for (i = 0; i < num_itds; i++) {
959 /* free_list.next might be cache-hot ... but maybe
960 * the HC caches it too. avoid that issue for now.
963 /* prefer previously-allocated itds */
964 if (likely (!list_empty(&stream->free_list))) {
965 itd = list_entry (stream->free_list.prev,
966 struct ehci_itd, itd_list);
967 list_del (&itd->itd_list);
968 itd_dma = itd->itd_dma;
973 spin_unlock_irqrestore (&ehci->lock, flags);
974 itd = dma_pool_alloc (ehci->itd_pool, mem_flags,
976 spin_lock_irqsave (&ehci->lock, flags);
979 if (unlikely (NULL == itd)) {
980 iso_sched_free (stream, sched);
981 spin_unlock_irqrestore (&ehci->lock, flags);
984 memset (itd, 0, sizeof *itd);
985 itd->itd_dma = itd_dma;
986 list_add (&itd->itd_list, &sched->td_list);
988 spin_unlock_irqrestore (&ehci->lock, flags);
990 /* temporarily store schedule info in hcpriv */
992 urb->error_count = 0;
996 /*-------------------------------------------------------------------------*/
1000 struct ehci_hcd *ehci,
1009 /* can't commit more than 80% periodic == 100 usec */
1010 if (periodic_usecs (ehci, uframe >> 3, uframe & 0x7)
1014 /* we know urb->interval is 2^N uframes */
1016 } while (uframe < mod);
1022 struct ehci_hcd *ehci,
1024 struct ehci_iso_stream *stream,
1026 struct ehci_iso_sched *sched,
1033 mask = stream->raw_mask << (uframe & 7);
1035 /* for IN, don't wrap CSPLIT into the next frame */
1039 /* this multi-pass logic is simple, but performance may
1040 * suffer when the schedule data isn't cached.
1043 /* check bandwidth */
1044 uframe %= period_uframes;
1048 frame = uframe >> 3;
1051 /* tt must be idle for start(s), any gap, and csplit.
1052 * assume scheduling slop leaves 10+% for control/bulk.
1054 if (!tt_no_collision (ehci, period_uframes << 3,
1055 stream->udev, frame, mask))
1058 /* check starts (OUT uses more than one) */
1059 max_used = 100 - stream->usecs;
1060 for (tmp = stream->raw_mask & 0xff; tmp; tmp >>= 1, uf++) {
1061 if (periodic_usecs (ehci, frame, uf) > max_used)
1065 /* for IN, check CSPLIT */
1066 if (stream->c_usecs) {
1068 max_used = 100 - stream->c_usecs;
1072 if ((stream->raw_mask & tmp) == 0)
1074 if (periodic_usecs (ehci, frame, uf)
1080 /* we know urb->interval is 2^N uframes */
1081 uframe += period_uframes;
1082 } while (uframe < mod);
1084 stream->splits = cpu_to_le32(stream->raw_mask << (uframe & 7));
1089 * This scheduler plans almost as far into the future as it has actual
1090 * periodic schedule slots. (Affected by TUNE_FLS, which defaults to
1091 * "as small as possible" to be cache-friendlier.) That limits the size
1092 * transfers you can stream reliably; avoid more than 64 msec per urb.
1093 * Also avoid queue depths of less than ehci's worst irq latency (affected
1094 * by the per-urb URB_NO_INTERRUPT hint, the log2_irq_thresh module parameter,
1095 * and other factors); or more than about 230 msec total (for portability,
1096 * given EHCI_TUNE_FLS and the slop). Or, write a smarter scheduler!
1099 #define SCHEDULE_SLOP 10 /* frames */
1102 iso_stream_schedule (
1103 struct ehci_hcd *ehci,
1105 struct ehci_iso_stream *stream
1108 u32 now, start, max, period;
1110 unsigned mod = ehci->periodic_size << 3;
1111 struct ehci_iso_sched *sched = urb->hcpriv;
1113 if (sched->span > (mod - 8 * SCHEDULE_SLOP)) {
1114 ehci_dbg (ehci, "iso request %p too long\n", urb);
1119 if ((stream->depth + sched->span) > mod) {
1120 ehci_dbg (ehci, "request %p would overflow (%d+%d>%d)\n",
1121 urb, stream->depth, sched->span, mod);
1126 now = readl (&ehci->regs->frame_index) % mod;
1128 /* when's the last uframe this urb could start? */
1131 /* typical case: reuse current schedule. stream is still active,
1132 * and no gaps from host falling behind (irq delays etc)
1134 if (likely (!list_empty (&stream->td_list))) {
1135 start = stream->next_uframe;
1138 if (likely ((start + sched->span) < max))
1140 /* else fell behind; someday, try to reschedule */
1145 /* need to schedule; when's the next (u)frame we could start?
1146 * this is bigger than ehci->i_thresh allows; scheduling itself
1147 * isn't free, the slop should handle reasonably slow cpus. it
1148 * can also help high bandwidth if the dma and irq loads don't
1149 * jump until after the queue is primed.
1151 start = SCHEDULE_SLOP * 8 + (now & ~0x07);
1153 stream->next_uframe = start;
1155 /* NOTE: assumes URB_ISO_ASAP, to limit complexity/bugs */
1157 period = urb->interval;
1158 if (!stream->highspeed)
1161 /* find a uframe slot with enough bandwidth */
1162 for (; start < (stream->next_uframe + period); start++) {
1165 /* check schedule: enough space? */
1166 if (stream->highspeed)
1167 enough_space = itd_slot_ok (ehci, mod, start,
1168 stream->usecs, period);
1170 if ((start % 8) >= 6)
1172 enough_space = sitd_slot_ok (ehci, mod, stream,
1173 start, sched, period);
1176 /* schedule it here if there's enough bandwidth */
1178 stream->next_uframe = start % mod;
1183 /* no room in the schedule */
1184 ehci_dbg (ehci, "iso %ssched full %p (now %d max %d)\n",
1185 list_empty (&stream->td_list) ? "" : "re",
1190 iso_sched_free (stream, sched);
1195 /* report high speed start in uframes; full speed, in frames */
1196 urb->start_frame = stream->next_uframe;
1197 if (!stream->highspeed)
1198 urb->start_frame >>= 3;
1202 /*-------------------------------------------------------------------------*/
1205 itd_init (struct ehci_iso_stream *stream, struct ehci_itd *itd)
1209 /* it's been recently zeroed */
1210 itd->hw_next = EHCI_LIST_END;
1211 itd->hw_bufp [0] = stream->buf0;
1212 itd->hw_bufp [1] = stream->buf1;
1213 itd->hw_bufp [2] = stream->buf2;
1215 for (i = 0; i < 8; i++)
1218 /* All other fields are filled when scheduling */
1223 struct ehci_itd *itd,
1224 struct ehci_iso_sched *iso_sched,
1229 struct ehci_iso_packet *uf = &iso_sched->packet [index];
1230 unsigned pg = itd->pg;
1232 // BUG_ON (pg == 6 && uf->cross);
1235 itd->index [uframe] = index;
1237 itd->hw_transaction [uframe] = uf->transaction;
1238 itd->hw_transaction [uframe] |= cpu_to_le32 (pg << 12);
1239 itd->hw_bufp [pg] |= cpu_to_le32 (uf->bufp & ~(u32)0);
1240 itd->hw_bufp_hi [pg] |= cpu_to_le32 ((u32)(uf->bufp >> 32));
1242 /* iso_frame_desc[].offset must be strictly increasing */
1243 if (unlikely (uf->cross)) {
1244 u64 bufp = uf->bufp + 4096;
1246 itd->hw_bufp [pg] |= cpu_to_le32 (bufp & ~(u32)0);
1247 itd->hw_bufp_hi [pg] |= cpu_to_le32 ((u32)(bufp >> 32));
1252 itd_link (struct ehci_hcd *ehci, unsigned frame, struct ehci_itd *itd)
1254 /* always prepend ITD/SITD ... only QH tree is order-sensitive */
1255 itd->itd_next = ehci->pshadow [frame];
1256 itd->hw_next = ehci->periodic [frame];
1257 ehci->pshadow [frame].itd = itd;
1260 ehci->periodic [frame] = cpu_to_le32 (itd->itd_dma) | Q_TYPE_ITD;
1263 /* fit urb's itds into the selected schedule slot; activate as needed */
1266 struct ehci_hcd *ehci,
1269 struct ehci_iso_stream *stream
1273 unsigned next_uframe, uframe, frame;
1274 struct ehci_iso_sched *iso_sched = urb->hcpriv;
1275 struct ehci_itd *itd;
1277 next_uframe = stream->next_uframe % mod;
1279 if (unlikely (list_empty(&stream->td_list))) {
1280 ehci_to_hcd(ehci)->self.bandwidth_allocated
1281 += stream->bandwidth;
1283 "schedule devp %s ep%d%s-iso period %d start %d.%d\n",
1284 urb->dev->devpath, stream->bEndpointAddress & 0x0f,
1285 (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out",
1287 next_uframe >> 3, next_uframe & 0x7);
1288 stream->start = jiffies;
1290 ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs++;
1292 /* fill iTDs uframe by uframe */
1293 for (packet = 0, itd = NULL; packet < urb->number_of_packets; ) {
1295 /* ASSERT: we have all necessary itds */
1296 // BUG_ON (list_empty (&iso_sched->td_list));
1298 /* ASSERT: no itds for this endpoint in this uframe */
1300 itd = list_entry (iso_sched->td_list.next,
1301 struct ehci_itd, itd_list);
1302 list_move_tail (&itd->itd_list, &stream->td_list);
1303 itd->stream = iso_stream_get (stream);
1304 itd->urb = usb_get_urb (urb);
1305 itd_init (stream, itd);
1308 uframe = next_uframe & 0x07;
1309 frame = next_uframe >> 3;
1311 itd->usecs [uframe] = stream->usecs;
1312 itd_patch (itd, iso_sched, packet, uframe);
1314 next_uframe += stream->interval;
1315 stream->depth += stream->interval;
1319 /* link completed itds into the schedule */
1320 if (((next_uframe >> 3) != frame)
1321 || packet == urb->number_of_packets) {
1322 itd_link (ehci, frame % ehci->periodic_size, itd);
1326 stream->next_uframe = next_uframe;
1328 /* don't need that schedule data any more */
1329 iso_sched_free (stream, iso_sched);
1332 timer_action (ehci, TIMER_IO_WATCHDOG);
1333 if (unlikely (!ehci->periodic_sched++))
1334 return enable_periodic (ehci);
1338 #define ISO_ERRS (EHCI_ISOC_BUF_ERR | EHCI_ISOC_BABBLE | EHCI_ISOC_XACTERR)
1342 struct ehci_hcd *ehci,
1343 struct ehci_itd *itd,
1344 struct pt_regs *regs
1346 struct urb *urb = itd->urb;
1347 struct usb_iso_packet_descriptor *desc;
1351 struct ehci_iso_stream *stream = itd->stream;
1352 struct usb_device *dev;
1354 /* for each uframe with a packet */
1355 for (uframe = 0; uframe < 8; uframe++) {
1356 if (likely (itd->index[uframe] == -1))
1358 urb_index = itd->index[uframe];
1359 desc = &urb->iso_frame_desc [urb_index];
1361 t = le32_to_cpup (&itd->hw_transaction [uframe]);
1362 itd->hw_transaction [uframe] = 0;
1363 stream->depth -= stream->interval;
1365 /* report transfer status */
1366 if (unlikely (t & ISO_ERRS)) {
1368 if (t & EHCI_ISOC_BUF_ERR)
1369 desc->status = usb_pipein (urb->pipe)
1370 ? -ENOSR /* hc couldn't read */
1371 : -ECOMM; /* hc couldn't write */
1372 else if (t & EHCI_ISOC_BABBLE)
1373 desc->status = -EOVERFLOW;
1374 else /* (t & EHCI_ISOC_XACTERR) */
1375 desc->status = -EPROTO;
1377 /* HC need not update length with this error */
1378 if (!(t & EHCI_ISOC_BABBLE))
1379 desc->actual_length = EHCI_ITD_LENGTH (t);
1380 } else if (likely ((t & EHCI_ISOC_ACTIVE) == 0)) {
1382 desc->actual_length = EHCI_ITD_LENGTH (t);
1389 list_move (&itd->itd_list, &stream->free_list);
1390 iso_stream_put (ehci, stream);
1392 /* handle completion now? */
1393 if (likely ((urb_index + 1) != urb->number_of_packets))
1396 /* ASSERT: it's really the last itd for this urb
1397 list_for_each_entry (itd, &stream->td_list, itd_list)
1398 BUG_ON (itd->urb == urb);
1401 /* give urb back to the driver ... can be out-of-order */
1403 ehci_urb_done (ehci, urb, regs);
1406 /* defer stopping schedule; completion can submit */
1407 ehci->periodic_sched--;
1408 if (unlikely (!ehci->periodic_sched))
1409 (void) disable_periodic (ehci);
1410 ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs--;
1412 if (unlikely (list_empty (&stream->td_list))) {
1413 ehci_to_hcd(ehci)->self.bandwidth_allocated
1414 -= stream->bandwidth;
1416 "deschedule devp %s ep%d%s-iso\n",
1417 dev->devpath, stream->bEndpointAddress & 0x0f,
1418 (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out");
1420 iso_stream_put (ehci, stream);
1425 /*-------------------------------------------------------------------------*/
1427 static int itd_submit (struct ehci_hcd *ehci, struct urb *urb,
1430 int status = -EINVAL;
1431 unsigned long flags;
1432 struct ehci_iso_stream *stream;
1434 /* Get iso_stream head */
1435 stream = iso_stream_find (ehci, urb);
1436 if (unlikely (stream == NULL)) {
1437 ehci_dbg (ehci, "can't get iso stream\n");
1440 if (unlikely (urb->interval != stream->interval)) {
1441 ehci_dbg (ehci, "can't change iso interval %d --> %d\n",
1442 stream->interval, urb->interval);
1446 #ifdef EHCI_URB_TRACE
1448 "%s %s urb %p ep%d%s len %d, %d pkts %d uframes [%p]\n",
1449 __FUNCTION__, urb->dev->devpath, urb,
1450 usb_pipeendpoint (urb->pipe),
1451 usb_pipein (urb->pipe) ? "in" : "out",
1452 urb->transfer_buffer_length,
1453 urb->number_of_packets, urb->interval,
1457 /* allocate ITDs w/o locking anything */
1458 status = itd_urb_transaction (stream, ehci, urb, mem_flags);
1459 if (unlikely (status < 0)) {
1460 ehci_dbg (ehci, "can't init itds\n");
1464 /* schedule ... need to lock */
1465 spin_lock_irqsave (&ehci->lock, flags);
1466 if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE,
1467 &ehci_to_hcd(ehci)->flags)))
1468 status = -ESHUTDOWN;
1470 status = iso_stream_schedule (ehci, urb, stream);
1471 if (likely (status == 0))
1472 itd_link_urb (ehci, urb, ehci->periodic_size << 3, stream);
1473 spin_unlock_irqrestore (&ehci->lock, flags);
1476 if (unlikely (status < 0))
1477 iso_stream_put (ehci, stream);
1481 #ifdef CONFIG_USB_EHCI_SPLIT_ISO
1483 /*-------------------------------------------------------------------------*/
1486 * "Split ISO TDs" ... used for USB 1.1 devices going through the
1487 * TTs in USB 2.0 hubs. These need microframe scheduling.
1492 struct ehci_iso_sched *iso_sched,
1493 struct ehci_iso_stream *stream,
1498 dma_addr_t dma = urb->transfer_dma;
1500 /* how many frames are needed for these transfers */
1501 iso_sched->span = urb->number_of_packets * stream->interval;
1503 /* figure out per-frame sitd fields that we'll need later
1504 * when we fit new sitds into the schedule.
1506 for (i = 0; i < urb->number_of_packets; i++) {
1507 struct ehci_iso_packet *packet = &iso_sched->packet [i];
1512 length = urb->iso_frame_desc [i].length & 0x03ff;
1513 buf = dma + urb->iso_frame_desc [i].offset;
1515 trans = SITD_STS_ACTIVE;
1516 if (((i + 1) == urb->number_of_packets)
1517 && !(urb->transfer_flags & URB_NO_INTERRUPT))
1519 trans |= length << 16;
1520 packet->transaction = cpu_to_le32 (trans);
1522 /* might need to cross a buffer page within a td */
1524 packet->buf1 = (buf + length) & ~0x0fff;
1525 if (packet->buf1 != (buf & ~(u64)0x0fff))
1528 /* OUT uses multiple start-splits */
1529 if (stream->bEndpointAddress & USB_DIR_IN)
1531 length = (length + 187) / 188;
1532 if (length > 1) /* BEGIN vs ALL */
1534 packet->buf1 |= length;
1539 sitd_urb_transaction (
1540 struct ehci_iso_stream *stream,
1541 struct ehci_hcd *ehci,
1546 struct ehci_sitd *sitd;
1547 dma_addr_t sitd_dma;
1549 struct ehci_iso_sched *iso_sched;
1550 unsigned long flags;
1552 iso_sched = iso_sched_alloc (urb->number_of_packets, mem_flags);
1553 if (iso_sched == NULL)
1556 sitd_sched_init (iso_sched, stream, urb);
1558 /* allocate/init sITDs */
1559 spin_lock_irqsave (&ehci->lock, flags);
1560 for (i = 0; i < urb->number_of_packets; i++) {
1562 /* NOTE: for now, we don't try to handle wraparound cases
1563 * for IN (using sitd->hw_backpointer, like a FSTN), which
1564 * means we never need two sitds for full speed packets.
1567 /* free_list.next might be cache-hot ... but maybe
1568 * the HC caches it too. avoid that issue for now.
1571 /* prefer previously-allocated sitds */
1572 if (!list_empty(&stream->free_list)) {
1573 sitd = list_entry (stream->free_list.prev,
1574 struct ehci_sitd, sitd_list);
1575 list_del (&sitd->sitd_list);
1576 sitd_dma = sitd->sitd_dma;
1581 spin_unlock_irqrestore (&ehci->lock, flags);
1582 sitd = dma_pool_alloc (ehci->sitd_pool, mem_flags,
1584 spin_lock_irqsave (&ehci->lock, flags);
1588 iso_sched_free (stream, iso_sched);
1589 spin_unlock_irqrestore (&ehci->lock, flags);
1592 memset (sitd, 0, sizeof *sitd);
1593 sitd->sitd_dma = sitd_dma;
1594 list_add (&sitd->sitd_list, &iso_sched->td_list);
1597 /* temporarily store schedule info in hcpriv */
1598 urb->hcpriv = iso_sched;
1599 urb->error_count = 0;
1601 spin_unlock_irqrestore (&ehci->lock, flags);
1605 /*-------------------------------------------------------------------------*/
1609 struct ehci_iso_stream *stream,
1610 struct ehci_sitd *sitd,
1611 struct ehci_iso_sched *iso_sched,
1615 struct ehci_iso_packet *uf = &iso_sched->packet [index];
1616 u64 bufp = uf->bufp;
1618 sitd->hw_next = EHCI_LIST_END;
1619 sitd->hw_fullspeed_ep = stream->address;
1620 sitd->hw_uframe = stream->splits;
1621 sitd->hw_results = uf->transaction;
1622 sitd->hw_backpointer = EHCI_LIST_END;
1625 sitd->hw_buf [0] = cpu_to_le32 (bufp);
1626 sitd->hw_buf_hi [0] = cpu_to_le32 (bufp >> 32);
1628 sitd->hw_buf [1] = cpu_to_le32 (uf->buf1);
1631 sitd->hw_buf_hi [1] = cpu_to_le32 (bufp >> 32);
1632 sitd->index = index;
1636 sitd_link (struct ehci_hcd *ehci, unsigned frame, struct ehci_sitd *sitd)
1638 /* note: sitd ordering could matter (CSPLIT then SSPLIT) */
1639 sitd->sitd_next = ehci->pshadow [frame];
1640 sitd->hw_next = ehci->periodic [frame];
1641 ehci->pshadow [frame].sitd = sitd;
1642 sitd->frame = frame;
1644 ehci->periodic [frame] = cpu_to_le32 (sitd->sitd_dma) | Q_TYPE_SITD;
1647 /* fit urb's sitds into the selected schedule slot; activate as needed */
1650 struct ehci_hcd *ehci,
1653 struct ehci_iso_stream *stream
1657 unsigned next_uframe;
1658 struct ehci_iso_sched *sched = urb->hcpriv;
1659 struct ehci_sitd *sitd;
1661 next_uframe = stream->next_uframe;
1663 if (list_empty(&stream->td_list)) {
1664 /* usbfs ignores TT bandwidth */
1665 ehci_to_hcd(ehci)->self.bandwidth_allocated
1666 += stream->bandwidth;
1668 "sched devp %s ep%d%s-iso [%d] %dms/%04x\n",
1669 urb->dev->devpath, stream->bEndpointAddress & 0x0f,
1670 (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out",
1671 (next_uframe >> 3) % ehci->periodic_size,
1672 stream->interval, le32_to_cpu (stream->splits));
1673 stream->start = jiffies;
1675 ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs++;
1677 /* fill sITDs frame by frame */
1678 for (packet = 0, sitd = NULL;
1679 packet < urb->number_of_packets;
1682 /* ASSERT: we have all necessary sitds */
1683 BUG_ON (list_empty (&sched->td_list));
1685 /* ASSERT: no itds for this endpoint in this frame */
1687 sitd = list_entry (sched->td_list.next,
1688 struct ehci_sitd, sitd_list);
1689 list_move_tail (&sitd->sitd_list, &stream->td_list);
1690 sitd->stream = iso_stream_get (stream);
1691 sitd->urb = usb_get_urb (urb);
1693 sitd_patch (stream, sitd, sched, packet);
1694 sitd_link (ehci, (next_uframe >> 3) % ehci->periodic_size,
1697 next_uframe += stream->interval << 3;
1698 stream->depth += stream->interval << 3;
1700 stream->next_uframe = next_uframe % mod;
1702 /* don't need that schedule data any more */
1703 iso_sched_free (stream, sched);
1706 timer_action (ehci, TIMER_IO_WATCHDOG);
1707 if (!ehci->periodic_sched++)
1708 return enable_periodic (ehci);
1712 /*-------------------------------------------------------------------------*/
1714 #define SITD_ERRS (SITD_STS_ERR | SITD_STS_DBE | SITD_STS_BABBLE \
1715 | SITD_STS_XACT | SITD_STS_MMF)
1719 struct ehci_hcd *ehci,
1720 struct ehci_sitd *sitd,
1721 struct pt_regs *regs
1723 struct urb *urb = sitd->urb;
1724 struct usb_iso_packet_descriptor *desc;
1727 struct ehci_iso_stream *stream = sitd->stream;
1728 struct usb_device *dev;
1730 urb_index = sitd->index;
1731 desc = &urb->iso_frame_desc [urb_index];
1732 t = le32_to_cpup (&sitd->hw_results);
1734 /* report transfer status */
1735 if (t & SITD_ERRS) {
1737 if (t & SITD_STS_DBE)
1738 desc->status = usb_pipein (urb->pipe)
1739 ? -ENOSR /* hc couldn't read */
1740 : -ECOMM; /* hc couldn't write */
1741 else if (t & SITD_STS_BABBLE)
1742 desc->status = -EOVERFLOW;
1743 else /* XACT, MMF, etc */
1744 desc->status = -EPROTO;
1747 desc->actual_length = desc->length - SITD_LENGTH (t);
1752 sitd->stream = NULL;
1753 list_move (&sitd->sitd_list, &stream->free_list);
1754 stream->depth -= stream->interval << 3;
1755 iso_stream_put (ehci, stream);
1757 /* handle completion now? */
1758 if ((urb_index + 1) != urb->number_of_packets)
1761 /* ASSERT: it's really the last sitd for this urb
1762 list_for_each_entry (sitd, &stream->td_list, sitd_list)
1763 BUG_ON (sitd->urb == urb);
1766 /* give urb back to the driver */
1768 ehci_urb_done (ehci, urb, regs);
1771 /* defer stopping schedule; completion can submit */
1772 ehci->periodic_sched--;
1773 if (!ehci->periodic_sched)
1774 (void) disable_periodic (ehci);
1775 ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs--;
1777 if (list_empty (&stream->td_list)) {
1778 ehci_to_hcd(ehci)->self.bandwidth_allocated
1779 -= stream->bandwidth;
1781 "deschedule devp %s ep%d%s-iso\n",
1782 dev->devpath, stream->bEndpointAddress & 0x0f,
1783 (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out");
1785 iso_stream_put (ehci, stream);
1791 static int sitd_submit (struct ehci_hcd *ehci, struct urb *urb,
1794 int status = -EINVAL;
1795 unsigned long flags;
1796 struct ehci_iso_stream *stream;
1798 /* Get iso_stream head */
1799 stream = iso_stream_find (ehci, urb);
1800 if (stream == NULL) {
1801 ehci_dbg (ehci, "can't get iso stream\n");
1804 if (urb->interval != stream->interval) {
1805 ehci_dbg (ehci, "can't change iso interval %d --> %d\n",
1806 stream->interval, urb->interval);
1810 #ifdef EHCI_URB_TRACE
1812 "submit %p dev%s ep%d%s-iso len %d\n",
1813 urb, urb->dev->devpath,
1814 usb_pipeendpoint (urb->pipe),
1815 usb_pipein (urb->pipe) ? "in" : "out",
1816 urb->transfer_buffer_length);
1819 /* allocate SITDs */
1820 status = sitd_urb_transaction (stream, ehci, urb, mem_flags);
1822 ehci_dbg (ehci, "can't init sitds\n");
1826 /* schedule ... need to lock */
1827 spin_lock_irqsave (&ehci->lock, flags);
1828 if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE,
1829 &ehci_to_hcd(ehci)->flags)))
1830 status = -ESHUTDOWN;
1832 status = iso_stream_schedule (ehci, urb, stream);
1834 sitd_link_urb (ehci, urb, ehci->periodic_size << 3, stream);
1835 spin_unlock_irqrestore (&ehci->lock, flags);
1839 iso_stream_put (ehci, stream);
1846 sitd_submit (struct ehci_hcd *ehci, struct urb *urb, gfp_t mem_flags)
1848 ehci_dbg (ehci, "split iso support is disabled\n");
1852 static inline unsigned
1854 struct ehci_hcd *ehci,
1855 struct ehci_sitd *sitd,
1856 struct pt_regs *regs
1858 ehci_err (ehci, "sitd_complete %p?\n", sitd);
1862 #endif /* USB_EHCI_SPLIT_ISO */
1864 /*-------------------------------------------------------------------------*/
1867 scan_periodic (struct ehci_hcd *ehci, struct pt_regs *regs)
1869 unsigned frame, clock, now_uframe, mod;
1872 mod = ehci->periodic_size << 3;
1875 * When running, scan from last scan point up to "now"
1876 * else clean up by scanning everything that's left.
1877 * Touches as few pages as possible: cache-friendly.
1879 now_uframe = ehci->next_uframe;
1880 if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state))
1881 clock = readl (&ehci->regs->frame_index);
1883 clock = now_uframe + mod - 1;
1887 union ehci_shadow q, *q_p;
1891 /* don't scan past the live uframe */
1892 frame = now_uframe >> 3;
1893 if (frame == (clock >> 3))
1894 uframes = now_uframe & 0x07;
1896 /* safe to scan the whole frame at once */
1902 /* scan each element in frame's queue for completions */
1903 q_p = &ehci->pshadow [frame];
1904 hw_p = &ehci->periodic [frame];
1906 type = Q_NEXT_TYPE (*hw_p);
1909 while (q.ptr != NULL) {
1911 union ehci_shadow temp;
1914 live = HC_IS_RUNNING (ehci_to_hcd(ehci)->state);
1917 /* handle any completions */
1918 temp.qh = qh_get (q.qh);
1919 type = Q_NEXT_TYPE (q.qh->hw_next);
1921 modified = qh_completions (ehci, temp.qh, regs);
1922 if (unlikely (list_empty (&temp.qh->qtd_list)))
1923 intr_deschedule (ehci, temp.qh);
1927 /* for "save place" FSTNs, look at QH entries
1928 * in the previous frame for completions.
1930 if (q.fstn->hw_prev != EHCI_LIST_END) {
1931 dbg ("ignoring completions from FSTNs");
1933 type = Q_NEXT_TYPE (q.fstn->hw_next);
1934 q = q.fstn->fstn_next;
1937 /* skip itds for later in the frame */
1939 for (uf = live ? uframes : 8; uf < 8; uf++) {
1940 if (0 == (q.itd->hw_transaction [uf]
1943 q_p = &q.itd->itd_next;
1944 hw_p = &q.itd->hw_next;
1945 type = Q_NEXT_TYPE (q.itd->hw_next);
1952 /* this one's ready ... HC won't cache the
1953 * pointer for much longer, if at all.
1955 *q_p = q.itd->itd_next;
1956 *hw_p = q.itd->hw_next;
1957 type = Q_NEXT_TYPE (q.itd->hw_next);
1959 modified = itd_complete (ehci, q.itd, regs);
1963 if ((q.sitd->hw_results & SITD_ACTIVE)
1965 q_p = &q.sitd->sitd_next;
1966 hw_p = &q.sitd->hw_next;
1967 type = Q_NEXT_TYPE (q.sitd->hw_next);
1971 *q_p = q.sitd->sitd_next;
1972 *hw_p = q.sitd->hw_next;
1973 type = Q_NEXT_TYPE (q.sitd->hw_next);
1975 modified = sitd_complete (ehci, q.sitd, regs);
1979 dbg ("corrupt type %d frame %d shadow %p",
1980 type, frame, q.ptr);
1985 /* assume completion callbacks modify the queue */
1986 if (unlikely (modified))
1990 /* stop when we catch up to the HC */
1992 // FIXME: this assumes we won't get lapped when
1993 // latencies climb; that should be rare, but...
1994 // detect it, and just go all the way around.
1995 // FLR might help detect this case, so long as latencies
1996 // don't exceed periodic_size msec (default 1.024 sec).
1998 // FIXME: likewise assumes HC doesn't halt mid-scan
2000 if (now_uframe == clock) {
2003 if (!HC_IS_RUNNING (ehci_to_hcd(ehci)->state))
2005 ehci->next_uframe = now_uframe;
2006 now = readl (&ehci->regs->frame_index) % mod;
2007 if (now_uframe == now)
2010 /* rescan the rest of this frame, then ... */