drivers/usb/host/ohci-hcd.c

   1 /*
   2  * OHCI HCD (Host Controller Driver) for USB.
   3  *
   4  * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
   5  * (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net>
   6  *
   7  * [ Initialisation is based on Linus'  ]
   8  * [ uhci code and gregs ohci fragments ]
   9  * [ (C) Copyright 1999 Linus Torvalds  ]
  10  * [ (C) Copyright 1999 Gregory P. Smith]
  11  *
  12  *
  13  * OHCI is the main "non-Intel/VIA" standard for USB 1.1 host controller
  14  * interfaces (though some non-x86 Intel chips use it).  It supports
  15  * smarter hardware than UHCI.  A download link for the spec available
  16  * through the http://www.usb.org website.
  17  *
  18  * This file is licenced under the GPL.
  19  */
  20
  21 #include <linux/module.h>
  22 #include <linux/moduleparam.h>
  23 #include <linux/pci.h>
  24 #include <linux/kernel.h>
  25 #include <linux/delay.h>
  26 #include <linux/ioport.h>
  27 #include <linux/sched.h>
  28 #include <linux/slab.h>
  29 #include <linux/errno.h>
  30 #include <linux/init.h>
  31 #include <linux/timer.h>
  32 #include <linux/list.h>
  33 #include <linux/usb.h>
  34 #include <linux/usb/otg.h>
  35 #include <linux/dma-mapping.h>
  36 #include <linux/dmapool.h>
  37 #include <linux/reboot.h>
  38 #include <linux/workqueue.h>
  39
  40 #include <asm/io.h>
  41 #include <asm/irq.h>
  42 #include <asm/system.h>
  43 #include <asm/unaligned.h>
  44 #include <asm/byteorder.h>
  45
  46 #include "../core/hcd.h"
  47
  48 #define DRIVER_VERSION "2006 August 04"
  49 #define DRIVER_AUTHOR "Roman Weissgaerber, David Brownell"
  50 #define DRIVER_DESC "USB 1.1 'Open' Host Controller (OHCI) Driver"
  51
  52 /*-------------------------------------------------------------------------*/
  53
  54 #undef OHCI_VERBOSE_DEBUG       /* not always helpful */
  55
  56 /* For initializing controller (mask in an HCFS mode too) */
  57 #define OHCI_CONTROL_INIT       OHCI_CTRL_CBSR
  58 #define OHCI_INTR_INIT \
  59                 (OHCI_INTR_MIE | OHCI_INTR_RHSC | OHCI_INTR_UE \
  60                 | OHCI_INTR_RD | OHCI_INTR_WDH)
  61
  62 #ifdef __hppa__
  63 /* On PA-RISC, PDC can leave IR set incorrectly; ignore it there. */
  64 #define IR_DISABLE
  65 #endif
  66
  67 #ifdef CONFIG_ARCH_OMAP
  68 /* OMAP doesn't support IR (no SMM; not needed) */
  69 #define IR_DISABLE
  70 #endif
  71
  72 /*-------------------------------------------------------------------------*/
  73
  74 static const char       hcd_name [] = "ohci_hcd";
  75
  76 #define STATECHANGE_DELAY       msecs_to_jiffies(300)
  77
  78 #include "ohci.h"
  79
  80 static void ohci_dump (struct ohci_hcd *ohci, int verbose);
  81 static int ohci_init (struct ohci_hcd *ohci);
  82 static void ohci_stop (struct usb_hcd *hcd);
  83
  84 #if defined(CONFIG_PM) || defined(CONFIG_PCI)
  85 static int ohci_restart (struct ohci_hcd *ohci);
  86 #endif
  87
  88 #include "ohci-hub.c"
  89 #include "ohci-dbg.c"
  90 #include "ohci-mem.c"
  91 #include "ohci-q.c"
  92
  93
  94 /*
  95  * On architectures with edge-triggered interrupts we must never return
  96  * IRQ_NONE.
  97  */
  98 #if defined(CONFIG_SA1111)  /* ... or other edge-triggered systems */
  99 #define IRQ_NOTMINE     IRQ_HANDLED
 100 #else
 101 #define IRQ_NOTMINE     IRQ_NONE
 102 #endif
 103
 104
 105 /* Some boards misreport power switching/overcurrent */
 106 static int distrust_firmware = 1;
 107 module_param (distrust_firmware, bool, 0);
 108 MODULE_PARM_DESC (distrust_firmware,
 109         "true to distrust firmware power/overcurrent setup");
 110
 111 /* Some boards leave IR set wrongly, since they fail BIOS/SMM handshakes */
 112 static int no_handshake = 0;
 113 module_param (no_handshake, bool, 0);
 114 MODULE_PARM_DESC (no_handshake, "true (not default) disables BIOS handshake");
 115
 116 /*-------------------------------------------------------------------------*/
 117
 118 /*
 119  * queue up an urb for anything except the root hub
 120  */
 121 static int ohci_urb_enqueue (
 122         struct usb_hcd  *hcd,
 123         struct urb      *urb,
 124         gfp_t           mem_flags
 125 ) {
 126         struct ohci_hcd *ohci = hcd_to_ohci (hcd);
 127         struct ed       *ed;
 128         urb_priv_t      *urb_priv;
 129         unsigned int    pipe = urb->pipe;
 130         int             i, size = 0;
 131         unsigned long   flags;
 132         int             retval = 0;
 133
 134 #ifdef OHCI_VERBOSE_DEBUG
 135         urb_print(urb, "SUB", usb_pipein(pipe), -EINPROGRESS);
 136 #endif
 137
 138         /* every endpoint has a ed, locate and maybe (re)initialize it */
 139         if (! (ed = ed_get (ohci, urb->ep, urb->dev, pipe, urb->interval)))
 140                 return -ENOMEM;
 141
 142         /* for the private part of the URB we need the number of TDs (size) */
 143         switch (ed->type) {
 144                 case PIPE_CONTROL:
 145                         /* td_submit_urb() doesn't yet handle these */
 146                         if (urb->transfer_buffer_length > 4096)
 147                                 return -EMSGSIZE;
 148
 149                         /* 1 TD for setup, 1 for ACK, plus ... */
 150                         size = 2;
 151                         /* FALLTHROUGH */
 152                 // case PIPE_INTERRUPT:
 153                 // case PIPE_BULK:
 154                 default:
 155                         /* one TD for every 4096 Bytes (can be upto 8K) */
 156                         size += urb->transfer_buffer_length / 4096;
 157                         /* ... and for any remaining bytes ... */
 158                         if ((urb->transfer_buffer_length % 4096) != 0)
 159                                 size++;
 160                         /* ... and maybe a zero length packet to wrap it up */
 161                         if (size == 0)
 162                                 size++;
 163                         else if ((urb->transfer_flags & URB_ZERO_PACKET) != 0
 164                                 && (urb->transfer_buffer_length
 165                                         % usb_maxpacket (urb->dev, pipe,
 166                                                 usb_pipeout (pipe))) == 0)
 167                                 size++;
 168                         break;
 169                 case PIPE_ISOCHRONOUS: /* number of packets from URB */
 170                         size = urb->number_of_packets;
 171                         break;
 172         }
 173
 174         /* allocate the private part of the URB */
 175         urb_priv = kzalloc (sizeof (urb_priv_t) + size * sizeof (struct td *),
 176                         mem_flags);
 177         if (!urb_priv)
 178                 return -ENOMEM;
 179         INIT_LIST_HEAD (&urb_priv->pending);
 180         urb_priv->length = size;
 181         urb_priv->ed = ed;
 182
 183         /* allocate the TDs (deferring hash chain updates) */
 184         for (i = 0; i < size; i++) {
 185                 urb_priv->td [i] = td_alloc (ohci, mem_flags);
 186                 if (!urb_priv->td [i]) {
 187                         urb_priv->length = i;
 188                         urb_free_priv (ohci, urb_priv);
 189                         return -ENOMEM;
 190                 }
 191         }
 192
 193         spin_lock_irqsave (&ohci->lock, flags);
 194
 195         /* don't submit to a dead HC */
 196         if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) {
 197                 retval = -ENODEV;
 198                 goto fail;
 199         }
 200         if (!HC_IS_RUNNING(hcd->state)) {
 201                 retval = -ENODEV;
 202                 goto fail;
 203         }
 204         retval = usb_hcd_link_urb_to_ep(hcd, urb);
 205         if (retval)
 206                 goto fail;
 207
 208         /* schedule the ed if needed */
 209         if (ed->state == ED_IDLE) {
 210                 retval = ed_schedule (ohci, ed);
 211                 if (retval < 0) {
 212                         usb_hcd_unlink_urb_from_ep(hcd, urb);
 213                         goto fail;
 214                 }
 215                 if (ed->type == PIPE_ISOCHRONOUS) {
 216                         u16     frame = ohci_frame_no(ohci);
 217
 218                         /* delay a few frames before the first TD */
 219                         frame += max_t (u16, 8, ed->interval);
 220                         frame &= ~(ed->interval - 1);
 221                         frame |= ed->branch;
 222                         urb->start_frame = frame;
 223
 224                         /* yes, only URB_ISO_ASAP is supported, and
 225                          * urb->start_frame is never used as input.
 226                          */
 227                 }
 228         } else if (ed->type == PIPE_ISOCHRONOUS)
 229                 urb->start_frame = ed->last_iso + ed->interval;
 230
 231         /* fill the TDs and link them to the ed; and
 232          * enable that part of the schedule, if needed
 233          * and update count of queued periodic urbs
 234          */
 235         urb->hcpriv = urb_priv;
 236         td_submit_urb (ohci, urb);
 237
 238 fail:
 239         if (retval)
 240                 urb_free_priv (ohci, urb_priv);
 241         spin_unlock_irqrestore (&ohci->lock, flags);
 242         return retval;
 243 }
 244
 245 /*
 246  * decouple the URB from the HC queues (TDs, urb_priv).
 247  * reporting is always done
 248  * asynchronously, and we might be dealing with an urb that's
 249  * partially transferred, or an ED with other urbs being unlinked.
 250  */
 251 static int ohci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
 252 {
 253         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 254         unsigned long           flags;
 255         int                     rc;
 256
 257 #ifdef OHCI_VERBOSE_DEBUG
 258         urb_print(urb, "UNLINK", 1, status);
 259 #endif
 260
 261         spin_lock_irqsave (&ohci->lock, flags);
 262         rc = usb_hcd_check_unlink_urb(hcd, urb, status);
 263         if (rc) {
 264                 ;       /* Do nothing */
 265         } else if (HC_IS_RUNNING(hcd->state)) {
 266                 urb_priv_t  *urb_priv;
 267
 268                 /* Unless an IRQ completed the unlink while it was being
 269                  * handed to us, flag it for unlink and giveback, and force
 270                  * some upcoming INTR_SF to call finish_unlinks()
 271                  */
 272                 urb_priv = urb->hcpriv;
 273                 if (urb_priv) {
 274                         if (urb_priv->ed->state == ED_OPER)
 275                                 start_ed_unlink (ohci, urb_priv->ed);
 276                 }
 277         } else {
 278                 /*
 279                  * with HC dead, we won't respect hc queue pointers
 280                  * any more ... just clean up every urb's memory.
 281                  */
 282                 if (urb->hcpriv)
 283                         finish_urb(ohci, urb, status);
 284         }
 285         spin_unlock_irqrestore (&ohci->lock, flags);
 286         return rc;
 287 }
 288
 289 /*-------------------------------------------------------------------------*/
 290
 291 /* frees config/altsetting state for endpoints,
 292  * including ED memory, dummy TD, and bulk/intr data toggle
 293  */
 294
 295 static void
 296 ohci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
 297 {
 298         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 299         unsigned long           flags;
 300         struct ed               *ed = ep->hcpriv;
 301         unsigned                limit = 1000;
 302
 303         /* ASSERT:  any requests/urbs are being unlinked */
 304         /* ASSERT:  nobody can be submitting urbs for this any more */
 305
 306         if (!ed)
 307                 return;
 308
 309 rescan:
 310         spin_lock_irqsave (&ohci->lock, flags);
 311
 312         if (!HC_IS_RUNNING (hcd->state)) {
 313 sanitize:
 314                 ed->state = ED_IDLE;
 315                 if (quirk_zfmicro(ohci) && ed->type == PIPE_INTERRUPT)
 316                         ohci->eds_scheduled--;
 317                 finish_unlinks (ohci, 0);
 318         }
 319
 320         switch (ed->state) {
 321         case ED_UNLINK:         /* wait for hw to finish? */
 322                 /* major IRQ delivery trouble loses INTR_SF too... */
 323                 if (limit-- == 0) {
 324                         ohci_warn(ohci, "ED unlink timeout\n");
 325                         if (quirk_zfmicro(ohci)) {
 326                                 ohci_warn(ohci, "Attempting ZF TD recovery\n");
 327                                 ohci->ed_to_check = ed;
 328                                 ohci->zf_delay = 2;
 329                         }
 330                         goto sanitize;
 331                 }
 332                 spin_unlock_irqrestore (&ohci->lock, flags);
 333                 schedule_timeout_uninterruptible(1);
 334                 goto rescan;
 335         case ED_IDLE:           /* fully unlinked */
 336                 if (list_empty (&ed->td_list)) {
 337                         td_free (ohci, ed->dummy);
 338                         ed_free (ohci, ed);
 339                         break;
 340                 }
 341                 /* else FALL THROUGH */
 342         default:
 343                 /* caller was supposed to have unlinked any requests;
 344                  * that's not our job.  can't recover; must leak ed.
 345                  */
 346                 ohci_err (ohci, "leak ed %p (#%02x) state %d%s\n",
 347                         ed, ep->desc.bEndpointAddress, ed->state,
 348                         list_empty (&ed->td_list) ? "" : " (has tds)");
 349                 td_free (ohci, ed->dummy);
 350                 break;
 351         }
 352         ep->hcpriv = NULL;
 353         spin_unlock_irqrestore (&ohci->lock, flags);
 354         return;
 355 }
 356
 357 static int ohci_get_frame (struct usb_hcd *hcd)
 358 {
 359         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 360
 361         return ohci_frame_no(ohci);
 362 }
 363
 364 static void ohci_usb_reset (struct ohci_hcd *ohci)
 365 {
 366         ohci->hc_control = ohci_readl (ohci, &ohci->regs->control);
 367         ohci->hc_control &= OHCI_CTRL_RWC;
 368         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 369 }
 370
 371 /* ohci_shutdown forcibly disables IRQs and DMA, helping kexec and
 372  * other cases where the next software may expect clean state from the
 373  * "firmware".  this is bus-neutral, unlike shutdown() methods.
 374  */
 375 static void
 376 ohci_shutdown (struct usb_hcd *hcd)
 377 {
 378         struct ohci_hcd *ohci;
 379
 380         ohci = hcd_to_ohci (hcd);
 381         ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
 382         ohci_usb_reset (ohci);
 383         /* flush the writes */
 384         (void) ohci_readl (ohci, &ohci->regs->control);
 385 }
 386
 387 static int check_ed(struct ohci_hcd *ohci, struct ed *ed)
 388 {
 389         return (hc32_to_cpu(ohci, ed->hwINFO) & ED_IN) != 0
 390                 && (hc32_to_cpu(ohci, ed->hwHeadP) & TD_MASK)
 391                         == (hc32_to_cpu(ohci, ed->hwTailP) & TD_MASK)
 392                 && !list_empty(&ed->td_list);
 393 }
 394
 395 /* ZF Micro watchdog timer callback. The ZF Micro chipset sometimes completes
 396  * an interrupt TD but neglects to add it to the donelist.  On systems with
 397  * this chipset, we need to periodically check the state of the queues to look
 398  * for such "lost" TDs.
 399  */
 400 static void unlink_watchdog_func(unsigned long _ohci)
 401 {
 402         unsigned long   flags;
 403         unsigned        max;
 404         unsigned        seen_count = 0;
 405         unsigned        i;
 406         struct ed       **seen = NULL;
 407         struct ohci_hcd *ohci = (struct ohci_hcd *) _ohci;
 408
 409         spin_lock_irqsave(&ohci->lock, flags);
 410         max = ohci->eds_scheduled;
 411         if (!max)
 412                 goto done;
 413
 414         if (ohci->ed_to_check)
 415                 goto out;
 416
 417         seen = kcalloc(max, sizeof *seen, GFP_ATOMIC);
 418         if (!seen)
 419                 goto out;
 420
 421         for (i = 0; i < NUM_INTS; i++) {
 422                 struct ed       *ed = ohci->periodic[i];
 423
 424                 while (ed) {
 425                         unsigned        temp;
 426
 427                         /* scan this branch of the periodic schedule tree */
 428                         for (temp = 0; temp < seen_count; temp++) {
 429                                 if (seen[temp] == ed) {
 430                                         /* we've checked it and what's after */
 431                                         ed = NULL;
 432                                         break;
 433                                 }
 434                         }
 435                         if (!ed)
 436                                 break;
 437                         seen[seen_count++] = ed;
 438                         if (!check_ed(ohci, ed)) {
 439                                 ed = ed->ed_next;
 440                                 continue;
 441                         }
 442
 443                         /* HC's TD list is empty, but HCD sees at least one
 444                          * TD that's not been sent through the donelist.
 445                          */
 446                         ohci->ed_to_check = ed;
 447                         ohci->zf_delay = 2;
 448
 449                         /* The HC may wait until the next frame to report the
 450                          * TD as done through the donelist and INTR_WDH.  (We
 451                          * just *assume* it's not a multi-TD interrupt URB;
 452                          * those could defer the IRQ more than one frame, using
 453                          * DI...)  Check again after the next INTR_SF.
 454                          */
 455                         ohci_writel(ohci, OHCI_INTR_SF,
 456                                         &ohci->regs->intrstatus);
 457                         ohci_writel(ohci, OHCI_INTR_SF,
 458                                         &ohci->regs->intrenable);
 459
 460                         /* flush those writes */
 461                         (void) ohci_readl(ohci, &ohci->regs->control);
 462
 463                         goto out;
 464                 }
 465         }
 466 out:
 467         kfree(seen);
 468         if (ohci->eds_scheduled)
 469                 mod_timer(&ohci->unlink_watchdog, round_jiffies_relative(HZ));
 470 done:
 471         spin_unlock_irqrestore(&ohci->lock, flags);
 472 }
 473
 474 /*-------------------------------------------------------------------------*
 475  * HC functions
 476  *-------------------------------------------------------------------------*/
 477
 478 /* init memory, and kick BIOS/SMM off */
 479
 480 static int ohci_init (struct ohci_hcd *ohci)
 481 {
 482         int ret;
 483         struct usb_hcd *hcd = ohci_to_hcd(ohci);
 484
 485         disable (ohci);
 486         ohci->regs = hcd->regs;
 487
 488         /* REVISIT this BIOS handshake is now moved into PCI "quirks", and
 489          * was never needed for most non-PCI systems ... remove the code?
 490          */
 491
 492 #ifndef IR_DISABLE
 493         /* SMM owns the HC?  not for long! */
 494         if (!no_handshake && ohci_readl (ohci,
 495                                         &ohci->regs->control) & OHCI_CTRL_IR) {
 496                 u32 temp;
 497
 498                 ohci_dbg (ohci, "USB HC TakeOver from BIOS/SMM\n");
 499
 500                 /* this timeout is arbitrary.  we make it long, so systems
 501                  * depending on usb keyboards may be usable even if the
 502                  * BIOS/SMM code seems pretty broken.
 503                  */
 504                 temp = 500;     /* arbitrary: five seconds */
 505
 506                 ohci_writel (ohci, OHCI_INTR_OC, &ohci->regs->intrenable);
 507                 ohci_writel (ohci, OHCI_OCR, &ohci->regs->cmdstatus);
 508                 while (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_IR) {
 509                         msleep (10);
 510                         if (--temp == 0) {
 511                                 ohci_err (ohci, "USB HC takeover failed!"
 512                                         "  (BIOS/SMM bug)\n");
 513                                 return -EBUSY;
 514                         }
 515                 }
 516                 ohci_usb_reset (ohci);
 517         }
 518 #endif
 519
 520         /* Disable HC interrupts */
 521         ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
 522
 523         /* flush the writes, and save key bits like RWC */
 524         if (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_RWC)
 525                 ohci->hc_control |= OHCI_CTRL_RWC;
 526
 527         /* Read the number of ports unless overridden */
 528         if (ohci->num_ports == 0)
 529                 ohci->num_ports = roothub_a(ohci) & RH_A_NDP;
 530
 531         if (ohci->hcca)
 532                 return 0;
 533
 534         ohci->hcca = dma_alloc_coherent (hcd->self.controller,
 535                         sizeof *ohci->hcca, &ohci->hcca_dma, 0);
 536         if (!ohci->hcca)
 537                 return -ENOMEM;
 538
 539         if ((ret = ohci_mem_init (ohci)) < 0)
 540                 ohci_stop (hcd);
 541         else {
 542                 create_debug_files (ohci);
 543         }
 544
 545         return ret;
 546 }
 547
 548 /*-------------------------------------------------------------------------*/
 549
 550 /* Start an OHCI controller, set the BUS operational
 551  * resets USB and controller
 552  * enable interrupts
 553  */
 554 static int ohci_run (struct ohci_hcd *ohci)
 555 {
 556         u32                     mask, temp;
 557         int                     first = ohci->fminterval == 0;
 558         struct usb_hcd          *hcd = ohci_to_hcd(ohci);
 559
 560         disable (ohci);
 561
 562         /* boot firmware should have set this up (5.1.1.3.1) */
 563         if (first) {
 564
 565                 temp = ohci_readl (ohci, &ohci->regs->fminterval);
 566                 ohci->fminterval = temp & 0x3fff;
 567                 if (ohci->fminterval != FI)
 568                         ohci_dbg (ohci, "fminterval delta %d\n",
 569                                 ohci->fminterval - FI);
 570                 ohci->fminterval |= FSMP (ohci->fminterval) << 16;
 571                 /* also: power/overcurrent flags in roothub.a */
 572         }
 573
 574         /* Reset USB nearly "by the book".  RemoteWakeupConnected was
 575          * saved if boot firmware (BIOS/SMM/...) told us it's connected,
 576          * or if bus glue did the same (e.g. for PCI add-in cards with
 577          * PCI PM support).
 578          */
 579         if ((ohci->hc_control & OHCI_CTRL_RWC) != 0
 580                         && !device_may_wakeup(hcd->self.controller))
 581                 device_init_wakeup(hcd->self.controller, 1);
 582
 583         switch (ohci->hc_control & OHCI_CTRL_HCFS) {
 584         case OHCI_USB_OPER:
 585                 temp = 0;
 586                 break;
 587         case OHCI_USB_SUSPEND:
 588         case OHCI_USB_RESUME:
 589                 ohci->hc_control &= OHCI_CTRL_RWC;
 590                 ohci->hc_control |= OHCI_USB_RESUME;
 591                 temp = 10 /* msec wait */;
 592                 break;
 593         // case OHCI_USB_RESET:
 594         default:
 595                 ohci->hc_control &= OHCI_CTRL_RWC;
 596                 ohci->hc_control |= OHCI_USB_RESET;
 597                 temp = 50 /* msec wait */;
 598                 break;
 599         }
 600         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 601         // flush the writes
 602         (void) ohci_readl (ohci, &ohci->regs->control);
 603         msleep(temp);
 604
 605         memset (ohci->hcca, 0, sizeof (struct ohci_hcca));
 606
 607         /* 2msec timelimit here means no irqs/preempt */
 608         spin_lock_irq (&ohci->lock);
 609
 610 retry:
 611         /* HC Reset requires max 10 us delay */
 612         ohci_writel (ohci, OHCI_HCR,  &ohci->regs->cmdstatus);
 613         temp = 30;      /* ... allow extra time */
 614         while ((ohci_readl (ohci, &ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
 615                 if (--temp == 0) {
 616                         spin_unlock_irq (&ohci->lock);
 617                         ohci_err (ohci, "USB HC reset timed out!\n");
 618                         return -1;
 619                 }
 620                 udelay (1);
 621         }
 622
 623         /* now we're in the SUSPEND state ... must go OPERATIONAL
 624          * within 2msec else HC enters RESUME
 625          *
 626          * ... but some hardware won't init fmInterval "by the book"
 627          * (SiS, OPTi ...), so reset again instead.  SiS doesn't need
 628          * this if we write fmInterval after we're OPERATIONAL.
 629          * Unclear about ALi, ServerWorks, and others ... this could
 630          * easily be a longstanding bug in chip init on Linux.
 631          */
 632         if (ohci->flags & OHCI_QUIRK_INITRESET) {
 633                 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 634                 // flush those writes
 635                 (void) ohci_readl (ohci, &ohci->regs->control);
 636         }
 637
 638         /* Tell the controller where the control and bulk lists are
 639          * The lists are empty now. */
 640         ohci_writel (ohci, 0, &ohci->regs->ed_controlhead);
 641         ohci_writel (ohci, 0, &ohci->regs->ed_bulkhead);
 642
 643         /* a reset clears this */
 644         ohci_writel (ohci, (u32) ohci->hcca_dma, &ohci->regs->hcca);
 645
 646         periodic_reinit (ohci);
 647
 648         /* some OHCI implementations are finicky about how they init.
 649          * bogus values here mean not even enumeration could work.
 650          */
 651         if ((ohci_readl (ohci, &ohci->regs->fminterval) & 0x3fff0000) == 0
 652                         || !ohci_readl (ohci, &ohci->regs->periodicstart)) {
 653                 if (!(ohci->flags & OHCI_QUIRK_INITRESET)) {
 654                         ohci->flags |= OHCI_QUIRK_INITRESET;
 655                         ohci_dbg (ohci, "enabling initreset quirk\n");
 656                         goto retry;
 657                 }
 658                 spin_unlock_irq (&ohci->lock);
 659                 ohci_err (ohci, "init err (%08x %04x)\n",
 660                         ohci_readl (ohci, &ohci->regs->fminterval),
 661                         ohci_readl (ohci, &ohci->regs->periodicstart));
 662                 return -EOVERFLOW;
 663         }
 664
 665         /* use rhsc irqs after khubd is fully initialized */
 666         hcd->poll_rh = 1;
 667         hcd->uses_new_polling = 1;
 668
 669         /* start controller operations */
 670         ohci->hc_control &= OHCI_CTRL_RWC;
 671         ohci->hc_control |= OHCI_CONTROL_INIT | OHCI_USB_OPER;
 672         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 673         hcd->state = HC_STATE_RUNNING;
 674
 675         /* wake on ConnectStatusChange, matching external hubs */
 676         ohci_writel (ohci, RH_HS_DRWE, &ohci->regs->roothub.status);
 677
 678         /* Choose the interrupts we care about now, others later on demand */
 679         mask = OHCI_INTR_INIT;
 680         ohci_writel (ohci, ~0, &ohci->regs->intrstatus);
 681         ohci_writel (ohci, mask, &ohci->regs->intrenable);
 682
 683         /* handle root hub init quirks ... */
 684         temp = roothub_a (ohci);
 685         temp &= ~(RH_A_PSM | RH_A_OCPM);
 686         if (ohci->flags & OHCI_QUIRK_SUPERIO) {
 687                 /* NSC 87560 and maybe others */
 688                 temp |= RH_A_NOCP;
 689                 temp &= ~(RH_A_POTPGT | RH_A_NPS);
 690                 ohci_writel (ohci, temp, &ohci->regs->roothub.a);
 691         } else if ((ohci->flags & OHCI_QUIRK_AMD756) || distrust_firmware) {
 692                 /* hub power always on; required for AMD-756 and some
 693                  * Mac platforms.  ganged overcurrent reporting, if any.
 694                  */
 695                 temp |= RH_A_NPS;
 696                 ohci_writel (ohci, temp, &ohci->regs->roothub.a);
 697         }
 698         ohci_writel (ohci, RH_HS_LPSC, &ohci->regs->roothub.status);
 699         ohci_writel (ohci, (temp & RH_A_NPS) ? 0 : RH_B_PPCM,
 700                                                 &ohci->regs->roothub.b);
 701         // flush those writes
 702         (void) ohci_readl (ohci, &ohci->regs->control);
 703
 704         ohci->next_statechange = jiffies + STATECHANGE_DELAY;
 705         spin_unlock_irq (&ohci->lock);
 706
 707         // POTPGT delay is bits 24-31, in 2 ms units.
 708         mdelay ((temp >> 23) & 0x1fe);
 709         hcd->state = HC_STATE_RUNNING;
 710
 711         if (quirk_zfmicro(ohci)) {
 712                 /* Create timer to watch for bad queue state on ZF Micro */
 713                 setup_timer(&ohci->unlink_watchdog, unlink_watchdog_func,
 714                                 (unsigned long) ohci);
 715
 716                 ohci->eds_scheduled = 0;
 717                 ohci->ed_to_check = NULL;
 718         }
 719
 720         ohci_dump (ohci, 1);
 721
 722         return 0;
 723 }
 724
 725 /*-------------------------------------------------------------------------*/
 726
 727 /* an interrupt happens */
 728
 729 static irqreturn_t ohci_irq (struct usb_hcd *hcd)
 730 {
 731         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 732         struct ohci_regs __iomem *regs = ohci->regs;
 733         int                     ints;
 734
 735         /* we can eliminate a (slow) ohci_readl()
 736          * if _only_ WDH caused this irq
 737          */
 738         if ((ohci->hcca->done_head != 0)
 739                         && ! (hc32_to_cpup (ohci, &ohci->hcca->done_head)
 740                                 & 0x01)) {
 741                 ints =  OHCI_INTR_WDH;
 742
 743         /* cardbus/... hardware gone before remove() */
 744         } else if ((ints = ohci_readl (ohci, &regs->intrstatus)) == ~(u32)0) {
 745                 disable (ohci);
 746                 ohci_dbg (ohci, "device removed!\n");
 747                 return IRQ_HANDLED;
 748
 749         /* interrupt for some other device? */
 750         } else if ((ints &= ohci_readl (ohci, &regs->intrenable)) == 0) {
 751                 return IRQ_NOTMINE;
 752         }
 753
 754         if (ints & OHCI_INTR_UE) {
 755                 // e.g. due to PCI Master/Target Abort
 756                 if (quirk_nec(ohci)) {
 757                         /* Workaround for a silicon bug in some NEC chips used
 758                          * in Apple's PowerBooks. Adapted from Darwin code.
 759                          */
 760                         ohci_err (ohci, "OHCI Unrecoverable Error, scheduling NEC chip restart\n");
 761
 762                         ohci_writel (ohci, OHCI_INTR_UE, &regs->intrdisable);
 763
 764                         schedule_work (&ohci->nec_work);
 765                 } else {
 766                         disable (ohci);
 767                         ohci_err (ohci, "OHCI Unrecoverable Error, disabled\n");
 768                 }
 769
 770                 ohci_dump (ohci, 1);
 771                 ohci_usb_reset (ohci);
 772         }
 773
 774         if (ints & OHCI_INTR_RHSC) {
 775                 ohci_vdbg(ohci, "rhsc\n");
 776                 ohci->next_statechange = jiffies + STATECHANGE_DELAY;
 777                 ohci_writel(ohci, OHCI_INTR_RD | OHCI_INTR_RHSC,
 778                                 &regs->intrstatus);
 779
 780                 /* NOTE: Vendors didn't always make the same implementation
 781                  * choices for RHSC.  Many followed the spec; RHSC triggers
 782                  * on an edge, like setting and maybe clearing a port status
 783                  * change bit.  With others it's level-triggered, active
 784                  * until khubd clears all the port status change bits.  We'll
 785                  * always disable it here and rely on polling until khubd
 786                  * re-enables it.
 787                  */
 788                 ohci_writel(ohci, OHCI_INTR_RHSC, &regs->intrdisable);
 789                 usb_hcd_poll_rh_status(hcd);
 790         }
 791
 792         /* For connect and disconnect events, we expect the controller
 793          * to turn on RHSC along with RD.  But for remote wakeup events
 794          * this might not happen.
 795          */
 796         else if (ints & OHCI_INTR_RD) {
 797                 ohci_vdbg(ohci, "resume detect\n");
 798                 ohci_writel(ohci, OHCI_INTR_RD, &regs->intrstatus);
 799                 hcd->poll_rh = 1;
 800                 if (ohci->autostop) {
 801                         spin_lock (&ohci->lock);
 802                         ohci_rh_resume (ohci);
 803                         spin_unlock (&ohci->lock);
 804                 } else
 805                         usb_hcd_resume_root_hub(hcd);
 806         }
 807
 808         if (ints & OHCI_INTR_WDH) {
 809                 if (HC_IS_RUNNING(hcd->state))
 810                         ohci_writel (ohci, OHCI_INTR_WDH, &regs->intrdisable);
 811                 spin_lock (&ohci->lock);
 812                 dl_done_list (ohci);
 813                 spin_unlock (&ohci->lock);
 814                 if (HC_IS_RUNNING(hcd->state))
 815                         ohci_writel (ohci, OHCI_INTR_WDH, &regs->intrenable);
 816         }
 817
 818         if (quirk_zfmicro(ohci) && (ints & OHCI_INTR_SF)) {
 819                 spin_lock(&ohci->lock);
 820                 if (ohci->ed_to_check) {
 821                         struct ed *ed = ohci->ed_to_check;
 822
 823                         if (check_ed(ohci, ed)) {
 824                                 /* HC thinks the TD list is empty; HCD knows
 825                                  * at least one TD is outstanding
 826                                  */
 827                                 if (--ohci->zf_delay == 0) {
 828                                         struct td *td = list_entry(
 829                                                 ed->td_list.next,
 830                                                 struct td, td_list);
 831                                         ohci_warn(ohci,
 832                                                   "Reclaiming orphan TD %p\n",
 833                                                   td);
 834                                         takeback_td(ohci, td);
 835                                         ohci->ed_to_check = NULL;
 836                                 }
 837                         } else
 838                                 ohci->ed_to_check = NULL;
 839                 }
 840                 spin_unlock(&ohci->lock);
 841         }
 842
 843         /* could track INTR_SO to reduce available PCI/... bandwidth */
 844
 845         /* handle any pending URB/ED unlinks, leaving INTR_SF enabled
 846          * when there's still unlinking to be done (next frame).
 847          */
 848         spin_lock (&ohci->lock);
 849         if (ohci->ed_rm_list)
 850                 finish_unlinks (ohci, ohci_frame_no(ohci));
 851         if ((ints & OHCI_INTR_SF) != 0
 852                         && !ohci->ed_rm_list
 853                         && !ohci->ed_to_check
 854                         && HC_IS_RUNNING(hcd->state))
 855                 ohci_writel (ohci, OHCI_INTR_SF, &regs->intrdisable);
 856         spin_unlock (&ohci->lock);
 857
 858         if (HC_IS_RUNNING(hcd->state)) {
 859                 ohci_writel (ohci, ints, &regs->intrstatus);
 860                 ohci_writel (ohci, OHCI_INTR_MIE, &regs->intrenable);
 861                 // flush those writes
 862                 (void) ohci_readl (ohci, &ohci->regs->control);
 863         }
 864
 865         return IRQ_HANDLED;
 866 }
 867
 868 /*-------------------------------------------------------------------------*/
 869
 870 static void ohci_stop (struct usb_hcd *hcd)
 871 {
 872         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 873
 874         ohci_dump (ohci, 1);
 875
 876         flush_scheduled_work();
 877
 878         ohci_usb_reset (ohci);
 879         ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
 880         free_irq(hcd->irq, hcd);
 881         hcd->irq = -1;
 882
 883         if (quirk_zfmicro(ohci))
 884                 del_timer(&ohci->unlink_watchdog);
 885
 886         remove_debug_files (ohci);
 887         ohci_mem_cleanup (ohci);
 888         if (ohci->hcca) {
 889                 dma_free_coherent (hcd->self.controller,
 890                                 sizeof *ohci->hcca,
 891                                 ohci->hcca, ohci->hcca_dma);
 892                 ohci->hcca = NULL;
 893                 ohci->hcca_dma = 0;
 894         }
 895 }
 896
 897 /*-------------------------------------------------------------------------*/
 898
 899 #if defined(CONFIG_PM) || defined(CONFIG_PCI)
 900
 901 /* must not be called from interrupt context */
 902 static int ohci_restart (struct ohci_hcd *ohci)
 903 {
 904         int temp;
 905         int i;
 906         struct urb_priv *priv;
 907
 908         spin_lock_irq(&ohci->lock);
 909         disable (ohci);
 910
 911         /* Recycle any "live" eds/tds (and urbs). */
 912         if (!list_empty (&ohci->pending))
 913                 ohci_dbg(ohci, "abort schedule...\n");
 914         list_for_each_entry (priv, &ohci->pending, pending) {
 915                 struct urb      *urb = priv->td[0]->urb;
 916                 struct ed       *ed = priv->ed;
 917
 918                 switch (ed->state) {
 919                 case ED_OPER:
 920                         ed->state = ED_UNLINK;
 921                         ed->hwINFO |= cpu_to_hc32(ohci, ED_DEQUEUE);
 922                         ed_deschedule (ohci, ed);
 923
 924                         ed->ed_next = ohci->ed_rm_list;
 925                         ed->ed_prev = NULL;
 926                         ohci->ed_rm_list = ed;
 927                         /* FALLTHROUGH */
 928                 case ED_UNLINK:
 929                         break;
 930                 default:
 931                         ohci_dbg(ohci, "bogus ed %p state %d\n",
 932                                         ed, ed->state);
 933                 }
 934
 935                 if (!urb->unlinked)
 936                         urb->unlinked = -ESHUTDOWN;
 937         }
 938         finish_unlinks (ohci, 0);
 939         spin_unlock_irq(&ohci->lock);
 940
 941         /* paranoia, in case that didn't work: */
 942
 943         /* empty the interrupt branches */
 944         for (i = 0; i < NUM_INTS; i++) ohci->load [i] = 0;
 945         for (i = 0; i < NUM_INTS; i++) ohci->hcca->int_table [i] = 0;
 946
 947         /* no EDs to remove */
 948         ohci->ed_rm_list = NULL;
 949
 950         /* empty control and bulk lists */
 951         ohci->ed_controltail = NULL;
 952         ohci->ed_bulktail    = NULL;
 953
 954         if ((temp = ohci_run (ohci)) < 0) {
 955                 ohci_err (ohci, "can't restart, %d\n", temp);
 956                 return temp;
 957         }
 958         ohci_dbg(ohci, "restart complete\n");
 959         return 0;
 960 }
 961
 962 #endif
 963
 964 /*-------------------------------------------------------------------------*/
 965
 966 #define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC
 967
 968 MODULE_AUTHOR (DRIVER_AUTHOR);
 969 MODULE_DESCRIPTION (DRIVER_INFO);
 970 MODULE_LICENSE ("GPL");
 971
 972 #ifdef CONFIG_PCI
 973 #include "ohci-pci.c"
 974 #define PCI_DRIVER              ohci_pci_driver
 975 #endif
 976
 977 #ifdef CONFIG_SA1111
 978 #include "ohci-sa1111.c"
 979 #define SA1111_DRIVER           ohci_hcd_sa1111_driver
 980 #endif
 981
 982 #ifdef CONFIG_ARCH_S3C2410
 983 #include "ohci-s3c2410.c"
 984 #define PLATFORM_DRIVER         ohci_hcd_s3c2410_driver
 985 #endif
 986
 987 #ifdef CONFIG_ARCH_OMAP
 988 #include "ohci-omap.c"
 989 #define PLATFORM_DRIVER         ohci_hcd_omap_driver
 990 #endif
 991
 992 #ifdef CONFIG_ARCH_LH7A404
 993 #include "ohci-lh7a404.c"
 994 #define PLATFORM_DRIVER         ohci_hcd_lh7a404_driver
 995 #endif
 996
 997 #ifdef CONFIG_PXA27x
 998 #include "ohci-pxa27x.c"
 999 #define PLATFORM_DRIVER         ohci_hcd_pxa27x_driver
1000 #endif
1001
1002 #ifdef CONFIG_ARCH_EP93XX
1003 #include "ohci-ep93xx.c"
1004 #define PLATFORM_DRIVER         ohci_hcd_ep93xx_driver
1005 #endif
1006
1007 #ifdef CONFIG_SOC_AU1X00
1008 #include "ohci-au1xxx.c"
1009 #define PLATFORM_DRIVER         ohci_hcd_au1xxx_driver
1010 #endif
1011
1012 #ifdef CONFIG_PNX8550
1013 #include "ohci-pnx8550.c"
1014 #define PLATFORM_DRIVER         ohci_hcd_pnx8550_driver
1015 #endif
1016
1017 #ifdef CONFIG_USB_OHCI_HCD_PPC_SOC
1018 #include "ohci-ppc-soc.c"
1019 #define PLATFORM_DRIVER         ohci_hcd_ppc_soc_driver
1020 #endif
1021
1022 #ifdef CONFIG_ARCH_AT91
1023 #include "ohci-at91.c"
1024 #define PLATFORM_DRIVER         ohci_hcd_at91_driver
1025 #endif
1026
1027 #ifdef CONFIG_ARCH_PNX4008
1028 #include "ohci-pnx4008.c"
1029 #define PLATFORM_DRIVER         usb_hcd_pnx4008_driver
1030 #endif
1031
1032
1033 #ifdef CONFIG_USB_OHCI_HCD_PPC_OF
1034 #include "ohci-ppc-of.c"
1035 #define OF_PLATFORM_DRIVER      ohci_hcd_ppc_of_driver
1036 #endif
1037
1038 #ifdef CONFIG_PPC_PS3
1039 #include "ohci-ps3.c"
1040 #define PS3_SYSTEM_BUS_DRIVER   ps3_ohci_driver
1041 #endif
1042
1043 #ifdef CONFIG_USB_OHCI_HCD_SSB
1044 #include "ohci-ssb.c"
1045 #define SSB_OHCI_DRIVER         ssb_ohci_driver
1046 #endif
1047
1048 #if     !defined(PCI_DRIVER) &&         \
1049         !defined(PLATFORM_DRIVER) &&    \
1050         !defined(OF_PLATFORM_DRIVER) && \
1051         !defined(SA1111_DRIVER) &&      \
1052         !defined(PS3_SYSTEM_BUS_DRIVER) && \
1053         !defined(SSB_OHCI_DRIVER)
1054 #error "missing bus glue for ohci-hcd"
1055 #endif
1056
1057 static int __init ohci_hcd_mod_init(void)
1058 {
1059         int retval = 0;
1060
1061         if (usb_disabled())
1062                 return -ENODEV;
1063
1064         printk (KERN_DEBUG "%s: " DRIVER_INFO "\n", hcd_name);
1065         pr_debug ("%s: block sizes: ed %Zd td %Zd\n", hcd_name,
1066                 sizeof (struct ed), sizeof (struct td));
1067
1068 #ifdef PS3_SYSTEM_BUS_DRIVER
1069         retval = ps3_ohci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
1070         if (retval < 0)
1071                 goto error_ps3;
1072 #endif
1073
1074 #ifdef PLATFORM_DRIVER
1075         retval = platform_driver_register(&PLATFORM_DRIVER);
1076         if (retval < 0)
1077                 goto error_platform;
1078 #endif
1079
1080 #ifdef OF_PLATFORM_DRIVER
1081         retval = of_register_platform_driver(&OF_PLATFORM_DRIVER);
1082         if (retval < 0)
1083                 goto error_of_platform;
1084 #endif
1085
1086 #ifdef SA1111_DRIVER
1087         retval = sa1111_driver_register(&SA1111_DRIVER);
1088         if (retval < 0)
1089                 goto error_sa1111;
1090 #endif
1091
1092 #ifdef PCI_DRIVER
1093         retval = pci_register_driver(&PCI_DRIVER);
1094         if (retval < 0)
1095                 goto error_pci;
1096 #endif
1097
1098 #ifdef SSB_OHCI_DRIVER
1099         retval = ssb_driver_register(&SSB_OHCI_DRIVER);
1100         if (retval)
1101                 goto error_ssb;
1102 #endif
1103
1104         return retval;
1105
1106         /* Error path */
1107 #ifdef SSB_OHCI_DRIVER
1108  error_ssb:
1109 #endif
1110 #ifdef PCI_DRIVER
1111         pci_unregister_driver(&PCI_DRIVER);
1112  error_pci:
1113 #endif
1114 #ifdef SA1111_DRIVER
1115         sa1111_driver_unregister(&SA1111_DRIVER);
1116  error_sa1111:
1117 #endif
1118 #ifdef OF_PLATFORM_DRIVER
1119         of_unregister_platform_driver(&OF_PLATFORM_DRIVER);
1120  error_of_platform:
1121 #endif
1122 #ifdef PLATFORM_DRIVER
1123         platform_driver_unregister(&PLATFORM_DRIVER);
1124  error_platform:
1125 #endif
1126 #ifdef PS3_SYSTEM_BUS_DRIVER
1127         ps3_ohci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1128  error_ps3:
1129 #endif
1130         return retval;
1131 }
1132 module_init(ohci_hcd_mod_init);
1133
1134 static void __exit ohci_hcd_mod_exit(void)
1135 {
1136 #ifdef SSB_OHCI_DRIVER
1137         ssb_driver_unregister(&SSB_OHCI_DRIVER);
1138 #endif
1139 #ifdef PCI_DRIVER
1140         pci_unregister_driver(&PCI_DRIVER);
1141 #endif
1142 #ifdef SA1111_DRIVER
1143         sa1111_driver_unregister(&SA1111_DRIVER);
1144 #endif
1145 #ifdef OF_PLATFORM_DRIVER
1146         of_unregister_platform_driver(&OF_PLATFORM_DRIVER);
1147 #endif
1148 #ifdef PLATFORM_DRIVER
1149         platform_driver_unregister(&PLATFORM_DRIVER);
1150 #endif
1151 #ifdef PS3_SYSTEM_BUS_DRIVER
1152         ps3_ohci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1153 #endif
1154 }
1155 module_exit(ohci_hcd_mod_exit);
1156