drivers/video/neofb.c

   1 /*
   2  * linux/drivers/video/neofb.c -- NeoMagic Framebuffer Driver
   3  *
   4  * Copyright (c) 2001-2002  Denis Oliver Kropp <dok@directfb.org>
   5  *
   6  *
   7  * Card specific code is based on XFree86's neomagic driver.
   8  * Framebuffer framework code is based on code of cyber2000fb.
   9  *
  10  * This file is subject to the terms and conditions of the GNU General
  11  * Public License.  See the file COPYING in the main directory of this
  12  * archive for more details.
  13  *
  14  *
  15  * 0.4.1
  16  *  - Cosmetic changes (dok)
  17  *
  18  * 0.4
  19  *  - Toshiba Libretto support, allow modes larger than LCD size if
  20  *    LCD is disabled, keep BIOS settings if internal/external display
  21  *    haven't been enabled explicitly
  22  *                          (Thomas J. Moore <dark@mama.indstate.edu>)
  23  *
  24  * 0.3.3
  25  *  - Porting over to new fbdev api. (jsimmons)
  26  *
  27  * 0.3.2
  28  *  - got rid of all floating point (dok)
  29  *
  30  * 0.3.1
  31  *  - added module license (dok)
  32  *
  33  * 0.3
  34  *  - hardware accelerated clear and move for 2200 and above (dok)
  35  *  - maximum allowed dotclock is handled now (dok)
  36  *
  37  * 0.2.1
  38  *  - correct panning after X usage (dok)
  39  *  - added module and kernel parameters (dok)
  40  *  - no stretching if external display is enabled (dok)
  41  *
  42  * 0.2
  43  *  - initial version (dok)
  44  *
  45  *
  46  * TODO
  47  * - ioctl for internal/external switching
  48  * - blanking
  49  * - 32bit depth support, maybe impossible
  50  * - disable pan-on-sync, need specs
  51  *
  52  * BUGS
  53  * - white margin on bootup like with tdfxfb (colormap problem?)
  54  *
  55  */
  56
  57 #include <linux/config.h>
  58 #include <linux/module.h>
  59 #include <linux/kernel.h>
  60 #include <linux/errno.h>
  61 #include <linux/string.h>
  62 #include <linux/mm.h>
  63 #include <linux/tty.h>
  64 #include <linux/slab.h>
  65 #include <linux/delay.h>
  66 #include <linux/fb.h>
  67 #include <linux/pci.h>
  68 #include <linux/init.h>
  69 #ifdef CONFIG_TOSHIBA
  70 #include <linux/toshiba.h>
  71 extern int tosh_smm(SMMRegisters *regs);
  72 #endif
  73
  74 #include <asm/io.h>
  75 #include <asm/irq.h>
  76 #include <asm/pgtable.h>
  77 #include <asm/system.h>
  78 #include <asm/uaccess.h>
  79
  80 #ifdef CONFIG_MTRR
  81 #include <asm/mtrr.h>
  82 #endif
  83
  84 #include <video/vga.h>
  85 #include <video/neomagic.h>
  86
  87 #define NEOFB_VERSION "0.4.2"
  88
  89 /* --------------------------------------------------------------------- */
  90
  91 static int internal;
  92 static int external;
  93 static int libretto;
  94 static int nostretch;
  95 static int nopciburst;
  96 static char *mode_option __devinitdata = NULL;
  97
  98 #ifdef MODULE
  99
 100 MODULE_AUTHOR("(c) 2001-2002  Denis Oliver Kropp <dok@convergence.de>");
 101 MODULE_LICENSE("GPL");
 102 MODULE_DESCRIPTION("FBDev driver for NeoMagic PCI Chips");
 103 module_param(internal, bool, 0);
 104 MODULE_PARM_DESC(internal, "Enable output on internal LCD Display.");
 105 module_param(external, bool, 0);
 106 MODULE_PARM_DESC(external, "Enable output on external CRT.");
 107 module_param(libretto, bool, 0);
 108 MODULE_PARM_DESC(libretto, "Force Libretto 100/110 800x480 LCD.");
 109 module_param(nostretch, bool, 0);
 110 MODULE_PARM_DESC(nostretch,
 111                  "Disable stretching of modes smaller than LCD.");
 112 module_param(nopciburst, bool, 0);
 113 MODULE_PARM_DESC(nopciburst, "Disable PCI burst mode.");
 114 module_param(mode_option, charp, 0);
 115 MODULE_PARM_DESC(mode_option, "Preferred video mode ('640x480-8@60', etc)");
 116
 117 #endif
 118
 119
 120 /* --------------------------------------------------------------------- */
 121
 122 static biosMode bios8[] = {
 123         {320, 240, 0x40},
 124         {300, 400, 0x42},
 125         {640, 400, 0x20},
 126         {640, 480, 0x21},
 127         {800, 600, 0x23},
 128         {1024, 768, 0x25},
 129 };
 130
 131 static biosMode bios16[] = {
 132         {320, 200, 0x2e},
 133         {320, 240, 0x41},
 134         {300, 400, 0x43},
 135         {640, 480, 0x31},
 136         {800, 600, 0x34},
 137         {1024, 768, 0x37},
 138 };
 139
 140 static biosMode bios24[] = {
 141         {640, 480, 0x32},
 142         {800, 600, 0x35},
 143         {1024, 768, 0x38}
 144 };
 145
 146 #ifdef NO_32BIT_SUPPORT_YET
 147 /* FIXME: guessed values, wrong */
 148 static biosMode bios32[] = {
 149         {640, 480, 0x33},
 150         {800, 600, 0x36},
 151         {1024, 768, 0x39}
 152 };
 153 #endif
 154
 155 static inline void write_le32(int regindex, u32 val, const struct neofb_par *par)
 156 {
 157         writel(val, par->neo2200 + par->cursorOff + regindex);
 158 }
 159
 160 static int neoFindMode(int xres, int yres, int depth)
 161 {
 162         int xres_s;
 163         int i, size;
 164         biosMode *mode;
 165
 166         switch (depth) {
 167         case 8:
 168                 size = sizeof(bios8) / sizeof(biosMode);
 169                 mode = bios8;
 170                 break;
 171         case 16:
 172                 size = sizeof(bios16) / sizeof(biosMode);
 173                 mode = bios16;
 174                 break;
 175         case 24:
 176                 size = sizeof(bios24) / sizeof(biosMode);
 177                 mode = bios24;
 178                 break;
 179 #ifdef NO_32BIT_SUPPORT_YET
 180         case 32:
 181                 size = sizeof(bios32) / sizeof(biosMode);
 182                 mode = bios32;
 183                 break;
 184 #endif
 185         default:
 186                 return 0;
 187         }
 188
 189         for (i = 0; i < size; i++) {
 190                 if (xres <= mode[i].x_res) {
 191                         xres_s = mode[i].x_res;
 192                         for (; i < size; i++) {
 193                                 if (mode[i].x_res != xres_s)
 194                                         return mode[i - 1].mode;
 195                                 if (yres <= mode[i].y_res)
 196                                         return mode[i].mode;
 197                         }
 198                 }
 199         }
 200         return mode[size - 1].mode;
 201 }
 202
 203 /*
 204  * neoCalcVCLK --
 205  *
 206  * Determine the closest clock frequency to the one requested.
 207  */
 208 #define REF_FREQ 0xe517         /* 14.31818 in 20.12 fixed point */
 209 #define MAX_N 127
 210 #define MAX_D 31
 211 #define MAX_F 1
 212
 213 static void neoCalcVCLK(const struct fb_info *info,
 214                         struct neofb_par *par, long freq)
 215 {
 216         int n, d, f;
 217         int n_best = 0, d_best = 0, f_best = 0;
 218         long f_best_diff = (0x7ffff << 12);     /* 20.12 */
 219         long f_target = (freq << 12) / 1000;    /* 20.12 */
 220
 221         for (f = 0; f <= MAX_F; f++)
 222                 for (n = 0; n <= MAX_N; n++)
 223                         for (d = 0; d <= MAX_D; d++) {
 224                                 long f_out;     /* 20.12 */
 225                                 long f_diff;    /* 20.12 */
 226
 227                                 f_out =
 228                                     ((((n + 1) << 12) / ((d +
 229                                                           1) *
 230                                                          (1 << f))) >> 12)
 231                                     * REF_FREQ;
 232                                 f_diff = abs(f_out - f_target);
 233                                 if (f_diff < f_best_diff) {
 234                                         f_best_diff = f_diff;
 235                                         n_best = n;
 236                                         d_best = d;
 237                                         f_best = f;
 238                                 }
 239                         }
 240
 241         if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2200 ||
 242             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2230 ||
 243             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2360 ||
 244             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2380) {
 245                 /* NOT_DONE:  We are trying the full range of the 2200 clock.
 246                    We should be able to try n up to 2047 */
 247                 par->VCLK3NumeratorLow = n_best;
 248                 par->VCLK3NumeratorHigh = (f_best << 7);
 249         } else
 250                 par->VCLK3NumeratorLow = n_best | (f_best << 7);
 251
 252         par->VCLK3Denominator = d_best;
 253
 254 #ifdef NEOFB_DEBUG
 255         printk("neoVCLK: f:%d NumLow=%d NumHi=%d Den=%d Df=%d\n",
 256                f_target >> 12,
 257                par->VCLK3NumeratorLow,
 258                par->VCLK3NumeratorHigh,
 259                par->VCLK3Denominator, f_best_diff >> 12);
 260 #endif
 261 }
 262
 263 /*
 264  * vgaHWInit --
 265  *      Handle the initialization, etc. of a screen.
 266  *      Return FALSE on failure.
 267  */
 268
 269 static int vgaHWInit(const struct fb_var_screeninfo *var,
 270                      const struct fb_info *info,
 271                      struct neofb_par *par, struct xtimings *timings)
 272 {
 273         par->MiscOutReg = 0x23;
 274
 275         if (!(timings->sync & FB_SYNC_HOR_HIGH_ACT))
 276                 par->MiscOutReg |= 0x40;
 277
 278         if (!(timings->sync & FB_SYNC_VERT_HIGH_ACT))
 279                 par->MiscOutReg |= 0x80;
 280
 281         /*
 282          * Time Sequencer
 283          */
 284         par->Sequencer[0] = 0x00;
 285         par->Sequencer[1] = 0x01;
 286         par->Sequencer[2] = 0x0F;
 287         par->Sequencer[3] = 0x00;       /* Font select */
 288         par->Sequencer[4] = 0x0E;       /* Misc */
 289
 290         /*
 291          * CRTC Controller
 292          */
 293         par->CRTC[0] = (timings->HTotal >> 3) - 5;
 294         par->CRTC[1] = (timings->HDisplay >> 3) - 1;
 295         par->CRTC[2] = (timings->HDisplay >> 3) - 1;
 296         par->CRTC[3] = (((timings->HTotal >> 3) - 1) & 0x1F) | 0x80;
 297         par->CRTC[4] = (timings->HSyncStart >> 3);
 298         par->CRTC[5] = ((((timings->HTotal >> 3) - 1) & 0x20) << 2)
 299             | (((timings->HSyncEnd >> 3)) & 0x1F);
 300         par->CRTC[6] = (timings->VTotal - 2) & 0xFF;
 301         par->CRTC[7] = (((timings->VTotal - 2) & 0x100) >> 8)
 302             | (((timings->VDisplay - 1) & 0x100) >> 7)
 303             | ((timings->VSyncStart & 0x100) >> 6)
 304             | (((timings->VDisplay - 1) & 0x100) >> 5)
 305             | 0x10 | (((timings->VTotal - 2) & 0x200) >> 4)
 306             | (((timings->VDisplay - 1) & 0x200) >> 3)
 307             | ((timings->VSyncStart & 0x200) >> 2);
 308         par->CRTC[8] = 0x00;
 309         par->CRTC[9] = (((timings->VDisplay - 1) & 0x200) >> 4) | 0x40;
 310
 311         if (timings->dblscan)
 312                 par->CRTC[9] |= 0x80;
 313
 314         par->CRTC[10] = 0x00;
 315         par->CRTC[11] = 0x00;
 316         par->CRTC[12] = 0x00;
 317         par->CRTC[13] = 0x00;
 318         par->CRTC[14] = 0x00;
 319         par->CRTC[15] = 0x00;
 320         par->CRTC[16] = timings->VSyncStart & 0xFF;
 321         par->CRTC[17] = (timings->VSyncEnd & 0x0F) | 0x20;
 322         par->CRTC[18] = (timings->VDisplay - 1) & 0xFF;
 323         par->CRTC[19] = var->xres_virtual >> 4;
 324         par->CRTC[20] = 0x00;
 325         par->CRTC[21] = (timings->VDisplay - 1) & 0xFF;
 326         par->CRTC[22] = (timings->VTotal - 1) & 0xFF;
 327         par->CRTC[23] = 0xC3;
 328         par->CRTC[24] = 0xFF;
 329
 330         /*
 331          * are these unnecessary?
 332          * vgaHWHBlankKGA(mode, regp, 0, KGA_FIX_OVERSCAN | KGA_ENABLE_ON_ZERO);
 333          * vgaHWVBlankKGA(mode, regp, 0, KGA_FIX_OVERSCAN | KGA_ENABLE_ON_ZERO);
 334          */
 335
 336         /*
 337          * Graphics Display Controller
 338          */
 339         par->Graphics[0] = 0x00;
 340         par->Graphics[1] = 0x00;
 341         par->Graphics[2] = 0x00;
 342         par->Graphics[3] = 0x00;
 343         par->Graphics[4] = 0x00;
 344         par->Graphics[5] = 0x40;
 345         par->Graphics[6] = 0x05;        /* only map 64k VGA memory !!!! */
 346         par->Graphics[7] = 0x0F;
 347         par->Graphics[8] = 0xFF;
 348
 349
 350         par->Attribute[0] = 0x00;       /* standard colormap translation */
 351         par->Attribute[1] = 0x01;
 352         par->Attribute[2] = 0x02;
 353         par->Attribute[3] = 0x03;
 354         par->Attribute[4] = 0x04;
 355         par->Attribute[5] = 0x05;
 356         par->Attribute[6] = 0x06;
 357         par->Attribute[7] = 0x07;
 358         par->Attribute[8] = 0x08;
 359         par->Attribute[9] = 0x09;
 360         par->Attribute[10] = 0x0A;
 361         par->Attribute[11] = 0x0B;
 362         par->Attribute[12] = 0x0C;
 363         par->Attribute[13] = 0x0D;
 364         par->Attribute[14] = 0x0E;
 365         par->Attribute[15] = 0x0F;
 366         par->Attribute[16] = 0x41;
 367         par->Attribute[17] = 0xFF;
 368         par->Attribute[18] = 0x0F;
 369         par->Attribute[19] = 0x00;
 370         par->Attribute[20] = 0x00;
 371         return 0;
 372 }
 373
 374 static void vgaHWLock(struct vgastate *state)
 375 {
 376         /* Protect CRTC[0-7] */
 377         vga_wcrt(state->vgabase, 0x11, vga_rcrt(state->vgabase, 0x11) | 0x80);
 378 }
 379
 380 static void vgaHWUnlock(void)
 381 {
 382         /* Unprotect CRTC[0-7] */
 383         vga_wcrt(NULL, 0x11, vga_rcrt(NULL, 0x11) & ~0x80);
 384 }
 385
 386 static void neoLock(struct vgastate *state)
 387 {
 388         vga_wgfx(state->vgabase, 0x09, 0x00);
 389         vgaHWLock(state);
 390 }
 391
 392 static void neoUnlock(void)
 393 {
 394         vgaHWUnlock();
 395         vga_wgfx(NULL, 0x09, 0x26);
 396 }
 397
 398 /*
 399  * VGA Palette management
 400  */
 401 static int paletteEnabled = 0;
 402
 403 static inline void VGAenablePalette(void)
 404 {
 405         vga_r(NULL, VGA_IS1_RC);
 406         vga_w(NULL, VGA_ATT_W, 0x00);
 407         paletteEnabled = 1;
 408 }
 409
 410 static inline void VGAdisablePalette(void)
 411 {
 412         vga_r(NULL, VGA_IS1_RC);
 413         vga_w(NULL, VGA_ATT_W, 0x20);
 414         paletteEnabled = 0;
 415 }
 416
 417 static inline void VGAwATTR(u8 index, u8 value)
 418 {
 419         if (paletteEnabled)
 420                 index &= ~0x20;
 421         else
 422                 index |= 0x20;
 423
 424         vga_r(NULL, VGA_IS1_RC);
 425         vga_wattr(NULL, index, value);
 426 }
 427
 428 static void vgaHWProtect(int on)
 429 {
 430         unsigned char tmp;
 431
 432         if (on) {
 433                 /*
 434                  * Turn off screen and disable sequencer.
 435                  */
 436                 tmp = vga_rseq(NULL, 0x01);
 437                 vga_wseq(NULL, 0x00, 0x01);             /* Synchronous Reset */
 438                 vga_wseq(NULL, 0x01, tmp | 0x20);       /* disable the display */
 439
 440                 VGAenablePalette();
 441         } else {
 442                 /*
 443                  * Reenable sequencer, then turn on screen.
 444                  */
 445                 tmp = vga_rseq(NULL, 0x01);
 446                 vga_wseq(NULL, 0x01, tmp & ~0x20);      /* reenable display */
 447                 vga_wseq(NULL, 0x00, 0x03);             /* clear synchronousreset */
 448
 449                 VGAdisablePalette();
 450         }
 451 }
 452
 453 static void vgaHWRestore(const struct fb_info *info,
 454                          const struct neofb_par *par)
 455 {
 456         int i;
 457
 458         vga_w(NULL, VGA_MIS_W, par->MiscOutReg);
 459
 460         for (i = 1; i < 5; i++)
 461                 vga_wseq(NULL, i, par->Sequencer[i]);
 462
 463         /* Ensure CRTC registers 0-7 are unlocked by clearing bit 7 or CRTC[17] */
 464         vga_wcrt(NULL, 17, par->CRTC[17] & ~0x80);
 465
 466         for (i = 0; i < 25; i++)
 467                 vga_wcrt(NULL, i, par->CRTC[i]);
 468
 469         for (i = 0; i < 9; i++)
 470                 vga_wgfx(NULL, i, par->Graphics[i]);
 471
 472         VGAenablePalette();
 473
 474         for (i = 0; i < 21; i++)
 475                 VGAwATTR(i, par->Attribute[i]);
 476
 477         VGAdisablePalette();
 478 }
 479
 480
 481 /* -------------------- Hardware specific routines ------------------------- */
 482
 483 /*
 484  * Hardware Acceleration for Neo2200+
 485  */
 486 static inline int neo2200_sync(struct fb_info *info)
 487 {
 488         struct neofb_par *par = info->par;
 489         int waitcycles;
 490
 491         while (readl(&par->neo2200->bltStat) & 1)
 492                 waitcycles++;
 493         return 0;
 494 }
 495
 496 static inline void neo2200_wait_fifo(struct fb_info *info,
 497                                      int requested_fifo_space)
 498 {
 499         //  ndev->neo.waitfifo_calls++;
 500         //  ndev->neo.waitfifo_sum += requested_fifo_space;
 501
 502         /* FIXME: does not work
 503            if (neo_fifo_space < requested_fifo_space)
 504            {
 505            neo_fifo_waitcycles++;
 506
 507            while (1)
 508            {
 509            neo_fifo_space = (neo2200->bltStat >> 8);
 510            if (neo_fifo_space >= requested_fifo_space)
 511            break;
 512            }
 513            }
 514            else
 515            {
 516            neo_fifo_cache_hits++;
 517            }
 518
 519            neo_fifo_space -= requested_fifo_space;
 520          */
 521
 522         neo2200_sync(info);
 523 }
 524
 525 static inline void neo2200_accel_init(struct fb_info *info,
 526                                       struct fb_var_screeninfo *var)
 527 {
 528         struct neofb_par *par = info->par;
 529         Neo2200 __iomem *neo2200 = par->neo2200;
 530         u32 bltMod, pitch;
 531
 532         neo2200_sync(info);
 533
 534         switch (var->bits_per_pixel) {
 535         case 8:
 536                 bltMod = NEO_MODE1_DEPTH8;
 537                 pitch = var->xres_virtual;
 538                 break;
 539         case 15:
 540         case 16:
 541                 bltMod = NEO_MODE1_DEPTH16;
 542                 pitch = var->xres_virtual * 2;
 543                 break;
 544         case 24:
 545                 bltMod = NEO_MODE1_DEPTH24;
 546                 pitch = var->xres_virtual * 3;
 547                 break;
 548         default:
 549                 printk(KERN_ERR
 550                        "neofb: neo2200_accel_init: unexpected bits per pixel!\n");
 551                 return;
 552         }
 553
 554         writel(bltMod << 16, &neo2200->bltStat);
 555         writel((pitch << 16) | pitch, &neo2200->pitch);
 556 }
 557
 558 /* --------------------------------------------------------------------- */
 559
 560 static int
 561 neofb_open(struct fb_info *info, int user)
 562 {
 563         struct neofb_par *par = info->par;
 564         int cnt = atomic_read(&par->ref_count);
 565
 566         if (!cnt) {
 567                 memset(&par->state, 0, sizeof(struct vgastate));
 568                 par->state.flags = VGA_SAVE_MODE | VGA_SAVE_FONTS;
 569                 save_vga(&par->state);
 570         }
 571         atomic_inc(&par->ref_count);
 572         return 0;
 573 }
 574
 575 static int
 576 neofb_release(struct fb_info *info, int user)
 577 {
 578         struct neofb_par *par = info->par;
 579         int cnt = atomic_read(&par->ref_count);
 580
 581         if (!cnt)
 582                 return -EINVAL;
 583         if (cnt == 1) {
 584                 restore_vga(&par->state);
 585         }
 586         atomic_dec(&par->ref_count);
 587         return 0;
 588 }
 589
 590 static int
 591 neofb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
 592 {
 593         struct neofb_par *par = info->par;
 594         unsigned int pixclock = var->pixclock;
 595         struct xtimings timings;
 596         int memlen, vramlen;
 597         int mode_ok = 0;
 598
 599         DBG("neofb_check_var");
 600
 601         if (!pixclock)
 602                 pixclock = 10000;       /* 10ns = 100MHz */
 603         timings.pixclock = 1000000000 / pixclock;
 604         if (timings.pixclock < 1)
 605                 timings.pixclock = 1;
 606
 607         if (timings.pixclock > par->maxClock)
 608                 return -EINVAL;
 609
 610         timings.dblscan = var->vmode & FB_VMODE_DOUBLE;
 611         timings.interlaced = var->vmode & FB_VMODE_INTERLACED;
 612         timings.HDisplay = var->xres;
 613         timings.HSyncStart = timings.HDisplay + var->right_margin;
 614         timings.HSyncEnd = timings.HSyncStart + var->hsync_len;
 615         timings.HTotal = timings.HSyncEnd + var->left_margin;
 616         timings.VDisplay = var->yres;
 617         timings.VSyncStart = timings.VDisplay + var->lower_margin;
 618         timings.VSyncEnd = timings.VSyncStart + var->vsync_len;
 619         timings.VTotal = timings.VSyncEnd + var->upper_margin;
 620         timings.sync = var->sync;
 621
 622         /* Is the mode larger than the LCD panel? */
 623         if (par->internal_display &&
 624             ((var->xres > par->NeoPanelWidth) ||
 625              (var->yres > par->NeoPanelHeight))) {
 626                 printk(KERN_INFO
 627                        "Mode (%dx%d) larger than the LCD panel (%dx%d)\n",
 628                        var->xres, var->yres, par->NeoPanelWidth,
 629                        par->NeoPanelHeight);
 630                 return -EINVAL;
 631         }
 632
 633         /* Is the mode one of the acceptable sizes? */
 634         if (!par->internal_display)
 635                 mode_ok = 1;
 636         else {
 637                 switch (var->xres) {
 638                 case 1280:
 639                         if (var->yres == 1024)
 640                                 mode_ok = 1;
 641                         break;
 642                 case 1024:
 643                         if (var->yres == 768)
 644                                 mode_ok = 1;
 645                         break;
 646                 case 800:
 647                         if (var->yres == (par->libretto ? 480 : 600))
 648                                 mode_ok = 1;
 649                         break;
 650                 case 640:
 651                         if (var->yres == 480)
 652                                 mode_ok = 1;
 653                         break;
 654                 }
 655         }
 656
 657         if (!mode_ok) {
 658                 printk(KERN_INFO
 659                        "Mode (%dx%d) won't display properly on LCD\n",
 660                        var->xres, var->yres);
 661                 return -EINVAL;
 662         }
 663
 664         var->red.msb_right = 0;
 665         var->green.msb_right = 0;
 666         var->blue.msb_right = 0;
 667
 668         switch (var->bits_per_pixel) {
 669         case 8:         /* PSEUDOCOLOUR, 256 */
 670                 var->transp.offset = 0;
 671                 var->transp.length = 0;
 672                 var->red.offset = 0;
 673                 var->red.length = 8;
 674                 var->green.offset = 0;
 675                 var->green.length = 8;
 676                 var->blue.offset = 0;
 677                 var->blue.length = 8;
 678                 break;
 679
 680         case 16:                /* DIRECTCOLOUR, 64k */
 681                 var->transp.offset = 0;
 682                 var->transp.length = 0;
 683                 var->red.offset = 11;
 684                 var->red.length = 5;
 685                 var->green.offset = 5;
 686                 var->green.length = 6;
 687                 var->blue.offset = 0;
 688                 var->blue.length = 5;
 689                 break;
 690
 691         case 24:                /* TRUECOLOUR, 16m */
 692                 var->transp.offset = 0;
 693                 var->transp.length = 0;
 694                 var->red.offset = 16;
 695                 var->red.length = 8;
 696                 var->green.offset = 8;
 697                 var->green.length = 8;
 698                 var->blue.offset = 0;
 699                 var->blue.length = 8;
 700                 break;
 701
 702 #ifdef NO_32BIT_SUPPORT_YET
 703         case 32:                /* TRUECOLOUR, 16m */
 704                 var->transp.offset = 24;
 705                 var->transp.length = 8;
 706                 var->red.offset = 16;
 707                 var->red.length = 8;
 708                 var->green.offset = 8;
 709                 var->green.length = 8;
 710                 var->blue.offset = 0;
 711                 var->blue.length = 8;
 712                 break;
 713 #endif
 714         default:
 715                 printk(KERN_WARNING "neofb: no support for %dbpp\n",
 716                        var->bits_per_pixel);
 717                 return -EINVAL;
 718         }
 719
 720         vramlen = info->fix.smem_len;
 721         if (vramlen > 4 * 1024 * 1024)
 722                 vramlen = 4 * 1024 * 1024;
 723
 724         if (var->yres_virtual < var->yres)
 725                 var->yres_virtual = var->yres;
 726         if (var->xres_virtual < var->xres)
 727                 var->xres_virtual = var->xres;
 728
 729         memlen = var->xres_virtual * var->bits_per_pixel * var->yres_virtual >> 3;
 730
 731         if (memlen > vramlen) {
 732                 var->yres_virtual =  vramlen * 8 / (var->xres_virtual *
 733                                         var->bits_per_pixel);
 734                 memlen = var->xres_virtual * var->bits_per_pixel *
 735                                 var->yres_virtual / 8;
 736         }
 737
 738         /* we must round yres/xres down, we already rounded y/xres_virtual up
 739            if it was possible. We should return -EINVAL, but I disagree */
 740         if (var->yres_virtual < var->yres)
 741                 var->yres = var->yres_virtual;
 742         if (var->xres_virtual < var->xres)
 743                 var->xres = var->xres_virtual;
 744         if (var->xoffset + var->xres > var->xres_virtual)
 745                 var->xoffset = var->xres_virtual - var->xres;
 746         if (var->yoffset + var->yres > var->yres_virtual)
 747                 var->yoffset = var->yres_virtual - var->yres;
 748
 749         var->nonstd = 0;
 750         var->height = -1;
 751         var->width = -1;
 752
 753         if (var->bits_per_pixel >= 24 || !par->neo2200)
 754                 var->accel_flags &= ~FB_ACCELF_TEXT;
 755         return 0;
 756 }
 757
 758 static int neofb_set_par(struct fb_info *info)
 759 {
 760         struct neofb_par *par = info->par;
 761         struct xtimings timings;
 762         unsigned char temp;
 763         int i, clock_hi = 0;
 764         int lcd_stretch;
 765         int hoffset, voffset;
 766
 767         DBG("neofb_set_par");
 768
 769         neoUnlock();
 770
 771         vgaHWProtect(1);        /* Blank the screen */
 772
 773         timings.dblscan = info->var.vmode & FB_VMODE_DOUBLE;
 774         timings.interlaced = info->var.vmode & FB_VMODE_INTERLACED;
 775         timings.HDisplay = info->var.xres;
 776         timings.HSyncStart = timings.HDisplay + info->var.right_margin;
 777         timings.HSyncEnd = timings.HSyncStart + info->var.hsync_len;
 778         timings.HTotal = timings.HSyncEnd + info->var.left_margin;
 779         timings.VDisplay = info->var.yres;
 780         timings.VSyncStart = timings.VDisplay + info->var.lower_margin;
 781         timings.VSyncEnd = timings.VSyncStart + info->var.vsync_len;
 782         timings.VTotal = timings.VSyncEnd + info->var.upper_margin;
 783         timings.sync = info->var.sync;
 784         timings.pixclock = PICOS2KHZ(info->var.pixclock);
 785
 786         if (timings.pixclock < 1)
 787                 timings.pixclock = 1;
 788
 789         /*
 790          * This will allocate the datastructure and initialize all of the
 791          * generic VGA registers.
 792          */
 793
 794         if (vgaHWInit(&info->var, info, par, &timings))
 795                 return -EINVAL;
 796
 797         /*
 798          * The default value assigned by vgaHW.c is 0x41, but this does
 799          * not work for NeoMagic.
 800          */
 801         par->Attribute[16] = 0x01;
 802
 803         switch (info->var.bits_per_pixel) {
 804         case 8:
 805                 par->CRTC[0x13] = info->var.xres_virtual >> 3;
 806                 par->ExtCRTOffset = info->var.xres_virtual >> 11;
 807                 par->ExtColorModeSelect = 0x11;
 808                 break;
 809         case 16:
 810                 par->CRTC[0x13] = info->var.xres_virtual >> 2;
 811                 par->ExtCRTOffset = info->var.xres_virtual >> 10;
 812                 par->ExtColorModeSelect = 0x13;
 813                 break;
 814         case 24:
 815                 par->CRTC[0x13] = (info->var.xres_virtual * 3) >> 3;
 816                 par->ExtCRTOffset = (info->var.xres_virtual * 3) >> 11;
 817                 par->ExtColorModeSelect = 0x14;
 818                 break;
 819 #ifdef NO_32BIT_SUPPORT_YET
 820         case 32:                /* FIXME: guessed values */
 821                 par->CRTC[0x13] = info->var.xres_virtual >> 1;
 822                 par->ExtCRTOffset = info->var.xres_virtual >> 9;
 823                 par->ExtColorModeSelect = 0x15;
 824                 break;
 825 #endif
 826         default:
 827                 break;
 828         }
 829
 830         par->ExtCRTDispAddr = 0x10;
 831
 832         /* Vertical Extension */
 833         par->VerticalExt = (((timings.VTotal - 2) & 0x400) >> 10)
 834             | (((timings.VDisplay - 1) & 0x400) >> 9)
 835             | (((timings.VSyncStart) & 0x400) >> 8)
 836             | (((timings.VSyncStart) & 0x400) >> 7);
 837
 838         /* Fast write bursts on unless disabled. */
 839         if (par->pci_burst)
 840                 par->SysIfaceCntl1 = 0x30;
 841         else
 842                 par->SysIfaceCntl1 = 0x00;
 843
 844         par->SysIfaceCntl2 = 0xc0;      /* VESA Bios sets this to 0x80! */
 845
 846         /* Initialize: by default, we want display config register to be read */
 847         par->PanelDispCntlRegRead = 1;
 848
 849         /* Enable any user specified display devices. */
 850         par->PanelDispCntlReg1 = 0x00;
 851         if (par->internal_display)
 852                 par->PanelDispCntlReg1 |= 0x02;
 853         if (par->external_display)
 854                 par->PanelDispCntlReg1 |= 0x01;
 855
 856         /* If the user did not specify any display devices, then... */
 857         if (par->PanelDispCntlReg1 == 0x00) {
 858                 /* Default to internal (i.e., LCD) only. */
 859                 par->PanelDispCntlReg1 = vga_rgfx(NULL, 0x20) & 0x03;
 860         }
 861
 862         /* If we are using a fixed mode, then tell the chip we are. */
 863         switch (info->var.xres) {
 864         case 1280:
 865                 par->PanelDispCntlReg1 |= 0x60;
 866                 break;
 867         case 1024:
 868                 par->PanelDispCntlReg1 |= 0x40;
 869                 break;
 870         case 800:
 871                 par->PanelDispCntlReg1 |= 0x20;
 872                 break;
 873         case 640:
 874         default:
 875                 break;
 876         }
 877
 878         /* Setup shadow register locking. */
 879         switch (par->PanelDispCntlReg1 & 0x03) {
 880         case 0x01:              /* External CRT only mode: */
 881                 par->GeneralLockReg = 0x00;
 882                 /* We need to program the VCLK for external display only mode. */
 883                 par->ProgramVCLK = 1;
 884                 break;
 885         case 0x02:              /* Internal LCD only mode: */
 886         case 0x03:              /* Simultaneous internal/external (LCD/CRT) mode: */
 887                 par->GeneralLockReg = 0x01;
 888                 /* Don't program the VCLK when using the LCD. */
 889                 par->ProgramVCLK = 0;
 890                 break;
 891         }
 892
 893         /*
 894          * If the screen is to be stretched, turn on stretching for the
 895          * various modes.
 896          *
 897          * OPTION_LCD_STRETCH means stretching should be turned off!
 898          */
 899         par->PanelDispCntlReg2 = 0x00;
 900         par->PanelDispCntlReg3 = 0x00;
 901
 902         if (par->lcd_stretch && (par->PanelDispCntlReg1 == 0x02) &&     /* LCD only */
 903             (info->var.xres != par->NeoPanelWidth)) {
 904                 switch (info->var.xres) {
 905                 case 320:       /* Needs testing.  KEM -- 24 May 98 */
 906                 case 400:       /* Needs testing.  KEM -- 24 May 98 */
 907                 case 640:
 908                 case 800:
 909                 case 1024:
 910                         lcd_stretch = 1;
 911                         par->PanelDispCntlReg2 |= 0xC6;
 912                         break;
 913                 default:
 914                         lcd_stretch = 0;
 915                         /* No stretching in these modes. */
 916                 }
 917         } else
 918                 lcd_stretch = 0;
 919
 920         /*
 921          * If the screen is to be centerd, turn on the centering for the
 922          * various modes.
 923          */
 924         par->PanelVertCenterReg1 = 0x00;
 925         par->PanelVertCenterReg2 = 0x00;
 926         par->PanelVertCenterReg3 = 0x00;
 927         par->PanelVertCenterReg4 = 0x00;
 928         par->PanelVertCenterReg5 = 0x00;
 929         par->PanelHorizCenterReg1 = 0x00;
 930         par->PanelHorizCenterReg2 = 0x00;
 931         par->PanelHorizCenterReg3 = 0x00;
 932         par->PanelHorizCenterReg4 = 0x00;
 933         par->PanelHorizCenterReg5 = 0x00;
 934
 935
 936         if (par->PanelDispCntlReg1 & 0x02) {
 937                 if (info->var.xres == par->NeoPanelWidth) {
 938                         /*
 939                          * No centering required when the requested display width
 940                          * equals the panel width.
 941                          */
 942                 } else {
 943                         par->PanelDispCntlReg2 |= 0x01;
 944                         par->PanelDispCntlReg3 |= 0x10;
 945
 946                         /* Calculate the horizontal and vertical offsets. */
 947                         if (!lcd_stretch) {
 948                                 hoffset =
 949                                     ((par->NeoPanelWidth -
 950                                       info->var.xres) >> 4) - 1;
 951                                 voffset =
 952                                     ((par->NeoPanelHeight -
 953                                       info->var.yres) >> 1) - 2;
 954                         } else {
 955                                 /* Stretched modes cannot be centered. */
 956                                 hoffset = 0;
 957                                 voffset = 0;
 958                         }
 959
 960                         switch (info->var.xres) {
 961                         case 320:       /* Needs testing.  KEM -- 24 May 98 */
 962                                 par->PanelHorizCenterReg3 = hoffset;
 963                                 par->PanelVertCenterReg2 = voffset;
 964                                 break;
 965                         case 400:       /* Needs testing.  KEM -- 24 May 98 */
 966                                 par->PanelHorizCenterReg4 = hoffset;
 967                                 par->PanelVertCenterReg1 = voffset;
 968                                 break;
 969                         case 640:
 970                                 par->PanelHorizCenterReg1 = hoffset;
 971                                 par->PanelVertCenterReg3 = voffset;
 972                                 break;
 973                         case 800:
 974                                 par->PanelHorizCenterReg2 = hoffset;
 975                                 par->PanelVertCenterReg4 = voffset;
 976                                 break;
 977                         case 1024:
 978                                 par->PanelHorizCenterReg5 = hoffset;
 979                                 par->PanelVertCenterReg5 = voffset;
 980                                 break;
 981                         case 1280:
 982                         default:
 983                                 /* No centering in these modes. */
 984                                 break;
 985                         }
 986                 }
 987         }
 988
 989         par->biosMode =
 990             neoFindMode(info->var.xres, info->var.yres,
 991                         info->var.bits_per_pixel);
 992
 993         /*
 994          * Calculate the VCLK that most closely matches the requested dot
 995          * clock.
 996          */
 997         neoCalcVCLK(info, par, timings.pixclock);
 998
 999         /* Since we program the clocks ourselves, always use VCLK3. */
1000         par->MiscOutReg |= 0x0C;
1001
1002         /* alread unlocked above */
1003         /* BOGUS  vga_wgfx(NULL, 0x09, 0x26); */
1004
1005         /* don't know what this is, but it's 0 from bootup anyway */
1006         vga_wgfx(NULL, 0x15, 0x00);
1007
1008         /* was set to 0x01 by my bios in text and vesa modes */
1009         vga_wgfx(NULL, 0x0A, par->GeneralLockReg);
1010
1011         /*
1012          * The color mode needs to be set before calling vgaHWRestore
1013          * to ensure the DAC is initialized properly.
1014          *
1015          * NOTE: Make sure we don't change bits make sure we don't change
1016          * any reserved bits.
1017          */
1018         temp = vga_rgfx(NULL, 0x90);
1019         switch (info->fix.accel) {
1020         case FB_ACCEL_NEOMAGIC_NM2070:
1021                 temp &= 0xF0;   /* Save bits 7:4 */
1022                 temp |= (par->ExtColorModeSelect & ~0xF0);
1023                 break;
1024         case FB_ACCEL_NEOMAGIC_NM2090:
1025         case FB_ACCEL_NEOMAGIC_NM2093:
1026         case FB_ACCEL_NEOMAGIC_NM2097:
1027         case FB_ACCEL_NEOMAGIC_NM2160:
1028         case FB_ACCEL_NEOMAGIC_NM2200:
1029         case FB_ACCEL_NEOMAGIC_NM2230:
1030         case FB_ACCEL_NEOMAGIC_NM2360:
1031         case FB_ACCEL_NEOMAGIC_NM2380:
1032                 temp &= 0x70;   /* Save bits 6:4 */
1033                 temp |= (par->ExtColorModeSelect & ~0x70);
1034                 break;
1035         }
1036
1037         vga_wgfx(NULL, 0x90, temp);
1038
1039         /*
1040          * In some rare cases a lockup might occur if we don't delay
1041          * here. (Reported by Miles Lane)
1042          */
1043         //mdelay(200);
1044
1045         /*
1046          * Disable horizontal and vertical graphics and text expansions so
1047          * that vgaHWRestore works properly.
1048          */
1049         temp = vga_rgfx(NULL, 0x25);
1050         temp &= 0x39;
1051         vga_wgfx(NULL, 0x25, temp);
1052
1053         /*
1054          * Sleep for 200ms to make sure that the two operations above have
1055          * had time to take effect.
1056          */
1057         mdelay(200);
1058
1059         /*
1060          * This function handles restoring the generic VGA registers.  */
1061         vgaHWRestore(info, par);
1062
1063         /* linear colormap for non palettized modes */
1064         switch (info->var.bits_per_pixel) {
1065         case 8:
1066                 /* PseudoColor, 256 */
1067                 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
1068                 break;
1069         case 16:
1070                 /* TrueColor, 64k */
1071                 info->fix.visual = FB_VISUAL_TRUECOLOR;
1072
1073                 for (i = 0; i < 64; i++) {
1074                         outb(i, 0x3c8);
1075
1076                         outb(i << 1, 0x3c9);
1077                         outb(i, 0x3c9);
1078                         outb(i << 1, 0x3c9);
1079                 }
1080                 break;
1081         case 24:
1082 #ifdef NO_32BIT_SUPPORT_YET
1083         case 32:
1084 #endif
1085                 /* TrueColor, 16m */
1086                 info->fix.visual = FB_VISUAL_TRUECOLOR;
1087
1088                 for (i = 0; i < 256; i++) {
1089                         outb(i, 0x3c8);
1090
1091                         outb(i, 0x3c9);
1092                         outb(i, 0x3c9);
1093                         outb(i, 0x3c9);
1094                 }
1095                 break;
1096         }
1097
1098         vga_wgfx(NULL, 0x0E, par->ExtCRTDispAddr);
1099         vga_wgfx(NULL, 0x0F, par->ExtCRTOffset);
1100         temp = vga_rgfx(NULL, 0x10);
1101         temp &= 0x0F;           /* Save bits 3:0 */
1102         temp |= (par->SysIfaceCntl1 & ~0x0F);   /* VESA Bios sets bit 1! */
1103         vga_wgfx(NULL, 0x10, temp);
1104
1105         vga_wgfx(NULL, 0x11, par->SysIfaceCntl2);
1106         vga_wgfx(NULL, 0x15, 0 /*par->SingleAddrPage */ );
1107         vga_wgfx(NULL, 0x16, 0 /*par->DualAddrPage */ );
1108
1109         temp = vga_rgfx(NULL, 0x20);
1110         switch (info->fix.accel) {
1111         case FB_ACCEL_NEOMAGIC_NM2070:
1112                 temp &= 0xFC;   /* Save bits 7:2 */
1113                 temp |= (par->PanelDispCntlReg1 & ~0xFC);
1114                 break;
1115         case FB_ACCEL_NEOMAGIC_NM2090:
1116         case FB_ACCEL_NEOMAGIC_NM2093:
1117         case FB_ACCEL_NEOMAGIC_NM2097:
1118         case FB_ACCEL_NEOMAGIC_NM2160:
1119                 temp &= 0xDC;   /* Save bits 7:6,4:2 */
1120                 temp |= (par->PanelDispCntlReg1 & ~0xDC);
1121                 break;
1122         case FB_ACCEL_NEOMAGIC_NM2200:
1123         case FB_ACCEL_NEOMAGIC_NM2230:
1124         case FB_ACCEL_NEOMAGIC_NM2360:
1125         case FB_ACCEL_NEOMAGIC_NM2380:
1126                 temp &= 0x98;   /* Save bits 7,4:3 */
1127                 temp |= (par->PanelDispCntlReg1 & ~0x98);
1128                 break;
1129         }
1130         vga_wgfx(NULL, 0x20, temp);
1131
1132         temp = vga_rgfx(NULL, 0x25);
1133         temp &= 0x38;           /* Save bits 5:3 */
1134         temp |= (par->PanelDispCntlReg2 & ~0x38);
1135         vga_wgfx(NULL, 0x25, temp);
1136
1137         if (info->fix.accel != FB_ACCEL_NEOMAGIC_NM2070) {
1138                 temp = vga_rgfx(NULL, 0x30);
1139                 temp &= 0xEF;   /* Save bits 7:5 and bits 3:0 */
1140                 temp |= (par->PanelDispCntlReg3 & ~0xEF);
1141                 vga_wgfx(NULL, 0x30, temp);
1142         }
1143
1144         vga_wgfx(NULL, 0x28, par->PanelVertCenterReg1);
1145         vga_wgfx(NULL, 0x29, par->PanelVertCenterReg2);
1146         vga_wgfx(NULL, 0x2a, par->PanelVertCenterReg3);
1147
1148         if (info->fix.accel != FB_ACCEL_NEOMAGIC_NM2070) {
1149                 vga_wgfx(NULL, 0x32, par->PanelVertCenterReg4);
1150                 vga_wgfx(NULL, 0x33, par->PanelHorizCenterReg1);
1151                 vga_wgfx(NULL, 0x34, par->PanelHorizCenterReg2);
1152                 vga_wgfx(NULL, 0x35, par->PanelHorizCenterReg3);
1153         }
1154
1155         if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2160)
1156                 vga_wgfx(NULL, 0x36, par->PanelHorizCenterReg4);
1157
1158         if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2200 ||
1159             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2230 ||
1160             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2360 ||
1161             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2380) {
1162                 vga_wgfx(NULL, 0x36, par->PanelHorizCenterReg4);
1163                 vga_wgfx(NULL, 0x37, par->PanelVertCenterReg5);
1164                 vga_wgfx(NULL, 0x38, par->PanelHorizCenterReg5);
1165
1166                 clock_hi = 1;
1167         }
1168
1169         /* Program VCLK3 if needed. */
1170         if (par->ProgramVCLK && ((vga_rgfx(NULL, 0x9B) != par->VCLK3NumeratorLow)
1171                                  || (vga_rgfx(NULL, 0x9F) != par->VCLK3Denominator)
1172                                  || (clock_hi && ((vga_rgfx(NULL, 0x8F) & ~0x0f)
1173                                                   != (par->VCLK3NumeratorHigh &
1174                                                       ~0x0F))))) {
1175                 vga_wgfx(NULL, 0x9B, par->VCLK3NumeratorLow);
1176                 if (clock_hi) {
1177                         temp = vga_rgfx(NULL, 0x8F);
1178                         temp &= 0x0F;   /* Save bits 3:0 */
1179                         temp |= (par->VCLK3NumeratorHigh & ~0x0F);
1180                         vga_wgfx(NULL, 0x8F, temp);
1181                 }
1182                 vga_wgfx(NULL, 0x9F, par->VCLK3Denominator);
1183         }
1184
1185         if (par->biosMode)
1186                 vga_wcrt(NULL, 0x23, par->biosMode);
1187
1188         vga_wgfx(NULL, 0x93, 0xc0);     /* Gives 5x faster framebuffer writes !!! */
1189
1190         /* Program vertical extension register */
1191         if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2200 ||
1192             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2230 ||
1193             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2360 ||
1194             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2380) {
1195                 vga_wcrt(NULL, 0x70, par->VerticalExt);
1196         }
1197
1198         vgaHWProtect(0);        /* Turn on screen */
1199
1200         /* Calling this also locks offset registers required in update_start */
1201         neoLock(&par->state);
1202
1203         info->fix.line_length =
1204             info->var.xres_virtual * (info->var.bits_per_pixel >> 3);
1205
1206         switch (info->fix.accel) {
1207                 case FB_ACCEL_NEOMAGIC_NM2200:
1208                 case FB_ACCEL_NEOMAGIC_NM2230:
1209                 case FB_ACCEL_NEOMAGIC_NM2360:
1210                 case FB_ACCEL_NEOMAGIC_NM2380:
1211                         neo2200_accel_init(info, &info->var);
1212                         break;
1213                 default:
1214                         break;
1215         }
1216         return 0;
1217 }
1218
1219 static void neofb_update_start(struct fb_info *info,
1220                                struct fb_var_screeninfo *var)
1221 {
1222         struct neofb_par *par = info->par;
1223         struct vgastate *state = &par->state;
1224         int oldExtCRTDispAddr;
1225         int Base;
1226
1227         DBG("neofb_update_start");
1228
1229         Base = (var->yoffset * var->xres_virtual + var->xoffset) >> 2;
1230         Base *= (var->bits_per_pixel + 7) / 8;
1231
1232         neoUnlock();
1233
1234         /*
1235          * These are the generic starting address registers.
1236          */
1237         vga_wcrt(state->vgabase, 0x0C, (Base & 0x00FF00) >> 8);
1238         vga_wcrt(state->vgabase, 0x0D, (Base & 0x00FF));
1239
1240         /*
1241          * Make sure we don't clobber some other bits that might already
1242          * have been set. NOTE: NM2200 has a writable bit 3, but it shouldn't
1243          * be needed.
1244          */
1245         oldExtCRTDispAddr = vga_rgfx(NULL, 0x0E);
1246         vga_wgfx(state->vgabase, 0x0E, (((Base >> 16) & 0x0f) | (oldExtCRTDispAddr & 0xf0)));
1247
1248         neoLock(state);
1249 }
1250
1251 /*
1252  *    Pan or Wrap the Display
1253  */
1254 static int neofb_pan_display(struct fb_var_screeninfo *var,
1255                              struct fb_info *info)
1256 {
1257         u_int y_bottom;
1258
1259         y_bottom = var->yoffset;
1260
1261         if (!(var->vmode & FB_VMODE_YWRAP))
1262                 y_bottom += var->yres;
1263
1264         if (var->xoffset > (var->xres_virtual - var->xres))
1265                 return -EINVAL;
1266         if (y_bottom > info->var.yres_virtual)
1267                 return -EINVAL;
1268
1269         neofb_update_start(info, var);
1270
1271         info->var.xoffset = var->xoffset;
1272         info->var.yoffset = var->yoffset;
1273
1274         if (var->vmode & FB_VMODE_YWRAP)
1275                 info->var.vmode |= FB_VMODE_YWRAP;
1276         else
1277                 info->var.vmode &= ~FB_VMODE_YWRAP;
1278         return 0;
1279 }
1280
1281 static int neofb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
1282                            u_int transp, struct fb_info *fb)
1283 {
1284         if (regno >= fb->cmap.len || regno > 255)
1285                 return -EINVAL;
1286
1287         switch (fb->var.bits_per_pixel) {
1288         case 8:
1289                 outb(regno, 0x3c8);
1290
1291                 outb(red >> 10, 0x3c9);
1292                 outb(green >> 10, 0x3c9);
1293                 outb(blue >> 10, 0x3c9);
1294                 break;
1295         case 16:
1296                 ((u32 *) fb->pseudo_palette)[regno] =
1297                                 ((red & 0xf800)) | ((green & 0xfc00) >> 5) |
1298                                 ((blue & 0xf800) >> 11);
1299                 break;
1300         case 24:
1301                 ((u32 *) fb->pseudo_palette)[regno] =
1302                                 ((red & 0xff00) << 8) | ((green & 0xff00)) |
1303                                 ((blue & 0xff00) >> 8);
1304                 break;
1305 #ifdef NO_32BIT_SUPPORT_YET
1306         case 32:
1307                 ((u32 *) fb->pseudo_palette)[regno] =
1308                                 ((transp & 0xff00) << 16) | ((red & 0xff00) << 8) |
1309                                 ((green & 0xff00)) | ((blue & 0xff00) >> 8);
1310                 break;
1311 #endif
1312         default:
1313                 return 1;
1314         }
1315         return 0;
1316 }
1317
1318 /*
1319  *    (Un)Blank the display.
1320  */
1321 static int neofb_blank(int blank_mode, struct fb_info *info)
1322 {
1323         /*
1324          *  Blank the screen if blank_mode != 0, else unblank.
1325          *  Return 0 if blanking succeeded, != 0 if un-/blanking failed due to
1326          *  e.g. a video mode which doesn't support it. Implements VESA suspend
1327          *  and powerdown modes for monitors, and backlight control on LCDs.
1328          *    blank_mode == 0: unblanked (backlight on)
1329          *    blank_mode == 1: blank (backlight on)
1330          *    blank_mode == 2: suspend vsync (backlight off)
1331          *    blank_mode == 3: suspend hsync (backlight off)
1332          *    blank_mode == 4: powerdown (backlight off)
1333          *
1334          *  wms...Enable VESA DPMS compatible powerdown mode
1335          *  run "setterm -powersave powerdown" to take advantage
1336          */
1337         struct neofb_par *par = info->par;
1338         int seqflags, lcdflags, dpmsflags, reg;
1339
1340
1341         /*
1342          * Reload the value stored in the register, if sensible. It might have
1343          * been changed via FN keystroke.
1344          */
1345         if (par->PanelDispCntlRegRead) {
1346                 neoUnlock();
1347                 par->PanelDispCntlReg1 = vga_rgfx(NULL, 0x20) & 0x03;
1348                 neoLock(&par->state);
1349         }
1350         par->PanelDispCntlRegRead = !blank_mode;
1351
1352         switch (blank_mode) {
1353         case FB_BLANK_POWERDOWN:        /* powerdown - both sync lines down */
1354                 seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */
1355                 lcdflags = 0;                   /* LCD off */
1356                 dpmsflags = NEO_GR01_SUPPRESS_HSYNC |
1357                             NEO_GR01_SUPPRESS_VSYNC;
1358 #ifdef CONFIG_TOSHIBA
1359                 /* Do we still need this ? */
1360                 /* attempt to turn off backlight on toshiba; also turns off external */
1361                 {
1362                         SMMRegisters regs;
1363
1364                         regs.eax = 0xff00; /* HCI_SET */
1365                         regs.ebx = 0x0002; /* HCI_BACKLIGHT */
1366                         regs.ecx = 0x0000; /* HCI_DISABLE */
1367                         tosh_smm(&regs);
1368                 }
1369 #endif
1370                 break;
1371         case FB_BLANK_HSYNC_SUSPEND:            /* hsync off */
1372                 seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */
1373                 lcdflags = 0;                   /* LCD off */
1374                 dpmsflags = NEO_GR01_SUPPRESS_HSYNC;
1375                 break;
1376         case FB_BLANK_VSYNC_SUSPEND:            /* vsync off */
1377                 seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */
1378                 lcdflags = 0;                   /* LCD off */
1379                 dpmsflags = NEO_GR01_SUPPRESS_VSYNC;
1380                 break;
1381         case FB_BLANK_NORMAL:           /* just blank screen (backlight stays on) */
1382                 seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */
1383                 lcdflags = par->PanelDispCntlReg1 & 0x02; /* LCD normal */
1384                 dpmsflags = 0x00;       /* no hsync/vsync suppression */
1385                 break;
1386         case FB_BLANK_UNBLANK:          /* unblank */
1387                 seqflags = 0;                   /* Enable sequencer */
1388                 lcdflags = par->PanelDispCntlReg1 & 0x02; /* LCD normal */
1389                 dpmsflags = 0x00;       /* no hsync/vsync suppression */
1390 #ifdef CONFIG_TOSHIBA
1391                 /* Do we still need this ? */
1392                 /* attempt to re-enable backlight/external on toshiba */
1393                 {
1394                         SMMRegisters regs;
1395
1396                         regs.eax = 0xff00; /* HCI_SET */
1397                         regs.ebx = 0x0002; /* HCI_BACKLIGHT */
1398                         regs.ecx = 0x0001; /* HCI_ENABLE */
1399                         tosh_smm(&regs);
1400                 }
1401 #endif
1402                 break;
1403         default:        /* Anything else we don't understand; return 1 to tell
1404                          * fb_blank we didn't aactually do anything */
1405                 return 1;
1406         }
1407
1408         neoUnlock();
1409         reg = (vga_rseq(NULL, 0x01) & ~0x20) | seqflags;
1410         vga_wseq(NULL, 0x01, reg);
1411         reg = (vga_rgfx(NULL, 0x20) & ~0x02) | lcdflags;
1412         vga_wgfx(NULL, 0x20, reg);
1413         reg = (vga_rgfx(NULL, 0x01) & ~0xF0) | 0x80 | dpmsflags;
1414         vga_wgfx(NULL, 0x01, reg);
1415         neoLock(&par->state);
1416         return 0;
1417 }
1418
1419 static void
1420 neo2200_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
1421 {
1422         struct neofb_par *par = info->par;
1423         u_long dst, rop;
1424
1425         dst = rect->dx + rect->dy * info->var.xres_virtual;
1426         rop = rect->rop ? 0x060000 : 0x0c0000;
1427
1428         neo2200_wait_fifo(info, 4);
1429
1430         /* set blt control */
1431         writel(NEO_BC3_FIFO_EN |
1432                NEO_BC0_SRC_IS_FG | NEO_BC3_SKIP_MAPPING |
1433                //               NEO_BC3_DST_XY_ADDR  |
1434                //               NEO_BC3_SRC_XY_ADDR  |
1435                rop, &par->neo2200->bltCntl);
1436
1437         switch (info->var.bits_per_pixel) {
1438         case 8:
1439                 writel(rect->color, &par->neo2200->fgColor);
1440                 break;
1441         case 16:
1442         case 24:
1443                 writel(((u32 *) (info->pseudo_palette))[rect->color],
1444                        &par->neo2200->fgColor);
1445                 break;
1446         }
1447
1448         writel(dst * ((info->var.bits_per_pixel + 7) >> 3),
1449                &par->neo2200->dstStart);
1450         writel((rect->height << 16) | (rect->width & 0xffff),
1451                &par->neo2200->xyExt);
1452 }
1453
1454 static void
1455 neo2200_copyarea(struct fb_info *info, const struct fb_copyarea *area)
1456 {
1457         u32 sx = area->sx, sy = area->sy, dx = area->dx, dy = area->dy;
1458         struct neofb_par *par = info->par;
1459         u_long src, dst, bltCntl;
1460
1461         bltCntl = NEO_BC3_FIFO_EN | NEO_BC3_SKIP_MAPPING | 0x0C0000;
1462
1463         if ((dy > sy) || ((dy == sy) && (dx > sx))) {
1464                 /* Start with the lower right corner */
1465                 sy += (area->height - 1);
1466                 dy += (area->height - 1);
1467                 sx += (area->width - 1);
1468                 dx += (area->width - 1);
1469
1470                 bltCntl |= NEO_BC0_X_DEC | NEO_BC0_DST_Y_DEC | NEO_BC0_SRC_Y_DEC;
1471         }
1472
1473         src = sx * (info->var.bits_per_pixel >> 3) + sy*info->fix.line_length;
1474         dst = dx * (info->var.bits_per_pixel >> 3) + dy*info->fix.line_length;
1475
1476         neo2200_wait_fifo(info, 4);
1477
1478         /* set blt control */
1479         writel(bltCntl, &par->neo2200->bltCntl);
1480
1481         writel(src, &par->neo2200->srcStart);
1482         writel(dst, &par->neo2200->dstStart);
1483         writel((area->height << 16) | (area->width & 0xffff),
1484                &par->neo2200->xyExt);
1485 }
1486
1487 static void
1488 neo2200_imageblit(struct fb_info *info, const struct fb_image *image)
1489 {
1490         struct neofb_par *par = info->par;
1491         int s_pitch = (image->width * image->depth + 7) >> 3;
1492         int scan_align = info->pixmap.scan_align - 1;
1493         int buf_align = info->pixmap.buf_align - 1;
1494         int bltCntl_flags, d_pitch, data_len;
1495
1496         // The data is padded for the hardware
1497         d_pitch = (s_pitch + scan_align) & ~scan_align;
1498         data_len = ((d_pitch * image->height) + buf_align) & ~buf_align;
1499
1500         neo2200_sync(info);
1501
1502         if (image->depth == 1) {
1503                 if (info->var.bits_per_pixel == 24 && image->width < 16) {
1504                         /* FIXME. There is a bug with accelerated color-expanded
1505                          * transfers in 24 bit mode if the image being transferred
1506                          * is less than 16 bits wide. This is due to insufficient
1507                          * padding when writing the image. We need to adjust
1508                          * struct fb_pixmap. Not yet done. */
1509                         return cfb_imageblit(info, image);
1510                 }
1511                 bltCntl_flags = NEO_BC0_SRC_MONO;
1512         } else if (image->depth == info->var.bits_per_pixel) {
1513                 bltCntl_flags = 0;
1514         } else {
1515                 /* We don't currently support hardware acceleration if image
1516                  * depth is different from display */
1517                 return cfb_imageblit(info, image);
1518         }
1519
1520         switch (info->var.bits_per_pixel) {
1521         case 8:
1522                 writel(image->fg_color, &par->neo2200->fgColor);
1523                 writel(image->bg_color, &par->neo2200->bgColor);
1524                 break;
1525         case 16:
1526         case 24:
1527                 writel(((u32 *) (info->pseudo_palette))[image->fg_color],
1528                        &par->neo2200->fgColor);
1529                 writel(((u32 *) (info->pseudo_palette))[image->bg_color],
1530                        &par->neo2200->bgColor);
1531                 break;
1532         }
1533
1534         writel(NEO_BC0_SYS_TO_VID |
1535                 NEO_BC3_SKIP_MAPPING | bltCntl_flags |
1536                 // NEO_BC3_DST_XY_ADDR |
1537                 0x0c0000, &par->neo2200->bltCntl);
1538
1539         writel(0, &par->neo2200->srcStart);
1540 //      par->neo2200->dstStart = (image->dy << 16) | (image->dx & 0xffff);
1541         writel(((image->dx & 0xffff) * (info->var.bits_per_pixel >> 3) +
1542                 image->dy * info->fix.line_length), &par->neo2200->dstStart);
1543         writel((image->height << 16) | (image->width & 0xffff),
1544                &par->neo2200->xyExt);
1545
1546         memcpy_toio(par->mmio_vbase + 0x100000, image->data, data_len);
1547 }
1548
1549 static void
1550 neofb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
1551 {
1552         switch (info->fix.accel) {
1553                 case FB_ACCEL_NEOMAGIC_NM2200:
1554                 case FB_ACCEL_NEOMAGIC_NM2230:
1555                 case FB_ACCEL_NEOMAGIC_NM2360:
1556                 case FB_ACCEL_NEOMAGIC_NM2380:
1557                         neo2200_fillrect(info, rect);
1558                         break;
1559                 default:
1560                         cfb_fillrect(info, rect);
1561                         break;
1562         }
1563 }
1564
1565 static void
1566 neofb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
1567 {
1568         switch (info->fix.accel) {
1569                 case FB_ACCEL_NEOMAGIC_NM2200:
1570                 case FB_ACCEL_NEOMAGIC_NM2230:
1571                 case FB_ACCEL_NEOMAGIC_NM2360:
1572                 case FB_ACCEL_NEOMAGIC_NM2380:
1573                         neo2200_copyarea(info, area);
1574                         break;
1575                 default:
1576                         cfb_copyarea(info, area);
1577                         break;
1578         }
1579 }
1580
1581 static void
1582 neofb_imageblit(struct fb_info *info, const struct fb_image *image)
1583 {
1584         switch (info->fix.accel) {
1585                 case FB_ACCEL_NEOMAGIC_NM2200:
1586                 case FB_ACCEL_NEOMAGIC_NM2230:
1587                 case FB_ACCEL_NEOMAGIC_NM2360:
1588                 case FB_ACCEL_NEOMAGIC_NM2380:
1589                         neo2200_imageblit(info, image);
1590                         break;
1591                 default:
1592                         cfb_imageblit(info, image);
1593                         break;
1594         }
1595 }
1596
1597 static int
1598 neofb_sync(struct fb_info *info)
1599 {
1600         switch (info->fix.accel) {
1601                 case FB_ACCEL_NEOMAGIC_NM2200:
1602                 case FB_ACCEL_NEOMAGIC_NM2230:
1603                 case FB_ACCEL_NEOMAGIC_NM2360:
1604                 case FB_ACCEL_NEOMAGIC_NM2380:
1605                         neo2200_sync(info);
1606                         break;
1607                 default:
1608                         break;
1609         }
1610         return 0;
1611 }
1612
1613 /*
1614 static void
1615 neofb_draw_cursor(struct fb_info *info, u8 *dst, u8 *src, unsigned int width)
1616 {
1617         //memset_io(info->sprite.addr, 0xff, 1);
1618 }
1619
1620 static int
1621 neofb_cursor(struct fb_info *info, struct fb_cursor *cursor)
1622 {
1623         struct neofb_par *par = (struct neofb_par *) info->par;
1624
1625         * Disable cursor *
1626         write_le32(NEOREG_CURSCNTL, ~NEO_CURS_ENABLE, par);
1627
1628         if (cursor->set & FB_CUR_SETPOS) {
1629                 u32 x = cursor->image.dx;
1630                 u32 y = cursor->image.dy;
1631
1632                 info->cursor.image.dx = x;
1633                 info->cursor.image.dy = y;
1634                 write_le32(NEOREG_CURSX, x, par);
1635                 write_le32(NEOREG_CURSY, y, par);
1636         }
1637
1638         if (cursor->set & FB_CUR_SETSIZE) {
1639                 info->cursor.image.height = cursor->image.height;
1640                 info->cursor.image.width = cursor->image.width;
1641         }
1642
1643         if (cursor->set & FB_CUR_SETHOT)
1644                 info->cursor.hot = cursor->hot;
1645
1646         if (cursor->set & FB_CUR_SETCMAP) {
1647                 if (cursor->image.depth == 1) {
1648                         u32 fg = cursor->image.fg_color;
1649                         u32 bg = cursor->image.bg_color;
1650
1651                         info->cursor.image.fg_color = fg;
1652                         info->cursor.image.bg_color = bg;
1653
1654                         fg = ((fg & 0xff0000) >> 16) | ((fg & 0xff) << 16) | (fg & 0xff00);
1655                         bg = ((bg & 0xff0000) >> 16) | ((bg & 0xff) << 16) | (bg & 0xff00);
1656                         write_le32(NEOREG_CURSFGCOLOR, fg, par);
1657                         write_le32(NEOREG_CURSBGCOLOR, bg, par);
1658                 }
1659         }
1660
1661         if (cursor->set & FB_CUR_SETSHAPE)
1662                 fb_load_cursor_image(info);
1663
1664         if (info->cursor.enable)
1665                 write_le32(NEOREG_CURSCNTL, NEO_CURS_ENABLE, par);
1666         return 0;
1667 }
1668 */
1669
1670 static struct fb_ops neofb_ops = {
1671         .owner          = THIS_MODULE,
1672         .fb_open        = neofb_open,
1673         .fb_release     = neofb_release,
1674         .fb_check_var   = neofb_check_var,
1675         .fb_set_par     = neofb_set_par,
1676         .fb_setcolreg   = neofb_setcolreg,
1677         .fb_pan_display = neofb_pan_display,
1678         .fb_blank       = neofb_blank,
1679         .fb_sync        = neofb_sync,
1680         .fb_fillrect    = neofb_fillrect,
1681         .fb_copyarea    = neofb_copyarea,
1682         .fb_imageblit   = neofb_imageblit,
1683 };
1684
1685 /* --------------------------------------------------------------------- */
1686
1687 static struct fb_videomode __devinitdata mode800x480 = {
1688         .xres           = 800,
1689         .yres           = 480,
1690         .pixclock       = 25000,
1691         .left_margin    = 88,
1692         .right_margin   = 40,
1693         .upper_margin   = 23,
1694         .lower_margin   = 1,
1695         .hsync_len      = 128,
1696         .vsync_len      = 4,
1697         .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
1698         .vmode          = FB_VMODE_NONINTERLACED
1699 };
1700
1701 static int __devinit neo_map_mmio(struct fb_info *info,
1702                                   struct pci_dev *dev)
1703 {
1704         struct neofb_par *par = info->par;
1705
1706         DBG("neo_map_mmio");
1707
1708         switch (info->fix.accel) {
1709                 case FB_ACCEL_NEOMAGIC_NM2070:
1710                         info->fix.mmio_start = pci_resource_start(dev, 0)+
1711                                 0x100000;
1712                         break;
1713                 case FB_ACCEL_NEOMAGIC_NM2090:
1714                 case FB_ACCEL_NEOMAGIC_NM2093:
1715                         info->fix.mmio_start = pci_resource_start(dev, 0)+
1716                                 0x200000;
1717                         break;
1718                 case FB_ACCEL_NEOMAGIC_NM2160:
1719                 case FB_ACCEL_NEOMAGIC_NM2097:
1720                 case FB_ACCEL_NEOMAGIC_NM2200:
1721                 case FB_ACCEL_NEOMAGIC_NM2230:
1722                 case FB_ACCEL_NEOMAGIC_NM2360:
1723                 case FB_ACCEL_NEOMAGIC_NM2380:
1724                         info->fix.mmio_start = pci_resource_start(dev, 1);
1725                         break;
1726                 default:
1727                         info->fix.mmio_start = pci_resource_start(dev, 0);
1728         }
1729         info->fix.mmio_len = MMIO_SIZE;
1730
1731         if (!request_mem_region
1732             (info->fix.mmio_start, MMIO_SIZE, "memory mapped I/O")) {
1733                 printk("neofb: memory mapped IO in use\n");
1734                 return -EBUSY;
1735         }
1736
1737         par->mmio_vbase = ioremap(info->fix.mmio_start, MMIO_SIZE);
1738         if (!par->mmio_vbase) {
1739                 printk("neofb: unable to map memory mapped IO\n");
1740                 release_mem_region(info->fix.mmio_start,
1741                                    info->fix.mmio_len);
1742                 return -ENOMEM;
1743         } else
1744                 printk(KERN_INFO "neofb: mapped io at %p\n",
1745                        par->mmio_vbase);
1746         return 0;
1747 }
1748
1749 static void neo_unmap_mmio(struct fb_info *info)
1750 {
1751         struct neofb_par *par = info->par;
1752
1753         DBG("neo_unmap_mmio");
1754
1755         iounmap(par->mmio_vbase);
1756         par->mmio_vbase = NULL;
1757
1758         release_mem_region(info->fix.mmio_start,
1759                            info->fix.mmio_len);
1760 }
1761
1762 static int __devinit neo_map_video(struct fb_info *info,
1763                                    struct pci_dev *dev, int video_len)
1764 {
1765         //unsigned long addr;
1766
1767         DBG("neo_map_video");
1768
1769         info->fix.smem_start = pci_resource_start(dev, 0);
1770         info->fix.smem_len = video_len;
1771
1772         if (!request_mem_region(info->fix.smem_start, info->fix.smem_len,
1773                                 "frame buffer")) {
1774                 printk("neofb: frame buffer in use\n");
1775                 return -EBUSY;
1776         }
1777
1778         info->screen_base =
1779             ioremap(info->fix.smem_start, info->fix.smem_len);
1780         if (!info->screen_base) {
1781                 printk("neofb: unable to map screen memory\n");
1782                 release_mem_region(info->fix.smem_start,
1783                                    info->fix.smem_len);
1784                 return -ENOMEM;
1785         } else
1786                 printk(KERN_INFO "neofb: mapped framebuffer at %p\n",
1787                        info->screen_base);
1788
1789 #ifdef CONFIG_MTRR
1790         ((struct neofb_par *)(info->par))->mtrr =
1791                 mtrr_add(info->fix.smem_start, pci_resource_len(dev, 0),
1792                                 MTRR_TYPE_WRCOMB, 1);
1793 #endif
1794
1795         /* Clear framebuffer, it's all white in memory after boot */
1796         memset_io(info->screen_base, 0, info->fix.smem_len);
1797
1798         /* Allocate Cursor drawing pad.
1799         info->fix.smem_len -= PAGE_SIZE;
1800         addr = info->fix.smem_start + info->fix.smem_len;
1801         write_le32(NEOREG_CURSMEMPOS, ((0x000f & (addr >> 10)) << 8) |
1802                                         ((0x0ff0 & (addr >> 10)) >> 4), par);
1803         addr = (unsigned long) info->screen_base + info->fix.smem_len;
1804         info->sprite.addr = (u8 *) addr; */
1805         return 0;
1806 }
1807
1808 static void neo_unmap_video(struct fb_info *info)
1809 {
1810         DBG("neo_unmap_video");
1811
1812 #ifdef CONFIG_MTRR
1813         {
1814                 struct neofb_par *par = info->par;
1815
1816                 mtrr_del(par->mtrr, info->fix.smem_start,
1817                          info->fix.smem_len);
1818         }
1819 #endif
1820         iounmap(info->screen_base);
1821         info->screen_base = NULL;
1822
1823         release_mem_region(info->fix.smem_start,
1824                            info->fix.smem_len);
1825 }
1826
1827 static int __devinit neo_scan_monitor(struct fb_info *info)
1828 {
1829         struct neofb_par *par = info->par;
1830         unsigned char type, display;
1831         int w;
1832
1833         // Eventually we will have i2c support.
1834         info->monspecs.modedb = kmalloc(sizeof(struct fb_videomode), GFP_KERNEL);
1835         if (!info->monspecs.modedb)
1836                 return -ENOMEM;
1837         info->monspecs.modedb_len = 1;
1838
1839         /* Determine the panel type */
1840         vga_wgfx(NULL, 0x09, 0x26);
1841         type = vga_rgfx(NULL, 0x21);
1842         display = vga_rgfx(NULL, 0x20);
1843         if (!par->internal_display && !par->external_display) {
1844                 par->internal_display = display & 2 || !(display & 3) ? 1 : 0;
1845                 par->external_display = display & 1;
1846                 printk (KERN_INFO "Autodetected %s display\n",
1847                         par->internal_display && par->external_display ? "simultaneous" :
1848                         par->internal_display ? "internal" : "external");
1849         }
1850
1851         /* Determine panel width -- used in NeoValidMode. */
1852         w = vga_rgfx(NULL, 0x20);
1853         vga_wgfx(NULL, 0x09, 0x00);
1854         switch ((w & 0x18) >> 3) {
1855         case 0x00:
1856                 // 640x480@60
1857                 par->NeoPanelWidth = 640;
1858                 par->NeoPanelHeight = 480;
1859                 memcpy(info->monspecs.modedb, &vesa_modes[3], sizeof(struct fb_videomode));
1860                 break;
1861         case 0x01:
1862                 par->NeoPanelWidth = 800;
1863                 if (par->libretto) {
1864                         par->NeoPanelHeight = 480;
1865                         memcpy(info->monspecs.modedb, &mode800x480, sizeof(struct fb_videomode));
1866                 } else {
1867                         // 800x600@60
1868                         par->NeoPanelHeight = 600;
1869                         memcpy(info->monspecs.modedb, &vesa_modes[8], sizeof(struct fb_videomode));
1870                 }
1871                 break;
1872         case 0x02:
1873                 // 1024x768@60
1874                 par->NeoPanelWidth = 1024;
1875                 par->NeoPanelHeight = 768;
1876                 memcpy(info->monspecs.modedb, &vesa_modes[13], sizeof(struct fb_videomode));
1877                 break;
1878         case 0x03:
1879                 /* 1280x1024@60 panel support needs to be added */
1880 #ifdef NOT_DONE
1881                 par->NeoPanelWidth = 1280;
1882                 par->NeoPanelHeight = 1024;
1883                 memcpy(info->monspecs.modedb, &vesa_modes[20], sizeof(struct fb_videomode));
1884                 break;
1885 #else
1886                 printk(KERN_ERR
1887                        "neofb: Only 640x480, 800x600/480 and 1024x768 panels are currently supported\n");
1888                 return -1;
1889 #endif
1890         default:
1891                 // 640x480@60
1892                 par->NeoPanelWidth = 640;
1893                 par->NeoPanelHeight = 480;
1894                 memcpy(info->monspecs.modedb, &vesa_modes[3], sizeof(struct fb_videomode));
1895                 break;
1896         }
1897
1898         printk(KERN_INFO "Panel is a %dx%d %s %s display\n",
1899                par->NeoPanelWidth,
1900                par->NeoPanelHeight,
1901                (type & 0x02) ? "color" : "monochrome",
1902                (type & 0x10) ? "TFT" : "dual scan");
1903         return 0;
1904 }
1905
1906 static int __devinit neo_init_hw(struct fb_info *info)
1907 {
1908         struct neofb_par *par = info->par;
1909         int videoRam = 896;
1910         int maxClock = 65000;
1911         int CursorMem = 1024;
1912         int CursorOff = 0x100;
1913         int linearSize = 1024;
1914         int maxWidth = 1024;
1915         int maxHeight = 1024;
1916
1917         DBG("neo_init_hw");
1918
1919         neoUnlock();
1920
1921 #if 0
1922         printk(KERN_DEBUG "--- Neo extended register dump ---\n");
1923         for (int w = 0; w < 0x85; w++)
1924                 printk(KERN_DEBUG "CR %p: %p\n", (void *) w,
1925                        (void *) vga_rcrt(NULL, w);
1926         for (int w = 0; w < 0xC7; w++)
1927                 printk(KERN_DEBUG "GR %p: %p\n", (void *) w,
1928                        (void *) vga_rgfx(NULL, w));
1929 #endif
1930         switch (info->fix.accel) {
1931         case FB_ACCEL_NEOMAGIC_NM2070:
1932                 videoRam = 896;
1933                 maxClock = 65000;
1934                 CursorMem = 2048;
1935                 CursorOff = 0x100;
1936                 linearSize = 1024;
1937                 maxWidth = 1024;
1938                 maxHeight = 1024;
1939                 break;
1940         case FB_ACCEL_NEOMAGIC_NM2090:
1941         case FB_ACCEL_NEOMAGIC_NM2093:
1942                 videoRam = 1152;
1943                 maxClock = 80000;
1944                 CursorMem = 2048;
1945                 CursorOff = 0x100;
1946                 linearSize = 2048;
1947                 maxWidth = 1024;
1948                 maxHeight = 1024;
1949                 break;
1950         case FB_ACCEL_NEOMAGIC_NM2097:
1951                 videoRam = 1152;
1952                 maxClock = 80000;
1953                 CursorMem = 1024;
1954                 CursorOff = 0x100;
1955                 linearSize = 2048;
1956                 maxWidth = 1024;
1957                 maxHeight = 1024;
1958                 break;
1959         case FB_ACCEL_NEOMAGIC_NM2160:
1960                 videoRam = 2048;
1961                 maxClock = 90000;
1962                 CursorMem = 1024;
1963                 CursorOff = 0x100;
1964                 linearSize = 2048;
1965                 maxWidth = 1024;
1966                 maxHeight = 1024;
1967                 break;
1968         case FB_ACCEL_NEOMAGIC_NM2200:
1969                 videoRam = 2560;
1970                 maxClock = 110000;
1971                 CursorMem = 1024;
1972                 CursorOff = 0x1000;
1973                 linearSize = 4096;
1974                 maxWidth = 1280;
1975                 maxHeight = 1024;       /* ???? */
1976
1977                 par->neo2200 = (Neo2200 __iomem *) par->mmio_vbase;
1978                 break;
1979         case FB_ACCEL_NEOMAGIC_NM2230:
1980                 videoRam = 3008;
1981                 maxClock = 110000;
1982                 CursorMem = 1024;
1983                 CursorOff = 0x1000;
1984                 linearSize = 4096;
1985                 maxWidth = 1280;
1986                 maxHeight = 1024;       /* ???? */
1987
1988                 par->neo2200 = (Neo2200 __iomem *) par->mmio_vbase;
1989                 break;
1990         case FB_ACCEL_NEOMAGIC_NM2360:
1991                 videoRam = 4096;
1992                 maxClock = 110000;
1993                 CursorMem = 1024;
1994                 CursorOff = 0x1000;
1995                 linearSize = 4096;
1996                 maxWidth = 1280;
1997                 maxHeight = 1024;       /* ???? */
1998
1999                 par->neo2200 = (Neo2200 __iomem *) par->mmio_vbase;
2000                 break;
2001         case FB_ACCEL_NEOMAGIC_NM2380:
2002                 videoRam = 6144;
2003                 maxClock = 110000;
2004                 CursorMem = 1024;
2005                 CursorOff = 0x1000;
2006                 linearSize = 8192;
2007                 maxWidth = 1280;
2008                 maxHeight = 1024;       /* ???? */
2009
2010                 par->neo2200 = (Neo2200 __iomem *) par->mmio_vbase;
2011                 break;
2012         }
2013 /*
2014         info->sprite.size = CursorMem;
2015         info->sprite.scan_align = 1;
2016         info->sprite.buf_align = 1;
2017         info->sprite.flags = FB_PIXMAP_IO;
2018         info->sprite.outbuf = neofb_draw_cursor;
2019 */
2020         par->maxClock = maxClock;
2021         par->cursorOff = CursorOff;
2022         return ((videoRam * 1024));
2023 }
2024
2025
2026 static struct fb_info *__devinit neo_alloc_fb_info(struct pci_dev *dev, const struct
2027                                                    pci_device_id *id)
2028 {
2029         struct fb_info *info;
2030         struct neofb_par *par;
2031
2032         info = framebuffer_alloc(sizeof(struct neofb_par), &dev->dev);
2033
2034         if (!info)
2035                 return NULL;
2036
2037         par = info->par;
2038
2039         info->fix.accel = id->driver_data;
2040
2041         par->pci_burst = !nopciburst;
2042         par->lcd_stretch = !nostretch;
2043         par->libretto = libretto;
2044
2045         par->internal_display = internal;
2046         par->external_display = external;
2047         info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
2048
2049         switch (info->fix.accel) {
2050         case FB_ACCEL_NEOMAGIC_NM2070:
2051                 sprintf(info->fix.id, "MagicGraph 128");
2052                 break;
2053         case FB_ACCEL_NEOMAGIC_NM2090:
2054                 sprintf(info->fix.id, "MagicGraph 128V");
2055                 break;
2056         case FB_ACCEL_NEOMAGIC_NM2093:
2057                 sprintf(info->fix.id, "MagicGraph 128ZV");
2058                 break;
2059         case FB_ACCEL_NEOMAGIC_NM2097:
2060                 sprintf(info->fix.id, "MagicGraph 128ZV+");
2061                 break;
2062         case FB_ACCEL_NEOMAGIC_NM2160:
2063                 sprintf(info->fix.id, "MagicGraph 128XD");
2064                 break;
2065         case FB_ACCEL_NEOMAGIC_NM2200:
2066                 sprintf(info->fix.id, "MagicGraph 256AV");
2067                 info->flags |= FBINFO_HWACCEL_IMAGEBLIT |
2068                                FBINFO_HWACCEL_COPYAREA |
2069                                FBINFO_HWACCEL_FILLRECT;
2070                 break;
2071         case FB_ACCEL_NEOMAGIC_NM2230:
2072                 sprintf(info->fix.id, "MagicGraph 256AV+");
2073                 info->flags |= FBINFO_HWACCEL_IMAGEBLIT |
2074                                FBINFO_HWACCEL_COPYAREA |
2075                                FBINFO_HWACCEL_FILLRECT;
2076                 break;
2077         case FB_ACCEL_NEOMAGIC_NM2360:
2078                 sprintf(info->fix.id, "MagicGraph 256ZX");
2079                 info->flags |= FBINFO_HWACCEL_IMAGEBLIT |
2080                                FBINFO_HWACCEL_COPYAREA |
2081                                FBINFO_HWACCEL_FILLRECT;
2082                 break;
2083         case FB_ACCEL_NEOMAGIC_NM2380:
2084                 sprintf(info->fix.id, "MagicGraph 256XL+");
2085                 info->flags |= FBINFO_HWACCEL_IMAGEBLIT |
2086                                FBINFO_HWACCEL_COPYAREA |
2087                                FBINFO_HWACCEL_FILLRECT;
2088                 break;
2089         }
2090
2091         info->fix.type = FB_TYPE_PACKED_PIXELS;
2092         info->fix.type_aux = 0;
2093         info->fix.xpanstep = 0;
2094         info->fix.ypanstep = 4;
2095         info->fix.ywrapstep = 0;
2096         info->fix.accel = id->driver_data;
2097
2098         info->fbops = &neofb_ops;
2099         info->pseudo_palette = par->palette;
2100         return info;
2101 }
2102
2103 static void neo_free_fb_info(struct fb_info *info)
2104 {
2105         if (info) {
2106                 /*
2107                  * Free the colourmap
2108                  */
2109                 fb_dealloc_cmap(&info->cmap);
2110                 framebuffer_release(info);
2111         }
2112 }
2113
2114 /* --------------------------------------------------------------------- */
2115
2116 static int __devinit neofb_probe(struct pci_dev *dev,
2117                                  const struct pci_device_id *id)
2118 {
2119         struct fb_info *info;
2120         u_int h_sync, v_sync;
2121         int video_len, err;
2122
2123         DBG("neofb_probe");
2124
2125         err = pci_enable_device(dev);
2126         if (err)
2127                 return err;
2128
2129         err = -ENOMEM;
2130         info = neo_alloc_fb_info(dev, id);
2131         if (!info)
2132                 return err;
2133
2134         err = neo_map_mmio(info, dev);
2135         if (err)
2136                 goto err_map_mmio;
2137
2138         err = neo_scan_monitor(info);
2139         if (err)
2140                 goto err_scan_monitor;
2141
2142         video_len = neo_init_hw(info);
2143         if (video_len < 0) {
2144                 err = video_len;
2145                 goto err_init_hw;
2146         }
2147
2148         err = neo_map_video(info, dev, video_len);
2149         if (err)
2150                 goto err_init_hw;
2151
2152         if (!fb_find_mode(&info->var, info, mode_option, NULL, 0,
2153                         info->monspecs.modedb, 16)) {
2154                 printk(KERN_ERR "neofb: Unable to find usable video mode.\n");
2155                 goto err_map_video;
2156         }
2157
2158         /*
2159          * Calculate the hsync and vsync frequencies.  Note that
2160          * we split the 1e12 constant up so that we can preserve
2161          * the precision and fit the results into 32-bit registers.
2162          *  (1953125000 * 512 = 1e12)
2163          */
2164         h_sync = 1953125000 / info->var.pixclock;
2165         h_sync =
2166             h_sync * 512 / (info->var.xres + info->var.left_margin +
2167                             info->var.right_margin + info->var.hsync_len);
2168         v_sync =
2169             h_sync / (info->var.yres + info->var.upper_margin +
2170                       info->var.lower_margin + info->var.vsync_len);
2171
2172         printk(KERN_INFO "neofb v" NEOFB_VERSION
2173                ": %dkB VRAM, using %dx%d, %d.%03dkHz, %dHz\n",
2174                info->fix.smem_len >> 10, info->var.xres,
2175                info->var.yres, h_sync / 1000, h_sync % 1000, v_sync);
2176
2177         if (fb_alloc_cmap(&info->cmap, 256, 0) < 0)
2178                 goto err_map_video;
2179
2180         err = register_framebuffer(info);
2181         if (err < 0)
2182                 goto err_reg_fb;
2183
2184         printk(KERN_INFO "fb%d: %s frame buffer device\n",
2185                info->node, info->fix.id);
2186
2187         /*
2188          * Our driver data
2189          */
2190         pci_set_drvdata(dev, info);
2191         return 0;
2192
2193 err_reg_fb:
2194         fb_dealloc_cmap(&info->cmap);
2195 err_map_video:
2196         neo_unmap_video(info);
2197 err_init_hw:
2198         fb_destroy_modedb(info->monspecs.modedb);
2199 err_scan_monitor:
2200         neo_unmap_mmio(info);
2201 err_map_mmio:
2202         neo_free_fb_info(info);
2203         return err;
2204 }
2205
2206 static void __devexit neofb_remove(struct pci_dev *dev)
2207 {
2208         struct fb_info *info = pci_get_drvdata(dev);
2209
2210         DBG("neofb_remove");
2211
2212         if (info) {
2213                 /*
2214                  * If unregister_framebuffer fails, then
2215                  * we will be leaving hooks that could cause
2216                  * oopsen laying around.
2217                  */
2218                 if (unregister_framebuffer(info))
2219                         printk(KERN_WARNING
2220                                "neofb: danger danger!  Oopsen imminent!\n");
2221
2222                 neo_unmap_video(info);
2223                 fb_destroy_modedb(info->monspecs.modedb);
2224                 neo_unmap_mmio(info);
2225                 neo_free_fb_info(info);
2226
2227                 /*
2228                  * Ensure that the driver data is no longer
2229                  * valid.
2230                  */
2231                 pci_set_drvdata(dev, NULL);
2232         }
2233 }
2234
2235 static struct pci_device_id neofb_devices[] = {
2236         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2070,
2237          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2070},
2238
2239         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2090,
2240          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2090},
2241
2242         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2093,
2243          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2093},
2244
2245         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2097,
2246          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2097},
2247
2248         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2160,
2249          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2160},
2250
2251         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2200,
2252          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2200},
2253
2254         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2230,
2255          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2230},
2256
2257         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2360,
2258          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2360},
2259
2260         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2380,
2261          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2380},
2262
2263         {0, 0, 0, 0, 0, 0, 0}
2264 };
2265
2266 MODULE_DEVICE_TABLE(pci, neofb_devices);
2267
2268 static struct pci_driver neofb_driver = {
2269         .name =         "neofb",
2270         .id_table =     neofb_devices,
2271         .probe =        neofb_probe,
2272         .remove =       __devexit_p(neofb_remove)
2273 };
2274
2275 /* ************************* init in-kernel code ************************** */
2276
2277 #ifndef MODULE
2278 static int __init neofb_setup(char *options)
2279 {
2280         char *this_opt;
2281
2282         DBG("neofb_setup");
2283
2284         if (!options || !*options)
2285                 return 0;
2286
2287         while ((this_opt = strsep(&options, ",")) != NULL) {
2288                 if (!*this_opt)
2289                         continue;
2290
2291                 if (!strncmp(this_opt, "internal", 8))
2292                         internal = 1;
2293                 else if (!strncmp(this_opt, "external", 8))
2294                         external = 1;
2295                 else if (!strncmp(this_opt, "nostretch", 9))
2296                         nostretch = 1;
2297                 else if (!strncmp(this_opt, "nopciburst", 10))
2298                         nopciburst = 1;
2299                 else if (!strncmp(this_opt, "libretto", 8))
2300                         libretto = 1;
2301                 else
2302                         mode_option = this_opt;
2303         }
2304         return 0;
2305 }
2306 #endif  /*  MODULE  */
2307
2308 static int __init neofb_init(void)
2309 {
2310 #ifndef MODULE
2311         char *option = NULL;
2312
2313         if (fb_get_options("neofb", &option))
2314                 return -ENODEV;
2315         neofb_setup(option);
2316 #endif
2317         return pci_register_driver(&neofb_driver);
2318 }
2319
2320 module_init(neofb_init);
2321
2322 #ifdef MODULE
2323 static void __exit neofb_exit(void)
2324 {
2325         pci_unregister_driver(&neofb_driver);
2326 }
2327
2328 module_exit(neofb_exit);
2329 #endif                          /* MODULE */