drivers/video/sm501fb.c

   1 /* linux/drivers/video/sm501fb.c
   2  *
   3  * Copyright (c) 2006 Simtec Electronics
   4  *      Vincent Sanders <vince@simtec.co.uk>
   5  *      Ben Dooks <ben@simtec.co.uk>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  * Framebuffer driver for the Silicon Motion SM501
  12  */
  13
  14 #include <linux/module.h>
  15 #include <linux/kernel.h>
  16 #include <linux/errno.h>
  17 #include <linux/string.h>
  18 #include <linux/mm.h>
  19 #include <linux/tty.h>
  20 #include <linux/slab.h>
  21 #include <linux/delay.h>
  22 #include <linux/fb.h>
  23 #include <linux/init.h>
  24 #include <linux/vmalloc.h>
  25 #include <linux/dma-mapping.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/workqueue.h>
  28 #include <linux/wait.h>
  29 #include <linux/platform_device.h>
  30 #include <linux/clk.h>
  31 #include <linux/console.h>
  32
  33 #include <asm/io.h>
  34 #include <asm/uaccess.h>
  35 #include <asm/div64.h>
  36
  37 #ifdef CONFIG_PM
  38 #include <linux/pm.h>
  39 #endif
  40
  41 #include <linux/sm501.h>
  42 #include <linux/sm501-regs.h>
  43
  44 #define NR_PALETTE      256
  45
  46 enum sm501_controller {
  47         HEAD_CRT        = 0,
  48         HEAD_PANEL      = 1,
  49 };
  50
  51 /* SM501 memory adress */
  52 struct sm501_mem {
  53         unsigned long    size;
  54         unsigned long    sm_addr;
  55         void __iomem    *k_addr;
  56 };
  57
  58 /* private data that is shared between all frambuffers* */
  59 struct sm501fb_info {
  60         struct device           *dev;
  61         struct fb_info          *fb[2];         /* fb info for both heads */
  62         struct resource         *fbmem_res;     /* framebuffer resource */
  63         struct resource         *regs_res;      /* registers resource */
  64         struct sm501_platdata_fb *pdata;        /* our platform data */
  65
  66         unsigned long            pm_crt_ctrl;   /* pm: crt ctrl save */
  67
  68         int                      irq;
  69         int                      swap_endian;   /* set to swap rgb=>bgr */
  70         void __iomem            *regs;          /* remapped registers */
  71         void __iomem            *fbmem;         /* remapped framebuffer */
  72         size_t                   fbmem_len;     /* length of remapped region */
  73 };
  74
  75 /* per-framebuffer private data */
  76 struct sm501fb_par {
  77         u32                      pseudo_palette[16];
  78
  79         enum sm501_controller    head;
  80         struct sm501_mem         cursor;
  81         struct sm501_mem         screen;
  82         struct fb_ops            ops;
  83
  84         void                    *store_fb;
  85         void                    *store_cursor;
  86         void __iomem            *cursor_regs;
  87         struct sm501fb_info     *info;
  88 };
  89
  90 /* Helper functions */
  91
  92 static inline int h_total(struct fb_var_screeninfo *var)
  93 {
  94         return var->xres + var->left_margin +
  95                 var->right_margin + var->hsync_len;
  96 }
  97
  98 static inline int v_total(struct fb_var_screeninfo *var)
  99 {
 100         return var->yres + var->upper_margin +
 101                 var->lower_margin + var->vsync_len;
 102 }
 103
 104 /* sm501fb_sync_regs()
 105  *
 106  * This call is mainly for PCI bus systems where we need to
 107  * ensure that any writes to the bus are completed before the
 108  * next phase, or after completing a function.
 109 */
 110
 111 static inline void sm501fb_sync_regs(struct sm501fb_info *info)
 112 {
 113         readl(info->regs);
 114 }
 115
 116 /* sm501_alloc_mem
 117  *
 118  * This is an attempt to lay out memory for the two framebuffers and
 119  * everything else
 120  *
 121  * |fbmem_res->start                                           fbmem_res->end|
 122  * |                                                                         |
 123  * |fb[0].fix.smem_start    |         |fb[1].fix.smem_start    |     2K      |
 124  * |-> fb[0].fix.smem_len <-| spare   |-> fb[1].fix.smem_len <-|-> cursors <-|
 125  *
 126  * The "spare" space is for the 2d engine data
 127  * the fixed is space for the cursors (2x1Kbyte)
 128  *
 129  * we need to allocate memory for the 2D acceleration engine
 130  * command list and the data for the engine to deal with.
 131  *
 132  * - all allocations must be 128bit aligned
 133  * - cursors are 64x64x2 bits (1Kbyte)
 134  *
 135  */
 136
 137 #define SM501_MEMF_CURSOR               (1)
 138 #define SM501_MEMF_PANEL                (2)
 139 #define SM501_MEMF_CRT                  (4)
 140 #define SM501_MEMF_ACCEL                (8)
 141
 142 static int sm501_alloc_mem(struct sm501fb_info *inf, struct sm501_mem *mem,
 143                            unsigned int why, size_t size)
 144 {
 145         unsigned int ptr = 0;
 146
 147         switch (why) {
 148         case SM501_MEMF_CURSOR:
 149                 ptr = inf->fbmem_len - size;
 150                 inf->fbmem_len = ptr;
 151                 break;
 152
 153         case SM501_MEMF_PANEL:
 154                 ptr = inf->fbmem_len - size;
 155                 if (ptr < inf->fb[0]->fix.smem_len)
 156                         return -ENOMEM;
 157
 158                 break;
 159
 160         case SM501_MEMF_CRT:
 161                 ptr = 0;
 162                 break;
 163
 164         case SM501_MEMF_ACCEL:
 165                 ptr = inf->fb[0]->fix.smem_len;
 166
 167                 if ((ptr + size) >
 168                     (inf->fb[1]->fix.smem_start - inf->fbmem_res->start))
 169                         return -ENOMEM;
 170                 break;
 171
 172         default:
 173                 return -EINVAL;
 174         }
 175
 176         mem->size    = size;
 177         mem->sm_addr = ptr;
 178         mem->k_addr  = inf->fbmem + ptr;
 179
 180         dev_dbg(inf->dev, "%s: result %08lx, %p - %u, %zd\n",
 181                 __func__, mem->sm_addr, mem->k_addr, why, size);
 182
 183         return 0;
 184 }
 185
 186 /* sm501fb_ps_to_hz
 187  *
 188  * Converts a period in picoseconds to Hz.
 189  *
 190  * Note, we try to keep this in Hz to minimise rounding with
 191  * the limited PLL settings on the SM501.
 192 */
 193
 194 static unsigned long sm501fb_ps_to_hz(unsigned long psvalue)
 195 {
 196         unsigned long long numerator=1000000000000ULL;
 197
 198         /* 10^12 / picosecond period gives frequency in Hz */
 199         do_div(numerator, psvalue);
 200         return (unsigned long)numerator;
 201 }
 202
 203 /* sm501fb_hz_to_ps is identical to the oposite transform */
 204
 205 #define sm501fb_hz_to_ps(x) sm501fb_ps_to_hz(x)
 206
 207 /* sm501fb_setup_gamma
 208  *
 209  * Programs a linear 1.0 gamma ramp in case the gamma
 210  * correction is enabled without programming anything else.
 211 */
 212
 213 static void sm501fb_setup_gamma(struct sm501fb_info *fbi,
 214                                 unsigned long palette)
 215 {
 216         unsigned long value = 0;
 217         int offset;
 218
 219         /* set gamma values */
 220         for (offset = 0; offset < 256 * 4; offset += 4) {
 221                 writel(value, fbi->regs + palette + offset);
 222                 value += 0x010101;      /* Advance RGB by 1,1,1.*/
 223         }
 224 }
 225
 226 /* sm501fb_check_var
 227  *
 228  * check common variables for both panel and crt
 229 */
 230
 231 static int sm501fb_check_var(struct fb_var_screeninfo *var,
 232                              struct fb_info *info)
 233 {
 234         struct sm501fb_par  *par = info->par;
 235         struct sm501fb_info *sm  = par->info;
 236         unsigned long tmp;
 237
 238         /* check we can fit these values into the registers */
 239
 240         if (var->hsync_len > 255 || var->vsync_len > 255)
 241                 return -EINVAL;
 242
 243         if ((var->xres + var->right_margin) >= 4096)
 244                 return -EINVAL;
 245
 246         if ((var->yres + var->lower_margin) > 2048)
 247                 return -EINVAL;
 248
 249         /* hard limits of device */
 250
 251         if (h_total(var) > 4096 || v_total(var) > 2048)
 252                 return -EINVAL;
 253
 254         /* check our line length is going to be 128 bit aligned */
 255
 256         tmp = (var->xres * var->bits_per_pixel) / 8;
 257         if ((tmp & 15) != 0)
 258                 return -EINVAL;
 259
 260         /* check the virtual size */
 261
 262         if (var->xres_virtual > 4096 || var->yres_virtual > 2048)
 263                 return -EINVAL;
 264
 265         /* can cope with 8,16 or 32bpp */
 266
 267         if (var->bits_per_pixel <= 8)
 268                 var->bits_per_pixel = 8;
 269         else if (var->bits_per_pixel <= 16)
 270                 var->bits_per_pixel = 16;
 271         else if (var->bits_per_pixel == 24)
 272                 var->bits_per_pixel = 32;
 273
 274         /* set r/g/b positions and validate bpp */
 275         switch(var->bits_per_pixel) {
 276         case 8:
 277                 var->red.length         = var->bits_per_pixel;
 278                 var->red.offset         = 0;
 279                 var->green.length       = var->bits_per_pixel;
 280                 var->green.offset       = 0;
 281                 var->blue.length        = var->bits_per_pixel;
 282                 var->blue.offset        = 0;
 283                 var->transp.length      = 0;
 284
 285                 break;
 286
 287         case 16:
 288                 if (sm->pdata->flags & SM501_FBPD_SWAP_FB_ENDIAN) {
 289                         var->red.offset         = 11;
 290                         var->green.offset       = 5;
 291                         var->blue.offset        = 0;
 292                 } else {
 293                         var->blue.offset        = 11;
 294                         var->green.offset       = 5;
 295                         var->red.offset         = 0;
 296                 }
 297
 298                 var->red.length         = 5;
 299                 var->green.length       = 6;
 300                 var->blue.length        = 5;
 301                 var->transp.length      = 0;
 302                 break;
 303
 304         case 32:
 305                 if (sm->pdata->flags & SM501_FBPD_SWAP_FB_ENDIAN) {
 306                         var->transp.offset      = 0;
 307                         var->red.offset         = 8;
 308                         var->green.offset       = 16;
 309                         var->blue.offset        = 24;
 310                 } else {
 311                         var->transp.offset      = 24;
 312                         var->red.offset         = 16;
 313                         var->green.offset       = 8;
 314                         var->blue.offset        = 0;
 315                 }
 316
 317                 var->red.length         = 8;
 318                 var->green.length       = 8;
 319                 var->blue.length        = 8;
 320                 var->transp.length      = 0;
 321                 break;
 322
 323         default:
 324                 return -EINVAL;
 325         }
 326
 327         return 0;
 328 }
 329
 330 /*
 331  * sm501fb_check_var_crt():
 332  *
 333  * check the parameters for the CRT head, and either bring them
 334  * back into range, or return -EINVAL.
 335 */
 336
 337 static int sm501fb_check_var_crt(struct fb_var_screeninfo *var,
 338                                  struct fb_info *info)
 339 {
 340         return sm501fb_check_var(var, info);
 341 }
 342
 343 /* sm501fb_check_var_pnl():
 344  *
 345  * check the parameters for the CRT head, and either bring them
 346  * back into range, or return -EINVAL.
 347 */
 348
 349 static int sm501fb_check_var_pnl(struct fb_var_screeninfo *var,
 350                                  struct fb_info *info)
 351 {
 352         return sm501fb_check_var(var, info);
 353 }
 354
 355 /* sm501fb_set_par_common
 356  *
 357  * set common registers for framebuffers
 358 */
 359
 360 static int sm501fb_set_par_common(struct fb_info *info,
 361                                   struct fb_var_screeninfo *var)
 362 {
 363         struct sm501fb_par  *par = info->par;
 364         struct sm501fb_info *fbi = par->info;
 365         unsigned long pixclock;      /* pixelclock in Hz */
 366         unsigned long sm501pixclock; /* pixelclock the 501 can achive in Hz */
 367         unsigned int mem_type;
 368         unsigned int clock_type;
 369         unsigned int head_addr;
 370
 371         dev_dbg(fbi->dev, "%s: %dx%d, bpp = %d, virtual %dx%d\n",
 372                 __func__, var->xres, var->yres, var->bits_per_pixel,
 373                 var->xres_virtual, var->yres_virtual);
 374
 375         switch (par->head) {
 376         case HEAD_CRT:
 377                 mem_type = SM501_MEMF_CRT;
 378                 clock_type = SM501_CLOCK_V2XCLK;
 379                 head_addr = SM501_DC_CRT_FB_ADDR;
 380                 break;
 381
 382         case HEAD_PANEL:
 383                 mem_type = SM501_MEMF_PANEL;
 384                 clock_type = SM501_CLOCK_P2XCLK;
 385                 head_addr = SM501_DC_PANEL_FB_ADDR;
 386                 break;
 387
 388         default:
 389                 mem_type = 0;           /* stop compiler warnings */
 390                 head_addr = 0;
 391                 clock_type = 0;
 392         }
 393
 394         switch (var->bits_per_pixel) {
 395         case 8:
 396                 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
 397                 break;
 398
 399         case 16:
 400                 info->fix.visual = FB_VISUAL_DIRECTCOLOR;
 401                 break;
 402
 403         case 32:
 404                 info->fix.visual = FB_VISUAL_TRUECOLOR;
 405                 break;
 406         }
 407
 408         /* allocate fb memory within 501 */
 409         info->fix.line_length = (var->xres_virtual * var->bits_per_pixel)/8;
 410         info->fix.smem_len    = info->fix.line_length * var->yres_virtual;
 411
 412         dev_dbg(fbi->dev, "%s: line length = %u\n", __func__,
 413                 info->fix.line_length);
 414
 415         if (sm501_alloc_mem(fbi, &par->screen, mem_type,
 416                             info->fix.smem_len)) {
 417                 dev_err(fbi->dev, "no memory available\n");
 418                 return -ENOMEM;
 419         }
 420
 421         info->fix.smem_start = fbi->fbmem_res->start + par->screen.sm_addr;
 422
 423         info->screen_base = fbi->fbmem + par->screen.sm_addr;
 424         info->screen_size = info->fix.smem_len;
 425
 426         /* set start of framebuffer to the screen */
 427
 428         writel(par->screen.sm_addr | SM501_ADDR_FLIP, fbi->regs + head_addr);
 429
 430         /* program CRT clock  */
 431
 432         pixclock = sm501fb_ps_to_hz(var->pixclock);
 433
 434         sm501pixclock = sm501_set_clock(fbi->dev->parent, clock_type,
 435                                         pixclock);
 436
 437         /* update fb layer with actual clock used */
 438         var->pixclock = sm501fb_hz_to_ps(sm501pixclock);
 439
 440         dev_dbg(fbi->dev, "%s: pixclock(ps) = %u, pixclock(Hz)  = %lu, "
 441                "sm501pixclock = %lu,  error = %ld%%\n",
 442                __func__, var->pixclock, pixclock, sm501pixclock,
 443                ((pixclock - sm501pixclock)*100)/pixclock);
 444
 445         return 0;
 446 }
 447
 448 /* sm501fb_set_par_geometry
 449  *
 450  * set the geometry registers for specified framebuffer.
 451 */
 452
 453 static void sm501fb_set_par_geometry(struct fb_info *info,
 454                                      struct fb_var_screeninfo *var)
 455 {
 456         struct sm501fb_par  *par = info->par;
 457         struct sm501fb_info *fbi = par->info;
 458         void __iomem *base = fbi->regs;
 459         unsigned long reg;
 460
 461         if (par->head == HEAD_CRT)
 462                 base += SM501_DC_CRT_H_TOT;
 463         else
 464                 base += SM501_DC_PANEL_H_TOT;
 465
 466         /* set framebuffer width and display width */
 467
 468         reg = info->fix.line_length;
 469         reg |= ((var->xres * var->bits_per_pixel)/8) << 16;
 470
 471         writel(reg, fbi->regs + (par->head == HEAD_CRT ?
 472                     SM501_DC_CRT_FB_OFFSET :  SM501_DC_PANEL_FB_OFFSET));
 473
 474         /* program horizontal total */
 475
 476         reg  = (h_total(var) - 1) << 16;
 477         reg |= (var->xres - 1);
 478
 479         writel(reg, base + SM501_OFF_DC_H_TOT);
 480
 481         /* program horizontal sync */
 482
 483         reg  = var->hsync_len << 16;
 484         reg |= var->xres + var->right_margin - 1;
 485
 486         writel(reg, base + SM501_OFF_DC_H_SYNC);
 487
 488         /* program vertical total */
 489
 490         reg  = (v_total(var) - 1) << 16;
 491         reg |= (var->yres - 1);
 492
 493         writel(reg, base + SM501_OFF_DC_V_TOT);
 494
 495         /* program vertical sync */
 496         reg  = var->vsync_len << 16;
 497         reg |= var->yres + var->lower_margin - 1;
 498
 499         writel(reg, base + SM501_OFF_DC_V_SYNC);
 500 }
 501
 502 /* sm501fb_pan_crt
 503  *
 504  * pan the CRT display output within an virtual framebuffer
 505 */
 506
 507 static int sm501fb_pan_crt(struct fb_var_screeninfo *var,
 508                            struct fb_info *info)
 509 {
 510         struct sm501fb_par  *par = info->par;
 511         struct sm501fb_info *fbi = par->info;
 512         unsigned int bytes_pixel = var->bits_per_pixel / 8;
 513         unsigned long reg;
 514         unsigned long xoffs;
 515
 516         xoffs = var->xoffset * bytes_pixel;
 517
 518         reg = readl(fbi->regs + SM501_DC_CRT_CONTROL);
 519
 520         reg &= ~SM501_DC_CRT_CONTROL_PIXEL_MASK;
 521         reg |= ((xoffs & 15) / bytes_pixel) << 4;
 522         writel(reg, fbi->regs + SM501_DC_CRT_CONTROL);
 523
 524         reg = (par->screen.sm_addr + xoffs +
 525                var->yoffset * info->fix.line_length);
 526         writel(reg | SM501_ADDR_FLIP, fbi->regs + SM501_DC_CRT_FB_ADDR);
 527
 528         sm501fb_sync_regs(fbi);
 529         return 0;
 530 }
 531
 532 /* sm501fb_pan_pnl
 533  *
 534  * pan the panel display output within an virtual framebuffer
 535 */
 536
 537 static int sm501fb_pan_pnl(struct fb_var_screeninfo *var,
 538                            struct fb_info *info)
 539 {
 540         struct sm501fb_par  *par = info->par;
 541         struct sm501fb_info *fbi = par->info;
 542         unsigned long reg;
 543
 544         reg = var->xoffset | (var->xres_virtual << 16);
 545         writel(reg, fbi->regs + SM501_DC_PANEL_FB_WIDTH);
 546
 547         reg = var->yoffset | (var->yres_virtual << 16);
 548         writel(reg, fbi->regs + SM501_DC_PANEL_FB_HEIGHT);
 549
 550         sm501fb_sync_regs(fbi);
 551         return 0;
 552 }
 553
 554 /* sm501fb_set_par_crt
 555  *
 556  * Set the CRT video mode from the fb_info structure
 557 */
 558
 559 static int sm501fb_set_par_crt(struct fb_info *info)
 560 {
 561         struct sm501fb_par  *par = info->par;
 562         struct sm501fb_info *fbi = par->info;
 563         struct fb_var_screeninfo *var = &info->var;
 564         unsigned long control;       /* control register */
 565         int ret;
 566
 567         /* activate new configuration */
 568
 569         dev_dbg(fbi->dev, "%s(%p)\n", __func__, info);
 570
 571         /* enable CRT DAC - note 0 is on!*/
 572         sm501_misc_control(fbi->dev->parent, 0, SM501_MISC_DAC_POWER);
 573
 574         control = readl(fbi->regs + SM501_DC_CRT_CONTROL);
 575
 576         control &= (SM501_DC_CRT_CONTROL_PIXEL_MASK |
 577                     SM501_DC_CRT_CONTROL_GAMMA |
 578                     SM501_DC_CRT_CONTROL_BLANK |
 579                     SM501_DC_CRT_CONTROL_SEL |
 580                     SM501_DC_CRT_CONTROL_CP |
 581                     SM501_DC_CRT_CONTROL_TVP);
 582
 583         /* set the sync polarities before we check data source  */
 584
 585         if ((var->sync & FB_SYNC_HOR_HIGH_ACT) == 0)
 586                 control |= SM501_DC_CRT_CONTROL_HSP;
 587
 588         if ((var->sync & FB_SYNC_VERT_HIGH_ACT) == 0)
 589                 control |= SM501_DC_CRT_CONTROL_VSP;
 590
 591         if ((control & SM501_DC_CRT_CONTROL_SEL) == 0) {
 592                 /* the head is displaying panel data... */
 593
 594                 sm501_alloc_mem(fbi, &par->screen, SM501_MEMF_CRT, 0);
 595                 goto out_update;
 596         }
 597
 598         ret = sm501fb_set_par_common(info, var);
 599         if (ret) {
 600                 dev_err(fbi->dev, "failed to set common parameters\n");
 601                 return ret;
 602         }
 603
 604         sm501fb_pan_crt(var, info);
 605         sm501fb_set_par_geometry(info, var);
 606
 607         control |= SM501_FIFO_3;        /* fill if >3 free slots */
 608
 609         switch(var->bits_per_pixel) {
 610         case 8:
 611                 control |= SM501_DC_CRT_CONTROL_8BPP;
 612                 break;
 613
 614         case 16:
 615                 control |= SM501_DC_CRT_CONTROL_16BPP;
 616                 break;
 617
 618         case 32:
 619                 control |= SM501_DC_CRT_CONTROL_32BPP;
 620                 sm501fb_setup_gamma(fbi, SM501_DC_CRT_PALETTE);
 621                 break;
 622
 623         default:
 624                 BUG();
 625         }
 626
 627         control |= SM501_DC_CRT_CONTROL_SEL;    /* CRT displays CRT data */
 628         control |= SM501_DC_CRT_CONTROL_TE;     /* enable CRT timing */
 629         control |= SM501_DC_CRT_CONTROL_ENABLE; /* enable CRT plane */
 630
 631  out_update:
 632         dev_dbg(fbi->dev, "new control is %08lx\n", control);
 633
 634         writel(control, fbi->regs + SM501_DC_CRT_CONTROL);
 635         sm501fb_sync_regs(fbi);
 636
 637         return 0;
 638 }
 639
 640 static void sm501fb_panel_power(struct sm501fb_info *fbi, int to)
 641 {
 642         unsigned long control;
 643         void __iomem *ctrl_reg = fbi->regs + SM501_DC_PANEL_CONTROL;
 644
 645         control = readl(ctrl_reg);
 646
 647         if (to && (control & SM501_DC_PANEL_CONTROL_VDD) == 0) {
 648                 /* enable panel power */
 649
 650                 control |= SM501_DC_PANEL_CONTROL_VDD;  /* FPVDDEN */
 651                 writel(control, ctrl_reg);
 652                 sm501fb_sync_regs(fbi);
 653                 mdelay(10);
 654
 655                 control |= SM501_DC_PANEL_CONTROL_DATA; /* DATA */
 656                 writel(control, ctrl_reg);
 657                 sm501fb_sync_regs(fbi);
 658                 mdelay(10);
 659
 660                 control |= SM501_DC_PANEL_CONTROL_BIAS; /* VBIASEN */
 661                 writel(control, ctrl_reg);
 662                 sm501fb_sync_regs(fbi);
 663                 mdelay(10);
 664
 665                 control |= SM501_DC_PANEL_CONTROL_FPEN;
 666                 writel(control, ctrl_reg);
 667
 668         } else if (!to && (control & SM501_DC_PANEL_CONTROL_VDD) != 0) {
 669                 /* disable panel power */
 670
 671                 control &= ~SM501_DC_PANEL_CONTROL_FPEN;
 672                 writel(control, ctrl_reg);
 673                 sm501fb_sync_regs(fbi);
 674                 mdelay(10);
 675
 676                 control &= ~SM501_DC_PANEL_CONTROL_BIAS;
 677                 writel(control, ctrl_reg);
 678                 sm501fb_sync_regs(fbi);
 679                 mdelay(10);
 680
 681                 control &= ~SM501_DC_PANEL_CONTROL_DATA;
 682                 writel(control, ctrl_reg);
 683                 sm501fb_sync_regs(fbi);
 684                 mdelay(10);
 685
 686                 control &= ~SM501_DC_PANEL_CONTROL_VDD;
 687                 writel(control, ctrl_reg);
 688                 sm501fb_sync_regs(fbi);
 689                 mdelay(10);
 690         }
 691
 692         sm501fb_sync_regs(fbi);
 693 }
 694
 695 /* sm501fb_set_par_pnl
 696  *
 697  * Set the panel video mode from the fb_info structure
 698 */
 699
 700 static int sm501fb_set_par_pnl(struct fb_info *info)
 701 {
 702         struct sm501fb_par  *par = info->par;
 703         struct sm501fb_info *fbi = par->info;
 704         struct fb_var_screeninfo *var = &info->var;
 705         unsigned long control;
 706         unsigned long reg;
 707         int ret;
 708
 709         dev_dbg(fbi->dev, "%s(%p)\n", __func__, info);
 710
 711         /* activate this new configuration */
 712
 713         ret = sm501fb_set_par_common(info, var);
 714         if (ret)
 715                 return ret;
 716
 717         sm501fb_pan_pnl(var, info);
 718         sm501fb_set_par_geometry(info, var);
 719
 720         /* update control register */
 721
 722         control = readl(fbi->regs + SM501_DC_PANEL_CONTROL);
 723         control &= (SM501_DC_PANEL_CONTROL_GAMMA |
 724                     SM501_DC_PANEL_CONTROL_VDD  |
 725                     SM501_DC_PANEL_CONTROL_DATA |
 726                     SM501_DC_PANEL_CONTROL_BIAS |
 727                     SM501_DC_PANEL_CONTROL_FPEN |
 728                     SM501_DC_PANEL_CONTROL_CP |
 729                     SM501_DC_PANEL_CONTROL_CK |
 730                     SM501_DC_PANEL_CONTROL_HP |
 731                     SM501_DC_PANEL_CONTROL_VP |
 732                     SM501_DC_PANEL_CONTROL_HPD |
 733                     SM501_DC_PANEL_CONTROL_VPD);
 734
 735         control |= SM501_FIFO_3;        /* fill if >3 free slots */
 736
 737         switch(var->bits_per_pixel) {
 738         case 8:
 739                 control |= SM501_DC_PANEL_CONTROL_8BPP;
 740                 break;
 741
 742         case 16:
 743                 control |= SM501_DC_PANEL_CONTROL_16BPP;
 744                 break;
 745
 746         case 32:
 747                 control |= SM501_DC_PANEL_CONTROL_32BPP;
 748                 sm501fb_setup_gamma(fbi, SM501_DC_PANEL_PALETTE);
 749                 break;
 750
 751         default:
 752                 BUG();
 753         }
 754
 755         writel(0x0, fbi->regs + SM501_DC_PANEL_PANNING_CONTROL);
 756
 757         /* panel plane top left and bottom right location */
 758
 759         writel(0x00, fbi->regs + SM501_DC_PANEL_TL_LOC);
 760
 761         reg  = var->xres - 1;
 762         reg |= (var->yres - 1) << 16;
 763
 764         writel(reg, fbi->regs + SM501_DC_PANEL_BR_LOC);
 765
 766         /* program panel control register */
 767
 768         control |= SM501_DC_PANEL_CONTROL_TE;   /* enable PANEL timing */
 769         control |= SM501_DC_PANEL_CONTROL_EN;   /* enable PANEL gfx plane */
 770
 771         if ((var->sync & FB_SYNC_HOR_HIGH_ACT) == 0)
 772                 control |= SM501_DC_PANEL_CONTROL_HSP;
 773
 774         if ((var->sync & FB_SYNC_VERT_HIGH_ACT) == 0)
 775                 control |= SM501_DC_PANEL_CONTROL_VSP;
 776
 777         writel(control, fbi->regs + SM501_DC_PANEL_CONTROL);
 778         sm501fb_sync_regs(fbi);
 779
 780         /* power the panel up */
 781         sm501fb_panel_power(fbi, 1);
 782         return 0;
 783 }
 784
 785
 786 /* chan_to_field
 787  *
 788  * convert a colour value into a field position
 789  *
 790  * from pxafb.c
 791 */
 792
 793 static inline unsigned int chan_to_field(unsigned int chan,
 794                                          struct fb_bitfield *bf)
 795 {
 796         chan &= 0xffff;
 797         chan >>= 16 - bf->length;
 798         return chan << bf->offset;
 799 }
 800
 801 /* sm501fb_setcolreg
 802  *
 803  * set the colour mapping for modes that support palettised data
 804 */
 805
 806 static int sm501fb_setcolreg(unsigned regno,
 807                              unsigned red, unsigned green, unsigned blue,
 808                              unsigned transp, struct fb_info *info)
 809 {
 810         struct sm501fb_par  *par = info->par;
 811         struct sm501fb_info *fbi = par->info;
 812         void __iomem *base = fbi->regs;
 813         unsigned int val;
 814
 815         if (par->head == HEAD_CRT)
 816                 base += SM501_DC_CRT_PALETTE;
 817         else
 818                 base += SM501_DC_PANEL_PALETTE;
 819
 820         switch (info->fix.visual) {
 821         case FB_VISUAL_TRUECOLOR:
 822                 /* true-colour, use pseuo-palette */
 823
 824                 if (regno < 16) {
 825                         u32 *pal = par->pseudo_palette;
 826
 827                         val  = chan_to_field(red,   &info->var.red);
 828                         val |= chan_to_field(green, &info->var.green);
 829                         val |= chan_to_field(blue,  &info->var.blue);
 830
 831                         pal[regno] = val;
 832                 }
 833                 break;
 834
 835         case FB_VISUAL_PSEUDOCOLOR:
 836                 if (regno < 256) {
 837                         val = (red >> 8) << 16;
 838                         val |= (green >> 8) << 8;
 839                         val |= blue >> 8;
 840
 841                         writel(val, base + (regno * 4));
 842                 }
 843
 844                 break;
 845
 846         default:
 847                 return 1;   /* unknown type */
 848         }
 849
 850         return 0;
 851 }
 852
 853 /* sm501fb_blank_pnl
 854  *
 855  * Blank or un-blank the panel interface
 856 */
 857
 858 static int sm501fb_blank_pnl(int blank_mode, struct fb_info *info)
 859 {
 860         struct sm501fb_par  *par = info->par;
 861         struct sm501fb_info *fbi = par->info;
 862
 863         dev_dbg(fbi->dev, "%s(mode=%d, %p)\n", __func__, blank_mode, info);
 864
 865         switch (blank_mode) {
 866         case FB_BLANK_POWERDOWN:
 867                 sm501fb_panel_power(fbi, 0);
 868                 break;
 869
 870         case FB_BLANK_UNBLANK:
 871                 sm501fb_panel_power(fbi, 1);
 872                 break;
 873
 874         case FB_BLANK_NORMAL:
 875         case FB_BLANK_VSYNC_SUSPEND:
 876         case FB_BLANK_HSYNC_SUSPEND:
 877         default:
 878                 return 1;
 879         }
 880
 881         return 0;
 882 }
 883
 884 /* sm501fb_blank_crt
 885  *
 886  * Blank or un-blank the crt interface
 887 */
 888
 889 static int sm501fb_blank_crt(int blank_mode, struct fb_info *info)
 890 {
 891         struct sm501fb_par  *par = info->par;
 892         struct sm501fb_info *fbi = par->info;
 893         unsigned long ctrl;
 894
 895         dev_dbg(fbi->dev, "%s(mode=%d, %p)\n", __func__, blank_mode, info);
 896
 897         ctrl = readl(fbi->regs + SM501_DC_CRT_CONTROL);
 898
 899         switch (blank_mode) {
 900         case FB_BLANK_POWERDOWN:
 901                 ctrl &= ~SM501_DC_CRT_CONTROL_ENABLE;
 902                 sm501_misc_control(fbi->dev->parent, SM501_MISC_DAC_POWER, 0);
 903
 904         case FB_BLANK_NORMAL:
 905                 ctrl |= SM501_DC_CRT_CONTROL_BLANK;
 906                 break;
 907
 908         case FB_BLANK_UNBLANK:
 909                 ctrl &= ~SM501_DC_CRT_CONTROL_BLANK;
 910                 ctrl |=  SM501_DC_CRT_CONTROL_ENABLE;
 911                 sm501_misc_control(fbi->dev->parent, 0, SM501_MISC_DAC_POWER);
 912                 break;
 913
 914         case FB_BLANK_VSYNC_SUSPEND:
 915         case FB_BLANK_HSYNC_SUSPEND:
 916         default:
 917                 return 1;
 918
 919         }
 920
 921         writel(ctrl, fbi->regs + SM501_DC_CRT_CONTROL);
 922         sm501fb_sync_regs(fbi);
 923
 924         return 0;
 925 }
 926
 927 /* sm501fb_cursor
 928  *
 929  * set or change the hardware cursor parameters
 930 */
 931
 932 static int sm501fb_cursor(struct fb_info *info, struct fb_cursor *cursor)
 933 {
 934         struct sm501fb_par  *par = info->par;
 935         struct sm501fb_info *fbi = par->info;
 936         void __iomem *base = fbi->regs;
 937         unsigned long hwc_addr;
 938         unsigned long fg, bg;
 939
 940         dev_dbg(fbi->dev, "%s(%p,%p)\n", __func__, info, cursor);
 941
 942         if (par->head == HEAD_CRT)
 943                 base += SM501_DC_CRT_HWC_BASE;
 944         else
 945                 base += SM501_DC_PANEL_HWC_BASE;
 946
 947         /* check not being asked to exceed capabilities */
 948
 949         if (cursor->image.width > 64)
 950                 return -EINVAL;
 951
 952         if (cursor->image.height > 64)
 953                 return -EINVAL;
 954
 955         if (cursor->image.depth > 1)
 956                 return -EINVAL;
 957
 958         hwc_addr = readl(base + SM501_OFF_HWC_ADDR);
 959
 960         if (cursor->enable)
 961                 writel(hwc_addr | SM501_HWC_EN, base + SM501_OFF_HWC_ADDR);
 962         else
 963                 writel(hwc_addr & ~SM501_HWC_EN, base + SM501_OFF_HWC_ADDR);
 964
 965         /* set data */
 966         if (cursor->set & FB_CUR_SETPOS) {
 967                 unsigned int x = cursor->image.dx;
 968                 unsigned int y = cursor->image.dy;
 969
 970                 if (x >= 2048 || y >= 2048 )
 971                         return -EINVAL;
 972
 973                 dev_dbg(fbi->dev, "set position %d,%d\n", x, y);
 974
 975                 //y += cursor->image.height;
 976
 977                 writel(x | (y << 16), base + SM501_OFF_HWC_LOC);
 978         }
 979
 980         if (cursor->set & FB_CUR_SETCMAP) {
 981                 unsigned int bg_col = cursor->image.bg_color;
 982                 unsigned int fg_col = cursor->image.fg_color;
 983
 984                 dev_dbg(fbi->dev, "%s: update cmap (%08x,%08x)\n",
 985                         __func__, bg_col, fg_col);
 986
 987                 bg = ((info->cmap.red[bg_col] & 0xF8) << 8) |
 988                         ((info->cmap.green[bg_col] & 0xFC) << 3) |
 989                         ((info->cmap.blue[bg_col] & 0xF8) >> 3);
 990
 991                 fg = ((info->cmap.red[fg_col] & 0xF8) << 8) |
 992                         ((info->cmap.green[fg_col] & 0xFC) << 3) |
 993                         ((info->cmap.blue[fg_col] & 0xF8) >> 3);
 994
 995                 dev_dbg(fbi->dev, "fgcol %08lx, bgcol %08lx\n", fg, bg);
 996
 997                 writel(bg, base + SM501_OFF_HWC_COLOR_1_2);
 998                 writel(fg, base + SM501_OFF_HWC_COLOR_3);
 999         }
1000
1001         if (cursor->set & FB_CUR_SETSIZE ||
1002             cursor->set & (FB_CUR_SETIMAGE | FB_CUR_SETSHAPE)) {
1003                 /* SM501 cursor is a two bpp 64x64 bitmap this routine
1004                  * clears it to transparent then combines the cursor
1005                  * shape plane with the colour plane to set the
1006                  * cursor */
1007                 int x, y;
1008                 const unsigned char *pcol = cursor->image.data;
1009                 const unsigned char *pmsk = cursor->mask;
1010                 void __iomem   *dst = par->cursor.k_addr;
1011                 unsigned char  dcol = 0;
1012                 unsigned char  dmsk = 0;
1013                 unsigned int   op;
1014
1015                 dev_dbg(fbi->dev, "%s: setting shape (%d,%d)\n",
1016                         __func__, cursor->image.width, cursor->image.height);
1017
1018                 for (op = 0; op < (64*64*2)/8; op+=4)
1019                         writel(0x0, dst + op);
1020
1021                 for (y = 0; y < cursor->image.height; y++) {
1022                         for (x = 0; x < cursor->image.width; x++) {
1023                                 if ((x % 8) == 0) {
1024                                         dcol = *pcol++;
1025                                         dmsk = *pmsk++;
1026                                 } else {
1027                                         dcol >>= 1;
1028                                         dmsk >>= 1;
1029                                 }
1030
1031                                 if (dmsk & 1) {
1032                                         op = (dcol & 1) ? 1 : 3;
1033                                         op <<= ((x % 4) * 2);
1034
1035                                         op |= readb(dst + (x / 4));
1036                                         writeb(op, dst + (x / 4));
1037                                 }
1038                         }
1039                         dst += (64*2)/8;
1040                 }
1041         }
1042
1043         sm501fb_sync_regs(fbi); /* ensure cursor data flushed */
1044         return 0;
1045 }
1046
1047 /* sm501fb_crtsrc_show
1048  *
1049  * device attribute code to show where the crt output is sourced from
1050 */
1051
1052 static ssize_t sm501fb_crtsrc_show(struct device *dev,
1053                                struct device_attribute *attr, char *buf)
1054 {
1055         struct sm501fb_info *info = dev_get_drvdata(dev);
1056         unsigned long ctrl;
1057
1058         ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1059         ctrl &= SM501_DC_CRT_CONTROL_SEL;
1060
1061         return snprintf(buf, PAGE_SIZE, "%s\n", ctrl ? "crt" : "panel");
1062 }
1063
1064 /* sm501fb_crtsrc_show
1065  *
1066  * device attribute code to set where the crt output is sourced from
1067 */
1068
1069 static ssize_t sm501fb_crtsrc_store(struct device *dev,
1070                                 struct device_attribute *attr,
1071                                 const char *buf, size_t len)
1072 {
1073         struct sm501fb_info *info = dev_get_drvdata(dev);
1074         enum sm501_controller head;
1075         unsigned long ctrl;
1076
1077         if (len < 1)
1078                 return -EINVAL;
1079
1080         if (strnicmp(buf, "crt", 3) == 0)
1081                 head = HEAD_CRT;
1082         else if (strnicmp(buf, "panel", 5) == 0)
1083                 head = HEAD_PANEL;
1084         else
1085                 return -EINVAL;
1086
1087         dev_info(dev, "setting crt source to head %d\n", head);
1088
1089         ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1090
1091         if (head == HEAD_CRT) {
1092                 ctrl |= SM501_DC_CRT_CONTROL_SEL;
1093                 ctrl |= SM501_DC_CRT_CONTROL_ENABLE;
1094                 ctrl |= SM501_DC_CRT_CONTROL_TE;
1095         } else {
1096                 ctrl &= ~SM501_DC_CRT_CONTROL_SEL;
1097                 ctrl &= ~SM501_DC_CRT_CONTROL_ENABLE;
1098                 ctrl &= ~SM501_DC_CRT_CONTROL_TE;
1099         }
1100
1101         writel(ctrl, info->regs + SM501_DC_CRT_CONTROL);
1102         sm501fb_sync_regs(info);
1103
1104         return len;
1105 }
1106
1107 /* Prepare the device_attr for registration with sysfs later */
1108 static DEVICE_ATTR(crt_src, 0666, sm501fb_crtsrc_show, sm501fb_crtsrc_store);
1109
1110 /* sm501fb_show_regs
1111  *
1112  * show the primary sm501 registers
1113 */
1114 static int sm501fb_show_regs(struct sm501fb_info *info, char *ptr,
1115                              unsigned int start, unsigned int len)
1116 {
1117         void __iomem *mem = info->regs;
1118         char *buf = ptr;
1119         unsigned int reg;
1120
1121         for (reg = start; reg < (len + start); reg += 4)
1122                 ptr += sprintf(ptr, "%08x = %08x\n", reg, readl(mem + reg));
1123
1124         return ptr - buf;
1125 }
1126
1127 /* sm501fb_debug_show_crt
1128  *
1129  * show the crt control and cursor registers
1130 */
1131
1132 static ssize_t sm501fb_debug_show_crt(struct device *dev,
1133                                   struct device_attribute *attr, char *buf)
1134 {
1135         struct sm501fb_info *info = dev_get_drvdata(dev);
1136         char *ptr = buf;
1137
1138         ptr += sm501fb_show_regs(info, ptr, SM501_DC_CRT_CONTROL, 0x40);
1139         ptr += sm501fb_show_regs(info, ptr, SM501_DC_CRT_HWC_BASE, 0x10);
1140
1141         return ptr - buf;
1142 }
1143
1144 static DEVICE_ATTR(fbregs_crt, 0444, sm501fb_debug_show_crt, NULL);
1145
1146 /* sm501fb_debug_show_pnl
1147  *
1148  * show the panel control and cursor registers
1149 */
1150
1151 static ssize_t sm501fb_debug_show_pnl(struct device *dev,
1152                                   struct device_attribute *attr, char *buf)
1153 {
1154         struct sm501fb_info *info = dev_get_drvdata(dev);
1155         char *ptr = buf;
1156
1157         ptr += sm501fb_show_regs(info, ptr, 0x0, 0x40);
1158         ptr += sm501fb_show_regs(info, ptr, SM501_DC_PANEL_HWC_BASE, 0x10);
1159
1160         return ptr - buf;
1161 }
1162
1163 static DEVICE_ATTR(fbregs_pnl, 0444, sm501fb_debug_show_pnl, NULL);
1164
1165 /* framebuffer ops */
1166
1167 static struct fb_ops sm501fb_ops_crt = {
1168         .owner          = THIS_MODULE,
1169         .fb_check_var   = sm501fb_check_var_crt,
1170         .fb_set_par     = sm501fb_set_par_crt,
1171         .fb_blank       = sm501fb_blank_crt,
1172         .fb_setcolreg   = sm501fb_setcolreg,
1173         .fb_pan_display = sm501fb_pan_crt,
1174         .fb_cursor      = sm501fb_cursor,
1175         .fb_fillrect    = cfb_fillrect,
1176         .fb_copyarea    = cfb_copyarea,
1177         .fb_imageblit   = cfb_imageblit,
1178 };
1179
1180 static struct fb_ops sm501fb_ops_pnl = {
1181         .owner          = THIS_MODULE,
1182         .fb_check_var   = sm501fb_check_var_pnl,
1183         .fb_set_par     = sm501fb_set_par_pnl,
1184         .fb_pan_display = sm501fb_pan_pnl,
1185         .fb_blank       = sm501fb_blank_pnl,
1186         .fb_setcolreg   = sm501fb_setcolreg,
1187         .fb_cursor      = sm501fb_cursor,
1188         .fb_fillrect    = cfb_fillrect,
1189         .fb_copyarea    = cfb_copyarea,
1190         .fb_imageblit   = cfb_imageblit,
1191 };
1192
1193 /* sm501fb_info_alloc
1194  *
1195  * creates and initialises an sm501fb_info structure
1196 */
1197
1198 static struct sm501fb_info *sm501fb_info_alloc(struct fb_info *fbinfo_crt,
1199                                                struct fb_info *fbinfo_pnl)
1200 {
1201         struct sm501fb_info *info;
1202         struct sm501fb_par  *par;
1203
1204         info = kzalloc(sizeof(struct sm501fb_info), GFP_KERNEL);
1205         if (info) {
1206                 /* set the references back */
1207
1208                 par = fbinfo_crt->par;
1209                 par->info = info;
1210                 par->head = HEAD_CRT;
1211                 fbinfo_crt->pseudo_palette = &par->pseudo_palette;
1212
1213                 par = fbinfo_pnl->par;
1214                 par->info = info;
1215                 par->head = HEAD_PANEL;
1216                 fbinfo_pnl->pseudo_palette = &par->pseudo_palette;
1217
1218                 /* store the two fbs into our info */
1219                 info->fb[HEAD_CRT] = fbinfo_crt;
1220                 info->fb[HEAD_PANEL] = fbinfo_pnl;
1221         }
1222
1223         return info;
1224 }
1225
1226 /* sm501_init_cursor
1227  *
1228  * initialise hw cursor parameters
1229 */
1230
1231 static int sm501_init_cursor(struct fb_info *fbi, unsigned int reg_base)
1232 {
1233         struct sm501fb_par *par = fbi->par;
1234         struct sm501fb_info *info = par->info;
1235         int ret;
1236
1237         par->cursor_regs = info->regs + reg_base;
1238
1239         ret = sm501_alloc_mem(info, &par->cursor, SM501_MEMF_CURSOR, 1024);
1240         if (ret < 0)
1241                 return ret;
1242
1243         /* initialise the colour registers */
1244
1245         writel(par->cursor.sm_addr, par->cursor_regs + SM501_OFF_HWC_ADDR);
1246
1247         writel(0x00, par->cursor_regs + SM501_OFF_HWC_LOC);
1248         writel(0x00, par->cursor_regs + SM501_OFF_HWC_COLOR_1_2);
1249         writel(0x00, par->cursor_regs + SM501_OFF_HWC_COLOR_3);
1250         sm501fb_sync_regs(info);
1251
1252         return 0;
1253 }
1254
1255 /* sm501fb_info_start
1256  *
1257  * fills the par structure claiming resources and remapping etc.
1258 */
1259
1260 static int sm501fb_start(struct sm501fb_info *info,
1261                          struct platform_device *pdev)
1262 {
1263         struct resource *res;
1264         struct device *dev;
1265         int ret;
1266
1267         info->dev = dev = &pdev->dev;
1268         platform_set_drvdata(pdev, info);
1269
1270         info->irq = ret = platform_get_irq(pdev, 0);
1271         if (ret < 0) {
1272                 /* we currently do not use the IRQ */
1273                 dev_warn(dev, "no irq for device\n");
1274         }
1275
1276         /* allocate, reserve and remap resources for registers */
1277         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1278         if (res == NULL) {
1279                 dev_err(dev, "no resource definition for registers\n");
1280                 ret = -ENOENT;
1281                 goto err_release;
1282         }
1283
1284         info->regs_res = request_mem_region(res->start,
1285                                             res->end - res->start,
1286                                             pdev->name);
1287
1288         if (info->regs_res == NULL) {
1289                 dev_err(dev, "cannot claim registers\n");
1290                 ret = -ENXIO;
1291                 goto err_release;
1292         }
1293
1294         info->regs = ioremap(res->start, (res->end - res->start)+1);
1295         if (info->regs == NULL) {
1296                 dev_err(dev, "cannot remap registers\n");
1297                 ret = -ENXIO;
1298                 goto err_regs_res;
1299         }
1300
1301         /* allocate, reserve resources for framebuffer */
1302         res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
1303         if (res == NULL) {
1304                 dev_err(dev, "no memory resource defined\n");
1305                 ret = -ENXIO;
1306                 goto err_regs_map;
1307         }
1308
1309         info->fbmem_res = request_mem_region(res->start,
1310                                              (res->end - res->start)+1,
1311                                              pdev->name);
1312         if (info->fbmem_res == NULL) {
1313                 dev_err(dev, "cannot claim framebuffer\n");
1314                 ret = -ENXIO;
1315                 goto err_regs_map;
1316         }
1317
1318         info->fbmem = ioremap(res->start, (res->end - res->start)+1);
1319         if (info->fbmem == NULL) {
1320                 dev_err(dev, "cannot remap framebuffer\n");
1321                 goto err_mem_res;
1322         }
1323
1324         info->fbmem_len = (res->end - res->start)+1;
1325
1326         /* enable display controller */
1327         sm501_unit_power(dev->parent, SM501_GATE_DISPLAY, 1);
1328
1329         /* setup cursors */
1330
1331         sm501_init_cursor(info->fb[HEAD_CRT], SM501_DC_CRT_HWC_ADDR);
1332         sm501_init_cursor(info->fb[HEAD_PANEL], SM501_DC_PANEL_HWC_ADDR);
1333
1334         return 0; /* everything is setup */
1335
1336  err_mem_res:
1337         release_resource(info->fbmem_res);
1338         kfree(info->fbmem_res);
1339
1340  err_regs_map:
1341         iounmap(info->regs);
1342
1343  err_regs_res:
1344         release_resource(info->regs_res);
1345         kfree(info->regs_res);
1346
1347  err_release:
1348         return ret;
1349 }
1350
1351 static void sm501fb_stop(struct sm501fb_info *info)
1352 {
1353         /* disable display controller */
1354         sm501_unit_power(info->dev->parent, SM501_GATE_DISPLAY, 0);
1355
1356         iounmap(info->fbmem);
1357         release_resource(info->fbmem_res);
1358         kfree(info->fbmem_res);
1359
1360         iounmap(info->regs);
1361         release_resource(info->regs_res);
1362         kfree(info->regs_res);
1363 }
1364
1365 static void sm501fb_info_release(struct sm501fb_info *info)
1366 {
1367         kfree(info);
1368 }
1369
1370 static int sm501fb_init_fb(struct fb_info *fb,
1371                            enum sm501_controller head,
1372                            const char *fbname)
1373 {
1374         struct sm501_platdata_fbsub *pd;
1375         struct sm501fb_par *par = fb->par;
1376         struct sm501fb_info *info = par->info;
1377         unsigned long ctrl;
1378         unsigned int enable;
1379         int ret;
1380
1381         switch (head) {
1382         case HEAD_CRT:
1383                 pd = info->pdata->fb_crt;
1384                 ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1385                 enable = (ctrl & SM501_DC_CRT_CONTROL_ENABLE) ? 1 : 0;
1386
1387                 /* ensure we set the correct source register */
1388                 if (info->pdata->fb_route != SM501_FB_CRT_PANEL) {
1389                         ctrl |= SM501_DC_CRT_CONTROL_SEL;
1390                         writel(ctrl, info->regs + SM501_DC_CRT_CONTROL);
1391                 }
1392
1393                 break;
1394
1395         case HEAD_PANEL:
1396                 pd = info->pdata->fb_pnl;
1397                 ctrl = readl(info->regs + SM501_DC_PANEL_CONTROL);
1398                 enable = (ctrl & SM501_DC_PANEL_CONTROL_EN) ? 1 : 0;
1399                 break;
1400
1401         default:
1402                 pd = NULL;              /* stop compiler warnings */
1403                 ctrl = 0;
1404                 enable = 0;
1405                 BUG();
1406         }
1407
1408         dev_info(info->dev, "fb %s %sabled at start\n",
1409                  fbname, enable ? "en" : "dis");
1410
1411         /* check to see if our routing allows this */
1412
1413         if (head == HEAD_CRT && info->pdata->fb_route == SM501_FB_CRT_PANEL) {
1414                 ctrl &= ~SM501_DC_CRT_CONTROL_SEL;
1415                 writel(ctrl, info->regs + SM501_DC_CRT_CONTROL);
1416                 enable = 0;
1417         }
1418
1419         strlcpy(fb->fix.id, fbname, sizeof(fb->fix.id));
1420
1421         memcpy(&par->ops,
1422                (head == HEAD_CRT) ? &sm501fb_ops_crt : &sm501fb_ops_pnl,
1423                sizeof(struct fb_ops));
1424
1425         /* update ops dependant on what we've been passed */
1426
1427         if ((pd->flags & SM501FB_FLAG_USE_HWCURSOR) == 0)
1428                 par->ops.fb_cursor = NULL;
1429
1430         fb->fbops = &par->ops;
1431         fb->flags = FBINFO_FLAG_DEFAULT |
1432                 FBINFO_HWACCEL_XPAN | FBINFO_HWACCEL_YPAN;
1433
1434         /* fixed data */
1435
1436         fb->fix.type            = FB_TYPE_PACKED_PIXELS;
1437         fb->fix.type_aux        = 0;
1438         fb->fix.xpanstep        = 1;
1439         fb->fix.ypanstep        = 1;
1440         fb->fix.ywrapstep       = 0;
1441         fb->fix.accel           = FB_ACCEL_NONE;
1442
1443         /* screenmode */
1444
1445         fb->var.nonstd          = 0;
1446         fb->var.activate        = FB_ACTIVATE_NOW;
1447         fb->var.accel_flags     = 0;
1448         fb->var.vmode           = FB_VMODE_NONINTERLACED;
1449         fb->var.bits_per_pixel  = 16;
1450
1451         if (enable && (pd->flags & SM501FB_FLAG_USE_INIT_MODE) && 0) {
1452                 /* TODO read the mode from the current display */
1453
1454         } else {
1455                 if (pd->def_mode) {
1456                         dev_info(info->dev, "using supplied mode\n");
1457                         fb_videomode_to_var(&fb->var, pd->def_mode);
1458
1459                         fb->var.bits_per_pixel = pd->def_bpp ? pd->def_bpp : 8;
1460                         fb->var.xres_virtual = fb->var.xres;
1461                         fb->var.yres_virtual = fb->var.yres;
1462                 } else {
1463                         ret = fb_find_mode(&fb->var, fb,
1464                                            NULL, NULL, 0, NULL, 8);
1465
1466                         if (ret == 0 || ret == 4) {
1467                                 dev_err(info->dev,
1468                                         "failed to get initial mode\n");
1469                                 return -EINVAL;
1470                         }
1471                 }
1472         }
1473
1474         /* initialise and set the palette */
1475         fb_alloc_cmap(&fb->cmap, NR_PALETTE, 0);
1476         fb_set_cmap(&fb->cmap, fb);
1477
1478         ret = (fb->fbops->fb_check_var)(&fb->var, fb);
1479         if (ret)
1480                 dev_err(info->dev, "check_var() failed on initial setup?\n");
1481
1482         /* ensure we've activated our new configuration */
1483         (fb->fbops->fb_set_par)(fb);
1484
1485         return 0;
1486 }
1487
1488 /* default platform data if none is supplied (ie, PCI device) */
1489
1490 static struct sm501_platdata_fbsub sm501fb_pdata_crt = {
1491         .flags          = (SM501FB_FLAG_USE_INIT_MODE |
1492                            SM501FB_FLAG_USE_HWCURSOR |
1493                            SM501FB_FLAG_USE_HWACCEL |
1494                            SM501FB_FLAG_DISABLE_AT_EXIT),
1495
1496 };
1497
1498 static struct sm501_platdata_fbsub sm501fb_pdata_pnl = {
1499         .flags          = (SM501FB_FLAG_USE_INIT_MODE |
1500                            SM501FB_FLAG_USE_HWCURSOR |
1501                            SM501FB_FLAG_USE_HWACCEL |
1502                            SM501FB_FLAG_DISABLE_AT_EXIT),
1503 };
1504
1505 static struct sm501_platdata_fb sm501fb_def_pdata = {
1506         .fb_route               = SM501_FB_OWN,
1507         .fb_crt                 = &sm501fb_pdata_crt,
1508         .fb_pnl                 = &sm501fb_pdata_pnl,
1509 };
1510
1511 static char driver_name_crt[] = "sm501fb-crt";
1512 static char driver_name_pnl[] = "sm501fb-panel";
1513
1514 static int __init sm501fb_probe(struct platform_device *pdev)
1515 {
1516         struct sm501fb_info *info;
1517         struct device       *dev = &pdev->dev;
1518         struct fb_info      *fbinfo_crt;
1519         struct fb_info      *fbinfo_pnl;
1520         int                  ret;
1521
1522         /* allocate our framebuffers */
1523
1524         fbinfo_crt = framebuffer_alloc(sizeof(struct sm501fb_par), dev);
1525         if (fbinfo_crt == NULL) {
1526                 dev_err(dev, "cannot allocate crt framebuffer\n");
1527                 return -ENOMEM;
1528         }
1529
1530         fbinfo_pnl = framebuffer_alloc(sizeof(struct sm501fb_par), dev);
1531         if (fbinfo_pnl == NULL) {
1532                 dev_err(dev, "cannot allocate panel framebuffer\n");
1533                 ret = -ENOMEM;
1534                 goto fbinfo_crt_alloc_fail;
1535         }
1536
1537         info = sm501fb_info_alloc(fbinfo_crt, fbinfo_pnl);
1538         if (info == NULL) {
1539                 dev_err(dev, "cannot allocate par\n");
1540                 ret = -ENOMEM;
1541                 goto sm501fb_alloc_fail;
1542         }
1543
1544         if (dev->parent->platform_data) {
1545                 struct sm501_platdata *pd = dev->parent->platform_data;
1546                 info->pdata = pd->fb;
1547         }
1548
1549         if (info->pdata == NULL) {
1550                 dev_info(dev, "using default configuration data\n");
1551                 info->pdata = &sm501fb_def_pdata;
1552         }
1553
1554         /* start the framebuffers */
1555
1556         ret = sm501fb_start(info, pdev);
1557         if (ret) {
1558                 dev_err(dev, "cannot initialise SM501\n");
1559                 goto sm501fb_start_fail;
1560         }
1561
1562         /* CRT framebuffer setup */
1563
1564         ret = sm501fb_init_fb(fbinfo_crt, HEAD_CRT, driver_name_crt);
1565         if (ret) {
1566                 dev_err(dev, "cannot initialise CRT fb\n");
1567                 goto sm501fb_start_fail;
1568         }
1569
1570         /* Panel framebuffer setup */
1571
1572         ret = sm501fb_init_fb(fbinfo_pnl, HEAD_PANEL, driver_name_pnl);
1573         if (ret) {
1574                 dev_err(dev, "cannot initialise Panel fb\n");
1575                 goto sm501fb_start_fail;
1576         }
1577
1578         /* register framebuffers */
1579
1580         ret = register_framebuffer(fbinfo_crt);
1581         if (ret < 0) {
1582                 dev_err(dev, "failed to register CRT fb (%d)\n", ret);
1583                 goto register_crt_fail;
1584         }
1585
1586         ret = register_framebuffer(fbinfo_pnl);
1587         if (ret < 0) {
1588                 dev_err(dev, "failed to register panel fb (%d)\n", ret);
1589                 goto register_pnl_fail;
1590         }
1591
1592         dev_info(dev, "fb%d: %s frame buffer device\n",
1593                  fbinfo_crt->node, fbinfo_crt->fix.id);
1594
1595         dev_info(dev, "fb%d: %s frame buffer device\n",
1596                fbinfo_pnl->node, fbinfo_pnl->fix.id);
1597
1598         /* create device files */
1599
1600         ret = device_create_file(dev, &dev_attr_crt_src);
1601         if (ret)
1602                 goto crtsrc_fail;
1603
1604         ret = device_create_file(dev, &dev_attr_fbregs_pnl);
1605         if (ret)
1606                 goto fbregs_pnl_fail;
1607
1608         ret = device_create_file(dev, &dev_attr_fbregs_crt);
1609         if (ret)
1610                 goto fbregs_crt_fail;
1611
1612         /* we registered, return ok */
1613         return 0;
1614
1615  fbregs_crt_fail:
1616         device_remove_file(dev, &dev_attr_fbregs_pnl);
1617
1618  fbregs_pnl_fail:
1619         device_remove_file(dev, &dev_attr_crt_src);
1620
1621  crtsrc_fail:
1622         unregister_framebuffer(fbinfo_pnl);
1623
1624  register_pnl_fail:
1625         unregister_framebuffer(fbinfo_crt);
1626
1627  register_crt_fail:
1628         sm501fb_stop(info);
1629
1630  sm501fb_start_fail:
1631         sm501fb_info_release(info);
1632
1633  sm501fb_alloc_fail:
1634         framebuffer_release(fbinfo_pnl);
1635
1636  fbinfo_crt_alloc_fail:
1637         framebuffer_release(fbinfo_crt);
1638
1639         return ret;
1640 }
1641
1642
1643 /*
1644  *  Cleanup
1645  */
1646 static int sm501fb_remove(struct platform_device *pdev)
1647 {
1648         struct sm501fb_info *info = platform_get_drvdata(pdev);
1649         struct fb_info     *fbinfo_crt = info->fb[0];
1650         struct fb_info     *fbinfo_pnl = info->fb[1];
1651
1652         device_remove_file(&pdev->dev, &dev_attr_fbregs_crt);
1653         device_remove_file(&pdev->dev, &dev_attr_fbregs_pnl);
1654         device_remove_file(&pdev->dev, &dev_attr_crt_src);
1655
1656         unregister_framebuffer(fbinfo_crt);
1657         unregister_framebuffer(fbinfo_pnl);
1658
1659         sm501fb_stop(info);
1660         sm501fb_info_release(info);
1661
1662         framebuffer_release(fbinfo_pnl);
1663         framebuffer_release(fbinfo_crt);
1664
1665         return 0;
1666 }
1667
1668 #ifdef CONFIG_PM
1669
1670 static int sm501fb_suspend_fb(struct sm501fb_info *info,
1671                               enum sm501_controller head)
1672 {
1673         struct fb_info *fbi = info->fb[head];
1674         struct sm501fb_par *par = fbi->par;
1675
1676         if (par->screen.size == 0)
1677                 return 0;
1678
1679         /* backup copies in case chip is powered down over suspend */
1680
1681         par->store_fb = vmalloc(par->screen.size);
1682         if (par->store_fb == NULL) {
1683                 dev_err(info->dev, "no memory to store screen\n");
1684                 return -ENOMEM;
1685         }
1686
1687         par->store_cursor = vmalloc(par->cursor.size);
1688         if (par->store_cursor == NULL) {
1689                 dev_err(info->dev, "no memory to store cursor\n");
1690                 goto err_nocursor;
1691         }
1692
1693         dev_dbg(info->dev, "suspending screen to %p\n", par->store_fb);
1694         dev_dbg(info->dev, "suspending cursor to %p\n", par->store_cursor);
1695
1696         memcpy_fromio(par->store_fb, par->screen.k_addr, par->screen.size);
1697         memcpy_fromio(par->store_cursor, par->cursor.k_addr, par->cursor.size);
1698         /* blank the relevant interface to ensure unit power minimised */
1699         (par->ops.fb_blank)(FB_BLANK_POWERDOWN, fbi);
1700
1701         acquire_console_sem();
1702         fb_set_suspend(fbi, 1);
1703         release_console_sem();
1704
1705         return 0;
1706
1707  err_nocursor:
1708         vfree(par->store_fb);
1709         par->store_fb = NULL;
1710
1711         return -ENOMEM;
1712 }
1713
1714 static void sm501fb_resume_fb(struct sm501fb_info *info,
1715                               enum sm501_controller head)
1716 {
1717         struct fb_info *fbi = info->fb[head];
1718         struct sm501fb_par *par = fbi->par;
1719
1720         if (par->screen.size == 0)
1721                 return;
1722
1723         /* re-activate the configuration */
1724
1725         (par->ops.fb_set_par)(fbi);
1726
1727         /* restore the data */
1728
1729         dev_dbg(info->dev, "restoring screen from %p\n", par->store_fb);
1730         dev_dbg(info->dev, "restoring cursor from %p\n", par->store_cursor);
1731
1732         if (par->store_fb)
1733                 memcpy_toio(par->screen.k_addr, par->store_fb,
1734                             par->screen.size);
1735
1736         if (par->store_cursor)
1737                 memcpy_toio(par->cursor.k_addr, par->store_cursor,
1738                             par->cursor.size);
1739
1740         acquire_console_sem();
1741         fb_set_suspend(fbi, 0);
1742         release_console_sem();
1743
1744         vfree(par->store_fb);
1745         vfree(par->store_cursor);
1746 }
1747
1748
1749 /* suspend and resume support */
1750
1751 static int sm501fb_suspend(struct platform_device *pdev, pm_message_t state)
1752 {
1753         struct sm501fb_info *info = platform_get_drvdata(pdev);
1754
1755         /* store crt control to resume with */
1756         info->pm_crt_ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1757
1758         sm501fb_suspend_fb(info, HEAD_CRT);
1759         sm501fb_suspend_fb(info, HEAD_PANEL);
1760
1761         /* turn off the clocks, in case the device is not powered down */
1762         sm501_unit_power(info->dev->parent, SM501_GATE_DISPLAY, 0);
1763
1764         return 0;
1765 }
1766
1767 #define SM501_CRT_CTRL_SAVE (SM501_DC_CRT_CONTROL_TVP |        \
1768                              SM501_DC_CRT_CONTROL_SEL)
1769
1770
1771 static int sm501fb_resume(struct platform_device *pdev)
1772 {
1773         struct sm501fb_info *info = platform_get_drvdata(pdev);
1774         unsigned long crt_ctrl;
1775
1776         sm501_unit_power(info->dev->parent, SM501_GATE_DISPLAY, 1);
1777
1778         /* restore the items we want to be saved for crt control */
1779
1780         crt_ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1781         crt_ctrl &= ~SM501_CRT_CTRL_SAVE;
1782         crt_ctrl |= info->pm_crt_ctrl & SM501_CRT_CTRL_SAVE;
1783         writel(crt_ctrl, info->regs + SM501_DC_CRT_CONTROL);
1784
1785         sm501fb_resume_fb(info, HEAD_CRT);
1786         sm501fb_resume_fb(info, HEAD_PANEL);
1787
1788         return 0;
1789 }
1790
1791 #else
1792 #define sm501fb_suspend NULL
1793 #define sm501fb_resume  NULL
1794 #endif
1795
1796 static struct platform_driver sm501fb_driver = {
1797         .probe          = sm501fb_probe,
1798         .remove         = sm501fb_remove,
1799         .suspend        = sm501fb_suspend,
1800         .resume         = sm501fb_resume,
1801         .driver         = {
1802                 .name   = "sm501-fb",
1803                 .owner  = THIS_MODULE,
1804         },
1805 };
1806
1807 static int __devinit sm501fb_init(void)
1808 {
1809         return platform_driver_register(&sm501fb_driver);
1810 }
1811
1812 static void __exit sm501fb_cleanup(void)
1813 {
1814         platform_driver_unregister(&sm501fb_driver);
1815 }
1816
1817 module_init(sm501fb_init);
1818 module_exit(sm501fb_cleanup);
1819
1820 MODULE_AUTHOR("Ben Dooks, Vincent Sanders");
1821 MODULE_DESCRIPTION("SM501 Framebuffer driver");
1822 MODULE_LICENSE("GPL v2");