1 #ifndef _I386_PGTABLE_H
2 #define _I386_PGTABLE_H
4 #include <linux/config.h>
7 * The Linux memory management assumes a three-level page table setup. On
8 * the i386, we use that, but "fold" the mid level into the top-level page
9 * table, so that we physically have the same two-level page table as the
12 * This file contains the functions and defines necessary to modify and use
13 * the i386 page table tree.
16 #include <asm/processor.h>
17 #include <asm/fixmap.h>
18 #include <linux/threads.h>
20 #ifndef _I386_BITOPS_H
21 #include <asm/bitops.h>
24 #include <linux/slab.h>
25 #include <linux/list.h>
26 #include <linux/spinlock.h>
29 * ZERO_PAGE is a global shared page that is always zero: used
30 * for zero-mapped memory areas etc..
32 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
33 extern unsigned long empty_zero_page[1024];
34 extern pgd_t swapper_pg_dir[1024];
35 extern kmem_cache_t *pgd_cache;
36 extern kmem_cache_t *pmd_cache;
37 extern spinlock_t pgd_lock;
38 extern struct page *pgd_list;
40 void pmd_ctor(void *, kmem_cache_t *, unsigned long);
41 void pgd_ctor(void *, kmem_cache_t *, unsigned long);
42 void pgd_dtor(void *, kmem_cache_t *, unsigned long);
43 void pgtable_cache_init(void);
44 void paging_init(void);
47 * The Linux x86 paging architecture is 'compile-time dual-mode', it
48 * implements both the traditional 2-level x86 page tables and the
49 * newer 3-level PAE-mode page tables.
52 # include <asm/pgtable-3level-defs.h>
53 # define PMD_SIZE (1UL << PMD_SHIFT)
54 # define PMD_MASK (~(PMD_SIZE-1))
56 # include <asm/pgtable-2level-defs.h>
59 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
60 #define PGDIR_MASK (~(PGDIR_SIZE-1))
62 #define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE)
63 #define FIRST_USER_ADDRESS 0
65 #define USER_PGD_PTRS (PAGE_OFFSET >> PGDIR_SHIFT)
66 #define KERNEL_PGD_PTRS (PTRS_PER_PGD-USER_PGD_PTRS)
68 #define TWOLEVEL_PGDIR_SHIFT 22
69 #define BOOT_USER_PGD_PTRS (__PAGE_OFFSET >> TWOLEVEL_PGDIR_SHIFT)
70 #define BOOT_KERNEL_PGD_PTRS (1024-BOOT_USER_PGD_PTRS)
72 /* Just any arbitrary offset to the start of the vmalloc VM area: the
73 * current 8MB value just means that there will be a 8MB "hole" after the
74 * physical memory until the kernel virtual memory starts. That means that
75 * any out-of-bounds memory accesses will hopefully be caught.
76 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
77 * area for the same reason. ;)
79 #define VMALLOC_OFFSET (8*1024*1024)
80 #define VMALLOC_START (((unsigned long) high_memory + vmalloc_earlyreserve + \
81 2*VMALLOC_OFFSET-1) & ~(VMALLOC_OFFSET-1))
83 # define VMALLOC_END (PKMAP_BASE-2*PAGE_SIZE)
85 # define VMALLOC_END (FIXADDR_START-2*PAGE_SIZE)
89 * _PAGE_PSE set in the page directory entry just means that
90 * the page directory entry points directly to a 4MB-aligned block of
93 #define _PAGE_BIT_PRESENT 0
94 #define _PAGE_BIT_RW 1
95 #define _PAGE_BIT_USER 2
96 #define _PAGE_BIT_PWT 3
97 #define _PAGE_BIT_PCD 4
98 #define _PAGE_BIT_ACCESSED 5
99 #define _PAGE_BIT_DIRTY 6
100 #define _PAGE_BIT_PSE 7 /* 4 MB (or 2MB) page, Pentium+, if present.. */
101 #define _PAGE_BIT_GLOBAL 8 /* Global TLB entry PPro+ */
102 #define _PAGE_BIT_UNUSED1 9 /* available for programmer */
103 #define _PAGE_BIT_UNUSED2 10
104 #define _PAGE_BIT_UNUSED3 11
105 #define _PAGE_BIT_NX 63
107 #define _PAGE_PRESENT 0x001
108 #define _PAGE_RW 0x002
109 #define _PAGE_USER 0x004
110 #define _PAGE_PWT 0x008
111 #define _PAGE_PCD 0x010
112 #define _PAGE_ACCESSED 0x020
113 #define _PAGE_DIRTY 0x040
114 #define _PAGE_PSE 0x080 /* 4 MB (or 2MB) page, Pentium+, if present.. */
115 #define _PAGE_GLOBAL 0x100 /* Global TLB entry PPro+ */
116 #define _PAGE_UNUSED1 0x200 /* available for programmer */
117 #define _PAGE_UNUSED2 0x400
118 #define _PAGE_UNUSED3 0x800
120 /* If _PAGE_PRESENT is clear, we use these: */
121 #define _PAGE_FILE 0x040 /* nonlinear file mapping, saved PTE; unset:swap */
122 #define _PAGE_PROTNONE 0x080 /* if the user mapped it with PROT_NONE;
123 pte_present gives true */
124 #ifdef CONFIG_X86_PAE
125 #define _PAGE_NX (1ULL<<_PAGE_BIT_NX)
130 #define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED | _PAGE_DIRTY)
131 #define _KERNPG_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | _PAGE_DIRTY)
132 #define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
135 __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
136 #define PAGE_SHARED \
137 __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED)
139 #define PAGE_SHARED_EXEC \
140 __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED)
141 #define PAGE_COPY_NOEXEC \
142 __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_NX)
143 #define PAGE_COPY_EXEC \
144 __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
147 #define PAGE_READONLY \
148 __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_NX)
149 #define PAGE_READONLY_EXEC \
150 __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
152 #define _PAGE_KERNEL \
153 (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_NX)
154 #define _PAGE_KERNEL_EXEC \
155 (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED)
157 extern unsigned long long __PAGE_KERNEL, __PAGE_KERNEL_EXEC;
158 #define __PAGE_KERNEL_RO (__PAGE_KERNEL & ~_PAGE_RW)
159 #define __PAGE_KERNEL_NOCACHE (__PAGE_KERNEL | _PAGE_PCD)
160 #define __PAGE_KERNEL_LARGE (__PAGE_KERNEL | _PAGE_PSE)
161 #define __PAGE_KERNEL_LARGE_EXEC (__PAGE_KERNEL_EXEC | _PAGE_PSE)
163 #define PAGE_KERNEL __pgprot(__PAGE_KERNEL)
164 #define PAGE_KERNEL_RO __pgprot(__PAGE_KERNEL_RO)
165 #define PAGE_KERNEL_EXEC __pgprot(__PAGE_KERNEL_EXEC)
166 #define PAGE_KERNEL_NOCACHE __pgprot(__PAGE_KERNEL_NOCACHE)
167 #define PAGE_KERNEL_LARGE __pgprot(__PAGE_KERNEL_LARGE)
168 #define PAGE_KERNEL_LARGE_EXEC __pgprot(__PAGE_KERNEL_LARGE_EXEC)
171 * The i386 can't do page protection for execute, and considers that
172 * the same are read. Also, write permissions imply read permissions.
173 * This is the closest we can get..
175 #define __P000 PAGE_NONE
176 #define __P001 PAGE_READONLY
177 #define __P010 PAGE_COPY
178 #define __P011 PAGE_COPY
179 #define __P100 PAGE_READONLY_EXEC
180 #define __P101 PAGE_READONLY_EXEC
181 #define __P110 PAGE_COPY_EXEC
182 #define __P111 PAGE_COPY_EXEC
184 #define __S000 PAGE_NONE
185 #define __S001 PAGE_READONLY
186 #define __S010 PAGE_SHARED
187 #define __S011 PAGE_SHARED
188 #define __S100 PAGE_READONLY_EXEC
189 #define __S101 PAGE_READONLY_EXEC
190 #define __S110 PAGE_SHARED_EXEC
191 #define __S111 PAGE_SHARED_EXEC
194 * Define this if things work differently on an i386 and an i486:
195 * it will (on an i486) warn about kernel memory accesses that are
196 * done without a 'access_ok(VERIFY_WRITE,..)'
198 #undef TEST_ACCESS_OK
200 /* The boot page tables (all created as a single array) */
201 extern unsigned long pg0[];
203 #define pte_present(x) ((x).pte_low & (_PAGE_PRESENT | _PAGE_PROTNONE))
204 #define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0)
206 /* To avoid harmful races, pmd_none(x) should check only the lower when PAE */
207 #define pmd_none(x) (!(unsigned long)pmd_val(x))
208 #define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT)
209 #define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0)
210 #define pmd_bad(x) ((pmd_val(x) & (~PAGE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE)
213 #define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))
216 * The following only work if pte_present() is true.
217 * Undefined behaviour if not..
219 #define __LARGE_PTE (_PAGE_PSE | _PAGE_PRESENT)
220 static inline int pte_user(pte_t pte) { return (pte).pte_low & _PAGE_USER; }
221 static inline int pte_read(pte_t pte) { return (pte).pte_low & _PAGE_USER; }
222 static inline int pte_dirty(pte_t pte) { return (pte).pte_low & _PAGE_DIRTY; }
223 static inline int pte_young(pte_t pte) { return (pte).pte_low & _PAGE_ACCESSED; }
224 static inline int pte_write(pte_t pte) { return (pte).pte_low & _PAGE_RW; }
225 static inline int pte_huge(pte_t pte) { return ((pte).pte_low & __LARGE_PTE) == __LARGE_PTE; }
228 * The following only works if pte_present() is not true.
230 static inline int pte_file(pte_t pte) { return (pte).pte_low & _PAGE_FILE; }
232 static inline pte_t pte_rdprotect(pte_t pte) { (pte).pte_low &= ~_PAGE_USER; return pte; }
233 static inline pte_t pte_exprotect(pte_t pte) { (pte).pte_low &= ~_PAGE_USER; return pte; }
234 static inline pte_t pte_mkclean(pte_t pte) { (pte).pte_low &= ~_PAGE_DIRTY; return pte; }
235 static inline pte_t pte_mkold(pte_t pte) { (pte).pte_low &= ~_PAGE_ACCESSED; return pte; }
236 static inline pte_t pte_wrprotect(pte_t pte) { (pte).pte_low &= ~_PAGE_RW; return pte; }
237 static inline pte_t pte_mkread(pte_t pte) { (pte).pte_low |= _PAGE_USER; return pte; }
238 static inline pte_t pte_mkexec(pte_t pte) { (pte).pte_low |= _PAGE_USER; return pte; }
239 static inline pte_t pte_mkdirty(pte_t pte) { (pte).pte_low |= _PAGE_DIRTY; return pte; }
240 static inline pte_t pte_mkyoung(pte_t pte) { (pte).pte_low |= _PAGE_ACCESSED; return pte; }
241 static inline pte_t pte_mkwrite(pte_t pte) { (pte).pte_low |= _PAGE_RW; return pte; }
242 static inline pte_t pte_mkhuge(pte_t pte) { (pte).pte_low |= __LARGE_PTE; return pte; }
244 #ifdef CONFIG_X86_PAE
245 # include <asm/pgtable-3level.h>
247 # include <asm/pgtable-2level.h>
250 static inline int ptep_test_and_clear_dirty(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
252 if (!pte_dirty(*ptep))
254 return test_and_clear_bit(_PAGE_BIT_DIRTY, &ptep->pte_low);
257 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
259 if (!pte_young(*ptep))
261 return test_and_clear_bit(_PAGE_BIT_ACCESSED, &ptep->pte_low);
264 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, unsigned long addr, pte_t *ptep, int full)
271 pte = ptep_get_and_clear(mm, addr, ptep);
276 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
278 clear_bit(_PAGE_BIT_RW, &ptep->pte_low);
282 * clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
284 * dst - pointer to pgd range anwhere on a pgd page
286 * count - the number of pgds to copy.
288 * dst and src can be on the same page, but the range must not overlap,
289 * and must not cross a page boundary.
291 static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
293 memcpy(dst, src, count * sizeof(pgd_t));
297 * Macro to mark a page protection value as "uncacheable". On processors which do not support
298 * it, this is a no-op.
300 #define pgprot_noncached(prot) ((boot_cpu_data.x86 > 3) \
301 ? (__pgprot(pgprot_val(prot) | _PAGE_PCD | _PAGE_PWT)) : (prot))
304 * Conversion functions: convert a page and protection to a page entry,
305 * and a page entry and page directory to the page they refer to.
308 #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
310 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
312 pte.pte_low &= _PAGE_CHG_MASK;
313 pte.pte_low |= pgprot_val(newprot);
314 #ifdef CONFIG_X86_PAE
316 * Chop off the NX bit (if present), and add the NX portion of
317 * the newprot (if present):
319 pte.pte_high &= ~(1 << (_PAGE_BIT_NX - 32));
320 pte.pte_high |= (pgprot_val(newprot) >> 32) & \
321 (__supported_pte_mask >> 32);
326 #define pmd_large(pmd) \
327 ((pmd_val(pmd) & (_PAGE_PSE|_PAGE_PRESENT)) == (_PAGE_PSE|_PAGE_PRESENT))
330 * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
332 * this macro returns the index of the entry in the pgd page which would
333 * control the given virtual address
335 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
336 #define pgd_index_k(addr) pgd_index(addr)
339 * pgd_offset() returns a (pgd_t *)
340 * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
342 #define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address))
345 * a shortcut which implies the use of the kernel's pgd, instead
348 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
351 * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
353 * this macro returns the index of the entry in the pmd page which would
354 * control the given virtual address
356 #define pmd_index(address) \
357 (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
360 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
362 * this macro returns the index of the entry in the pte page which would
363 * control the given virtual address
365 #define pte_index(address) \
366 (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
367 #define pte_offset_kernel(dir, address) \
368 ((pte_t *) pmd_page_kernel(*(dir)) + pte_index(address))
370 #define pmd_page(pmd) (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT))
372 #define pmd_page_kernel(pmd) \
373 ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
376 * Helper function that returns the kernel pagetable entry controlling
377 * the virtual address 'address'. NULL means no pagetable entry present.
378 * NOTE: the return type is pte_t but if the pmd is PSE then we return it
381 extern pte_t *lookup_address(unsigned long address);
384 * Make a given kernel text page executable/non-executable.
385 * Returns the previous executability setting of that page (which
386 * is used to restore the previous state). Used by the SMP bootup code.
387 * NOTE: this is an __init function for security reasons.
389 #ifdef CONFIG_X86_PAE
390 extern int set_kernel_exec(unsigned long vaddr, int enable);
392 static inline int set_kernel_exec(unsigned long vaddr, int enable) { return 0;}
395 extern void noexec_setup(const char *str);
397 #if defined(CONFIG_HIGHPTE)
398 #define pte_offset_map(dir, address) \
399 ((pte_t *)kmap_atomic(pmd_page(*(dir)),KM_PTE0) + pte_index(address))
400 #define pte_offset_map_nested(dir, address) \
401 ((pte_t *)kmap_atomic(pmd_page(*(dir)),KM_PTE1) + pte_index(address))
402 #define pte_unmap(pte) kunmap_atomic(pte, KM_PTE0)
403 #define pte_unmap_nested(pte) kunmap_atomic(pte, KM_PTE1)
405 #define pte_offset_map(dir, address) \
406 ((pte_t *)page_address(pmd_page(*(dir))) + pte_index(address))
407 #define pte_offset_map_nested(dir, address) pte_offset_map(dir, address)
408 #define pte_unmap(pte) do { } while (0)
409 #define pte_unmap_nested(pte) do { } while (0)
413 * The i386 doesn't have any external MMU info: the kernel page
414 * tables contain all the necessary information.
416 * Also, we only update the dirty/accessed state if we set
417 * the dirty bit by hand in the kernel, since the hardware
418 * will do the accessed bit for us, and we don't want to
419 * race with other CPU's that might be updating the dirty
420 * bit at the same time.
422 #define update_mmu_cache(vma,address,pte) do { } while (0)
423 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
424 #define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
427 (__ptep)->pte_low = (__entry).pte_low; \
428 flush_tlb_page(__vma, __address); \
432 #endif /* !__ASSEMBLY__ */
434 #ifdef CONFIG_FLATMEM
435 #define kern_addr_valid(addr) (1)
436 #endif /* CONFIG_FLATMEM */
438 #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
439 remap_pfn_range(vma, vaddr, pfn, size, prot)
441 #define MK_IOSPACE_PFN(space, pfn) (pfn)
442 #define GET_IOSPACE(pfn) 0
443 #define GET_PFN(pfn) (pfn)
445 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
446 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
447 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
448 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
449 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
450 #define __HAVE_ARCH_PTE_SAME
451 #include <asm-generic/pgtable.h>
453 #endif /* _I386_PGTABLE_H */