2 * Author: MontaVista Software, Inc.
5 * Copyright 2001-2002 MontaVista Software Inc.
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
12 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
13 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
14 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
15 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
16 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
17 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
18 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
19 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
20 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
21 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 * You should have received a copy of the GNU General Public License along
24 * with this program; if not, write to the Free Software Foundation, Inc.,
25 * 675 Mass Ave, Cambridge, MA 02139, USA.
27 #ifndef __ASM_TXX9_RBTX4927_H
28 #define __ASM_TXX9_RBTX4927_H
30 #include <asm/txx9/tx4927.h>
32 #define RBTX4927_PCIMEM 0x08000000
33 #define RBTX4927_PCIMEM_SIZE 0x08000000
34 #define RBTX4927_PCIIO 0x16000000
35 #define RBTX4927_PCIIO_SIZE 0x01000000
37 #define RBTX4927_IMASK_ADDR (IO_BASE + TXX9_CE(2) + 0x00002000)
38 #define RBTX4927_IMSTAT_ADDR (IO_BASE + TXX9_CE(2) + 0x00002006)
39 #define RBTX4927_SOFTRESET_ADDR (IO_BASE + TXX9_CE(2) + 0x0000f000)
40 #define RBTX4927_SOFTRESETLOCK_ADDR (IO_BASE + TXX9_CE(2) + 0x0000f002)
41 #define RBTX4927_PCIRESET_ADDR (IO_BASE + TXX9_CE(2) + 0x0000f006)
42 #define RBTX4927_BRAMRTC_BASE (IO_BASE + TXX9_CE(2) + 0x00010000)
43 #define RBTX4927_ETHER_BASE (IO_BASE + TXX9_CE(2) + 0x00020000)
45 /* Ethernet port address */
46 #define RBTX4927_ETHER_ADDR (RBTX4927_ETHER_BASE + 0x280)
48 #define rbtx4927_imask_addr ((__u8 __iomem *)RBTX4927_IMASK_ADDR)
49 #define rbtx4927_imstat_addr ((__u8 __iomem *)RBTX4927_IMSTAT_ADDR)
50 #define rbtx4927_softreset_addr ((__u8 __iomem *)RBTX4927_SOFTRESET_ADDR)
51 #define rbtx4927_softresetlock_addr \
52 ((__u8 __iomem *)RBTX4927_SOFTRESETLOCK_ADDR)
53 #define rbtx4927_pcireset_addr ((__u8 __iomem *)RBTX4927_PCIRESET_ADDR)
55 /* bits for ISTAT/IMASK/IMSTAT */
56 #define RBTX4927_INTB_PCID 0
57 #define RBTX4927_INTB_PCIC 1
58 #define RBTX4927_INTB_PCIB 2
59 #define RBTX4927_INTB_PCIA 3
60 #define RBTX4927_INTF_PCID (1 << RBTX4927_INTB_PCID)
61 #define RBTX4927_INTF_PCIC (1 << RBTX4927_INTB_PCIC)
62 #define RBTX4927_INTF_PCIB (1 << RBTX4927_INTB_PCIB)
63 #define RBTX4927_INTF_PCIA (1 << RBTX4927_INTB_PCIA)
65 #define RBTX4927_NR_IRQ_IOC 8 /* IOC */
67 #define RBTX4927_IRQ_IOC (TXX9_IRQ_BASE + TX4927_NUM_IR)
68 #define RBTX4927_IRQ_IOC_PCID (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCID)
69 #define RBTX4927_IRQ_IOC_PCIC (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCIC)
70 #define RBTX4927_IRQ_IOC_PCIB (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCIB)
71 #define RBTX4927_IRQ_IOC_PCIA (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCIA)
73 #define RBTX4927_IRQ_IOCINT (TXX9_IRQ_BASE + TX4927_IR_INT(1))
76 #define RBTX4927_ISA_IO_OFFSET RBTX4927_PCIIO
78 #define RBTX4927_ISA_IO_OFFSET 0
81 #define RBTX4927_RTL_8019_BASE (RBTX4927_ETHER_ADDR - mips_io_port_base)
82 #define RBTX4927_RTL_8019_IRQ (TXX9_IRQ_BASE + TX4927_IR_INT(3))
84 void rbtx4927_prom_init(void);
85 void rbtx4927_irq_setup(void);
87 int rbtx4927_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
89 #endif /* __ASM_TXX9_RBTX4927_H */