2 * include/asm-sh/processor.h
4 * Copyright (C) 1999, 2000 Niibe Yutaka
5 * Copyright (C) 2002, 2003 Paul Mundt
8 #ifndef __ASM_SH_PROCESSOR_H
9 #define __ASM_SH_PROCESSOR_H
12 #include <linux/compiler.h>
14 #include <asm/types.h>
15 #include <asm/cache.h>
16 #include <asm/ptrace.h>
19 * Default implementation of macro that returns current
20 * instruction pointer ("program counter").
22 #define current_text_addr() ({ void *pc; __asm__("mova 1f, %0\n1:":"=z" (pc)); pc; })
24 /* Core Processor Version Register */
25 #define CCN_PVR 0xff000030
26 #define CCN_CVR 0xff000040
27 #define CCN_PRR 0xff000044
30 * CPU type and hardware bug flags. Kept separately for each CPU.
32 * Each one of these also needs a CONFIG_CPU_SUBTYPE_xxx entry
33 * in arch/sh/mm/Kconfig, as well as an entry in arch/sh/kernel/setup.c
34 * for parsing the subtype in get_cpu_subtype().
41 CPU_SH7705, CPU_SH7706, CPU_SH7707,
42 CPU_SH7708, CPU_SH7708S, CPU_SH7708R,
43 CPU_SH7709, CPU_SH7709A, CPU_SH7710,
44 CPU_SH7729, CPU_SH7300,
47 CPU_SH7750, CPU_SH7750S, CPU_SH7750R, CPU_SH7751, CPU_SH7751R,
48 CPU_SH7760, CPU_ST40RA, CPU_ST40GX1, CPU_SH4_202, CPU_SH4_501,
49 CPU_SH73180, CPU_SH7343, CPU_SH7770, CPU_SH7780, CPU_SH7781,
57 unsigned long loops_per_jiffy;
59 struct cache_info icache;
60 struct cache_info dcache;
65 extern struct sh_cpuinfo boot_cpu_data;
68 extern struct sh_cpuinfo cpu_data[];
69 #define current_cpu_data cpu_data[smp_processor_id()]
71 #define cpu_data (&boot_cpu_data)
72 #define current_cpu_data boot_cpu_data
76 * User space process size: 2GB.
78 * Since SH7709 and SH7750 have "area 7", we can't use 0x7c000000--0x7fffffff
80 #define TASK_SIZE 0x7c000000UL
82 /* This decides where the kernel will search for a free chunk of vm
83 * space during mmap's.
85 #define TASK_UNMAPPED_BASE (TASK_SIZE / 3)
91 * When it's set, it means the processor doesn't have right to use FPU,
92 * and it results exception when the floating operation is executed.
95 * Interrupt level mask
97 #define SR_FD 0x00008000
98 #define SR_DSP 0x00001000
99 #define SR_IMASK 0x000000f0
102 * FPU structure and data
105 struct sh_fpu_hard_struct {
106 unsigned long fp_regs[16];
107 unsigned long xfp_regs[16];
111 long status; /* software status information */
114 /* Dummy fpu emulator */
115 struct sh_fpu_soft_struct {
116 unsigned long fp_regs[16];
117 unsigned long xfp_regs[16];
121 unsigned char lookahead;
122 unsigned long entry_pc;
126 struct sh_fpu_hard_struct hard;
127 struct sh_fpu_soft_struct soft;
134 #define CPU_HAS_FPU 0x0001 /* Hardware FPU support */
135 #define CPU_HAS_P2_FLUSH_BUG 0x0002 /* Need to flush the cache in P2 area */
136 #define CPU_HAS_MMU_PAGE_ASSOC 0x0004 /* SH3: TLB way selection bit support */
137 #define CPU_HAS_DSP 0x0008 /* SH-DSP: DSP support */
138 #define CPU_HAS_PERF_COUNTER 0x0010 /* Hardware performance counters */
139 #define CPU_HAS_PTEA 0x0020 /* PTEA register */
141 struct thread_struct {
145 unsigned long trap_no, error_code;
146 unsigned long address;
147 /* Hardware debugging registers may come here */
148 unsigned long ubc_pc;
150 /* floating point info */
151 union sh_fpu_union fpu;
158 /* Count of active tasks with UBC settings */
159 extern int ubc_usercnt;
161 #define INIT_THREAD { \
162 sizeof(init_stack) + (long) &init_stack, /* sp */ \
167 {{{0,}},} /* fpu state */ \
171 * Do necessary setup to start up a newly executed thread.
173 #define start_thread(regs, new_pc, new_sp) \
176 regs->sr = SR_FD; /* User mode. */ \
178 regs->regs[15] = new_sp
180 /* Forward declaration, a strange C thing */
184 /* Free all resources held by a thread. */
185 extern void release_thread(struct task_struct *);
187 /* Prepare to copy thread state - unlazy all lazy status */
188 #define prepare_to_copy(tsk) do { } while (0)
191 * create a kernel thread without removing it from tasklists
193 extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
195 /* Copy and release all segment info associated with a VM */
196 #define copy_segments(p, mm) do { } while(0)
197 #define release_segments(mm) do { } while(0)
200 * FPU lazy state save handling.
203 static __inline__ void disable_fpu(void)
205 unsigned long __dummy;
207 /* Set FD flag in SR */
208 __asm__ __volatile__("stc sr, %0\n\t"
215 static __inline__ void enable_fpu(void)
217 unsigned long __dummy;
219 /* Clear out FD flag in SR */
220 __asm__ __volatile__("stc sr, %0\n\t"
227 static __inline__ void release_fpu(struct pt_regs *regs)
232 static __inline__ void grab_fpu(struct pt_regs *regs)
237 #ifdef CONFIG_CPU_SH4
238 extern void save_fpu(struct task_struct *__tsk, struct pt_regs *regs);
240 #define save_fpu(tsk) do { } while (0)
243 #define unlazy_fpu(tsk, regs) do { \
244 if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \
245 save_fpu(tsk, regs); \
249 #define clear_fpu(tsk, regs) do { \
250 if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \
251 clear_tsk_thread_flag(tsk, TIF_USEDFPU); \
256 /* Double presision, NANS as NANS, rounding to nearest, no exceptions */
257 #define FPSCR_INIT 0x00080000
259 #define FPSCR_CAUSE_MASK 0x0001f000 /* Cause bits */
260 #define FPSCR_FLAG_MASK 0x0000007c /* Flag bits */
263 * Return saved PC of a blocked thread.
265 #define thread_saved_pc(tsk) (tsk->thread.pc)
267 extern unsigned long get_wchan(struct task_struct *p);
269 #define KSTK_EIP(tsk) ((tsk)->thread.pc)
270 #define KSTK_ESP(tsk) ((tsk)->thread.sp)
272 #define cpu_sleep() __asm__ __volatile__ ("sleep" : : : "memory")
273 #define cpu_relax() barrier()
275 #if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH3) || \
276 defined(CONFIG_CPU_SH4)
277 #define PREFETCH_STRIDE L1_CACHE_BYTES
278 #define ARCH_HAS_PREFETCH
279 #define ARCH_HAS_PREFETCHW
280 static inline void prefetch(void *x)
282 __asm__ __volatile__ ("pref @%0\n\t" : : "r" (x) : "memory");
285 #define prefetchw(x) prefetch(x)
288 #endif /* __KERNEL__ */
289 #endif /* __ASM_SH_PROCESSOR_H */