1 #ifndef _ASM_X86_APIC_H
2 #define _ASM_X86_APIC_H
5 #include <linux/delay.h>
6 #include <asm/fixmap.h>
7 #include <asm/apicdef.h>
8 #include <asm/processor.h>
9 #include <asm/system.h>
10 #include <asm/cpufeature.h>
13 #define ARCH_APICTIMER_STOPS_ON_C3 1
21 #define APIC_VERBOSE 1
25 * Define the default level of output to be very little
26 * This can be turned up by using apic=verbose for more
27 * information and apic=debug for _lots_ of information.
28 * apic_verbosity is defined in apic.c
30 #define apic_printk(v, s, a...) do { \
31 if ((v) <= apic_verbosity) \
36 extern void generic_apic_probe(void);
38 #ifdef CONFIG_X86_LOCAL_APIC
40 extern int apic_verbosity;
41 extern int local_apic_timer_c2_ok;
43 extern int ioapic_force;
45 extern int disable_apic;
47 * Basic functions accessing APICs.
49 #ifdef CONFIG_PARAVIRT
50 #include <asm/paravirt.h>
52 #define setup_boot_clock setup_boot_APIC_clock
53 #define setup_secondary_clock setup_secondary_APIC_clock
56 extern int is_vsmp_box(void);
58 static inline void native_apic_mem_write(u32 reg, u32 v)
60 *((volatile u32 *)(APIC_BASE + reg)) = v;
63 static inline void native_apic_mem_write_atomic(u32 reg, u32 v)
65 (void)xchg((u32 *)(APIC_BASE + reg), v);
68 static inline u32 native_apic_mem_read(u32 reg)
70 return *((volatile u32 *)(APIC_BASE + reg));
73 static inline void native_apic_msr_write(u32 reg, u32 v)
75 if (reg == APIC_DFR || reg == APIC_ID || reg == APIC_LDR ||
79 wrmsr(APIC_BASE_MSR + (reg >> 4), v, 0);
82 static inline u32 native_apic_msr_read(u32 reg)
89 rdmsr(APIC_BASE_MSR + (reg >> 4), low, high);
94 extern int x2apic, x2apic_preenabled;
95 extern void check_x2apic(void);
96 extern void enable_x2apic(void);
97 extern void enable_IR_x2apic(void);
98 extern void x2apic_icr_write(u32 low, u32 id);
102 u32 (*read)(u32 reg);
103 void (*write)(u32 reg, u32 v);
104 void (*write_atomic)(u32 reg, u32 v);
105 u64 (*icr_read)(void);
106 void (*icr_write)(u32 low, u32 high);
107 void (*wait_icr_idle)(void);
108 u32 (*safe_wait_icr_idle)(void);
111 extern struct apic_ops *apic_ops;
113 #define apic_read (apic_ops->read)
114 #define apic_write (apic_ops->write)
115 #define apic_write_atomic (apic_ops->write_atomic)
116 #define apic_icr_read (apic_ops->icr_read)
117 #define apic_icr_write (apic_ops->icr_write)
118 #define apic_wait_icr_idle (apic_ops->wait_icr_idle)
119 #define safe_apic_wait_icr_idle (apic_ops->safe_wait_icr_idle)
121 extern int get_physical_broadcast(void);
123 #ifdef CONFIG_X86_GOOD_APIC
124 # define FORCE_READ_AROUND_WRITE 0
125 # define apic_read_around(x)
126 # define apic_write_around(x, y) apic_write((x), (y))
128 # define FORCE_READ_AROUND_WRITE 1
129 # define apic_read_around(x) apic_read(x)
130 # define apic_write_around(x, y) apic_write_atomic((x), (y))
134 static inline void ack_x2APIC_irq(void)
136 /* Docs say use 0 for future compatibility */
137 native_apic_msr_write(APIC_EOI, 0);
142 static inline void ack_APIC_irq(void)
145 * ack_APIC_irq() actually gets compiled as a single instruction:
146 * - a single rmw on Pentium/82489DX
147 * - a single write on P6+ cores (CONFIG_X86_GOOD_APIC)
151 /* Docs say use 0 for future compatibility */
153 apic_write_around(APIC_EOI, 0);
155 native_apic_mem_write(APIC_EOI, 0);
159 extern int lapic_get_maxlvt(void);
160 extern void clear_local_APIC(void);
161 extern void connect_bsp_APIC(void);
162 extern void disconnect_bsp_APIC(int virt_wire_setup);
163 extern void disable_local_APIC(void);
164 extern void lapic_shutdown(void);
165 extern int verify_local_APIC(void);
166 extern void cache_APIC_registers(void);
167 extern void sync_Arb_IDs(void);
168 extern void init_bsp_APIC(void);
169 extern void setup_local_APIC(void);
170 extern void end_local_APIC_setup(void);
171 extern void init_apic_mappings(void);
172 extern void setup_boot_APIC_clock(void);
173 extern void setup_secondary_APIC_clock(void);
174 extern int APIC_init_uniprocessor(void);
175 extern void enable_NMI_through_LVT0(void);
178 * On 32bit this is mach-xxx local
181 extern void early_init_lapic_mapping(void);
182 extern int apic_is_clustered_box(void);
184 static inline int apic_is_clustered_box(void)
190 extern u8 setup_APIC_eilvt_mce(u8 vector, u8 msg_type, u8 mask);
191 extern u8 setup_APIC_eilvt_ibs(u8 vector, u8 msg_type, u8 mask);
194 #else /* !CONFIG_X86_LOCAL_APIC */
195 static inline void lapic_shutdown(void) { }
196 #define local_apic_timer_c2_ok 1
197 static inline void init_apic_mappings(void) { }
199 #endif /* !CONFIG_X86_LOCAL_APIC */
201 #endif /* __ASM_APIC_H */