1 #ifndef __ASM_X86_MSR_H_
2 #define __ASM_X86_MSR_H_
4 #include <asm/msr-index.h>
7 # include <linux/types.h>
15 #include <asm/errno.h>
17 static inline unsigned long long native_read_msr(unsigned int msr)
19 unsigned long long val;
21 asm volatile("rdmsr" : "=A" (val) : "c" (msr));
25 static inline unsigned long long native_read_msr_safe(unsigned int msr,
28 unsigned long long val;
30 asm volatile("2: rdmsr ; xorl %0,%0\n"
32 ".section .fixup,\"ax\"\n\t"
33 "3: movl %3,%0 ; jmp 1b\n\t"
35 ".section __ex_table,\"a\"\n"
39 : "=r" (*err), "=A" (val)
40 : "c" (msr), "i" (-EFAULT));
45 static inline void native_write_msr(unsigned int msr, unsigned long long val)
47 asm volatile("wrmsr" : : "c" (msr), "A"(val));
50 static inline int native_write_msr_safe(unsigned int msr,
51 unsigned long long val)
54 asm volatile("2: wrmsr ; xorl %0,%0\n"
56 ".section .fixup,\"ax\"\n\t"
57 "3: movl %4,%0 ; jmp 1b\n\t"
59 ".section __ex_table,\"a\"\n"
64 : "c" (msr), "0" ((u32)val), "d" ((u32)(val>>32)),
69 static inline unsigned long long native_read_tsc(void)
71 unsigned long long val;
72 asm volatile("rdtsc" : "=A" (val));
76 static inline unsigned long long native_read_pmc(void)
78 unsigned long long val;
79 asm volatile("rdpmc" : "=A" (val));
83 #ifdef CONFIG_PARAVIRT
84 #include <asm/paravirt.h>
86 #include <linux/errno.h>
88 * Access to machine-specific registers (available on 586 and better only)
89 * Note: the rd* operations modify the parameters directly (without using
90 * pointer indirection), this allows gcc to optimize better
93 #define rdmsr(msr,val1,val2) \
95 u64 __val = native_read_msr(msr); \
96 (val1) = (u32)__val; \
97 (val2) = (u32)(__val >> 32); \
100 static inline void wrmsr(u32 __msr, u32 __low, u32 __high)
102 native_write_msr(__msr, ((u64)__high << 32) | __low);
105 #define rdmsrl(msr,val) \
106 ((val) = native_read_msr(msr))
108 #define wrmsrl(msr,val) native_write_msr(msr, val)
110 /* wrmsr with exception handling */
111 static inline int wrmsr_safe(u32 __msr, u32 __low, u32 __high)
113 return native_write_msr_safe(__msr, ((u64)__high << 32) | __low);
116 /* rdmsr with exception handling */
117 #define rdmsr_safe(msr,p1,p2) \
120 u64 __val = native_read_msr_safe(msr, &__err); \
121 (*p1) = (u32)__val; \
122 (*p2) = (u32)(__val >> 32); \
126 #define rdtscl(low) \
127 ((low) = (u32)native_read_tsc())
129 #define rdtscll(val) \
130 ((val) = native_read_tsc())
132 #define write_tsc(val1,val2) wrmsr(0x10, val1, val2)
134 #define rdpmc(counter,low,high) \
136 u64 _l = native_read_pmc(); \
138 (high) = (u32)(_l >> 32); \
140 #endif /* !CONFIG_PARAVIRT */
142 #endif /* ! __ASSEMBLY__ */
143 #endif /* __KERNEL__ */
148 #include <linux/errno.h>
150 * Access to machine-specific registers (available on 586 and better only)
151 * Note: the rd* operations modify the parameters directly (without using
152 * pointer indirection), this allows gcc to optimize better
155 #define rdmsr(msr,val1,val2) \
156 __asm__ __volatile__("rdmsr" \
157 : "=a" (val1), "=d" (val2) \
161 #define rdmsrl(msr,val) do { unsigned long a__,b__; \
162 __asm__ __volatile__("rdmsr" \
163 : "=a" (a__), "=d" (b__) \
165 val = a__ | (b__<<32); \
168 #define wrmsr(msr,val1,val2) \
169 __asm__ __volatile__("wrmsr" \
171 : "c" (msr), "a" (val1), "d" (val2))
173 #define wrmsrl(msr,val) wrmsr(msr,(__u32)((__u64)(val)),((__u64)(val))>>32)
175 #define rdtsc(low,high) \
176 __asm__ __volatile__("rdtsc" : "=a" (low), "=d" (high))
178 #define rdtscl(low) \
179 __asm__ __volatile__ ("rdtsc" : "=a" (low) : : "edx")
181 #define rdtscp(low,high,aux) \
182 __asm__ __volatile__ (".byte 0x0f,0x01,0xf9" : "=a" (low), "=d" (high), "=c" (aux))
184 #define rdtscll(val) do { \
185 unsigned int __a,__d; \
186 __asm__ __volatile__("rdtsc" : "=a" (__a), "=d" (__d)); \
187 (val) = ((unsigned long)__a) | (((unsigned long)__d)<<32); \
190 #define rdtscpll(val, aux) do { \
191 unsigned long __a, __d; \
192 __asm__ __volatile__ (".byte 0x0f,0x01,0xf9" : "=a" (__a), "=d" (__d), "=c" (aux)); \
193 (val) = (__d << 32) | __a; \
196 #define write_tsc(val1,val2) wrmsr(0x10, val1, val2)
198 #define write_rdtscp_aux(val) wrmsr(0xc0000103, val, 0)
200 #define rdpmc(counter,low,high) \
201 __asm__ __volatile__("rdpmc" \
202 : "=a" (low), "=d" (high) \
208 /* wrmsr with exception handling */
209 #define wrmsr_safe(msr,a,b) ({ int ret__; \
210 asm volatile("2: wrmsr ; xorl %0,%0\n" \
212 ".section .fixup,\"ax\"\n\t" \
213 "3: movl %4,%0 ; jmp 1b\n\t" \
215 ".section __ex_table,\"a\"\n" \
220 : "c" (msr), "0" (a), "d" (b), "i" (-EFAULT)); \
223 #define checking_wrmsrl(msr,val) wrmsr_safe(msr,(u32)(val),(u32)((val)>>32))
225 #define rdmsr_safe(msr,a,b) \
227 asm volatile ("1: rdmsr\n" \
229 ".section .fixup,\"ax\"\n" \
233 ".section __ex_table,\"a\"\n" \
236 ".previous":"=&bDS" (ret__), "=a"(*(a)), "=d"(*(b)) \
237 :"c"(msr), "i"(-EIO), "0"(0)); \
240 #endif /* __ASSEMBLY__ */
242 #endif /* !__i386__ */
247 void rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);
248 void wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);
249 int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);
250 int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);
251 #else /* CONFIG_SMP */
252 static inline void rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h)
254 rdmsr(msr_no, *l, *h);
256 static inline void wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
260 static inline int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h)
262 return rdmsr_safe(msr_no, l, h);
264 static inline int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
266 return wrmsr_safe(msr_no, l, h);
268 #endif /* CONFIG_SMP */
269 #endif /* __KERNEL__ */
270 #endif /* __ASSEMBLY__ */