1 #ifndef __ASM_PARAVIRT_H
2 #define __ASM_PARAVIRT_H
3 /* Various instructions on x86 need to be replaced for
4 * para-virtualization: those hooks are defined here. */
10 /* Bitmask of what can be clobbered: usually at least eax. */
12 #define CLBR_EAX (1 << 0)
13 #define CLBR_ECX (1 << 1)
14 #define CLBR_EDX (1 << 2)
17 #define CLBR_RSI (1 << 3)
18 #define CLBR_RDI (1 << 4)
19 #define CLBR_R8 (1 << 5)
20 #define CLBR_R9 (1 << 6)
21 #define CLBR_R10 (1 << 7)
22 #define CLBR_R11 (1 << 8)
23 #define CLBR_ANY ((1 << 9) - 1)
24 #include <asm/desc_defs.h>
26 /* CLBR_ANY should match all regs platform has. For i386, that's just it */
27 #define CLBR_ANY ((1 << 3) - 1)
31 #include <linux/types.h>
32 #include <linux/cpumask.h>
33 #include <asm/kmap_types.h>
34 #include <asm/desc_defs.h>
45 unsigned int kernel_rpl;
46 int shared_kernel_pmd;
53 * Patch may replace one of the defined code sequences with
54 * arbitrary code, subject to the same register constraints.
55 * This generally means the code is not free to clobber any
56 * registers other than EAX. The patch function should return
57 * the number of bytes of code generated, as we nop pad the
58 * rest in generic code.
60 unsigned (*patch)(u8 type, u16 clobber, void *insnbuf,
61 unsigned long addr, unsigned len);
63 /* Basic arch-specific setup */
64 void (*arch_setup)(void);
65 char *(*memory_setup)(void);
66 void (*post_allocator_init)(void);
68 /* Print a banner to identify the environment */
74 /* Set deferred update mode, used for batching operations. */
80 void (*time_init)(void);
82 /* Set and set time of day */
83 unsigned long (*get_wallclock)(void);
84 int (*set_wallclock)(unsigned long);
86 unsigned long long (*sched_clock)(void);
87 unsigned long (*get_tsc_khz)(void);
91 /* hooks for various privileged instructions */
92 unsigned long (*get_debugreg)(int regno);
93 void (*set_debugreg)(int regno, unsigned long value);
97 unsigned long (*read_cr0)(void);
98 void (*write_cr0)(unsigned long);
100 unsigned long (*read_cr4_safe)(void);
101 unsigned long (*read_cr4)(void);
102 void (*write_cr4)(unsigned long);
105 unsigned long (*read_cr8)(void);
106 void (*write_cr8)(unsigned long);
109 /* Segment descriptor handling */
110 void (*load_tr_desc)(void);
111 void (*load_gdt)(const struct desc_ptr *);
112 void (*load_idt)(const struct desc_ptr *);
113 void (*store_gdt)(struct desc_ptr *);
114 void (*store_idt)(struct desc_ptr *);
115 void (*set_ldt)(const void *desc, unsigned entries);
116 unsigned long (*store_tr)(void);
117 void (*load_tls)(struct thread_struct *t, unsigned int cpu);
119 void (*load_gs_index)(unsigned int idx);
121 void (*write_ldt_entry)(struct desc_struct *ldt, int entrynum,
123 void (*write_gdt_entry)(struct desc_struct *,
124 int entrynum, const void *desc, int size);
125 void (*write_idt_entry)(gate_desc *,
126 int entrynum, const gate_desc *gate);
127 void (*alloc_ldt)(struct desc_struct *ldt, unsigned entries);
128 void (*free_ldt)(struct desc_struct *ldt, unsigned entries);
130 void (*load_sp0)(struct tss_struct *tss, struct thread_struct *t);
132 void (*set_iopl_mask)(unsigned mask);
134 void (*wbinvd)(void);
135 void (*io_delay)(void);
137 /* cpuid emulation, mostly so that caps bits can be disabled */
138 void (*cpuid)(unsigned int *eax, unsigned int *ebx,
139 unsigned int *ecx, unsigned int *edx);
141 /* MSR, PMC and TSR operations.
142 err = 0/-EFAULT. wrmsr returns 0/-EFAULT. */
143 u64 (*read_msr)(unsigned int msr, int *err);
144 int (*write_msr)(unsigned int msr, unsigned low, unsigned high);
146 u64 (*read_tsc)(void);
147 u64 (*read_pmc)(int counter);
148 unsigned long long (*read_tscp)(unsigned int *aux);
151 * Atomically enable interrupts and return to userspace. This
152 * is only ever used to return to 32-bit processes; in a
153 * 64-bit kernel, it's used for 32-on-64 compat processes, but
154 * never native 64-bit processes. (Jump, not call.)
156 void (*irq_enable_sysexit)(void);
159 * Switch to usermode gs and return to 64-bit usermode using
160 * sysret. Only used in 64-bit kernels to return to 64-bit
161 * processes. Usermode register state, including %rsp, must
162 * already be restored.
164 void (*usergs_sysret64)(void);
167 * Switch to usermode gs and return to 32-bit usermode using
168 * sysret. Used to return to 32-on-64 compat processes.
169 * Other usermode register state, including %esp, must already
172 void (*usergs_sysret32)(void);
174 /* Normal iret. Jump to this with the standard iret stack
178 void (*swapgs)(void);
180 struct pv_lazy_ops lazy_mode;
184 void (*init_IRQ)(void);
187 * Get/set interrupt state. save_fl and restore_fl are only
188 * expected to use X86_EFLAGS_IF; all other bits
189 * returned from save_fl are undefined, and may be ignored by
192 unsigned long (*save_fl)(void);
193 void (*restore_fl)(unsigned long);
194 void (*irq_disable)(void);
195 void (*irq_enable)(void);
196 void (*safe_halt)(void);
200 void (*adjust_exception_frame)(void);
205 #ifdef CONFIG_X86_LOCAL_APIC
207 * Direct APIC operations, principally for VMI. Ideally
208 * these shouldn't be in this interface.
210 void (*apic_write)(unsigned long reg, u32 v);
211 u32 (*apic_read)(unsigned long reg);
212 void (*setup_boot_clock)(void);
213 void (*setup_secondary_clock)(void);
215 void (*startup_ipi_hook)(int phys_apicid,
216 unsigned long start_eip,
217 unsigned long start_esp);
223 * Called before/after init_mm pagetable setup. setup_start
224 * may reset %cr3, and may pre-install parts of the pagetable;
225 * pagetable setup is expected to preserve any existing
228 void (*pagetable_setup_start)(pgd_t *pgd_base);
229 void (*pagetable_setup_done)(pgd_t *pgd_base);
231 unsigned long (*read_cr2)(void);
232 void (*write_cr2)(unsigned long);
234 unsigned long (*read_cr3)(void);
235 void (*write_cr3)(unsigned long);
238 * Hooks for intercepting the creation/use/destruction of an
241 void (*activate_mm)(struct mm_struct *prev,
242 struct mm_struct *next);
243 void (*dup_mmap)(struct mm_struct *oldmm,
244 struct mm_struct *mm);
245 void (*exit_mmap)(struct mm_struct *mm);
249 void (*flush_tlb_user)(void);
250 void (*flush_tlb_kernel)(void);
251 void (*flush_tlb_single)(unsigned long addr);
252 void (*flush_tlb_others)(const cpumask_t *cpus, struct mm_struct *mm,
255 /* Hooks for allocating and freeing a pagetable top-level */
256 int (*pgd_alloc)(struct mm_struct *mm);
257 void (*pgd_free)(struct mm_struct *mm, pgd_t *pgd);
260 * Hooks for allocating/releasing pagetable pages when they're
261 * attached to a pagetable
263 void (*alloc_pte)(struct mm_struct *mm, u32 pfn);
264 void (*alloc_pmd)(struct mm_struct *mm, u32 pfn);
265 void (*alloc_pmd_clone)(u32 pfn, u32 clonepfn, u32 start, u32 count);
266 void (*alloc_pud)(struct mm_struct *mm, u32 pfn);
267 void (*release_pte)(u32 pfn);
268 void (*release_pmd)(u32 pfn);
269 void (*release_pud)(u32 pfn);
271 /* Pagetable manipulation functions */
272 void (*set_pte)(pte_t *ptep, pte_t pteval);
273 void (*set_pte_at)(struct mm_struct *mm, unsigned long addr,
274 pte_t *ptep, pte_t pteval);
275 void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval);
276 void (*pte_update)(struct mm_struct *mm, unsigned long addr,
278 void (*pte_update_defer)(struct mm_struct *mm,
279 unsigned long addr, pte_t *ptep);
281 pte_t (*ptep_modify_prot_start)(struct mm_struct *mm, unsigned long addr,
283 void (*ptep_modify_prot_commit)(struct mm_struct *mm, unsigned long addr,
284 pte_t *ptep, pte_t pte);
286 pteval_t (*pte_val)(pte_t);
287 pteval_t (*pte_flags)(pte_t);
288 pte_t (*make_pte)(pteval_t pte);
290 pgdval_t (*pgd_val)(pgd_t);
291 pgd_t (*make_pgd)(pgdval_t pgd);
293 #if PAGETABLE_LEVELS >= 3
294 #ifdef CONFIG_X86_PAE
295 void (*set_pte_atomic)(pte_t *ptep, pte_t pteval);
296 void (*set_pte_present)(struct mm_struct *mm, unsigned long addr,
297 pte_t *ptep, pte_t pte);
298 void (*pte_clear)(struct mm_struct *mm, unsigned long addr,
300 void (*pmd_clear)(pmd_t *pmdp);
302 #endif /* CONFIG_X86_PAE */
304 void (*set_pud)(pud_t *pudp, pud_t pudval);
306 pmdval_t (*pmd_val)(pmd_t);
307 pmd_t (*make_pmd)(pmdval_t pmd);
309 #if PAGETABLE_LEVELS == 4
310 pudval_t (*pud_val)(pud_t);
311 pud_t (*make_pud)(pudval_t pud);
313 void (*set_pgd)(pgd_t *pudp, pgd_t pgdval);
314 #endif /* PAGETABLE_LEVELS == 4 */
315 #endif /* PAGETABLE_LEVELS >= 3 */
317 #ifdef CONFIG_HIGHPTE
318 void *(*kmap_atomic_pte)(struct page *page, enum km_type type);
321 struct pv_lazy_ops lazy_mode;
325 /* Sometimes the physical address is a pfn, and sometimes its
326 an mfn. We can tell which is which from the index. */
327 void (*set_fixmap)(unsigned /* enum fixed_addresses */ idx,
328 unsigned long phys, pgprot_t flags);
333 int (*spin_is_locked)(struct raw_spinlock *lock);
334 int (*spin_is_contended)(struct raw_spinlock *lock);
335 void (*spin_lock)(struct raw_spinlock *lock);
336 void (*spin_lock_flags)(struct raw_spinlock *lock, unsigned long flags);
337 int (*spin_trylock)(struct raw_spinlock *lock);
338 void (*spin_unlock)(struct raw_spinlock *lock);
341 /* This contains all the paravirt structures: we get a convenient
342 * number for each function using the offset which we use to indicate
344 struct paravirt_patch_template {
345 struct pv_init_ops pv_init_ops;
346 struct pv_time_ops pv_time_ops;
347 struct pv_cpu_ops pv_cpu_ops;
348 struct pv_irq_ops pv_irq_ops;
349 struct pv_apic_ops pv_apic_ops;
350 struct pv_mmu_ops pv_mmu_ops;
351 struct pv_lock_ops pv_lock_ops;
354 extern struct pv_info pv_info;
355 extern struct pv_init_ops pv_init_ops;
356 extern struct pv_time_ops pv_time_ops;
357 extern struct pv_cpu_ops pv_cpu_ops;
358 extern struct pv_irq_ops pv_irq_ops;
359 extern struct pv_apic_ops pv_apic_ops;
360 extern struct pv_mmu_ops pv_mmu_ops;
361 extern struct pv_lock_ops pv_lock_ops;
363 #define PARAVIRT_PATCH(x) \
364 (offsetof(struct paravirt_patch_template, x) / sizeof(void *))
366 #define paravirt_type(op) \
367 [paravirt_typenum] "i" (PARAVIRT_PATCH(op)), \
368 [paravirt_opptr] "m" (op)
369 #define paravirt_clobber(clobber) \
370 [paravirt_clobber] "i" (clobber)
373 * Generate some code, and mark it as patchable by the
374 * apply_paravirt() alternate instruction patcher.
376 #define _paravirt_alt(insn_string, type, clobber) \
377 "771:\n\t" insn_string "\n" "772:\n" \
378 ".pushsection .parainstructions,\"a\"\n" \
381 " .byte " type "\n" \
382 " .byte 772b-771b\n" \
383 " .short " clobber "\n" \
386 /* Generate patchable code, with the default asm parameters. */
387 #define paravirt_alt(insn_string) \
388 _paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]")
390 /* Simple instruction patching code. */
391 #define DEF_NATIVE(ops, name, code) \
392 extern const char start_##ops##_##name[], end_##ops##_##name[]; \
393 asm("start_" #ops "_" #name ": " code "; end_" #ops "_" #name ":")
395 unsigned paravirt_patch_nop(void);
396 unsigned paravirt_patch_ignore(unsigned len);
397 unsigned paravirt_patch_call(void *insnbuf,
398 const void *target, u16 tgt_clobbers,
399 unsigned long addr, u16 site_clobbers,
401 unsigned paravirt_patch_jmp(void *insnbuf, const void *target,
402 unsigned long addr, unsigned len);
403 unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf,
404 unsigned long addr, unsigned len);
406 unsigned paravirt_patch_insns(void *insnbuf, unsigned len,
407 const char *start, const char *end);
409 unsigned native_patch(u8 type, u16 clobbers, void *ibuf,
410 unsigned long addr, unsigned len);
412 int paravirt_disable_iospace(void);
415 * This generates an indirect call based on the operation type number.
416 * The type number, computed in PARAVIRT_PATCH, is derived from the
417 * offset into the paravirt_patch_template structure, and can therefore be
418 * freely converted back into a structure offset.
420 #define PARAVIRT_CALL "call *%[paravirt_opptr];"
423 * These macros are intended to wrap calls through one of the paravirt
424 * ops structs, so that they can be later identified and patched at
427 * Normally, a call to a pv_op function is a simple indirect call:
428 * (pv_op_struct.operations)(args...).
430 * Unfortunately, this is a relatively slow operation for modern CPUs,
431 * because it cannot necessarily determine what the destination
432 * address is. In this case, the address is a runtime constant, so at
433 * the very least we can patch the call to e a simple direct call, or
434 * ideally, patch an inline implementation into the callsite. (Direct
435 * calls are essentially free, because the call and return addresses
436 * are completely predictable.)
438 * For i386, these macros rely on the standard gcc "regparm(3)" calling
439 * convention, in which the first three arguments are placed in %eax,
440 * %edx, %ecx (in that order), and the remaining arguments are placed
441 * on the stack. All caller-save registers (eax,edx,ecx) are expected
442 * to be modified (either clobbered or used for return values).
443 * X86_64, on the other hand, already specifies a register-based calling
444 * conventions, returning at %rax, with parameteres going on %rdi, %rsi,
445 * %rdx, and %rcx. Note that for this reason, x86_64 does not need any
446 * special handling for dealing with 4 arguments, unlike i386.
447 * However, x86_64 also have to clobber all caller saved registers, which
448 * unfortunately, are quite a bit (r8 - r11)
450 * The call instruction itself is marked by placing its start address
451 * and size into the .parainstructions section, so that
452 * apply_paravirt() in arch/i386/kernel/alternative.c can do the
453 * appropriate patching under the control of the backend pv_init_ops
456 * Unfortunately there's no way to get gcc to generate the args setup
457 * for the call, and then allow the call itself to be generated by an
458 * inline asm. Because of this, we must do the complete arg setup and
459 * return value handling from within these macros. This is fairly
462 * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments.
463 * It could be extended to more arguments, but there would be little
464 * to be gained from that. For each number of arguments, there are
465 * the two VCALL and CALL variants for void and non-void functions.
467 * When there is a return value, the invoker of the macro must specify
468 * the return type. The macro then uses sizeof() on that type to
469 * determine whether its a 32 or 64 bit value, and places the return
470 * in the right register(s) (just %eax for 32-bit, and %edx:%eax for
471 * 64-bit). For x86_64 machines, it just returns at %rax regardless of
472 * the return value size.
474 * 64-bit arguments are passed as a pair of adjacent 32-bit arguments
475 * i386 also passes 64-bit arguments as a pair of adjacent 32-bit arguments
478 * Small structures are passed and returned in registers. The macro
479 * calling convention can't directly deal with this, so the wrapper
480 * functions must do this.
482 * These PVOP_* macros are only defined within this header. This
483 * means that all uses must be wrapped in inline functions. This also
484 * makes sure the incoming and outgoing types are always correct.
487 #define PVOP_VCALL_ARGS unsigned long __eax, __edx, __ecx
488 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS
489 #define PVOP_VCALL_CLOBBERS "=a" (__eax), "=d" (__edx), \
491 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS
492 #define EXTRA_CLOBBERS
493 #define VEXTRA_CLOBBERS
495 #define PVOP_VCALL_ARGS unsigned long __edi, __esi, __edx, __ecx
496 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS, __eax
497 #define PVOP_VCALL_CLOBBERS "=D" (__edi), \
498 "=S" (__esi), "=d" (__edx), \
501 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS, "=a" (__eax)
503 #define EXTRA_CLOBBERS , "r8", "r9", "r10", "r11"
504 #define VEXTRA_CLOBBERS , "rax", "r8", "r9", "r10", "r11"
507 #ifdef CONFIG_PARAVIRT_DEBUG
508 #define PVOP_TEST_NULL(op) BUG_ON(op == NULL)
510 #define PVOP_TEST_NULL(op) ((void)op)
513 #define __PVOP_CALL(rettype, op, pre, post, ...) \
517 PVOP_TEST_NULL(op); \
518 /* This is 32-bit specific, but is okay in 64-bit */ \
519 /* since this condition will never hold */ \
520 if (sizeof(rettype) > sizeof(unsigned long)) { \
522 paravirt_alt(PARAVIRT_CALL) \
524 : PVOP_CALL_CLOBBERS \
525 : paravirt_type(op), \
526 paravirt_clobber(CLBR_ANY), \
528 : "memory", "cc" EXTRA_CLOBBERS); \
529 __ret = (rettype)((((u64)__edx) << 32) | __eax); \
532 paravirt_alt(PARAVIRT_CALL) \
534 : PVOP_CALL_CLOBBERS \
535 : paravirt_type(op), \
536 paravirt_clobber(CLBR_ANY), \
538 : "memory", "cc" EXTRA_CLOBBERS); \
539 __ret = (rettype)__eax; \
543 #define __PVOP_VCALL(op, pre, post, ...) \
546 PVOP_TEST_NULL(op); \
548 paravirt_alt(PARAVIRT_CALL) \
550 : PVOP_VCALL_CLOBBERS \
551 : paravirt_type(op), \
552 paravirt_clobber(CLBR_ANY), \
554 : "memory", "cc" VEXTRA_CLOBBERS); \
557 #define PVOP_CALL0(rettype, op) \
558 __PVOP_CALL(rettype, op, "", "")
559 #define PVOP_VCALL0(op) \
560 __PVOP_VCALL(op, "", "")
562 #define PVOP_CALL1(rettype, op, arg1) \
563 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)))
564 #define PVOP_VCALL1(op, arg1) \
565 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)))
567 #define PVOP_CALL2(rettype, op, arg1, arg2) \
568 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
569 "1" ((unsigned long)(arg2)))
570 #define PVOP_VCALL2(op, arg1, arg2) \
571 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
572 "1" ((unsigned long)(arg2)))
574 #define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \
575 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
576 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)))
577 #define PVOP_VCALL3(op, arg1, arg2, arg3) \
578 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
579 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)))
581 /* This is the only difference in x86_64. We can make it much simpler */
583 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
584 __PVOP_CALL(rettype, op, \
585 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
586 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \
587 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
588 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
590 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
591 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \
592 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
594 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
595 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
596 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)), \
597 "3"((unsigned long)(arg4)))
598 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
599 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
600 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)), \
601 "3"((unsigned long)(arg4)))
604 static inline int paravirt_enabled(void)
606 return pv_info.paravirt_enabled;
609 static inline void load_sp0(struct tss_struct *tss,
610 struct thread_struct *thread)
612 PVOP_VCALL2(pv_cpu_ops.load_sp0, tss, thread);
615 #define ARCH_SETUP pv_init_ops.arch_setup();
616 static inline unsigned long get_wallclock(void)
618 return PVOP_CALL0(unsigned long, pv_time_ops.get_wallclock);
621 static inline int set_wallclock(unsigned long nowtime)
623 return PVOP_CALL1(int, pv_time_ops.set_wallclock, nowtime);
626 static inline void (*choose_time_init(void))(void)
628 return pv_time_ops.time_init;
631 /* The paravirtualized CPUID instruction. */
632 static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
633 unsigned int *ecx, unsigned int *edx)
635 PVOP_VCALL4(pv_cpu_ops.cpuid, eax, ebx, ecx, edx);
639 * These special macros can be used to get or set a debugging register
641 static inline unsigned long paravirt_get_debugreg(int reg)
643 return PVOP_CALL1(unsigned long, pv_cpu_ops.get_debugreg, reg);
645 #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
646 static inline void set_debugreg(unsigned long val, int reg)
648 PVOP_VCALL2(pv_cpu_ops.set_debugreg, reg, val);
651 static inline void clts(void)
653 PVOP_VCALL0(pv_cpu_ops.clts);
656 static inline unsigned long read_cr0(void)
658 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr0);
661 static inline void write_cr0(unsigned long x)
663 PVOP_VCALL1(pv_cpu_ops.write_cr0, x);
666 static inline unsigned long read_cr2(void)
668 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr2);
671 static inline void write_cr2(unsigned long x)
673 PVOP_VCALL1(pv_mmu_ops.write_cr2, x);
676 static inline unsigned long read_cr3(void)
678 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr3);
681 static inline void write_cr3(unsigned long x)
683 PVOP_VCALL1(pv_mmu_ops.write_cr3, x);
686 static inline unsigned long read_cr4(void)
688 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4);
690 static inline unsigned long read_cr4_safe(void)
692 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4_safe);
695 static inline void write_cr4(unsigned long x)
697 PVOP_VCALL1(pv_cpu_ops.write_cr4, x);
701 static inline unsigned long read_cr8(void)
703 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr8);
706 static inline void write_cr8(unsigned long x)
708 PVOP_VCALL1(pv_cpu_ops.write_cr8, x);
712 static inline void raw_safe_halt(void)
714 PVOP_VCALL0(pv_irq_ops.safe_halt);
717 static inline void halt(void)
719 PVOP_VCALL0(pv_irq_ops.safe_halt);
722 static inline void wbinvd(void)
724 PVOP_VCALL0(pv_cpu_ops.wbinvd);
727 #define get_kernel_rpl() (pv_info.kernel_rpl)
729 static inline u64 paravirt_read_msr(unsigned msr, int *err)
731 return PVOP_CALL2(u64, pv_cpu_ops.read_msr, msr, err);
733 static inline int paravirt_write_msr(unsigned msr, unsigned low, unsigned high)
735 return PVOP_CALL3(int, pv_cpu_ops.write_msr, msr, low, high);
738 /* These should all do BUG_ON(_err), but our headers are too tangled. */
739 #define rdmsr(msr, val1, val2) \
742 u64 _l = paravirt_read_msr(msr, &_err); \
747 #define wrmsr(msr, val1, val2) \
749 paravirt_write_msr(msr, val1, val2); \
752 #define rdmsrl(msr, val) \
755 val = paravirt_read_msr(msr, &_err); \
758 #define wrmsrl(msr, val) wrmsr(msr, (u32)((u64)(val)), ((u64)(val))>>32)
759 #define wrmsr_safe(msr, a, b) paravirt_write_msr(msr, a, b)
761 /* rdmsr with exception handling */
762 #define rdmsr_safe(msr, a, b) \
765 u64 _l = paravirt_read_msr(msr, &_err); \
771 static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
775 *p = paravirt_read_msr(msr, &err);
779 static inline u64 paravirt_read_tsc(void)
781 return PVOP_CALL0(u64, pv_cpu_ops.read_tsc);
784 #define rdtscl(low) \
786 u64 _l = paravirt_read_tsc(); \
790 #define rdtscll(val) (val = paravirt_read_tsc())
792 static inline unsigned long long paravirt_sched_clock(void)
794 return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock);
796 #define calibrate_tsc() (pv_time_ops.get_tsc_khz())
798 static inline unsigned long long paravirt_read_pmc(int counter)
800 return PVOP_CALL1(u64, pv_cpu_ops.read_pmc, counter);
803 #define rdpmc(counter, low, high) \
805 u64 _l = paravirt_read_pmc(counter); \
810 static inline unsigned long long paravirt_rdtscp(unsigned int *aux)
812 return PVOP_CALL1(u64, pv_cpu_ops.read_tscp, aux);
815 #define rdtscp(low, high, aux) \
818 unsigned long __val = paravirt_rdtscp(&__aux); \
819 (low) = (u32)__val; \
820 (high) = (u32)(__val >> 32); \
824 #define rdtscpll(val, aux) \
826 unsigned long __aux; \
827 val = paravirt_rdtscp(&__aux); \
831 static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)
833 PVOP_VCALL2(pv_cpu_ops.alloc_ldt, ldt, entries);
836 static inline void paravirt_free_ldt(struct desc_struct *ldt, unsigned entries)
838 PVOP_VCALL2(pv_cpu_ops.free_ldt, ldt, entries);
841 static inline void load_TR_desc(void)
843 PVOP_VCALL0(pv_cpu_ops.load_tr_desc);
845 static inline void load_gdt(const struct desc_ptr *dtr)
847 PVOP_VCALL1(pv_cpu_ops.load_gdt, dtr);
849 static inline void load_idt(const struct desc_ptr *dtr)
851 PVOP_VCALL1(pv_cpu_ops.load_idt, dtr);
853 static inline void set_ldt(const void *addr, unsigned entries)
855 PVOP_VCALL2(pv_cpu_ops.set_ldt, addr, entries);
857 static inline void store_gdt(struct desc_ptr *dtr)
859 PVOP_VCALL1(pv_cpu_ops.store_gdt, dtr);
861 static inline void store_idt(struct desc_ptr *dtr)
863 PVOP_VCALL1(pv_cpu_ops.store_idt, dtr);
865 static inline unsigned long paravirt_store_tr(void)
867 return PVOP_CALL0(unsigned long, pv_cpu_ops.store_tr);
869 #define store_tr(tr) ((tr) = paravirt_store_tr())
870 static inline void load_TLS(struct thread_struct *t, unsigned cpu)
872 PVOP_VCALL2(pv_cpu_ops.load_tls, t, cpu);
876 static inline void load_gs_index(unsigned int gs)
878 PVOP_VCALL1(pv_cpu_ops.load_gs_index, gs);
882 static inline void write_ldt_entry(struct desc_struct *dt, int entry,
885 PVOP_VCALL3(pv_cpu_ops.write_ldt_entry, dt, entry, desc);
888 static inline void write_gdt_entry(struct desc_struct *dt, int entry,
889 void *desc, int type)
891 PVOP_VCALL4(pv_cpu_ops.write_gdt_entry, dt, entry, desc, type);
894 static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
896 PVOP_VCALL3(pv_cpu_ops.write_idt_entry, dt, entry, g);
898 static inline void set_iopl_mask(unsigned mask)
900 PVOP_VCALL1(pv_cpu_ops.set_iopl_mask, mask);
903 /* The paravirtualized I/O functions */
904 static inline void slow_down_io(void)
906 pv_cpu_ops.io_delay();
907 #ifdef REALLY_SLOW_IO
908 pv_cpu_ops.io_delay();
909 pv_cpu_ops.io_delay();
910 pv_cpu_ops.io_delay();
914 #ifdef CONFIG_X86_LOCAL_APIC
916 * Basic functions accessing APICs.
918 static inline void apic_write(unsigned long reg, u32 v)
920 PVOP_VCALL2(pv_apic_ops.apic_write, reg, v);
923 static inline u32 apic_read(unsigned long reg)
925 return PVOP_CALL1(unsigned long, pv_apic_ops.apic_read, reg);
928 static inline void setup_boot_clock(void)
930 PVOP_VCALL0(pv_apic_ops.setup_boot_clock);
933 static inline void setup_secondary_clock(void)
935 PVOP_VCALL0(pv_apic_ops.setup_secondary_clock);
939 static inline void paravirt_post_allocator_init(void)
941 if (pv_init_ops.post_allocator_init)
942 (*pv_init_ops.post_allocator_init)();
945 static inline void paravirt_pagetable_setup_start(pgd_t *base)
947 (*pv_mmu_ops.pagetable_setup_start)(base);
950 static inline void paravirt_pagetable_setup_done(pgd_t *base)
952 (*pv_mmu_ops.pagetable_setup_done)(base);
956 static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip,
957 unsigned long start_esp)
959 PVOP_VCALL3(pv_apic_ops.startup_ipi_hook,
960 phys_apicid, start_eip, start_esp);
964 static inline void paravirt_activate_mm(struct mm_struct *prev,
965 struct mm_struct *next)
967 PVOP_VCALL2(pv_mmu_ops.activate_mm, prev, next);
970 static inline void arch_dup_mmap(struct mm_struct *oldmm,
971 struct mm_struct *mm)
973 PVOP_VCALL2(pv_mmu_ops.dup_mmap, oldmm, mm);
976 static inline void arch_exit_mmap(struct mm_struct *mm)
978 PVOP_VCALL1(pv_mmu_ops.exit_mmap, mm);
981 static inline void __flush_tlb(void)
983 PVOP_VCALL0(pv_mmu_ops.flush_tlb_user);
985 static inline void __flush_tlb_global(void)
987 PVOP_VCALL0(pv_mmu_ops.flush_tlb_kernel);
989 static inline void __flush_tlb_single(unsigned long addr)
991 PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr);
994 static inline void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm,
997 PVOP_VCALL3(pv_mmu_ops.flush_tlb_others, &cpumask, mm, va);
1000 static inline int paravirt_pgd_alloc(struct mm_struct *mm)
1002 return PVOP_CALL1(int, pv_mmu_ops.pgd_alloc, mm);
1005 static inline void paravirt_pgd_free(struct mm_struct *mm, pgd_t *pgd)
1007 PVOP_VCALL2(pv_mmu_ops.pgd_free, mm, pgd);
1010 static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned pfn)
1012 PVOP_VCALL2(pv_mmu_ops.alloc_pte, mm, pfn);
1014 static inline void paravirt_release_pte(unsigned pfn)
1016 PVOP_VCALL1(pv_mmu_ops.release_pte, pfn);
1019 static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned pfn)
1021 PVOP_VCALL2(pv_mmu_ops.alloc_pmd, mm, pfn);
1024 static inline void paravirt_alloc_pmd_clone(unsigned pfn, unsigned clonepfn,
1025 unsigned start, unsigned count)
1027 PVOP_VCALL4(pv_mmu_ops.alloc_pmd_clone, pfn, clonepfn, start, count);
1029 static inline void paravirt_release_pmd(unsigned pfn)
1031 PVOP_VCALL1(pv_mmu_ops.release_pmd, pfn);
1034 static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned pfn)
1036 PVOP_VCALL2(pv_mmu_ops.alloc_pud, mm, pfn);
1038 static inline void paravirt_release_pud(unsigned pfn)
1040 PVOP_VCALL1(pv_mmu_ops.release_pud, pfn);
1043 #ifdef CONFIG_HIGHPTE
1044 static inline void *kmap_atomic_pte(struct page *page, enum km_type type)
1047 ret = PVOP_CALL2(unsigned long, pv_mmu_ops.kmap_atomic_pte, page, type);
1052 static inline void pte_update(struct mm_struct *mm, unsigned long addr,
1055 PVOP_VCALL3(pv_mmu_ops.pte_update, mm, addr, ptep);
1058 static inline void pte_update_defer(struct mm_struct *mm, unsigned long addr,
1061 PVOP_VCALL3(pv_mmu_ops.pte_update_defer, mm, addr, ptep);
1064 static inline pte_t __pte(pteval_t val)
1068 if (sizeof(pteval_t) > sizeof(long))
1069 ret = PVOP_CALL2(pteval_t,
1070 pv_mmu_ops.make_pte,
1071 val, (u64)val >> 32);
1073 ret = PVOP_CALL1(pteval_t,
1074 pv_mmu_ops.make_pte,
1077 return (pte_t) { .pte = ret };
1080 static inline pteval_t pte_val(pte_t pte)
1084 if (sizeof(pteval_t) > sizeof(long))
1085 ret = PVOP_CALL2(pteval_t, pv_mmu_ops.pte_val,
1086 pte.pte, (u64)pte.pte >> 32);
1088 ret = PVOP_CALL1(pteval_t, pv_mmu_ops.pte_val,
1094 static inline pteval_t pte_flags(pte_t pte)
1098 if (sizeof(pteval_t) > sizeof(long))
1099 ret = PVOP_CALL2(pteval_t, pv_mmu_ops.pte_flags,
1100 pte.pte, (u64)pte.pte >> 32);
1102 ret = PVOP_CALL1(pteval_t, pv_mmu_ops.pte_flags,
1105 #ifdef CONFIG_PARAVIRT_DEBUG
1106 BUG_ON(ret & PTE_PFN_MASK);
1111 static inline pgd_t __pgd(pgdval_t val)
1115 if (sizeof(pgdval_t) > sizeof(long))
1116 ret = PVOP_CALL2(pgdval_t, pv_mmu_ops.make_pgd,
1117 val, (u64)val >> 32);
1119 ret = PVOP_CALL1(pgdval_t, pv_mmu_ops.make_pgd,
1122 return (pgd_t) { ret };
1125 static inline pgdval_t pgd_val(pgd_t pgd)
1129 if (sizeof(pgdval_t) > sizeof(long))
1130 ret = PVOP_CALL2(pgdval_t, pv_mmu_ops.pgd_val,
1131 pgd.pgd, (u64)pgd.pgd >> 32);
1133 ret = PVOP_CALL1(pgdval_t, pv_mmu_ops.pgd_val,
1139 #define __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
1140 static inline pte_t ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr,
1145 ret = PVOP_CALL3(pteval_t, pv_mmu_ops.ptep_modify_prot_start,
1148 return (pte_t) { .pte = ret };
1151 static inline void ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
1152 pte_t *ptep, pte_t pte)
1154 if (sizeof(pteval_t) > sizeof(long))
1156 pv_mmu_ops.ptep_modify_prot_commit(mm, addr, ptep, pte);
1158 PVOP_VCALL4(pv_mmu_ops.ptep_modify_prot_commit,
1159 mm, addr, ptep, pte.pte);
1162 static inline void set_pte(pte_t *ptep, pte_t pte)
1164 if (sizeof(pteval_t) > sizeof(long))
1165 PVOP_VCALL3(pv_mmu_ops.set_pte, ptep,
1166 pte.pte, (u64)pte.pte >> 32);
1168 PVOP_VCALL2(pv_mmu_ops.set_pte, ptep,
1172 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
1173 pte_t *ptep, pte_t pte)
1175 if (sizeof(pteval_t) > sizeof(long))
1177 pv_mmu_ops.set_pte_at(mm, addr, ptep, pte);
1179 PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, pte.pte);
1182 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
1184 pmdval_t val = native_pmd_val(pmd);
1186 if (sizeof(pmdval_t) > sizeof(long))
1187 PVOP_VCALL3(pv_mmu_ops.set_pmd, pmdp, val, (u64)val >> 32);
1189 PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, val);
1192 #if PAGETABLE_LEVELS >= 3
1193 static inline pmd_t __pmd(pmdval_t val)
1197 if (sizeof(pmdval_t) > sizeof(long))
1198 ret = PVOP_CALL2(pmdval_t, pv_mmu_ops.make_pmd,
1199 val, (u64)val >> 32);
1201 ret = PVOP_CALL1(pmdval_t, pv_mmu_ops.make_pmd,
1204 return (pmd_t) { ret };
1207 static inline pmdval_t pmd_val(pmd_t pmd)
1211 if (sizeof(pmdval_t) > sizeof(long))
1212 ret = PVOP_CALL2(pmdval_t, pv_mmu_ops.pmd_val,
1213 pmd.pmd, (u64)pmd.pmd >> 32);
1215 ret = PVOP_CALL1(pmdval_t, pv_mmu_ops.pmd_val,
1221 static inline void set_pud(pud_t *pudp, pud_t pud)
1223 pudval_t val = native_pud_val(pud);
1225 if (sizeof(pudval_t) > sizeof(long))
1226 PVOP_VCALL3(pv_mmu_ops.set_pud, pudp,
1227 val, (u64)val >> 32);
1229 PVOP_VCALL2(pv_mmu_ops.set_pud, pudp,
1232 #if PAGETABLE_LEVELS == 4
1233 static inline pud_t __pud(pudval_t val)
1237 if (sizeof(pudval_t) > sizeof(long))
1238 ret = PVOP_CALL2(pudval_t, pv_mmu_ops.make_pud,
1239 val, (u64)val >> 32);
1241 ret = PVOP_CALL1(pudval_t, pv_mmu_ops.make_pud,
1244 return (pud_t) { ret };
1247 static inline pudval_t pud_val(pud_t pud)
1251 if (sizeof(pudval_t) > sizeof(long))
1252 ret = PVOP_CALL2(pudval_t, pv_mmu_ops.pud_val,
1253 pud.pud, (u64)pud.pud >> 32);
1255 ret = PVOP_CALL1(pudval_t, pv_mmu_ops.pud_val,
1261 static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
1263 pgdval_t val = native_pgd_val(pgd);
1265 if (sizeof(pgdval_t) > sizeof(long))
1266 PVOP_VCALL3(pv_mmu_ops.set_pgd, pgdp,
1267 val, (u64)val >> 32);
1269 PVOP_VCALL2(pv_mmu_ops.set_pgd, pgdp,
1273 static inline void pgd_clear(pgd_t *pgdp)
1275 set_pgd(pgdp, __pgd(0));
1278 static inline void pud_clear(pud_t *pudp)
1280 set_pud(pudp, __pud(0));
1283 #endif /* PAGETABLE_LEVELS == 4 */
1285 #endif /* PAGETABLE_LEVELS >= 3 */
1287 #ifdef CONFIG_X86_PAE
1288 /* Special-case pte-setting operations for PAE, which can't update a
1289 64-bit pte atomically */
1290 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
1292 PVOP_VCALL3(pv_mmu_ops.set_pte_atomic, ptep,
1293 pte.pte, pte.pte >> 32);
1296 static inline void set_pte_present(struct mm_struct *mm, unsigned long addr,
1297 pte_t *ptep, pte_t pte)
1300 pv_mmu_ops.set_pte_present(mm, addr, ptep, pte);
1303 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
1306 PVOP_VCALL3(pv_mmu_ops.pte_clear, mm, addr, ptep);
1309 static inline void pmd_clear(pmd_t *pmdp)
1311 PVOP_VCALL1(pv_mmu_ops.pmd_clear, pmdp);
1313 #else /* !CONFIG_X86_PAE */
1314 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
1319 static inline void set_pte_present(struct mm_struct *mm, unsigned long addr,
1320 pte_t *ptep, pte_t pte)
1325 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
1328 set_pte_at(mm, addr, ptep, __pte(0));
1331 static inline void pmd_clear(pmd_t *pmdp)
1333 set_pmd(pmdp, __pmd(0));
1335 #endif /* CONFIG_X86_PAE */
1337 /* Lazy mode for batching updates / context switch */
1338 enum paravirt_lazy_mode {
1344 enum paravirt_lazy_mode paravirt_get_lazy_mode(void);
1345 void paravirt_enter_lazy_cpu(void);
1346 void paravirt_leave_lazy_cpu(void);
1347 void paravirt_enter_lazy_mmu(void);
1348 void paravirt_leave_lazy_mmu(void);
1349 void paravirt_leave_lazy(enum paravirt_lazy_mode mode);
1351 #define __HAVE_ARCH_ENTER_LAZY_CPU_MODE
1352 static inline void arch_enter_lazy_cpu_mode(void)
1354 PVOP_VCALL0(pv_cpu_ops.lazy_mode.enter);
1357 static inline void arch_leave_lazy_cpu_mode(void)
1359 PVOP_VCALL0(pv_cpu_ops.lazy_mode.leave);
1362 static inline void arch_flush_lazy_cpu_mode(void)
1364 if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU)) {
1365 arch_leave_lazy_cpu_mode();
1366 arch_enter_lazy_cpu_mode();
1371 #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
1372 static inline void arch_enter_lazy_mmu_mode(void)
1374 PVOP_VCALL0(pv_mmu_ops.lazy_mode.enter);
1377 static inline void arch_leave_lazy_mmu_mode(void)
1379 PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave);
1382 static inline void arch_flush_lazy_mmu_mode(void)
1384 if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU)) {
1385 arch_leave_lazy_mmu_mode();
1386 arch_enter_lazy_mmu_mode();
1390 static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
1391 unsigned long phys, pgprot_t flags)
1393 pv_mmu_ops.set_fixmap(idx, phys, flags);
1396 void _paravirt_nop(void);
1397 #define paravirt_nop ((void *)_paravirt_nop)
1399 void paravirt_use_bytelocks(void);
1403 static inline int __raw_spin_is_locked(struct raw_spinlock *lock)
1405 return PVOP_CALL1(int, pv_lock_ops.spin_is_locked, lock);
1408 static inline int __raw_spin_is_contended(struct raw_spinlock *lock)
1410 return PVOP_CALL1(int, pv_lock_ops.spin_is_contended, lock);
1413 static __always_inline void __raw_spin_lock(struct raw_spinlock *lock)
1415 PVOP_VCALL1(pv_lock_ops.spin_lock, lock);
1418 static __always_inline void __raw_spin_lock_flags(struct raw_spinlock *lock,
1419 unsigned long flags)
1421 PVOP_VCALL2(pv_lock_ops.spin_lock_flags, lock, flags);
1424 static __always_inline int __raw_spin_trylock(struct raw_spinlock *lock)
1426 return PVOP_CALL1(int, pv_lock_ops.spin_trylock, lock);
1429 static __always_inline void __raw_spin_unlock(struct raw_spinlock *lock)
1431 PVOP_VCALL1(pv_lock_ops.spin_unlock, lock);
1436 /* These all sit in the .parainstructions section to tell us what to patch. */
1437 struct paravirt_patch_site {
1438 u8 *instr; /* original instructions */
1439 u8 instrtype; /* type of this instruction */
1440 u8 len; /* length of original instruction */
1441 u16 clobbers; /* what registers you may clobber */
1444 extern struct paravirt_patch_site __parainstructions[],
1445 __parainstructions_end[];
1447 #ifdef CONFIG_X86_32
1448 #define PV_SAVE_REGS "pushl %%ecx; pushl %%edx;"
1449 #define PV_RESTORE_REGS "popl %%edx; popl %%ecx"
1450 #define PV_FLAGS_ARG "0"
1451 #define PV_EXTRA_CLOBBERS
1452 #define PV_VEXTRA_CLOBBERS
1454 /* We save some registers, but all of them, that's too much. We clobber all
1455 * caller saved registers but the argument parameter */
1456 #define PV_SAVE_REGS "pushq %%rdi;"
1457 #define PV_RESTORE_REGS "popq %%rdi;"
1458 #define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx", "rsi"
1459 #define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx", "rsi"
1460 #define PV_FLAGS_ARG "D"
1463 static inline unsigned long __raw_local_save_flags(void)
1467 asm volatile(paravirt_alt(PV_SAVE_REGS
1471 : paravirt_type(pv_irq_ops.save_fl),
1472 paravirt_clobber(CLBR_EAX)
1473 : "memory", "cc" PV_VEXTRA_CLOBBERS);
1477 static inline void raw_local_irq_restore(unsigned long f)
1479 asm volatile(paravirt_alt(PV_SAVE_REGS
1484 paravirt_type(pv_irq_ops.restore_fl),
1485 paravirt_clobber(CLBR_EAX)
1486 : "memory", "cc" PV_EXTRA_CLOBBERS);
1489 static inline void raw_local_irq_disable(void)
1491 asm volatile(paravirt_alt(PV_SAVE_REGS
1495 : paravirt_type(pv_irq_ops.irq_disable),
1496 paravirt_clobber(CLBR_EAX)
1497 : "memory", "eax", "cc" PV_EXTRA_CLOBBERS);
1500 static inline void raw_local_irq_enable(void)
1502 asm volatile(paravirt_alt(PV_SAVE_REGS
1506 : paravirt_type(pv_irq_ops.irq_enable),
1507 paravirt_clobber(CLBR_EAX)
1508 : "memory", "eax", "cc" PV_EXTRA_CLOBBERS);
1511 static inline unsigned long __raw_local_irq_save(void)
1515 f = __raw_local_save_flags();
1516 raw_local_irq_disable();
1521 /* Make sure as little as possible of this mess escapes. */
1522 #undef PARAVIRT_CALL
1536 #else /* __ASSEMBLY__ */
1538 #define _PVSITE(ptype, clobbers, ops, word, algn) \
1542 .pushsection .parainstructions,"a"; \
1551 #ifdef CONFIG_X86_64
1552 #define PV_SAVE_REGS \
1562 #define PV_RESTORE_REGS \
1572 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 8)
1573 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
1574 #define PARA_INDIRECT(addr) *addr(%rip)
1576 #define PV_SAVE_REGS pushl %eax; pushl %edi; pushl %ecx; pushl %edx
1577 #define PV_RESTORE_REGS popl %edx; popl %ecx; popl %edi; popl %eax
1578 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 4)
1579 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
1580 #define PARA_INDIRECT(addr) *%cs:addr
1583 #define INTERRUPT_RETURN \
1584 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE, \
1585 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_iret))
1587 #define DISABLE_INTERRUPTS(clobbers) \
1588 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
1590 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_disable); \
1593 #define ENABLE_INTERRUPTS(clobbers) \
1594 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers, \
1596 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable); \
1599 #define USERGS_SYSRET32 \
1600 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret32), \
1602 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret32))
1604 #ifdef CONFIG_X86_32
1605 #define GET_CR0_INTO_EAX \
1606 push %ecx; push %edx; \
1607 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_read_cr0); \
1610 #define ENABLE_INTERRUPTS_SYSEXIT \
1611 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit), \
1613 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
1616 #else /* !CONFIG_X86_32 */
1619 * If swapgs is used while the userspace stack is still current,
1620 * there's no way to call a pvop. The PV replacement *must* be
1621 * inlined, or the swapgs instruction must be trapped and emulated.
1623 #define SWAPGS_UNSAFE_STACK \
1624 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
1628 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
1630 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs); \
1634 #define GET_CR2_INTO_RCX \
1635 call PARA_INDIRECT(pv_mmu_ops+PV_MMU_read_cr2); \
1639 #define PARAVIRT_ADJUST_EXCEPTION_FRAME \
1640 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_adjust_exception_frame), \
1642 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_adjust_exception_frame))
1644 #define USERGS_SYSRET64 \
1645 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret64), \
1647 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret64))
1649 #define ENABLE_INTERRUPTS_SYSEXIT32 \
1650 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit), \
1652 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
1653 #endif /* CONFIG_X86_32 */
1655 #endif /* __ASSEMBLY__ */
1656 #endif /* CONFIG_PARAVIRT */
1657 #endif /* __ASM_PARAVIRT_H */