1 #ifndef __ASM_PARAVIRT_H
2 #define __ASM_PARAVIRT_H
3 /* Various instructions on x86 need to be replaced for
4 * para-virtualization: those hooks are defined here. */
10 /* Bitmask of what can be clobbered: usually at least eax. */
12 #define CLBR_EAX (1 << 0)
13 #define CLBR_ECX (1 << 1)
14 #define CLBR_EDX (1 << 2)
17 #define CLBR_RSI (1 << 3)
18 #define CLBR_RDI (1 << 4)
19 #define CLBR_R8 (1 << 5)
20 #define CLBR_R9 (1 << 6)
21 #define CLBR_R10 (1 << 7)
22 #define CLBR_R11 (1 << 8)
23 #define CLBR_ANY ((1 << 9) - 1)
24 #include <asm/desc_defs.h>
26 /* CLBR_ANY should match all regs platform has. For i386, that's just it */
27 #define CLBR_ANY ((1 << 3) - 1)
31 #include <linux/types.h>
32 #include <linux/cpumask.h>
33 #include <asm/kmap_types.h>
34 #include <asm/desc_defs.h>
45 unsigned int kernel_rpl;
46 int shared_kernel_pmd;
53 * Patch may replace one of the defined code sequences with
54 * arbitrary code, subject to the same register constraints.
55 * This generally means the code is not free to clobber any
56 * registers other than EAX. The patch function should return
57 * the number of bytes of code generated, as we nop pad the
58 * rest in generic code.
60 unsigned (*patch)(u8 type, u16 clobber, void *insnbuf,
61 unsigned long addr, unsigned len);
63 /* Basic arch-specific setup */
64 void (*arch_setup)(void);
65 char *(*memory_setup)(void);
66 void (*post_allocator_init)(void);
68 /* Print a banner to identify the environment */
74 /* Set deferred update mode, used for batching operations. */
80 void (*time_init)(void);
82 /* Set and set time of day */
83 unsigned long (*get_wallclock)(void);
84 int (*set_wallclock)(unsigned long);
86 unsigned long long (*sched_clock)(void);
87 unsigned long (*get_tsc_khz)(void);
91 /* hooks for various privileged instructions */
92 unsigned long (*get_debugreg)(int regno);
93 void (*set_debugreg)(int regno, unsigned long value);
97 unsigned long (*read_cr0)(void);
98 void (*write_cr0)(unsigned long);
100 unsigned long (*read_cr4_safe)(void);
101 unsigned long (*read_cr4)(void);
102 void (*write_cr4)(unsigned long);
105 unsigned long (*read_cr8)(void);
106 void (*write_cr8)(unsigned long);
109 /* Segment descriptor handling */
110 void (*load_tr_desc)(void);
111 void (*load_gdt)(const struct desc_ptr *);
112 void (*load_idt)(const struct desc_ptr *);
113 void (*store_gdt)(struct desc_ptr *);
114 void (*store_idt)(struct desc_ptr *);
115 void (*set_ldt)(const void *desc, unsigned entries);
116 unsigned long (*store_tr)(void);
117 void (*load_tls)(struct thread_struct *t, unsigned int cpu);
119 void (*load_gs_index)(unsigned int idx);
121 void (*write_ldt_entry)(struct desc_struct *ldt, int entrynum,
123 void (*write_gdt_entry)(struct desc_struct *,
124 int entrynum, const void *desc, int size);
125 void (*write_idt_entry)(gate_desc *,
126 int entrynum, const gate_desc *gate);
127 void (*load_sp0)(struct tss_struct *tss, struct thread_struct *t);
129 void (*set_iopl_mask)(unsigned mask);
131 void (*wbinvd)(void);
132 void (*io_delay)(void);
134 /* cpuid emulation, mostly so that caps bits can be disabled */
135 void (*cpuid)(unsigned int *eax, unsigned int *ebx,
136 unsigned int *ecx, unsigned int *edx);
138 /* MSR, PMC and TSR operations.
139 err = 0/-EFAULT. wrmsr returns 0/-EFAULT. */
140 u64 (*read_msr)(unsigned int msr, int *err);
141 int (*write_msr)(unsigned int msr, unsigned low, unsigned high);
143 u64 (*read_tsc)(void);
144 u64 (*read_pmc)(int counter);
145 unsigned long long (*read_tscp)(unsigned int *aux);
148 * Atomically enable interrupts and return to userspace. This
149 * is only ever used to return to 32-bit processes; in a
150 * 64-bit kernel, it's used for 32-on-64 compat processes, but
151 * never native 64-bit processes. (Jump, not call.)
153 void (*irq_enable_sysexit)(void);
156 * Switch to usermode gs and return to 64-bit usermode using
157 * sysret. Only used in 64-bit kernels to return to 64-bit
158 * processes. Usermode register state, including %rsp, must
159 * already be restored.
161 void (*usergs_sysret64)(void);
164 * Switch to usermode gs and return to 32-bit usermode using
165 * sysret. Used to return to 32-on-64 compat processes.
166 * Other usermode register state, including %esp, must already
169 void (*usergs_sysret32)(void);
171 /* Normal iret. Jump to this with the standard iret stack
175 void (*swapgs)(void);
177 struct pv_lazy_ops lazy_mode;
181 void (*init_IRQ)(void);
184 * Get/set interrupt state. save_fl and restore_fl are only
185 * expected to use X86_EFLAGS_IF; all other bits
186 * returned from save_fl are undefined, and may be ignored by
189 unsigned long (*save_fl)(void);
190 void (*restore_fl)(unsigned long);
191 void (*irq_disable)(void);
192 void (*irq_enable)(void);
193 void (*safe_halt)(void);
197 void (*adjust_exception_frame)(void);
202 #ifdef CONFIG_X86_LOCAL_APIC
203 void (*setup_boot_clock)(void);
204 void (*setup_secondary_clock)(void);
206 void (*startup_ipi_hook)(int phys_apicid,
207 unsigned long start_eip,
208 unsigned long start_esp);
214 * Called before/after init_mm pagetable setup. setup_start
215 * may reset %cr3, and may pre-install parts of the pagetable;
216 * pagetable setup is expected to preserve any existing
219 void (*pagetable_setup_start)(pgd_t *pgd_base);
220 void (*pagetable_setup_done)(pgd_t *pgd_base);
222 unsigned long (*read_cr2)(void);
223 void (*write_cr2)(unsigned long);
225 unsigned long (*read_cr3)(void);
226 void (*write_cr3)(unsigned long);
229 * Hooks for intercepting the creation/use/destruction of an
232 void (*activate_mm)(struct mm_struct *prev,
233 struct mm_struct *next);
234 void (*dup_mmap)(struct mm_struct *oldmm,
235 struct mm_struct *mm);
236 void (*exit_mmap)(struct mm_struct *mm);
240 void (*flush_tlb_user)(void);
241 void (*flush_tlb_kernel)(void);
242 void (*flush_tlb_single)(unsigned long addr);
243 void (*flush_tlb_others)(const cpumask_t *cpus, struct mm_struct *mm,
246 /* Hooks for allocating and freeing a pagetable top-level */
247 int (*pgd_alloc)(struct mm_struct *mm);
248 void (*pgd_free)(struct mm_struct *mm, pgd_t *pgd);
251 * Hooks for allocating/releasing pagetable pages when they're
252 * attached to a pagetable
254 void (*alloc_pte)(struct mm_struct *mm, u32 pfn);
255 void (*alloc_pmd)(struct mm_struct *mm, u32 pfn);
256 void (*alloc_pmd_clone)(u32 pfn, u32 clonepfn, u32 start, u32 count);
257 void (*alloc_pud)(struct mm_struct *mm, u32 pfn);
258 void (*release_pte)(u32 pfn);
259 void (*release_pmd)(u32 pfn);
260 void (*release_pud)(u32 pfn);
262 /* Pagetable manipulation functions */
263 void (*set_pte)(pte_t *ptep, pte_t pteval);
264 void (*set_pte_at)(struct mm_struct *mm, unsigned long addr,
265 pte_t *ptep, pte_t pteval);
266 void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval);
267 void (*pte_update)(struct mm_struct *mm, unsigned long addr,
269 void (*pte_update_defer)(struct mm_struct *mm,
270 unsigned long addr, pte_t *ptep);
272 pte_t (*ptep_modify_prot_start)(struct mm_struct *mm, unsigned long addr,
274 void (*ptep_modify_prot_commit)(struct mm_struct *mm, unsigned long addr,
275 pte_t *ptep, pte_t pte);
277 pteval_t (*pte_val)(pte_t);
278 pteval_t (*pte_flags)(pte_t);
279 pte_t (*make_pte)(pteval_t pte);
281 pgdval_t (*pgd_val)(pgd_t);
282 pgd_t (*make_pgd)(pgdval_t pgd);
284 #if PAGETABLE_LEVELS >= 3
285 #ifdef CONFIG_X86_PAE
286 void (*set_pte_atomic)(pte_t *ptep, pte_t pteval);
287 void (*set_pte_present)(struct mm_struct *mm, unsigned long addr,
288 pte_t *ptep, pte_t pte);
289 void (*pte_clear)(struct mm_struct *mm, unsigned long addr,
291 void (*pmd_clear)(pmd_t *pmdp);
293 #endif /* CONFIG_X86_PAE */
295 void (*set_pud)(pud_t *pudp, pud_t pudval);
297 pmdval_t (*pmd_val)(pmd_t);
298 pmd_t (*make_pmd)(pmdval_t pmd);
300 #if PAGETABLE_LEVELS == 4
301 pudval_t (*pud_val)(pud_t);
302 pud_t (*make_pud)(pudval_t pud);
304 void (*set_pgd)(pgd_t *pudp, pgd_t pgdval);
305 #endif /* PAGETABLE_LEVELS == 4 */
306 #endif /* PAGETABLE_LEVELS >= 3 */
308 #ifdef CONFIG_HIGHPTE
309 void *(*kmap_atomic_pte)(struct page *page, enum km_type type);
312 struct pv_lazy_ops lazy_mode;
316 /* Sometimes the physical address is a pfn, and sometimes its
317 an mfn. We can tell which is which from the index. */
318 void (*set_fixmap)(unsigned /* enum fixed_addresses */ idx,
319 unsigned long phys, pgprot_t flags);
322 /* This contains all the paravirt structures: we get a convenient
323 * number for each function using the offset which we use to indicate
325 struct paravirt_patch_template {
326 struct pv_init_ops pv_init_ops;
327 struct pv_time_ops pv_time_ops;
328 struct pv_cpu_ops pv_cpu_ops;
329 struct pv_irq_ops pv_irq_ops;
330 struct pv_apic_ops pv_apic_ops;
331 struct pv_mmu_ops pv_mmu_ops;
334 extern struct pv_info pv_info;
335 extern struct pv_init_ops pv_init_ops;
336 extern struct pv_time_ops pv_time_ops;
337 extern struct pv_cpu_ops pv_cpu_ops;
338 extern struct pv_irq_ops pv_irq_ops;
339 extern struct pv_apic_ops pv_apic_ops;
340 extern struct pv_mmu_ops pv_mmu_ops;
342 #define PARAVIRT_PATCH(x) \
343 (offsetof(struct paravirt_patch_template, x) / sizeof(void *))
345 #define paravirt_type(op) \
346 [paravirt_typenum] "i" (PARAVIRT_PATCH(op)), \
347 [paravirt_opptr] "m" (op)
348 #define paravirt_clobber(clobber) \
349 [paravirt_clobber] "i" (clobber)
352 * Generate some code, and mark it as patchable by the
353 * apply_paravirt() alternate instruction patcher.
355 #define _paravirt_alt(insn_string, type, clobber) \
356 "771:\n\t" insn_string "\n" "772:\n" \
357 ".pushsection .parainstructions,\"a\"\n" \
360 " .byte " type "\n" \
361 " .byte 772b-771b\n" \
362 " .short " clobber "\n" \
365 /* Generate patchable code, with the default asm parameters. */
366 #define paravirt_alt(insn_string) \
367 _paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]")
369 /* Simple instruction patching code. */
370 #define DEF_NATIVE(ops, name, code) \
371 extern const char start_##ops##_##name[], end_##ops##_##name[]; \
372 asm("start_" #ops "_" #name ": " code "; end_" #ops "_" #name ":")
374 unsigned paravirt_patch_nop(void);
375 unsigned paravirt_patch_ignore(unsigned len);
376 unsigned paravirt_patch_call(void *insnbuf,
377 const void *target, u16 tgt_clobbers,
378 unsigned long addr, u16 site_clobbers,
380 unsigned paravirt_patch_jmp(void *insnbuf, const void *target,
381 unsigned long addr, unsigned len);
382 unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf,
383 unsigned long addr, unsigned len);
385 unsigned paravirt_patch_insns(void *insnbuf, unsigned len,
386 const char *start, const char *end);
388 unsigned native_patch(u8 type, u16 clobbers, void *ibuf,
389 unsigned long addr, unsigned len);
391 int paravirt_disable_iospace(void);
394 * This generates an indirect call based on the operation type number.
395 * The type number, computed in PARAVIRT_PATCH, is derived from the
396 * offset into the paravirt_patch_template structure, and can therefore be
397 * freely converted back into a structure offset.
399 #define PARAVIRT_CALL "call *%[paravirt_opptr];"
402 * These macros are intended to wrap calls through one of the paravirt
403 * ops structs, so that they can be later identified and patched at
406 * Normally, a call to a pv_op function is a simple indirect call:
407 * (pv_op_struct.operations)(args...).
409 * Unfortunately, this is a relatively slow operation for modern CPUs,
410 * because it cannot necessarily determine what the destination
411 * address is. In this case, the address is a runtime constant, so at
412 * the very least we can patch the call to e a simple direct call, or
413 * ideally, patch an inline implementation into the callsite. (Direct
414 * calls are essentially free, because the call and return addresses
415 * are completely predictable.)
417 * For i386, these macros rely on the standard gcc "regparm(3)" calling
418 * convention, in which the first three arguments are placed in %eax,
419 * %edx, %ecx (in that order), and the remaining arguments are placed
420 * on the stack. All caller-save registers (eax,edx,ecx) are expected
421 * to be modified (either clobbered or used for return values).
422 * X86_64, on the other hand, already specifies a register-based calling
423 * conventions, returning at %rax, with parameteres going on %rdi, %rsi,
424 * %rdx, and %rcx. Note that for this reason, x86_64 does not need any
425 * special handling for dealing with 4 arguments, unlike i386.
426 * However, x86_64 also have to clobber all caller saved registers, which
427 * unfortunately, are quite a bit (r8 - r11)
429 * The call instruction itself is marked by placing its start address
430 * and size into the .parainstructions section, so that
431 * apply_paravirt() in arch/i386/kernel/alternative.c can do the
432 * appropriate patching under the control of the backend pv_init_ops
435 * Unfortunately there's no way to get gcc to generate the args setup
436 * for the call, and then allow the call itself to be generated by an
437 * inline asm. Because of this, we must do the complete arg setup and
438 * return value handling from within these macros. This is fairly
441 * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments.
442 * It could be extended to more arguments, but there would be little
443 * to be gained from that. For each number of arguments, there are
444 * the two VCALL and CALL variants for void and non-void functions.
446 * When there is a return value, the invoker of the macro must specify
447 * the return type. The macro then uses sizeof() on that type to
448 * determine whether its a 32 or 64 bit value, and places the return
449 * in the right register(s) (just %eax for 32-bit, and %edx:%eax for
450 * 64-bit). For x86_64 machines, it just returns at %rax regardless of
451 * the return value size.
453 * 64-bit arguments are passed as a pair of adjacent 32-bit arguments
454 * i386 also passes 64-bit arguments as a pair of adjacent 32-bit arguments
457 * Small structures are passed and returned in registers. The macro
458 * calling convention can't directly deal with this, so the wrapper
459 * functions must do this.
461 * These PVOP_* macros are only defined within this header. This
462 * means that all uses must be wrapped in inline functions. This also
463 * makes sure the incoming and outgoing types are always correct.
466 #define PVOP_VCALL_ARGS unsigned long __eax, __edx, __ecx
467 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS
468 #define PVOP_VCALL_CLOBBERS "=a" (__eax), "=d" (__edx), \
470 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS
471 #define EXTRA_CLOBBERS
472 #define VEXTRA_CLOBBERS
474 #define PVOP_VCALL_ARGS unsigned long __edi, __esi, __edx, __ecx
475 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS, __eax
476 #define PVOP_VCALL_CLOBBERS "=D" (__edi), \
477 "=S" (__esi), "=d" (__edx), \
480 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS, "=a" (__eax)
482 #define EXTRA_CLOBBERS , "r8", "r9", "r10", "r11"
483 #define VEXTRA_CLOBBERS , "rax", "r8", "r9", "r10", "r11"
486 #ifdef CONFIG_PARAVIRT_DEBUG
487 #define PVOP_TEST_NULL(op) BUG_ON(op == NULL)
489 #define PVOP_TEST_NULL(op) ((void)op)
492 #define __PVOP_CALL(rettype, op, pre, post, ...) \
496 PVOP_TEST_NULL(op); \
497 /* This is 32-bit specific, but is okay in 64-bit */ \
498 /* since this condition will never hold */ \
499 if (sizeof(rettype) > sizeof(unsigned long)) { \
501 paravirt_alt(PARAVIRT_CALL) \
503 : PVOP_CALL_CLOBBERS \
504 : paravirt_type(op), \
505 paravirt_clobber(CLBR_ANY), \
507 : "memory", "cc" EXTRA_CLOBBERS); \
508 __ret = (rettype)((((u64)__edx) << 32) | __eax); \
511 paravirt_alt(PARAVIRT_CALL) \
513 : PVOP_CALL_CLOBBERS \
514 : paravirt_type(op), \
515 paravirt_clobber(CLBR_ANY), \
517 : "memory", "cc" EXTRA_CLOBBERS); \
518 __ret = (rettype)__eax; \
522 #define __PVOP_VCALL(op, pre, post, ...) \
525 PVOP_TEST_NULL(op); \
527 paravirt_alt(PARAVIRT_CALL) \
529 : PVOP_VCALL_CLOBBERS \
530 : paravirt_type(op), \
531 paravirt_clobber(CLBR_ANY), \
533 : "memory", "cc" VEXTRA_CLOBBERS); \
536 #define PVOP_CALL0(rettype, op) \
537 __PVOP_CALL(rettype, op, "", "")
538 #define PVOP_VCALL0(op) \
539 __PVOP_VCALL(op, "", "")
541 #define PVOP_CALL1(rettype, op, arg1) \
542 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)))
543 #define PVOP_VCALL1(op, arg1) \
544 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)))
546 #define PVOP_CALL2(rettype, op, arg1, arg2) \
547 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
548 "1" ((unsigned long)(arg2)))
549 #define PVOP_VCALL2(op, arg1, arg2) \
550 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
551 "1" ((unsigned long)(arg2)))
553 #define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \
554 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
555 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)))
556 #define PVOP_VCALL3(op, arg1, arg2, arg3) \
557 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
558 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)))
560 /* This is the only difference in x86_64. We can make it much simpler */
562 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
563 __PVOP_CALL(rettype, op, \
564 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
565 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \
566 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
567 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
569 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
570 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \
571 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
573 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
574 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
575 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)), \
576 "3"((unsigned long)(arg4)))
577 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
578 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
579 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)), \
580 "3"((unsigned long)(arg4)))
583 static inline int paravirt_enabled(void)
585 return pv_info.paravirt_enabled;
588 static inline void load_sp0(struct tss_struct *tss,
589 struct thread_struct *thread)
591 PVOP_VCALL2(pv_cpu_ops.load_sp0, tss, thread);
594 #define ARCH_SETUP pv_init_ops.arch_setup();
595 static inline unsigned long get_wallclock(void)
597 return PVOP_CALL0(unsigned long, pv_time_ops.get_wallclock);
600 static inline int set_wallclock(unsigned long nowtime)
602 return PVOP_CALL1(int, pv_time_ops.set_wallclock, nowtime);
605 static inline void (*choose_time_init(void))(void)
607 return pv_time_ops.time_init;
610 /* The paravirtualized CPUID instruction. */
611 static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
612 unsigned int *ecx, unsigned int *edx)
614 PVOP_VCALL4(pv_cpu_ops.cpuid, eax, ebx, ecx, edx);
618 * These special macros can be used to get or set a debugging register
620 static inline unsigned long paravirt_get_debugreg(int reg)
622 return PVOP_CALL1(unsigned long, pv_cpu_ops.get_debugreg, reg);
624 #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
625 static inline void set_debugreg(unsigned long val, int reg)
627 PVOP_VCALL2(pv_cpu_ops.set_debugreg, reg, val);
630 static inline void clts(void)
632 PVOP_VCALL0(pv_cpu_ops.clts);
635 static inline unsigned long read_cr0(void)
637 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr0);
640 static inline void write_cr0(unsigned long x)
642 PVOP_VCALL1(pv_cpu_ops.write_cr0, x);
645 static inline unsigned long read_cr2(void)
647 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr2);
650 static inline void write_cr2(unsigned long x)
652 PVOP_VCALL1(pv_mmu_ops.write_cr2, x);
655 static inline unsigned long read_cr3(void)
657 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr3);
660 static inline void write_cr3(unsigned long x)
662 PVOP_VCALL1(pv_mmu_ops.write_cr3, x);
665 static inline unsigned long read_cr4(void)
667 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4);
669 static inline unsigned long read_cr4_safe(void)
671 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4_safe);
674 static inline void write_cr4(unsigned long x)
676 PVOP_VCALL1(pv_cpu_ops.write_cr4, x);
680 static inline unsigned long read_cr8(void)
682 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr8);
685 static inline void write_cr8(unsigned long x)
687 PVOP_VCALL1(pv_cpu_ops.write_cr8, x);
691 static inline void raw_safe_halt(void)
693 PVOP_VCALL0(pv_irq_ops.safe_halt);
696 static inline void halt(void)
698 PVOP_VCALL0(pv_irq_ops.safe_halt);
701 static inline void wbinvd(void)
703 PVOP_VCALL0(pv_cpu_ops.wbinvd);
706 #define get_kernel_rpl() (pv_info.kernel_rpl)
708 static inline u64 paravirt_read_msr(unsigned msr, int *err)
710 return PVOP_CALL2(u64, pv_cpu_ops.read_msr, msr, err);
712 static inline int paravirt_write_msr(unsigned msr, unsigned low, unsigned high)
714 return PVOP_CALL3(int, pv_cpu_ops.write_msr, msr, low, high);
717 /* These should all do BUG_ON(_err), but our headers are too tangled. */
718 #define rdmsr(msr, val1, val2) \
721 u64 _l = paravirt_read_msr(msr, &_err); \
726 #define wrmsr(msr, val1, val2) \
728 paravirt_write_msr(msr, val1, val2); \
731 #define rdmsrl(msr, val) \
734 val = paravirt_read_msr(msr, &_err); \
737 #define wrmsrl(msr, val) wrmsr(msr, (u32)((u64)(val)), ((u64)(val))>>32)
738 #define wrmsr_safe(msr, a, b) paravirt_write_msr(msr, a, b)
740 /* rdmsr with exception handling */
741 #define rdmsr_safe(msr, a, b) \
744 u64 _l = paravirt_read_msr(msr, &_err); \
750 static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
754 *p = paravirt_read_msr(msr, &err);
758 static inline u64 paravirt_read_tsc(void)
760 return PVOP_CALL0(u64, pv_cpu_ops.read_tsc);
763 #define rdtscl(low) \
765 u64 _l = paravirt_read_tsc(); \
769 #define rdtscll(val) (val = paravirt_read_tsc())
771 static inline unsigned long long paravirt_sched_clock(void)
773 return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock);
775 #define calibrate_tsc() (pv_time_ops.get_tsc_khz())
777 static inline unsigned long long paravirt_read_pmc(int counter)
779 return PVOP_CALL1(u64, pv_cpu_ops.read_pmc, counter);
782 #define rdpmc(counter, low, high) \
784 u64 _l = paravirt_read_pmc(counter); \
789 static inline unsigned long long paravirt_rdtscp(unsigned int *aux)
791 return PVOP_CALL1(u64, pv_cpu_ops.read_tscp, aux);
794 #define rdtscp(low, high, aux) \
797 unsigned long __val = paravirt_rdtscp(&__aux); \
798 (low) = (u32)__val; \
799 (high) = (u32)(__val >> 32); \
803 #define rdtscpll(val, aux) \
805 unsigned long __aux; \
806 val = paravirt_rdtscp(&__aux); \
810 static inline void load_TR_desc(void)
812 PVOP_VCALL0(pv_cpu_ops.load_tr_desc);
814 static inline void load_gdt(const struct desc_ptr *dtr)
816 PVOP_VCALL1(pv_cpu_ops.load_gdt, dtr);
818 static inline void load_idt(const struct desc_ptr *dtr)
820 PVOP_VCALL1(pv_cpu_ops.load_idt, dtr);
822 static inline void set_ldt(const void *addr, unsigned entries)
824 PVOP_VCALL2(pv_cpu_ops.set_ldt, addr, entries);
826 static inline void store_gdt(struct desc_ptr *dtr)
828 PVOP_VCALL1(pv_cpu_ops.store_gdt, dtr);
830 static inline void store_idt(struct desc_ptr *dtr)
832 PVOP_VCALL1(pv_cpu_ops.store_idt, dtr);
834 static inline unsigned long paravirt_store_tr(void)
836 return PVOP_CALL0(unsigned long, pv_cpu_ops.store_tr);
838 #define store_tr(tr) ((tr) = paravirt_store_tr())
839 static inline void load_TLS(struct thread_struct *t, unsigned cpu)
841 PVOP_VCALL2(pv_cpu_ops.load_tls, t, cpu);
845 static inline void load_gs_index(unsigned int gs)
847 PVOP_VCALL1(pv_cpu_ops.load_gs_index, gs);
851 static inline void write_ldt_entry(struct desc_struct *dt, int entry,
854 PVOP_VCALL3(pv_cpu_ops.write_ldt_entry, dt, entry, desc);
857 static inline void write_gdt_entry(struct desc_struct *dt, int entry,
858 void *desc, int type)
860 PVOP_VCALL4(pv_cpu_ops.write_gdt_entry, dt, entry, desc, type);
863 static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
865 PVOP_VCALL3(pv_cpu_ops.write_idt_entry, dt, entry, g);
867 static inline void set_iopl_mask(unsigned mask)
869 PVOP_VCALL1(pv_cpu_ops.set_iopl_mask, mask);
872 /* The paravirtualized I/O functions */
873 static inline void slow_down_io(void)
875 pv_cpu_ops.io_delay();
876 #ifdef REALLY_SLOW_IO
877 pv_cpu_ops.io_delay();
878 pv_cpu_ops.io_delay();
879 pv_cpu_ops.io_delay();
883 #ifdef CONFIG_X86_LOCAL_APIC
884 static inline void setup_boot_clock(void)
886 PVOP_VCALL0(pv_apic_ops.setup_boot_clock);
889 static inline void setup_secondary_clock(void)
891 PVOP_VCALL0(pv_apic_ops.setup_secondary_clock);
895 static inline void paravirt_post_allocator_init(void)
897 if (pv_init_ops.post_allocator_init)
898 (*pv_init_ops.post_allocator_init)();
901 static inline void paravirt_pagetable_setup_start(pgd_t *base)
903 (*pv_mmu_ops.pagetable_setup_start)(base);
906 static inline void paravirt_pagetable_setup_done(pgd_t *base)
908 (*pv_mmu_ops.pagetable_setup_done)(base);
912 static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip,
913 unsigned long start_esp)
915 PVOP_VCALL3(pv_apic_ops.startup_ipi_hook,
916 phys_apicid, start_eip, start_esp);
920 static inline void paravirt_activate_mm(struct mm_struct *prev,
921 struct mm_struct *next)
923 PVOP_VCALL2(pv_mmu_ops.activate_mm, prev, next);
926 static inline void arch_dup_mmap(struct mm_struct *oldmm,
927 struct mm_struct *mm)
929 PVOP_VCALL2(pv_mmu_ops.dup_mmap, oldmm, mm);
932 static inline void arch_exit_mmap(struct mm_struct *mm)
934 PVOP_VCALL1(pv_mmu_ops.exit_mmap, mm);
937 static inline void __flush_tlb(void)
939 PVOP_VCALL0(pv_mmu_ops.flush_tlb_user);
941 static inline void __flush_tlb_global(void)
943 PVOP_VCALL0(pv_mmu_ops.flush_tlb_kernel);
945 static inline void __flush_tlb_single(unsigned long addr)
947 PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr);
950 static inline void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm,
953 PVOP_VCALL3(pv_mmu_ops.flush_tlb_others, &cpumask, mm, va);
956 static inline int paravirt_pgd_alloc(struct mm_struct *mm)
958 return PVOP_CALL1(int, pv_mmu_ops.pgd_alloc, mm);
961 static inline void paravirt_pgd_free(struct mm_struct *mm, pgd_t *pgd)
963 PVOP_VCALL2(pv_mmu_ops.pgd_free, mm, pgd);
966 static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned pfn)
968 PVOP_VCALL2(pv_mmu_ops.alloc_pte, mm, pfn);
970 static inline void paravirt_release_pte(unsigned pfn)
972 PVOP_VCALL1(pv_mmu_ops.release_pte, pfn);
975 static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned pfn)
977 PVOP_VCALL2(pv_mmu_ops.alloc_pmd, mm, pfn);
980 static inline void paravirt_alloc_pmd_clone(unsigned pfn, unsigned clonepfn,
981 unsigned start, unsigned count)
983 PVOP_VCALL4(pv_mmu_ops.alloc_pmd_clone, pfn, clonepfn, start, count);
985 static inline void paravirt_release_pmd(unsigned pfn)
987 PVOP_VCALL1(pv_mmu_ops.release_pmd, pfn);
990 static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned pfn)
992 PVOP_VCALL2(pv_mmu_ops.alloc_pud, mm, pfn);
994 static inline void paravirt_release_pud(unsigned pfn)
996 PVOP_VCALL1(pv_mmu_ops.release_pud, pfn);
999 #ifdef CONFIG_HIGHPTE
1000 static inline void *kmap_atomic_pte(struct page *page, enum km_type type)
1003 ret = PVOP_CALL2(unsigned long, pv_mmu_ops.kmap_atomic_pte, page, type);
1008 static inline void pte_update(struct mm_struct *mm, unsigned long addr,
1011 PVOP_VCALL3(pv_mmu_ops.pte_update, mm, addr, ptep);
1014 static inline void pte_update_defer(struct mm_struct *mm, unsigned long addr,
1017 PVOP_VCALL3(pv_mmu_ops.pte_update_defer, mm, addr, ptep);
1020 static inline pte_t __pte(pteval_t val)
1024 if (sizeof(pteval_t) > sizeof(long))
1025 ret = PVOP_CALL2(pteval_t,
1026 pv_mmu_ops.make_pte,
1027 val, (u64)val >> 32);
1029 ret = PVOP_CALL1(pteval_t,
1030 pv_mmu_ops.make_pte,
1033 return (pte_t) { .pte = ret };
1036 static inline pteval_t pte_val(pte_t pte)
1040 if (sizeof(pteval_t) > sizeof(long))
1041 ret = PVOP_CALL2(pteval_t, pv_mmu_ops.pte_val,
1042 pte.pte, (u64)pte.pte >> 32);
1044 ret = PVOP_CALL1(pteval_t, pv_mmu_ops.pte_val,
1050 static inline pteval_t pte_flags(pte_t pte)
1054 if (sizeof(pteval_t) > sizeof(long))
1055 ret = PVOP_CALL2(pteval_t, pv_mmu_ops.pte_flags,
1056 pte.pte, (u64)pte.pte >> 32);
1058 ret = PVOP_CALL1(pteval_t, pv_mmu_ops.pte_flags,
1064 static inline pgd_t __pgd(pgdval_t val)
1068 if (sizeof(pgdval_t) > sizeof(long))
1069 ret = PVOP_CALL2(pgdval_t, pv_mmu_ops.make_pgd,
1070 val, (u64)val >> 32);
1072 ret = PVOP_CALL1(pgdval_t, pv_mmu_ops.make_pgd,
1075 return (pgd_t) { ret };
1078 static inline pgdval_t pgd_val(pgd_t pgd)
1082 if (sizeof(pgdval_t) > sizeof(long))
1083 ret = PVOP_CALL2(pgdval_t, pv_mmu_ops.pgd_val,
1084 pgd.pgd, (u64)pgd.pgd >> 32);
1086 ret = PVOP_CALL1(pgdval_t, pv_mmu_ops.pgd_val,
1092 #define __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
1093 static inline pte_t ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr,
1098 ret = PVOP_CALL3(pteval_t, pv_mmu_ops.ptep_modify_prot_start,
1101 return (pte_t) { .pte = ret };
1104 static inline void ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
1105 pte_t *ptep, pte_t pte)
1107 if (sizeof(pteval_t) > sizeof(long))
1109 pv_mmu_ops.ptep_modify_prot_commit(mm, addr, ptep, pte);
1111 PVOP_VCALL4(pv_mmu_ops.ptep_modify_prot_commit,
1112 mm, addr, ptep, pte.pte);
1115 static inline void set_pte(pte_t *ptep, pte_t pte)
1117 if (sizeof(pteval_t) > sizeof(long))
1118 PVOP_VCALL3(pv_mmu_ops.set_pte, ptep,
1119 pte.pte, (u64)pte.pte >> 32);
1121 PVOP_VCALL2(pv_mmu_ops.set_pte, ptep,
1125 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
1126 pte_t *ptep, pte_t pte)
1128 if (sizeof(pteval_t) > sizeof(long))
1130 pv_mmu_ops.set_pte_at(mm, addr, ptep, pte);
1132 PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, pte.pte);
1135 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
1137 pmdval_t val = native_pmd_val(pmd);
1139 if (sizeof(pmdval_t) > sizeof(long))
1140 PVOP_VCALL3(pv_mmu_ops.set_pmd, pmdp, val, (u64)val >> 32);
1142 PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, val);
1145 #if PAGETABLE_LEVELS >= 3
1146 static inline pmd_t __pmd(pmdval_t val)
1150 if (sizeof(pmdval_t) > sizeof(long))
1151 ret = PVOP_CALL2(pmdval_t, pv_mmu_ops.make_pmd,
1152 val, (u64)val >> 32);
1154 ret = PVOP_CALL1(pmdval_t, pv_mmu_ops.make_pmd,
1157 return (pmd_t) { ret };
1160 static inline pmdval_t pmd_val(pmd_t pmd)
1164 if (sizeof(pmdval_t) > sizeof(long))
1165 ret = PVOP_CALL2(pmdval_t, pv_mmu_ops.pmd_val,
1166 pmd.pmd, (u64)pmd.pmd >> 32);
1168 ret = PVOP_CALL1(pmdval_t, pv_mmu_ops.pmd_val,
1174 static inline void set_pud(pud_t *pudp, pud_t pud)
1176 pudval_t val = native_pud_val(pud);
1178 if (sizeof(pudval_t) > sizeof(long))
1179 PVOP_VCALL3(pv_mmu_ops.set_pud, pudp,
1180 val, (u64)val >> 32);
1182 PVOP_VCALL2(pv_mmu_ops.set_pud, pudp,
1185 #if PAGETABLE_LEVELS == 4
1186 static inline pud_t __pud(pudval_t val)
1190 if (sizeof(pudval_t) > sizeof(long))
1191 ret = PVOP_CALL2(pudval_t, pv_mmu_ops.make_pud,
1192 val, (u64)val >> 32);
1194 ret = PVOP_CALL1(pudval_t, pv_mmu_ops.make_pud,
1197 return (pud_t) { ret };
1200 static inline pudval_t pud_val(pud_t pud)
1204 if (sizeof(pudval_t) > sizeof(long))
1205 ret = PVOP_CALL2(pudval_t, pv_mmu_ops.pud_val,
1206 pud.pud, (u64)pud.pud >> 32);
1208 ret = PVOP_CALL1(pudval_t, pv_mmu_ops.pud_val,
1214 static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
1216 pgdval_t val = native_pgd_val(pgd);
1218 if (sizeof(pgdval_t) > sizeof(long))
1219 PVOP_VCALL3(pv_mmu_ops.set_pgd, pgdp,
1220 val, (u64)val >> 32);
1222 PVOP_VCALL2(pv_mmu_ops.set_pgd, pgdp,
1226 static inline void pgd_clear(pgd_t *pgdp)
1228 set_pgd(pgdp, __pgd(0));
1231 static inline void pud_clear(pud_t *pudp)
1233 set_pud(pudp, __pud(0));
1236 #endif /* PAGETABLE_LEVELS == 4 */
1238 #endif /* PAGETABLE_LEVELS >= 3 */
1240 #ifdef CONFIG_X86_PAE
1241 /* Special-case pte-setting operations for PAE, which can't update a
1242 64-bit pte atomically */
1243 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
1245 PVOP_VCALL3(pv_mmu_ops.set_pte_atomic, ptep,
1246 pte.pte, pte.pte >> 32);
1249 static inline void set_pte_present(struct mm_struct *mm, unsigned long addr,
1250 pte_t *ptep, pte_t pte)
1253 pv_mmu_ops.set_pte_present(mm, addr, ptep, pte);
1256 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
1259 PVOP_VCALL3(pv_mmu_ops.pte_clear, mm, addr, ptep);
1262 static inline void pmd_clear(pmd_t *pmdp)
1264 PVOP_VCALL1(pv_mmu_ops.pmd_clear, pmdp);
1266 #else /* !CONFIG_X86_PAE */
1267 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
1272 static inline void set_pte_present(struct mm_struct *mm, unsigned long addr,
1273 pte_t *ptep, pte_t pte)
1278 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
1281 set_pte_at(mm, addr, ptep, __pte(0));
1284 static inline void pmd_clear(pmd_t *pmdp)
1286 set_pmd(pmdp, __pmd(0));
1288 #endif /* CONFIG_X86_PAE */
1290 /* Lazy mode for batching updates / context switch */
1291 enum paravirt_lazy_mode {
1297 enum paravirt_lazy_mode paravirt_get_lazy_mode(void);
1298 void paravirt_enter_lazy_cpu(void);
1299 void paravirt_leave_lazy_cpu(void);
1300 void paravirt_enter_lazy_mmu(void);
1301 void paravirt_leave_lazy_mmu(void);
1302 void paravirt_leave_lazy(enum paravirt_lazy_mode mode);
1304 #define __HAVE_ARCH_ENTER_LAZY_CPU_MODE
1305 static inline void arch_enter_lazy_cpu_mode(void)
1307 PVOP_VCALL0(pv_cpu_ops.lazy_mode.enter);
1310 static inline void arch_leave_lazy_cpu_mode(void)
1312 PVOP_VCALL0(pv_cpu_ops.lazy_mode.leave);
1315 static inline void arch_flush_lazy_cpu_mode(void)
1317 if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU)) {
1318 arch_leave_lazy_cpu_mode();
1319 arch_enter_lazy_cpu_mode();
1324 #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
1325 static inline void arch_enter_lazy_mmu_mode(void)
1327 PVOP_VCALL0(pv_mmu_ops.lazy_mode.enter);
1330 static inline void arch_leave_lazy_mmu_mode(void)
1332 PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave);
1335 static inline void arch_flush_lazy_mmu_mode(void)
1337 if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU)) {
1338 arch_leave_lazy_mmu_mode();
1339 arch_enter_lazy_mmu_mode();
1343 static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
1344 unsigned long phys, pgprot_t flags)
1346 pv_mmu_ops.set_fixmap(idx, phys, flags);
1349 void _paravirt_nop(void);
1350 #define paravirt_nop ((void *)_paravirt_nop)
1352 /* These all sit in the .parainstructions section to tell us what to patch. */
1353 struct paravirt_patch_site {
1354 u8 *instr; /* original instructions */
1355 u8 instrtype; /* type of this instruction */
1356 u8 len; /* length of original instruction */
1357 u16 clobbers; /* what registers you may clobber */
1360 extern struct paravirt_patch_site __parainstructions[],
1361 __parainstructions_end[];
1363 #ifdef CONFIG_X86_32
1364 #define PV_SAVE_REGS "pushl %%ecx; pushl %%edx;"
1365 #define PV_RESTORE_REGS "popl %%edx; popl %%ecx"
1366 #define PV_FLAGS_ARG "0"
1367 #define PV_EXTRA_CLOBBERS
1368 #define PV_VEXTRA_CLOBBERS
1370 /* We save some registers, but all of them, that's too much. We clobber all
1371 * caller saved registers but the argument parameter */
1372 #define PV_SAVE_REGS "pushq %%rdi;"
1373 #define PV_RESTORE_REGS "popq %%rdi;"
1374 #define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx"
1375 #define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx"
1376 #define PV_FLAGS_ARG "D"
1379 static inline unsigned long __raw_local_save_flags(void)
1383 asm volatile(paravirt_alt(PV_SAVE_REGS
1387 : paravirt_type(pv_irq_ops.save_fl),
1388 paravirt_clobber(CLBR_EAX)
1389 : "memory", "cc" PV_VEXTRA_CLOBBERS);
1393 static inline void raw_local_irq_restore(unsigned long f)
1395 asm volatile(paravirt_alt(PV_SAVE_REGS
1400 paravirt_type(pv_irq_ops.restore_fl),
1401 paravirt_clobber(CLBR_EAX)
1402 : "memory", "cc" PV_EXTRA_CLOBBERS);
1405 static inline void raw_local_irq_disable(void)
1407 asm volatile(paravirt_alt(PV_SAVE_REGS
1411 : paravirt_type(pv_irq_ops.irq_disable),
1412 paravirt_clobber(CLBR_EAX)
1413 : "memory", "eax", "cc" PV_EXTRA_CLOBBERS);
1416 static inline void raw_local_irq_enable(void)
1418 asm volatile(paravirt_alt(PV_SAVE_REGS
1422 : paravirt_type(pv_irq_ops.irq_enable),
1423 paravirt_clobber(CLBR_EAX)
1424 : "memory", "eax", "cc" PV_EXTRA_CLOBBERS);
1427 static inline unsigned long __raw_local_irq_save(void)
1431 f = __raw_local_save_flags();
1432 raw_local_irq_disable();
1436 /* Make sure as little as possible of this mess escapes. */
1437 #undef PARAVIRT_CALL
1451 #else /* __ASSEMBLY__ */
1453 #define _PVSITE(ptype, clobbers, ops, word, algn) \
1457 .pushsection .parainstructions,"a"; \
1466 #ifdef CONFIG_X86_64
1467 #define PV_SAVE_REGS pushq %rax; pushq %rdi; pushq %rcx; pushq %rdx
1468 #define PV_RESTORE_REGS popq %rdx; popq %rcx; popq %rdi; popq %rax
1469 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 8)
1470 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
1471 #define PARA_INDIRECT(addr) *addr(%rip)
1473 #define PV_SAVE_REGS pushl %eax; pushl %edi; pushl %ecx; pushl %edx
1474 #define PV_RESTORE_REGS popl %edx; popl %ecx; popl %edi; popl %eax
1475 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 4)
1476 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
1477 #define PARA_INDIRECT(addr) *%cs:addr
1480 #define INTERRUPT_RETURN \
1481 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE, \
1482 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_iret))
1484 #define DISABLE_INTERRUPTS(clobbers) \
1485 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
1487 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_disable); \
1490 #define ENABLE_INTERRUPTS(clobbers) \
1491 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers, \
1493 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable); \
1496 #define USERGS_SYSRET32 \
1497 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret32), \
1499 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret32))
1501 #ifdef CONFIG_X86_32
1502 #define GET_CR0_INTO_EAX \
1503 push %ecx; push %edx; \
1504 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_read_cr0); \
1507 #define ENABLE_INTERRUPTS_SYSEXIT \
1508 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit), \
1510 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
1513 #else /* !CONFIG_X86_32 */
1516 * If swapgs is used while the userspace stack is still current,
1517 * there's no way to call a pvop. The PV replacement *must* be
1518 * inlined, or the swapgs instruction must be trapped and emulated.
1520 #define SWAPGS_UNSAFE_STACK \
1521 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
1525 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
1527 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs); \
1531 #define GET_CR2_INTO_RCX \
1532 call PARA_INDIRECT(pv_mmu_ops+PV_MMU_read_cr2); \
1536 #define PARAVIRT_ADJUST_EXCEPTION_FRAME \
1537 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_adjust_exception_frame), \
1539 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_adjust_exception_frame))
1541 #define USERGS_SYSRET64 \
1542 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret64), \
1544 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret64))
1546 #define ENABLE_INTERRUPTS_SYSEXIT32 \
1547 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit), \
1549 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
1550 #endif /* CONFIG_X86_32 */
1552 #endif /* __ASSEMBLY__ */
1553 #endif /* CONFIG_PARAVIRT */
1554 #endif /* __ASM_PARAVIRT_H */