1 #ifndef ASM_X86__PARAVIRT_H
2 #define ASM_X86__PARAVIRT_H
3 /* Various instructions on x86 need to be replaced for
4 * para-virtualization: those hooks are defined here. */
10 /* Bitmask of what can be clobbered: usually at least eax. */
12 #define CLBR_EAX (1 << 0)
13 #define CLBR_ECX (1 << 1)
14 #define CLBR_EDX (1 << 2)
17 #define CLBR_RSI (1 << 3)
18 #define CLBR_RDI (1 << 4)
19 #define CLBR_R8 (1 << 5)
20 #define CLBR_R9 (1 << 6)
21 #define CLBR_R10 (1 << 7)
22 #define CLBR_R11 (1 << 8)
23 #define CLBR_ANY ((1 << 9) - 1)
24 #include <asm/desc_defs.h>
26 /* CLBR_ANY should match all regs platform has. For i386, that's just it */
27 #define CLBR_ANY ((1 << 3) - 1)
31 #include <linux/types.h>
32 #include <linux/cpumask.h>
33 #include <asm/kmap_types.h>
34 #include <asm/desc_defs.h>
45 unsigned int kernel_rpl;
46 int shared_kernel_pmd;
53 * Patch may replace one of the defined code sequences with
54 * arbitrary code, subject to the same register constraints.
55 * This generally means the code is not free to clobber any
56 * registers other than EAX. The patch function should return
57 * the number of bytes of code generated, as we nop pad the
58 * rest in generic code.
60 unsigned (*patch)(u8 type, u16 clobber, void *insnbuf,
61 unsigned long addr, unsigned len);
63 /* Basic arch-specific setup */
64 void (*arch_setup)(void);
65 char *(*memory_setup)(void);
66 void (*post_allocator_init)(void);
68 /* Print a banner to identify the environment */
74 /* Set deferred update mode, used for batching operations. */
80 void (*time_init)(void);
82 /* Set and set time of day */
83 unsigned long (*get_wallclock)(void);
84 int (*set_wallclock)(unsigned long);
86 unsigned long long (*sched_clock)(void);
87 unsigned long (*get_tsc_khz)(void);
91 /* hooks for various privileged instructions */
92 unsigned long (*get_debugreg)(int regno);
93 void (*set_debugreg)(int regno, unsigned long value);
97 unsigned long (*read_cr0)(void);
98 void (*write_cr0)(unsigned long);
100 unsigned long (*read_cr4_safe)(void);
101 unsigned long (*read_cr4)(void);
102 void (*write_cr4)(unsigned long);
105 unsigned long (*read_cr8)(void);
106 void (*write_cr8)(unsigned long);
109 /* Segment descriptor handling */
110 void (*load_tr_desc)(void);
111 void (*load_gdt)(const struct desc_ptr *);
112 void (*load_idt)(const struct desc_ptr *);
113 void (*store_gdt)(struct desc_ptr *);
114 void (*store_idt)(struct desc_ptr *);
115 void (*set_ldt)(const void *desc, unsigned entries);
116 unsigned long (*store_tr)(void);
117 void (*load_tls)(struct thread_struct *t, unsigned int cpu);
119 void (*load_gs_index)(unsigned int idx);
121 void (*write_ldt_entry)(struct desc_struct *ldt, int entrynum,
123 void (*write_gdt_entry)(struct desc_struct *,
124 int entrynum, const void *desc, int size);
125 void (*write_idt_entry)(gate_desc *,
126 int entrynum, const gate_desc *gate);
127 void (*load_sp0)(struct tss_struct *tss, struct thread_struct *t);
129 void (*set_iopl_mask)(unsigned mask);
131 void (*wbinvd)(void);
132 void (*io_delay)(void);
134 /* cpuid emulation, mostly so that caps bits can be disabled */
135 void (*cpuid)(unsigned int *eax, unsigned int *ebx,
136 unsigned int *ecx, unsigned int *edx);
138 /* MSR, PMC and TSR operations.
139 err = 0/-EFAULT. wrmsr returns 0/-EFAULT. */
140 u64 (*read_msr)(unsigned int msr, int *err);
141 int (*write_msr)(unsigned int msr, unsigned low, unsigned high);
143 u64 (*read_tsc)(void);
144 u64 (*read_pmc)(int counter);
145 unsigned long long (*read_tscp)(unsigned int *aux);
148 * Atomically enable interrupts and return to userspace. This
149 * is only ever used to return to 32-bit processes; in a
150 * 64-bit kernel, it's used for 32-on-64 compat processes, but
151 * never native 64-bit processes. (Jump, not call.)
153 void (*irq_enable_sysexit)(void);
156 * Switch to usermode gs and return to 64-bit usermode using
157 * sysret. Only used in 64-bit kernels to return to 64-bit
158 * processes. Usermode register state, including %rsp, must
159 * already be restored.
161 void (*usergs_sysret64)(void);
164 * Switch to usermode gs and return to 32-bit usermode using
165 * sysret. Used to return to 32-on-64 compat processes.
166 * Other usermode register state, including %esp, must already
169 void (*usergs_sysret32)(void);
171 /* Normal iret. Jump to this with the standard iret stack
175 void (*swapgs)(void);
177 struct pv_lazy_ops lazy_mode;
181 void (*init_IRQ)(void);
184 * Get/set interrupt state. save_fl and restore_fl are only
185 * expected to use X86_EFLAGS_IF; all other bits
186 * returned from save_fl are undefined, and may be ignored by
189 unsigned long (*save_fl)(void);
190 void (*restore_fl)(unsigned long);
191 void (*irq_disable)(void);
192 void (*irq_enable)(void);
193 void (*safe_halt)(void);
197 void (*adjust_exception_frame)(void);
202 #ifdef CONFIG_X86_LOCAL_APIC
203 void (*setup_boot_clock)(void);
204 void (*setup_secondary_clock)(void);
206 void (*startup_ipi_hook)(int phys_apicid,
207 unsigned long start_eip,
208 unsigned long start_esp);
214 * Called before/after init_mm pagetable setup. setup_start
215 * may reset %cr3, and may pre-install parts of the pagetable;
216 * pagetable setup is expected to preserve any existing
219 void (*pagetable_setup_start)(pgd_t *pgd_base);
220 void (*pagetable_setup_done)(pgd_t *pgd_base);
222 unsigned long (*read_cr2)(void);
223 void (*write_cr2)(unsigned long);
225 unsigned long (*read_cr3)(void);
226 void (*write_cr3)(unsigned long);
229 * Hooks for intercepting the creation/use/destruction of an
232 void (*activate_mm)(struct mm_struct *prev,
233 struct mm_struct *next);
234 void (*dup_mmap)(struct mm_struct *oldmm,
235 struct mm_struct *mm);
236 void (*exit_mmap)(struct mm_struct *mm);
240 void (*flush_tlb_user)(void);
241 void (*flush_tlb_kernel)(void);
242 void (*flush_tlb_single)(unsigned long addr);
243 void (*flush_tlb_others)(const cpumask_t *cpus, struct mm_struct *mm,
246 /* Hooks for allocating and freeing a pagetable top-level */
247 int (*pgd_alloc)(struct mm_struct *mm);
248 void (*pgd_free)(struct mm_struct *mm, pgd_t *pgd);
251 * Hooks for allocating/releasing pagetable pages when they're
252 * attached to a pagetable
254 void (*alloc_pte)(struct mm_struct *mm, u32 pfn);
255 void (*alloc_pmd)(struct mm_struct *mm, u32 pfn);
256 void (*alloc_pmd_clone)(u32 pfn, u32 clonepfn, u32 start, u32 count);
257 void (*alloc_pud)(struct mm_struct *mm, u32 pfn);
258 void (*release_pte)(u32 pfn);
259 void (*release_pmd)(u32 pfn);
260 void (*release_pud)(u32 pfn);
262 /* Pagetable manipulation functions */
263 void (*set_pte)(pte_t *ptep, pte_t pteval);
264 void (*set_pte_at)(struct mm_struct *mm, unsigned long addr,
265 pte_t *ptep, pte_t pteval);
266 void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval);
267 void (*pte_update)(struct mm_struct *mm, unsigned long addr,
269 void (*pte_update_defer)(struct mm_struct *mm,
270 unsigned long addr, pte_t *ptep);
272 pte_t (*ptep_modify_prot_start)(struct mm_struct *mm, unsigned long addr,
274 void (*ptep_modify_prot_commit)(struct mm_struct *mm, unsigned long addr,
275 pte_t *ptep, pte_t pte);
277 pteval_t (*pte_val)(pte_t);
278 pteval_t (*pte_flags)(pte_t);
279 pte_t (*make_pte)(pteval_t pte);
281 pgdval_t (*pgd_val)(pgd_t);
282 pgd_t (*make_pgd)(pgdval_t pgd);
284 #if PAGETABLE_LEVELS >= 3
285 #ifdef CONFIG_X86_PAE
286 void (*set_pte_atomic)(pte_t *ptep, pte_t pteval);
287 void (*set_pte_present)(struct mm_struct *mm, unsigned long addr,
288 pte_t *ptep, pte_t pte);
289 void (*pte_clear)(struct mm_struct *mm, unsigned long addr,
291 void (*pmd_clear)(pmd_t *pmdp);
293 #endif /* CONFIG_X86_PAE */
295 void (*set_pud)(pud_t *pudp, pud_t pudval);
297 pmdval_t (*pmd_val)(pmd_t);
298 pmd_t (*make_pmd)(pmdval_t pmd);
300 #if PAGETABLE_LEVELS == 4
301 pudval_t (*pud_val)(pud_t);
302 pud_t (*make_pud)(pudval_t pud);
304 void (*set_pgd)(pgd_t *pudp, pgd_t pgdval);
305 #endif /* PAGETABLE_LEVELS == 4 */
306 #endif /* PAGETABLE_LEVELS >= 3 */
308 #ifdef CONFIG_HIGHPTE
309 void *(*kmap_atomic_pte)(struct page *page, enum km_type type);
312 struct pv_lazy_ops lazy_mode;
316 /* Sometimes the physical address is a pfn, and sometimes its
317 an mfn. We can tell which is which from the index. */
318 void (*set_fixmap)(unsigned /* enum fixed_addresses */ idx,
319 unsigned long phys, pgprot_t flags);
324 int (*spin_is_locked)(struct raw_spinlock *lock);
325 int (*spin_is_contended)(struct raw_spinlock *lock);
326 void (*spin_lock)(struct raw_spinlock *lock);
327 int (*spin_trylock)(struct raw_spinlock *lock);
328 void (*spin_unlock)(struct raw_spinlock *lock);
331 /* This contains all the paravirt structures: we get a convenient
332 * number for each function using the offset which we use to indicate
334 struct paravirt_patch_template {
335 struct pv_init_ops pv_init_ops;
336 struct pv_time_ops pv_time_ops;
337 struct pv_cpu_ops pv_cpu_ops;
338 struct pv_irq_ops pv_irq_ops;
339 struct pv_apic_ops pv_apic_ops;
340 struct pv_mmu_ops pv_mmu_ops;
341 struct pv_lock_ops pv_lock_ops;
344 extern struct pv_info pv_info;
345 extern struct pv_init_ops pv_init_ops;
346 extern struct pv_time_ops pv_time_ops;
347 extern struct pv_cpu_ops pv_cpu_ops;
348 extern struct pv_irq_ops pv_irq_ops;
349 extern struct pv_apic_ops pv_apic_ops;
350 extern struct pv_mmu_ops pv_mmu_ops;
351 extern struct pv_lock_ops pv_lock_ops;
353 #define PARAVIRT_PATCH(x) \
354 (offsetof(struct paravirt_patch_template, x) / sizeof(void *))
356 #define paravirt_type(op) \
357 [paravirt_typenum] "i" (PARAVIRT_PATCH(op)), \
358 [paravirt_opptr] "m" (op)
359 #define paravirt_clobber(clobber) \
360 [paravirt_clobber] "i" (clobber)
363 * Generate some code, and mark it as patchable by the
364 * apply_paravirt() alternate instruction patcher.
366 #define _paravirt_alt(insn_string, type, clobber) \
367 "771:\n\t" insn_string "\n" "772:\n" \
368 ".pushsection .parainstructions,\"a\"\n" \
371 " .byte " type "\n" \
372 " .byte 772b-771b\n" \
373 " .short " clobber "\n" \
376 /* Generate patchable code, with the default asm parameters. */
377 #define paravirt_alt(insn_string) \
378 _paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]")
380 /* Simple instruction patching code. */
381 #define DEF_NATIVE(ops, name, code) \
382 extern const char start_##ops##_##name[], end_##ops##_##name[]; \
383 asm("start_" #ops "_" #name ": " code "; end_" #ops "_" #name ":")
385 unsigned paravirt_patch_nop(void);
386 unsigned paravirt_patch_ignore(unsigned len);
387 unsigned paravirt_patch_call(void *insnbuf,
388 const void *target, u16 tgt_clobbers,
389 unsigned long addr, u16 site_clobbers,
391 unsigned paravirt_patch_jmp(void *insnbuf, const void *target,
392 unsigned long addr, unsigned len);
393 unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf,
394 unsigned long addr, unsigned len);
396 unsigned paravirt_patch_insns(void *insnbuf, unsigned len,
397 const char *start, const char *end);
399 unsigned native_patch(u8 type, u16 clobbers, void *ibuf,
400 unsigned long addr, unsigned len);
402 int paravirt_disable_iospace(void);
405 * This generates an indirect call based on the operation type number.
406 * The type number, computed in PARAVIRT_PATCH, is derived from the
407 * offset into the paravirt_patch_template structure, and can therefore be
408 * freely converted back into a structure offset.
410 #define PARAVIRT_CALL "call *%[paravirt_opptr];"
413 * These macros are intended to wrap calls through one of the paravirt
414 * ops structs, so that they can be later identified and patched at
417 * Normally, a call to a pv_op function is a simple indirect call:
418 * (pv_op_struct.operations)(args...).
420 * Unfortunately, this is a relatively slow operation for modern CPUs,
421 * because it cannot necessarily determine what the destination
422 * address is. In this case, the address is a runtime constant, so at
423 * the very least we can patch the call to e a simple direct call, or
424 * ideally, patch an inline implementation into the callsite. (Direct
425 * calls are essentially free, because the call and return addresses
426 * are completely predictable.)
428 * For i386, these macros rely on the standard gcc "regparm(3)" calling
429 * convention, in which the first three arguments are placed in %eax,
430 * %edx, %ecx (in that order), and the remaining arguments are placed
431 * on the stack. All caller-save registers (eax,edx,ecx) are expected
432 * to be modified (either clobbered or used for return values).
433 * X86_64, on the other hand, already specifies a register-based calling
434 * conventions, returning at %rax, with parameteres going on %rdi, %rsi,
435 * %rdx, and %rcx. Note that for this reason, x86_64 does not need any
436 * special handling for dealing with 4 arguments, unlike i386.
437 * However, x86_64 also have to clobber all caller saved registers, which
438 * unfortunately, are quite a bit (r8 - r11)
440 * The call instruction itself is marked by placing its start address
441 * and size into the .parainstructions section, so that
442 * apply_paravirt() in arch/i386/kernel/alternative.c can do the
443 * appropriate patching under the control of the backend pv_init_ops
446 * Unfortunately there's no way to get gcc to generate the args setup
447 * for the call, and then allow the call itself to be generated by an
448 * inline asm. Because of this, we must do the complete arg setup and
449 * return value handling from within these macros. This is fairly
452 * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments.
453 * It could be extended to more arguments, but there would be little
454 * to be gained from that. For each number of arguments, there are
455 * the two VCALL and CALL variants for void and non-void functions.
457 * When there is a return value, the invoker of the macro must specify
458 * the return type. The macro then uses sizeof() on that type to
459 * determine whether its a 32 or 64 bit value, and places the return
460 * in the right register(s) (just %eax for 32-bit, and %edx:%eax for
461 * 64-bit). For x86_64 machines, it just returns at %rax regardless of
462 * the return value size.
464 * 64-bit arguments are passed as a pair of adjacent 32-bit arguments
465 * i386 also passes 64-bit arguments as a pair of adjacent 32-bit arguments
468 * Small structures are passed and returned in registers. The macro
469 * calling convention can't directly deal with this, so the wrapper
470 * functions must do this.
472 * These PVOP_* macros are only defined within this header. This
473 * means that all uses must be wrapped in inline functions. This also
474 * makes sure the incoming and outgoing types are always correct.
477 #define PVOP_VCALL_ARGS unsigned long __eax, __edx, __ecx
478 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS
479 #define PVOP_VCALL_CLOBBERS "=a" (__eax), "=d" (__edx), \
481 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS
482 #define EXTRA_CLOBBERS
483 #define VEXTRA_CLOBBERS
485 #define PVOP_VCALL_ARGS unsigned long __edi, __esi, __edx, __ecx
486 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS, __eax
487 #define PVOP_VCALL_CLOBBERS "=D" (__edi), \
488 "=S" (__esi), "=d" (__edx), \
491 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS, "=a" (__eax)
493 #define EXTRA_CLOBBERS , "r8", "r9", "r10", "r11"
494 #define VEXTRA_CLOBBERS , "rax", "r8", "r9", "r10", "r11"
497 #ifdef CONFIG_PARAVIRT_DEBUG
498 #define PVOP_TEST_NULL(op) BUG_ON(op == NULL)
500 #define PVOP_TEST_NULL(op) ((void)op)
503 #define __PVOP_CALL(rettype, op, pre, post, ...) \
507 PVOP_TEST_NULL(op); \
508 /* This is 32-bit specific, but is okay in 64-bit */ \
509 /* since this condition will never hold */ \
510 if (sizeof(rettype) > sizeof(unsigned long)) { \
512 paravirt_alt(PARAVIRT_CALL) \
514 : PVOP_CALL_CLOBBERS \
515 : paravirt_type(op), \
516 paravirt_clobber(CLBR_ANY), \
518 : "memory", "cc" EXTRA_CLOBBERS); \
519 __ret = (rettype)((((u64)__edx) << 32) | __eax); \
522 paravirt_alt(PARAVIRT_CALL) \
524 : PVOP_CALL_CLOBBERS \
525 : paravirt_type(op), \
526 paravirt_clobber(CLBR_ANY), \
528 : "memory", "cc" EXTRA_CLOBBERS); \
529 __ret = (rettype)__eax; \
533 #define __PVOP_VCALL(op, pre, post, ...) \
536 PVOP_TEST_NULL(op); \
538 paravirt_alt(PARAVIRT_CALL) \
540 : PVOP_VCALL_CLOBBERS \
541 : paravirt_type(op), \
542 paravirt_clobber(CLBR_ANY), \
544 : "memory", "cc" VEXTRA_CLOBBERS); \
547 #define PVOP_CALL0(rettype, op) \
548 __PVOP_CALL(rettype, op, "", "")
549 #define PVOP_VCALL0(op) \
550 __PVOP_VCALL(op, "", "")
552 #define PVOP_CALL1(rettype, op, arg1) \
553 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)))
554 #define PVOP_VCALL1(op, arg1) \
555 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)))
557 #define PVOP_CALL2(rettype, op, arg1, arg2) \
558 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
559 "1" ((unsigned long)(arg2)))
560 #define PVOP_VCALL2(op, arg1, arg2) \
561 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
562 "1" ((unsigned long)(arg2)))
564 #define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \
565 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
566 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)))
567 #define PVOP_VCALL3(op, arg1, arg2, arg3) \
568 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
569 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)))
571 /* This is the only difference in x86_64. We can make it much simpler */
573 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
574 __PVOP_CALL(rettype, op, \
575 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
576 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \
577 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
578 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
580 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
581 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \
582 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
584 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
585 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
586 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)), \
587 "3"((unsigned long)(arg4)))
588 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
589 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
590 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)), \
591 "3"((unsigned long)(arg4)))
594 static inline int paravirt_enabled(void)
596 return pv_info.paravirt_enabled;
599 static inline void load_sp0(struct tss_struct *tss,
600 struct thread_struct *thread)
602 PVOP_VCALL2(pv_cpu_ops.load_sp0, tss, thread);
605 #define ARCH_SETUP pv_init_ops.arch_setup();
606 static inline unsigned long get_wallclock(void)
608 return PVOP_CALL0(unsigned long, pv_time_ops.get_wallclock);
611 static inline int set_wallclock(unsigned long nowtime)
613 return PVOP_CALL1(int, pv_time_ops.set_wallclock, nowtime);
616 static inline void (*choose_time_init(void))(void)
618 return pv_time_ops.time_init;
621 /* The paravirtualized CPUID instruction. */
622 static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
623 unsigned int *ecx, unsigned int *edx)
625 PVOP_VCALL4(pv_cpu_ops.cpuid, eax, ebx, ecx, edx);
629 * These special macros can be used to get or set a debugging register
631 static inline unsigned long paravirt_get_debugreg(int reg)
633 return PVOP_CALL1(unsigned long, pv_cpu_ops.get_debugreg, reg);
635 #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
636 static inline void set_debugreg(unsigned long val, int reg)
638 PVOP_VCALL2(pv_cpu_ops.set_debugreg, reg, val);
641 static inline void clts(void)
643 PVOP_VCALL0(pv_cpu_ops.clts);
646 static inline unsigned long read_cr0(void)
648 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr0);
651 static inline void write_cr0(unsigned long x)
653 PVOP_VCALL1(pv_cpu_ops.write_cr0, x);
656 static inline unsigned long read_cr2(void)
658 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr2);
661 static inline void write_cr2(unsigned long x)
663 PVOP_VCALL1(pv_mmu_ops.write_cr2, x);
666 static inline unsigned long read_cr3(void)
668 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr3);
671 static inline void write_cr3(unsigned long x)
673 PVOP_VCALL1(pv_mmu_ops.write_cr3, x);
676 static inline unsigned long read_cr4(void)
678 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4);
680 static inline unsigned long read_cr4_safe(void)
682 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4_safe);
685 static inline void write_cr4(unsigned long x)
687 PVOP_VCALL1(pv_cpu_ops.write_cr4, x);
691 static inline unsigned long read_cr8(void)
693 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr8);
696 static inline void write_cr8(unsigned long x)
698 PVOP_VCALL1(pv_cpu_ops.write_cr8, x);
702 static inline void raw_safe_halt(void)
704 PVOP_VCALL0(pv_irq_ops.safe_halt);
707 static inline void halt(void)
709 PVOP_VCALL0(pv_irq_ops.safe_halt);
712 static inline void wbinvd(void)
714 PVOP_VCALL0(pv_cpu_ops.wbinvd);
717 #define get_kernel_rpl() (pv_info.kernel_rpl)
719 static inline u64 paravirt_read_msr(unsigned msr, int *err)
721 return PVOP_CALL2(u64, pv_cpu_ops.read_msr, msr, err);
723 static inline int paravirt_write_msr(unsigned msr, unsigned low, unsigned high)
725 return PVOP_CALL3(int, pv_cpu_ops.write_msr, msr, low, high);
728 /* These should all do BUG_ON(_err), but our headers are too tangled. */
729 #define rdmsr(msr, val1, val2) \
732 u64 _l = paravirt_read_msr(msr, &_err); \
737 #define wrmsr(msr, val1, val2) \
739 paravirt_write_msr(msr, val1, val2); \
742 #define rdmsrl(msr, val) \
745 val = paravirt_read_msr(msr, &_err); \
748 #define wrmsrl(msr, val) wrmsr(msr, (u32)((u64)(val)), ((u64)(val))>>32)
749 #define wrmsr_safe(msr, a, b) paravirt_write_msr(msr, a, b)
751 /* rdmsr with exception handling */
752 #define rdmsr_safe(msr, a, b) \
755 u64 _l = paravirt_read_msr(msr, &_err); \
761 static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
765 *p = paravirt_read_msr(msr, &err);
769 static inline u64 paravirt_read_tsc(void)
771 return PVOP_CALL0(u64, pv_cpu_ops.read_tsc);
774 #define rdtscl(low) \
776 u64 _l = paravirt_read_tsc(); \
780 #define rdtscll(val) (val = paravirt_read_tsc())
782 static inline unsigned long long paravirt_sched_clock(void)
784 return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock);
786 #define calibrate_tsc() (pv_time_ops.get_tsc_khz())
788 static inline unsigned long long paravirt_read_pmc(int counter)
790 return PVOP_CALL1(u64, pv_cpu_ops.read_pmc, counter);
793 #define rdpmc(counter, low, high) \
795 u64 _l = paravirt_read_pmc(counter); \
800 static inline unsigned long long paravirt_rdtscp(unsigned int *aux)
802 return PVOP_CALL1(u64, pv_cpu_ops.read_tscp, aux);
805 #define rdtscp(low, high, aux) \
808 unsigned long __val = paravirt_rdtscp(&__aux); \
809 (low) = (u32)__val; \
810 (high) = (u32)(__val >> 32); \
814 #define rdtscpll(val, aux) \
816 unsigned long __aux; \
817 val = paravirt_rdtscp(&__aux); \
821 static inline void load_TR_desc(void)
823 PVOP_VCALL0(pv_cpu_ops.load_tr_desc);
825 static inline void load_gdt(const struct desc_ptr *dtr)
827 PVOP_VCALL1(pv_cpu_ops.load_gdt, dtr);
829 static inline void load_idt(const struct desc_ptr *dtr)
831 PVOP_VCALL1(pv_cpu_ops.load_idt, dtr);
833 static inline void set_ldt(const void *addr, unsigned entries)
835 PVOP_VCALL2(pv_cpu_ops.set_ldt, addr, entries);
837 static inline void store_gdt(struct desc_ptr *dtr)
839 PVOP_VCALL1(pv_cpu_ops.store_gdt, dtr);
841 static inline void store_idt(struct desc_ptr *dtr)
843 PVOP_VCALL1(pv_cpu_ops.store_idt, dtr);
845 static inline unsigned long paravirt_store_tr(void)
847 return PVOP_CALL0(unsigned long, pv_cpu_ops.store_tr);
849 #define store_tr(tr) ((tr) = paravirt_store_tr())
850 static inline void load_TLS(struct thread_struct *t, unsigned cpu)
852 PVOP_VCALL2(pv_cpu_ops.load_tls, t, cpu);
856 static inline void load_gs_index(unsigned int gs)
858 PVOP_VCALL1(pv_cpu_ops.load_gs_index, gs);
862 static inline void write_ldt_entry(struct desc_struct *dt, int entry,
865 PVOP_VCALL3(pv_cpu_ops.write_ldt_entry, dt, entry, desc);
868 static inline void write_gdt_entry(struct desc_struct *dt, int entry,
869 void *desc, int type)
871 PVOP_VCALL4(pv_cpu_ops.write_gdt_entry, dt, entry, desc, type);
874 static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
876 PVOP_VCALL3(pv_cpu_ops.write_idt_entry, dt, entry, g);
878 static inline void set_iopl_mask(unsigned mask)
880 PVOP_VCALL1(pv_cpu_ops.set_iopl_mask, mask);
883 /* The paravirtualized I/O functions */
884 static inline void slow_down_io(void)
886 pv_cpu_ops.io_delay();
887 #ifdef REALLY_SLOW_IO
888 pv_cpu_ops.io_delay();
889 pv_cpu_ops.io_delay();
890 pv_cpu_ops.io_delay();
894 #ifdef CONFIG_X86_LOCAL_APIC
895 static inline void setup_boot_clock(void)
897 PVOP_VCALL0(pv_apic_ops.setup_boot_clock);
900 static inline void setup_secondary_clock(void)
902 PVOP_VCALL0(pv_apic_ops.setup_secondary_clock);
906 static inline void paravirt_post_allocator_init(void)
908 if (pv_init_ops.post_allocator_init)
909 (*pv_init_ops.post_allocator_init)();
912 static inline void paravirt_pagetable_setup_start(pgd_t *base)
914 (*pv_mmu_ops.pagetable_setup_start)(base);
917 static inline void paravirt_pagetable_setup_done(pgd_t *base)
919 (*pv_mmu_ops.pagetable_setup_done)(base);
923 static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip,
924 unsigned long start_esp)
926 PVOP_VCALL3(pv_apic_ops.startup_ipi_hook,
927 phys_apicid, start_eip, start_esp);
931 static inline void paravirt_activate_mm(struct mm_struct *prev,
932 struct mm_struct *next)
934 PVOP_VCALL2(pv_mmu_ops.activate_mm, prev, next);
937 static inline void arch_dup_mmap(struct mm_struct *oldmm,
938 struct mm_struct *mm)
940 PVOP_VCALL2(pv_mmu_ops.dup_mmap, oldmm, mm);
943 static inline void arch_exit_mmap(struct mm_struct *mm)
945 PVOP_VCALL1(pv_mmu_ops.exit_mmap, mm);
948 static inline void __flush_tlb(void)
950 PVOP_VCALL0(pv_mmu_ops.flush_tlb_user);
952 static inline void __flush_tlb_global(void)
954 PVOP_VCALL0(pv_mmu_ops.flush_tlb_kernel);
956 static inline void __flush_tlb_single(unsigned long addr)
958 PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr);
961 static inline void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm,
964 PVOP_VCALL3(pv_mmu_ops.flush_tlb_others, &cpumask, mm, va);
967 static inline int paravirt_pgd_alloc(struct mm_struct *mm)
969 return PVOP_CALL1(int, pv_mmu_ops.pgd_alloc, mm);
972 static inline void paravirt_pgd_free(struct mm_struct *mm, pgd_t *pgd)
974 PVOP_VCALL2(pv_mmu_ops.pgd_free, mm, pgd);
977 static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned pfn)
979 PVOP_VCALL2(pv_mmu_ops.alloc_pte, mm, pfn);
981 static inline void paravirt_release_pte(unsigned pfn)
983 PVOP_VCALL1(pv_mmu_ops.release_pte, pfn);
986 static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned pfn)
988 PVOP_VCALL2(pv_mmu_ops.alloc_pmd, mm, pfn);
991 static inline void paravirt_alloc_pmd_clone(unsigned pfn, unsigned clonepfn,
992 unsigned start, unsigned count)
994 PVOP_VCALL4(pv_mmu_ops.alloc_pmd_clone, pfn, clonepfn, start, count);
996 static inline void paravirt_release_pmd(unsigned pfn)
998 PVOP_VCALL1(pv_mmu_ops.release_pmd, pfn);
1001 static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned pfn)
1003 PVOP_VCALL2(pv_mmu_ops.alloc_pud, mm, pfn);
1005 static inline void paravirt_release_pud(unsigned pfn)
1007 PVOP_VCALL1(pv_mmu_ops.release_pud, pfn);
1010 #ifdef CONFIG_HIGHPTE
1011 static inline void *kmap_atomic_pte(struct page *page, enum km_type type)
1014 ret = PVOP_CALL2(unsigned long, pv_mmu_ops.kmap_atomic_pte, page, type);
1019 static inline void pte_update(struct mm_struct *mm, unsigned long addr,
1022 PVOP_VCALL3(pv_mmu_ops.pte_update, mm, addr, ptep);
1025 static inline void pte_update_defer(struct mm_struct *mm, unsigned long addr,
1028 PVOP_VCALL3(pv_mmu_ops.pte_update_defer, mm, addr, ptep);
1031 static inline pte_t __pte(pteval_t val)
1035 if (sizeof(pteval_t) > sizeof(long))
1036 ret = PVOP_CALL2(pteval_t,
1037 pv_mmu_ops.make_pte,
1038 val, (u64)val >> 32);
1040 ret = PVOP_CALL1(pteval_t,
1041 pv_mmu_ops.make_pte,
1044 return (pte_t) { .pte = ret };
1047 static inline pteval_t pte_val(pte_t pte)
1051 if (sizeof(pteval_t) > sizeof(long))
1052 ret = PVOP_CALL2(pteval_t, pv_mmu_ops.pte_val,
1053 pte.pte, (u64)pte.pte >> 32);
1055 ret = PVOP_CALL1(pteval_t, pv_mmu_ops.pte_val,
1061 static inline pteval_t pte_flags(pte_t pte)
1065 if (sizeof(pteval_t) > sizeof(long))
1066 ret = PVOP_CALL2(pteval_t, pv_mmu_ops.pte_flags,
1067 pte.pte, (u64)pte.pte >> 32);
1069 ret = PVOP_CALL1(pteval_t, pv_mmu_ops.pte_flags,
1072 #ifdef CONFIG_PARAVIRT_DEBUG
1073 BUG_ON(ret & PTE_PFN_MASK);
1078 static inline pgd_t __pgd(pgdval_t val)
1082 if (sizeof(pgdval_t) > sizeof(long))
1083 ret = PVOP_CALL2(pgdval_t, pv_mmu_ops.make_pgd,
1084 val, (u64)val >> 32);
1086 ret = PVOP_CALL1(pgdval_t, pv_mmu_ops.make_pgd,
1089 return (pgd_t) { ret };
1092 static inline pgdval_t pgd_val(pgd_t pgd)
1096 if (sizeof(pgdval_t) > sizeof(long))
1097 ret = PVOP_CALL2(pgdval_t, pv_mmu_ops.pgd_val,
1098 pgd.pgd, (u64)pgd.pgd >> 32);
1100 ret = PVOP_CALL1(pgdval_t, pv_mmu_ops.pgd_val,
1106 #define __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
1107 static inline pte_t ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr,
1112 ret = PVOP_CALL3(pteval_t, pv_mmu_ops.ptep_modify_prot_start,
1115 return (pte_t) { .pte = ret };
1118 static inline void ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
1119 pte_t *ptep, pte_t pte)
1121 if (sizeof(pteval_t) > sizeof(long))
1123 pv_mmu_ops.ptep_modify_prot_commit(mm, addr, ptep, pte);
1125 PVOP_VCALL4(pv_mmu_ops.ptep_modify_prot_commit,
1126 mm, addr, ptep, pte.pte);
1129 static inline void set_pte(pte_t *ptep, pte_t pte)
1131 if (sizeof(pteval_t) > sizeof(long))
1132 PVOP_VCALL3(pv_mmu_ops.set_pte, ptep,
1133 pte.pte, (u64)pte.pte >> 32);
1135 PVOP_VCALL2(pv_mmu_ops.set_pte, ptep,
1139 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
1140 pte_t *ptep, pte_t pte)
1142 if (sizeof(pteval_t) > sizeof(long))
1144 pv_mmu_ops.set_pte_at(mm, addr, ptep, pte);
1146 PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, pte.pte);
1149 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
1151 pmdval_t val = native_pmd_val(pmd);
1153 if (sizeof(pmdval_t) > sizeof(long))
1154 PVOP_VCALL3(pv_mmu_ops.set_pmd, pmdp, val, (u64)val >> 32);
1156 PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, val);
1159 #if PAGETABLE_LEVELS >= 3
1160 static inline pmd_t __pmd(pmdval_t val)
1164 if (sizeof(pmdval_t) > sizeof(long))
1165 ret = PVOP_CALL2(pmdval_t, pv_mmu_ops.make_pmd,
1166 val, (u64)val >> 32);
1168 ret = PVOP_CALL1(pmdval_t, pv_mmu_ops.make_pmd,
1171 return (pmd_t) { ret };
1174 static inline pmdval_t pmd_val(pmd_t pmd)
1178 if (sizeof(pmdval_t) > sizeof(long))
1179 ret = PVOP_CALL2(pmdval_t, pv_mmu_ops.pmd_val,
1180 pmd.pmd, (u64)pmd.pmd >> 32);
1182 ret = PVOP_CALL1(pmdval_t, pv_mmu_ops.pmd_val,
1188 static inline void set_pud(pud_t *pudp, pud_t pud)
1190 pudval_t val = native_pud_val(pud);
1192 if (sizeof(pudval_t) > sizeof(long))
1193 PVOP_VCALL3(pv_mmu_ops.set_pud, pudp,
1194 val, (u64)val >> 32);
1196 PVOP_VCALL2(pv_mmu_ops.set_pud, pudp,
1199 #if PAGETABLE_LEVELS == 4
1200 static inline pud_t __pud(pudval_t val)
1204 if (sizeof(pudval_t) > sizeof(long))
1205 ret = PVOP_CALL2(pudval_t, pv_mmu_ops.make_pud,
1206 val, (u64)val >> 32);
1208 ret = PVOP_CALL1(pudval_t, pv_mmu_ops.make_pud,
1211 return (pud_t) { ret };
1214 static inline pudval_t pud_val(pud_t pud)
1218 if (sizeof(pudval_t) > sizeof(long))
1219 ret = PVOP_CALL2(pudval_t, pv_mmu_ops.pud_val,
1220 pud.pud, (u64)pud.pud >> 32);
1222 ret = PVOP_CALL1(pudval_t, pv_mmu_ops.pud_val,
1228 static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
1230 pgdval_t val = native_pgd_val(pgd);
1232 if (sizeof(pgdval_t) > sizeof(long))
1233 PVOP_VCALL3(pv_mmu_ops.set_pgd, pgdp,
1234 val, (u64)val >> 32);
1236 PVOP_VCALL2(pv_mmu_ops.set_pgd, pgdp,
1240 static inline void pgd_clear(pgd_t *pgdp)
1242 set_pgd(pgdp, __pgd(0));
1245 static inline void pud_clear(pud_t *pudp)
1247 set_pud(pudp, __pud(0));
1250 #endif /* PAGETABLE_LEVELS == 4 */
1252 #endif /* PAGETABLE_LEVELS >= 3 */
1254 #ifdef CONFIG_X86_PAE
1255 /* Special-case pte-setting operations for PAE, which can't update a
1256 64-bit pte atomically */
1257 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
1259 PVOP_VCALL3(pv_mmu_ops.set_pte_atomic, ptep,
1260 pte.pte, pte.pte >> 32);
1263 static inline void set_pte_present(struct mm_struct *mm, unsigned long addr,
1264 pte_t *ptep, pte_t pte)
1267 pv_mmu_ops.set_pte_present(mm, addr, ptep, pte);
1270 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
1273 PVOP_VCALL3(pv_mmu_ops.pte_clear, mm, addr, ptep);
1276 static inline void pmd_clear(pmd_t *pmdp)
1278 PVOP_VCALL1(pv_mmu_ops.pmd_clear, pmdp);
1280 #else /* !CONFIG_X86_PAE */
1281 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
1286 static inline void set_pte_present(struct mm_struct *mm, unsigned long addr,
1287 pte_t *ptep, pte_t pte)
1292 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
1295 set_pte_at(mm, addr, ptep, __pte(0));
1298 static inline void pmd_clear(pmd_t *pmdp)
1300 set_pmd(pmdp, __pmd(0));
1302 #endif /* CONFIG_X86_PAE */
1304 /* Lazy mode for batching updates / context switch */
1305 enum paravirt_lazy_mode {
1311 enum paravirt_lazy_mode paravirt_get_lazy_mode(void);
1312 void paravirt_enter_lazy_cpu(void);
1313 void paravirt_leave_lazy_cpu(void);
1314 void paravirt_enter_lazy_mmu(void);
1315 void paravirt_leave_lazy_mmu(void);
1316 void paravirt_leave_lazy(enum paravirt_lazy_mode mode);
1318 #define __HAVE_ARCH_ENTER_LAZY_CPU_MODE
1319 static inline void arch_enter_lazy_cpu_mode(void)
1321 PVOP_VCALL0(pv_cpu_ops.lazy_mode.enter);
1324 static inline void arch_leave_lazy_cpu_mode(void)
1326 PVOP_VCALL0(pv_cpu_ops.lazy_mode.leave);
1329 static inline void arch_flush_lazy_cpu_mode(void)
1331 if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU)) {
1332 arch_leave_lazy_cpu_mode();
1333 arch_enter_lazy_cpu_mode();
1338 #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
1339 static inline void arch_enter_lazy_mmu_mode(void)
1341 PVOP_VCALL0(pv_mmu_ops.lazy_mode.enter);
1344 static inline void arch_leave_lazy_mmu_mode(void)
1346 PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave);
1349 static inline void arch_flush_lazy_mmu_mode(void)
1351 if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU)) {
1352 arch_leave_lazy_mmu_mode();
1353 arch_enter_lazy_mmu_mode();
1357 static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
1358 unsigned long phys, pgprot_t flags)
1360 pv_mmu_ops.set_fixmap(idx, phys, flags);
1363 void _paravirt_nop(void);
1364 #define paravirt_nop ((void *)_paravirt_nop)
1366 void paravirt_use_bytelocks(void);
1370 static inline int __raw_spin_is_locked(struct raw_spinlock *lock)
1372 return PVOP_CALL1(int, pv_lock_ops.spin_is_locked, lock);
1375 static inline int __raw_spin_is_contended(struct raw_spinlock *lock)
1377 return PVOP_CALL1(int, pv_lock_ops.spin_is_contended, lock);
1380 static __always_inline void __raw_spin_lock(struct raw_spinlock *lock)
1382 PVOP_VCALL1(pv_lock_ops.spin_lock, lock);
1385 static __always_inline int __raw_spin_trylock(struct raw_spinlock *lock)
1387 return PVOP_CALL1(int, pv_lock_ops.spin_trylock, lock);
1390 static __always_inline void __raw_spin_unlock(struct raw_spinlock *lock)
1392 PVOP_VCALL1(pv_lock_ops.spin_unlock, lock);
1397 /* These all sit in the .parainstructions section to tell us what to patch. */
1398 struct paravirt_patch_site {
1399 u8 *instr; /* original instructions */
1400 u8 instrtype; /* type of this instruction */
1401 u8 len; /* length of original instruction */
1402 u16 clobbers; /* what registers you may clobber */
1405 extern struct paravirt_patch_site __parainstructions[],
1406 __parainstructions_end[];
1408 #ifdef CONFIG_X86_32
1409 #define PV_SAVE_REGS "pushl %%ecx; pushl %%edx;"
1410 #define PV_RESTORE_REGS "popl %%edx; popl %%ecx"
1411 #define PV_FLAGS_ARG "0"
1412 #define PV_EXTRA_CLOBBERS
1413 #define PV_VEXTRA_CLOBBERS
1415 /* We save some registers, but all of them, that's too much. We clobber all
1416 * caller saved registers but the argument parameter */
1417 #define PV_SAVE_REGS "pushq %%rdi;"
1418 #define PV_RESTORE_REGS "popq %%rdi;"
1419 #define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx", "rsi"
1420 #define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx", "rsi"
1421 #define PV_FLAGS_ARG "D"
1424 static inline unsigned long __raw_local_save_flags(void)
1428 asm volatile(paravirt_alt(PV_SAVE_REGS
1432 : paravirt_type(pv_irq_ops.save_fl),
1433 paravirt_clobber(CLBR_EAX)
1434 : "memory", "cc" PV_VEXTRA_CLOBBERS);
1438 static inline void raw_local_irq_restore(unsigned long f)
1440 asm volatile(paravirt_alt(PV_SAVE_REGS
1445 paravirt_type(pv_irq_ops.restore_fl),
1446 paravirt_clobber(CLBR_EAX)
1447 : "memory", "cc" PV_EXTRA_CLOBBERS);
1450 static inline void raw_local_irq_disable(void)
1452 asm volatile(paravirt_alt(PV_SAVE_REGS
1456 : paravirt_type(pv_irq_ops.irq_disable),
1457 paravirt_clobber(CLBR_EAX)
1458 : "memory", "eax", "cc" PV_EXTRA_CLOBBERS);
1461 static inline void raw_local_irq_enable(void)
1463 asm volatile(paravirt_alt(PV_SAVE_REGS
1467 : paravirt_type(pv_irq_ops.irq_enable),
1468 paravirt_clobber(CLBR_EAX)
1469 : "memory", "eax", "cc" PV_EXTRA_CLOBBERS);
1472 static inline unsigned long __raw_local_irq_save(void)
1476 f = __raw_local_save_flags();
1477 raw_local_irq_disable();
1482 /* Make sure as little as possible of this mess escapes. */
1483 #undef PARAVIRT_CALL
1497 #else /* __ASSEMBLY__ */
1499 #define _PVSITE(ptype, clobbers, ops, word, algn) \
1503 .pushsection .parainstructions,"a"; \
1512 #ifdef CONFIG_X86_64
1513 #define PV_SAVE_REGS \
1523 #define PV_RESTORE_REGS \
1533 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 8)
1534 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
1535 #define PARA_INDIRECT(addr) *addr(%rip)
1537 #define PV_SAVE_REGS pushl %eax; pushl %edi; pushl %ecx; pushl %edx
1538 #define PV_RESTORE_REGS popl %edx; popl %ecx; popl %edi; popl %eax
1539 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 4)
1540 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
1541 #define PARA_INDIRECT(addr) *%cs:addr
1544 #define INTERRUPT_RETURN \
1545 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE, \
1546 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_iret))
1548 #define DISABLE_INTERRUPTS(clobbers) \
1549 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
1551 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_disable); \
1554 #define ENABLE_INTERRUPTS(clobbers) \
1555 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers, \
1557 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable); \
1560 #define USERGS_SYSRET32 \
1561 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret32), \
1563 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret32))
1565 #ifdef CONFIG_X86_32
1566 #define GET_CR0_INTO_EAX \
1567 push %ecx; push %edx; \
1568 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_read_cr0); \
1571 #define ENABLE_INTERRUPTS_SYSEXIT \
1572 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit), \
1574 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
1577 #else /* !CONFIG_X86_32 */
1580 * If swapgs is used while the userspace stack is still current,
1581 * there's no way to call a pvop. The PV replacement *must* be
1582 * inlined, or the swapgs instruction must be trapped and emulated.
1584 #define SWAPGS_UNSAFE_STACK \
1585 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
1589 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
1591 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs); \
1595 #define GET_CR2_INTO_RCX \
1596 call PARA_INDIRECT(pv_mmu_ops+PV_MMU_read_cr2); \
1600 #define PARAVIRT_ADJUST_EXCEPTION_FRAME \
1601 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_adjust_exception_frame), \
1603 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_adjust_exception_frame))
1605 #define USERGS_SYSRET64 \
1606 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret64), \
1608 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret64))
1610 #define ENABLE_INTERRUPTS_SYSEXIT32 \
1611 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit), \
1613 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
1614 #endif /* CONFIG_X86_32 */
1616 #endif /* __ASSEMBLY__ */
1617 #endif /* CONFIG_PARAVIRT */
1618 #endif /* ASM_X86__PARAVIRT_H */