4 * linux/include/linux/ide.h
6 * Copyright (C) 1994-2002 Linus Torvalds & authors
9 #include <linux/init.h>
10 #include <linux/ioport.h>
11 #include <linux/hdreg.h>
12 #include <linux/hdsmart.h>
13 #include <linux/blkdev.h>
14 #include <linux/proc_fs.h>
15 #include <linux/interrupt.h>
16 #include <linux/bitops.h>
17 #include <linux/bio.h>
18 #include <linux/device.h>
19 #include <linux/pci.h>
20 #include <linux/completion.h>
21 #ifdef CONFIG_BLK_DEV_IDEACPI
22 #include <acpi/acpi.h>
24 #include <asm/byteorder.h>
25 #include <asm/system.h>
27 #include <asm/semaphore.h>
28 #include <asm/mutex.h>
30 /******************************************************************************
31 * IDE driver configuration options (play with these as desired):
33 * REALLY_SLOW_IO can be defined in ide.c and ide-cd.c, if necessary
35 #define INITIAL_MULT_COUNT 0 /* off=0; on=2,4,8,16,32, etc.. */
37 #ifndef SUPPORT_SLOW_DATA_PORTS /* 1 to support slow data ports */
38 #define SUPPORT_SLOW_DATA_PORTS 1 /* 0 to reduce kernel size */
40 #ifndef SUPPORT_VLB_SYNC /* 1 to support weird 32-bit chips */
41 #define SUPPORT_VLB_SYNC 1 /* 0 to reduce kernel size */
43 #ifndef OK_TO_RESET_CONTROLLER /* 1 needed for good error recovery */
44 #define OK_TO_RESET_CONTROLLER 1 /* 0 for use with AH2372A/B interface */
47 #ifndef DISABLE_IRQ_NOSYNC
48 #define DISABLE_IRQ_NOSYNC 0
52 * Used to indicate "no IRQ", should be a value that cannot be an IRQ
56 #define IDE_NO_IRQ (-1)
59 * "No user-serviceable parts" beyond this point :)
60 *****************************************************************************/
62 typedef unsigned char byte; /* used everywhere */
65 * Probably not wise to fiddle with these
67 #define ERROR_MAX 8 /* Max read/write errors per sector */
68 #define ERROR_RESET 3 /* Reset controller every 4th retry */
69 #define ERROR_RECAL 1 /* Recalibrate every 2nd retry */
74 #define IDE_TUNE_NOAUTO 2
75 #define IDE_TUNE_AUTO 1
76 #define IDE_TUNE_DEFAULT 0
82 #define DMA_PIO_RETRY 1 /* retrying in PIO */
84 #define HWIF(drive) ((ide_hwif_t *)((drive)->hwif))
85 #define HWGROUP(drive) ((ide_hwgroup_t *)(HWIF(drive)->hwgroup))
88 * Definitions for accessing IDE controller registers
90 #define IDE_NR_PORTS (10)
92 #define IDE_DATA_OFFSET (0)
93 #define IDE_ERROR_OFFSET (1)
94 #define IDE_NSECTOR_OFFSET (2)
95 #define IDE_SECTOR_OFFSET (3)
96 #define IDE_LCYL_OFFSET (4)
97 #define IDE_HCYL_OFFSET (5)
98 #define IDE_SELECT_OFFSET (6)
99 #define IDE_STATUS_OFFSET (7)
100 #define IDE_CONTROL_OFFSET (8)
101 #define IDE_IRQ_OFFSET (9)
103 #define IDE_FEATURE_OFFSET IDE_ERROR_OFFSET
104 #define IDE_COMMAND_OFFSET IDE_STATUS_OFFSET
106 #define IDE_DATA_REG (HWIF(drive)->io_ports[IDE_DATA_OFFSET])
107 #define IDE_ERROR_REG (HWIF(drive)->io_ports[IDE_ERROR_OFFSET])
108 #define IDE_NSECTOR_REG (HWIF(drive)->io_ports[IDE_NSECTOR_OFFSET])
109 #define IDE_SECTOR_REG (HWIF(drive)->io_ports[IDE_SECTOR_OFFSET])
110 #define IDE_LCYL_REG (HWIF(drive)->io_ports[IDE_LCYL_OFFSET])
111 #define IDE_HCYL_REG (HWIF(drive)->io_ports[IDE_HCYL_OFFSET])
112 #define IDE_SELECT_REG (HWIF(drive)->io_ports[IDE_SELECT_OFFSET])
113 #define IDE_STATUS_REG (HWIF(drive)->io_ports[IDE_STATUS_OFFSET])
114 #define IDE_CONTROL_REG (HWIF(drive)->io_ports[IDE_CONTROL_OFFSET])
115 #define IDE_IRQ_REG (HWIF(drive)->io_ports[IDE_IRQ_OFFSET])
117 #define IDE_FEATURE_REG IDE_ERROR_REG
118 #define IDE_COMMAND_REG IDE_STATUS_REG
119 #define IDE_ALTSTATUS_REG IDE_CONTROL_REG
120 #define IDE_IREASON_REG IDE_NSECTOR_REG
121 #define IDE_BCOUNTL_REG IDE_LCYL_REG
122 #define IDE_BCOUNTH_REG IDE_HCYL_REG
124 #define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good))
125 #define BAD_R_STAT (BUSY_STAT | ERR_STAT)
126 #define BAD_W_STAT (BAD_R_STAT | WRERR_STAT)
127 #define BAD_STAT (BAD_R_STAT | DRQ_STAT)
128 #define DRIVE_READY (READY_STAT | SEEK_STAT)
129 #define DATA_READY (DRQ_STAT)
131 #define BAD_CRC (ABRT_ERR | ICRC_ERR)
133 #define SATA_NR_PORTS (3) /* 16 possible ?? */
135 #define SATA_STATUS_OFFSET (0)
136 #define SATA_STATUS_REG (HWIF(drive)->sata_scr[SATA_STATUS_OFFSET])
137 #define SATA_ERROR_OFFSET (1)
138 #define SATA_ERROR_REG (HWIF(drive)->sata_scr[SATA_ERROR_OFFSET])
139 #define SATA_CONTROL_OFFSET (2)
140 #define SATA_CONTROL_REG (HWIF(drive)->sata_scr[SATA_CONTROL_OFFSET])
142 #define SATA_MISC_OFFSET (0)
143 #define SATA_MISC_REG (HWIF(drive)->sata_misc[SATA_MISC_OFFSET])
144 #define SATA_PHY_OFFSET (1)
145 #define SATA_PHY_REG (HWIF(drive)->sata_misc[SATA_PHY_OFFSET])
146 #define SATA_IEN_OFFSET (2)
147 #define SATA_IEN_REG (HWIF(drive)->sata_misc[SATA_IEN_OFFSET])
150 * Our Physical Region Descriptor (PRD) table should be large enough
151 * to handle the biggest I/O request we are likely to see. Since requests
152 * can have no more than 256 sectors, and since the typical blocksize is
153 * two or more sectors, we could get by with a limit of 128 entries here for
154 * the usual worst case. Most requests seem to include some contiguous blocks,
155 * further reducing the number of table entries required.
157 * The driver reverts to PIO mode for individual requests that exceed
158 * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling
159 * 100% of all crazy scenarios here is not necessary.
161 * As it turns out though, we must allocate a full 4KB page for this,
162 * so the two PRD tables (ide0 & ide1) will each get half of that,
163 * allowing each to have about 256 entries (8 bytes each) from this.
166 #define PRD_ENTRIES 256
169 * Some more useful definitions
171 #define PARTN_BITS 6 /* number of minor dev bits for partitions */
172 #define MAX_DRIVES 2 /* per interface; 2 assumed by lots of code */
173 #define SECTOR_SIZE 512
174 #define SECTOR_WORDS (SECTOR_SIZE / 4) /* number of 32bit words per sector */
175 #define IDE_LARGE_SEEK(b1,b2,t) (((b1) > (b2) + (t)) || ((b2) > (b1) + (t)))
178 * Timeouts for various operations:
180 #define WAIT_DRQ (HZ/10) /* 100msec - spec allows up to 20ms */
181 #define WAIT_READY (5*HZ) /* 5sec - some laptops are very slow */
182 #define WAIT_PIDENTIFY (10*HZ) /* 10sec - should be less than 3ms (?), if all ATAPI CD is closed at boot */
183 #define WAIT_WORSTCASE (30*HZ) /* 30sec - worst case when spinning up */
184 #define WAIT_CMD (10*HZ) /* 10sec - maximum wait for an IRQ to happen */
185 #define WAIT_MIN_SLEEP (2*HZ/100) /* 20msec - minimum sleep time */
188 * Check for an interrupt and acknowledge the interrupt status
191 typedef int (ide_ack_intr_t)(struct hwif_s *);
194 * hwif_chipset_t is used to keep track of the specific hardware
195 * chipset used by each IDE interface, if known.
197 enum { ide_unknown, ide_generic, ide_pci,
198 ide_cmd640, ide_dtc2278, ide_ali14xx,
199 ide_qd65xx, ide_umc8672, ide_ht6560b,
200 ide_rz1000, ide_trm290,
201 ide_cmd646, ide_cy82c693, ide_4drives,
202 ide_pmac, ide_etrax100, ide_acorn,
203 ide_au1xxx, ide_forced
206 typedef u8 hwif_chipset_t;
209 * Structure to hold all information about the location of this port
211 typedef struct hw_regs_s {
212 unsigned long io_ports[IDE_NR_PORTS]; /* task file registers */
213 int irq; /* our irq number */
214 ide_ack_intr_t *ack_intr; /* acknowledge interrupt */
215 hwif_chipset_t chipset;
219 struct hwif_s * ide_find_port(unsigned long);
221 int ide_register_hw(hw_regs_t *, void (*)(struct hwif_s *), int,
224 void ide_setup_ports( hw_regs_t *hw,
229 ide_ack_intr_t *ack_intr,
235 static inline void ide_std_init_ports(hw_regs_t *hw,
236 unsigned long io_addr,
237 unsigned long ctl_addr)
241 for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++)
242 hw->io_ports[i] = io_addr++;
244 hw->io_ports[IDE_CONTROL_OFFSET] = ctl_addr;
249 #if !defined(MAX_HWIFS) || defined(CONFIG_EMBEDDED)
251 #define MAX_HWIFS CONFIG_IDE_MAX_HWIFS
254 /* needed on alpha, x86/x86_64, ia64, mips, ppc32 and sh */
255 #ifndef IDE_ARCH_OBSOLETE_DEFAULTS
256 # define ide_default_io_base(index) (0)
257 # define ide_default_irq(base) (0)
258 # define ide_init_default_irq(base) (0)
261 #ifdef CONFIG_IDE_ARCH_OBSOLETE_INIT
262 static inline void ide_init_hwif_ports(hw_regs_t *hw,
263 unsigned long io_addr,
264 unsigned long ctl_addr,
268 ide_std_init_ports(hw, io_addr, ide_default_io_ctl(io_addr));
270 ide_std_init_ports(hw, io_addr, ctl_addr);
275 hw->io_ports[IDE_IRQ_OFFSET] = 0;
278 if (ppc_ide_md.ide_init_hwif)
279 ppc_ide_md.ide_init_hwif(hw, io_addr, ctl_addr, irq);
283 static inline void ide_init_hwif_ports(hw_regs_t *hw,
284 unsigned long io_addr,
285 unsigned long ctl_addr,
288 if (io_addr || ctl_addr)
289 printk(KERN_WARNING "%s: must not be called\n", __FUNCTION__);
291 #endif /* CONFIG_IDE_ARCH_OBSOLETE_INIT */
293 /* Currently only m68k, apus and m8xx need it */
294 #ifndef IDE_ARCH_ACK_INTR
295 # define ide_ack_intr(hwif) (1)
298 /* Currently only Atari needs it */
299 #ifndef IDE_ARCH_LOCK
300 # define ide_release_lock() do {} while (0)
301 # define ide_get_lock(hdlr, data) do {} while (0)
302 #endif /* IDE_ARCH_LOCK */
305 * Now for the data we need to maintain per-drive: ide_drive_t
308 #define ide_scsi 0x21
309 #define ide_disk 0x20
310 #define ide_optical 0x7
311 #define ide_cdrom 0x5
313 #define ide_floppy 0x0
316 * Special Driver Flags
318 * set_geometry : respecify drive geometry
319 * recalibrate : seek to cyl 0
320 * set_multmode : set multmode count
321 * set_tune : tune interface for drive
322 * serviced : service command
328 #if defined(__LITTLE_ENDIAN_BITFIELD)
329 unsigned set_geometry : 1;
330 unsigned recalibrate : 1;
331 unsigned set_multmode : 1;
332 unsigned set_tune : 1;
333 unsigned serviced : 1;
334 unsigned reserved : 3;
335 #elif defined(__BIG_ENDIAN_BITFIELD)
336 unsigned reserved : 3;
337 unsigned serviced : 1;
338 unsigned set_tune : 1;
339 unsigned set_multmode : 1;
340 unsigned recalibrate : 1;
341 unsigned set_geometry : 1;
343 #error "Please fix <asm/byteorder.h>"
349 * ATA DATA Register Special.
350 * ATA NSECTOR Count Register().
351 * ATAPI Byte Count Register.
356 #if defined(__LITTLE_ENDIAN_BITFIELD)
357 unsigned low :8; /* LSB */
358 unsigned high :8; /* MSB */
359 #elif defined(__BIG_ENDIAN_BITFIELD)
360 unsigned high :8; /* MSB */
361 unsigned low :8; /* LSB */
363 #error "Please fix <asm/byteorder.h>"
366 } ata_nsector_t, ata_data_t, atapi_bcount_t;
369 * ATA-IDE Select Register, aka Device-Head
371 * head : always zeros here
372 * unit : drive select number: 0/1
374 * lba : using LBA instead of CHS
380 #if defined(__LITTLE_ENDIAN_BITFIELD)
386 #elif defined(__BIG_ENDIAN_BITFIELD)
393 #error "Please fix <asm/byteorder.h>"
396 } select_t, ata_select_t;
399 * The ATA-IDE Status Register.
400 * The ATAPI Status Register.
402 * check : Error occurred
404 * corr : Correctable error occurred
405 * drq : Data is request by the device
406 * dsc : Disk Seek Complete : ata
407 * : Media access command finished : atapi
408 * df : Device Fault : ata
410 * drdy : Ready, Command Mode Capable : ata
411 * : Ignored for ATAPI commands : atapi
413 * : The device has access to the command block
418 #if defined(__LITTLE_ENDIAN_BITFIELD)
427 #elif defined(__BIG_ENDIAN_BITFIELD)
437 #error "Please fix <asm/byteorder.h>"
440 } ata_status_t, atapi_status_t;
443 * ATAPI Feature Register
445 * dma : Using DMA or PIO
446 * reserved321 : Reserved
447 * reserved654 : Reserved (Tag Type)
448 * reserved7 : Reserved
453 #if defined(__LITTLE_ENDIAN_BITFIELD)
455 unsigned reserved321 :3;
456 unsigned reserved654 :3;
457 unsigned reserved7 :1;
458 #elif defined(__BIG_ENDIAN_BITFIELD)
459 unsigned reserved7 :1;
460 unsigned reserved654 :3;
461 unsigned reserved321 :3;
464 #error "Please fix <asm/byteorder.h>"
470 * ATAPI Interrupt Reason Register.
472 * cod : Information transferred is command (1) or data (0)
473 * io : The device requests us to read (1) or write (0)
474 * reserved : Reserved
479 #if defined(__LITTLE_ENDIAN_BITFIELD)
482 unsigned reserved :6;
483 #elif defined(__BIG_ENDIAN_BITFIELD)
484 unsigned reserved :6;
488 #error "Please fix <asm/byteorder.h>"
494 * The ATAPI error register.
496 * ili : Illegal Length Indication
497 * eom : End Of Media Detected
498 * abrt : Aborted command - As defined by ATA
499 * mcr : Media Change Requested - As defined by ATA
500 * sense_key : Sense key of the last failed packet command
505 #if defined(__LITTLE_ENDIAN_BITFIELD)
510 unsigned sense_key :4;
511 #elif defined(__BIG_ENDIAN_BITFIELD)
512 unsigned sense_key :4;
518 #error "Please fix <asm/byteorder.h>"
524 * Status returned from various ide_ functions
527 ide_stopped, /* no drive operation was started */
528 ide_started, /* a drive operation was started, handler was set */
532 struct ide_settings_s;
534 #ifdef CONFIG_BLK_DEV_IDEACPI
535 struct ide_acpi_drive_link;
536 struct ide_acpi_hwif_link;
539 typedef struct ide_drive_s {
540 char name[4]; /* drive name, such as "hda" */
541 char driver_req[10]; /* requests specific driver */
543 struct request_queue *queue; /* request queue */
545 struct request *rq; /* current request */
546 struct ide_drive_s *next; /* circular list of hwgroup drives */
547 void *driver_data; /* extra driver data */
548 struct hd_driveid *id; /* drive model identification info */
549 #ifdef CONFIG_IDE_PROC_FS
550 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
551 struct ide_settings_s *settings;/* /proc/ide/ drive settings */
553 struct hwif_s *hwif; /* actually (ide_hwif_t *) */
555 unsigned long sleep; /* sleep until this time */
556 unsigned long service_start; /* time we started last request */
557 unsigned long service_time; /* service time of last request */
558 unsigned long timeout; /* max time to wait for irq */
560 special_t special; /* special action flags */
561 select_t select; /* basic drive/head select reg value */
563 u8 keep_settings; /* restore settings after drive reset */
564 u8 using_dma; /* disk is using dma for read/write */
565 u8 retry_pio; /* retrying dma capable host in pio */
566 u8 state; /* retry state */
567 u8 waiting_for_dma; /* dma currently in progress */
568 u8 unmask; /* okay to unmask other irqs */
569 u8 bswap; /* byte swap data */
570 u8 noflush; /* don't attempt flushes */
571 u8 dsc_overlap; /* DSC overlap */
572 u8 nice1; /* give potential excess bandwidth */
574 unsigned present : 1; /* drive is physically present */
575 unsigned dead : 1; /* device ejected hint */
576 unsigned id_read : 1; /* 1=id read from disk 0 = synthetic */
577 unsigned noprobe : 1; /* from: hdx=noprobe */
578 unsigned removable : 1; /* 1 if need to do check_media_change */
579 unsigned attach : 1; /* needed for removable devices */
580 unsigned forced_geom : 1; /* 1 if hdx=c,h,s was given at boot */
581 unsigned no_unmask : 1; /* disallow setting unmask bit */
582 unsigned no_io_32bit : 1; /* disallow enabling 32bit I/O */
583 unsigned atapi_overlap : 1; /* ATAPI overlap (not supported) */
584 unsigned nice0 : 1; /* give obvious excess bandwidth */
585 unsigned nice2 : 1; /* give a share in our own bandwidth */
586 unsigned doorlocking : 1; /* for removable only: door lock/unlock works */
587 unsigned nodma : 1; /* disallow DMA */
588 unsigned autotune : 2; /* 0=default, 1=autotune, 2=noautotune */
589 unsigned remap_0_to_1 : 1; /* 0=noremap, 1=remap 0->1 (for EZDrive) */
590 unsigned blocked : 1; /* 1=powermanagment told us not to do anything, so sleep nicely */
591 unsigned vdma : 1; /* 1=doing PIO over DMA 0=doing normal DMA */
592 unsigned scsi : 1; /* 0=default, 1=ide-scsi emulation */
593 unsigned sleeping : 1; /* 1=sleeping & sleep field valid */
594 unsigned post_reset : 1;
595 unsigned udma33_warned : 1;
597 u8 addressing; /* 0=28-bit, 1=48-bit, 2=48-bit doing 28-bit */
598 u8 quirk_list; /* considered quirky, set for a specific host */
599 u8 init_speed; /* transfer rate set at boot */
600 u8 current_speed; /* current transfer rate set */
601 u8 desired_speed; /* desired transfer rate set */
602 u8 dn; /* now wide spread use */
603 u8 wcache; /* status of write cache */
604 u8 acoustic; /* acoustic management */
605 u8 media; /* disk, cdrom, tape, floppy, ... */
606 u8 ctl; /* "normal" value for IDE_CONTROL_REG */
607 u8 ready_stat; /* min status value for drive ready */
608 u8 mult_count; /* current multiple sector setting */
609 u8 mult_req; /* requested multiple sector setting */
610 u8 tune_req; /* requested drive tuning setting */
611 u8 io_32bit; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */
612 u8 bad_wstat; /* used for ignoring WRERR_STAT */
613 u8 nowerr; /* used for ignoring WRERR_STAT */
614 u8 sect0; /* offset of first sector for DM6:DDO */
615 u8 head; /* "real" number of heads */
616 u8 sect; /* "real" sectors per track */
617 u8 bios_head; /* BIOS/fdisk/LILO number of heads */
618 u8 bios_sect; /* BIOS/fdisk/LILO sectors per track */
620 unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */
621 unsigned int cyl; /* "real" number of cyls */
622 unsigned int drive_data; /* used by set_pio_mode/selectproc */
623 unsigned int failures; /* current failure count */
624 unsigned int max_failures; /* maximum allowed failure count */
625 u64 probed_capacity;/* initial reported media capacity (ide-cd only currently) */
627 u64 capacity64; /* total number of sectors */
629 int lun; /* logical unit */
630 int crc_count; /* crc counter to reduce drive speed */
631 #ifdef CONFIG_BLK_DEV_IDEACPI
632 struct ide_acpi_drive_link *acpidata;
634 struct list_head list;
635 struct device gendev;
636 struct completion gendev_rel_comp; /* to deal with device release() */
639 #define to_ide_device(dev)container_of(dev, ide_drive_t, gendev)
641 #define IDE_CHIPSET_PCI_MASK \
642 ((1<<ide_pci)|(1<<ide_cmd646)|(1<<ide_ali14xx))
643 #define IDE_CHIPSET_IS_PCI(c) ((IDE_CHIPSET_PCI_MASK >> (c)) & 1)
645 struct ide_port_info;
647 typedef struct hwif_s {
648 struct hwif_s *next; /* for linked-list in ide_hwgroup_t */
649 struct hwif_s *mate; /* other hwif from same PCI chip */
650 struct hwgroup_s *hwgroup; /* actually (ide_hwgroup_t *) */
651 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
653 char name[6]; /* name of interface, eg. "ide0" */
655 /* task file registers for pata and sata */
656 unsigned long io_ports[IDE_NR_PORTS];
657 unsigned long sata_scr[SATA_NR_PORTS];
658 unsigned long sata_misc[SATA_NR_PORTS];
660 ide_drive_t drives[MAX_DRIVES]; /* drive info */
662 u8 major; /* our major number */
663 u8 index; /* 0 for ide0; 1 for ide1; ... */
664 u8 channel; /* for dual-port chips: 0=primary, 1=secondary */
665 u8 straight8; /* Alan's straight 8 check */
666 u8 bus_state; /* power state of the IDE bus */
676 u8 cbl; /* cable type */
678 hwif_chipset_t chipset; /* sub-module for tuning.. */
680 struct pci_dev *pci_dev; /* for pci chipsets */
681 const struct ide_port_info *cds; /* chipset device struct */
683 ide_ack_intr_t *ack_intr;
685 void (*rw_disk)(ide_drive_t *, struct request *);
688 ide_hwif_ops_t *hwifops;
690 /* routine to program host for PIO mode */
691 void (*set_pio_mode)(ide_drive_t *, const u8);
692 /* routine to program host for DMA mode */
693 void (*set_dma_mode)(ide_drive_t *, const u8);
694 /* tweaks hardware to select drive */
695 void (*selectproc)(ide_drive_t *);
696 /* chipset polling based on hba specifics */
697 int (*reset_poll)(ide_drive_t *);
698 /* chipset specific changes to default for device-hba resets */
699 void (*pre_reset)(ide_drive_t *);
700 /* routine to reset controller after a disk reset */
701 void (*resetproc)(ide_drive_t *);
702 /* special interrupt handling for shared pci interrupts */
703 void (*intrproc)(ide_drive_t *);
704 /* special host masking for drive selection */
705 void (*maskproc)(ide_drive_t *, int);
706 /* check host's drive quirk list */
707 int (*quirkproc)(ide_drive_t *);
708 /* driver soft-power interface */
709 int (*busproc)(ide_drive_t *, int);
711 u8 (*mdma_filter)(ide_drive_t *);
712 u8 (*udma_filter)(ide_drive_t *);
714 void (*fixup)(struct hwif_s *);
716 void (*ata_input_data)(ide_drive_t *, void *, u32);
717 void (*ata_output_data)(ide_drive_t *, void *, u32);
719 void (*atapi_input_bytes)(ide_drive_t *, void *, u32);
720 void (*atapi_output_bytes)(ide_drive_t *, void *, u32);
722 int (*dma_setup)(ide_drive_t *);
723 void (*dma_exec_cmd)(ide_drive_t *, u8);
724 void (*dma_start)(ide_drive_t *);
725 int (*ide_dma_end)(ide_drive_t *drive);
726 int (*ide_dma_on)(ide_drive_t *drive);
727 void (*dma_off_quietly)(ide_drive_t *drive);
728 int (*ide_dma_test_irq)(ide_drive_t *drive);
729 void (*ide_dma_clear_irq)(ide_drive_t *drive);
730 void (*dma_host_on)(ide_drive_t *drive);
731 void (*dma_host_off)(ide_drive_t *drive);
732 void (*dma_lost_irq)(ide_drive_t *drive);
733 void (*dma_timeout)(ide_drive_t *drive);
735 void (*OUTB)(u8 addr, unsigned long port);
736 void (*OUTBSYNC)(ide_drive_t *drive, u8 addr, unsigned long port);
737 void (*OUTW)(u16 addr, unsigned long port);
738 void (*OUTSW)(unsigned long port, void *addr, u32 count);
739 void (*OUTSL)(unsigned long port, void *addr, u32 count);
741 u8 (*INB)(unsigned long port);
742 u16 (*INW)(unsigned long port);
743 void (*INSW)(unsigned long port, void *addr, u32 count);
744 void (*INSL)(unsigned long port, void *addr, u32 count);
746 /* dma physical region descriptor table (cpu view) */
747 unsigned int *dmatable_cpu;
748 /* dma physical region descriptor table (dma view) */
749 dma_addr_t dmatable_dma;
750 /* Scatter-gather list used to build the above */
751 struct scatterlist *sg_table;
752 int sg_max_nents; /* Maximum number of entries in it */
753 int sg_nents; /* Current number of entries in it */
754 int sg_dma_direction; /* dma transfer direction */
756 /* data phase of the active command (currently only valid for PIO/DMA) */
761 struct scatterlist *cursg;
762 unsigned int cursg_ofs;
764 int rqsize; /* max sectors per request */
765 int irq; /* our irq number */
767 unsigned long dma_base; /* base addr for dma ports */
768 unsigned long dma_command; /* dma command register */
769 unsigned long dma_vendor1; /* dma vendor 1 register */
770 unsigned long dma_status; /* dma status register */
771 unsigned long dma_vendor3; /* dma vendor 3 register */
772 unsigned long dma_prdtable; /* actual prd table address */
774 unsigned long config_data; /* for use by chipset-specific code */
775 unsigned long select_data; /* for use by chipset-specific code */
777 unsigned long extra_base; /* extra addr for dma ports */
778 unsigned extra_ports; /* number of extra dma ports */
780 unsigned noprobe : 1; /* don't probe for this interface */
781 unsigned present : 1; /* this interface exists */
782 unsigned hold : 1; /* this interface is always present */
783 unsigned serialized : 1; /* serialized all channel operation */
784 unsigned sharing_irq: 1; /* 1 = sharing irq with another hwif */
785 unsigned reset : 1; /* reset after probe */
786 unsigned auto_poll : 1; /* supports nop auto-poll */
787 unsigned sg_mapped : 1; /* sg_table and sg_nents are ready */
788 unsigned no_io_32bit : 1; /* 1 = can not do 32-bit IO ops */
789 unsigned mmio : 1; /* host uses MMIO */
791 struct device gendev;
792 struct completion gendev_rel_comp; /* To deal with device release() */
794 void *hwif_data; /* extra hwif data */
798 #ifdef CONFIG_BLK_DEV_IDEACPI
799 struct ide_acpi_hwif_link *acpidata;
801 } ____cacheline_internodealigned_in_smp ide_hwif_t;
804 * internal ide interrupt handler type
806 typedef ide_startstop_t (ide_pre_handler_t)(ide_drive_t *, struct request *);
807 typedef ide_startstop_t (ide_handler_t)(ide_drive_t *);
808 typedef int (ide_expiry_t)(ide_drive_t *);
810 typedef struct hwgroup_s {
811 /* irq handler, if active */
812 ide_startstop_t (*handler)(ide_drive_t *);
813 /* irq handler, suspended if active */
814 ide_startstop_t (*handler_save)(ide_drive_t *);
815 /* BOOL: protects all fields below */
817 /* BOOL: wake us up on timer expiry */
818 unsigned int sleeping : 1;
819 /* BOOL: polling active & poll_timeout field valid */
820 unsigned int polling : 1;
821 /* BOOL: in a polling reset situation. Must not trigger another reset yet */
822 unsigned int resetting : 1;
826 /* ptr to current hwif in linked-list */
829 /* for pci chipsets */
830 struct pci_dev *pci_dev;
832 /* current request */
835 struct timer_list timer;
836 /* local copy of current write rq */
838 /* timeout value during long polls */
839 unsigned long poll_timeout;
840 /* queried upon timeouts */
841 int (*expiry)(ide_drive_t *);
842 /* ide_system_bus_speed */
847 unsigned char cmd_buf[4];
850 typedef struct ide_driver_s ide_driver_t;
852 extern struct mutex ide_setting_mtx;
854 int set_io_32bit(ide_drive_t *, int);
855 int set_pio_mode(ide_drive_t *, int);
856 int set_using_dma(ide_drive_t *, int);
858 #ifdef CONFIG_IDE_PROC_FS
860 * configurable drive settings
867 #define SETTING_READ (1 << 0)
868 #define SETTING_WRITE (1 << 1)
869 #define SETTING_RW (SETTING_READ | SETTING_WRITE)
871 typedef int (ide_procset_t)(ide_drive_t *, int);
872 typedef struct ide_settings_s {
883 struct ide_settings_s *next;
886 int ide_add_setting(ide_drive_t *, const char *, int, int, int, int, int, int, void *, ide_procset_t *set);
889 * /proc/ide interface
894 read_proc_t *read_proc;
895 write_proc_t *write_proc;
898 void proc_ide_create(void);
899 void proc_ide_destroy(void);
900 void ide_proc_register_port(ide_hwif_t *);
901 void ide_proc_unregister_port(ide_hwif_t *);
902 void ide_proc_register_driver(ide_drive_t *, ide_driver_t *);
903 void ide_proc_unregister_driver(ide_drive_t *, ide_driver_t *);
905 void ide_add_generic_settings(ide_drive_t *);
907 read_proc_t proc_ide_read_capacity;
908 read_proc_t proc_ide_read_geometry;
910 #ifdef CONFIG_BLK_DEV_IDEPCI
911 void ide_pci_create_host_proc(const char *, get_info_t *);
915 * Standard exit stuff:
917 #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) \
926 *start = page + off; \
930 static inline void proc_ide_create(void) { ; }
931 static inline void proc_ide_destroy(void) { ; }
932 static inline void ide_proc_register_port(ide_hwif_t *hwif) { ; }
933 static inline void ide_proc_unregister_port(ide_hwif_t *hwif) { ; }
934 static inline void ide_proc_register_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
935 static inline void ide_proc_unregister_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
936 static inline void ide_add_generic_settings(ide_drive_t *drive) { ; }
937 #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) return 0;
941 * Power Management step value (rq->pm->pm_step).
943 * The step value starts at 0 (ide_pm_state_start_suspend) for a
944 * suspend operation or 1000 (ide_pm_state_start_resume) for a
947 * For each step, the core calls the subdriver start_power_step() first.
949 * - ide_stopped : In this case, the core calls us back again unless
950 * step have been set to ide_power_state_completed.
951 * - ide_started : In this case, the channel is left busy until an
952 * async event (interrupt) occurs.
953 * Typically, start_power_step() will issue a taskfile request with
956 * Upon reception of the interrupt, the core will call complete_power_step()
957 * with the error code if any. This routine should update the step value
958 * and return. It should not start a new request. The core will call
959 * start_power_step for the new step value, unless step have been set to
960 * ide_power_state_completed.
962 * Subdrivers are expected to define their own additional power
963 * steps from 1..999 for suspend and from 1001..1999 for resume,
964 * other values are reserved for future use.
968 ide_pm_state_completed = -1,
969 ide_pm_state_start_suspend = 0,
970 ide_pm_state_start_resume = 1000,
974 * Subdrivers support.
976 * The gendriver.owner field should be set to the module owner of this driver.
977 * The gendriver.name field should be set to the name of this driver
979 struct ide_driver_s {
982 unsigned supports_dsc_overlap : 1;
983 ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t);
984 int (*end_request)(ide_drive_t *, int, int);
985 ide_startstop_t (*error)(ide_drive_t *, struct request *rq, u8, u8);
986 ide_startstop_t (*abort)(ide_drive_t *, struct request *rq);
987 struct device_driver gen_driver;
988 int (*probe)(ide_drive_t *);
989 void (*remove)(ide_drive_t *);
990 void (*resume)(ide_drive_t *);
991 void (*shutdown)(ide_drive_t *);
992 #ifdef CONFIG_IDE_PROC_FS
993 ide_proc_entry_t *proc;
997 #define to_ide_driver(drv) container_of(drv, ide_driver_t, gen_driver)
999 int generic_ide_ioctl(ide_drive_t *, struct file *, struct block_device *, unsigned, unsigned long);
1002 * ide_hwifs[] is the master data structure used to keep track
1003 * of just about everything in ide.c. Whenever possible, routines
1004 * should be using pointers to a drive (ide_drive_t *) or
1005 * pointers to a hwif (ide_hwif_t *), rather than indexing this
1006 * structure directly (the allocation/layout may change!).
1010 extern ide_hwif_t ide_hwifs[]; /* master data repository */
1012 extern int noautodma;
1014 extern int ide_end_request (ide_drive_t *drive, int uptodate, int nrsecs);
1015 int ide_end_dequeued_request(ide_drive_t *drive, struct request *rq,
1016 int uptodate, int nr_sectors);
1018 extern void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, unsigned int timeout, ide_expiry_t *expiry);
1020 void ide_execute_command(ide_drive_t *, u8, ide_handler_t *, unsigned int,
1023 ide_startstop_t __ide_error(ide_drive_t *, struct request *, u8, u8);
1025 ide_startstop_t ide_error (ide_drive_t *drive, const char *msg, byte stat);
1027 ide_startstop_t __ide_abort(ide_drive_t *, struct request *);
1029 extern ide_startstop_t ide_abort(ide_drive_t *, const char *);
1031 extern void ide_fix_driveid(struct hd_driveid *);
1033 extern void ide_fixstring(u8 *, const int, const int);
1035 int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long);
1037 extern ide_startstop_t ide_do_reset (ide_drive_t *);
1039 extern void ide_init_drive_cmd (struct request *rq);
1042 * "action" parameter type for ide_do_drive_cmd() below.
1045 ide_wait, /* insert rq at end of list, and wait for it */
1046 ide_preempt, /* insert rq in front of current request */
1047 ide_head_wait, /* insert rq in front of current request and wait for it */
1048 ide_end /* insert rq at end of list, but don't wait for it */
1051 extern int ide_do_drive_cmd(ide_drive_t *, struct request *, ide_action_t);
1053 extern void ide_end_drive_cmd(ide_drive_t *, u8, u8);
1056 * Issue ATA command and wait for completion.
1057 * Use for implementing commands in kernel
1059 * (ide_drive_t *drive, u8 cmd, u8 nsect, u8 feature, u8 sectors, u8 *buf)
1061 extern int ide_wait_cmd(ide_drive_t *, u8, u8, u8, u8, u8 *);
1064 IDE_TFLAG_LBA48 = (1 << 0),
1065 IDE_TFLAG_NO_SELECT_MASK = (1 << 1),
1068 struct ide_taskfile {
1069 u8 hob_data; /* 0: high data byte (for TASKFILE IOCTL) */
1071 u8 hob_feature; /* 1-5: additional data to support LBA48 */
1077 u8 data; /* 6: low data byte (for TASKFILE IOCTL) */
1080 u8 error; /* read: error */
1081 u8 feature; /* write: feature */
1084 u8 nsect; /* 8: number of sectors */
1085 u8 lbal; /* 9: LBA low */
1086 u8 lbam; /* 10: LBA mid */
1087 u8 lbah; /* 11: LBA high */
1089 u8 device; /* 12: device select */
1092 u8 status; /*  read: status  */
1093 u8 command; /* write: command */
1097 typedef struct ide_task_s {
1099 struct ide_taskfile tf;
1103 ide_reg_valid_t tf_out_flags;
1104 ide_reg_valid_t tf_in_flags;
1107 ide_pre_handler_t *prehandler;
1108 ide_handler_t *handler;
1109 struct request *rq; /* copy of request */
1110 void *special; /* valid_t generally */
1113 void ide_tf_load(ide_drive_t *, ide_task_t *);
1115 extern u32 ide_read_24(ide_drive_t *);
1117 extern void SELECT_DRIVE(ide_drive_t *);
1118 extern void SELECT_INTERRUPT(ide_drive_t *);
1119 extern void SELECT_MASK(ide_drive_t *, int);
1120 extern void QUIRK_LIST(ide_drive_t *);
1122 extern int drive_is_ready(ide_drive_t *);
1125 * taskfile io for disks for now...and builds request from ide_ioctl
1127 extern ide_startstop_t do_rw_taskfile(ide_drive_t *, ide_task_t *);
1130 * Special Flagged Register Validation Caller
1132 extern ide_startstop_t flagged_taskfile(ide_drive_t *, ide_task_t *);
1134 extern ide_startstop_t set_multmode_intr(ide_drive_t *);
1135 extern ide_startstop_t set_geometry_intr(ide_drive_t *);
1136 extern ide_startstop_t recal_intr(ide_drive_t *);
1137 extern ide_startstop_t task_no_data_intr(ide_drive_t *);
1138 extern ide_startstop_t task_in_intr(ide_drive_t *);
1139 extern ide_startstop_t pre_task_out_intr(ide_drive_t *, struct request *);
1141 extern int ide_raw_taskfile(ide_drive_t *, ide_task_t *, u8 *);
1143 int ide_no_data_taskfile(ide_drive_t *, ide_task_t *);
1145 int ide_taskfile_ioctl(ide_drive_t *, unsigned int, unsigned long);
1146 int ide_cmd_ioctl(ide_drive_t *, unsigned int, unsigned long);
1147 int ide_task_ioctl(ide_drive_t *, unsigned int, unsigned long);
1149 extern int system_bus_clock(void);
1151 extern int ide_driveid_update(ide_drive_t *);
1152 extern int ide_ata66_check(ide_drive_t *, ide_task_t *);
1153 extern int ide_config_drive_speed(ide_drive_t *, u8);
1154 extern u8 eighty_ninty_three (ide_drive_t *);
1155 extern int set_transfer(ide_drive_t *, ide_task_t *);
1156 extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *);
1158 extern int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout);
1160 extern void ide_stall_queue(ide_drive_t *drive, unsigned long timeout);
1162 extern int ide_spin_wait_hwgroup(ide_drive_t *);
1163 extern void ide_timer_expiry(unsigned long);
1164 extern irqreturn_t ide_intr(int irq, void *dev_id);
1165 extern void do_ide_request(struct request_queue *);
1167 void ide_init_disk(struct gendisk *, ide_drive_t *);
1169 extern int ideprobe_init(void);
1171 #ifdef CONFIG_IDEPCI_PCIBUS_ORDER
1172 extern void ide_scan_pcibus(int scan_direction) __init;
1173 extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner, const char *mod_name);
1174 #define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME)
1176 #define ide_pci_register_driver(d) pci_register_driver(d)
1179 void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *, int, u8 *);
1180 void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *);
1182 extern void default_hwif_iops(ide_hwif_t *);
1183 extern void default_hwif_mmiops(ide_hwif_t *);
1184 extern void default_hwif_transport(ide_hwif_t *);
1186 typedef struct ide_pci_enablebit_s {
1187 u8 reg; /* byte pci reg holding the enable-bit */
1188 u8 mask; /* mask to isolate the enable-bit */
1189 u8 val; /* value of masked reg when "enabled" */
1190 } ide_pci_enablebit_t;
1193 /* Uses ISA control ports not PCI ones. */
1194 IDE_HFLAG_ISA_PORTS = (1 << 0),
1195 /* single port device */
1196 IDE_HFLAG_SINGLE = (1 << 1),
1197 /* don't use legacy PIO blacklist */
1198 IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2),
1199 /* don't use conservative PIO "downgrade" */
1200 IDE_HFLAG_PIO_NO_DOWNGRADE = (1 << 3),
1201 /* use PIO8/9 for prefetch off/on */
1202 IDE_HFLAG_ABUSE_PREFETCH = (1 << 4),
1203 /* use PIO6/7 for fast-devsel off/on */
1204 IDE_HFLAG_ABUSE_FAST_DEVSEL = (1 << 5),
1205 /* use 100-102 and 200-202 PIO values to set DMA modes */
1206 IDE_HFLAG_ABUSE_DMA_MODES = (1 << 6),
1208 * keep DMA setting when programming PIO mode, may be used only
1209 * for hosts which have separate PIO and DMA timings (ie. PMAC)
1211 IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = (1 << 7),
1212 /* program host for the transfer mode after programming device */
1213 IDE_HFLAG_POST_SET_MODE = (1 << 8),
1214 /* don't program host/device for the transfer mode ("smart" hosts) */
1215 IDE_HFLAG_NO_SET_MODE = (1 << 9),
1216 /* trust BIOS for programming chipset/device for DMA */
1217 IDE_HFLAG_TRUST_BIOS_FOR_DMA = (1 << 10),
1218 /* host uses VDMA */
1219 IDE_HFLAG_VDMA = (1 << 11),
1220 /* ATAPI DMA is unsupported */
1221 IDE_HFLAG_NO_ATAPI_DMA = (1 << 12),
1222 /* set if host is a "bootable" controller */
1223 IDE_HFLAG_BOOTABLE = (1 << 13),
1224 /* host doesn't support DMA */
1225 IDE_HFLAG_NO_DMA = (1 << 14),
1226 /* check if host is PCI IDE device before allowing DMA */
1227 IDE_HFLAG_NO_AUTODMA = (1 << 15),
1228 /* host is CS5510/CS5520 */
1229 IDE_HFLAG_CS5520 = (1 << 16),
1231 IDE_HFLAG_NO_LBA48 = (1 << 17),
1233 IDE_HFLAG_NO_LBA48_DMA = (1 << 18),
1234 /* data FIFO is cleared by an error */
1235 IDE_HFLAG_ERROR_STOPS_FIFO = (1 << 19),
1236 /* serialize ports */
1237 IDE_HFLAG_SERIALIZE = (1 << 20),
1238 /* use legacy IRQs */
1239 IDE_HFLAG_LEGACY_IRQS = (1 << 21),
1240 /* force use of legacy IRQs */
1241 IDE_HFLAG_FORCE_LEGACY_IRQS = (1 << 22),
1242 /* limit LBA48 requests to 256 sectors */
1243 IDE_HFLAG_RQSIZE_256 = (1 << 23),
1244 /* use 32-bit I/O ops */
1245 IDE_HFLAG_IO_32BIT = (1 << 24),
1247 IDE_HFLAG_UNMASK_IRQS = (1 << 25),
1250 #ifdef CONFIG_BLK_DEV_OFFBOARD
1251 # define IDE_HFLAG_OFF_BOARD IDE_HFLAG_BOOTABLE
1253 # define IDE_HFLAG_OFF_BOARD 0
1256 struct ide_port_info {
1258 unsigned int (*init_chipset)(struct pci_dev *, const char *);
1259 void (*init_iops)(ide_hwif_t *);
1260 void (*init_hwif)(ide_hwif_t *);
1261 void (*init_dma)(ide_hwif_t *, unsigned long);
1262 void (*fixup)(ide_hwif_t *);
1263 ide_pci_enablebit_t enablebits[2];
1264 hwif_chipset_t chipset;
1273 int ide_setup_pci_device(struct pci_dev *, const struct ide_port_info *);
1274 int ide_setup_pci_devices(struct pci_dev *, struct pci_dev *, const struct ide_port_info *);
1276 void ide_map_sg(ide_drive_t *, struct request *);
1277 void ide_init_sg_cmd(ide_drive_t *, struct request *);
1279 #define BAD_DMA_DRIVE 0
1280 #define GOOD_DMA_DRIVE 1
1282 struct drive_list_entry {
1283 const char *id_model;
1284 const char *id_firmware;
1287 int ide_in_drive_list(struct hd_driveid *, const struct drive_list_entry *);
1289 #ifdef CONFIG_BLK_DEV_IDEDMA
1290 int __ide_dma_bad_drive(ide_drive_t *);
1291 int ide_id_dma_bug(ide_drive_t *);
1293 u8 ide_find_dma_mode(ide_drive_t *, u8);
1295 static inline u8 ide_max_dma_mode(ide_drive_t *drive)
1297 return ide_find_dma_mode(drive, XFER_UDMA_6);
1300 void ide_dma_off(ide_drive_t *);
1301 int ide_set_dma(ide_drive_t *);
1302 ide_startstop_t ide_dma_intr(ide_drive_t *);
1304 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
1305 extern int ide_build_sglist(ide_drive_t *, struct request *);
1306 extern int ide_build_dmatable(ide_drive_t *, struct request *);
1307 extern void ide_destroy_dmatable(ide_drive_t *);
1308 extern int ide_release_dma(ide_hwif_t *);
1309 extern void ide_setup_dma(ide_hwif_t *, unsigned long, unsigned int);
1311 void ide_dma_host_off(ide_drive_t *);
1312 void ide_dma_off_quietly(ide_drive_t *);
1313 void ide_dma_host_on(ide_drive_t *);
1314 extern int __ide_dma_on(ide_drive_t *);
1315 extern int ide_dma_setup(ide_drive_t *);
1316 extern void ide_dma_start(ide_drive_t *);
1317 extern int __ide_dma_end(ide_drive_t *);
1318 extern void ide_dma_lost_irq(ide_drive_t *);
1319 extern void ide_dma_timeout(ide_drive_t *);
1320 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
1323 static inline int ide_id_dma_bug(ide_drive_t *drive) { return 0; }
1324 static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; }
1325 static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; }
1326 static inline void ide_dma_off(ide_drive_t *drive) { ; }
1327 static inline void ide_dma_verbose(ide_drive_t *drive) { ; }
1328 static inline int ide_set_dma(ide_drive_t *drive) { return 1; }
1329 #endif /* CONFIG_BLK_DEV_IDEDMA */
1331 #ifndef CONFIG_BLK_DEV_IDEDMA_PCI
1332 static inline void ide_release_dma(ide_hwif_t *drive) {;}
1335 #ifdef CONFIG_BLK_DEV_IDEACPI
1336 extern int ide_acpi_exec_tfs(ide_drive_t *drive);
1337 extern void ide_acpi_get_timing(ide_hwif_t *hwif);
1338 extern void ide_acpi_push_timing(ide_hwif_t *hwif);
1339 extern void ide_acpi_init(ide_hwif_t *hwif);
1340 extern void ide_acpi_set_state(ide_hwif_t *hwif, int on);
1342 static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; }
1343 static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; }
1344 static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; }
1345 static inline void ide_acpi_init(ide_hwif_t *hwif) { ; }
1346 static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {}
1349 extern int ide_hwif_request_regions(ide_hwif_t *hwif);
1350 extern void ide_hwif_release_regions(ide_hwif_t* hwif);
1351 extern void ide_unregister (unsigned int index);
1353 void ide_register_region(struct gendisk *);
1354 void ide_unregister_region(struct gendisk *);
1356 void ide_undecoded_slave(ide_hwif_t *);
1358 int ide_device_add(u8 idx[4]);
1360 static inline void *ide_get_hwifdata (ide_hwif_t * hwif)
1362 return hwif->hwif_data;
1365 static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data)
1367 hwif->hwif_data = data;
1370 const char *ide_xfer_verbose(u8 mode);
1371 extern void ide_toggle_bounce(ide_drive_t *drive, int on);
1372 extern int ide_set_xfer_rate(ide_drive_t *drive, u8 rate);
1374 static inline int ide_dev_has_iordy(struct hd_driveid *id)
1376 return ((id->field_valid & 2) && (id->capability & 8)) ? 1 : 0;
1379 static inline int ide_dev_is_sata(struct hd_driveid *id)
1382 * See if word 93 is 0 AND drive is at least ATA-5 compatible
1383 * verifying that word 80 by casting it to a signed type --
1384 * this trick allows us to filter out the reserved values of
1385 * 0x0000 and 0xffff along with the earlier ATA revisions...
1387 if (id->hw_config == 0 && (short)id->major_rev_num >= 0x0020)
1392 u8 ide_dump_status(ide_drive_t *, const char *, u8);
1394 typedef struct ide_pio_timings_s {
1395 int setup_time; /* Address setup (ns) minimum */
1396 int active_time; /* Active pulse (ns) minimum */
1397 int cycle_time; /* Cycle time (ns) minimum = */
1398 /* active + recovery (+ setup for some chips) */
1399 } ide_pio_timings_t;
1401 unsigned int ide_pio_cycle_time(ide_drive_t *, u8);
1402 u8 ide_get_best_pio_mode(ide_drive_t *, u8, u8);
1403 extern const ide_pio_timings_t ide_pio_timings[6];
1405 int ide_set_pio_mode(ide_drive_t *, u8);
1406 int ide_set_dma_mode(ide_drive_t *, u8);
1408 void ide_set_pio(ide_drive_t *, u8);
1410 static inline void ide_set_max_pio(ide_drive_t *drive)
1412 ide_set_pio(drive, 255);
1415 extern spinlock_t ide_lock;
1416 extern struct mutex ide_cfg_mtx;
1418 * Structure locking:
1420 * ide_cfg_mtx and ide_lock together protect changes to
1421 * ide_hwif_t->{next,hwgroup}
1424 * ide_hwgroup_t->busy: ide_lock
1425 * ide_hwgroup_t->hwif: ide_lock
1426 * ide_hwif_t->mate: constant, no locking
1427 * ide_drive_t->hwif: constant, no locking
1430 #define local_irq_set(flags) do { local_save_flags((flags)); local_irq_enable_in_hardirq(); } while (0)
1432 extern struct bus_type ide_bus_type;
1434 /* check if CACHE FLUSH (EXT) command is supported (bits defined in ATA-6) */
1435 #define ide_id_has_flush_cache(id) ((id)->cfs_enable_2 & 0x3000)
1437 /* some Maxtor disks have bit 13 defined incorrectly so check bit 10 too */
1438 #define ide_id_has_flush_cache_ext(id) \
1439 (((id)->cfs_enable_2 & 0x2400) == 0x2400)
1441 static inline int hwif_to_node(ide_hwif_t *hwif)
1443 struct pci_dev *dev = hwif->pci_dev;
1444 return dev ? pcibus_to_node(dev->bus) : -1;
1447 static inline ide_drive_t *ide_get_paired_drive(ide_drive_t *drive)
1449 ide_hwif_t *hwif = HWIF(drive);
1451 return &hwif->drives[(drive->dn ^ 1) & 1];