2 * Dynamic DMA mapping support.
4 * This implementation is a fallback for platforms that do not support
5 * I/O TLBs (aka DMA address translation hardware).
6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
13 * unnecessary i-cache flushing.
14 * 04/07/.. ak Better overflow handling. Assorted fixes.
15 * 05/09/10 linville Add support for syncing ranges, support syncing for
16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
17 * 08/12/11 beckyb Add highmem support
20 #include <linux/cache.h>
21 #include <linux/dma-mapping.h>
23 #include <linux/module.h>
24 #include <linux/spinlock.h>
25 #include <linux/swiotlb.h>
26 #include <linux/string.h>
27 #include <linux/swiotlb.h>
28 #include <linux/pfn.h>
29 #include <linux/types.h>
30 #include <linux/ctype.h>
31 #include <linux/highmem.h>
35 #include <asm/scatterlist.h>
37 #include <linux/init.h>
38 #include <linux/bootmem.h>
39 #include <linux/iommu-helper.h>
41 #define OFFSET(val,align) ((unsigned long) \
42 ( (val) & ( (align) - 1)))
44 #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
47 * Minimum IO TLB size to bother booting with. Systems with mainly
48 * 64bit capable cards will only lightly use the swiotlb. If we can't
49 * allocate a contiguous 1MB, we're probably in trouble anyway.
51 #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
54 * Enumeration for sync targets
56 enum dma_sync_target {
64 * Used to do a quick range check in swiotlb_unmap_single and
65 * swiotlb_sync_single_*, to see if the memory was in fact allocated by this
68 static char *io_tlb_start, *io_tlb_end;
71 * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and
72 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
74 static unsigned long io_tlb_nslabs;
77 * When the IOMMU overflows we return a fallback buffer. This sets the size.
79 static unsigned long io_tlb_overflow = 32*1024;
81 void *io_tlb_overflow_buffer;
84 * This is a free list describing the number of free entries available from
87 static unsigned int *io_tlb_list;
88 static unsigned int io_tlb_index;
91 * We need to save away the original address corresponding to a mapped entry
92 * for the sync operations.
94 static phys_addr_t *io_tlb_orig_addr;
97 * Protect the above data structures in the map and unmap calls
99 static DEFINE_SPINLOCK(io_tlb_lock);
102 setup_io_tlb_npages(char *str)
105 io_tlb_nslabs = simple_strtoul(str, &str, 0);
106 /* avoid tail segment of size < IO_TLB_SEGSIZE */
107 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
111 if (!strcmp(str, "force"))
115 __setup("swiotlb=", setup_io_tlb_npages);
116 /* make io_tlb_overflow tunable too? */
118 void * __weak swiotlb_alloc_boot(size_t size, unsigned long nslabs)
120 return alloc_bootmem_low_pages(size);
123 void * __weak swiotlb_alloc(unsigned order, unsigned long nslabs)
125 return (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN, order);
128 dma_addr_t __weak swiotlb_phys_to_bus(struct device *hwdev, phys_addr_t paddr)
133 phys_addr_t __weak swiotlb_bus_to_phys(dma_addr_t baddr)
138 static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev,
139 volatile void *address)
141 return swiotlb_phys_to_bus(hwdev, virt_to_phys(address));
144 static void *swiotlb_bus_to_virt(dma_addr_t address)
146 return phys_to_virt(swiotlb_bus_to_phys(address));
149 int __weak swiotlb_arch_range_needs_mapping(void *ptr, size_t size)
154 static void swiotlb_print_info(unsigned long bytes)
156 phys_addr_t pstart, pend;
158 pstart = virt_to_phys(io_tlb_start);
159 pend = virt_to_phys(io_tlb_end);
161 printk(KERN_INFO "Placing %luMB software IO TLB between %p - %p\n",
162 bytes >> 20, io_tlb_start, io_tlb_end);
163 printk(KERN_INFO "software IO TLB at phys %#llx - %#llx\n",
164 (unsigned long long)pstart,
165 (unsigned long long)pend);
169 * Statically reserve bounce buffer space and initialize bounce buffer data
170 * structures for the software IO TLB used to implement the DMA API.
173 swiotlb_init_with_default_size(size_t default_size)
175 unsigned long i, bytes;
177 if (!io_tlb_nslabs) {
178 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
179 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
182 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
185 * Get IO TLB memory from the low pages
187 io_tlb_start = swiotlb_alloc_boot(bytes, io_tlb_nslabs);
189 panic("Cannot allocate SWIOTLB buffer");
190 io_tlb_end = io_tlb_start + bytes;
193 * Allocate and initialize the free list array. This array is used
194 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
195 * between io_tlb_start and io_tlb_end.
197 io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int));
198 for (i = 0; i < io_tlb_nslabs; i++)
199 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
201 io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(phys_addr_t));
204 * Get the overflow emergency buffer
206 io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow);
207 if (!io_tlb_overflow_buffer)
208 panic("Cannot allocate SWIOTLB overflow buffer!\n");
210 swiotlb_print_info(bytes);
216 swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */
220 * Systems with larger DMA zones (those that don't support ISA) can
221 * initialize the swiotlb later using the slab allocator if needed.
222 * This should be just like above, but with some error catching.
225 swiotlb_late_init_with_default_size(size_t default_size)
227 unsigned long i, bytes, req_nslabs = io_tlb_nslabs;
230 if (!io_tlb_nslabs) {
231 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
232 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
236 * Get IO TLB memory from the low pages
238 order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
239 io_tlb_nslabs = SLABS_PER_PAGE << order;
240 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
242 while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
243 io_tlb_start = swiotlb_alloc(order, io_tlb_nslabs);
252 if (order != get_order(bytes)) {
253 printk(KERN_WARNING "Warning: only able to allocate %ld MB "
254 "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
255 io_tlb_nslabs = SLABS_PER_PAGE << order;
256 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
258 io_tlb_end = io_tlb_start + bytes;
259 memset(io_tlb_start, 0, bytes);
262 * Allocate and initialize the free list array. This array is used
263 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
264 * between io_tlb_start and io_tlb_end.
266 io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
267 get_order(io_tlb_nslabs * sizeof(int)));
271 for (i = 0; i < io_tlb_nslabs; i++)
272 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
275 io_tlb_orig_addr = (phys_addr_t *)
276 __get_free_pages(GFP_KERNEL,
277 get_order(io_tlb_nslabs *
278 sizeof(phys_addr_t)));
279 if (!io_tlb_orig_addr)
282 memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(phys_addr_t));
285 * Get the overflow emergency buffer
287 io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
288 get_order(io_tlb_overflow));
289 if (!io_tlb_overflow_buffer)
292 swiotlb_print_info(bytes);
297 free_pages((unsigned long)io_tlb_orig_addr,
298 get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
299 io_tlb_orig_addr = NULL;
301 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
306 free_pages((unsigned long)io_tlb_start, order);
309 io_tlb_nslabs = req_nslabs;
314 address_needs_mapping(struct device *hwdev, dma_addr_t addr, size_t size)
316 return !is_buffer_dma_capable(dma_get_mask(hwdev), addr, size);
319 static inline int range_needs_mapping(void *ptr, size_t size)
321 return swiotlb_force || swiotlb_arch_range_needs_mapping(ptr, size);
324 static int is_swiotlb_buffer(char *addr)
326 return addr >= io_tlb_start && addr < io_tlb_end;
330 * Bounce: copy the swiotlb buffer back to the original dma location
332 static void swiotlb_bounce(phys_addr_t phys, char *dma_addr, size_t size,
333 enum dma_data_direction dir)
335 unsigned long pfn = PFN_DOWN(phys);
337 if (PageHighMem(pfn_to_page(pfn))) {
338 /* The buffer does not have a mapping. Map it in and copy */
339 unsigned int offset = phys & ~PAGE_MASK;
345 sz = min(PAGE_SIZE - offset, size);
347 local_irq_save(flags);
348 buffer = kmap_atomic(pfn_to_page(pfn),
350 if (dir == DMA_TO_DEVICE)
351 memcpy(dma_addr, buffer + offset, sz);
353 memcpy(buffer + offset, dma_addr, sz);
354 kunmap_atomic(buffer, KM_BOUNCE_READ);
355 local_irq_restore(flags);
363 if (dir == DMA_TO_DEVICE)
364 memcpy(dma_addr, phys_to_virt(phys), size);
366 memcpy(phys_to_virt(phys), dma_addr, size);
371 * Allocates bounce buffer and returns its kernel virtual address.
374 map_single(struct device *hwdev, phys_addr_t phys, size_t size, int dir)
378 unsigned int nslots, stride, index, wrap;
380 unsigned long start_dma_addr;
382 unsigned long offset_slots;
383 unsigned long max_slots;
385 mask = dma_get_seg_boundary(hwdev);
386 start_dma_addr = swiotlb_virt_to_bus(hwdev, io_tlb_start) & mask;
388 offset_slots = ALIGN(start_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
391 * Carefully handle integer overflow which can occur when mask == ~0UL.
394 ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
395 : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
398 * For mappings greater than a page, we limit the stride (and
399 * hence alignment) to a page size.
401 nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
402 if (size > PAGE_SIZE)
403 stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
410 * Find suitable number of IO TLB entries size that will fit this
411 * request and allocate a buffer from that IO TLB pool.
413 spin_lock_irqsave(&io_tlb_lock, flags);
414 index = ALIGN(io_tlb_index, stride);
415 if (index >= io_tlb_nslabs)
420 while (iommu_is_span_boundary(index, nslots, offset_slots,
423 if (index >= io_tlb_nslabs)
430 * If we find a slot that indicates we have 'nslots' number of
431 * contiguous buffers, we allocate the buffers from that slot
432 * and mark the entries as '0' indicating unavailable.
434 if (io_tlb_list[index] >= nslots) {
437 for (i = index; i < (int) (index + nslots); i++)
439 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
440 io_tlb_list[i] = ++count;
441 dma_addr = io_tlb_start + (index << IO_TLB_SHIFT);
444 * Update the indices to avoid searching in the next
447 io_tlb_index = ((index + nslots) < io_tlb_nslabs
448 ? (index + nslots) : 0);
453 if (index >= io_tlb_nslabs)
455 } while (index != wrap);
458 spin_unlock_irqrestore(&io_tlb_lock, flags);
461 spin_unlock_irqrestore(&io_tlb_lock, flags);
464 * Save away the mapping from the original address to the DMA address.
465 * This is needed when we sync the memory. Then we sync the buffer if
468 for (i = 0; i < nslots; i++)
469 io_tlb_orig_addr[index+i] = phys + (i << IO_TLB_SHIFT);
470 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
471 swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE);
477 * dma_addr is the kernel virtual address of the bounce buffer to unmap.
480 unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir)
483 int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
484 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
485 phys_addr_t phys = io_tlb_orig_addr[index];
488 * First, sync the memory before unmapping the entry
490 if (phys && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
491 swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE);
494 * Return the buffer to the free list by setting the corresponding
495 * entries to indicate the number of contigous entries available.
496 * While returning the entries to the free list, we merge the entries
497 * with slots below and above the pool being returned.
499 spin_lock_irqsave(&io_tlb_lock, flags);
501 count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
502 io_tlb_list[index + nslots] : 0);
504 * Step 1: return the slots to the free list, merging the
505 * slots with superceeding slots
507 for (i = index + nslots - 1; i >= index; i--)
508 io_tlb_list[i] = ++count;
510 * Step 2: merge the returned slots with the preceding slots,
511 * if available (non zero)
513 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
514 io_tlb_list[i] = ++count;
516 spin_unlock_irqrestore(&io_tlb_lock, flags);
520 sync_single(struct device *hwdev, char *dma_addr, size_t size,
523 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
524 phys_addr_t phys = io_tlb_orig_addr[index];
526 phys += ((unsigned long)dma_addr & ((1 << IO_TLB_SHIFT) - 1));
530 if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
531 swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE);
533 BUG_ON(dir != DMA_TO_DEVICE);
535 case SYNC_FOR_DEVICE:
536 if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
537 swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE);
539 BUG_ON(dir != DMA_FROM_DEVICE);
547 swiotlb_alloc_coherent(struct device *hwdev, size_t size,
548 dma_addr_t *dma_handle, gfp_t flags)
552 int order = get_order(size);
553 u64 dma_mask = DMA_32BIT_MASK;
555 if (hwdev && hwdev->coherent_dma_mask)
556 dma_mask = hwdev->coherent_dma_mask;
558 ret = (void *)__get_free_pages(flags, order);
560 !is_buffer_dma_capable(dma_mask, swiotlb_virt_to_bus(hwdev, ret),
563 * The allocated memory isn't reachable by the device.
564 * Fall back on swiotlb_map_single().
566 free_pages((unsigned long) ret, order);
571 * We are either out of memory or the device can't DMA
572 * to GFP_DMA memory; fall back on
573 * swiotlb_map_single(), which will grab memory from
574 * the lowest available address range.
576 ret = map_single(hwdev, 0, size, DMA_FROM_DEVICE);
581 memset(ret, 0, size);
582 dev_addr = swiotlb_virt_to_bus(hwdev, ret);
584 /* Confirm address can be DMA'd by device */
585 if (!is_buffer_dma_capable(dma_mask, dev_addr, size)) {
586 printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
587 (unsigned long long)dma_mask,
588 (unsigned long long)dev_addr);
590 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
591 unmap_single(hwdev, ret, size, DMA_TO_DEVICE);
594 *dma_handle = dev_addr;
599 swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
600 dma_addr_t dma_handle)
602 WARN_ON(irqs_disabled());
603 if (!is_swiotlb_buffer(vaddr))
604 free_pages((unsigned long) vaddr, get_order(size));
606 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
607 unmap_single(hwdev, vaddr, size, DMA_TO_DEVICE);
611 swiotlb_full(struct device *dev, size_t size, int dir, int do_panic)
614 * Ran out of IOMMU space for this operation. This is very bad.
615 * Unfortunately the drivers cannot handle this operation properly.
616 * unless they check for dma_mapping_error (most don't)
617 * When the mapping is small enough return a static buffer to limit
618 * the damage, or panic when the transfer is too big.
620 printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
621 "device %s\n", size, dev ? dev->bus_id : "?");
623 if (size > io_tlb_overflow && do_panic) {
624 if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)
625 panic("DMA: Memory would be corrupted\n");
626 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
627 panic("DMA: Random memory would be DMAed\n");
632 * Map a single buffer of the indicated size for DMA in streaming mode. The
633 * physical address to use is returned.
635 * Once the device is given the dma address, the device owns this memory until
636 * either swiotlb_unmap_single or swiotlb_dma_sync_single is performed.
639 swiotlb_map_single_attrs(struct device *hwdev, void *ptr, size_t size,
640 int dir, struct dma_attrs *attrs)
642 dma_addr_t dev_addr = swiotlb_virt_to_bus(hwdev, ptr);
645 BUG_ON(dir == DMA_NONE);
647 * If the pointer passed in happens to be in the device's DMA window,
648 * we can safely return the device addr and not worry about bounce
651 if (!address_needs_mapping(hwdev, dev_addr, size) &&
652 !range_needs_mapping(ptr, size))
656 * Oh well, have to allocate and map a bounce buffer.
658 map = map_single(hwdev, virt_to_phys(ptr), size, dir);
660 swiotlb_full(hwdev, size, dir, 1);
661 map = io_tlb_overflow_buffer;
664 dev_addr = swiotlb_virt_to_bus(hwdev, map);
667 * Ensure that the address returned is DMA'ble
669 if (address_needs_mapping(hwdev, dev_addr, size))
670 panic("map_single: bounce buffer is not DMA'ble");
674 EXPORT_SYMBOL(swiotlb_map_single_attrs);
677 swiotlb_map_single(struct device *hwdev, void *ptr, size_t size, int dir)
679 return swiotlb_map_single_attrs(hwdev, ptr, size, dir, NULL);
683 * Unmap a single streaming mode DMA translation. The dma_addr and size must
684 * match what was provided for in a previous swiotlb_map_single call. All
685 * other usages are undefined.
687 * After this call, reads by the cpu to the buffer are guaranteed to see
688 * whatever the device wrote there.
691 swiotlb_unmap_single_attrs(struct device *hwdev, dma_addr_t dev_addr,
692 size_t size, int dir, struct dma_attrs *attrs)
694 char *dma_addr = swiotlb_bus_to_virt(dev_addr);
696 BUG_ON(dir == DMA_NONE);
697 if (is_swiotlb_buffer(dma_addr))
698 unmap_single(hwdev, dma_addr, size, dir);
699 else if (dir == DMA_FROM_DEVICE)
700 dma_mark_clean(dma_addr, size);
702 EXPORT_SYMBOL(swiotlb_unmap_single_attrs);
705 swiotlb_unmap_single(struct device *hwdev, dma_addr_t dev_addr, size_t size,
708 return swiotlb_unmap_single_attrs(hwdev, dev_addr, size, dir, NULL);
711 * Make physical memory consistent for a single streaming mode DMA translation
714 * If you perform a swiotlb_map_single() but wish to interrogate the buffer
715 * using the cpu, yet do not wish to teardown the dma mapping, you must
716 * call this function before doing so. At the next point you give the dma
717 * address back to the card, you must first perform a
718 * swiotlb_dma_sync_for_device, and then the device again owns the buffer
721 swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
722 size_t size, int dir, int target)
724 char *dma_addr = swiotlb_bus_to_virt(dev_addr);
726 BUG_ON(dir == DMA_NONE);
727 if (is_swiotlb_buffer(dma_addr))
728 sync_single(hwdev, dma_addr, size, dir, target);
729 else if (dir == DMA_FROM_DEVICE)
730 dma_mark_clean(dma_addr, size);
734 swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
735 size_t size, int dir)
737 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
741 swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
742 size_t size, int dir)
744 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
748 * Same as above, but for a sub-range of the mapping.
751 swiotlb_sync_single_range(struct device *hwdev, dma_addr_t dev_addr,
752 unsigned long offset, size_t size,
755 char *dma_addr = swiotlb_bus_to_virt(dev_addr) + offset;
757 BUG_ON(dir == DMA_NONE);
758 if (is_swiotlb_buffer(dma_addr))
759 sync_single(hwdev, dma_addr, size, dir, target);
760 else if (dir == DMA_FROM_DEVICE)
761 dma_mark_clean(dma_addr, size);
765 swiotlb_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
766 unsigned long offset, size_t size, int dir)
768 swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
773 swiotlb_sync_single_range_for_device(struct device *hwdev, dma_addr_t dev_addr,
774 unsigned long offset, size_t size, int dir)
776 swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
780 void swiotlb_unmap_sg_attrs(struct device *, struct scatterlist *, int, int,
783 * Map a set of buffers described by scatterlist in streaming mode for DMA.
784 * This is the scatter-gather version of the above swiotlb_map_single
785 * interface. Here the scatter gather list elements are each tagged with the
786 * appropriate dma address and length. They are obtained via
787 * sg_dma_{address,length}(SG).
789 * NOTE: An implementation may be able to use a smaller number of
790 * DMA address/length pairs than there are SG table elements.
791 * (for example via virtual mapping capabilities)
792 * The routine returns the number of addr/length pairs actually
793 * used, at most nents.
795 * Device ownership issues as mentioned above for swiotlb_map_single are the
799 swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
800 int dir, struct dma_attrs *attrs)
802 struct scatterlist *sg;
805 BUG_ON(dir == DMA_NONE);
807 for_each_sg(sgl, sg, nelems, i) {
808 void *addr = sg_virt(sg);
809 dma_addr_t dev_addr = swiotlb_virt_to_bus(hwdev, addr);
811 if (range_needs_mapping(addr, sg->length) ||
812 address_needs_mapping(hwdev, dev_addr, sg->length)) {
813 void *map = map_single(hwdev, sg_phys(sg),
816 /* Don't panic here, we expect map_sg users
817 to do proper error handling. */
818 swiotlb_full(hwdev, sg->length, dir, 0);
819 swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
821 sgl[0].dma_length = 0;
824 sg->dma_address = swiotlb_virt_to_bus(hwdev, map);
826 sg->dma_address = dev_addr;
827 sg->dma_length = sg->length;
831 EXPORT_SYMBOL(swiotlb_map_sg_attrs);
834 swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
837 return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL);
841 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
842 * concerning calls here are the same as for swiotlb_unmap_single() above.
845 swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
846 int nelems, int dir, struct dma_attrs *attrs)
848 struct scatterlist *sg;
851 BUG_ON(dir == DMA_NONE);
853 for_each_sg(sgl, sg, nelems, i) {
854 if (sg->dma_address != swiotlb_virt_to_bus(hwdev, sg_virt(sg)))
855 unmap_single(hwdev, swiotlb_bus_to_virt(sg->dma_address),
856 sg->dma_length, dir);
857 else if (dir == DMA_FROM_DEVICE)
858 dma_mark_clean(sg_virt(sg), sg->dma_length);
861 EXPORT_SYMBOL(swiotlb_unmap_sg_attrs);
864 swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
867 return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL);
871 * Make physical memory consistent for a set of streaming mode DMA translations
874 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
878 swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
879 int nelems, int dir, int target)
881 struct scatterlist *sg;
884 BUG_ON(dir == DMA_NONE);
886 for_each_sg(sgl, sg, nelems, i) {
887 if (sg->dma_address != swiotlb_virt_to_bus(hwdev, sg_virt(sg)))
888 sync_single(hwdev, swiotlb_bus_to_virt(sg->dma_address),
889 sg->dma_length, dir, target);
890 else if (dir == DMA_FROM_DEVICE)
891 dma_mark_clean(sg_virt(sg), sg->dma_length);
896 swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
899 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
903 swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
906 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
910 swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
912 return (dma_addr == swiotlb_virt_to_bus(hwdev, io_tlb_overflow_buffer));
916 * Return whether the given device DMA address mask can be supported
917 * properly. For example, if your device can only drive the low 24-bits
918 * during bus mastering, then you would pass 0x00ffffff as the mask to
922 swiotlb_dma_supported(struct device *hwdev, u64 mask)
924 return swiotlb_virt_to_bus(hwdev, io_tlb_end - 1) <= mask;
927 EXPORT_SYMBOL(swiotlb_map_single);
928 EXPORT_SYMBOL(swiotlb_unmap_single);
929 EXPORT_SYMBOL(swiotlb_map_sg);
930 EXPORT_SYMBOL(swiotlb_unmap_sg);
931 EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
932 EXPORT_SYMBOL(swiotlb_sync_single_for_device);
933 EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_cpu);
934 EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_device);
935 EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
936 EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
937 EXPORT_SYMBOL(swiotlb_dma_mapping_error);
938 EXPORT_SYMBOL(swiotlb_alloc_coherent);
939 EXPORT_SYMBOL(swiotlb_free_coherent);
940 EXPORT_SYMBOL(swiotlb_dma_supported);