sound/pci/azt3328.c

   1 /*
   2  *  azt3328.c - driver for Aztech AZF3328 based soundcards (e.g. PCI168).
   3  *  Copyright (C) 2002, 2005 by Andreas Mohr <andi AT lisas.de>
   4  *
   5  *  Framework borrowed from Bart Hartgers's als4000.c.
   6  *  Driver developed on PCI168 AP(W) version (PCI rev. 10, subsystem ID 1801),
   7  *  found in a Fujitsu-Siemens PC ("Cordant", aluminum case).
   8  *  Other versions are:
   9  *  PCI168 A(W), sub ID 1800
  10  *  PCI168 A/AP, sub ID 8000
  11  *  Please give me feedback in case you try my driver with one of these!!
  12  *
  13  * GPL LICENSE
  14  *  This program is free software; you can redistribute it and/or modify
  15  *  it under the terms of the GNU General Public License as published by
  16  *  the Free Software Foundation; either version 2 of the License, or
  17  *  (at your option) any later version.
  18  *
  19  *  This program is distributed in the hope that it will be useful,
  20  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  21  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  22  *  GNU General Public License for more details.
  23
  24  *  You should have received a copy of the GNU General Public License
  25  *  along with this program; if not, write to the Free Software
  26  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  27  *
  28  * NOTES
  29  *  Since Aztech does not provide any chipset documentation,
  30  *  even on repeated request to various addresses,
  31  *  and the answer that was finally given was negative
  32  *  (and I was stupid enough to manage to get hold of a PCI168 soundcard
  33  *  in the first place >:-P}),
  34  *  I was forced to base this driver on reverse engineering
  35  *  (3 weeks' worth of evenings filled with driver work).
  36  *  (and no, I did NOT go the easy way: to pick up a PCI128 for 9 Euros)
  37  *
  38  *  The AZF3328 chip (note: AZF3328, *not* AZT3328, that's just the driver name
  39  *  for compatibility reasons) has the following features:
  40  *
  41  *  - builtin AC97 conformant codec (SNR over 80dB)
  42  *    Note that "conformant" != "compliant"!! this chip's mixer register layout
  43  *    *differs* from the standard AC97 layout:
  44  *    they chose to not implement the headphone register (which is not a
  45  *    problem since it's merely optional), yet when doing this, they committed
  46  *    the grave sin of letting other registers follow immediately instead of
  47  *    keeping a headphone dummy register, thereby shifting the mixer register
  48  *    addresses illegally. So far unfortunately it looks like the very flexible
  49  *    ALSA AC97 support is still not enough to easily compensate for such a
  50  *    grave layout violation despite all tweaks and quirks mechanisms it offers.
  51  *  - builtin genuine OPL3
  52  *  - full duplex 16bit playback/record at independent sampling rate
  53  *  - MPU401 (+ legacy address support) FIXME: how to enable legacy addr??
  54  *  - game port (legacy address support)
  55  *  - built-in General DirectX timer having a 20 bits counter
  56  *    with 1us resolution (see below!)
  57  *  - I2S serial port for external DAC
  58  *  - supports 33MHz PCI spec 2.1, PCI power management 1.0, compliant with ACPI
  59  *  - supports hardware volume control
  60  *  - single chip low cost solution (128 pin QFP)
  61  *  - supports programmable Sub-vendor and Sub-system ID
  62  *    required for Microsoft's logo compliance (FIXME: where?)
  63  *  - PCI168 AP(W) card: power amplifier with 4 Watts/channel at 4 Ohms
  64  *
  65  *  Note that this driver now is actually *better* than the Windows driver,
  66  *  since it additionally supports the card's 1MHz DirectX timer - just try
  67  *  the following snd-seq module parameters etc.:
  68  *  - options snd-seq seq_default_timer_class=2 seq_default_timer_sclass=0
  69  *    seq_default_timer_card=0 seq_client_load=1 seq_default_timer_device=0
  70  *    seq_default_timer_subdevice=0 seq_default_timer_resolution=1000000
  71  *  - "timidity -iAv -B2,8 -Os -EFreverb=0"
  72  *  - "pmidi -p 128:0 jazz.mid"
  73  *
  74  *  Certain PCI versions of this card are susceptible to DMA traffic underruns
  75  *  in some systems (resulting in sound crackling/clicking/popping),
  76  *  probably because they don't have a DMA FIFO buffer or so.
  77  *  Overview (PCI ID/PCI subID/PCI rev.):
  78  *  - no DMA crackling on SiS735: 0x50DC/0x1801/16
  79  *  - unknown performance: 0x50DC/0x1801/10
  80  *    (well, it's not bad on an Athlon 1800 with now very optimized IRQ handler)
  81  *
  82  *  Crackling happens with VIA chipsets or, in my case, an SiS735, which is
  83  *  supposed to be very fast and supposed to get rid of crackling much
  84  *  better than a VIA, yet ironically I still get crackling, like many other
  85  *  people with the same chipset.
  86  *  Possible remedies:
  87  *  - plug card into a different PCI slot, preferrably one that isn't shared
  88  *    too much (this helps a lot, but not completely!)
  89  *  - get rid of PCI VGA card, use AGP instead
  90  *  - upgrade or downgrade BIOS
  91  *  - fiddle with PCI latency settings (setpci -v -s BUSID latency_timer=XX)
  92  *    Not too helpful.
  93  *  - Disable ACPI/power management/"Auto Detect RAM/PCI Clk" in BIOS
  94  *
  95  * BUGS
  96  *  - full-duplex might *still* be problematic, not fully tested recently
  97  *
  98  * TODO
  99  *  - test MPU401 MIDI playback etc.
 100  *  - add some power micro-management (disable various units of the card
 101  *    as long as they're unused). However this requires I/O ports which I
 102  *    haven't figured out yet and which thus might not even exist...
 103  *    The standard suspend/resume functionality could probably make use of
 104  *    some improvement, too...
 105  *  - figure out what all unknown port bits are responsible for
 106  *  - figure out some cleverly evil scheme to possibly make ALSA AC97 code
 107  *    fully accept our quite incompatible ""AC97"" mixer and thus save some
 108  *    code (but I'm not too optimistic that doing this is possible at all)
 109  */
 110
 111 #include <sound/driver.h>
 112 #include <asm/io.h>
 113 #include <linux/init.h>
 114 #include <linux/pci.h>
 115 #include <linux/delay.h>
 116 #include <linux/slab.h>
 117 #include <linux/gameport.h>
 118 #include <linux/moduleparam.h>
 119 #include <linux/dma-mapping.h>
 120 #include <sound/core.h>
 121 #include <sound/control.h>
 122 #include <sound/pcm.h>
 123 #include <sound/rawmidi.h>
 124 #include <sound/mpu401.h>
 125 #include <sound/opl3.h>
 126 #include <sound/initval.h>
 127 #include "azt3328.h"
 128
 129 MODULE_AUTHOR("Andreas Mohr <andi AT lisas.de>");
 130 MODULE_DESCRIPTION("Aztech AZF3328 (PCI168)");
 131 MODULE_LICENSE("GPL");
 132 MODULE_SUPPORTED_DEVICE("{{Aztech,AZF3328}}");
 133
 134 #if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
 135 #define SUPPORT_JOYSTICK 1
 136 #endif
 137
 138 #define DEBUG_MISC      0
 139 #define DEBUG_CALLS     0
 140 #define DEBUG_MIXER     0
 141 #define DEBUG_PLAY_REC  0
 142 #define DEBUG_IO        0
 143 #define DEBUG_TIMER     0
 144 #define MIXER_TESTING   0
 145
 146 #if DEBUG_MISC
 147 #define snd_azf3328_dbgmisc(format, args...) printk(KERN_ERR format, ##args)
 148 #else
 149 #define snd_azf3328_dbgmisc(format, args...)
 150 #endif
 151
 152 #if DEBUG_CALLS
 153 #define snd_azf3328_dbgcalls(format, args...) printk(format, ##args)
 154 #define snd_azf3328_dbgcallenter() printk(KERN_ERR "--> %s\n", __FUNCTION__)
 155 #define snd_azf3328_dbgcallleave() printk(KERN_ERR "<-- %s\n", __FUNCTION__)
 156 #else
 157 #define snd_azf3328_dbgcalls(format, args...)
 158 #define snd_azf3328_dbgcallenter()
 159 #define snd_azf3328_dbgcallleave()
 160 #endif
 161
 162 #if DEBUG_MIXER
 163 #define snd_azf3328_dbgmixer(format, args...) printk(format, ##args)
 164 #else
 165 #define snd_azf3328_dbgmixer(format, args...)
 166 #endif
 167
 168 #if DEBUG_PLAY_REC
 169 #define snd_azf3328_dbgplay(format, args...) printk(KERN_ERR format, ##args)
 170 #else
 171 #define snd_azf3328_dbgplay(format, args...)
 172 #endif
 173
 174 #if DEBUG_MISC
 175 #define snd_azf3328_dbgtimer(format, args...) printk(KERN_ERR format, ##args)
 176 #else
 177 #define snd_azf3328_dbgtimer(format, args...)
 178 #endif
 179
 180 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 0-MAX */
 181 module_param_array(index, int, NULL, 0444);
 182 MODULE_PARM_DESC(index, "Index value for AZF3328 soundcard.");
 183
 184 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
 185 module_param_array(id, charp, NULL, 0444);
 186 MODULE_PARM_DESC(id, "ID string for AZF3328 soundcard.");
 187
 188 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;      /* Enable this card */
 189 module_param_array(enable, bool, NULL, 0444);
 190 MODULE_PARM_DESC(enable, "Enable AZF3328 soundcard.");
 191
 192 #ifdef SUPPORT_JOYSTICK
 193 static int joystick[SNDRV_CARDS];
 194 module_param_array(joystick, bool, NULL, 0444);
 195 MODULE_PARM_DESC(joystick, "Enable joystick for AZF3328 soundcard.");
 196 #endif
 197
 198 static int seqtimer_scaling = 128;
 199 module_param(seqtimer_scaling, int, 0444);
 200 MODULE_PARM_DESC(seqtimer_scaling, "Set 1024000Hz sequencer timer scale factor (lockup danger!). Default 128.");
 201
 202 struct snd_azf3328 {
 203         /* often-used fields towards beginning, then grouped */
 204         unsigned long codec_port;
 205         unsigned long io2_port;
 206         unsigned long mpu_port;
 207         unsigned long synth_port;
 208         unsigned long mixer_port;
 209
 210         spinlock_t reg_lock;
 211
 212         struct snd_timer *timer;
 213
 214         struct snd_pcm *pcm;
 215         struct snd_pcm_substream *playback_substream;
 216         struct snd_pcm_substream *capture_substream;
 217         unsigned int is_playing;
 218         unsigned int is_recording;
 219
 220         struct snd_card *card;
 221         struct snd_rawmidi *rmidi;
 222
 223 #ifdef SUPPORT_JOYSTICK
 224         struct gameport *gameport;
 225 #endif
 226
 227         struct pci_dev *pci;
 228         int irq;
 229
 230 #ifdef CONFIG_PM
 231         /* register value containers for power management
 232          * Note: not always full I/O range preserved (just like Win driver!) */
 233         u16 saved_regs_codec [AZF_IO_SIZE_CODEC_PM / 2];
 234         u16 saved_regs_io2   [AZF_IO_SIZE_IO2_PM / 2];
 235         u16 saved_regs_mpu   [AZF_IO_SIZE_MPU_PM / 2];
 236         u16 saved_regs_synth[AZF_IO_SIZE_SYNTH_PM / 2];
 237         u16 saved_regs_mixer[AZF_IO_SIZE_MIXER_PM / 2];
 238 #endif
 239 };
 240
 241 static const struct pci_device_id snd_azf3328_ids[] __devinitdata = {
 242         { 0x122D, 0x50DC, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },   /* PCI168/3328 */
 243         { 0x122D, 0x80DA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },   /* 3328 */
 244         { 0, }
 245 };
 246
 247 MODULE_DEVICE_TABLE(pci, snd_azf3328_ids);
 248
 249 static inline void
 250 snd_azf3328_codec_outb(const struct snd_azf3328 *chip, int reg, u8 value)
 251 {
 252         outb(value, chip->codec_port + reg);
 253 }
 254
 255 static inline u8
 256 snd_azf3328_codec_inb(const struct snd_azf3328 *chip, int reg)
 257 {
 258         return inb(chip->codec_port + reg);
 259 }
 260
 261 static inline void
 262 snd_azf3328_codec_outw(const struct snd_azf3328 *chip, int reg, u16 value)
 263 {
 264         outw(value, chip->codec_port + reg);
 265 }
 266
 267 static inline u16
 268 snd_azf3328_codec_inw(const struct snd_azf3328 *chip, int reg)
 269 {
 270         return inw(chip->codec_port + reg);
 271 }
 272
 273 static inline void
 274 snd_azf3328_codec_outl(const struct snd_azf3328 *chip, int reg, u32 value)
 275 {
 276         outl(value, chip->codec_port + reg);
 277 }
 278
 279 static inline void
 280 snd_azf3328_io2_outb(const struct snd_azf3328 *chip, int reg, u8 value)
 281 {
 282         outb(value, chip->io2_port + reg);
 283 }
 284
 285 static inline u8
 286 snd_azf3328_io2_inb(const struct snd_azf3328 *chip, int reg)
 287 {
 288         return inb(chip->io2_port + reg);
 289 }
 290
 291 static inline void
 292 snd_azf3328_mixer_outw(const struct snd_azf3328 *chip, int reg, u16 value)
 293 {
 294         outw(value, chip->mixer_port + reg);
 295 }
 296
 297 static inline u16
 298 snd_azf3328_mixer_inw(const struct snd_azf3328 *chip, int reg)
 299 {
 300         return inw(chip->mixer_port + reg);
 301 }
 302
 303 static void
 304 snd_azf3328_mixer_set_mute(const struct snd_azf3328 *chip, int reg, int do_mute)
 305 {
 306         unsigned long portbase = chip->mixer_port + reg + 1;
 307         unsigned char oldval;
 308
 309         /* the mute bit is on the *second* (i.e. right) register of a
 310          * left/right channel setting */
 311         oldval = inb(portbase);
 312         if (do_mute)
 313                 oldval |= 0x80;
 314         else
 315                 oldval &= ~0x80;
 316         outb(oldval, portbase);
 317 }
 318
 319 static void
 320 snd_azf3328_mixer_write_volume_gradually(const struct snd_azf3328 *chip, int reg, unsigned char dst_vol_left, unsigned char dst_vol_right, int chan_sel, int delay)
 321 {
 322         unsigned long portbase = chip->mixer_port + reg;
 323         unsigned char curr_vol_left = 0, curr_vol_right = 0;
 324         int left_done = 0, right_done = 0;
 325
 326         snd_azf3328_dbgcallenter();
 327         if (chan_sel & SET_CHAN_LEFT)
 328                 curr_vol_left  = inb(portbase + 1);
 329         else
 330                 left_done = 1;
 331         if (chan_sel & SET_CHAN_RIGHT)
 332                 curr_vol_right = inb(portbase + 0);
 333         else
 334                 right_done = 1;
 335
 336         /* take care of muting flag (0x80) contained in left channel */
 337         if (curr_vol_left & 0x80)
 338                 dst_vol_left |= 0x80;
 339         else
 340                 dst_vol_left &= ~0x80;
 341
 342         do
 343         {
 344                 if (!left_done)
 345                 {
 346                         if (curr_vol_left > dst_vol_left)
 347                                 curr_vol_left--;
 348                         else
 349                         if (curr_vol_left < dst_vol_left)
 350                                 curr_vol_left++;
 351                         else
 352                             left_done = 1;
 353                         outb(curr_vol_left, portbase + 1);
 354                 }
 355                 if (!right_done)
 356                 {
 357                         if (curr_vol_right > dst_vol_right)
 358                                 curr_vol_right--;
 359                         else
 360                         if (curr_vol_right < dst_vol_right)
 361                                 curr_vol_right++;
 362                         else
 363                             right_done = 1;
 364                         /* during volume change, the right channel is crackling
 365                          * somewhat more than the left channel, unfortunately.
 366                          * This seems to be a hardware issue. */
 367                         outb(curr_vol_right, portbase + 0);
 368                 }
 369                 if (delay)
 370                         mdelay(delay);
 371         }
 372         while ((!left_done) || (!right_done));
 373         snd_azf3328_dbgcallleave();
 374 }
 375
 376 /*
 377  * general mixer element
 378  */
 379 struct azf3328_mixer_reg {
 380         unsigned int reg;
 381         unsigned int lchan_shift, rchan_shift;
 382         unsigned int mask;
 383         unsigned int invert: 1;
 384         unsigned int stereo: 1;
 385         unsigned int enum_c: 4;
 386 };
 387
 388 #define COMPOSE_MIXER_REG(reg,lchan_shift,rchan_shift,mask,invert,stereo,enum_c) \
 389  ((reg) | (lchan_shift << 8) | (rchan_shift << 12) | \
 390   (mask << 16) | \
 391   (invert << 24) | \
 392   (stereo << 25) | \
 393   (enum_c << 26))
 394
 395 static void snd_azf3328_mixer_reg_decode(struct azf3328_mixer_reg *r, unsigned long val)
 396 {
 397         r->reg = val & 0xff;
 398         r->lchan_shift = (val >> 8) & 0x0f;
 399         r->rchan_shift = (val >> 12) & 0x0f;
 400         r->mask = (val >> 16) & 0xff;
 401         r->invert = (val >> 24) & 1;
 402         r->stereo = (val >> 25) & 1;
 403         r->enum_c = (val >> 26) & 0x0f;
 404 }
 405
 406 /*
 407  * mixer switches/volumes
 408  */
 409
 410 #define AZF3328_MIXER_SWITCH(xname, reg, shift, invert) \
 411 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
 412   .info = snd_azf3328_info_mixer, \
 413   .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \
 414   .private_value = COMPOSE_MIXER_REG(reg, shift, 0, 0x1, invert, 0, 0), \
 415 }
 416
 417 #define AZF3328_MIXER_VOL_STEREO(xname, reg, mask, invert) \
 418 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
 419   .info = snd_azf3328_info_mixer, \
 420   .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \
 421   .private_value = COMPOSE_MIXER_REG(reg, 8, 0, mask, invert, 1, 0), \
 422 }
 423
 424 #define AZF3328_MIXER_VOL_MONO(xname, reg, mask, is_right_chan) \
 425 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
 426   .info = snd_azf3328_info_mixer, \
 427   .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \
 428   .private_value = COMPOSE_MIXER_REG(reg, is_right_chan ? 0 : 8, 0, mask, 1, 0, 0), \
 429 }
 430
 431 #define AZF3328_MIXER_VOL_SPECIAL(xname, reg, mask, shift, invert) \
 432 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
 433   .info = snd_azf3328_info_mixer, \
 434   .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \
 435   .private_value = COMPOSE_MIXER_REG(reg, shift, 0, mask, invert, 0, 0), \
 436 }
 437
 438 #define AZF3328_MIXER_ENUM(xname, reg, enum_c, shift) \
 439 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
 440   .info = snd_azf3328_info_mixer_enum, \
 441   .get = snd_azf3328_get_mixer_enum, .put = snd_azf3328_put_mixer_enum, \
 442   .private_value = COMPOSE_MIXER_REG(reg, shift, 0, 0, 0, 0, enum_c), \
 443 }
 444
 445 static int
 446 snd_azf3328_info_mixer(struct snd_kcontrol *kcontrol,
 447                        struct snd_ctl_elem_info *uinfo)
 448 {
 449         struct azf3328_mixer_reg reg;
 450
 451         snd_azf3328_dbgcallenter();
 452         snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
 453         uinfo->type = reg.mask == 1 ?
 454                 SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
 455         uinfo->count = reg.stereo + 1;
 456         uinfo->value.integer.min = 0;
 457         uinfo->value.integer.max = reg.mask;
 458         snd_azf3328_dbgcallleave();
 459         return 0;
 460 }
 461
 462 static int
 463 snd_azf3328_get_mixer(struct snd_kcontrol *kcontrol,
 464                       struct snd_ctl_elem_value *ucontrol)
 465 {
 466         struct snd_azf3328 *chip = snd_kcontrol_chip(kcontrol);
 467         struct azf3328_mixer_reg reg;
 468         unsigned int oreg, val;
 469
 470         snd_azf3328_dbgcallenter();
 471         snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
 472
 473         oreg = snd_azf3328_mixer_inw(chip, reg.reg);
 474         val = (oreg >> reg.lchan_shift) & reg.mask;
 475         if (reg.invert)
 476                 val = reg.mask - val;
 477         ucontrol->value.integer.value[0] = val;
 478         if (reg.stereo) {
 479                 val = (oreg >> reg.rchan_shift) & reg.mask;
 480                 if (reg.invert)
 481                         val = reg.mask - val;
 482                 ucontrol->value.integer.value[1] = val;
 483         }
 484         snd_azf3328_dbgmixer("get: %02x is %04x -> vol %02lx|%02lx "
 485                              "(shift %02d|%02d, mask %02x, inv. %d, stereo %d)\n",
 486                 reg.reg, oreg,
 487                 ucontrol->value.integer.value[0], ucontrol->value.integer.value[1],
 488                 reg.lchan_shift, reg.rchan_shift, reg.mask, reg.invert, reg.stereo);
 489         snd_azf3328_dbgcallleave();
 490         return 0;
 491 }
 492
 493 static int
 494 snd_azf3328_put_mixer(struct snd_kcontrol *kcontrol,
 495                       struct snd_ctl_elem_value *ucontrol)
 496 {
 497         struct snd_azf3328 *chip = snd_kcontrol_chip(kcontrol);
 498         struct azf3328_mixer_reg reg;
 499         unsigned int oreg, nreg, val;
 500
 501         snd_azf3328_dbgcallenter();
 502         snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
 503         oreg = snd_azf3328_mixer_inw(chip, reg.reg);
 504         val = ucontrol->value.integer.value[0] & reg.mask;
 505         if (reg.invert)
 506                 val = reg.mask - val;
 507         nreg = oreg & ~(reg.mask << reg.lchan_shift);
 508         nreg |= (val << reg.lchan_shift);
 509         if (reg.stereo) {
 510                 val = ucontrol->value.integer.value[1] & reg.mask;
 511                 if (reg.invert)
 512                         val = reg.mask - val;
 513                 nreg &= ~(reg.mask << reg.rchan_shift);
 514                 nreg |= (val << reg.rchan_shift);
 515         }
 516         if (reg.mask >= 0x07) /* it's a volume control, so better take care */
 517                 snd_azf3328_mixer_write_volume_gradually(
 518                         chip, reg.reg, nreg >> 8, nreg & 0xff,
 519                         /* just set both channels, doesn't matter */
 520                         SET_CHAN_LEFT|SET_CHAN_RIGHT,
 521                         0);
 522         else
 523                 snd_azf3328_mixer_outw(chip, reg.reg, nreg);
 524
 525         snd_azf3328_dbgmixer("put: %02x to %02lx|%02lx, "
 526                              "oreg %04x; shift %02d|%02d -> nreg %04x; after: %04x\n",
 527                 reg.reg, ucontrol->value.integer.value[0], ucontrol->value.integer.value[1],
 528                 oreg, reg.lchan_shift, reg.rchan_shift,
 529                 nreg, snd_azf3328_mixer_inw(chip, reg.reg));
 530         snd_azf3328_dbgcallleave();
 531         return (nreg != oreg);
 532 }
 533
 534 static int
 535 snd_azf3328_info_mixer_enum(struct snd_kcontrol *kcontrol,
 536                             struct snd_ctl_elem_info *uinfo)
 537 {
 538         static const char * const texts1[] = {
 539                 "Mic1", "Mic2"
 540         };
 541         static const char * const texts2[] = {
 542                 "Mix", "Mic"
 543         };
 544         static const char * const texts3[] = {
 545                 "Mic", "CD", "Video", "Aux",
 546                 "Line", "Mix", "Mix Mono", "Phone"
 547         };
 548         static const char * const texts4[] = {
 549                 "pre 3D", "post 3D"
 550         };
 551         struct azf3328_mixer_reg reg;
 552
 553         snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
 554         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
 555         uinfo->count = (reg.reg == IDX_MIXER_REC_SELECT) ? 2 : 1;
 556         uinfo->value.enumerated.items = reg.enum_c;
 557         if (uinfo->value.enumerated.item > reg.enum_c - 1U)
 558                 uinfo->value.enumerated.item = reg.enum_c - 1U;
 559         if (reg.reg == IDX_MIXER_ADVCTL2)
 560         {
 561                 switch(reg.lchan_shift) {
 562                 case 8: /* modem out sel */
 563                         strcpy(uinfo->value.enumerated.name, texts1[uinfo->value.enumerated.item]);
 564                         break;
 565                 case 9: /* mono sel source */
 566                         strcpy(uinfo->value.enumerated.name, texts2[uinfo->value.enumerated.item]);
 567                         break;
 568                 case 15: /* PCM Out Path */
 569                         strcpy(uinfo->value.enumerated.name, texts4[uinfo->value.enumerated.item]);
 570                         break;
 571                 }
 572         }
 573         else
 574                 strcpy(uinfo->value.enumerated.name, texts3[uinfo->value.enumerated.item]
 575 );
 576         return 0;
 577 }
 578
 579 static int
 580 snd_azf3328_get_mixer_enum(struct snd_kcontrol *kcontrol,
 581                            struct snd_ctl_elem_value *ucontrol)
 582 {
 583         struct snd_azf3328 *chip = snd_kcontrol_chip(kcontrol);
 584         struct azf3328_mixer_reg reg;
 585         unsigned short val;
 586
 587         snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
 588         val = snd_azf3328_mixer_inw(chip, reg.reg);
 589         if (reg.reg == IDX_MIXER_REC_SELECT)
 590         {
 591                 ucontrol->value.enumerated.item[0] = (val >> 8) & (reg.enum_c - 1);
 592                 ucontrol->value.enumerated.item[1] = (val >> 0) & (reg.enum_c - 1);
 593         }
 594         else
 595                 ucontrol->value.enumerated.item[0] = (val >> reg.lchan_shift) & (reg.enum_c - 1);
 596
 597         snd_azf3328_dbgmixer("get_enum: %02x is %04x -> %d|%d (shift %02d, enum_c %d)\n",
 598                 reg.reg, val, ucontrol->value.enumerated.item[0], ucontrol->value.enumerated.item[1],
 599                 reg.lchan_shift, reg.enum_c);
 600         return 0;
 601 }
 602
 603 static int
 604 snd_azf3328_put_mixer_enum(struct snd_kcontrol *kcontrol,
 605                            struct snd_ctl_elem_value *ucontrol)
 606 {
 607         struct snd_azf3328 *chip = snd_kcontrol_chip(kcontrol);
 608         struct azf3328_mixer_reg reg;
 609         unsigned int oreg, nreg, val;
 610
 611         snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
 612         oreg = snd_azf3328_mixer_inw(chip, reg.reg);
 613         val = oreg;
 614         if (reg.reg == IDX_MIXER_REC_SELECT)
 615         {
 616                 if (ucontrol->value.enumerated.item[0] > reg.enum_c - 1U ||
 617                 ucontrol->value.enumerated.item[1] > reg.enum_c - 1U)
 618                         return -EINVAL;
 619                 val = (ucontrol->value.enumerated.item[0] << 8) |
 620                       (ucontrol->value.enumerated.item[1] << 0);
 621         }
 622         else
 623         {
 624                 if (ucontrol->value.enumerated.item[0] > reg.enum_c - 1U)
 625                         return -EINVAL;
 626                 val &= ~((reg.enum_c - 1) << reg.lchan_shift);
 627                 val |= (ucontrol->value.enumerated.item[0] << reg.lchan_shift);
 628         }
 629         snd_azf3328_mixer_outw(chip, reg.reg, val);
 630         nreg = val;
 631
 632         snd_azf3328_dbgmixer("put_enum: %02x to %04x, oreg %04x\n", reg.reg, val, oreg);
 633         return (nreg != oreg);
 634 }
 635
 636 static const struct snd_kcontrol_new snd_azf3328_mixer_controls[] __devinitdata = {
 637         AZF3328_MIXER_SWITCH("Master Playback Switch", IDX_MIXER_PLAY_MASTER, 15, 1),
 638         AZF3328_MIXER_VOL_STEREO("Master Playback Volume", IDX_MIXER_PLAY_MASTER, 0x1f, 1),
 639         AZF3328_MIXER_SWITCH("Wave Playback Switch", IDX_MIXER_WAVEOUT, 15, 1),
 640         AZF3328_MIXER_VOL_STEREO("Wave Playback Volume", IDX_MIXER_WAVEOUT, 0x1f, 1),
 641         AZF3328_MIXER_SWITCH("Wave 3D Bypass Playback Switch", IDX_MIXER_ADVCTL2, 7, 1),
 642         AZF3328_MIXER_SWITCH("FM Playback Switch", IDX_MIXER_FMSYNTH, 15, 1),
 643         AZF3328_MIXER_VOL_STEREO("FM Playback Volume", IDX_MIXER_FMSYNTH, 0x1f, 1),
 644         AZF3328_MIXER_SWITCH("CD Playback Switch", IDX_MIXER_CDAUDIO, 15, 1),
 645         AZF3328_MIXER_VOL_STEREO("CD Playback Volume", IDX_MIXER_CDAUDIO, 0x1f, 1),
 646         AZF3328_MIXER_SWITCH("Capture Switch", IDX_MIXER_REC_VOLUME, 15, 1),
 647         AZF3328_MIXER_VOL_STEREO("Capture Volume", IDX_MIXER_REC_VOLUME, 0x0f, 0),
 648         AZF3328_MIXER_ENUM("Capture Source", IDX_MIXER_REC_SELECT, 8, 0),
 649         AZF3328_MIXER_SWITCH("Mic Playback Switch", IDX_MIXER_MIC, 15, 1),
 650         AZF3328_MIXER_VOL_MONO("Mic Playback Volume", IDX_MIXER_MIC, 0x1f, 1),
 651         AZF3328_MIXER_SWITCH("Mic Boost (+20dB)", IDX_MIXER_MIC, 6, 0),
 652         AZF3328_MIXER_SWITCH("Line Playback Switch", IDX_MIXER_LINEIN, 15, 1),
 653         AZF3328_MIXER_VOL_STEREO("Line Playback Volume", IDX_MIXER_LINEIN, 0x1f, 1),
 654         AZF3328_MIXER_SWITCH("PC Speaker Playback Switch", IDX_MIXER_PCBEEP, 15, 1),
 655         AZF3328_MIXER_VOL_SPECIAL("PC Speaker Playback Volume", IDX_MIXER_PCBEEP, 0x0f, 1, 1),
 656         AZF3328_MIXER_SWITCH("Video Playback Switch", IDX_MIXER_VIDEO, 15, 1),
 657         AZF3328_MIXER_VOL_STEREO("Video Playback Volume", IDX_MIXER_VIDEO, 0x1f, 1),
 658         AZF3328_MIXER_SWITCH("Aux Playback Switch", IDX_MIXER_AUX, 15, 1),
 659         AZF3328_MIXER_VOL_STEREO("Aux Playback Volume", IDX_MIXER_AUX, 0x1f, 1),
 660         AZF3328_MIXER_SWITCH("Modem Playback Switch", IDX_MIXER_MODEMOUT, 15, 1),
 661         AZF3328_MIXER_VOL_MONO("Modem Playback Volume", IDX_MIXER_MODEMOUT, 0x1f, 1),
 662         AZF3328_MIXER_SWITCH("Modem Capture Switch", IDX_MIXER_MODEMIN, 15, 1),
 663         AZF3328_MIXER_VOL_MONO("Modem Capture Volume", IDX_MIXER_MODEMIN, 0x1f, 1),
 664         AZF3328_MIXER_ENUM("Mic Select", IDX_MIXER_ADVCTL2, 2, 8),
 665         AZF3328_MIXER_ENUM("Mono Output Select", IDX_MIXER_ADVCTL2, 2, 9),
 666         AZF3328_MIXER_ENUM("PCM", IDX_MIXER_ADVCTL2, 2, 15), /* PCM Out Path, place in front since it controls *both* 3D and Bass/Treble! */
 667         AZF3328_MIXER_VOL_SPECIAL("Tone Control - Treble", IDX_MIXER_BASSTREBLE, 0x07, 1, 0),
 668         AZF3328_MIXER_VOL_SPECIAL("Tone Control - Bass", IDX_MIXER_BASSTREBLE, 0x07, 9, 0),
 669         AZF3328_MIXER_SWITCH("3D Control - Switch", IDX_MIXER_ADVCTL2, 13, 0),
 670         AZF3328_MIXER_VOL_SPECIAL("3D Control - Width", IDX_MIXER_ADVCTL1, 0x07, 1, 0), /* "3D Width" */
 671         AZF3328_MIXER_VOL_SPECIAL("3D Control - Depth", IDX_MIXER_ADVCTL1, 0x03, 8, 0), /* "Hifi 3D" */
 672 #if MIXER_TESTING
 673         AZF3328_MIXER_SWITCH("0", IDX_MIXER_ADVCTL2, 0, 0),
 674         AZF3328_MIXER_SWITCH("1", IDX_MIXER_ADVCTL2, 1, 0),
 675         AZF3328_MIXER_SWITCH("2", IDX_MIXER_ADVCTL2, 2, 0),
 676         AZF3328_MIXER_SWITCH("3", IDX_MIXER_ADVCTL2, 3, 0),
 677         AZF3328_MIXER_SWITCH("4", IDX_MIXER_ADVCTL2, 4, 0),
 678         AZF3328_MIXER_SWITCH("5", IDX_MIXER_ADVCTL2, 5, 0),
 679         AZF3328_MIXER_SWITCH("6", IDX_MIXER_ADVCTL2, 6, 0),
 680         AZF3328_MIXER_SWITCH("7", IDX_MIXER_ADVCTL2, 7, 0),
 681         AZF3328_MIXER_SWITCH("8", IDX_MIXER_ADVCTL2, 8, 0),
 682         AZF3328_MIXER_SWITCH("9", IDX_MIXER_ADVCTL2, 9, 0),
 683         AZF3328_MIXER_SWITCH("10", IDX_MIXER_ADVCTL2, 10, 0),
 684         AZF3328_MIXER_SWITCH("11", IDX_MIXER_ADVCTL2, 11, 0),
 685         AZF3328_MIXER_SWITCH("12", IDX_MIXER_ADVCTL2, 12, 0),
 686         AZF3328_MIXER_SWITCH("13", IDX_MIXER_ADVCTL2, 13, 0),
 687         AZF3328_MIXER_SWITCH("14", IDX_MIXER_ADVCTL2, 14, 0),
 688         AZF3328_MIXER_SWITCH("15", IDX_MIXER_ADVCTL2, 15, 0),
 689 #endif
 690 };
 691
 692 static const u16 __devinitdata snd_azf3328_init_values[][2] = {
 693         { IDX_MIXER_PLAY_MASTER,        MIXER_MUTE_MASK|0x1f1f },
 694         { IDX_MIXER_MODEMOUT,           MIXER_MUTE_MASK|0x1f1f },
 695         { IDX_MIXER_BASSTREBLE,         0x0000 },
 696         { IDX_MIXER_PCBEEP,             MIXER_MUTE_MASK|0x1f1f },
 697         { IDX_MIXER_MODEMIN,            MIXER_MUTE_MASK|0x1f1f },
 698         { IDX_MIXER_MIC,                MIXER_MUTE_MASK|0x001f },
 699         { IDX_MIXER_LINEIN,             MIXER_MUTE_MASK|0x1f1f },
 700         { IDX_MIXER_CDAUDIO,            MIXER_MUTE_MASK|0x1f1f },
 701         { IDX_MIXER_VIDEO,              MIXER_MUTE_MASK|0x1f1f },
 702         { IDX_MIXER_AUX,                MIXER_MUTE_MASK|0x1f1f },
 703         { IDX_MIXER_WAVEOUT,            MIXER_MUTE_MASK|0x1f1f },
 704         { IDX_MIXER_FMSYNTH,            MIXER_MUTE_MASK|0x1f1f },
 705         { IDX_MIXER_REC_VOLUME,         MIXER_MUTE_MASK|0x0707 },
 706 };
 707
 708 static int __devinit
 709 snd_azf3328_mixer_new(struct snd_azf3328 *chip)
 710 {
 711         struct snd_card *card;
 712         const struct snd_kcontrol_new *sw;
 713         unsigned int idx;
 714         int err;
 715
 716         snd_azf3328_dbgcallenter();
 717         snd_assert(chip != NULL && chip->card != NULL, return -EINVAL);
 718
 719         card = chip->card;
 720
 721         /* mixer reset */
 722         snd_azf3328_mixer_outw(chip, IDX_MIXER_RESET, 0x0000);
 723
 724         /* mute and zero volume channels */
 725         for (idx = 0; idx < ARRAY_SIZE(snd_azf3328_init_values); idx++) {
 726                 snd_azf3328_mixer_outw(chip,
 727                         snd_azf3328_init_values[idx][0],
 728                         snd_azf3328_init_values[idx][1]);
 729         }
 730
 731         /* add mixer controls */
 732         sw = snd_azf3328_mixer_controls;
 733         for (idx = 0; idx < ARRAY_SIZE(snd_azf3328_mixer_controls); idx++, sw++) {
 734                 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(sw, chip))) < 0)
 735                         return err;
 736         }
 737         snd_component_add(card, "AZF3328 mixer");
 738         strcpy(card->mixername, "AZF3328 mixer");
 739
 740         snd_azf3328_dbgcallleave();
 741         return 0;
 742 }
 743
 744 static int
 745 snd_azf3328_hw_params(struct snd_pcm_substream *substream,
 746                                  struct snd_pcm_hw_params *hw_params)
 747 {
 748         int res;
 749         snd_azf3328_dbgcallenter();
 750         res = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
 751         snd_azf3328_dbgcallleave();
 752         return res;
 753 }
 754
 755 static int
 756 snd_azf3328_hw_free(struct snd_pcm_substream *substream)
 757 {
 758         snd_azf3328_dbgcallenter();
 759         snd_pcm_lib_free_pages(substream);
 760         snd_azf3328_dbgcallleave();
 761         return 0;
 762 }
 763
 764 static void
 765 snd_azf3328_setfmt(struct snd_azf3328 *chip,
 766                                unsigned int reg,
 767                                unsigned int bitrate,
 768                                unsigned int format_width,
 769                                unsigned int channels
 770 )
 771 {
 772         u16 val = 0xff00;
 773         unsigned long flags;
 774
 775         snd_azf3328_dbgcallenter();
 776         switch (bitrate) {
 777         case  4000: val |= SOUNDFORMAT_FREQ_SUSPECTED_4000; break;
 778         case  4800: val |= SOUNDFORMAT_FREQ_SUSPECTED_4800; break;
 779         case  5512: val |= SOUNDFORMAT_FREQ_5510; break; /* the AZF3328 names it "5510" for some strange reason */
 780         case  6620: val |= SOUNDFORMAT_FREQ_6620; break;
 781         case  8000: val |= SOUNDFORMAT_FREQ_8000; break;
 782         case  9600: val |= SOUNDFORMAT_FREQ_9600; break;
 783         case 11025: val |= SOUNDFORMAT_FREQ_11025; break;
 784         case 13240: val |= SOUNDFORMAT_FREQ_SUSPECTED_13240; break;
 785         case 16000: val |= SOUNDFORMAT_FREQ_16000; break;
 786         case 22050: val |= SOUNDFORMAT_FREQ_22050; break;
 787         case 32000: val |= SOUNDFORMAT_FREQ_32000; break;
 788         case 44100: val |= SOUNDFORMAT_FREQ_44100; break;
 789         case 48000: val |= SOUNDFORMAT_FREQ_48000; break;
 790         case 66200: val |= SOUNDFORMAT_FREQ_SUSPECTED_66200; break;
 791         default:
 792                 snd_printk(KERN_WARNING "unknown bitrate %d, assuming 44.1kHz!\n", bitrate);
 793                 val |= SOUNDFORMAT_FREQ_44100;
 794                 break;
 795         }
 796         /* val = 0xff07; 3m27.993s (65301Hz; -> 64000Hz???) hmm, 66120, 65967, 66123 */
 797         /* val = 0xff09; 17m15.098s (13123,478Hz; -> 12000Hz???) hmm, 13237.2Hz? */
 798         /* val = 0xff0a; 47m30.599s (4764,891Hz; -> 4800Hz???) yup, 4803Hz */
 799         /* val = 0xff0c; 57m0.510s (4010,263Hz; -> 4000Hz???) yup, 4003Hz */
 800         /* val = 0xff05; 5m11.556s (... -> 44100Hz) */
 801         /* val = 0xff03; 10m21.529s (21872,463Hz; -> 22050Hz???) */
 802         /* val = 0xff0f; 20m41.883s (10937,993Hz; -> 11025Hz???) */
 803         /* val = 0xff0d; 41m23.135s (5523,600Hz; -> 5512Hz???) */
 804         /* val = 0xff0e; 28m30.777s (8017Hz; -> 8000Hz???) */
 805
 806         if (channels == 2)
 807                 val |= SOUNDFORMAT_FLAG_2CHANNELS;
 808
 809         if (format_width == 16)
 810                 val |= SOUNDFORMAT_FLAG_16BIT;
 811
 812         spin_lock_irqsave(&chip->reg_lock, flags);
 813
 814         /* set bitrate/format */
 815         snd_azf3328_codec_outw(chip, reg, val);
 816
 817         /* changing the bitrate/format settings switches off the
 818          * audio output with an annoying click in case of 8/16bit format change
 819          * (maybe shutting down DAC/ADC?), thus immediately
 820          * do some tweaking to reenable it and get rid of the clicking
 821          * (FIXME: yes, it works, but what exactly am I doing here?? :)
 822          * FIXME: does this have some side effects for full-duplex
 823          * or other dramatic side effects? */
 824         if (reg == IDX_IO_PLAY_SOUNDFORMAT) /* only do it for playback */
 825                 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS,
 826                         snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS) |
 827                         DMA_PLAY_SOMETHING1 |
 828                         DMA_PLAY_SOMETHING2 |
 829                         SOMETHING_ALMOST_ALWAYS_SET |
 830                         DMA_EPILOGUE_SOMETHING |
 831                         DMA_SOMETHING_ELSE
 832                 );
 833
 834         spin_unlock_irqrestore(&chip->reg_lock, flags);
 835         snd_azf3328_dbgcallleave();
 836 }
 837
 838 static void
 839 snd_azf3328_setdmaa(struct snd_azf3328 *chip,
 840                                 long unsigned int addr,
 841                                 unsigned int count,
 842                                 unsigned int size,
 843                                 int do_recording)
 844 {
 845         unsigned long flags, portbase;
 846         unsigned int is_running;
 847
 848         snd_azf3328_dbgcallenter();
 849         if (do_recording)
 850         {
 851                 /* access capture registers, i.e. skip playback reg section */
 852                 portbase = chip->codec_port + 0x20;
 853                 is_running = chip->is_recording;
 854         }
 855         else
 856         {
 857                 /* access the playback register section */
 858                 portbase = chip->codec_port + 0x00;
 859                 is_running = chip->is_playing;
 860         }
 861
 862         /* AZF3328 uses a two buffer pointer DMA playback approach */
 863         if (!is_running)
 864         {
 865                 unsigned long addr_area2;
 866                 unsigned long count_areas, count_tmp; /* width 32bit -- overflow!! */
 867                 count_areas = size/2;
 868                 addr_area2 = addr+count_areas;
 869                 count_areas--; /* max. index */
 870                 snd_azf3328_dbgplay("set DMA: buf1 %08lx[%lu], buf2 %08lx[%lu]\n", addr, count_areas, addr_area2, count_areas);
 871
 872                 /* build combined I/O buffer length word */
 873                 count_tmp = count_areas;
 874                 count_areas |= (count_tmp << 16);
 875                 spin_lock_irqsave(&chip->reg_lock, flags);
 876                 outl(addr, portbase + IDX_IO_PLAY_DMA_START_1);
 877                 outl(addr_area2, portbase + IDX_IO_PLAY_DMA_START_2);
 878                 outl(count_areas, portbase + IDX_IO_PLAY_DMA_LEN_1);
 879                 spin_unlock_irqrestore(&chip->reg_lock, flags);
 880         }
 881         snd_azf3328_dbgcallleave();
 882 }
 883
 884 static int
 885 snd_azf3328_playback_prepare(struct snd_pcm_substream *substream)
 886 {
 887 #if 0
 888         struct snd_azf3328 *chip = snd_pcm_substream_chip(substream);
 889         struct snd_pcm_runtime *runtime = substream->runtime;
 890         unsigned int size = snd_pcm_lib_buffer_bytes(substream);
 891         unsigned int count = snd_pcm_lib_period_bytes(substream);
 892 #endif
 893
 894         snd_azf3328_dbgcallenter();
 895 #if 0
 896         snd_azf3328_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT,
 897                 runtime->rate,
 898                 snd_pcm_format_width(runtime->format),
 899                 runtime->channels);
 900         snd_azf3328_setdmaa(chip, runtime->dma_addr, count, size, 0);
 901 #endif
 902         snd_azf3328_dbgcallleave();
 903         return 0;
 904 }
 905
 906 static int
 907 snd_azf3328_capture_prepare(struct snd_pcm_substream *substream)
 908 {
 909 #if 0
 910         struct snd_azf3328 *chip = snd_pcm_substream_chip(substream);
 911         struct snd_pcm_runtime *runtime = substream->runtime;
 912         unsigned int size = snd_pcm_lib_buffer_bytes(substream);
 913         unsigned int count = snd_pcm_lib_period_bytes(substream);
 914 #endif
 915
 916         snd_azf3328_dbgcallenter();
 917 #if 0
 918         snd_azf3328_setfmt(chip, IDX_IO_REC_SOUNDFORMAT,
 919                 runtime->rate,
 920                 snd_pcm_format_width(runtime->format),
 921                 runtime->channels);
 922         snd_azf3328_setdmaa(chip, runtime->dma_addr, count, size, 1);
 923 #endif
 924         snd_azf3328_dbgcallleave();
 925         return 0;
 926 }
 927
 928 static int
 929 snd_azf3328_playback_trigger(struct snd_pcm_substream *substream, int cmd)
 930 {
 931         struct snd_azf3328 *chip = snd_pcm_substream_chip(substream);
 932         struct snd_pcm_runtime *runtime = substream->runtime;
 933         int result = 0;
 934         unsigned int status1;
 935
 936         snd_azf3328_dbgcalls("snd_azf3328_playback_trigger cmd %d\n", cmd);
 937
 938         switch (cmd) {
 939         case SNDRV_PCM_TRIGGER_START:
 940                 snd_azf3328_dbgplay("START PLAYBACK\n");
 941
 942                 /* mute WaveOut */
 943                 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 1);
 944
 945                 snd_azf3328_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT,
 946                         runtime->rate,
 947                         snd_pcm_format_width(runtime->format),
 948                         runtime->channels);
 949
 950                 spin_lock(&chip->reg_lock);
 951                 /* stop playback */
 952                 status1 = snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS);
 953                 status1 &= ~DMA_RESUME;
 954                 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1);
 955
 956                 /* FIXME: clear interrupts or what??? */
 957                 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_IRQTYPE, 0xffff);
 958                 spin_unlock(&chip->reg_lock);
 959
 960                 snd_azf3328_setdmaa(chip, runtime->dma_addr,
 961                         snd_pcm_lib_period_bytes(substream),
 962                         snd_pcm_lib_buffer_bytes(substream),
 963                         0);
 964
 965                 spin_lock(&chip->reg_lock);
 966 #ifdef WIN9X
 967                 /* FIXME: enable playback/recording??? */
 968                 status1 |= DMA_PLAY_SOMETHING1 | DMA_PLAY_SOMETHING2;
 969                 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1);
 970
 971                 /* start playback again */
 972                 /* FIXME: what is this value (0x0010)??? */
 973                 status1 |= DMA_RESUME | DMA_EPILOGUE_SOMETHING;
 974                 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1);
 975 #else /* NT4 */
 976                 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS,
 977                         0x0000);
 978                 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS,
 979                         DMA_PLAY_SOMETHING1);
 980                 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS,
 981                         DMA_PLAY_SOMETHING1 |
 982                         DMA_PLAY_SOMETHING2);
 983                 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS,
 984                         DMA_RESUME |
 985                         SOMETHING_ALMOST_ALWAYS_SET |
 986                         DMA_EPILOGUE_SOMETHING |
 987                         DMA_SOMETHING_ELSE);
 988 #endif
 989                 spin_unlock(&chip->reg_lock);
 990
 991                 /* now unmute WaveOut */
 992                 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 0);
 993
 994                 chip->is_playing = 1;
 995                 snd_azf3328_dbgplay("STARTED PLAYBACK\n");
 996                 break;
 997         case SNDRV_PCM_TRIGGER_RESUME:
 998                 snd_azf3328_dbgplay("RESUME PLAYBACK\n");
 999                 /* resume playback if we were active */
1000                 if (chip->is_playing)
1001                         snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS,
1002                                 snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS) | DMA_RESUME);
1003                 break;
1004         case SNDRV_PCM_TRIGGER_STOP:
1005                 snd_azf3328_dbgplay("STOP PLAYBACK\n");
1006
1007                 /* mute WaveOut */
1008                 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 1);
1009
1010                 spin_lock(&chip->reg_lock);
1011                 /* stop playback */
1012                 status1 = snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS);
1013
1014                 status1 &= ~DMA_RESUME;
1015                 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1);
1016
1017                 /* hmm, is this really required? we're resetting the same bit
1018                  * immediately thereafter... */
1019                 status1 |= DMA_PLAY_SOMETHING1;
1020                 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1);
1021
1022                 status1 &= ~DMA_PLAY_SOMETHING1;
1023                 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1);
1024                 spin_unlock(&chip->reg_lock);
1025
1026                 /* now unmute WaveOut */
1027                 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 0);
1028                 chip->is_playing = 0;
1029                 snd_azf3328_dbgplay("STOPPED PLAYBACK\n");
1030                 break;
1031         case SNDRV_PCM_TRIGGER_SUSPEND:
1032                 snd_azf3328_dbgplay("SUSPEND PLAYBACK\n");
1033                 /* make sure playback is stopped */
1034                 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS,
1035                         snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS) & ~DMA_RESUME);
1036                 break;
1037         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
1038                 snd_printk(KERN_ERR "FIXME: SNDRV_PCM_TRIGGER_PAUSE_PUSH NIY!\n");
1039                 break;
1040         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
1041                 snd_printk(KERN_ERR "FIXME: SNDRV_PCM_TRIGGER_PAUSE_RELEASE NIY!\n");
1042                 break;
1043         default:
1044                 printk(KERN_ERR "FIXME: unknown trigger mode!\n");
1045                 return -EINVAL;
1046         }
1047
1048         snd_azf3328_dbgcallleave();
1049         return result;
1050 }
1051
1052 /* this is just analogous to playback; I'm not quite sure whether recording
1053  * should actually be triggered like that */
1054 static int
1055 snd_azf3328_capture_trigger(struct snd_pcm_substream *substream, int cmd)
1056 {
1057         struct snd_azf3328 *chip = snd_pcm_substream_chip(substream);
1058         struct snd_pcm_runtime *runtime = substream->runtime;
1059         int result = 0;
1060         unsigned int status1;
1061
1062         snd_azf3328_dbgcalls("snd_azf3328_capture_trigger cmd %d\n", cmd);
1063
1064         switch (cmd) {
1065         case SNDRV_PCM_TRIGGER_START:
1066
1067                 snd_azf3328_dbgplay("START CAPTURE\n");
1068
1069                 snd_azf3328_setfmt(chip, IDX_IO_REC_SOUNDFORMAT,
1070                         runtime->rate,
1071                         snd_pcm_format_width(runtime->format),
1072                         runtime->channels);
1073
1074                 spin_lock(&chip->reg_lock);
1075                 /* stop recording */
1076                 status1 = snd_azf3328_codec_inw(chip, IDX_IO_REC_FLAGS);
1077                 status1 &= ~DMA_RESUME;
1078                 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1);
1079
1080                 /* FIXME: clear interrupts or what??? */
1081                 snd_azf3328_codec_outw(chip, IDX_IO_REC_IRQTYPE, 0xffff);
1082                 spin_unlock(&chip->reg_lock);
1083
1084                 snd_azf3328_setdmaa(chip, runtime->dma_addr,
1085                         snd_pcm_lib_period_bytes(substream),
1086                         snd_pcm_lib_buffer_bytes(substream),
1087                         1);
1088
1089                 spin_lock(&chip->reg_lock);
1090 #ifdef WIN9X
1091                 /* FIXME: enable playback/recording??? */
1092                 status1 |= DMA_PLAY_SOMETHING1 | DMA_PLAY_SOMETHING2;
1093                 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1);
1094
1095                 /* start capture again */
1096                 /* FIXME: what is this value (0x0010)??? */
1097                 status1 |= DMA_RESUME | DMA_EPILOGUE_SOMETHING;
1098                 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1);
1099 #else
1100                 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS,
1101                         0x0000);
1102                 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS,
1103                         DMA_PLAY_SOMETHING1);
1104                 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS,
1105                         DMA_PLAY_SOMETHING1 |
1106                         DMA_PLAY_SOMETHING2);
1107                 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS,
1108                         DMA_RESUME |
1109                         SOMETHING_ALMOST_ALWAYS_SET |
1110                         DMA_EPILOGUE_SOMETHING |
1111                         DMA_SOMETHING_ELSE);
1112 #endif
1113                 spin_unlock(&chip->reg_lock);
1114
1115                 chip->is_recording = 1;
1116                 snd_azf3328_dbgplay("STARTED CAPTURE\n");
1117                 break;
1118         case SNDRV_PCM_TRIGGER_RESUME:
1119                 snd_azf3328_dbgplay("RESUME CAPTURE\n");
1120                 /* resume recording if we were active */
1121                 if (chip->is_recording)
1122                         snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS,
1123                                 snd_azf3328_codec_inw(chip, IDX_IO_REC_FLAGS) | DMA_RESUME);
1124                 break;
1125         case SNDRV_PCM_TRIGGER_STOP:
1126                 snd_azf3328_dbgplay("STOP CAPTURE\n");
1127
1128                 spin_lock(&chip->reg_lock);
1129                 /* stop recording */
1130                 status1 = snd_azf3328_codec_inw(chip, IDX_IO_REC_FLAGS);
1131
1132                 status1 &= ~DMA_RESUME;
1133                 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1);
1134
1135                 status1 |= DMA_PLAY_SOMETHING1;
1136                 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1);
1137
1138                 status1 &= ~DMA_PLAY_SOMETHING1;
1139                 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1);
1140                 spin_unlock(&chip->reg_lock);
1141
1142                 chip->is_recording = 0;
1143                 snd_azf3328_dbgplay("STOPPED CAPTURE\n");
1144                 break;
1145         case SNDRV_PCM_TRIGGER_SUSPEND:
1146                 snd_azf3328_dbgplay("SUSPEND CAPTURE\n");
1147                 /* make sure recording is stopped */
1148                 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS,
1149                         snd_azf3328_codec_inw(chip, IDX_IO_REC_FLAGS) & ~DMA_RESUME);
1150                 break;
1151         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
1152                 snd_printk(KERN_ERR "FIXME: SNDRV_PCM_TRIGGER_PAUSE_PUSH NIY!\n");
1153                 break;
1154         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
1155                 snd_printk(KERN_ERR "FIXME: SNDRV_PCM_TRIGGER_PAUSE_RELEASE NIY!\n");
1156                 break;
1157         default:
1158                 printk(KERN_ERR "FIXME: unknown trigger mode!\n");
1159                 return -EINVAL;
1160         }
1161
1162         snd_azf3328_dbgcallleave();
1163         return result;
1164 }
1165
1166 static snd_pcm_uframes_t
1167 snd_azf3328_playback_pointer(struct snd_pcm_substream *substream)
1168 {
1169         struct snd_azf3328 *chip = snd_pcm_substream_chip(substream);
1170         unsigned long bufptr, result;
1171         snd_pcm_uframes_t frmres;
1172
1173 #ifdef QUERY_HARDWARE
1174         bufptr = inl(chip->codec_port+IDX_IO_PLAY_DMA_START_1);
1175 #else
1176         bufptr = substream->runtime->dma_addr;
1177 #endif
1178         result = inl(chip->codec_port+IDX_IO_PLAY_DMA_CURRPOS);
1179
1180         /* calculate offset */
1181         result -= bufptr;
1182         frmres = bytes_to_frames( substream->runtime, result);
1183         snd_azf3328_dbgplay("PLAY @ 0x%8lx, frames %8ld\n", result, frmres);
1184         return frmres;
1185 }
1186
1187 static snd_pcm_uframes_t
1188 snd_azf3328_capture_pointer(struct snd_pcm_substream *substream)
1189 {
1190         struct snd_azf3328 *chip = snd_pcm_substream_chip(substream);
1191         unsigned long bufptr, result;
1192         snd_pcm_uframes_t frmres;
1193
1194 #ifdef QUERY_HARDWARE
1195         bufptr = inl(chip->codec_port+IDX_IO_REC_DMA_START_1);
1196 #else
1197         bufptr = substream->runtime->dma_addr;
1198 #endif
1199         result = inl(chip->codec_port+IDX_IO_REC_DMA_CURRPOS);
1200
1201         /* calculate offset */
1202         result -= bufptr;
1203         frmres = bytes_to_frames( substream->runtime, result);
1204         snd_azf3328_dbgplay("REC  @ 0x%8lx, frames %8ld\n", result, frmres);
1205         return frmres;
1206 }
1207
1208 static irqreturn_t
1209 snd_azf3328_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1210 {
1211         struct snd_azf3328 *chip = dev_id;
1212         u8 status, which;
1213         static unsigned long irq_count;
1214
1215         status = snd_azf3328_codec_inb(chip, IDX_IO_IRQSTATUS);
1216
1217         /* fast path out, to ease interrupt sharing */
1218         if (!(status & (IRQ_PLAYBACK|IRQ_RECORDING|IRQ_MPU401|IRQ_TIMER)))
1219                 return IRQ_NONE; /* must be interrupt for another device */
1220
1221         snd_azf3328_dbgplay("Interrupt %ld!\nIDX_IO_PLAY_FLAGS %04x, IDX_IO_PLAY_IRQTYPE %04x, IDX_IO_IRQSTATUS %04x\n",
1222                 irq_count,
1223                 snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS),
1224                 snd_azf3328_codec_inw(chip, IDX_IO_PLAY_IRQTYPE),
1225                 status);
1226
1227         if (status & IRQ_TIMER)
1228         {
1229                 /* snd_azf3328_dbgplay("timer %ld\n", inl(chip->codec_port+IDX_IO_TIMER_VALUE) & TIMER_VALUE_MASK); */
1230                 if (chip->timer)
1231                         snd_timer_interrupt(chip->timer, chip->timer->sticks);
1232                 /* ACK timer */
1233                 spin_lock(&chip->reg_lock);
1234                 snd_azf3328_codec_outb(chip, IDX_IO_TIMER_VALUE + 3, 0x07);
1235                 spin_unlock(&chip->reg_lock);
1236                 snd_azf3328_dbgplay("azt3328: timer IRQ\n");
1237         }
1238         if (status & IRQ_PLAYBACK)
1239         {
1240                 spin_lock(&chip->reg_lock);
1241                 which = snd_azf3328_codec_inb(chip, IDX_IO_PLAY_IRQTYPE);
1242                 /* ack all IRQ types immediately */
1243                 snd_azf3328_codec_outb(chip, IDX_IO_PLAY_IRQTYPE, which);
1244                 spin_unlock(&chip->reg_lock);
1245
1246                 if (chip->pcm && chip->playback_substream)
1247                 {
1248                         snd_pcm_period_elapsed(chip->playback_substream);
1249                         snd_azf3328_dbgplay("PLAY period done (#%x), @ %x\n",
1250                                 which,
1251                                 inl(chip->codec_port+IDX_IO_PLAY_DMA_CURRPOS));
1252                 }
1253                 else
1254                         snd_azf3328_dbgplay("azt3328: ouch, irq handler problem!\n");
1255                 if (which & IRQ_PLAY_SOMETHING)
1256                         snd_azf3328_dbgplay("azt3328: unknown play IRQ type occurred, please report!\n");
1257         }
1258         if (status & IRQ_RECORDING)
1259         {
1260                 spin_lock(&chip->reg_lock);
1261                 which = snd_azf3328_codec_inb(chip, IDX_IO_REC_IRQTYPE);
1262                 /* ack all IRQ types immediately */
1263                 snd_azf3328_codec_outb(chip, IDX_IO_REC_IRQTYPE, which);
1264                 spin_unlock(&chip->reg_lock);
1265
1266                 if (chip->pcm && chip->capture_substream)
1267                 {
1268                         snd_pcm_period_elapsed(chip->capture_substream);
1269                         snd_azf3328_dbgplay("REC  period done (#%x), @ %x\n",
1270                                 which,
1271                                 inl(chip->codec_port+IDX_IO_REC_DMA_CURRPOS));
1272                 }
1273                 else
1274                         snd_azf3328_dbgplay("azt3328: ouch, irq handler problem!\n");
1275                 if (which & IRQ_REC_SOMETHING)
1276                         snd_azf3328_dbgplay("azt3328: unknown rec IRQ type occurred, please report!\n");
1277         }
1278         /* MPU401 has less critical IRQ requirements
1279          * than timer and playback/recording, right? */
1280         if (status & IRQ_MPU401)
1281         {
1282                 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data, regs);
1283
1284                 /* hmm, do we have to ack the IRQ here somehow?
1285                  * If so, then I don't know how... */
1286                 snd_azf3328_dbgplay("azt3328: MPU401 IRQ\n");
1287         }
1288         irq_count++;
1289         return IRQ_HANDLED;
1290 }
1291
1292 /*****************************************************************/
1293
1294 static const struct snd_pcm_hardware snd_azf3328_playback =
1295 {
1296         /* FIXME!! Correct? */
1297         .info =                 SNDRV_PCM_INFO_MMAP |
1298                                 SNDRV_PCM_INFO_INTERLEAVED |
1299                                 SNDRV_PCM_INFO_MMAP_VALID,
1300         .formats =              SNDRV_PCM_FMTBIT_S8 |
1301                                 SNDRV_PCM_FMTBIT_U8 |
1302                                 SNDRV_PCM_FMTBIT_S16_LE |
1303                                 SNDRV_PCM_FMTBIT_U16_LE,
1304         .rates =                SNDRV_PCM_RATE_5512 |
1305                                 SNDRV_PCM_RATE_8000_48000 |
1306                                 SNDRV_PCM_RATE_KNOT,
1307         .rate_min =             4000,
1308         .rate_max =             66200,
1309         .channels_min =         1,
1310         .channels_max =         2,
1311         .buffer_bytes_max =     65536,
1312         .period_bytes_min =     64,
1313         .period_bytes_max =     65536,
1314         .periods_min =          1,
1315         .periods_max =          1024,
1316         /* FIXME: maybe that card actually has a FIFO?
1317          * Hmm, it seems newer revisions do have one, but we still don't know
1318          * its size... */
1319         .fifo_size =            0,
1320 };
1321
1322 static const struct snd_pcm_hardware snd_azf3328_capture =
1323 {
1324         /* FIXME */
1325         .info =                 SNDRV_PCM_INFO_MMAP |
1326                                 SNDRV_PCM_INFO_INTERLEAVED |
1327                                 SNDRV_PCM_INFO_MMAP_VALID,
1328         .formats =              SNDRV_PCM_FMTBIT_S8 |
1329                                 SNDRV_PCM_FMTBIT_U8 |
1330                                 SNDRV_PCM_FMTBIT_S16_LE |
1331                                 SNDRV_PCM_FMTBIT_U16_LE,
1332         .rates =                SNDRV_PCM_RATE_5512 |
1333                                 SNDRV_PCM_RATE_8000_48000 |
1334                                 SNDRV_PCM_RATE_KNOT,
1335         .rate_min =             4000,
1336         .rate_max =             66200,
1337         .channels_min =         1,
1338         .channels_max =         2,
1339         .buffer_bytes_max =     65536,
1340         .period_bytes_min =     64,
1341         .period_bytes_max =     65536,
1342         .periods_min =          1,
1343         .periods_max =          1024,
1344         .fifo_size =            0,
1345 };
1346
1347
1348 static unsigned int snd_azf3328_fixed_rates[] = {
1349         4000, 4800, 5512, 6620, 8000, 9600, 11025, 13240, 16000, 22050, 32000,
1350         44100, 48000, 66200 };
1351 static struct snd_pcm_hw_constraint_list snd_azf3328_hw_constraints_rates = {
1352         .count = ARRAY_SIZE(snd_azf3328_fixed_rates),
1353         .list = snd_azf3328_fixed_rates,
1354         .mask = 0,
1355 };
1356
1357 /*****************************************************************/
1358
1359 static int
1360 snd_azf3328_playback_open(struct snd_pcm_substream *substream)
1361 {
1362         struct snd_azf3328 *chip = snd_pcm_substream_chip(substream);
1363         struct snd_pcm_runtime *runtime = substream->runtime;
1364
1365         snd_azf3328_dbgcallenter();
1366         chip->playback_substream = substream;
1367         runtime->hw = snd_azf3328_playback;
1368         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
1369                                    &snd_azf3328_hw_constraints_rates);
1370         snd_azf3328_dbgcallleave();
1371         return 0;
1372 }
1373
1374 static int
1375 snd_azf3328_capture_open(struct snd_pcm_substream *substream)
1376 {
1377         struct snd_azf3328 *chip = snd_pcm_substream_chip(substream);
1378         struct snd_pcm_runtime *runtime = substream->runtime;
1379
1380         snd_azf3328_dbgcallenter();
1381         chip->capture_substream = substream;
1382         runtime->hw = snd_azf3328_capture;
1383         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
1384                                    &snd_azf3328_hw_constraints_rates);
1385         snd_azf3328_dbgcallleave();
1386         return 0;
1387 }
1388
1389 static int
1390 snd_azf3328_playback_close(struct snd_pcm_substream *substream)
1391 {
1392         struct snd_azf3328 *chip = snd_pcm_substream_chip(substream);
1393
1394         snd_azf3328_dbgcallenter();
1395
1396         chip->playback_substream = NULL;
1397         snd_azf3328_dbgcallleave();
1398         return 0;
1399 }
1400
1401 static int
1402 snd_azf3328_capture_close(struct snd_pcm_substream *substream)
1403 {
1404         struct snd_azf3328 *chip = snd_pcm_substream_chip(substream);
1405
1406         snd_azf3328_dbgcallenter();
1407         chip->capture_substream = NULL;
1408         snd_azf3328_dbgcallleave();
1409         return 0;
1410 }
1411
1412 /******************************************************************/
1413
1414 static struct snd_pcm_ops snd_azf3328_playback_ops = {
1415         .open =         snd_azf3328_playback_open,
1416         .close =        snd_azf3328_playback_close,
1417         .ioctl =        snd_pcm_lib_ioctl,
1418         .hw_params =    snd_azf3328_hw_params,
1419         .hw_free =      snd_azf3328_hw_free,
1420         .prepare =      snd_azf3328_playback_prepare,
1421         .trigger =      snd_azf3328_playback_trigger,
1422         .pointer =      snd_azf3328_playback_pointer
1423 };
1424
1425 static struct snd_pcm_ops snd_azf3328_capture_ops = {
1426         .open =         snd_azf3328_capture_open,
1427         .close =        snd_azf3328_capture_close,
1428         .ioctl =        snd_pcm_lib_ioctl,
1429         .hw_params =    snd_azf3328_hw_params,
1430         .hw_free =      snd_azf3328_hw_free,
1431         .prepare =      snd_azf3328_capture_prepare,
1432         .trigger =      snd_azf3328_capture_trigger,
1433         .pointer =      snd_azf3328_capture_pointer
1434 };
1435
1436 static int __devinit
1437 snd_azf3328_pcm(struct snd_azf3328 *chip, int device)
1438 {
1439         struct snd_pcm *pcm;
1440         int err;
1441
1442         snd_azf3328_dbgcallenter();
1443         if ((err = snd_pcm_new(chip->card, "AZF3328 DSP", device, 1, 1, &pcm)) < 0)
1444                 return err;
1445         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_azf3328_playback_ops);
1446         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_azf3328_capture_ops);
1447
1448         pcm->private_data = chip;
1449         pcm->info_flags = 0;
1450         strcpy(pcm->name, chip->card->shortname);
1451         chip->pcm = pcm;
1452
1453         snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1454                                               snd_dma_pci_data(chip->pci), 64*1024, 64*1024);
1455
1456         snd_azf3328_dbgcallleave();
1457         return 0;
1458 }
1459
1460 /******************************************************************/
1461
1462 #ifdef SUPPORT_JOYSTICK
1463 static int __devinit
1464 snd_azf3328_config_joystick(struct snd_azf3328 *chip, int dev)
1465 {
1466         struct gameport *gp;
1467         struct resource *r;
1468
1469         if (!joystick[dev])
1470                 return -ENODEV;
1471
1472         if (!(r = request_region(0x200, 8, "AZF3328 gameport"))) {
1473                 printk(KERN_WARNING "azt3328: cannot reserve joystick ports\n");
1474                 return -EBUSY;
1475         }
1476
1477         chip->gameport = gp = gameport_allocate_port();
1478         if (!gp) {
1479                 printk(KERN_ERR "azt3328: cannot allocate memory for gameport\n");
1480                 release_and_free_resource(r);
1481                 return -ENOMEM;
1482         }
1483
1484         gameport_set_name(gp, "AZF3328 Gameport");
1485         gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));
1486         gameport_set_dev_parent(gp, &chip->pci->dev);
1487         gp->io = 0x200;
1488         gameport_set_port_data(gp, r);
1489
1490         snd_azf3328_io2_outb(chip, IDX_IO2_LEGACY_ADDR,
1491                               snd_azf3328_io2_inb(chip, IDX_IO2_LEGACY_ADDR) | LEGACY_JOY);
1492
1493         gameport_register_port(chip->gameport);
1494
1495         return 0;
1496 }
1497
1498 static void
1499 snd_azf3328_free_joystick(struct snd_azf3328 *chip)
1500 {
1501         if (chip->gameport) {
1502                 struct resource *r = gameport_get_port_data(chip->gameport);
1503
1504                 gameport_unregister_port(chip->gameport);
1505                 chip->gameport = NULL;
1506                 /* disable gameport */
1507                 snd_azf3328_io2_outb(chip, IDX_IO2_LEGACY_ADDR,
1508                                       snd_azf3328_io2_inb(chip, IDX_IO2_LEGACY_ADDR) & ~LEGACY_JOY);
1509                 release_and_free_resource(r);
1510         }
1511 }
1512 #else
1513 static inline int
1514 snd_azf3328_config_joystick(struct snd_azf3328 *chip, int dev) { return -ENOSYS; }
1515 static inline void
1516 snd_azf3328_free_joystick(struct snd_azf3328 *chip) { }
1517 #endif
1518
1519 /******************************************************************/
1520
1521 static int
1522 snd_azf3328_free(struct snd_azf3328 *chip)
1523 {
1524         if (chip->irq < 0)
1525                 goto __end_hw;
1526
1527         /* reset (close) mixer */
1528         snd_azf3328_mixer_set_mute(chip, IDX_MIXER_PLAY_MASTER, 1); /* first mute master volume */
1529         snd_azf3328_mixer_outw(chip, IDX_MIXER_RESET, 0x0000);
1530
1531         /* interrupt setup - mask everything (FIXME!) */
1532         /* well, at least we know how to disable the timer IRQ */
1533         snd_azf3328_codec_outb(chip, IDX_IO_TIMER_VALUE + 3, 0x00);
1534
1535         synchronize_irq(chip->irq);
1536 __end_hw:
1537         snd_azf3328_free_joystick(chip);
1538         if (chip->irq >= 0)
1539                 free_irq(chip->irq, (void *)chip);
1540         pci_release_regions(chip->pci);
1541         pci_disable_device(chip->pci);
1542
1543         kfree(chip);
1544         return 0;
1545 }
1546
1547 static int
1548 snd_azf3328_dev_free(struct snd_device *device)
1549 {
1550         struct snd_azf3328 *chip = device->device_data;
1551         return snd_azf3328_free(chip);
1552 }
1553
1554 /******************************************************************/
1555
1556 /*** NOTE: the physical timer resolution actually is 1024000 ticks per second,
1557  *** but announcing those attributes to user-space would make programs
1558  *** configure the timer to a 1 tick value, resulting in an absolutely fatal
1559  *** timer IRQ storm.
1560  *** Thus I chose to announce a down-scaled virtual timer to the outside and
1561  *** calculate real timer countdown values internally.
1562  *** (the scale factor can be set via module parameter "seqtimer_scaling").
1563  ***/
1564
1565 static int
1566 snd_azf3328_timer_start(struct snd_timer *timer)
1567 {
1568         struct snd_azf3328 *chip;
1569         unsigned long flags;
1570         unsigned int delay;
1571
1572         snd_azf3328_dbgcallenter();
1573         chip = snd_timer_chip(timer);
1574         delay = ((timer->sticks * seqtimer_scaling) - 1) & TIMER_VALUE_MASK;
1575         if (delay < 49)
1576         {
1577                 /* uhoh, that's not good, since user-space won't know about
1578                  * this timing tweak
1579                  * (we need to do it to avoid a lockup, though) */
1580
1581                 snd_azf3328_dbgtimer("delay was too low (%d)!\n", delay);
1582                 delay = 49; /* minimum time is 49 ticks */
1583         }
1584         snd_azf3328_dbgtimer("setting timer countdown value %d, add COUNTDOWN|IRQ\n", delay);
1585         delay |= TIMER_ENABLE_COUNTDOWN | TIMER_ENABLE_IRQ;
1586         spin_lock_irqsave(&chip->reg_lock, flags);
1587         snd_azf3328_codec_outl(chip, IDX_IO_TIMER_VALUE, delay);
1588         spin_unlock_irqrestore(&chip->reg_lock, flags);
1589         snd_azf3328_dbgcallleave();
1590         return 0;
1591 }
1592
1593 static int
1594 snd_azf3328_timer_stop(struct snd_timer *timer)
1595 {
1596         struct snd_azf3328 *chip;
1597         unsigned long flags;
1598
1599         snd_azf3328_dbgcallenter();
1600         chip = snd_timer_chip(timer);
1601         spin_lock_irqsave(&chip->reg_lock, flags);
1602         /* disable timer countdown and interrupt */
1603         /* FIXME: should we write TIMER_ACK_IRQ here? */
1604         snd_azf3328_codec_outb(chip, IDX_IO_TIMER_VALUE + 3, 0);
1605         spin_unlock_irqrestore(&chip->reg_lock, flags);
1606         snd_azf3328_dbgcallleave();
1607         return 0;
1608 }
1609
1610
1611 static int
1612 snd_azf3328_timer_precise_resolution(struct snd_timer *timer,
1613                                                unsigned long *num, unsigned long *den)
1614 {
1615         snd_azf3328_dbgcallenter();
1616         *num = 1;
1617         *den = 1024000 / seqtimer_scaling;
1618         snd_azf3328_dbgcallleave();
1619         return 0;
1620 }
1621
1622 static struct snd_timer_hardware snd_azf3328_timer_hw = {
1623         .flags = SNDRV_TIMER_HW_AUTO,
1624         .resolution = 977, /* 1000000/1024000 = 0.9765625us */
1625         .ticks = 1024000, /* max tick count, defined by the value register; actually it's not 1024000, but 1048576, but we don't care */
1626         .start = snd_azf3328_timer_start,
1627         .stop = snd_azf3328_timer_stop,
1628         .precise_resolution = snd_azf3328_timer_precise_resolution,
1629 };
1630
1631 static int __devinit
1632 snd_azf3328_timer(struct snd_azf3328 *chip, int device)
1633 {
1634         struct snd_timer *timer = NULL;
1635         struct snd_timer_id tid;
1636         int err;
1637
1638         snd_azf3328_dbgcallenter();
1639         tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1640         tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1641         tid.card = chip->card->number;
1642         tid.device = device;
1643         tid.subdevice = 0;
1644
1645         snd_azf3328_timer_hw.resolution *= seqtimer_scaling;
1646         snd_azf3328_timer_hw.ticks /= seqtimer_scaling;
1647         if ((err = snd_timer_new(chip->card, "AZF3328", &tid, &timer)) < 0) {
1648                 goto out;
1649         }
1650
1651         strcpy(timer->name, "AZF3328 timer");
1652         timer->private_data = chip;
1653         timer->hw = snd_azf3328_timer_hw;
1654
1655         chip->timer = timer;
1656
1657         err = 0;
1658
1659 out:
1660         snd_azf3328_dbgcallleave();
1661         return err;
1662 }
1663
1664 /******************************************************************/
1665
1666 #if 0
1667 /* check whether a bit can be modified */
1668 static void
1669 snd_azf3328_test_bit(unsigned int reg, int bit)
1670 {
1671         unsigned char val, valoff, valon;
1672
1673         val = inb(reg);
1674
1675         outb(val & ~(1 << bit), reg);
1676         valoff = inb(reg);
1677
1678         outb(val|(1 << bit), reg);
1679         valon = inb(reg);
1680
1681         outb(val, reg);
1682
1683         printk(KERN_ERR "reg %04x bit %d: %02x %02x %02x\n", reg, bit, val, valoff, valon);
1684 }
1685 #endif
1686
1687 static void
1688 snd_azf3328_debug_show_ports(const struct snd_azf3328 *chip)
1689 {
1690 #if DEBUG_MISC
1691         u16 tmp;
1692
1693         snd_azf3328_dbgmisc("codec_port 0x%lx, io2_port 0x%lx, mpu_port 0x%lx, synth_port 0x%lx, mixer_port 0x%lx, irq %d\n", chip->codec_port, chip->io2_port, chip->mpu_port, chip->synth_port, chip->mixer_port, chip->irq);
1694
1695         snd_azf3328_dbgmisc("io2 %02x %02x %02x %02x %02x %02x\n", snd_azf3328_io2_inb(chip, 0), snd_azf3328_io2_inb(chip, 1), snd_azf3328_io2_inb(chip, 2), snd_azf3328_io2_inb(chip, 3), snd_azf3328_io2_inb(chip, 4), snd_azf3328_io2_inb(chip, 5));
1696
1697         for (tmp=0; tmp <= 0x01; tmp += 1)
1698                 snd_azf3328_dbgmisc("0x%02x: opl 0x%04x, mpu300 0x%04x, mpu310 0x%04x, mpu320 0x%04x, mpu330 0x%04x\n", tmp, inb(0x388 + tmp), inb(0x300 + tmp), inb(0x310 + tmp), inb(0x320 + tmp), inb(0x330 + tmp));
1699
1700         for (tmp = 0; tmp <= 0x6E; tmp += 2)
1701                 snd_azf3328_dbgmisc("0x%02x: 0x%04x\n", tmp, snd_azf3328_codec_inb(chip, tmp));
1702 #endif
1703 }
1704
1705 static int __devinit
1706 snd_azf3328_create(struct snd_card *card,
1707                                          struct pci_dev *pci,
1708                                          unsigned long device_type,
1709                                          struct snd_azf3328 ** rchip)
1710 {
1711         struct snd_azf3328 *chip;
1712         int err;
1713         static struct snd_device_ops ops = {
1714                 .dev_free =     snd_azf3328_dev_free,
1715         };
1716         u16 tmp;
1717
1718         *rchip = NULL;
1719
1720         if ((err = pci_enable_device(pci)) < 0)
1721                 return err;
1722
1723         chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1724         if (chip == NULL) {
1725                 err = -ENOMEM;
1726                 goto out_err;
1727         }
1728         spin_lock_init(&chip->reg_lock);
1729         chip->card = card;
1730         chip->pci = pci;
1731         chip->irq = -1;
1732
1733         /* check if we can restrict PCI DMA transfers to 24 bits */
1734         if (pci_set_dma_mask(pci, DMA_24BIT_MASK) < 0 ||
1735             pci_set_consistent_dma_mask(pci, DMA_24BIT_MASK) < 0) {
1736                 snd_printk(KERN_ERR "architecture does not support 24bit PCI busmaster DMA\n");
1737                 err = -ENXIO;
1738                 goto out_err;
1739         }
1740
1741         if ((err = pci_request_regions(pci, "Aztech AZF3328")) < 0) {
1742                 goto out_err;
1743         }
1744
1745         chip->codec_port = pci_resource_start(pci, 0);
1746         chip->io2_port   = pci_resource_start(pci, 1);
1747         chip->mpu_port   = pci_resource_start(pci, 2);
1748         chip->synth_port = pci_resource_start(pci, 3);
1749         chip->mixer_port = pci_resource_start(pci, 4);
1750
1751         if (request_irq(pci->irq, snd_azf3328_interrupt, SA_INTERRUPT|SA_SHIRQ, card->shortname, (void *)chip)) {
1752                 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1753                 err = -EBUSY;
1754                 goto out_err;
1755         }
1756         chip->irq = pci->irq;
1757         pci_set_master(pci);
1758         synchronize_irq(chip->irq);
1759
1760         snd_azf3328_debug_show_ports(chip);
1761
1762         if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1763                 goto out_err;
1764         }
1765
1766         /* create mixer interface & switches */
1767         if ((err = snd_azf3328_mixer_new(chip)) < 0)
1768                 goto out_err;
1769
1770 #if 0
1771         /* set very low bitrate to reduce noise and power consumption? */
1772         snd_azf3328_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT, 5512, 8, 1);
1773 #endif
1774
1775         /* standard chip init stuff */
1776         /* default IRQ init value */
1777         tmp = DMA_PLAY_SOMETHING2|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE;
1778
1779         spin_lock_irq(&chip->reg_lock);
1780         snd_azf3328_codec_outb(chip, IDX_IO_PLAY_FLAGS, tmp);
1781         snd_azf3328_codec_outb(chip, IDX_IO_REC_FLAGS, tmp);
1782         snd_azf3328_codec_outb(chip, IDX_IO_SOMETHING_FLAGS, tmp);
1783         snd_azf3328_codec_outb(chip, IDX_IO_TIMER_VALUE + 3, 0x00); /* disable timer */
1784         spin_unlock_irq(&chip->reg_lock);
1785
1786         snd_card_set_dev(card, &pci->dev);
1787
1788         *rchip = chip;
1789
1790         err = 0;
1791         goto out;
1792
1793 out_err:
1794         if (chip)
1795                 snd_azf3328_free(chip);
1796         pci_disable_device(pci);
1797
1798 out:
1799         return err;
1800 }
1801
1802 static int __devinit
1803 snd_azf3328_probe(struct pci_dev *pci, const struct pci_device_id *pci_id)
1804 {
1805         static int dev;
1806         struct snd_card *card;
1807         struct snd_azf3328 *chip;
1808         struct snd_opl3 *opl3;
1809         int err;
1810
1811         snd_azf3328_dbgcallenter();
1812         if (dev >= SNDRV_CARDS)
1813                 return -ENODEV;
1814         if (!enable[dev]) {
1815                 dev++;
1816                 return -ENOENT;
1817         }
1818
1819         card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0 );
1820         if (card == NULL)
1821                 return -ENOMEM;
1822
1823         strcpy(card->driver, "AZF3328");
1824         strcpy(card->shortname, "Aztech AZF3328 (PCI168)");
1825
1826         if ((err = snd_azf3328_create(card, pci, pci_id->driver_data, &chip)) < 0) {
1827                 goto out_err;
1828         }
1829
1830         card->private_data = chip;
1831
1832         if ((err = snd_mpu401_uart_new( card, 0, MPU401_HW_MPU401,
1833                                         chip->mpu_port, 1, pci->irq, 0,
1834                                         &chip->rmidi)) < 0) {
1835                 snd_printk(KERN_ERR "azf3328: no MPU-401 device at 0x%lx?\n", chip->mpu_port);
1836                 goto out_err;
1837         }
1838
1839         if ((err = snd_azf3328_timer(chip, 0)) < 0) {
1840                 goto out_err;
1841         }
1842
1843         if ((err = snd_azf3328_pcm(chip, 0)) < 0) {
1844                 goto out_err;
1845         }
1846
1847         if (snd_opl3_create(card, chip->synth_port, chip->synth_port+2,
1848                             OPL3_HW_AUTO, 1, &opl3) < 0) {
1849                 snd_printk(KERN_ERR "azf3328: no OPL3 device at 0x%lx-0x%lx?\n",
1850                            chip->synth_port, chip->synth_port+2 );
1851         } else {
1852                 if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
1853                         goto out_err;
1854                 }
1855         }
1856
1857         opl3->private_data = chip;
1858
1859         sprintf(card->longname, "%s at 0x%lx, irq %i",
1860                 card->shortname, chip->codec_port, chip->irq);
1861
1862         if ((err = snd_card_register(card)) < 0) {
1863                 goto out_err;
1864         }
1865
1866 #ifdef MODULE
1867         printk(
1868 "azt3328: Sound driver for Aztech AZF3328-based soundcards such as PCI168\n"
1869 "azt3328: (hardware was completely undocumented - ZERO support from Aztech).\n"
1870 "azt3328: Feel free to contact andi AT lisas.de for bug reports etc.!\n"
1871 "azt3328: User-scalable sequencer timer set to %dHz (1024000Hz / %d).\n",
1872         1024000 / seqtimer_scaling, seqtimer_scaling);
1873 #endif
1874
1875         if (snd_azf3328_config_joystick(chip, dev) < 0)
1876                 snd_azf3328_io2_outb(chip, IDX_IO2_LEGACY_ADDR,
1877                               snd_azf3328_io2_inb(chip, IDX_IO2_LEGACY_ADDR) & ~LEGACY_JOY);
1878
1879         pci_set_drvdata(pci, card);
1880         dev++;
1881
1882         err = 0;
1883         goto out;
1884
1885 out_err:
1886         snd_card_free(card);
1887
1888 out:
1889         snd_azf3328_dbgcallleave();
1890         return err;
1891 }
1892
1893 static void __devexit
1894 snd_azf3328_remove(struct pci_dev *pci)
1895 {
1896         snd_azf3328_dbgcallenter();
1897         snd_card_free(pci_get_drvdata(pci));
1898         pci_set_drvdata(pci, NULL);
1899         snd_azf3328_dbgcallleave();
1900 }
1901
1902 #ifdef CONFIG_PM
1903 static int
1904 snd_azf3328_suspend(struct pci_dev *pci, pm_message_t state)
1905 {
1906         struct snd_card *card = pci_get_drvdata(pci);
1907         struct snd_azf3328 *chip = card->private_data;
1908         int reg;
1909
1910         snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1911
1912         snd_pcm_suspend_all(chip->pcm);
1913
1914         for (reg = 0; reg < AZF_IO_SIZE_MIXER_PM / 2; reg++)
1915                 chip->saved_regs_mixer[reg] = inw(chip->mixer_port + reg * 2);
1916
1917         /* make sure to disable master volume etc. to prevent looping sound */
1918         snd_azf3328_mixer_set_mute(chip, IDX_MIXER_PLAY_MASTER, 1);
1919         snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 1);
1920
1921         for (reg = 0; reg < AZF_IO_SIZE_CODEC_PM / 2; reg++)
1922                 chip->saved_regs_codec[reg] = inw(chip->codec_port + reg * 2);
1923         for (reg = 0; reg < AZF_IO_SIZE_IO2_PM / 2; reg++)
1924                 chip->saved_regs_io2[reg] = inw(chip->io2_port + reg * 2);
1925         for (reg = 0; reg < AZF_IO_SIZE_MPU_PM / 2; reg++)
1926                 chip->saved_regs_mpu[reg] = inw(chip->mpu_port + reg * 2);
1927         for (reg = 0; reg < AZF_IO_SIZE_SYNTH_PM / 2; reg++)
1928                 chip->saved_regs_synth[reg] = inw(chip->synth_port + reg * 2);
1929
1930         pci_set_power_state(pci, PCI_D3hot);
1931         pci_disable_device(pci);
1932         pci_save_state(pci);
1933         return 0;
1934 }
1935
1936 static int
1937 snd_azf3328_resume(struct pci_dev *pci)
1938 {
1939         struct snd_card *card = pci_get_drvdata(pci);
1940         struct snd_azf3328 *chip = card->private_data;
1941         int reg;
1942
1943         pci_restore_state(pci);
1944         pci_enable_device(pci);
1945         pci_set_power_state(pci, PCI_D0);
1946         pci_set_master(pci);
1947
1948         for (reg = 0; reg < AZF_IO_SIZE_IO2_PM / 2; reg++)
1949                 outw(chip->saved_regs_io2[reg], chip->io2_port + reg * 2);
1950         for (reg = 0; reg < AZF_IO_SIZE_MPU_PM / 2; reg++)
1951                 outw(chip->saved_regs_mpu[reg], chip->mpu_port + reg * 2);
1952         for (reg = 0; reg < AZF_IO_SIZE_SYNTH_PM / 2; reg++)
1953                 outw(chip->saved_regs_synth[reg], chip->synth_port + reg * 2);
1954         for (reg = 0; reg < AZF_IO_SIZE_MIXER_PM / 2; reg++)
1955                 outw(chip->saved_regs_mixer[reg], chip->mixer_port + reg * 2);
1956         for (reg = 0; reg < AZF_IO_SIZE_CODEC_PM / 2; reg++)
1957                 outw(chip->saved_regs_codec[reg], chip->codec_port + reg * 2);
1958
1959         snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1960         return 0;
1961 }
1962 #endif
1963
1964
1965
1966
1967 static struct pci_driver driver = {
1968         .name = "AZF3328",
1969         .id_table = snd_azf3328_ids,
1970         .probe = snd_azf3328_probe,
1971         .remove = __devexit_p(snd_azf3328_remove),
1972 #ifdef CONFIG_PM
1973         .suspend = snd_azf3328_suspend,
1974         .resume = snd_azf3328_resume,
1975 #endif
1976 };
1977
1978 static int __init
1979 alsa_card_azf3328_init(void)
1980 {
1981         int err;
1982         snd_azf3328_dbgcallenter();
1983         err = pci_register_driver(&driver);
1984         snd_azf3328_dbgcallleave();
1985         return err;
1986 }
1987
1988 static void __exit
1989 alsa_card_azf3328_exit(void)
1990 {
1991         snd_azf3328_dbgcallenter();
1992         pci_unregister_driver(&driver);
1993         snd_azf3328_dbgcallleave();
1994 }
1995
1996 module_init(alsa_card_azf3328_init)
1997 module_exit(alsa_card_azf3328_exit)