2 * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
3 * Routines for control of YMF724/740/744/754 chips
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
27 #include <sound/driver.h>
28 #include <linux/delay.h>
29 #include <linux/init.h>
30 #include <linux/interrupt.h>
31 #include <linux/pci.h>
32 #include <linux/sched.h>
33 #include <linux/slab.h>
34 #include <linux/vmalloc.h>
36 #include <sound/core.h>
37 #include <sound/control.h>
38 #include <sound/info.h>
39 #include <sound/ymfpci.h>
40 #include <sound/asoundef.h>
41 #include <sound/mpu401.h>
53 static void snd_ymfpci_irq_wait(ymfpci_t *chip);
55 static inline u8 snd_ymfpci_readb(ymfpci_t *chip, u32 offset)
57 return readb(chip->reg_area_virt + offset);
60 static inline void snd_ymfpci_writeb(ymfpci_t *chip, u32 offset, u8 val)
62 writeb(val, chip->reg_area_virt + offset);
65 static inline u16 snd_ymfpci_readw(ymfpci_t *chip, u32 offset)
67 return readw(chip->reg_area_virt + offset);
70 static inline void snd_ymfpci_writew(ymfpci_t *chip, u32 offset, u16 val)
72 writew(val, chip->reg_area_virt + offset);
75 static inline u32 snd_ymfpci_readl(ymfpci_t *chip, u32 offset)
77 return readl(chip->reg_area_virt + offset);
80 static inline void snd_ymfpci_writel(ymfpci_t *chip, u32 offset, u32 val)
82 writel(val, chip->reg_area_virt + offset);
85 static int snd_ymfpci_codec_ready(ymfpci_t *chip, int secondary)
88 u32 reg = secondary ? YDSXGR_SECSTATUSADR : YDSXGR_PRISTATUSADR;
90 end_time = (jiffies + ((3 * HZ) / 4)) + 1;
92 if ((snd_ymfpci_readw(chip, reg) & 0x8000) == 0)
94 set_current_state(TASK_UNINTERRUPTIBLE);
96 } while (end_time - (signed long)jiffies >= 0);
97 snd_printk("codec_ready: codec %i is not ready [0x%x]\n", secondary, snd_ymfpci_readw(chip, reg));
101 static void snd_ymfpci_codec_write(ac97_t *ac97, u16 reg, u16 val)
103 ymfpci_t *chip = ac97->private_data;
106 snd_ymfpci_codec_ready(chip, 0);
107 cmd = ((YDSXG_AC97WRITECMD | reg) << 16) | val;
108 snd_ymfpci_writel(chip, YDSXGR_AC97CMDDATA, cmd);
111 static u16 snd_ymfpci_codec_read(ac97_t *ac97, u16 reg)
113 ymfpci_t *chip = ac97->private_data;
115 if (snd_ymfpci_codec_ready(chip, 0))
117 snd_ymfpci_writew(chip, YDSXGR_AC97CMDADR, YDSXG_AC97READCMD | reg);
118 if (snd_ymfpci_codec_ready(chip, 0))
120 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_744 && chip->rev < 2) {
122 for (i = 0; i < 600; i++)
123 snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
125 return snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
132 static u32 snd_ymfpci_calc_delta(u32 rate)
135 case 8000: return 0x02aaab00;
136 case 11025: return 0x03accd00;
137 case 16000: return 0x05555500;
138 case 22050: return 0x07599a00;
139 case 32000: return 0x0aaaab00;
140 case 44100: return 0x0eb33300;
141 default: return ((rate << 16) / 375) << 5;
145 static u32 def_rate[8] = {
146 100, 2000, 8000, 11025, 16000, 22050, 32000, 48000
149 static u32 snd_ymfpci_calc_lpfK(u32 rate)
152 static u32 val[8] = {
153 0x00570000, 0x06AA0000, 0x18B20000, 0x20930000,
154 0x2B9A0000, 0x35A10000, 0x3EAA0000, 0x40000000
158 return 0x40000000; /* FIXME: What's the right value? */
159 for (i = 0; i < 8; i++)
160 if (rate <= def_rate[i])
165 static u32 snd_ymfpci_calc_lpfQ(u32 rate)
168 static u32 val[8] = {
169 0x35280000, 0x34A70000, 0x32020000, 0x31770000,
170 0x31390000, 0x31C90000, 0x33D00000, 0x40000000
175 for (i = 0; i < 8; i++)
176 if (rate <= def_rate[i])
182 * Hardware start management
185 static void snd_ymfpci_hw_start(ymfpci_t *chip)
189 spin_lock_irqsave(&chip->reg_lock, flags);
190 if (chip->start_count++ > 0)
192 snd_ymfpci_writel(chip, YDSXGR_MODE,
193 snd_ymfpci_readl(chip, YDSXGR_MODE) | 3);
194 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
196 spin_unlock_irqrestore(&chip->reg_lock, flags);
199 static void snd_ymfpci_hw_stop(ymfpci_t *chip)
204 spin_lock_irqsave(&chip->reg_lock, flags);
205 if (--chip->start_count > 0)
207 snd_ymfpci_writel(chip, YDSXGR_MODE,
208 snd_ymfpci_readl(chip, YDSXGR_MODE) & ~3);
209 while (timeout-- > 0) {
210 if ((snd_ymfpci_readl(chip, YDSXGR_STATUS) & 2) == 0)
213 if (atomic_read(&chip->interrupt_sleep_count)) {
214 atomic_set(&chip->interrupt_sleep_count, 0);
215 wake_up(&chip->interrupt_sleep);
218 spin_unlock_irqrestore(&chip->reg_lock, flags);
222 * Playback voice management
225 static int voice_alloc(ymfpci_t *chip, ymfpci_voice_type_t type, int pair, ymfpci_voice_t **rvoice)
227 ymfpci_voice_t *voice, *voice2;
231 for (idx = 0; idx < YDSXG_PLAYBACK_VOICES; idx += pair ? 2 : 1) {
232 voice = &chip->voices[idx];
233 voice2 = pair ? &chip->voices[idx+1] : NULL;
234 if (voice->use || (voice2 && voice2->use))
252 snd_ymfpci_hw_start(chip);
254 snd_ymfpci_hw_start(chip);
261 static int snd_ymfpci_voice_alloc(ymfpci_t *chip, ymfpci_voice_type_t type, int pair, ymfpci_voice_t **rvoice)
266 snd_assert(rvoice != NULL, return -EINVAL);
267 snd_assert(!pair || type == YMFPCI_PCM, return -EINVAL);
269 spin_lock_irqsave(&chip->voice_lock, flags);
271 result = voice_alloc(chip, type, pair, rvoice);
272 if (result == 0 || type != YMFPCI_PCM)
274 /* TODO: synth/midi voice deallocation */
277 spin_unlock_irqrestore(&chip->voice_lock, flags);
281 static int snd_ymfpci_voice_free(ymfpci_t *chip, ymfpci_voice_t *pvoice)
285 snd_assert(pvoice != NULL, return -EINVAL);
286 snd_ymfpci_hw_stop(chip);
287 spin_lock_irqsave(&chip->voice_lock, flags);
288 pvoice->use = pvoice->pcm = pvoice->synth = pvoice->midi = 0;
290 pvoice->interrupt = NULL;
291 spin_unlock_irqrestore(&chip->voice_lock, flags);
299 static void snd_ymfpci_pcm_interrupt(ymfpci_t *chip, ymfpci_voice_t *voice)
304 if ((ypcm = voice->ypcm) == NULL)
306 if (ypcm->substream == NULL)
308 spin_lock(&chip->reg_lock);
310 pos = le32_to_cpu(voice->bank[chip->active_bank].start);
311 if (pos < ypcm->last_pos)
312 delta = pos + (ypcm->buffer_size - ypcm->last_pos);
314 delta = pos - ypcm->last_pos;
315 ypcm->period_pos += delta;
316 ypcm->last_pos = pos;
317 if (ypcm->period_pos >= ypcm->period_size) {
318 // printk("done - active_bank = 0x%x, start = 0x%x\n", chip->active_bank, voice->bank[chip->active_bank].start);
319 ypcm->period_pos %= ypcm->period_size;
320 spin_unlock(&chip->reg_lock);
321 snd_pcm_period_elapsed(ypcm->substream);
322 spin_lock(&chip->reg_lock);
325 spin_unlock(&chip->reg_lock);
328 static void snd_ymfpci_pcm_capture_interrupt(snd_pcm_substream_t *substream)
330 snd_pcm_runtime_t *runtime = substream->runtime;
331 ymfpci_pcm_t *ypcm = runtime->private_data;
332 ymfpci_t *chip = ypcm->chip;
335 spin_lock(&chip->reg_lock);
337 pos = le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
338 if (pos < ypcm->last_pos)
339 delta = pos + (ypcm->buffer_size - ypcm->last_pos);
341 delta = pos - ypcm->last_pos;
342 ypcm->period_pos += delta;
343 ypcm->last_pos = pos;
344 if (ypcm->period_pos >= ypcm->period_size) {
345 ypcm->period_pos %= ypcm->period_size;
346 // printk("done - active_bank = 0x%x, start = 0x%x\n", chip->active_bank, voice->bank[chip->active_bank].start);
347 spin_unlock(&chip->reg_lock);
348 snd_pcm_period_elapsed(substream);
349 spin_lock(&chip->reg_lock);
352 spin_unlock(&chip->reg_lock);
355 static int snd_ymfpci_playback_trigger(snd_pcm_substream_t * substream,
358 ymfpci_t *chip = snd_pcm_substream_chip(substream);
359 ymfpci_pcm_t *ypcm = substream->runtime->private_data;
362 spin_lock(&chip->reg_lock);
363 if (ypcm->voices[0] == NULL) {
368 case SNDRV_PCM_TRIGGER_START:
369 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
370 case SNDRV_PCM_TRIGGER_RESUME:
371 chip->ctrl_playback[ypcm->voices[0]->number + 1] = cpu_to_le32(ypcm->voices[0]->bank_addr);
372 if (ypcm->voices[1] != NULL)
373 chip->ctrl_playback[ypcm->voices[1]->number + 1] = cpu_to_le32(ypcm->voices[1]->bank_addr);
376 case SNDRV_PCM_TRIGGER_STOP:
377 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
378 case SNDRV_PCM_TRIGGER_SUSPEND:
379 chip->ctrl_playback[ypcm->voices[0]->number + 1] = 0;
380 if (ypcm->voices[1] != NULL)
381 chip->ctrl_playback[ypcm->voices[1]->number + 1] = 0;
389 spin_unlock(&chip->reg_lock);
392 static int snd_ymfpci_capture_trigger(snd_pcm_substream_t * substream,
395 ymfpci_t *chip = snd_pcm_substream_chip(substream);
396 ymfpci_pcm_t *ypcm = substream->runtime->private_data;
400 spin_lock(&chip->reg_lock);
402 case SNDRV_PCM_TRIGGER_START:
403 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
404 case SNDRV_PCM_TRIGGER_RESUME:
405 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) | (1 << ypcm->capture_bank_number);
406 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
409 case SNDRV_PCM_TRIGGER_STOP:
410 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
411 case SNDRV_PCM_TRIGGER_SUSPEND:
412 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) & ~(1 << ypcm->capture_bank_number);
413 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
420 spin_unlock(&chip->reg_lock);
424 static int snd_ymfpci_pcm_voice_alloc(ymfpci_pcm_t *ypcm, int voices)
428 if (ypcm->voices[1] != NULL && voices < 2) {
429 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[1]);
430 ypcm->voices[1] = NULL;
432 if (voices == 1 && ypcm->voices[0] != NULL)
433 return 0; /* already allocated */
434 if (voices == 2 && ypcm->voices[0] != NULL && ypcm->voices[1] != NULL)
435 return 0; /* already allocated */
437 if (ypcm->voices[0] != NULL && ypcm->voices[1] == NULL) {
438 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[0]);
439 ypcm->voices[0] = NULL;
442 err = snd_ymfpci_voice_alloc(ypcm->chip, YMFPCI_PCM, voices > 1, &ypcm->voices[0]);
445 ypcm->voices[0]->ypcm = ypcm;
446 ypcm->voices[0]->interrupt = snd_ymfpci_pcm_interrupt;
448 ypcm->voices[1] = &ypcm->chip->voices[ypcm->voices[0]->number + 1];
449 ypcm->voices[1]->ypcm = ypcm;
454 static void snd_ymfpci_pcm_init_voice(ymfpci_voice_t *voice, int stereo,
455 int rate, int w_16, unsigned long addr,
457 int output_front, int output_rear)
460 u32 delta = snd_ymfpci_calc_delta(rate);
461 u32 lpfQ = snd_ymfpci_calc_lpfQ(rate);
462 u32 lpfK = snd_ymfpci_calc_lpfK(rate);
463 snd_ymfpci_playback_bank_t *bank;
466 snd_assert(voice != NULL, return);
467 format = (stereo ? 0x00010000 : 0) | (w_16 ? 0 : 0x80000000);
468 for (nbank = 0; nbank < 2; nbank++) {
469 bank = &voice->bank[nbank];
470 bank->format = cpu_to_le32(format);
471 bank->loop_default = 0;
472 bank->base = cpu_to_le32(addr);
473 bank->loop_start = 0;
474 bank->loop_end = cpu_to_le32(end);
476 bank->eg_gain_end = cpu_to_le32(0x40000000);
477 bank->lpfQ = cpu_to_le32(lpfQ);
479 bank->num_of_frames = 0;
480 bank->loop_count = 0;
482 bank->start_frac = 0;
484 bank->delta_end = cpu_to_le32(delta);
486 bank->lpfK_end = cpu_to_le32(lpfK);
487 bank->eg_gain = cpu_to_le32(0x40000000);
493 bank->left_gain_end =
494 bank->right_gain_end =
498 bank->eff1_gain_end =
499 bank->eff2_gain_end =
500 bank->eff3_gain_end = 0;
506 bank->left_gain_end =
507 bank->right_gain_end = cpu_to_le32(0x40000000);
511 bank->eff2_gain_end =
513 bank->eff3_gain_end = cpu_to_le32(0x40000000);
517 if ((voice->number & 1) == 0) {
519 bank->left_gain_end = cpu_to_le32(0x40000000);
521 bank->format |= cpu_to_le32(1);
523 bank->right_gain_end = cpu_to_le32(0x40000000);
527 if ((voice->number & 1) == 0) {
529 bank->eff3_gain_end = cpu_to_le32(0x40000000);
531 bank->format |= cpu_to_le32(1);
533 bank->eff2_gain_end = cpu_to_le32(0x40000000);
540 static int __devinit snd_ymfpci_ac3_init(ymfpci_t *chip)
542 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
543 4096, &chip->ac3_tmp_base) < 0)
546 chip->bank_effect[3][0]->base =
547 chip->bank_effect[3][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr);
548 chip->bank_effect[3][0]->loop_end =
549 chip->bank_effect[3][1]->loop_end = cpu_to_le32(1024);
550 chip->bank_effect[4][0]->base =
551 chip->bank_effect[4][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr + 2048);
552 chip->bank_effect[4][0]->loop_end =
553 chip->bank_effect[4][1]->loop_end = cpu_to_le32(1024);
555 spin_lock_irq(&chip->reg_lock);
556 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
557 snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) | 3 << 3);
558 spin_unlock_irq(&chip->reg_lock);
562 static int snd_ymfpci_ac3_done(ymfpci_t *chip)
564 spin_lock_irq(&chip->reg_lock);
565 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
566 snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) & ~(3 << 3));
567 spin_unlock_irq(&chip->reg_lock);
568 // snd_ymfpci_irq_wait(chip);
569 if (chip->ac3_tmp_base.area) {
570 snd_dma_free_pages(&chip->ac3_tmp_base);
571 chip->ac3_tmp_base.area = NULL;
576 static int snd_ymfpci_playback_hw_params(snd_pcm_substream_t * substream,
577 snd_pcm_hw_params_t * hw_params)
579 snd_pcm_runtime_t *runtime = substream->runtime;
580 ymfpci_pcm_t *ypcm = runtime->private_data;
583 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
585 if ((err = snd_ymfpci_pcm_voice_alloc(ypcm, params_channels(hw_params))) < 0)
590 static int snd_ymfpci_playback_hw_free(snd_pcm_substream_t * substream)
592 ymfpci_t *chip = snd_pcm_substream_chip(substream);
593 snd_pcm_runtime_t *runtime = substream->runtime;
596 if (runtime->private_data == NULL)
598 ypcm = runtime->private_data;
600 /* wait, until the PCI operations are not finished */
601 snd_ymfpci_irq_wait(chip);
602 snd_pcm_lib_free_pages(substream);
603 if (ypcm->voices[1]) {
604 snd_ymfpci_voice_free(chip, ypcm->voices[1]);
605 ypcm->voices[1] = NULL;
607 if (ypcm->voices[0]) {
608 snd_ymfpci_voice_free(chip, ypcm->voices[0]);
609 ypcm->voices[0] = NULL;
614 static int snd_ymfpci_playback_prepare(snd_pcm_substream_t * substream)
616 // ymfpci_t *chip = snd_pcm_substream_chip(substream);
617 snd_pcm_runtime_t *runtime = substream->runtime;
618 ymfpci_pcm_t *ypcm = runtime->private_data;
621 ypcm->period_size = runtime->period_size;
622 ypcm->buffer_size = runtime->buffer_size;
623 ypcm->period_pos = 0;
625 for (nvoice = 0; nvoice < runtime->channels; nvoice++)
626 snd_ymfpci_pcm_init_voice(ypcm->voices[nvoice],
627 runtime->channels == 2,
629 snd_pcm_format_width(runtime->format) == 16,
637 static int snd_ymfpci_capture_hw_params(snd_pcm_substream_t * substream,
638 snd_pcm_hw_params_t * hw_params)
640 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
643 static int snd_ymfpci_capture_hw_free(snd_pcm_substream_t * substream)
645 ymfpci_t *chip = snd_pcm_substream_chip(substream);
647 /* wait, until the PCI operations are not finished */
648 snd_ymfpci_irq_wait(chip);
649 return snd_pcm_lib_free_pages(substream);
652 static int snd_ymfpci_capture_prepare(snd_pcm_substream_t * substream)
654 ymfpci_t *chip = snd_pcm_substream_chip(substream);
655 snd_pcm_runtime_t *runtime = substream->runtime;
656 ymfpci_pcm_t *ypcm = runtime->private_data;
657 snd_ymfpci_capture_bank_t * bank;
661 ypcm->period_size = runtime->period_size;
662 ypcm->buffer_size = runtime->buffer_size;
663 ypcm->period_pos = 0;
666 rate = ((48000 * 4096) / runtime->rate) - 1;
668 if (runtime->channels == 2) {
672 if (snd_pcm_format_width(runtime->format) == 8)
676 switch (ypcm->capture_bank_number) {
678 snd_ymfpci_writel(chip, YDSXGR_RECFORMAT, format);
679 snd_ymfpci_writel(chip, YDSXGR_RECSLOTSR, rate);
682 snd_ymfpci_writel(chip, YDSXGR_ADCFORMAT, format);
683 snd_ymfpci_writel(chip, YDSXGR_ADCSLOTSR, rate);
686 for (nbank = 0; nbank < 2; nbank++) {
687 bank = chip->bank_capture[ypcm->capture_bank_number][nbank];
688 bank->base = cpu_to_le32(runtime->dma_addr);
689 bank->loop_end = cpu_to_le32(ypcm->buffer_size << ypcm->shift);
691 bank->num_of_loops = 0;
696 static snd_pcm_uframes_t snd_ymfpci_playback_pointer(snd_pcm_substream_t * substream)
698 ymfpci_t *chip = snd_pcm_substream_chip(substream);
699 snd_pcm_runtime_t *runtime = substream->runtime;
700 ymfpci_pcm_t *ypcm = runtime->private_data;
701 ymfpci_voice_t *voice = ypcm->voices[0];
703 if (!(ypcm->running && voice))
705 return le32_to_cpu(voice->bank[chip->active_bank].start);
708 static snd_pcm_uframes_t snd_ymfpci_capture_pointer(snd_pcm_substream_t * substream)
710 ymfpci_t *chip = snd_pcm_substream_chip(substream);
711 snd_pcm_runtime_t *runtime = substream->runtime;
712 ymfpci_pcm_t *ypcm = runtime->private_data;
716 return le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
719 static void snd_ymfpci_irq_wait(ymfpci_t *chip)
724 while (loops-- > 0) {
725 if ((snd_ymfpci_readl(chip, YDSXGR_MODE) & 3) == 0)
727 init_waitqueue_entry(&wait, current);
728 add_wait_queue(&chip->interrupt_sleep, &wait);
729 atomic_inc(&chip->interrupt_sleep_count);
730 set_current_state(TASK_UNINTERRUPTIBLE);
731 schedule_timeout(HZ/20);
732 remove_wait_queue(&chip->interrupt_sleep, &wait);
736 static irqreturn_t snd_ymfpci_interrupt(int irq, void *dev_id, struct pt_regs *regs)
738 ymfpci_t *chip = dev_id;
739 u32 status, nvoice, mode;
740 ymfpci_voice_t *voice;
742 status = snd_ymfpci_readl(chip, YDSXGR_STATUS);
743 if (status & 0x80000000) {
744 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
745 spin_lock(&chip->voice_lock);
746 for (nvoice = 0; nvoice < YDSXG_PLAYBACK_VOICES; nvoice++) {
747 voice = &chip->voices[nvoice];
748 if (voice->interrupt)
749 voice->interrupt(chip, voice);
751 for (nvoice = 0; nvoice < YDSXG_CAPTURE_VOICES; nvoice++) {
752 if (chip->capture_substream[nvoice])
753 snd_ymfpci_pcm_capture_interrupt(chip->capture_substream[nvoice]);
756 for (nvoice = 0; nvoice < YDSXG_EFFECT_VOICES; nvoice++) {
757 if (chip->effect_substream[nvoice])
758 snd_ymfpci_pcm_effect_interrupt(chip->effect_substream[nvoice]);
761 spin_unlock(&chip->voice_lock);
762 spin_lock(&chip->reg_lock);
763 snd_ymfpci_writel(chip, YDSXGR_STATUS, 0x80000000);
764 mode = snd_ymfpci_readl(chip, YDSXGR_MODE) | 2;
765 snd_ymfpci_writel(chip, YDSXGR_MODE, mode);
766 spin_unlock(&chip->reg_lock);
768 if (atomic_read(&chip->interrupt_sleep_count)) {
769 atomic_set(&chip->interrupt_sleep_count, 0);
770 wake_up(&chip->interrupt_sleep);
774 status = snd_ymfpci_readw(chip, YDSXGR_INTFLAG);
777 snd_timer_interrupt(chip->timer, chip->timer->sticks);
779 snd_ymfpci_writew(chip, YDSXGR_INTFLAG, status);
782 snd_mpu401_uart_interrupt(irq, chip->rawmidi->private_data, regs);
786 static snd_pcm_hardware_t snd_ymfpci_playback =
788 .info = (SNDRV_PCM_INFO_MMAP |
789 SNDRV_PCM_INFO_MMAP_VALID |
790 SNDRV_PCM_INFO_INTERLEAVED |
791 SNDRV_PCM_INFO_BLOCK_TRANSFER |
792 SNDRV_PCM_INFO_PAUSE |
793 SNDRV_PCM_INFO_RESUME),
794 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
795 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
800 .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */
801 .period_bytes_min = 64,
802 .period_bytes_max = 256 * 1024, /* FIXME: enough? */
808 static snd_pcm_hardware_t snd_ymfpci_capture =
810 .info = (SNDRV_PCM_INFO_MMAP |
811 SNDRV_PCM_INFO_MMAP_VALID |
812 SNDRV_PCM_INFO_INTERLEAVED |
813 SNDRV_PCM_INFO_BLOCK_TRANSFER |
814 SNDRV_PCM_INFO_PAUSE |
815 SNDRV_PCM_INFO_RESUME),
816 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
817 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
822 .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */
823 .period_bytes_min = 64,
824 .period_bytes_max = 256 * 1024, /* FIXME: enough? */
830 static void snd_ymfpci_pcm_free_substream(snd_pcm_runtime_t *runtime)
832 ymfpci_pcm_t *ypcm = runtime->private_data;
837 static int snd_ymfpci_playback_open_1(snd_pcm_substream_t * substream)
839 ymfpci_t *chip = snd_pcm_substream_chip(substream);
840 snd_pcm_runtime_t *runtime = substream->runtime;
843 ypcm = kcalloc(1, sizeof(*ypcm), GFP_KERNEL);
847 ypcm->type = PLAYBACK_VOICE;
848 ypcm->substream = substream;
849 runtime->hw = snd_ymfpci_playback;
850 runtime->private_data = ypcm;
851 runtime->private_free = snd_ymfpci_pcm_free_substream;
852 /* FIXME? True value is 256/48 = 5.33333 ms */
853 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_TIME, 5333, UINT_MAX);
857 /* call with spinlock held */
858 static void ymfpci_open_extension(ymfpci_t *chip)
860 if (! chip->rear_opened) {
861 if (! chip->spdif_opened) /* set AC3 */
862 snd_ymfpci_writel(chip, YDSXGR_MODE,
863 snd_ymfpci_readl(chip, YDSXGR_MODE) | (1 << 30));
864 /* enable second codec (4CHEN) */
865 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
866 (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) | 0x0010);
870 /* call with spinlock held */
871 static void ymfpci_close_extension(ymfpci_t *chip)
873 if (! chip->rear_opened) {
874 if (! chip->spdif_opened)
875 snd_ymfpci_writel(chip, YDSXGR_MODE,
876 snd_ymfpci_readl(chip, YDSXGR_MODE) & ~(1 << 30));
877 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
878 (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) & ~0x0010);
882 static int snd_ymfpci_playback_open(snd_pcm_substream_t * substream)
884 ymfpci_t *chip = snd_pcm_substream_chip(substream);
885 snd_pcm_runtime_t *runtime = substream->runtime;
889 if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
891 ypcm = runtime->private_data;
892 ypcm->output_front = 1;
893 ypcm->output_rear = chip->mode_dup4ch ? 1 : 0;
894 spin_lock_irq(&chip->reg_lock);
895 if (ypcm->output_rear) {
896 ymfpci_open_extension(chip);
899 spin_unlock_irq(&chip->reg_lock);
903 static int snd_ymfpci_playback_spdif_open(snd_pcm_substream_t * substream)
905 ymfpci_t *chip = snd_pcm_substream_chip(substream);
906 snd_pcm_runtime_t *runtime = substream->runtime;
910 if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
912 ypcm = runtime->private_data;
913 ypcm->output_front = 0;
914 ypcm->output_rear = 1;
915 spin_lock_irq(&chip->reg_lock);
916 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
917 snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) | 2);
918 ymfpci_open_extension(chip);
919 chip->spdif_pcm_bits = chip->spdif_bits;
920 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
921 chip->spdif_opened++;
922 spin_unlock_irq(&chip->reg_lock);
924 chip->spdif_pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
925 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
926 SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
930 static int snd_ymfpci_playback_4ch_open(snd_pcm_substream_t * substream)
932 ymfpci_t *chip = snd_pcm_substream_chip(substream);
933 snd_pcm_runtime_t *runtime = substream->runtime;
937 if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
939 ypcm = runtime->private_data;
940 ypcm->output_front = 0;
941 ypcm->output_rear = 1;
942 spin_lock_irq(&chip->reg_lock);
943 ymfpci_open_extension(chip);
945 spin_unlock_irq(&chip->reg_lock);
949 static int snd_ymfpci_capture_open(snd_pcm_substream_t * substream,
950 u32 capture_bank_number)
952 ymfpci_t *chip = snd_pcm_substream_chip(substream);
953 snd_pcm_runtime_t *runtime = substream->runtime;
956 ypcm = kcalloc(1, sizeof(*ypcm), GFP_KERNEL);
960 ypcm->type = capture_bank_number + CAPTURE_REC;
961 ypcm->substream = substream;
962 ypcm->capture_bank_number = capture_bank_number;
963 chip->capture_substream[capture_bank_number] = substream;
964 runtime->hw = snd_ymfpci_capture;
965 /* FIXME? True value is 256/48 = 5.33333 ms */
966 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_TIME, 5333, UINT_MAX);
967 runtime->private_data = ypcm;
968 runtime->private_free = snd_ymfpci_pcm_free_substream;
969 snd_ymfpci_hw_start(chip);
973 static int snd_ymfpci_capture_rec_open(snd_pcm_substream_t * substream)
975 return snd_ymfpci_capture_open(substream, 0);
978 static int snd_ymfpci_capture_ac97_open(snd_pcm_substream_t * substream)
980 return snd_ymfpci_capture_open(substream, 1);
983 static int snd_ymfpci_playback_close_1(snd_pcm_substream_t * substream)
988 static int snd_ymfpci_playback_close(snd_pcm_substream_t * substream)
990 ymfpci_t *chip = snd_pcm_substream_chip(substream);
991 ymfpci_pcm_t *ypcm = substream->runtime->private_data;
993 spin_lock_irq(&chip->reg_lock);
994 if (ypcm->output_rear && chip->rear_opened > 0) {
996 ymfpci_close_extension(chip);
998 spin_unlock_irq(&chip->reg_lock);
999 return snd_ymfpci_playback_close_1(substream);
1002 static int snd_ymfpci_playback_spdif_close(snd_pcm_substream_t * substream)
1004 ymfpci_t *chip = snd_pcm_substream_chip(substream);
1006 spin_lock_irq(&chip->reg_lock);
1007 chip->spdif_opened = 0;
1008 ymfpci_close_extension(chip);
1009 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
1010 snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & ~2);
1011 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
1012 spin_unlock_irq(&chip->reg_lock);
1013 chip->spdif_pcm_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1014 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
1015 SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
1016 return snd_ymfpci_playback_close_1(substream);
1019 static int snd_ymfpci_playback_4ch_close(snd_pcm_substream_t * substream)
1021 ymfpci_t *chip = snd_pcm_substream_chip(substream);
1023 spin_lock_irq(&chip->reg_lock);
1024 if (chip->rear_opened > 0) {
1025 chip->rear_opened--;
1026 ymfpci_close_extension(chip);
1028 spin_unlock_irq(&chip->reg_lock);
1029 return snd_ymfpci_playback_close_1(substream);
1032 static int snd_ymfpci_capture_close(snd_pcm_substream_t * substream)
1034 ymfpci_t *chip = snd_pcm_substream_chip(substream);
1035 snd_pcm_runtime_t *runtime = substream->runtime;
1036 ymfpci_pcm_t *ypcm = runtime->private_data;
1039 chip->capture_substream[ypcm->capture_bank_number] = NULL;
1040 snd_ymfpci_hw_stop(chip);
1045 static snd_pcm_ops_t snd_ymfpci_playback_ops = {
1046 .open = snd_ymfpci_playback_open,
1047 .close = snd_ymfpci_playback_close,
1048 .ioctl = snd_pcm_lib_ioctl,
1049 .hw_params = snd_ymfpci_playback_hw_params,
1050 .hw_free = snd_ymfpci_playback_hw_free,
1051 .prepare = snd_ymfpci_playback_prepare,
1052 .trigger = snd_ymfpci_playback_trigger,
1053 .pointer = snd_ymfpci_playback_pointer,
1056 static snd_pcm_ops_t snd_ymfpci_capture_rec_ops = {
1057 .open = snd_ymfpci_capture_rec_open,
1058 .close = snd_ymfpci_capture_close,
1059 .ioctl = snd_pcm_lib_ioctl,
1060 .hw_params = snd_ymfpci_capture_hw_params,
1061 .hw_free = snd_ymfpci_capture_hw_free,
1062 .prepare = snd_ymfpci_capture_prepare,
1063 .trigger = snd_ymfpci_capture_trigger,
1064 .pointer = snd_ymfpci_capture_pointer,
1067 static void snd_ymfpci_pcm_free(snd_pcm_t *pcm)
1069 ymfpci_t *chip = pcm->private_data;
1071 snd_pcm_lib_preallocate_free_for_all(pcm);
1074 int __devinit snd_ymfpci_pcm(ymfpci_t *chip, int device, snd_pcm_t ** rpcm)
1081 if ((err = snd_pcm_new(chip->card, "YMFPCI", device, 32, 1, &pcm)) < 0)
1083 pcm->private_data = chip;
1084 pcm->private_free = snd_ymfpci_pcm_free;
1086 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_ops);
1087 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_rec_ops);
1090 pcm->info_flags = 0;
1091 strcpy(pcm->name, "YMFPCI");
1094 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1095 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1102 static snd_pcm_ops_t snd_ymfpci_capture_ac97_ops = {
1103 .open = snd_ymfpci_capture_ac97_open,
1104 .close = snd_ymfpci_capture_close,
1105 .ioctl = snd_pcm_lib_ioctl,
1106 .hw_params = snd_ymfpci_capture_hw_params,
1107 .hw_free = snd_ymfpci_capture_hw_free,
1108 .prepare = snd_ymfpci_capture_prepare,
1109 .trigger = snd_ymfpci_capture_trigger,
1110 .pointer = snd_ymfpci_capture_pointer,
1113 static void snd_ymfpci_pcm2_free(snd_pcm_t *pcm)
1115 ymfpci_t *chip = pcm->private_data;
1117 snd_pcm_lib_preallocate_free_for_all(pcm);
1120 int __devinit snd_ymfpci_pcm2(ymfpci_t *chip, int device, snd_pcm_t ** rpcm)
1127 if ((err = snd_pcm_new(chip->card, "YMFPCI - PCM2", device, 0, 1, &pcm)) < 0)
1129 pcm->private_data = chip;
1130 pcm->private_free = snd_ymfpci_pcm2_free;
1132 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_ac97_ops);
1135 pcm->info_flags = 0;
1136 sprintf(pcm->name, "YMFPCI - %s",
1137 chip->device_id == PCI_DEVICE_ID_YAMAHA_754 ? "Direct Recording" : "AC'97");
1140 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1141 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1148 static snd_pcm_ops_t snd_ymfpci_playback_spdif_ops = {
1149 .open = snd_ymfpci_playback_spdif_open,
1150 .close = snd_ymfpci_playback_spdif_close,
1151 .ioctl = snd_pcm_lib_ioctl,
1152 .hw_params = snd_ymfpci_playback_hw_params,
1153 .hw_free = snd_ymfpci_playback_hw_free,
1154 .prepare = snd_ymfpci_playback_prepare,
1155 .trigger = snd_ymfpci_playback_trigger,
1156 .pointer = snd_ymfpci_playback_pointer,
1159 static void snd_ymfpci_pcm_spdif_free(snd_pcm_t *pcm)
1161 ymfpci_t *chip = pcm->private_data;
1162 chip->pcm_spdif = NULL;
1163 snd_pcm_lib_preallocate_free_for_all(pcm);
1166 int __devinit snd_ymfpci_pcm_spdif(ymfpci_t *chip, int device, snd_pcm_t ** rpcm)
1173 if ((err = snd_pcm_new(chip->card, "YMFPCI - IEC958", device, 1, 0, &pcm)) < 0)
1175 pcm->private_data = chip;
1176 pcm->private_free = snd_ymfpci_pcm_spdif_free;
1178 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_spdif_ops);
1181 pcm->info_flags = 0;
1182 strcpy(pcm->name, "YMFPCI - IEC958");
1183 chip->pcm_spdif = pcm;
1185 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1186 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1193 static snd_pcm_ops_t snd_ymfpci_playback_4ch_ops = {
1194 .open = snd_ymfpci_playback_4ch_open,
1195 .close = snd_ymfpci_playback_4ch_close,
1196 .ioctl = snd_pcm_lib_ioctl,
1197 .hw_params = snd_ymfpci_playback_hw_params,
1198 .hw_free = snd_ymfpci_playback_hw_free,
1199 .prepare = snd_ymfpci_playback_prepare,
1200 .trigger = snd_ymfpci_playback_trigger,
1201 .pointer = snd_ymfpci_playback_pointer,
1204 static void snd_ymfpci_pcm_4ch_free(snd_pcm_t *pcm)
1206 ymfpci_t *chip = pcm->private_data;
1207 chip->pcm_4ch = NULL;
1208 snd_pcm_lib_preallocate_free_for_all(pcm);
1211 int __devinit snd_ymfpci_pcm_4ch(ymfpci_t *chip, int device, snd_pcm_t ** rpcm)
1218 if ((err = snd_pcm_new(chip->card, "YMFPCI - Rear", device, 1, 0, &pcm)) < 0)
1220 pcm->private_data = chip;
1221 pcm->private_free = snd_ymfpci_pcm_4ch_free;
1223 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_4ch_ops);
1226 pcm->info_flags = 0;
1227 strcpy(pcm->name, "YMFPCI - Rear PCM");
1228 chip->pcm_4ch = pcm;
1230 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1231 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1238 static int snd_ymfpci_spdif_default_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1240 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1245 static int snd_ymfpci_spdif_default_get(snd_kcontrol_t * kcontrol,
1246 snd_ctl_elem_value_t * ucontrol)
1248 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1250 spin_lock_irq(&chip->reg_lock);
1251 ucontrol->value.iec958.status[0] = (chip->spdif_bits >> 0) & 0xff;
1252 ucontrol->value.iec958.status[1] = (chip->spdif_bits >> 8) & 0xff;
1253 spin_unlock_irq(&chip->reg_lock);
1257 static int snd_ymfpci_spdif_default_put(snd_kcontrol_t * kcontrol,
1258 snd_ctl_elem_value_t * ucontrol)
1260 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1264 val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
1265 (ucontrol->value.iec958.status[1] << 8);
1266 spin_lock_irq(&chip->reg_lock);
1267 change = chip->spdif_bits != val;
1268 chip->spdif_bits = val;
1269 if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 1) && chip->pcm_spdif == NULL)
1270 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
1271 spin_unlock_irq(&chip->reg_lock);
1275 static snd_kcontrol_new_t snd_ymfpci_spdif_default __devinitdata =
1277 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1278 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1279 .info = snd_ymfpci_spdif_default_info,
1280 .get = snd_ymfpci_spdif_default_get,
1281 .put = snd_ymfpci_spdif_default_put
1284 static int snd_ymfpci_spdif_mask_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1286 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1291 static int snd_ymfpci_spdif_mask_get(snd_kcontrol_t * kcontrol,
1292 snd_ctl_elem_value_t * ucontrol)
1294 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1296 spin_lock_irq(&chip->reg_lock);
1297 ucontrol->value.iec958.status[0] = 0x3e;
1298 ucontrol->value.iec958.status[1] = 0xff;
1299 spin_unlock_irq(&chip->reg_lock);
1303 static snd_kcontrol_new_t snd_ymfpci_spdif_mask __devinitdata =
1305 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1306 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1307 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1308 .info = snd_ymfpci_spdif_mask_info,
1309 .get = snd_ymfpci_spdif_mask_get,
1312 static int snd_ymfpci_spdif_stream_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1314 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1319 static int snd_ymfpci_spdif_stream_get(snd_kcontrol_t * kcontrol,
1320 snd_ctl_elem_value_t * ucontrol)
1322 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1324 spin_lock_irq(&chip->reg_lock);
1325 ucontrol->value.iec958.status[0] = (chip->spdif_pcm_bits >> 0) & 0xff;
1326 ucontrol->value.iec958.status[1] = (chip->spdif_pcm_bits >> 8) & 0xff;
1327 spin_unlock_irq(&chip->reg_lock);
1331 static int snd_ymfpci_spdif_stream_put(snd_kcontrol_t * kcontrol,
1332 snd_ctl_elem_value_t * ucontrol)
1334 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1338 val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
1339 (ucontrol->value.iec958.status[1] << 8);
1340 spin_lock_irq(&chip->reg_lock);
1341 change = chip->spdif_pcm_bits != val;
1342 chip->spdif_pcm_bits = val;
1343 if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 2))
1344 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
1345 spin_unlock_irq(&chip->reg_lock);
1349 static snd_kcontrol_new_t snd_ymfpci_spdif_stream __devinitdata =
1351 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1352 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1353 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1354 .info = snd_ymfpci_spdif_stream_info,
1355 .get = snd_ymfpci_spdif_stream_get,
1356 .put = snd_ymfpci_spdif_stream_put
1359 static int snd_ymfpci_drec_source_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *info)
1361 static char *texts[3] = {"AC'97", "IEC958", "ZV Port"};
1363 info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1365 info->value.enumerated.items = 3;
1366 if (info->value.enumerated.item > 2)
1367 info->value.enumerated.item = 2;
1368 strcpy(info->value.enumerated.name, texts[info->value.enumerated.item]);
1372 static int snd_ymfpci_drec_source_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *value)
1374 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1377 spin_lock_irq(&chip->reg_lock);
1378 reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
1379 spin_unlock_irq(&chip->reg_lock);
1381 value->value.enumerated.item[0] = 0;
1383 value->value.enumerated.item[0] = 1 + ((reg & 0x200) != 0);
1387 static int snd_ymfpci_drec_source_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *value)
1389 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1392 spin_lock_irq(&chip->reg_lock);
1393 old_reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
1394 if (value->value.enumerated.item[0] == 0)
1395 reg = old_reg & ~0x100;
1397 reg = (old_reg & ~0x300) | 0x100 | ((value->value.enumerated.item[0] == 2) << 9);
1398 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, reg);
1399 spin_unlock_irq(&chip->reg_lock);
1400 return reg != old_reg;
1403 static snd_kcontrol_new_t snd_ymfpci_drec_source __devinitdata = {
1404 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
1405 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1406 .name = "Direct Recording Source",
1407 .info = snd_ymfpci_drec_source_info,
1408 .get = snd_ymfpci_drec_source_get,
1409 .put = snd_ymfpci_drec_source_put
1416 #define YMFPCI_SINGLE(xname, xindex, reg) \
1417 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1418 .info = snd_ymfpci_info_single, \
1419 .get = snd_ymfpci_get_single, .put = snd_ymfpci_put_single, \
1420 .private_value = reg }
1422 static int snd_ymfpci_info_single(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1424 switch (kcontrol->private_value) {
1425 case YDSXGR_SPDIFOUTCTRL: break;
1426 case YDSXGR_SPDIFINCTRL: break;
1427 default: return -EINVAL;
1429 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1431 uinfo->value.integer.min = 0;
1432 uinfo->value.integer.max = 1;
1436 static int snd_ymfpci_get_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1438 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1439 int reg = kcontrol->private_value;
1440 unsigned int shift = 0, mask = 1;
1442 switch (kcontrol->private_value) {
1443 case YDSXGR_SPDIFOUTCTRL: break;
1444 case YDSXGR_SPDIFINCTRL: break;
1445 default: return -EINVAL;
1447 ucontrol->value.integer.value[0] = (snd_ymfpci_readl(chip, reg) >> shift) & mask;
1451 static int snd_ymfpci_put_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1453 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1454 int reg = kcontrol->private_value;
1455 unsigned int shift = 0, mask = 1;
1457 unsigned int val, oval;
1459 switch (kcontrol->private_value) {
1460 case YDSXGR_SPDIFOUTCTRL: break;
1461 case YDSXGR_SPDIFINCTRL: break;
1462 default: return -EINVAL;
1464 val = (ucontrol->value.integer.value[0] & mask);
1466 spin_lock_irq(&chip->reg_lock);
1467 oval = snd_ymfpci_readl(chip, reg);
1468 val = (oval & ~(mask << shift)) | val;
1469 change = val != oval;
1470 snd_ymfpci_writel(chip, reg, val);
1471 spin_unlock_irq(&chip->reg_lock);
1475 #define YMFPCI_DOUBLE(xname, xindex, reg) \
1476 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1477 .info = snd_ymfpci_info_double, \
1478 .get = snd_ymfpci_get_double, .put = snd_ymfpci_put_double, \
1479 .private_value = reg }
1481 static int snd_ymfpci_info_double(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1483 unsigned int reg = kcontrol->private_value;
1485 if (reg < 0x80 || reg >= 0xc0)
1487 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1489 uinfo->value.integer.min = 0;
1490 uinfo->value.integer.max = 16383;
1494 static int snd_ymfpci_get_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1496 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1497 unsigned int reg = kcontrol->private_value;
1498 unsigned int shift_left = 0, shift_right = 16, mask = 16383;
1501 if (reg < 0x80 || reg >= 0xc0)
1503 spin_lock_irq(&chip->reg_lock);
1504 val = snd_ymfpci_readl(chip, reg);
1505 spin_unlock_irq(&chip->reg_lock);
1506 ucontrol->value.integer.value[0] = (val >> shift_left) & mask;
1507 ucontrol->value.integer.value[1] = (val >> shift_right) & mask;
1511 static int snd_ymfpci_put_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1513 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1514 unsigned int reg = kcontrol->private_value;
1515 unsigned int shift_left = 0, shift_right = 16, mask = 16383;
1517 unsigned int val1, val2, oval;
1519 if (reg < 0x80 || reg >= 0xc0)
1521 val1 = ucontrol->value.integer.value[0] & mask;
1522 val2 = ucontrol->value.integer.value[1] & mask;
1523 val1 <<= shift_left;
1524 val2 <<= shift_right;
1525 spin_lock_irq(&chip->reg_lock);
1526 oval = snd_ymfpci_readl(chip, reg);
1527 val1 = (oval & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
1528 change = val1 != oval;
1529 snd_ymfpci_writel(chip, reg, val1);
1530 spin_unlock_irq(&chip->reg_lock);
1537 static int snd_ymfpci_info_dup4ch(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1539 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1541 uinfo->value.integer.min = 0;
1542 uinfo->value.integer.max = 1;
1546 static int snd_ymfpci_get_dup4ch(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1548 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1549 ucontrol->value.integer.value[0] = chip->mode_dup4ch;
1553 static int snd_ymfpci_put_dup4ch(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1555 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1557 change = (ucontrol->value.integer.value[0] != chip->mode_dup4ch);
1559 chip->mode_dup4ch = !!ucontrol->value.integer.value[0];
1564 static snd_kcontrol_new_t snd_ymfpci_controls[] __devinitdata = {
1565 YMFPCI_DOUBLE("Wave Playback Volume", 0, YDSXGR_NATIVEDACOUTVOL),
1566 YMFPCI_DOUBLE("Wave Capture Volume", 0, YDSXGR_NATIVEDACLOOPVOL),
1567 YMFPCI_DOUBLE("Digital Capture Volume", 0, YDSXGR_NATIVEDACINVOL),
1568 YMFPCI_DOUBLE("Digital Capture Volume", 1, YDSXGR_NATIVEADCINVOL),
1569 YMFPCI_DOUBLE("ADC Playback Volume", 0, YDSXGR_PRIADCOUTVOL),
1570 YMFPCI_DOUBLE("ADC Capture Volume", 0, YDSXGR_PRIADCLOOPVOL),
1571 YMFPCI_DOUBLE("ADC Playback Volume", 1, YDSXGR_SECADCOUTVOL),
1572 YMFPCI_DOUBLE("ADC Capture Volume", 1, YDSXGR_SECADCLOOPVOL),
1573 YMFPCI_DOUBLE("FM Legacy Volume", 0, YDSXGR_LEGACYOUTVOL),
1574 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ", PLAYBACK,VOLUME), 0, YDSXGR_ZVOUTVOL),
1575 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("", CAPTURE,VOLUME), 0, YDSXGR_ZVLOOPVOL),
1576 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ",PLAYBACK,VOLUME), 1, YDSXGR_SPDIFOUTVOL),
1577 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,VOLUME), 1, YDSXGR_SPDIFLOOPVOL),
1578 YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), 0, YDSXGR_SPDIFOUTCTRL),
1579 YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), 0, YDSXGR_SPDIFINCTRL),
1581 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1582 .name = "4ch Duplication",
1583 .info = snd_ymfpci_info_dup4ch,
1584 .get = snd_ymfpci_get_dup4ch,
1585 .put = snd_ymfpci_put_dup4ch,
1594 static int snd_ymfpci_get_gpio_out(ymfpci_t *chip, int pin)
1597 unsigned long flags;
1599 spin_lock_irqsave(&chip->reg_lock, flags);
1600 reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
1601 reg &= ~(1 << (pin + 8));
1603 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
1604 /* set the level mode for input line */
1605 mode = snd_ymfpci_readw(chip, YDSXGR_GPIOTYPECONFIG);
1606 mode &= ~(3 << (pin * 2));
1607 snd_ymfpci_writew(chip, YDSXGR_GPIOTYPECONFIG, mode);
1608 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
1609 mode = snd_ymfpci_readw(chip, YDSXGR_GPIOINSTATUS);
1610 spin_unlock_irqrestore(&chip->reg_lock, flags);
1611 return (mode >> pin) & 1;
1614 static int snd_ymfpci_set_gpio_out(ymfpci_t *chip, int pin, int enable)
1617 unsigned long flags;
1619 spin_lock_irqsave(&chip->reg_lock, flags);
1620 reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
1622 reg &= ~(1 << (pin + 8));
1623 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
1624 snd_ymfpci_writew(chip, YDSXGR_GPIOOUTCTRL, enable << pin);
1625 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
1626 spin_unlock_irqrestore(&chip->reg_lock, flags);
1631 static int snd_ymfpci_gpio_sw_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
1633 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1635 uinfo->value.integer.min = 0;
1636 uinfo->value.integer.max = 1;
1640 static int snd_ymfpci_gpio_sw_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
1642 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1643 int pin = (int)kcontrol->private_value;
1644 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
1648 static int snd_ymfpci_gpio_sw_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
1650 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1651 int pin = (int)kcontrol->private_value;
1653 if (snd_ymfpci_get_gpio_out(chip, pin) != ucontrol->value.integer.value[0]) {
1654 snd_ymfpci_set_gpio_out(chip, pin, !!ucontrol->value.integer.value[0]);
1655 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
1661 static snd_kcontrol_new_t snd_ymfpci_rear_shared __devinitdata = {
1662 .name = "Shared Rear/Line-In Switch",
1663 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1664 .info = snd_ymfpci_gpio_sw_info,
1665 .get = snd_ymfpci_gpio_sw_get,
1666 .put = snd_ymfpci_gpio_sw_put,
1675 static void snd_ymfpci_mixer_free_ac97_bus(ac97_bus_t *bus)
1677 ymfpci_t *chip = bus->private_data;
1678 chip->ac97_bus = NULL;
1681 static void snd_ymfpci_mixer_free_ac97(ac97_t *ac97)
1683 ymfpci_t *chip = ac97->private_data;
1687 int __devinit snd_ymfpci_mixer(ymfpci_t *chip, int rear_switch)
1689 ac97_template_t ac97;
1690 snd_kcontrol_t *kctl;
1693 static ac97_bus_ops_t ops = {
1694 .write = snd_ymfpci_codec_write,
1695 .read = snd_ymfpci_codec_read,
1698 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0)
1700 chip->ac97_bus->private_free = snd_ymfpci_mixer_free_ac97_bus;
1701 chip->ac97_bus->no_vra = 1; /* YMFPCI doesn't need VRA */
1703 memset(&ac97, 0, sizeof(ac97));
1704 ac97.private_data = chip;
1705 ac97.private_free = snd_ymfpci_mixer_free_ac97;
1706 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0)
1710 snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS,
1711 AC97_EA_VRA|AC97_EA_VRM, 0);
1713 for (idx = 0; idx < ARRAY_SIZE(snd_ymfpci_controls); idx++) {
1714 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_controls[idx], chip))) < 0)
1718 /* add S/PDIF control */
1719 snd_assert(chip->pcm_spdif != NULL, return -EIO);
1720 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_default, chip))) < 0)
1722 kctl->id.device = chip->pcm_spdif->device;
1723 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_mask, chip))) < 0)
1725 kctl->id.device = chip->pcm_spdif->device;
1726 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_stream, chip))) < 0)
1728 kctl->id.device = chip->pcm_spdif->device;
1729 chip->spdif_pcm_ctl = kctl;
1731 /* direct recording source */
1732 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_754 &&
1733 (err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_drec_source, chip))) < 0)
1737 * shared rear/line-in
1740 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_rear_shared, chip))) < 0)
1752 static int snd_ymfpci_timer_start(snd_timer_t *timer)
1755 unsigned long flags;
1758 chip = snd_timer_chip(timer);
1759 count = timer->sticks - 1;
1760 if (count == 0) /* minimum time is 20.8 us */
1762 spin_lock_irqsave(&chip->reg_lock, flags);
1763 snd_ymfpci_writew(chip, YDSXGR_TIMERCOUNT, count);
1764 snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x03);
1765 spin_unlock_irqrestore(&chip->reg_lock, flags);
1769 static int snd_ymfpci_timer_stop(snd_timer_t *timer)
1772 unsigned long flags;
1774 chip = snd_timer_chip(timer);
1775 spin_lock_irqsave(&chip->reg_lock, flags);
1776 snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x00);
1777 spin_unlock_irqrestore(&chip->reg_lock, flags);
1781 static int snd_ymfpci_timer_precise_resolution(snd_timer_t *timer,
1782 unsigned long *num, unsigned long *den)
1789 static struct _snd_timer_hardware snd_ymfpci_timer_hw = {
1790 .flags = SNDRV_TIMER_HW_AUTO,
1791 .resolution = 10417, /* 1/2fs = 10.41666...us */
1793 .start = snd_ymfpci_timer_start,
1794 .stop = snd_ymfpci_timer_stop,
1795 .precise_resolution = snd_ymfpci_timer_precise_resolution,
1798 int __devinit snd_ymfpci_timer(ymfpci_t *chip, int device)
1800 snd_timer_t *timer = NULL;
1804 tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1805 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1806 tid.card = chip->card->number;
1807 tid.device = device;
1809 if ((err = snd_timer_new(chip->card, "YMFPCI", &tid, &timer)) >= 0) {
1810 strcpy(timer->name, "YMFPCI timer");
1811 timer->private_data = chip;
1812 timer->hw = snd_ymfpci_timer_hw;
1814 chip->timer = timer;
1823 static void snd_ymfpci_proc_read(snd_info_entry_t *entry,
1824 snd_info_buffer_t * buffer)
1826 ymfpci_t *chip = entry->private_data;
1829 snd_iprintf(buffer, "YMFPCI\n\n");
1830 for (i = 0; i <= YDSXGR_WORKBASE; i += 4)
1831 snd_iprintf(buffer, "%04x: %04x\n", i, snd_ymfpci_readl(chip, i));
1834 static int __devinit snd_ymfpci_proc_init(snd_card_t * card, ymfpci_t *chip)
1836 snd_info_entry_t *entry;
1838 if (! snd_card_proc_new(card, "ymfpci", &entry))
1839 snd_info_set_text_ops(entry, chip, 1024, snd_ymfpci_proc_read);
1844 * initialization routines
1847 static void snd_ymfpci_aclink_reset(struct pci_dev * pci)
1851 pci_read_config_byte(pci, PCIR_DSXG_CTRL, &cmd);
1852 #if 0 // force to reset
1855 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
1856 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd | 0x03);
1857 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
1858 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL1, 0);
1859 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL2, 0);
1865 static void snd_ymfpci_enable_dsp(ymfpci_t *chip)
1867 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000001);
1870 static void snd_ymfpci_disable_dsp(ymfpci_t *chip)
1875 val = snd_ymfpci_readl(chip, YDSXGR_CONFIG);
1877 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000000);
1878 while (timeout-- > 0) {
1879 val = snd_ymfpci_readl(chip, YDSXGR_STATUS);
1880 if ((val & 0x00000002) == 0)
1885 #include "ymfpci_image.h"
1887 static void snd_ymfpci_download_image(ymfpci_t *chip)
1891 unsigned long *inst;
1893 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x00000000);
1894 snd_ymfpci_disable_dsp(chip);
1895 snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00010000);
1896 snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00000000);
1897 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, 0x00000000);
1898 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 0x00000000);
1899 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0x00000000);
1900 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0x00000000);
1901 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0x00000000);
1902 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
1903 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
1905 /* setup DSP instruction code */
1906 for (i = 0; i < YDSXG_DSPLENGTH / 4; i++)
1907 snd_ymfpci_writel(chip, YDSXGR_DSPINSTRAM + (i << 2), DspInst[i]);
1909 /* setup control instruction code */
1910 switch (chip->device_id) {
1911 case PCI_DEVICE_ID_YAMAHA_724F:
1912 case PCI_DEVICE_ID_YAMAHA_740C:
1913 case PCI_DEVICE_ID_YAMAHA_744:
1914 case PCI_DEVICE_ID_YAMAHA_754:
1921 for (i = 0; i < YDSXG_CTRLLENGTH / 4; i++)
1922 snd_ymfpci_writel(chip, YDSXGR_CTRLINSTRAM + (i << 2), inst[i]);
1924 snd_ymfpci_enable_dsp(chip);
1927 static int __devinit snd_ymfpci_memalloc(ymfpci_t *chip)
1929 long size, playback_ctrl_size;
1930 int voice, bank, reg;
1932 dma_addr_t ptr_addr;
1934 playback_ctrl_size = 4 + 4 * YDSXG_PLAYBACK_VOICES;
1935 chip->bank_size_playback = snd_ymfpci_readl(chip, YDSXGR_PLAYCTRLSIZE) << 2;
1936 chip->bank_size_capture = snd_ymfpci_readl(chip, YDSXGR_RECCTRLSIZE) << 2;
1937 chip->bank_size_effect = snd_ymfpci_readl(chip, YDSXGR_EFFCTRLSIZE) << 2;
1938 chip->work_size = YDSXG_DEFAULT_WORK_SIZE;
1940 size = ((playback_ctrl_size + 0x00ff) & ~0x00ff) +
1941 ((chip->bank_size_playback * 2 * YDSXG_PLAYBACK_VOICES + 0x00ff) & ~0x00ff) +
1942 ((chip->bank_size_capture * 2 * YDSXG_CAPTURE_VOICES + 0x00ff) & ~0x00ff) +
1943 ((chip->bank_size_effect * 2 * YDSXG_EFFECT_VOICES + 0x00ff) & ~0x00ff) +
1945 /* work_ptr must be aligned to 256 bytes, but it's already
1946 covered with the kernel page allocation mechanism */
1947 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
1948 size, &chip->work_ptr) < 0)
1950 ptr = chip->work_ptr.area;
1951 ptr_addr = chip->work_ptr.addr;
1952 memset(ptr, 0, size); /* for sure */
1954 chip->bank_base_playback = ptr;
1955 chip->bank_base_playback_addr = ptr_addr;
1956 chip->ctrl_playback = (u32 *)ptr;
1957 chip->ctrl_playback[0] = cpu_to_le32(YDSXG_PLAYBACK_VOICES);
1958 ptr += (playback_ctrl_size + 0x00ff) & ~0x00ff;
1959 ptr_addr += (playback_ctrl_size + 0x00ff) & ~0x00ff;
1960 for (voice = 0; voice < YDSXG_PLAYBACK_VOICES; voice++) {
1961 chip->voices[voice].number = voice;
1962 chip->voices[voice].bank = (snd_ymfpci_playback_bank_t *)ptr;
1963 chip->voices[voice].bank_addr = ptr_addr;
1964 for (bank = 0; bank < 2; bank++) {
1965 chip->bank_playback[voice][bank] = (snd_ymfpci_playback_bank_t *)ptr;
1966 ptr += chip->bank_size_playback;
1967 ptr_addr += chip->bank_size_playback;
1970 ptr = (char *)(((unsigned long)ptr + 0x00ff) & ~0x00ff);
1971 ptr_addr = (ptr_addr + 0x00ff) & ~0x00ff;
1972 chip->bank_base_capture = ptr;
1973 chip->bank_base_capture_addr = ptr_addr;
1974 for (voice = 0; voice < YDSXG_CAPTURE_VOICES; voice++)
1975 for (bank = 0; bank < 2; bank++) {
1976 chip->bank_capture[voice][bank] = (snd_ymfpci_capture_bank_t *)ptr;
1977 ptr += chip->bank_size_capture;
1978 ptr_addr += chip->bank_size_capture;
1980 ptr = (char *)(((unsigned long)ptr + 0x00ff) & ~0x00ff);
1981 ptr_addr = (ptr_addr + 0x00ff) & ~0x00ff;
1982 chip->bank_base_effect = ptr;
1983 chip->bank_base_effect_addr = ptr_addr;
1984 for (voice = 0; voice < YDSXG_EFFECT_VOICES; voice++)
1985 for (bank = 0; bank < 2; bank++) {
1986 chip->bank_effect[voice][bank] = (snd_ymfpci_effect_bank_t *)ptr;
1987 ptr += chip->bank_size_effect;
1988 ptr_addr += chip->bank_size_effect;
1990 ptr = (char *)(((unsigned long)ptr + 0x00ff) & ~0x00ff);
1991 ptr_addr = (ptr_addr + 0x00ff) & ~0x00ff;
1992 chip->work_base = ptr;
1993 chip->work_base_addr = ptr_addr;
1995 snd_assert(ptr + chip->work_size == chip->work_ptr.area + chip->work_ptr.bytes, );
1997 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, chip->bank_base_playback_addr);
1998 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, chip->bank_base_capture_addr);
1999 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, chip->bank_base_effect_addr);
2000 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, chip->work_base_addr);
2001 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, chip->work_size >> 2);
2003 /* S/PDIF output initialization */
2004 chip->spdif_bits = chip->spdif_pcm_bits = SNDRV_PCM_DEFAULT_CON_SPDIF & 0xffff;
2005 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 0);
2006 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
2008 /* S/PDIF input initialization */
2009 snd_ymfpci_writew(chip, YDSXGR_SPDIFINCTRL, 0);
2011 /* digital mixer setup */
2012 for (reg = 0x80; reg < 0xc0; reg += 4)
2013 snd_ymfpci_writel(chip, reg, 0);
2014 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x3fff3fff);
2015 snd_ymfpci_writel(chip, YDSXGR_ZVOUTVOL, 0x3fff3fff);
2016 snd_ymfpci_writel(chip, YDSXGR_SPDIFOUTVOL, 0x3fff3fff);
2017 snd_ymfpci_writel(chip, YDSXGR_NATIVEADCINVOL, 0x3fff3fff);
2018 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACINVOL, 0x3fff3fff);
2019 snd_ymfpci_writel(chip, YDSXGR_PRIADCLOOPVOL, 0x3fff3fff);
2020 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0x3fff3fff);
2025 static int snd_ymfpci_free(ymfpci_t *chip)
2029 snd_assert(chip != NULL, return -EINVAL);
2031 if (chip->res_reg_area) { /* don't touch busy hardware */
2032 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
2033 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0);
2034 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0);
2035 snd_ymfpci_writel(chip, YDSXGR_STATUS, ~0);
2036 snd_ymfpci_disable_dsp(chip);
2037 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0);
2038 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0);
2039 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0);
2040 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, 0);
2041 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, 0);
2042 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
2043 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
2046 snd_ymfpci_ac3_done(chip);
2048 /* Set PCI device to D3 state */
2050 /* FIXME: temporarily disabled, otherwise we cannot fire up
2051 * the chip again unless reboot. ACPI bug?
2053 pci_set_power_state(chip->pci, 3);
2057 vfree(chip->saved_regs);
2059 if (chip->mpu_res) {
2060 release_resource(chip->mpu_res);
2061 kfree_nocheck(chip->mpu_res);
2064 release_resource(chip->fm_res);
2065 kfree_nocheck(chip->fm_res);
2067 snd_ymfpci_free_gameport(chip);
2068 if (chip->reg_area_virt)
2069 iounmap(chip->reg_area_virt);
2070 if (chip->work_ptr.area)
2071 snd_dma_free_pages(&chip->work_ptr);
2074 free_irq(chip->irq, (void *)chip);
2075 if (chip->res_reg_area) {
2076 release_resource(chip->res_reg_area);
2077 kfree_nocheck(chip->res_reg_area);
2080 pci_write_config_word(chip->pci, 0x40, chip->old_legacy_ctrl);
2082 pci_disable_device(chip->pci);
2087 static int snd_ymfpci_dev_free(snd_device_t *device)
2089 ymfpci_t *chip = device->device_data;
2090 return snd_ymfpci_free(chip);
2094 static int saved_regs_index[] = {
2096 YDSXGR_SPDIFOUTCTRL,
2097 YDSXGR_SPDIFOUTSTATUS,
2100 YDSXGR_PRIADCLOOPVOL,
2101 YDSXGR_NATIVEDACINVOL,
2102 YDSXGR_NATIVEDACOUTVOL,
2103 // YDSXGR_BUF441OUTVOL,
2104 YDSXGR_NATIVEADCINVOL,
2105 YDSXGR_SPDIFLOOPVOL,
2108 YDSXGR_LEGACYOUTVOL,
2110 YDSXGR_PLAYCTRLBASE,
2114 /* capture set up */
2121 #define YDSXGR_NUM_SAVED_REGS ARRAY_SIZE(saved_regs_index)
2123 static int snd_ymfpci_suspend(snd_card_t *card, pm_message_t state)
2125 ymfpci_t *chip = card->pm_private_data;
2128 snd_pcm_suspend_all(chip->pcm);
2129 snd_pcm_suspend_all(chip->pcm2);
2130 snd_pcm_suspend_all(chip->pcm_spdif);
2131 snd_pcm_suspend_all(chip->pcm_4ch);
2132 snd_ac97_suspend(chip->ac97);
2133 for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
2134 chip->saved_regs[i] = snd_ymfpci_readl(chip, saved_regs_index[i]);
2135 chip->saved_ydsxgr_mode = snd_ymfpci_readl(chip, YDSXGR_MODE);
2136 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
2137 snd_ymfpci_disable_dsp(chip);
2138 pci_disable_device(chip->pci);
2142 static int snd_ymfpci_resume(snd_card_t *card)
2144 ymfpci_t *chip = card->pm_private_data;
2147 pci_enable_device(chip->pci);
2148 pci_set_master(chip->pci);
2149 snd_ymfpci_aclink_reset(chip->pci);
2150 snd_ymfpci_codec_ready(chip, 0);
2151 snd_ymfpci_download_image(chip);
2154 for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
2155 snd_ymfpci_writel(chip, saved_regs_index[i], chip->saved_regs[i]);
2157 snd_ac97_resume(chip->ac97);
2159 /* start hw again */
2160 if (chip->start_count > 0) {
2161 spin_lock_irq(&chip->reg_lock);
2162 snd_ymfpci_writel(chip, YDSXGR_MODE, chip->saved_ydsxgr_mode);
2163 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT);
2164 spin_unlock_irq(&chip->reg_lock);
2168 #endif /* CONFIG_PM */
2170 int __devinit snd_ymfpci_create(snd_card_t * card,
2171 struct pci_dev * pci,
2172 unsigned short old_legacy_ctrl,
2177 static snd_device_ops_t ops = {
2178 .dev_free = snd_ymfpci_dev_free,
2183 /* enable PCI device */
2184 if ((err = pci_enable_device(pci)) < 0)
2187 chip = kcalloc(1, sizeof(*chip), GFP_KERNEL);
2189 pci_disable_device(pci);
2192 chip->old_legacy_ctrl = old_legacy_ctrl;
2193 spin_lock_init(&chip->reg_lock);
2194 spin_lock_init(&chip->voice_lock);
2195 init_waitqueue_head(&chip->interrupt_sleep);
2196 atomic_set(&chip->interrupt_sleep_count, 0);
2200 chip->device_id = pci->device;
2201 pci_read_config_byte(pci, PCI_REVISION_ID, (u8 *)&chip->rev);
2202 chip->reg_area_phys = pci_resource_start(pci, 0);
2203 chip->reg_area_virt = ioremap_nocache(chip->reg_area_phys, 0x8000);
2204 pci_set_master(pci);
2206 if ((chip->res_reg_area = request_mem_region(chip->reg_area_phys, 0x8000, "YMFPCI")) == NULL) {
2207 snd_printk("unable to grab memory region 0x%lx-0x%lx\n", chip->reg_area_phys, chip->reg_area_phys + 0x8000 - 1);
2208 snd_ymfpci_free(chip);
2211 if (request_irq(pci->irq, snd_ymfpci_interrupt, SA_INTERRUPT|SA_SHIRQ, "YMFPCI", (void *) chip)) {
2212 snd_printk("unable to grab IRQ %d\n", pci->irq);
2213 snd_ymfpci_free(chip);
2216 chip->irq = pci->irq;
2218 snd_ymfpci_aclink_reset(pci);
2219 if (snd_ymfpci_codec_ready(chip, 0) < 0) {
2220 snd_ymfpci_free(chip);
2224 snd_ymfpci_download_image(chip);
2226 udelay(100); /* seems we need a delay after downloading image.. */
2228 if (snd_ymfpci_memalloc(chip) < 0) {
2229 snd_ymfpci_free(chip);
2233 if ((err = snd_ymfpci_ac3_init(chip)) < 0) {
2234 snd_ymfpci_free(chip);
2239 chip->saved_regs = vmalloc(YDSXGR_NUM_SAVED_REGS * sizeof(u32));
2240 if (chip->saved_regs == NULL) {
2241 snd_ymfpci_free(chip);
2244 snd_card_set_pm_callback(card, snd_ymfpci_suspend, snd_ymfpci_resume, chip);
2247 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
2248 snd_ymfpci_free(chip);
2252 snd_ymfpci_proc_init(card, chip);
2254 snd_card_set_dev(card, &pci->dev);