-#if defined(BF537_FAMILY) || defined(BF533_FAMILY) || defined(BF527_FAMILY)
-#define SYSCR_VAL 0x0
-#elif defined(BF561_FAMILY)
-#define SYSCR_VAL 0x20
-#elif defined(BF548_FAMILY)
-#define SYSCR_VAL 0x10
-#endif
-
-/*
- * Delay min 5 SCLK cycles using worst case CCLK/SCLK ratio (15)
- */
-#define SWRST_DELAY (5 * 15)
-
-/* A system soft reset makes external memory unusable
- * so force this function into L1.
+/* A system soft reset makes external memory unusable so force
+ * this function into L1. We use the compiler ssync here rather
+ * than SSYNC() because it's safe (no interrupts and such) and
+ * we save some L1. We do not need to force sanity in the SYSCR
+ * register as the BMODE selection bit is cleared by the soft
+ * reset while the Core B bit (on dual core parts) is cleared by
+ * the core reset.