+ /* Set FS period and length in terms of bit clock periods */
+ switch (mcbsp_data->fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
+ case SND_SOC_DAIFMT_I2S:
+ regs->srgr2 |= FPER(wlen * 2 - 1);
+ regs->srgr1 |= FWID(wlen - 1);
+ break;
+ case SND_SOC_DAIFMT_DSP_A:
+ regs->srgr2 |= FPER(wlen * 2 - 1);
+ regs->srgr1 |= FWID(wlen * 2 - 2);
+ break;
+ }
+