Blackfin SPORTS UART Driver: converting BFIN->BLACKFIN

[linux-2.6-omap-h63xx.git] / Documentation / DocBook / kernel-api.tmpl

diff --git a/Documentation/DocBook/kernel-api.tmpl b/Documentation/DocBook/kernel-api.tmpl
index dc0f30c3e5715d6801e482dc51988fe992d7bf82..b7b1482f6e04ebda24e665d0734fb4786bfc197a 100644 (file)
--- a/Documentation/DocBook/kernel-api.tmpl
+++ b/Documentation/DocBook/kernel-api.tmpl
@@ -119,7 +119,7 @@ X!Ilib/string.c
 !Elib/string.c
      </sect1>
      <sect1><title>Bit Operations</title>
-!Iinclude/asm-x86/bitops_32.h
+!Iinclude/asm-x86/bitops.h
      </sect1>
   </chapter>
 
@@ -297,11 +297,6 @@ X!Earch/x86/kernel/mca_32.c
 !Ikernel/acct.c
   </chapter>
 
-  <chapter id="pmfuncs">
-     <title>Power Management</title>
-!Ekernel/power/pm.c
-  </chapter>
-
   <chapter id="devdrivers">
      <title>Device drivers infrastructure</title>
      <sect1><title>Device Drivers Base</title>
@@ -650,4 +645,58 @@ X!Idrivers/video/console/fonts.c
 !Edrivers/i2c/i2c-core.c
   </chapter>
 
+  <chapter id="clk">
+     <title>Clock Framework</title>
+
+     <para>
+       The clock framework defines programming interfaces to support
+       software management of the system clock tree.
+       This framework is widely used with System-On-Chip (SOC) platforms
+       to support power management and various devices which may need
+       custom clock rates.
+       Note that these "clocks" don't relate to timekeeping or real
+       time clocks (RTCs), each of which have separate frameworks.
+       These <structname>struct clk</structname> instances may be used
+       to manage for example a 96 MHz signal that is used to shift bits
+       into and out of peripherals or busses, or otherwise trigger
+       synchronous state machine transitions in system hardware.
+     </para>
+
+     <para>
+       Power management is supported by explicit software clock gating:
+       unused clocks are disabled, so the system doesn't waste power
+       changing the state of transistors that aren't in active use.
+       On some systems this may be backed by hardware clock gating,
+       where clocks are gated without being disabled in software.
+       Sections of chips that are powered but not clocked may be able
+       to retain their last state.
+       This low power state is often called a <emphasis>retention
+       mode</emphasis>.
+       This mode still incurs leakage currents, especially with finer
+       circuit geometries, but for CMOS circuits power is mostly used
+       by clocked state changes.
+     </para>
+
+     <para>
+       Power-aware drivers only enable their clocks when the device
+       they manage is in active use.  Also, system sleep states often
+       differ according to which clock domains are active:  while a
+       "standby" state may allow wakeup from several active domains, a
+       "mem" (suspend-to-RAM) state may require a more wholesale shutdown
+       of clocks derived from higher speed PLLs and oscillators, limiting
+       the number of possible wakeup event sources.  A driver's suspend
+       method may need to be aware of system-specific clock constraints
+       on the target sleep state.
+     </para>
+
+     <para>
+        Some platforms support programmable clock generators.  These
+       can be used by external chips of various kinds, such as other
+       CPUs, multimedia codecs, and devices with strict requirements
+       for interface clocking.
+     </para>
+
+!Iinclude/linux/clk.h
+  </chapter>
+
 </book>