--- 6.1 Set variables to tweak the build to the architecture
--- 6.2 Add prerequisites to archprepare:
--- 6.3 List directories to visit when descending
- --- 6.4 Architecture specific boot images
+ --- 6.4 Architecture-specific boot images
--- 6.5 Building non-kbuild targets
--- 6.6 Commands useful for building a boot image
--- 6.7 Custom kbuild commands
Example:
obj-y += foo.o
- This tell kbuild that there is one object in that directory, named
+ This tells kbuild that there is one object in that directory, named
foo.o. foo.o will be built from foo.c or foo.S.
If foo.o shall be built as a module, the variable obj-m is used.
be included in a library, lib.a.
All objects listed with lib-y are combined in a single
library for that directory.
- Objects that are listed in obj-y and additionaly listed in
- lib-y will not be included in the library, since they will anyway
- be accessible.
+ Objects that are listed in obj-y and additionally listed in
+ lib-y will not be included in the library, since they will
+ be accessible anyway.
For consistency, objects listed in lib-m will be included in lib.a.
Note that the same kbuild makefile may list files to be built-in
--- 3.7 Compilation flags
- EXTRA_CFLAGS, EXTRA_AFLAGS, EXTRA_LDFLAGS, EXTRA_ARFLAGS
+ EXTRA_CFLAGS, EXTRA_AFLAGS, EXTRA_LDFLAGS
All the EXTRA_ variables apply only to the kbuild makefile
where they are assigned. The EXTRA_ variables apply to all
This variable is necessary because the top Makefile owns the
- variable $(CFLAGS) and uses it for compilation flags for the
+ variable $(KBUILD_CFLAGS) and uses it for compilation flags for the
entire tree.
$(EXTRA_AFLAGS) is a similar string for per-directory options
EXTRA_AFLAGS := -traditional
- $(EXTRA_LDFLAGS) and $(EXTRA_ARFLAGS) are similar strings for
- per-directory options to $(LD) and $(AR).
+ $(EXTRA_LDFLAGS) is a string for per-directory options to $(LD).
Example:
#arch/m68k/fpsp040/Makefile
Special rules are used when the kbuild infrastructure does
not provide the required support. A typical example is
header files generated during the build process.
- Another example are the architecture specific Makefiles which
+ Another example are the architecture-specific Makefiles which
need special rules to prepare boot images etc.
Special rules are written as normal Make rules.
#arch/i386/kernel/Makefile
vsyscall-flags += $(call ld-option, -Wl$(comma)--hash-style=sysv)
- In the above example vsyscall-flags will be assigned the option
+ In the above example, vsyscall-flags will be assigned the option
-Wl$(comma)--hash-style=sysv if it is supported by $(CC).
The second argument is optional, and if supplied will be used
if first argument is not supported.
#arch/i386/Makefile
cflags-y += $(call cc-option,-march=pentium-mmx,-march=i586)
- In the above example cflags-y will be assigned the option
+ In the above example, cflags-y will be assigned the option
-march=pentium-mmx if supported by $(CC), otherwise -march=i586.
The second argument to cc-option is optional, and if omitted,
cflags-y will be assigned no value if first option is not supported.
+ Note: cc-option uses KBUILD_CFLAGS for $(CC) options
cc-option-yn
cc-option-yn is used to check if gcc supports a given option
option. When $(biarch) equals 'y', the expanded variables $(aflags-y)
and $(cflags-y) will be assigned the values -a32 and -m32,
respectively.
+ Note: cc-option-yn uses KBUILD_CFLAGS for $(CC) options
cc-option-align
gcc versions >= 3.0 changed the type of options used to specify
cc-option-align = -falign
Example:
- CFLAGS += $(cc-option-align)-functions=4
+ KBUILD_CFLAGS += $(cc-option-align)-functions=4
In the above example, the option -falign-functions=4 is used for
gcc >= 3.00. For gcc < 3.00, -malign-functions=4 is used.
+ Note: cc-option-align uses KBUILD_CFLAGS for $(CC) options
cc-version
cc-version returns a numerical version of the $(CC) compiler version.
The third parameter may be a text as in this example, but it may also
be an expanded variable or a macro.
+ cc-fullversion
+ cc-fullversion is useful when the exact version of gcc is needed.
+ One typical use-case is when a specific GCC version is broken.
+ cc-fullversion points out a more specific version than cc-version does.
+
+ Example:
+ #arch/powerpc/Makefile
+ $(Q)if test "$(call cc-fullversion)" = "040200" ; then \
+ echo -n '*** GCC-4.2.0 cannot compile the 64-bit powerpc ' ; \
+ false ; \
+ fi
+
+ In this example for a specific GCC version the build will error out explaining
+ to the user why it stops.
=== 4 Host Program support
Host programs can be made up based on composite objects.
The syntax used to define composite objects for host programs is
similar to the syntax used for kernel objects.
- $(<executeable>-objs) lists all objects used to link the final
+ $(<executable>-objs) lists all objects used to link the final
executable.
Example:
located at the root of the obj tree.
The very first objects linked are listed in head-y, assigned by
arch/$(ARCH)/Makefile.
-7) Finally, the architecture specific part does any required post processing
+7) Finally, the architecture-specific part does any required post processing
and builds the final bootimage.
- This includes building boot records
- - Preparing initrd images and thelike
+ - Preparing initrd images and the like
--- 6.1 Set variables to tweak the build to the architecture
Example:
#arch/s390/Makefile
LDFLAGS := -m elf_s390
- Note: EXTRA_LDFLAGS and LDFLAGS_$@ can be used to further customise
- the flags used. See chapter 7.
+ Note: EXTRA_LDFLAGS can be used to further customise
+ the flags used. See chapter 3.7.
LDFLAGS_MODULE Options for $(LD) when linking modules
#arch/sparc64/Makefile
AFLAGS += -m64 -mcpu=ultrasparc
- CFLAGS $(CC) compiler flags
+ KBUILD_CFLAGS $(CC) compiler flags
Default value - see top level Makefile
Append or modify as required per architecture.
- Often, the CFLAGS variable depends on the configuration.
+ Often, the KBUILD_CFLAGS variable depends on the configuration.
Example:
#arch/i386/Makefile
cflags-$(CONFIG_M386) += -march=i386
- CFLAGS += $(cflags-y)
+ KBUILD_CFLAGS += $(cflags-y)
Many arch Makefiles dynamically run the target C compiler to
probe supported options:
-march=pentium2,-march=i686)
...
# Disable unit-at-a-time mode ...
- CFLAGS += $(call cc-option,-fno-unit-at-a-time)
+ KBUILD_CFLAGS += $(call cc-option,-fno-unit-at-a-time)
...
$(head-y) lists objects to be linked first in vmlinux.
$(libs-y) lists directories where a lib.a archive can be located.
- The rest lists directories where a built-in.o object file can be
+ The rest list directories where a built-in.o object file can be
located.
$(init-y) objects will be located after $(head-y).
$(core-y), $(libs-y), $(drivers-y) and $(net-y).
The top level Makefile defines values for all generic directories,
- and arch/$(ARCH)/Makefile only adds architecture specific directories.
+ and arch/$(ARCH)/Makefile only adds architecture-specific directories.
Example:
#arch/sparc64/Makefile
drivers-$(CONFIG_OPROFILE) += arch/sparc64/oprofile/
---- 6.4 Architecture specific boot images
+--- 6.4 Architecture-specific boot images
An arch Makefile specifies goals that take the vmlinux file, compress
it, wrap it in bootstrapping code, and copy the resulting files
"$(Q)$(MAKE) $(build)=<dir>" is the recommended way to invoke
make in a subdirectory.
- There are no rules for naming architecture specific targets,
+ There are no rules for naming architecture-specific targets,
but executing "make help" will list all relevant targets.
To support this, $(archhelp) must be defined.
$(call if_changed,ld/objcopy/gzip)
When the rule is evaluated, it is checked to see if any files
- needs an update, or the command line has changed since the last
+ need an update, or the command line has changed since the last
invocation. The latter will force a rebuild if any options
to the executable have changed.
Any target that utilises if_changed must be listed in $(targets),
In this example, there are two possible targets, requiring different
options to the linker. The linker options are specified using the
LDFLAGS_$@ syntax - one for each potential target.
- $(targets) are assinged all potential targets, by which kbuild knows
+ $(targets) are assigned all potential targets, by which kbuild knows
the targets and will:
1) check for commandline changes
2) delete target during make clean
assignment.
The kbuild infrastructure for *lds file are used in several
- architecture specific files.
+ architecture-specific files.
=== 7 Kbuild Variables
This variable defines a place for the arch Makefiles to install
the resident kernel image and System.map file.
- Use this for architecture specific install targets.
+ Use this for architecture-specific install targets.
INSTALL_MOD_PATH, MODLIB
projects / linux-2.6-omap-h63xx.git / blobdiff